diff options
| author | Mark A. Greer <mgreer@mvista.com> | 2005-01-03 04:32:01 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-01-03 04:32:01 -0800 |
| commit | 8594ca60fa1e4fbb496e3607e5390454e6aada4b (patch) | |
| tree | 6daab100c51bd4e7c2434b2019a134105062f79c /include/linux | |
| parent | b595953fd23f2fb0e24ec90d81db16510fe32557 (diff) | |
[PATCH] ppc32: Marvell host bridge support (mv64x60)
This patch adds core support for a line of host bridges from Marvell
(formerly Galileo). This code has been tested with a GT64260a, GT64260b,
MV64360, and MV64460. Patches for platforms that use these bridges will be
sent separately.
The patch is rather large so a link is provided.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/mv643xx.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/include/linux/mv643xx.h b/include/linux/mv643xx.h index a889dd9788ff..b93227d4c422 100644 --- a/include/linux/mv643xx.h +++ b/include/linux/mv643xx.h @@ -13,8 +13,11 @@ #ifndef __ASM_MV64340_H #define __ASM_MV64340_H +#ifdef __MIPS__ #include <asm/addrspace.h> #include <asm/marvell.h> +#endif +#include <asm/types.h> /****************************************/ /* Processor Address Space */ @@ -1036,4 +1039,50 @@ extern void mv64340_irq_init(unsigned int base); +/* MPSC Platform Device, Driver Data (Shared register regions) */ +#define MPSC_SHARED_NAME "mpsc_shared" + +#define MPSC_ROUTING_BASE_ORDER 0 +#define MPSC_SDMA_INTR_BASE_ORDER 1 + +#define MPSC_ROUTING_REG_BLOCK_SIZE 0x000c +#define MPSC_SDMA_INTR_REG_BLOCK_SIZE 0x0084 + +struct mpsc_shared_pd_dd { + u32 mrr_val; + u32 rcrr_val; + u32 tcrr_val; + u32 intr_cause_val; + u32 intr_mask_val; +}; + +/* MPSC Platform Device, Driver Data */ +#define MPSC_CTLR_NAME "mpsc" + +#define MPSC_BASE_ORDER 0 +#define MPSC_SDMA_BASE_ORDER 1 +#define MPSC_BRG_BASE_ORDER 2 + +#define MPSC_REG_BLOCK_SIZE 0x0038 +#define MPSC_SDMA_REG_BLOCK_SIZE 0x0c18 +#define MPSC_BRG_REG_BLOCK_SIZE 0x0008 + +struct mpsc_pd_dd { + u8 mirror_regs; + u8 cache_mgmt; + u8 max_idle; + int default_baud; + int default_bits; + int default_parity; + int default_flow; + u32 chr_1_val; + u32 chr_2_val; + u32 chr_10_val; + u32 mpcr_val; + u32 bcr_val; + u8 brg_can_tune; + u8 brg_clk_src; + u32 brg_clk_freq; +}; + #endif /* __ASM_MV64340_H */ |