diff options
| author | Joonas Lahtinen <joonas.lahtinen@linux.intel.com> | 2022-04-12 11:28:42 +0300 |
|---|---|---|
| committer | Joonas Lahtinen <joonas.lahtinen@linux.intel.com> | 2022-04-12 11:28:42 +0300 |
| commit | c16c8bfa09d5f318c1bd65698d058d3739970c24 (patch) | |
| tree | a3ac5a1cad695c93d698cfff0b7629fd1a2ff79c /include/uapi/linux/rseq.h | |
| parent | 8e7e5c077cd57ee9a36d58c65f07257dc49a88d5 (diff) | |
| parent | b85ffe47c4ec172214a38b7e7087c60582c488f0 (diff) | |
Merge drm/drm-next into drm-intel-gt-next
Pull in TTM changes needed for DG2 CCS enabling from Ram.
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'include/uapi/linux/rseq.h')
| -rw-r--r-- | include/uapi/linux/rseq.h | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/include/uapi/linux/rseq.h b/include/uapi/linux/rseq.h index 9a402fdb60e9..77ee207623a9 100644 --- a/include/uapi/linux/rseq.h +++ b/include/uapi/linux/rseq.h @@ -105,23 +105,11 @@ struct rseq { * Read and set by the kernel. Set by user-space with single-copy * atomicity semantics. This field should only be updated by the * thread which registered this data structure. Aligned on 64-bit. + * + * 32-bit architectures should update the low order bits of the + * rseq_cs field, leaving the high order bits initialized to 0. */ - union { - __u64 ptr64; -#ifdef __LP64__ - __u64 ptr; -#else - struct { -#if (defined(__BYTE_ORDER) && (__BYTE_ORDER == __BIG_ENDIAN)) || defined(__BIG_ENDIAN) - __u32 padding; /* Initialized to zero. */ - __u32 ptr32; -#else /* LITTLE */ - __u32 ptr32; - __u32 padding; /* Initialized to zero. */ -#endif /* ENDIAN */ - } ptr; -#endif - } rseq_cs; + __u64 rseq_cs; /* * Restartable sequences flags field. |