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authorDeepak Gupta <debug@rivosinc.com>2026-01-25 21:09:55 -0700
committerPaul Walmsley <pjw@kernel.org>2026-01-29 02:38:40 -0700
commit2af7c9cf021c5dabe880b68e5cc22c618060d954 (patch)
treecd59214c391bc61fa047940612019fed2b1cfe21 /include/uapi/linux
parent9d0e75e25e3be74828ffb7657992ce0f03352cc3 (diff)
riscv/ptrace: expose riscv CFI status and state via ptrace and in core files
Expose a new register type NT_RISCV_USER_CFI for risc-v CFI status and state. Intentionally, both landing pad and shadow stack status and state are rolled into the CFI state. Creating two different NT_RISCV_USER_XXX would not be useful and would waste a note type. Enabling, disabling and locking the CFI feature is not allowed via ptrace set interface. However, setting 'elp' state or setting shadow stack pointer are allowed via the ptrace set interface. It is expected that 'gdb' might need to fixup 'elp' state or 'shadow stack' pointer. Signed-off-by: Deepak Gupta <debug@rivosinc.com> Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6 Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com> Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-19-b55691eacf4f@rivosinc.com [pjw@kernel.org: updated to apply; cleaned patch description and comments; addressed checkpatch issues] Signed-off-by: Paul Walmsley <pjw@kernel.org>
Diffstat (limited to 'include/uapi/linux')
-rw-r--r--include/uapi/linux/elf.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h
index 819ded2d39de..ee30dcd80901 100644
--- a/include/uapi/linux/elf.h
+++ b/include/uapi/linux/elf.h
@@ -545,6 +545,8 @@ typedef struct elf64_shdr {
#define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */
#define NN_RISCV_TAGGED_ADDR_CTRL "LINUX"
#define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */
+#define NN_RISCV_USER_CFI "LINUX"
+#define NT_RISCV_USER_CFI 0x903 /* RISC-V shadow stack state */
#define NN_LOONGARCH_CPUCFG "LINUX"
#define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */
#define NN_LOONGARCH_CSR "LINUX"