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authorQuentin Schulz <quentin.schulz@theobroma-systems.com>2022-11-17 13:04:31 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-05-17 11:13:21 +0200
commit24637afbe756cdb1f09168c05a8babb5dd3bc518 (patch)
tree0207a860a4a3ee3d1222bb83fecaad9bd28e42f8 /include/uapi
parentd65ba6390eaf095a40bc976fd94a2ff8fcaaa9e9 (diff)
clk: rockchip: rk3399: allow clk_cifout to force clk_cifout_src to reparent
commit 933bf364e152cd60902cf9585c2ba310d593e69f upstream. clk_cifout is derived from clk_cifout_src through an integer divider limited to 32. clk_cifout_src is a child of either cpll, gpll or npll without any possibility of a divider of any sort. The default clock parent is cpll. Let's allow clk_cifout to ask its parent clk_cifout_src to reparent in order to find the real closest possible rate for clk_cifout and not one derived from cpll only. Cc: stable@vger.kernel.org # 4.10+ Fixes: fd8bc829336a ("clk: rockchip: fix the rk3399 cifout clock") Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20221117-rk3399-cifout-set-rate-parent-v1-0-432548d04081@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/uapi')
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