diff options
| author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2004-09-06 22:48:17 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2004-09-06 22:48:17 -0700 |
| commit | 32f6e43157f6e021d68023c778c5c34d30f99b52 (patch) | |
| tree | 6c4ad0fcd3cdbd81be61143d1ffc58ccb99a4043 /include | |
| parent | 2cd242672eca6ba741dda2a13adf7e9ccd7d7451 (diff) | |
| parent | eb2e58de4987c69062f327d9af0f27a6b2cfc8a1 (diff) | |
Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk
into ppc970.osdl.org:/home/torvalds/v2.6/linux
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-ebsa110/param.h | 2 | ||||
| -rw-r--r-- | include/asm-arm/arch-l7200/param.h | 2 | ||||
| -rw-r--r-- | include/asm-arm/arch-pxa/hardware.h | 7 | ||||
| -rw-r--r-- | include/asm-arm/arch-pxa/irqs.h | 54 | ||||
| -rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 18 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/param.h | 2 | ||||
| -rw-r--r-- | include/asm-arm/atomic.h | 54 | ||||
| -rw-r--r-- | include/asm-arm/cacheflush.h | 12 | ||||
| -rw-r--r-- | include/asm-arm/param.h | 11 | ||||
| -rw-r--r-- | include/asm-arm/system.h | 32 | ||||
| -rw-r--r-- | include/asm-arm/unistd.h | 45 |
11 files changed, 110 insertions, 129 deletions
diff --git a/include/asm-arm/arch-ebsa110/param.h b/include/asm-arm/arch-ebsa110/param.h index 13a9fc1b7a25..be19b08d1c75 100644 --- a/include/asm-arm/arch-ebsa110/param.h +++ b/include/asm-arm/arch-ebsa110/param.h @@ -1,4 +1,4 @@ /* * linux/include/asm-arm/arch-ebsa110/param.h */ -#define __KERNEL_HZ 200 +#define HZ 200 diff --git a/include/asm-arm/arch-l7200/param.h b/include/asm-arm/arch-l7200/param.h index 98786ad71202..9962a12ab158 100644 --- a/include/asm-arm/arch-l7200/param.h +++ b/include/asm-arm/arch-l7200/param.h @@ -16,4 +16,4 @@ /* * See 'time.h' for how the RTC HZ rate is set */ -#define __KERNEL_HZ 128 +#define HZ 128 diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index 127fc1af12c0..5e37ae2e89e3 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h @@ -59,10 +59,9 @@ typedef struct { volatile u32 offset[4096]; } __regbase; # define __REG(x) __REGP(io_p2v(x)) #endif -/* Let's kick gcc's ass again... */ -# define __REG2(x,y) \ - ( __builtin_constant_p(y) ? (__REG((x) + (y))) \ - : (*(volatile u32 *)((u32)&__REG(x) + (y))) ) +/* With indexed regs we don't want to feed the index through io_p2v() + especially if it is a variable, otherwise horrible code will result. */ +# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) # define __PREG(x) (io_v2p((u32)&(x))) diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index 29164556bd65..3d9b92a466ca 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h @@ -12,19 +12,34 @@ #include <linux/config.h> -#define PXA_IRQ_SKIP 7 /* The first 7 IRQs are not yet used */ +#ifdef CONFIG_PXA27x +#define PXA_IRQ_SKIP 0 +#else +#define PXA_IRQ_SKIP 7 +#endif + #define PXA_IRQ(x) ((x) - PXA_IRQ_SKIP) -#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error */ +#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ +#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ +#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ +#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI) */ +#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */ +#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */ +#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */ +#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */ +#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */ #define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */ #define IRQ_GPIO1 PXA_IRQ(9) /* GPIO1 Edge Detect */ -#define IRQ_GPIO_2_80 PXA_IRQ(10) /* GPIO[2-80] Edge Detect */ +#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */ #define IRQ_USB PXA_IRQ(11) /* USB Service */ #define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */ #define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt */ #define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */ -#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request */ -#define IRQ_NSSP PXA_IRQ(16) /* Network SSP Service Request */ +#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */ +#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */ +#define IRQ_NSSP PXA_IRQ(16) /* Network SSP Service Request (PXA25x) */ +#define IRQ_SSP2 PXA_IRQ(16) /* SSP2 interrupt (PXA27x) */ #define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */ #define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */ #define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */ @@ -41,13 +56,28 @@ #define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ #define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ -#define GPIO_2_80_TO_IRQ(x) \ - PXA_IRQ((x) - 2 + 32) -#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_80_TO_IRQ(x)) +#ifdef CONFIG_PXA27x +#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ +#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ -#define IRQ_TO_GPIO_2_80(i) \ - ((i) - PXA_IRQ(32) + 2) -#define IRQ_TO_GPIO(i) ((i) - (((i) > IRQ_GPIO1) ? IRQ_GPIO(2) - 2 : IRQ_GPIO(0))) +#define PXA_INTERNAL_IRQS 34 +#else +#define PXA_INTERNAL_IRQS 32 +#endif + +#define GPIO_2_x_TO_IRQ(x) \ + PXA_IRQ((x) - 2 + PXA_INTERNAL_IRQS) +#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) + +#define IRQ_TO_GPIO_2_x(i) \ + ((i) - IRQ_GPIO(2) + 2) +#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) + +#if defined(CONFIG_PXA25x) +#define PXA_LAST_GPIO 80 +#elif defined(CONFIG_PXA27x) +#define PXA_LAST_GPIO 127 +#endif /* * The next 16 interrupts are for board specific purposes. Since @@ -55,7 +85,7 @@ * these. If you need more, increase IRQ_BOARD_END, but keep it * within sensible limits. */ -#define IRQ_BOARD_START (IRQ_GPIO(80) + 1) +#define IRQ_BOARD_START (IRQ_GPIO(PXA_LAST_GPIO) + 1) #define IRQ_BOARD_END (IRQ_BOARD_START + 16) #define IRQ_SA1111_START (IRQ_BOARD_END) diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index d0f64e3f7437..92461357a3d3 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1134,15 +1134,15 @@ typedef void (*ExcpHndlr) (void) ; #define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3) #define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2) -#define GPLR(x) ((((x) & 0x7f) < 96) ? _GPLR(x) : GPLR3) -#define GPDR(x) ((((x) & 0x7f) < 96) ? _GPDR(x) : GPDR3) -#define GPSR(x) ((((x) & 0x7f) < 96) ? _GPSR(x) : GPSR3) -#define GPCR(x) ((((x) & 0x7f) < 96) ? _GPCR(x) : GPCR3) -#define GRER(x) ((((x) & 0x7f) < 96) ? _GRER(x) : GRER3) -#define GFER(x) ((((x) & 0x7f) < 96) ? _GFER(x) : GFER3) -#define GEDR(x) ((((x) & 0x7f) < 96) ? _GEDR(x) : GEDR3) -#define GAFR(x) ((((x) & 0x7f) < 96) ? _GAFR(x) : \ - ((((x) & 0x7f) < 112) ? GAFR3_L : GAFR3_U)) +#define GPLR(x) (*((((x) & 0x7f) < 96) ? &_GPLR(x) : &GPLR3)) +#define GPDR(x) (*((((x) & 0x7f) < 96) ? &_GPDR(x) : &GPDR3)) +#define GPSR(x) (*((((x) & 0x7f) < 96) ? &_GPSR(x) : &GPSR3)) +#define GPCR(x) (*((((x) & 0x7f) < 96) ? &_GPCR(x) : &GPCR3)) +#define GRER(x) (*((((x) & 0x7f) < 96) ? &_GRER(x) : &GRER3)) +#define GFER(x) (*((((x) & 0x7f) < 96) ? &_GFER(x) : &GFER3)) +#define GEDR(x) (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3)) +#define GAFR(x) (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \ + ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U))) #else #define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) diff --git a/include/asm-arm/arch-s3c2410/param.h b/include/asm-arm/arch-s3c2410/param.h index 9a5fcde9f8a6..483d3f149883 100644 --- a/include/asm-arm/arch-s3c2410/param.h +++ b/include/asm-arm/arch-s3c2410/param.h @@ -22,6 +22,6 @@ * add a software pre-scaler to the evil timer systems. */ -#define __KERNEL_HZ 200 +#define HZ 200 #endif /* __ASM_ARCH_PARAM_H */ diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h index 257d32f099da..24208a2dabe8 100644 --- a/include/asm-arm/atomic.h +++ b/include/asm-arm/atomic.h @@ -44,21 +44,6 @@ static inline void atomic_set(atomic_t *v, int i) : "cc"); } -static inline void atomic_add(int i, atomic_t *v) -{ - unsigned long tmp, tmp2; - - __asm__ __volatile__("@ atomic_add\n" -"1: ldrex %0, [%2]\n" -" add %0, %0, %3\n" -" strex %1, %0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (tmp), "=&r" (tmp2) - : "r" (&v->counter), "Ir" (i) - : "cc"); -} - static inline int atomic_add_return(int i, atomic_t *v) { unsigned long tmp; @@ -77,21 +62,6 @@ static inline int atomic_add_return(int i, atomic_t *v) return result; } -static inline void atomic_sub(int i, atomic_t *v) -{ - unsigned long tmp, tmp2; - - __asm__ __volatile__("@ atomic_sub\n" -"1: ldrex %0, [%2]\n" -" sub %0, %0, %3\n" -" strex %1, %0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (tmp), "=&r" (tmp2) - : "r" (&v->counter), "Ir" (i) - : "cc"); -} - static inline int atomic_sub_return(int i, atomic_t *v) { unsigned long tmp; @@ -135,15 +105,6 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) #define atomic_set(v,i) (((v)->counter) = (i)) -static inline void atomic_add(int i, atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - v->counter += i; - local_irq_restore(flags); -} - static inline int atomic_add_return(int i, atomic_t *v) { unsigned long flags; @@ -157,15 +118,6 @@ static inline int atomic_add_return(int i, atomic_t *v) return val; } -static inline void atomic_sub(int i, atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - v->counter -= i; - local_irq_restore(flags); -} - static inline int atomic_sub_return(int i, atomic_t *v) { unsigned long flags; @@ -190,8 +142,10 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) #endif /* __LINUX_ARM_ARCH__ */ -#define atomic_inc(v) atomic_add(1, v) -#define atomic_dec(v) atomic_sub(1, v) +#define atomic_add(i, v) (void) atomic_add_return(i, v) +#define atomic_inc(v) (void) atomic_add_return(1, v) +#define atomic_sub(i, v) (void) atomic_sub_return(i, v) +#define atomic_dec(v) (void) atomic_sub_return(1, v) #define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 84d875206dad..9cfb98c191c1 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -157,6 +157,7 @@ struct cpu_cache_fns { void (*flush_user_range)(unsigned long, unsigned long, unsigned int); void (*coherent_kern_range)(unsigned long, unsigned long); + void (*coherent_user_range)(unsigned long, unsigned long); void (*flush_kern_dcache_page)(void *); void (*dma_inv_range)(unsigned long, unsigned long); @@ -175,6 +176,7 @@ extern struct cpu_cache_fns cpu_cache; #define __cpuc_flush_user_all cpu_cache.flush_user_all #define __cpuc_flush_user_range cpu_cache.flush_user_range #define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range +#define __cpuc_coherent_user_range cpu_cache.coherent_user_range #define __cpuc_flush_dcache_page cpu_cache.flush_kern_dcache_page /* @@ -193,12 +195,14 @@ extern struct cpu_cache_fns cpu_cache; #define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) +#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) #define __cpuc_flush_dcache_page __glue(_CACHE,_flush_kern_dcache_page) extern void __cpuc_flush_kern_all(void); extern void __cpuc_flush_user_all(void); extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); extern void __cpuc_coherent_kern_range(unsigned long, unsigned long); +extern void __cpuc_coherent_user_range(unsigned long, unsigned long); extern void __cpuc_flush_dcache_page(void *); /* @@ -268,6 +272,14 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr) } /* + * flush_cache_user_range is used when we want to ensure that the + * Harvard caches are synchronised for the user space address range. + * This is used for the ARM private sys_cacheflush system call. + */ +#define flush_cache_user_range(vma,start,end) \ + __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) + +/* * Perform necessary cache operations to ensure that data previously * stored within this range of addresses can be executed by the CPU. */ diff --git a/include/asm-arm/param.h b/include/asm-arm/param.h index 41a2f4fcf6b2..94223d4d7e88 100644 --- a/include/asm-arm/param.h +++ b/include/asm-arm/param.h @@ -10,14 +10,13 @@ #ifndef __ASM_PARAM_H #define __ASM_PARAM_H -#include <asm/arch/param.h> /* for HZ */ +#ifdef __KERNEL__ +# include <asm/arch/param.h> /* for kernel version of HZ */ -#ifndef __KERNEL_HZ -#define __KERNEL_HZ 100 -#endif +# ifndef HZ +# define HZ 100 /* Internal kernel timer frequency */ +# endif -#ifdef __KERNEL__ -# define HZ __KERNEL_HZ /* Internal kernel timer frequency */ # define USER_HZ 100 /* User interfaces are in "ticks" */ # define CLOCKS_PER_SEC (USER_HZ) /* like times() */ #else diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index d500cc940f81..146a814e53a2 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -55,6 +55,38 @@ __val; \ }) +#define __cacheid_present(val) (val != read_cpuid(CPUID_ID)) +#define __cacheid_vivt(val) ((val & (15 << 25)) != (14 << 25)) +#define __cacheid_vipt(val) ((val & (15 << 25)) == (14 << 25)) +#define __cacheid_vipt_nonaliasing(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25)) +#define __cacheid_vipt_aliasing(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23)) + +#define cache_is_vivt() \ + ({ \ + unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ + (!__cacheid_present(__val)) || __cacheid_vivt(__val); \ + }) + +#define cache_is_vipt() \ + ({ \ + unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ + __cacheid_present(__val) && __cacheid_vipt(__val); \ + }) + +#define cache_is_vipt_nonaliasing() \ + ({ \ + unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ + __cacheid_present(__val) && \ + __cacheid_vipt_nonaliasing(__val); \ + }) + +#define cache_is_vipt_aliasing() \ + ({ \ + unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ + __cacheid_present(__val) && \ + __cacheid_vipt_aliasing(__val); \ + }) + /* * This is used to ensure the compiler did actually allocate the register we * asked it for some inline assembly sequences. Apparently we can't trust diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 1435eb396b73..add553f1eb79 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -475,51 +475,6 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg6 #include <linux/types.h> #include <linux/syscalls.h> -static inline pid_t setsid(void) -{ - return sys_setsid(); -} - -static inline long write(int fd, const char *buf, off_t count) -{ - return sys_write(fd, buf, count); -} - -static inline long read(int fd, char *buf, off_t count) -{ - return sys_read(fd, buf, count); -} - -static inline off_t lseek(int fd, off_t offset, int count) -{ - return sys_lseek(fd, offset, count); -} - -static inline long dup(int fd) -{ - return sys_dup(fd); -} - -static inline long open(const char *file, int flag, int mode) -{ - return sys_open(file, flag, mode); -} - -static inline long close(int fd) -{ - return sys_close(fd); -} - -static inline long _exit(int exitcode) -{ - return sys_exit(exitcode); -} - -static inline pid_t waitpid(pid_t pid, int *wait_stat, int options) -{ - return sys_wait4((int)pid, wait_stat, options, NULL); -} - extern long execve(const char *file, char **argv, char **envp); struct pt_regs; |
