diff options
| author | Ben Dooks <ben-linux@org.rmk.(none)> | 2004-09-05 19:58:44 +0100 |
|---|---|---|
| committer | Russell King <rmk@flint.arm.linux.org.uk> | 2004-09-05 19:58:44 +0100 |
| commit | 38afd9dd48ea74e2afa0036b679661b8d8096f5c (patch) | |
| tree | de97b0a542c2b2f32bebc64806626597e11e88e2 /include | |
| parent | cca8cd73ba04d11dc464e83c397bad436ef79272 (diff) | |
[ARM PATCH] 2029/1: S3C2410 - nand controller register definitions
Patch from Ben Dooks
NAND flash controller register definitions
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-nand.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-nand.h b/include/asm-arm/arch-s3c2410/regs-nand.h new file mode 100644 index 000000000000..c443ac834698 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/regs-nand.h @@ -0,0 +1,43 @@ +/* linux/include/asm-arm/arch-s3c2410/regs-nand.h + * + * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk> + * http://www.simtec.co.uk/products/SWLINUX/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2410 clock register definitions + * + * Changelog: + * 18-Aug-2004 BJD Copied file from 2.4 and updated +*/ + +#ifndef __ASM_ARM_REGS_NAND +#define __ASM_ARM_REGS_NAND "$Id: nand.h,v 1.3 2003/12/09 11:36:29 ben Exp $" + + +#define S3C2410_NFREG(x) (x) + +#define S3C2410_NFCONF S3C2410_NFREG(0x00) +#define S3C2410_NFCMD S3C2410_NFREG(0x04) +#define S3C2410_NFADDR S3C2410_NFREG(0x08) +#define S3C2410_NFDATA S3C2410_NFREG(0x0C) +#define S3C2410_NFSTAT S3C2410_NFREG(0x10) +#define S3C2410_NFECC S3C2410_NFREG(0x14) + +#define S3C2410_NFCONF_EN (1<<15) +#define S3C2410_NFCONF_512BYTE (1<<14) +#define S3C2410_NFCONF_4STEP (1<<13) +#define S3C2410_NFCONF_INITECC (1<<12) +#define S3C2410_NFCONF_nFCE (1<<11) +#define S3C2410_NFCONF_TACLS(x) ((x)<<8) +#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4) +#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0) + +#define S3C2410_NFSTAT_BUSY (1<<0) + +/* think ECC can only be 8bit read? */ + +#endif /* __ASM_ARM_REGS_NAND */ + |