diff options
| author | Greg Ungerer <gerg@snapgear.com> | 2003-05-25 07:36:24 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@home.transmeta.com> | 2003-05-25 07:36:24 -0700 |
| commit | 49c7f10cdf28c8acb72ac1dfb07bc31a17960f95 (patch) | |
| tree | b2dbba55a289cce2125ca0b572cea82b43f9996a /include | |
| parent | 5f1695e066817a76fbb6a0f6a2530eba451da2c8 (diff) | |
[PATCH] create SIM header definitions for ColdFire 5282
Create header definitions file to support the ColdFire 5282 CPU.
Unfortunately its register layout and setup is quite different
to previous ColdFire CPU family members.
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-m68knommu/m5282sim.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/include/asm-m68knommu/m5282sim.h b/include/asm-m68knommu/m5282sim.h new file mode 100644 index 000000000000..977a24fc3f4f --- /dev/null +++ b/include/asm-m68knommu/m5282sim.h @@ -0,0 +1,35 @@ +/****************************************************************************/ + +/* + * m5282sim.h -- ColdFire 5282 System Integration Module support. + * + * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com) + */ + +/****************************************************************************/ +#ifndef m5282sim_h +#define m5282sim_h +/****************************************************************************/ + +#include <linux/config.h> + +/* + * Define the 5282 SIM register set addresses. + */ +#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */ +#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 0 */ +#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ +#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ +#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ +#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ +#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ +#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ +#define MCFINTC_IRLR 0x18 /* */ +#define MCFINTC_IACKL 0x19 /* */ +#define MCFINTC_ICR0 0x40 /* Base ICR register */ + +#define MCFINT_UART0 13 /* Interrupt number for UART0 */ +#define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ + +/****************************************************************************/ +#endif /* m5282sim_h */ |