diff options
| author | David S. Miller <davem@nuts.ninka.net> | 2003-07-24 18:41:42 -0700 |
|---|---|---|
| committer | David S. Miller <davem@nuts.ninka.net> | 2003-07-24 18:41:42 -0700 |
| commit | 52a77587c29b6ba5a7e10eedc7ec9d570076ad1a (patch) | |
| tree | fc5b20376031db5e7dbc96f5f44f8cbbb258318a /include | |
| parent | 63eceba1e3a4fad6a346ba804d1b9be43898abb9 (diff) | |
[SPARC64]: Sanitize PCI controller handling to support Tomatillo better.
- Move varions controller datums into pbm structure.
- Add controller type/version/revision info to pbm structure.
- SCHIZO/TOMATILLO fixes:
- Treat PBM etc. register bases as PBM local.
- Use PBM prom node ranges property to figure out where
CFG/MEM/IO space physical bases are.
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-sparc64/pbm.h | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h index f3dc10516fdf..14e302f236e1 100644 --- a/include/asm-sparc64/pbm.h +++ b/include/asm-sparc64/pbm.h @@ -128,6 +128,25 @@ struct pci_pbm_info { /* PCI controller we sit under. */ struct pci_controller_info *parent; + /* Physical address base of controller registers. */ + unsigned long controller_regs; + + /* Physical address base of PBM registers. */ + unsigned long pbm_regs; + + /* Opaque 32-bit system bus Port ID. */ + u32 portid; + + /* Chipset version information. */ + int chip_type; +#define PBM_CHIP_TYPE_SABRE 1 +#define PBM_CHIP_TYPE_PSYCHO 2 +#define PBM_CHIP_TYPE_SCHIZO 3 +#define PBM_CHIP_TYPE_SCHIZO_PLUS 4 +#define PBM_CHIP_TYPE_TOMATILLO 5 + int chip_version; + int chip_revision; + /* Name used for top-level resources. */ char name[64]; @@ -170,12 +189,6 @@ struct pci_controller_info { /* List of all PCI controllers. */ struct pci_controller_info *next; - /* Physical address base of controller registers. */ - unsigned long controller_regs; - - /* Opaque 32-bit system bus Port ID. */ - u32 portid; - /* Each controller gets a unique index, used mostly for * error logging purposes. */ |