[ARM PATCH] 2363/1: IQ80332 platform port

Patch from Dave Jiang

Signed-off-by: Dave Jiang

This is the IQ80332 platform port that's based off the IOP33x CPU. The IQ80332 is an PCI-express CRB based off the IOP332 processor. Otherwise functionalites are fairly similar to IQ80331.
Signed-off-by: Russell King

5 files changed, 53 insertions, 4 deletions

diff --git a/include/asm-arm/arch-iop3xx/hardware.h b/include/asm-arm/arch-iop3xx/hardware.h
index 6c15fde86310..3b138171d086 100644
--- a/include/asm-arm/arch-iop3xx/hardware.h
+++ b/include/asm-arm/arch-iop3xx/hardware.h
@@ -52,5 +52,6 @@ extern unsigned int processor_id;
 #include "iq80321.h"
 #include "iq31244.h"
 #include "iq80331.h"
+#include "iq80332.h"
 
 #endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-iop3xx/iop331-irqs.h b/include/asm-arm/arch-iop3xx/iop331-irqs.h
index 37063b445e13..8ff73d487222 100644
--- a/include/asm-arm/arch-iop3xx/iop331-irqs.h
+++ b/include/asm-arm/arch-iop3xx/iop331-irqs.h
@@ -91,6 +91,7 @@
 #define NR_IRQS			NR_IOP331_IRQS
 
 
+#if defined(CONFIG_ARCH_IQ80331)
 /*
  * Interrupts available on the IQ80331 board
  */
@@ -110,4 +111,26 @@
 #define	IRQ_IQ80331_INTC	IRQ_IOP331_XINT2
 #define	IRQ_IQ80331_INTD	IRQ_IOP331_XINT3
 
+#elif defined(CONFIG_MACH_IQ80332)
+/*
+ * Interrupts available on the IQ80332 board
+ */
+
+/*
+ * On board devices
+ */
+#define	IRQ_IQ80332_I82544	IRQ_IOP331_XINT0
+#define IRQ_IQ80332_UART0	IRQ_IOP331_UART0
+#define IRQ_IQ80332_UART1	IRQ_IOP331_UART1
+
+/*
+ * PCI interrupts
+ */
+#define	IRQ_IQ80332_INTA	IRQ_IOP331_XINT0
+#define	IRQ_IQ80332_INTB	IRQ_IOP331_XINT1
+#define	IRQ_IQ80332_INTC	IRQ_IOP331_XINT2
+#define	IRQ_IQ80332_INTD	IRQ_IOP331_XINT3
+
+#endif
+
 #endif // _IOP331_IRQ_H_
diff --git a/include/asm-arm/arch-iop3xx/iq80332.h b/include/asm-arm/arch-iop3xx/iq80332.h
new file mode 100644
index 000000000000..e5fff1775d1a
--- /dev/null
+++ b/include/asm-arm/arch-iop3xx/iq80332.h
@@ -0,0 +1,23 @@
+/*
+ * linux/include/asm/arch-iop3xx/iq80332.h
+ *
+ * Intel IQ80332 evaluation board registers
+ */
+
+#ifndef _IQ80332_H_
+#define _IQ80332_H_
+
+#define	IQ80332_FLASHBASE	0xc0000000	/* Flash */
+#define	IQ80332_FLASHSIZE	0x00800000
+#define	IQ80332_FLASHWIDTH	1
+
+#define IQ80332_7SEG_1		0xce840000	/* 7-Segment MSB */
+#define IQ80332_7SEG_0		0xce850000	/* 7-Segment LSB (WO) */
+#define IQ80332_ROTARY_SW	0xce8d0000	/* Rotary Switch */
+#define IQ80332_BATT_STAT	0xce8f0000	/* Battery Status */
+
+#ifndef __ASSEMBLY__
+extern void iq80332_map_io(void);
+#endif
+
+#endif	// _IQ80332_H_
diff --git a/include/asm-arm/arch-iop3xx/timex.h b/include/asm-arm/arch-iop3xx/timex.h
index d9dbb443ca8c..d4187fe9a85a 100644
--- a/include/asm-arm/arch-iop3xx/timex.h
+++ b/include/asm-arm/arch-iop3xx/timex.h
@@ -10,7 +10,7 @@
 
 #define CLOCK_TICK_RATE IOP321_TICK_RATE
 
-#elif defined(CONFIG_ARCH_IQ80331)
+#elif defined(CONFIG_ARCH_IQ80331) || defined(CONFIG_MACH_IQ80332)
 
 #define CLOCK_TICK_RATE IOP331_TICK_RATE
 
diff --git a/include/asm-arm/arch-iop3xx/uncompress.h b/include/asm-arm/arch-iop3xx/uncompress.h
index 673fabc1f216..82b88762c3cc 100644
--- a/include/asm-arm/arch-iop3xx/uncompress.h
+++ b/include/asm-arm/arch-iop3xx/uncompress.h
@@ -9,8 +9,10 @@
 
 #ifdef CONFIG_ARCH_IOP321
 #define UTYPE unsigned char *
-#else
+#elif defined(CONFIG_ARCH_IOP331)
 #define UTYPE u32 *
+#else
+#error "Missing IOP3xx arch type def"
 #endif
 
 static volatile UTYPE uart_base;
@@ -42,8 +44,8 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
 			uart_base = (volatile UTYPE)IQ80321_UART;
 		else if(machine_is_iq31244())
 			uart_base = (volatile UTYPE)IQ31244_UART;
-		else if(machine_is_iq80331())
-			uart_base = (volatile UTYPE)IQ80331_UART0_PHYS;
+		else if(machine_is_iq80331() || machine_is_iq80332())
+			uart_base = (volatile UTYPE)IOP331_UART0_PHYS;
 		else
 			uart_base = (volatile UTYPE)0xfe800000;
 }