diff options
| author | James Simmons <jsimmons@kozmo.(none)> | 2003-04-09 16:15:57 -0700 |
|---|---|---|
| committer | James Simmons <jsimmons@kozmo.(none)> | 2003-04-09 16:15:57 -0700 |
| commit | 690271a6762ba5b5e6c3638c9e14ff3267b5d8de (patch) | |
| tree | ba49e65c772b4c07d56cc58a17cd92a56e92d647 /include | |
| parent | a92f10301ee7b59b01c1dc63c6957ec242aa21aa (diff) | |
| parent | 5edf8b9a4208987e60e0f41aff0bcc298641c0ad (diff) | |
Merge kozmo.(none):/usr/src/linus-2.5
into kozmo.(none):/usr/src/fbdev-2.5
Diffstat (limited to 'include')
126 files changed, 3260 insertions, 817 deletions
diff --git a/include/asm-alpha/mmzone.h b/include/asm-alpha/mmzone.h index d45af2ff9ae4..6edb9c64aa7b 100644 --- a/include/asm-alpha/mmzone.h +++ b/include/asm-alpha/mmzone.h @@ -51,7 +51,7 @@ PLAT_NODE_DATA_LOCALNR(unsigned long p, int n) #ifdef CONFIG_DISCONTIGMEM /* - * Following are macros that each numa implmentation must define. + * Following are macros that each numa implementation must define. */ /* diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h index 1e82bf33cb84..4b1f70ee3822 100644 --- a/include/asm-alpha/pci.h +++ b/include/asm-alpha/pci.h @@ -78,7 +78,7 @@ extern void *pci_alloc_consistent(struct pci_dev *, size_t, dma_addr_t *); /* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must be values that were returned from pci_alloc_consistent. SIZE must be the same as what as passed into pci_alloc_consistent. - References to the memory and mappings assosciated with CPU_ADDR or + References to the memory and mappings associated with CPU_ADDR or DMA_ADDR past this call are illegal. */ extern void pci_free_consistent(struct pci_dev *, size_t, void *, dma_addr_t); @@ -118,7 +118,7 @@ extern void pci_unmap_page(struct pci_dev *, dma_addr_t, size_t, int); (((PTR)->LEN_NAME) = (VAL)) /* Map a set of buffers described by scatterlist in streaming mode for - PCI DMA. This is the scather-gather version of the above + PCI DMA. This is the scatter-gather version of the above pci_map_single interface. Here the scatter gather list elements are each tagged with the appropriate PCI dma address and length. They are obtained via sg_dma_{address,length}(SG). diff --git a/include/asm-alpha/uaccess.h b/include/asm-alpha/uaccess.h index a5985281aa7f..e204cd592e90 100644 --- a/include/asm-alpha/uaccess.h +++ b/include/asm-alpha/uaccess.h @@ -31,7 +31,7 @@ /* - * Is a address valid? This does a straighforward calculation rather + * Is a address valid? This does a straightforward calculation rather * than tests. * * Address valid if: diff --git a/include/asm-generic/siginfo.h b/include/asm-generic/siginfo.h index ddb85a2c7613..209ba0222647 100644 --- a/include/asm-generic/siginfo.h +++ b/include/asm-generic/siginfo.h @@ -106,7 +106,7 @@ typedef struct siginfo { #define si_fd _sifields._sigpoll._fd #ifdef __KERNEL__ -#define __SI_MASK 0xffff0000 +#define __SI_MASK 0xffff0000u #define __SI_KILL (0 << 16) #define __SI_TIMER (1 << 16) #define __SI_POLL (2 << 16) @@ -275,7 +275,7 @@ static inline void copy_siginfo(struct siginfo *to, struct siginfo *from) #endif -extern int copy_siginfo_to_user(struct siginfo *to, struct siginfo *from); +extern int copy_siginfo_to_user(struct siginfo __user *to, struct siginfo *from); #endif /* __KERNEL__ */ diff --git a/include/asm-i386/i387.h b/include/asm-i386/i387.h index 805f297e0514..c45379bf28f7 100644 --- a/include/asm-i386/i387.h +++ b/include/asm-i386/i387.h @@ -81,8 +81,8 @@ extern void set_fpu_mxcsr( struct task_struct *tsk, unsigned short mxcsr ); /* * Signal frame handlers... */ -extern int save_i387( struct _fpstate *buf ); -extern int restore_i387( struct _fpstate *buf ); +extern int save_i387( struct _fpstate __user *buf ); +extern int restore_i387( struct _fpstate __user *buf ); /* * ptrace request handers... diff --git a/include/asm-i386/mach-default/apm.h b/include/asm-i386/mach-default/apm.h new file mode 100644 index 000000000000..1f730b8bd1fd --- /dev/null +++ b/include/asm-i386/mach-default/apm.h @@ -0,0 +1,75 @@ +/* + * include/asm-i386/mach-default/apm.h + * + * Machine specific APM BIOS functions for generic. + * Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp> + */ + +#ifndef _ASM_APM_H +#define _ASM_APM_H + +#ifdef APM_ZERO_SEGS +# define APM_DO_ZERO_SEGS \ + "pushl %%ds\n\t" \ + "pushl %%es\n\t" \ + "xorl %%edx, %%edx\n\t" \ + "mov %%dx, %%ds\n\t" \ + "mov %%dx, %%es\n\t" \ + "mov %%dx, %%fs\n\t" \ + "mov %%dx, %%gs\n\t" +# define APM_DO_POP_SEGS \ + "popl %%es\n\t" \ + "popl %%ds\n\t" +#else +# define APM_DO_ZERO_SEGS +# define APM_DO_POP_SEGS +#endif + +static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in, + u32 *eax, u32 *ebx, u32 *ecx, + u32 *edx, u32 *esi) +{ + /* + * N.B. We do NOT need a cld after the BIOS call + * because we always save and restore the flags. + */ + __asm__ __volatile__(APM_DO_ZERO_SEGS + "pushl %%edi\n\t" + "pushl %%ebp\n\t" + "lcall *%%cs:apm_bios_entry\n\t" + "setc %%al\n\t" + "popl %%ebp\n\t" + "popl %%edi\n\t" + APM_DO_POP_SEGS + : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx), + "=S" (*esi) + : "a" (func), "b" (ebx_in), "c" (ecx_in) + : "memory", "cc"); +} + +static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in, + u32 ecx_in, u32 *eax) +{ + int cx, dx, si; + u8 error; + + /* + * N.B. We do NOT need a cld after the BIOS call + * because we always save and restore the flags. + */ + __asm__ __volatile__(APM_DO_ZERO_SEGS + "pushl %%edi\n\t" + "pushl %%ebp\n\t" + "lcall *%%cs:apm_bios_entry\n\t" + "setc %%bl\n\t" + "popl %%ebp\n\t" + "popl %%edi\n\t" + APM_DO_POP_SEGS + : "=a" (*eax), "=b" (error), "=c" (cx), "=d" (dx), + "=S" (si) + : "a" (func), "b" (ebx_in), "c" (ecx_in) + : "memory", "cc"); + return error; +} + +#endif /* _ASM_APM_H */ diff --git a/include/asm-i386/mach-default/bios_ebda.h b/include/asm-i386/mach-default/bios_ebda.h new file mode 100644 index 000000000000..9cbd9a668af8 --- /dev/null +++ b/include/asm-i386/mach-default/bios_ebda.h @@ -0,0 +1,15 @@ +#ifndef _MACH_BIOS_EBDA_H +#define _MACH_BIOS_EBDA_H + +/* + * there is a real-mode segmented pointer pointing to the + * 4K EBDA area at 0x40E. + */ +static inline unsigned int get_bios_ebda(void) +{ + unsigned int address = *(unsigned short *)phys_to_virt(0x40E); + address <<= 4; + return address; /* 0 means none */ +} + +#endif /* _MACH_BIOS_EBDA_H */ diff --git a/include/asm-i386/mach-default/io_ports.h b/include/asm-i386/mach-default/io_ports.h new file mode 100644 index 000000000000..a96d9f6604ee --- /dev/null +++ b/include/asm-i386/mach-default/io_ports.h @@ -0,0 +1,30 @@ +/* + * arch/i386/mach-generic/io_ports.h + * + * Machine specific IO port address definition for generic. + * Written by Osamu Tomita <tomita@cinet.co.jp> + */ +#ifndef _MACH_IO_PORTS_H +#define _MACH_IO_PORTS_H + +/* i8253A PIT registers */ +#define PIT_MODE 0x43 +#define PIT_CH0 0x40 +#define PIT_CH2 0x42 + +/* i8259A PIC registers */ +#define PIC_MASTER_CMD 0x20 +#define PIC_MASTER_IMR 0x21 +#define PIC_MASTER_ISR PIC_MASTER_CMD +#define PIC_MASTER_POLL PIC_MASTER_ISR +#define PIC_MASTER_OCW3 PIC_MASTER_ISR +#define PIC_SLAVE_CMD 0xa0 +#define PIC_SLAVE_IMR 0xa1 + +/* i8259A PIC related value */ +#define PIC_CASCADE_IR 2 +#define MASTER_ICW4_DEFAULT 0x01 +#define SLAVE_ICW4_DEFAULT 0x01 +#define PIC_ICW4_AEOI 2 + +#endif /* !_MACH_IO_PORTS_H */ diff --git a/include/asm-i386/mach-default/irq_vectors.h b/include/asm-i386/mach-default/irq_vectors.h index 6963e978ffae..df6191450ed5 100644 --- a/include/asm-i386/mach-default/irq_vectors.h +++ b/include/asm-i386/mach-default/irq_vectors.h @@ -82,4 +82,11 @@ #define NR_IRQS 16 #endif +#define FPU_IRQ 13 + +#define FIRST_VM86_IRQ 3 +#define LAST_VM86_IRQ 15 +#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) + + #endif /* _ASM_IRQ_VECTORS_H */ diff --git a/include/asm-i386/mach-default/mach_mpparse.h b/include/asm-i386/mach-default/mach_mpparse.h index 03b5851506f2..3b399a3bcd11 100644 --- a/include/asm-i386/mach-default/mach_mpparse.h +++ b/include/asm-i386/mach-default/mach_mpparse.h @@ -4,7 +4,7 @@ static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, struct mpc_config_translation *translation) { - Dprintk("Bus #%d is %s\n", m->mpc_busid, name); +// Dprintk("Bus #%d is %s\n", m->mpc_busid, name); } static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, diff --git a/include/asm-i386/mach-default/mach_resources.h b/include/asm-i386/mach-default/mach_resources.h new file mode 100644 index 000000000000..2b0eadaaca20 --- /dev/null +++ b/include/asm-i386/mach-default/mach_resources.h @@ -0,0 +1,110 @@ +/* + * include/asm-i386/mach-default/mach_resources.h + * + * Machine specific resource allocation for generic. + * Split out from setup.c by Osamu Tomita <tomita@cinet.co.jp> + */ +#ifndef _MACH_RESOURCES_H +#define _MACH_RESOURCES_H + +struct resource standard_io_resources[] = { + { "dma1", 0x00, 0x1f, IORESOURCE_BUSY }, + { "pic1", 0x20, 0x3f, IORESOURCE_BUSY }, + { "timer", 0x40, 0x5f, IORESOURCE_BUSY }, + { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY }, + { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY }, + { "pic2", 0xa0, 0xbf, IORESOURCE_BUSY }, + { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY }, + { "fpu", 0xf0, 0xff, IORESOURCE_BUSY } +}; +#ifdef CONFIG_MELAN +standard_io_resources[1] = { "pic1", 0x20, 0x21, IORESOURCE_BUSY }; +standard_io_resources[5] = { "pic2", 0xa0, 0xa1, IORESOURCE_BUSY }; +#endif + +#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) + +static struct resource vram_resource = { "Video RAM area", 0xa0000, 0xbffff, IORESOURCE_BUSY }; + +/* System ROM resources */ +#define MAXROMS 6 +static struct resource rom_resources[MAXROMS] = { + { "System ROM", 0xF0000, 0xFFFFF, IORESOURCE_BUSY }, + { "Video ROM", 0xc0000, 0xc7fff, IORESOURCE_BUSY } +}; + +#define romsignature(x) (*(unsigned short *)(x) == 0xaa55) + +static inline void probe_video_rom(int roms) +{ + unsigned long base; + unsigned char *romstart; + + + /* Video ROM is standard at C000:0000 - C7FF:0000, check signature */ + for (base = 0xC0000; base < 0xE0000; base += 2048) { + romstart = isa_bus_to_virt(base); + if (!romsignature(romstart)) + continue; + request_resource(&iomem_resource, rom_resources + roms); + roms++; + break; + } +} + +static inline void probe_extension_roms(int roms) +{ + unsigned long base; + unsigned char *romstart; + + /* Extension roms at C800:0000 - DFFF:0000 */ + for (base = 0xC8000; base < 0xE0000; base += 2048) { + unsigned long length; + + romstart = isa_bus_to_virt(base); + if (!romsignature(romstart)) + continue; + length = romstart[2] * 512; + if (length) { + unsigned int i; + unsigned char chksum; + + chksum = 0; + for (i = 0; i < length; i++) + chksum += romstart[i]; + + /* Good checksum? */ + if (!chksum) { + rom_resources[roms].start = base; + rom_resources[roms].end = base + length - 1; + rom_resources[roms].name = "Extension ROM"; + rom_resources[roms].flags = IORESOURCE_BUSY; + + request_resource(&iomem_resource, rom_resources + roms); + roms++; + if (roms >= MAXROMS) + return; + } + } + } + + /* Final check for motherboard extension rom at E000:0000 */ + base = 0xE0000; + romstart = isa_bus_to_virt(base); + + if (romsignature(romstart)) { + rom_resources[roms].start = base; + rom_resources[roms].end = base + 65535; + rom_resources[roms].name = "Extension ROM"; + rom_resources[roms].flags = IORESOURCE_BUSY; + + request_resource(&iomem_resource, rom_resources + roms); + } +} + +static inline void request_graphics_resource(void) +{ + request_resource(&iomem_resource, &vram_resource); +} + +#endif /* !_MACH_RESOURCES_H */ diff --git a/include/asm-i386/mach-default/mach_time.h b/include/asm-i386/mach-default/mach_time.h new file mode 100644 index 000000000000..b749aa44a86f --- /dev/null +++ b/include/asm-i386/mach-default/mach_time.h @@ -0,0 +1,122 @@ +/* + * include/asm-i386/mach-default/mach_time.h + * + * Machine specific set RTC function for generic. + * Split out from time.c by Osamu Tomita <tomita@cinet.co.jp> + */ +#ifndef _MACH_TIME_H +#define _MACH_TIME_H + +#include <linux/mc146818rtc.h> + +/* for check timing call set_rtc_mmss() 500ms */ +/* used in arch/i386/time.c::do_timer_interrupt() */ +#define USEC_AFTER 500000 +#define USEC_BEFORE 500000 + +/* + * In order to set the CMOS clock precisely, set_rtc_mmss has to be + * called 500 ms after the second nowtime has started, because when + * nowtime is written into the registers of the CMOS clock, it will + * jump to the next second precisely 500 ms later. Check the Motorola + * MC146818A or Dallas DS12887 data sheet for details. + * + * BUG: This routine does not handle hour overflow properly; it just + * sets the minutes. Usually you'll only notice that after reboot! + */ +static inline int mach_set_rtc_mmss(unsigned long nowtime) +{ + int retval = 0; + int real_seconds, real_minutes, cmos_minutes; + unsigned char save_control, save_freq_select; + + save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */ + CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); + + save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */ + CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); + + cmos_minutes = CMOS_READ(RTC_MINUTES); + if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) + BCD_TO_BIN(cmos_minutes); + + /* + * since we're only adjusting minutes and seconds, + * don't interfere with hour overflow. This avoids + * messing with unknown time zones but requires your + * RTC not to be off by more than 15 minutes + */ + real_seconds = nowtime % 60; + real_minutes = nowtime / 60; + if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) + real_minutes += 30; /* correct for half hour time zone */ + real_minutes %= 60; + + if (abs(real_minutes - cmos_minutes) < 30) { + if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { + BIN_TO_BCD(real_seconds); + BIN_TO_BCD(real_minutes); + } + CMOS_WRITE(real_seconds,RTC_SECONDS); + CMOS_WRITE(real_minutes,RTC_MINUTES); + } else { + printk(KERN_WARNING + "set_rtc_mmss: can't update from %d to %d\n", + cmos_minutes, real_minutes); + retval = -1; + } + + /* The following flags have to be released exactly in this order, + * otherwise the DS12887 (popular MC146818A clone with integrated + * battery and quartz) will not reset the oscillator and will not + * update precisely 500 ms later. You won't find this mentioned in + * the Dallas Semiconductor data sheets, but who believes data + * sheets anyway ... -- Markus Kuhn + */ + CMOS_WRITE(save_control, RTC_CONTROL); + CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); + + return retval; +} + +static inline unsigned long mach_get_cmos_time(void) +{ + unsigned int year, mon, day, hour, min, sec; + int i; + + /* The Linux interpretation of the CMOS clock register contents: + * When the Update-In-Progress (UIP) flag goes from 1 to 0, the + * RTC registers show the second which has precisely just started. + * Let's hope other operating systems interpret the RTC the same way. + */ + /* read RTC exactly on falling edge of update flag */ + for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */ + if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) + break; + for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */ + if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) + break; + do { /* Isn't this overkill ? UIP above should guarantee consistency */ + sec = CMOS_READ(RTC_SECONDS); + min = CMOS_READ(RTC_MINUTES); + hour = CMOS_READ(RTC_HOURS); + day = CMOS_READ(RTC_DAY_OF_MONTH); + mon = CMOS_READ(RTC_MONTH); + year = CMOS_READ(RTC_YEAR); + } while (sec != CMOS_READ(RTC_SECONDS)); + if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) + { + BCD_TO_BIN(sec); + BCD_TO_BIN(min); + BCD_TO_BIN(hour); + BCD_TO_BIN(day); + BCD_TO_BIN(mon); + BCD_TO_BIN(year); + } + if ((year += 1900) < 1970) + year += 100; + + return mktime(year, mon, day, hour, min, sec); +} + +#endif /* !_MACH_TIME_H */ diff --git a/include/asm-i386/mach-default/mach_timer.h b/include/asm-i386/mach-default/mach_timer.h new file mode 100644 index 000000000000..895e0779d7ea --- /dev/null +++ b/include/asm-i386/mach-default/mach_timer.h @@ -0,0 +1,47 @@ +/* + * include/asm-i386/mach-default/mach_timer.h + * + * Machine specific calibrate_tsc() for generic. + * Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp> + */ +/* ------ Calibrate the TSC ------- + * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset(). + * Too much 64-bit arithmetic here to do this cleanly in C, and for + * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2) + * output busy loop as low as possible. We avoid reading the CTC registers + * directly because of the awkward 8-bit access mechanism of the 82C54 + * device. + */ +#ifndef _MACH_TIMER_H +#define _MACH_TIMER_H + +#define CALIBRATE_LATCH (5 * LATCH) + +static inline void mach_prepare_counter(void) +{ + /* Set the Gate high, disable speaker */ + outb((inb(0x61) & ~0x02) | 0x01, 0x61); + + /* + * Now let's take care of CTC channel 2 + * + * Set the Gate high, program CTC channel 2 for mode 0, + * (interrupt on terminal count mode), binary count, + * load 5 * LATCH count, (LSB and MSB) to begin countdown. + * + * Some devices need a delay here. + */ + outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */ + outb_p(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */ + outb_p(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */ +} + +static inline void mach_countup(unsigned long *count) +{ + *count = 0L; + do { + *count++; + } while ((inb_p(0x61) & 0x20) == 0); +} + +#endif /* !_MACH_TIMER_H */ diff --git a/include/asm-i386/mach-default/mach_traps.h b/include/asm-i386/mach-default/mach_traps.h new file mode 100644 index 000000000000..c98c2880c5c9 --- /dev/null +++ b/include/asm-i386/mach-default/mach_traps.h @@ -0,0 +1,29 @@ +/* + * include/asm-i386/mach-default/mach_traps.h + * + * Machine specific NMI handling for generic. + * Split out from traps.c by Osamu Tomita <tomita@cinet.co.jp> + */ +#ifndef _MACH_TRAPS_H +#define _MACH_TRAPS_H + +static inline void clear_mem_error(unsigned char reason) +{ + reason = (reason & 0xf) | 4; + outb(reason, 0x61); +} + +static inline unsigned char get_nmi_reason(void) +{ + return inb(0x61); +} + +static inline void reassert_nmi(void) +{ + outb(0x8f, 0x70); + inb(0x71); /* dummy */ + outb(0x0f, 0x70); + inb(0x71); /* dummy */ +} + +#endif /* !_MACH_TRAPS_H */ diff --git a/include/asm-i386/mach-default/smpboot_hooks.h b/include/asm-i386/mach-default/smpboot_hooks.h index 868a41933c68..7f45f6311059 100644 --- a/include/asm-i386/mach-default/smpboot_hooks.h +++ b/include/asm-i386/mach-default/smpboot_hooks.h @@ -6,7 +6,18 @@ static inline void smpboot_clear_io_apic_irqs(void) io_apic_irqs = 0; } -static inline void smpboot_setup_warm_reset_vector(void) +static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) +{ + CMOS_WRITE(0xa, 0xf); + local_flush_tlb(); + Dprintk("1.\n"); + *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; + Dprintk("2.\n"); + *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; + Dprintk("3.\n"); +} + +static inline void smpboot_restore_warm_reset_vector(void) { /* * Install writable page 0 entry to set BIOS data area. diff --git a/include/asm-i386/mach-pc9800/apm.h b/include/asm-i386/mach-pc9800/apm.h new file mode 100644 index 000000000000..54a8ab20b052 --- /dev/null +++ b/include/asm-i386/mach-pc9800/apm.h @@ -0,0 +1,82 @@ +/* + * include/asm-i386/mach-pc9800/apm.h + * + * Machine specific APM BIOS functions for NEC PC9800. + * Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp> + */ + +#ifndef _ASM_APM_H +#define _ASM_APM_H + +#include <linux/apm_bios.h> + +#ifdef APM_ZERO_SEGS +# define APM_DO_ZERO_SEGS \ + "pushl %%ds\n\t" \ + "pushl %%es\n\t" \ + "xorl %%edx, %%edx\n\t" \ + "mov %%dx, %%ds\n\t" \ + "mov %%dx, %%es\n\t" \ + "mov %%dx, %%fs\n\t" \ + "mov %%dx, %%gs\n\t" +# define APM_DO_POP_SEGS \ + "popl %%es\n\t" \ + "popl %%ds\n\t" +#else +# define APM_DO_ZERO_SEGS +# define APM_DO_POP_SEGS +#endif + +static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in, + u32 *eax, u32 *ebx, u32 *ecx, + u32 *edx, u32 *esi) +{ + /* + * N.B. We do NOT need a cld after the BIOS call + * because we always save and restore the flags. + */ + __asm__ __volatile__(APM_DO_ZERO_SEGS + "pushl %%edi\n\t" + "pushl %%ebp\n\t" + "pushfl\n\t" + "lcall *%%cs:apm_bios_entry\n\t" + "setc %%al\n\t" + "popl %%ebp\n\t" + "popl %%edi\n\t" + APM_DO_POP_SEGS + : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx), + "=S" (*esi) + : "a" (func), "b" (ebx_in), "c" (ecx_in) + : "memory", "cc"); +} + +static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in, + u32 ecx_in, u32 *eax) +{ + int cx, dx, si; + u8 error; + + /* + * N.B. We do NOT need a cld after the BIOS call + * because we always save and restore the flags. + */ + __asm__ __volatile__(APM_DO_ZERO_SEGS + "pushl %%edi\n\t" + "pushl %%ebp\n\t" + "pushfl\n\t" + "lcall *%%cs:apm_bios_entry\n\t" + "setc %%bl\n\t" + "popl %%ebp\n\t" + "popl %%edi\n\t" + APM_DO_POP_SEGS + : "=a" (*eax), "=b" (error), "=c" (cx), "=d" (dx), + "=S" (si) + : "a" (func), "b" (ebx_in), "c" (ecx_in) + : "memory", "cc"); + if (func == APM_FUNC_VERSION) + *eax = (*eax & 0xff00) | ((*eax & 0x00f0) >> 4); + + return error; +} + +#endif /* _ASM_APM_H */ diff --git a/include/asm-i386/mach-pc9800/bios_ebda.h b/include/asm-i386/mach-pc9800/bios_ebda.h new file mode 100644 index 000000000000..4e9e064f8eb5 --- /dev/null +++ b/include/asm-i386/mach-pc9800/bios_ebda.h @@ -0,0 +1,14 @@ +#ifndef _MACH_BIOS_EBDA_H +#define _MACH_BIOS_EBDA_H + +/* + * PC-9800 has no EBDA. + * Its BIOS uses 0x40E for other purpose, + * Not pointer to 4K EBDA area. + */ +static inline unsigned int get_bios_ebda(void) +{ + return 0; /* 0 means none */ +} + +#endif /* _MACH_BIOS_EBDA_H */ diff --git a/include/asm-i386/mach-pc9800/do_timer.h b/include/asm-i386/mach-pc9800/do_timer.h new file mode 100644 index 000000000000..0aefe08c9fcb --- /dev/null +++ b/include/asm-i386/mach-pc9800/do_timer.h @@ -0,0 +1,82 @@ +/* defines for inline arch setup functions */ + +#include <asm/apic.h> + +/** + * do_timer_interrupt_hook - hook into timer tick + * @regs: standard registers from interrupt + * + * Description: + * This hook is called immediately after the timer interrupt is ack'd. + * It's primary purpose is to allow architectures that don't possess + * individual per CPU clocks (like the CPU APICs supply) to broadcast the + * timer interrupt as a means of triggering reschedules etc. + **/ + +static inline void do_timer_interrupt_hook(struct pt_regs *regs) +{ + do_timer(regs); +/* + * In the SMP case we use the local APIC timer interrupt to do the + * profiling, except when we simulate SMP mode on a uniprocessor + * system, in that case we have to call the local interrupt handler. + */ +#ifndef CONFIG_X86_LOCAL_APIC + x86_do_profile(regs); +#else + if (!using_apic_timer) + smp_local_timer_interrupt(regs); +#endif +} + + +/* you can safely undefine this if you don't have the Neptune chipset */ + +#define BUGGY_NEPTUN_TIMER + +/** + * do_timer_overflow - process a detected timer overflow condition + * @count: hardware timer interrupt count on overflow + * + * Description: + * This call is invoked when the jiffies count has not incremented but + * the hardware timer interrupt has. It means that a timer tick interrupt + * came along while the previous one was pending, thus a tick was missed + **/ +static inline int do_timer_overflow(int count) +{ + int i; + + spin_lock(&i8259A_lock); + /* + * This is tricky when I/O APICs are used; + * see do_timer_interrupt(). + */ + i = inb(0x00); + spin_unlock(&i8259A_lock); + + /* assumption about timer being IRQ0 */ + if (i & 0x01) { + /* + * We cannot detect lost timer interrupts ... + * well, that's why we call them lost, don't we? :) + * [hmm, on the Pentium and Alpha we can ... sort of] + */ + count -= LATCH; + } else { +#ifdef BUGGY_NEPTUN_TIMER + /* + * for the Neptun bug we know that the 'latch' + * command doesn't latch the high and low value + * of the counter atomically. Thus we have to + * substract 256 from the counter + * ... funny, isnt it? :) + */ + + count -= 256; +#else + printk("do_slow_gettimeoffset(): hardware timer problem?\n"); +#endif + } + return count; +} diff --git a/include/asm-i386/mach-pc9800/io_ports.h b/include/asm-i386/mach-pc9800/io_ports.h new file mode 100644 index 000000000000..4e6074238c4b --- /dev/null +++ b/include/asm-i386/mach-pc9800/io_ports.h @@ -0,0 +1,30 @@ +/* + * arch/i386/mach-pc9800/io_ports.h + * + * Machine specific IO port address definition for PC-9800. + * Written by Osamu Tomita <tomita@cinet.co.jp> + */ +#ifndef _MACH_IO_PORTS_H +#define _MACH_IO_PORTS_H + +/* i8253A PIT registers */ +#define PIT_MODE 0x77 +#define PIT_CH0 0x71 +#define PIT_CH2 0x75 + +/* i8259A PIC registers */ +#define PIC_MASTER_CMD 0x00 +#define PIC_MASTER_IMR 0x02 +#define PIC_MASTER_ISR PIC_MASTER_CMD +#define PIC_MASTER_POLL PIC_MASTER_ISR +#define PIC_MASTER_OCW3 PIC_MASTER_ISR +#define PIC_SLAVE_CMD 0x08 +#define PIC_SLAVE_IMR 0x0a + +/* i8259A PIC related values */ +#define PIC_CASCADE_IR 7 +#define MASTER_ICW4_DEFAULT 0x1d +#define SLAVE_ICW4_DEFAULT 0x09 +#define PIC_ICW4_AEOI 0x02 + +#endif /* !_MACH_IO_PORTS_H */ diff --git a/include/asm-i386/mach-pc9800/irq_vectors.h b/include/asm-i386/mach-pc9800/irq_vectors.h new file mode 100644 index 000000000000..1b05918fb7e6 --- /dev/null +++ b/include/asm-i386/mach-pc9800/irq_vectors.h @@ -0,0 +1,93 @@ +/* + * This file should contain #defines for all of the interrupt vector + * numbers used by this architecture. + * + * In addition, there are some standard defines: + * + * FIRST_EXTERNAL_VECTOR: + * The first free place for external interrupts + * + * SYSCALL_VECTOR: + * The IRQ vector a syscall makes the user to kernel transition + * under. + * + * TIMER_IRQ: + * The IRQ number the timer interrupt comes in at. + * + * NR_IRQS: + * The total number of interrupt vectors (including all the + * architecture specific interrupts) needed. + * + */ +#ifndef _ASM_IRQ_VECTORS_H +#define _ASM_IRQ_VECTORS_H + +/* + * IDT vectors usable for external interrupt sources start + * at 0x20: + */ +#define FIRST_EXTERNAL_VECTOR 0x20 + +#define SYSCALL_VECTOR 0x80 + +/* + * Vectors 0x20-0x2f are used for ISA interrupts. + */ + +/* + * Special IRQ vectors used by the SMP architecture, 0xf0-0xff + * + * some of the following vectors are 'rare', they are merged + * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. + * TLB, reschedule and local APIC vectors are performance-critical. + * + * Vectors 0xf0-0xfa are free (reserved for future Linux use). + */ +#define SPURIOUS_APIC_VECTOR 0xff +#define ERROR_APIC_VECTOR 0xfe +#define INVALIDATE_TLB_VECTOR 0xfd +#define RESCHEDULE_VECTOR 0xfc +#define CALL_FUNCTION_VECTOR 0xfb + +#define THERMAL_APIC_VECTOR 0xf0 +/* + * Local APIC timer IRQ vector is on a different priority level, + * to work around the 'lost local interrupt if more than 2 IRQ + * sources per level' errata. + */ +#define LOCAL_TIMER_VECTOR 0xef + +/* + * First APIC vector available to drivers: (vectors 0x30-0xee) + * we start at 0x31 to spread out vectors evenly between priority + * levels. (0x80 is the syscall vector) + */ +#define FIRST_DEVICE_VECTOR 0x31 +#define FIRST_SYSTEM_VECTOR 0xef + +#define TIMER_IRQ 0 + +/* + * 16 8259A IRQ's, 208 potential APIC interrupt sources. + * Right now the APIC is mostly only used for SMP. + * 256 vectors is an architectural limit. (we can have + * more than 256 devices theoretically, but they will + * have to use shared interrupts) + * Since vectors 0x00-0x1f are used/reserved for the CPU, + * the usable vector space is 0x20-0xff (224 vectors) + */ +#ifdef CONFIG_X86_IO_APIC +#define NR_IRQS 224 +#else +#define NR_IRQS 16 +#endif + +#define FPU_IRQ 8 + +#define FIRST_VM86_IRQ 2 +#define LAST_VM86_IRQ 15 +#define invalid_vm86_irq(irq) ((irq) < 2 || (irq) == 7 || (irq) > 15) + +#endif /* _ASM_IRQ_VECTORS_H */ + + diff --git a/include/asm-i386/mach-pc9800/mach_resources.h b/include/asm-i386/mach-pc9800/mach_resources.h new file mode 100644 index 000000000000..bf1b2c470aec --- /dev/null +++ b/include/asm-i386/mach-pc9800/mach_resources.h @@ -0,0 +1,191 @@ +/* + * include/asm-i386/mach-pc9800/mach_resources.h + * + * Machine specific resource allocation for PC-9800. + * Written by Osamu Tomita <tomita@cinet.co.jp> + */ +#ifndef _MACH_RESOURCES_H +#define _MACH_RESOURCES_H + +static char str_pic1[] = "pic1"; +static char str_dma[] = "dma"; +static char str_pic2[] = "pic2"; +static char str_calender_clock[] = "calender clock"; +static char str_system[] = "system"; +static char str_nmi_control[] = "nmi control"; +static char str_kanji_rom[] = "kanji rom"; +static char str_keyboard[] = "keyboard"; +static char str_text_gdc[] = "text gdc"; +static char str_crtc[] = "crtc"; +static char str_timer[] = "timer"; +static char str_graphic_gdc[] = "graphic gdc"; +static char str_dma_ex_bank[] = "dma ex. bank"; +static char str_beep_freq[] = "beep freq."; +static char str_mouse_pio[] = "mouse pio"; +struct resource standard_io_resources[] = { + { str_pic1, 0x00, 0x00, IORESOURCE_BUSY }, + { str_dma, 0x01, 0x01, IORESOURCE_BUSY }, + { str_pic1, 0x02, 0x02, IORESOURCE_BUSY }, + { str_dma, 0x03, 0x03, IORESOURCE_BUSY }, + { str_dma, 0x05, 0x05, IORESOURCE_BUSY }, + { str_dma, 0x07, 0x07, IORESOURCE_BUSY }, + { str_pic2, 0x08, 0x08, IORESOURCE_BUSY }, + { str_dma, 0x09, 0x09, IORESOURCE_BUSY }, + { str_pic2, 0x0a, 0x0a, IORESOURCE_BUSY }, + { str_dma, 0x0b, 0x0b, IORESOURCE_BUSY }, + { str_dma, 0x0d, 0x0d, IORESOURCE_BUSY }, + { str_dma, 0x0f, 0x0f, IORESOURCE_BUSY }, + { str_dma, 0x11, 0x11, IORESOURCE_BUSY }, + { str_dma, 0x13, 0x13, IORESOURCE_BUSY }, + { str_dma, 0x15, 0x15, IORESOURCE_BUSY }, + { str_dma, 0x17, 0x17, IORESOURCE_BUSY }, + { str_dma, 0x19, 0x19, IORESOURCE_BUSY }, + { str_dma, 0x1b, 0x1b, IORESOURCE_BUSY }, + { str_dma, 0x1d, 0x1d, IORESOURCE_BUSY }, + { str_dma, 0x1f, 0x1f, IORESOURCE_BUSY }, + { str_calender_clock, 0x20, 0x20, 0 }, + { str_dma, 0x21, 0x21, IORESOURCE_BUSY }, + { str_calender_clock, 0x22, 0x22, 0 }, + { str_dma, 0x23, 0x23, IORESOURCE_BUSY }, + { str_dma, 0x25, 0x25, IORESOURCE_BUSY }, + { str_dma, 0x27, 0x27, IORESOURCE_BUSY }, + { str_dma, 0x29, 0x29, IORESOURCE_BUSY }, + { str_dma, 0x2b, 0x2b, IORESOURCE_BUSY }, + { str_dma, 0x2d, 0x2d, IORESOURCE_BUSY }, + { str_system, 0x31, 0x31, IORESOURCE_BUSY }, + { str_system, 0x33, 0x33, IORESOURCE_BUSY }, + { str_system, 0x35, 0x35, IORESOURCE_BUSY }, + { str_system, 0x37, 0x37, IORESOURCE_BUSY }, + { str_nmi_control, 0x50, 0x50, IORESOURCE_BUSY }, + { str_nmi_control, 0x52, 0x52, IORESOURCE_BUSY }, + { "time stamp", 0x5c, 0x5f, IORESOURCE_BUSY }, + { str_kanji_rom, 0xa1, 0xa1, IORESOURCE_BUSY }, + { str_kanji_rom, 0xa3, 0xa3, IORESOURCE_BUSY }, + { str_kanji_rom, 0xa5, 0xa5, IORESOURCE_BUSY }, + { str_kanji_rom, 0xa7, 0xa7, IORESOURCE_BUSY }, + { str_kanji_rom, 0xa9, 0xa9, IORESOURCE_BUSY }, + { str_keyboard, 0x41, 0x41, IORESOURCE_BUSY }, + { str_keyboard, 0x43, 0x43, IORESOURCE_BUSY }, + { str_text_gdc, 0x60, 0x60, IORESOURCE_BUSY }, + { str_text_gdc, 0x62, 0x62, IORESOURCE_BUSY }, + { str_text_gdc, 0x64, 0x64, IORESOURCE_BUSY }, + { str_text_gdc, 0x66, 0x66, IORESOURCE_BUSY }, + { str_text_gdc, 0x68, 0x68, IORESOURCE_BUSY }, + { str_text_gdc, 0x6a, 0x6a, IORESOURCE_BUSY }, + { str_text_gdc, 0x6c, 0x6c, IORESOURCE_BUSY }, + { str_text_gdc, 0x6e, 0x6e, IORESOURCE_BUSY }, + { str_crtc, 0x70, 0x70, IORESOURCE_BUSY }, + { str_crtc, 0x72, 0x72, IORESOURCE_BUSY }, + { str_crtc, 0x74, 0x74, IORESOURCE_BUSY }, + { str_crtc, 0x74, 0x74, IORESOURCE_BUSY }, + { str_crtc, 0x76, 0x76, IORESOURCE_BUSY }, + { str_crtc, 0x78, 0x78, IORESOURCE_BUSY }, + { str_crtc, 0x7a, 0x7a, IORESOURCE_BUSY }, + { str_timer, 0x71, 0x71, IORESOURCE_BUSY }, + { str_timer, 0x73, 0x73, IORESOURCE_BUSY }, + { str_timer, 0x75, 0x75, IORESOURCE_BUSY }, + { str_timer, 0x77, 0x77, IORESOURCE_BUSY }, + { str_graphic_gdc, 0xa0, 0xa0, IORESOURCE_BUSY }, + { str_graphic_gdc, 0xa2, 0xa2, IORESOURCE_BUSY }, + { str_graphic_gdc, 0xa4, 0xa4, IORESOURCE_BUSY }, + { str_graphic_gdc, 0xa6, 0xa6, IORESOURCE_BUSY }, + { "cpu", 0xf0, 0xf7, IORESOURCE_BUSY }, + { "fpu", 0xf8, 0xff, IORESOURCE_BUSY }, + { str_dma_ex_bank, 0x0e05, 0x0e05, 0 }, + { str_dma_ex_bank, 0x0e07, 0x0e07, 0 }, + { str_dma_ex_bank, 0x0e09, 0x0e09, 0 }, + { str_dma_ex_bank, 0x0e0b, 0x0e0b, 0 }, + { str_beep_freq, 0x3fd9, 0x3fd9, IORESOURCE_BUSY }, + { str_beep_freq, 0x3fdb, 0x3fdb, IORESOURCE_BUSY }, + { str_beep_freq, 0x3fdd, 0x3fdd, IORESOURCE_BUSY }, + { str_beep_freq, 0x3fdf, 0x3fdf, IORESOURCE_BUSY }, + /* All PC-9800 have (exactly) one mouse interface. */ + { str_mouse_pio, 0x7fd9, 0x7fd9, 0 }, + { str_mouse_pio, 0x7fdb, 0x7fdb, 0 }, + { str_mouse_pio, 0x7fdd, 0x7fdd, 0 }, + { str_mouse_pio, 0x7fdf, 0x7fdf, 0 }, + { "mouse timer", 0xbfdb, 0xbfdb, 0 }, + { "mouse irq", 0x98d7, 0x98d7, 0 }, +}; + +#define STANDARD_IO_RESOURCES (sizeof(standard_io_resources)/sizeof(struct resource)) + +static struct resource tvram_resource = { "Text VRAM/CG window", 0xa0000, 0xa4fff, IORESOURCE_BUSY }; +static struct resource gvram_brg_resource = { "Graphic VRAM (B/R/G)", 0xa8000, 0xbffff, IORESOURCE_BUSY }; +static struct resource gvram_e_resource = { "Graphic VRAM (E)", 0xe0000, 0xe7fff, IORESOURCE_BUSY }; + +/* System ROM resources */ +#define MAXROMS 6 +static struct resource rom_resources[MAXROMS] = { + { "System ROM", 0xe8000, 0xfffff, IORESOURCE_BUSY } +}; + +static inline void probe_video_rom(int roms) +{ + /* PC-9800 has no video ROM */ +} + +static inline void probe_extension_roms(int roms) +{ + int i; + __u8 *xrom_id; + + xrom_id = (__u8 *) isa_bus_to_virt(PC9800SCA_XROM_ID + 0x10); + + for (i = 0; i < 16; i++) { + if (xrom_id[i] & 0x80) { + int j; + + for (j = i + 1; j < 16 && (xrom_id[j] & 0x80); j++) + ; + rom_resources[roms].start = 0x0d0000 + i * 0x001000; + rom_resources[roms].end = 0x0d0000 + j * 0x001000 - 1; + rom_resources[roms].name = "Extension ROM"; + rom_resources[roms].flags = IORESOURCE_BUSY; + + request_resource(&iomem_resource, + rom_resources + roms); + if (++roms >= MAXROMS) + return; + } + } +} + +static inline void request_graphics_resource(void) +{ + int i; + + if (PC9800_HIGHRESO_P()) { + tvram_resource.start = 0xe0000; + tvram_resource.end = 0xe4fff; + gvram_brg_resource.name = "Graphic VRAM"; + gvram_brg_resource.start = 0xc0000; + gvram_brg_resource.end = 0xdffff; + } + + request_resource(&iomem_resource, &tvram_resource); + request_resource(&iomem_resource, &gvram_brg_resource); + if (!PC9800_HIGHRESO_P()) + request_resource(&iomem_resource, &gvram_e_resource); + + if (PC9800_HIGHRESO_P() || PC9800_9821_P()) { + static char graphics[] = "graphics"; + static struct resource graphics_resources[] = { + { graphics, 0x9a0, 0x9a0, 0 }, + { graphics, 0x9a2, 0x9a2, 0 }, + { graphics, 0x9a4, 0x9a4, 0 }, + { graphics, 0x9a6, 0x9a6, 0 }, + { graphics, 0x9a8, 0x9a8, 0 }, + { graphics, 0x9aa, 0x9aa, 0 }, + { graphics, 0x9ac, 0x9ac, 0 }, + { graphics, 0x9ae, 0x9ae, 0 }, + }; + +#define GRAPHICS_RESOURCES (sizeof(graphics_resources)/sizeof(struct resource)) + + for (i = 0; i < GRAPHICS_RESOURCES; i++) + request_resource(&ioport_resource, graphics_resources + i); + } +} + +#endif /* !_MACH_RESOURCES_H */ diff --git a/include/asm-i386/mach-pc9800/mach_time.h b/include/asm-i386/mach-pc9800/mach_time.h new file mode 100644 index 000000000000..971a9db31ac5 --- /dev/null +++ b/include/asm-i386/mach-pc9800/mach_time.h @@ -0,0 +1,100 @@ +/* + * include/asm-i386/mach-pc9800/mach_time.h + * + * Machine specific set RTC function for PC-9800. + * Written by Osamu Tomita <tomita@cinet.co.jp> + */ +#ifndef _MACH_TIME_H +#define _MACH_TIME_H + +#include <linux/bcd.h> +#include <linux/upd4990a.h> + +/* for check timing call set_rtc_mmss() */ +/* used in arch/i386/time.c::do_timer_interrupt() */ +/* + * Because PC-9800's RTC (NEC uPD4990A) does not allow setting + * time partially, we always have to read-modify-write the + * entire time (including year) so that set_rtc_mmss() will + * take quite much time to execute. You may want to relax + * RTC resetting interval (currently ~11 minuts)... + */ +#define USEC_AFTER 1000000 +#define USEC_BEFORE 0 + +static inline int mach_set_rtc_mmss(unsigned long nowtime) +{ + int retval = 0; + int real_seconds, real_minutes, cmos_minutes; + struct upd4990a_raw_data data; + + upd4990a_get_time(&data, 1); + cmos_minutes = BCD2BIN(data.min); + + /* + * since we're only adjusting minutes and seconds, + * don't interfere with hour overflow. This avoids + * messing with unknown time zones but requires your + * RTC not to be off by more than 15 minutes + */ + real_seconds = nowtime % 60; + real_minutes = nowtime / 60; + if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) + real_minutes += 30; /* correct for half hour time zone */ + real_minutes %= 60; + + if (abs(real_minutes - cmos_minutes) < 30) { + u8 temp_seconds = (real_seconds / 10) * 16 + real_seconds % 10; + u8 temp_minutes = (real_minutes / 10) * 16 + real_minutes % 10; + + if (data.sec != temp_seconds || data.min != temp_minutes) { + data.sec = temp_seconds; + data.min = temp_minutes; + upd4990a_set_time(&data, 1); + } + } else { + printk(KERN_WARNING + "set_rtc_mmss: can't update from %d to %d\n", + cmos_minutes, real_minutes); + retval = -1; + } + + /* uPD4990A users' manual says we should issue Register Hold + * command after reading time, or future Time Read command + * may not work. When we have set the time, this also starts + * the clock. + */ + upd4990a_serial_command(UPD4990A_REGISTER_HOLD); + + return retval; +} + +static inline unsigned long mach_get_cmos_time(void) +{ + int i; + u8 prev, cur; + unsigned int year; + struct upd4990a_raw_data data; + + /* Connect uPD4990A's DATA OUT pin to its 1Hz reference clock. */ + upd4990a_serial_command(UPD4990A_REGISTER_HOLD); + + /* Catch rising edge of reference clock. */ + prev = ~UPD4990A_READ_DATA(); + for (i = 0; i < 1800000; i++) { /* may take up to 1 second... */ + __asm__ ("outb %%al,%0" : : "N" (0x5f)); /* 0.6usec delay */ + cur = UPD4990A_READ_DATA(); + if (!(prev & cur & 1)) + break; + prev = ~cur; + } + + upd4990a_get_time(&data, 0); + + if ((year = BCD2BIN(data.year) + 1900) < 1995) + year += 100; + return mktime(year, data.mon, BCD2BIN(data.mday), BCD2BIN(data.hour), + BCD2BIN(data.min), BCD2BIN(data.sec)); +} + +#endif /* !_MACH_TIME_H */ diff --git a/include/asm-i386/mach-pc9800/mach_timer.h b/include/asm-i386/mach-pc9800/mach_timer.h new file mode 100644 index 000000000000..dbe78eb4c325 --- /dev/null +++ b/include/asm-i386/mach-pc9800/mach_timer.h @@ -0,0 +1,31 @@ +/* + * include/asm-i386/mach-pc9800/mach_timer.h + * + * Machine specific calibrate_tsc() for PC-9800. + * Written by Osamu Tomita <tomita@cinet.co.jp> + */ +/* ------ Calibrate the TSC ------- + * PC-9800: + * CTC cannot be used because some models (especially + * note-machines) may disable clock to speaker channel (#1) + * unless speaker is enabled. We use ARTIC instead. + */ +#ifndef _MACH_TIMER_H +#define _MACH_TIMER_H + +#define CALIBRATE_LATCH (5 * 307200/HZ) /* 0.050sec * 307200Hz = 15360 */ + +static inline void mach_prepare_counter(void) +{ + /* ARTIC can't be stopped nor reset. So we wait roundup. */ + while (inw(0x5c)); +} + +static inline void mach_countup(unsigned long *count) +{ + do { + *count = inw(0x5c); + } while (*count < CALIBRATE_LATCH); +} + +#endif /* !_MACH_TIMER_H */ diff --git a/include/asm-i386/mach-pc9800/mach_traps.h b/include/asm-i386/mach-pc9800/mach_traps.h new file mode 100644 index 000000000000..621c8f976b50 --- /dev/null +++ b/include/asm-i386/mach-pc9800/mach_traps.h @@ -0,0 +1,27 @@ +/* + * include/asm-i386/mach-pc9800/mach_traps.h + * + * Machine specific NMI handling for PC-9800. + * Written by Osamu Tomita <tomita@cinet.co.jp> + */ +#ifndef _MACH_TRAPS_H +#define _MACH_TRAPS_H + +static inline void clear_mem_error(unsigned char reason) +{ + outb(0x08, 0x37); + outb(0x09, 0x37); +} + +static inline unsigned char get_nmi_reason(void) +{ + return (inb(0x33) & 6) ? 0x80 : 0; +} + +static inline void reassert_nmi(void) +{ + outb(0x09, 0x50); /* disable NMI once */ + outb(0x09, 0x52); /* re-enable it */ +} + +#endif /* !_MACH_TRAPS_H */ diff --git a/include/asm-i386/mach-pc9800/mach_wakecpu.h b/include/asm-i386/mach-pc9800/mach_wakecpu.h new file mode 100644 index 000000000000..536444f40830 --- /dev/null +++ b/include/asm-i386/mach-pc9800/mach_wakecpu.h @@ -0,0 +1,45 @@ +#ifndef __ASM_MACH_WAKECPU_H +#define __ASM_MACH_WAKECPU_H + +/* + * This file copes with machines that wakeup secondary CPUs by the + * INIT, INIT, STARTUP sequence. + */ + +#define WAKE_SECONDARY_VIA_INIT + +/* + * On PC-9800, continuation on warm reset is done by loading + * %ss:%sp from 0x0000:0404 and executing 'lret', so: + */ +#define TRAMPOLINE_LOW phys_to_virt(0x4fa) +#define TRAMPOLINE_HIGH phys_to_virt(0x4fc) + +#define boot_cpu_apicid boot_cpu_physical_apicid + +static inline void wait_for_init_deassert(atomic_t *deassert) +{ + while (!atomic_read(deassert)); + return; +} + +/* Nothing to do for most platforms, since cleared by the INIT cycle */ +static inline void smp_callin_clear_local_apic(void) +{ +} + +static inline void store_NMI_vector(unsigned short *high, unsigned short *low) +{ +} + +static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) +{ +} + +#if APIC_DEBUG + #define inquire_remote_apic(apicid) __inquire_remote_apic(apicid) +#else + #define inquire_remote_apic(apicid) {} +#endif + +#endif /* __ASM_MACH_WAKECPU_H */ diff --git a/include/asm-i386/mach-pc9800/smpboot_hooks.h b/include/asm-i386/mach-pc9800/smpboot_hooks.h new file mode 100644 index 000000000000..6c8f1d3c2e74 --- /dev/null +++ b/include/asm-i386/mach-pc9800/smpboot_hooks.h @@ -0,0 +1,52 @@ +/* two abstractions specific to kernel/smpboot.c, mainly to cater to visws + * which needs to alter them. */ + +static inline void smpboot_clear_io_apic_irqs(void) +{ + io_apic_irqs = 0; +} + +static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) +{ + /* reset code is stored in 8255 on PC-9800. */ + outb(0x0e, 0x37); /* SHUT0 = 0 */ + local_flush_tlb(); + Dprintk("1.\n"); + *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; + Dprintk("2.\n"); + *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; + Dprintk("3.\n"); + /* + * On PC-9800, continuation on warm reset is done by loading + * %ss:%sp from 0x0000:0404 and executing 'lret', so: + */ + /* 0x3f0 is on unused interrupt vector and should be safe... */ + *((volatile unsigned long *) phys_to_virt(0x404)) = 0x000003f0; + Dprintk("4.\n"); +} + +static inline void smpboot_restore_warm_reset_vector(void) +{ + /* + * Install writable page 0 entry to set BIOS data area. + */ + local_flush_tlb(); + + /* + * Paranoid: Set warm reset code and vector here back + * to default values. + */ + outb(0x0f, 0x37); /* SHUT0 = 1 */ + + *((volatile long *) phys_to_virt(0x404)) = 0; +} + +static inline void smpboot_setup_io_apic(void) +{ + /* + * Here we can be sure that there is an IO-APIC in the system. Let's + * go and set it up: + */ + if (!skip_ioapic_setup && nr_ioapics) + setup_IO_APIC(); +} diff --git a/include/asm-i386/mach-visws/irq_vectors.h b/include/asm-i386/mach-visws/irq_vectors.h index c05f144d0084..a3f927d6a6a3 100644 --- a/include/asm-i386/mach-visws/irq_vectors.h +++ b/include/asm-i386/mach-visws/irq_vectors.h @@ -51,4 +51,10 @@ */ #define NR_IRQS 224 +#define FPU_IRQ 13 + +#define FIRST_VM86_IRQ 3 +#define LAST_VM86_IRQ 15 +#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) + #endif /* _ASM_IRQ_VECTORS_H */ diff --git a/include/asm-i386/mach-visws/smpboot_hooks.h b/include/asm-i386/mach-visws/smpboot_hooks.h index b8abdb9bea99..d926471fa359 100644 --- a/include/asm-i386/mach-visws/smpboot_hooks.h +++ b/include/asm-i386/mach-visws/smpboot_hooks.h @@ -1,10 +1,21 @@ +static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) +{ + CMOS_WRITE(0xa, 0xf); + local_flush_tlb(); + Dprintk("1.\n"); + *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; + Dprintk("2.\n"); + *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; + Dprintk("3.\n"); +} + /* for visws do nothing for any of these */ static inline void smpboot_clear_io_apic_irqs(void) { } -static inline void smpboot_setup_warm_reset_vector(void) +static inline void smpboot_restore_warm_reset_vector(void) { } diff --git a/include/asm-i386/mach-voyager/irq_vectors.h b/include/asm-i386/mach-voyager/irq_vectors.h index 4d4060a20434..f6b8125bb78c 100644 --- a/include/asm-i386/mach-voyager/irq_vectors.h +++ b/include/asm-i386/mach-voyager/irq_vectors.h @@ -57,6 +57,12 @@ #define NR_IRQS 224 +#define FPU_IRQ 13 + +#define FIRST_VM86_IRQ 3 +#define LAST_VM86_IRQ 15 +#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) + #ifndef __ASSEMBLY__ extern asmlinkage void vic_cpi_interrupt(void); extern asmlinkage void vic_sys_interrupt(void); diff --git a/include/asm-i386/math_emu.h b/include/asm-i386/math_emu.h index bc8421d5e5ff..697673b555ce 100644 --- a/include/asm-i386/math_emu.h +++ b/include/asm-i386/math_emu.h @@ -3,8 +3,8 @@ #include <asm/sigcontext.h> -int restore_i387_soft(void *s387, struct _fpstate *buf); -int save_i387_soft(void *s387, struct _fpstate * buf); +int restore_i387_soft(void *s387, struct _fpstate __user *buf); +int save_i387_soft(void *s387, struct _fpstate __user *buf); /* This structure matches the layout of the data saved to the stack following a device-not-present interrupt, part of it saved diff --git a/include/asm-i386/pc9800.h b/include/asm-i386/pc9800.h new file mode 100644 index 000000000000..1268f351515e --- /dev/null +++ b/include/asm-i386/pc9800.h @@ -0,0 +1,27 @@ +/* + * PC-9800 machine types. + * + * Copyright (C) 1999 TAKAI Kosuke <tak@kmc.kyoto-u.ac.jp> + * (Linux/98 Project) + */ + +#ifndef _ASM_PC9800_H_ +#define _ASM_PC9800_H_ + +#include <asm/pc9800_sca.h> +#include <asm/types.h> + +#define __PC9800SCA(type, pa) (*(type *) phys_to_virt(pa)) +#define __PC9800SCA_TEST_BIT(pa, n) \ + ((__PC9800SCA(u8, pa) & (1U << (n))) != 0) + +#define PC9800_HIGHRESO_P() __PC9800SCA_TEST_BIT(PC9800SCA_BIOS_FLAG, 3) +#define PC9800_8MHz_P() __PC9800SCA_TEST_BIT(PC9800SCA_BIOS_FLAG, 7) + + /* 0x2198 is 98 21 on memory... */ +#define PC9800_9821_P() (__PC9800SCA(u16, PC9821SCA_ROM_ID) == 0x2198) + +/* Note PC9821_...() are valid only when PC9800_9821_P() was true. */ +#define PC9821_IDEIF_DOUBLE_P() __PC9800SCA_TEST_BIT(PC9821SCA_ROM_FLAG4, 4) + +#endif diff --git a/include/asm-i386/sigcontext.h b/include/asm-i386/sigcontext.h index b16c6c12a860..aaef089a7787 100644 --- a/include/asm-i386/sigcontext.h +++ b/include/asm-i386/sigcontext.h @@ -1,6 +1,8 @@ #ifndef _ASMi386_SIGCONTEXT_H #define _ASMi386_SIGCONTEXT_H +#include <linux/compiler.h> + /* * As documented in the iBCS2 standard.. * @@ -74,7 +76,7 @@ struct sigcontext { unsigned long eflags; unsigned long esp_at_signal; unsigned short ss, __ssh; - struct _fpstate * fpstate; + struct _fpstate __user * fpstate; unsigned long oldmask; unsigned long cr2; }; diff --git a/include/asm-i386/signal.h b/include/asm-i386/signal.h index 984ccb12cf5b..80b7d5fdef9b 100644 --- a/include/asm-i386/signal.h +++ b/include/asm-i386/signal.h @@ -86,13 +86,13 @@ typedef unsigned long sigset_t; * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single * Unix names RESETHAND and NODEFER respectively. */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 +#define SA_NOCLDSTOP 0x00000001u +#define SA_NOCLDWAIT 0x00000002u +#define SA_SIGINFO 0x00000004u +#define SA_ONSTACK 0x08000000u +#define SA_RESTART 0x10000000u +#define SA_NODEFER 0x40000000u +#define SA_RESETHAND 0x80000000u #define SA_NOMASK SA_NODEFER #define SA_ONESHOT SA_RESETHAND diff --git a/include/asm-i386/uaccess.h b/include/asm-i386/uaccess.h index 840c74427cb2..379d278686f0 100644 --- a/include/asm-i386/uaccess.h +++ b/include/asm-i386/uaccess.h @@ -110,7 +110,7 @@ int __verify_write(const void *, unsigned long); * * See access_ok() for more details. */ -static inline int verify_area(int type, const void * addr, unsigned long size) +static inline int verify_area(int type, const void __user * addr, unsigned long size) { return access_ok(type,addr,size) ? 0 : -EFAULT; } @@ -373,8 +373,8 @@ do { \ : "m"(__m(addr)), "i"(errret), "0"(err)) -unsigned long __copy_to_user_ll(void *to, const void *from, unsigned long n); -unsigned long __copy_from_user_ll(void *to, const void *from, unsigned long n); +unsigned long __copy_to_user_ll(void __user *to, const void *from, unsigned long n); +unsigned long __copy_from_user_ll(void *to, const void __user *from, unsigned long n); /* * Here we special-case 1, 2 and 4-byte copy_*_user invocations. On a fault @@ -398,7 +398,7 @@ unsigned long __copy_from_user_ll(void *to, const void *from, unsigned long n); * On success, this will be zero. */ static inline unsigned long -__copy_to_user(void *to, const void *from, unsigned long n) +__copy_to_user(void __user *to, const void *from, unsigned long n) { if (__builtin_constant_p(n)) { unsigned long ret; @@ -436,7 +436,7 @@ __copy_to_user(void *to, const void *from, unsigned long n) * data to the requested size using zero bytes. */ static inline unsigned long -__copy_from_user(void *to, const void *from, unsigned long n) +__copy_from_user(void *to, const void __user *from, unsigned long n) { if (__builtin_constant_p(n)) { unsigned long ret; @@ -470,7 +470,7 @@ __copy_from_user(void *to, const void *from, unsigned long n) * On success, this will be zero. */ static inline unsigned long -copy_to_user(void *to, const void *from, unsigned long n) +copy_to_user(void __user *to, const void *from, unsigned long n) { if (access_ok(VERIFY_WRITE, to, n)) n = __copy_to_user(to, from, n); @@ -494,15 +494,15 @@ copy_to_user(void *to, const void *from, unsigned long n) * data to the requested size using zero bytes. */ static inline unsigned long -copy_from_user(void *to, const void *from, unsigned long n) +copy_from_user(void *to, const void __user *from, unsigned long n) { if (access_ok(VERIFY_READ, from, n)) n = __copy_from_user(to, from, n); return n; } -long strncpy_from_user(char *dst, const char *src, long count); -long __strncpy_from_user(char *dst, const char *src, long count); +long strncpy_from_user(char *dst, const char __user *src, long count); +long __strncpy_from_user(char *dst, const char __user *src, long count); /** * strlen_user: - Get the size of a string in user space. @@ -520,8 +520,8 @@ long __strncpy_from_user(char *dst, const char *src, long count); */ #define strlen_user(str) strnlen_user(str, ~0UL >> 1) -long strnlen_user(const char *str, long n); -unsigned long clear_user(void *mem, unsigned long len); -unsigned long __clear_user(void *mem, unsigned long len); +long strnlen_user(const char __user *str, long n); +unsigned long clear_user(void __user *mem, unsigned long len); +unsigned long __clear_user(void __user *mem, unsigned long len); #endif /* __i386_UACCESS_H */ diff --git a/include/asm-ia64/acpi-ext.h b/include/asm-ia64/acpi-ext.h new file mode 100644 index 000000000000..51bbd4a75f06 --- /dev/null +++ b/include/asm-ia64/acpi-ext.h @@ -0,0 +1,32 @@ +/* + * ia64/platform/hp/common/hp_acpi.h + * + * Copyright (C) 2003 Hewlett-Packard + * Copyright (C) Alex Williamson + * + * Vendor specific extensions to ACPI. The HP-specific extensiosn are also used by NEC. + */ +#ifndef _ASM_IA64_ACPI_EXT_H +#define _ASM_IA64_ACPI_EXT_H + +#include <linux/types.h> + +#define HP_CCSR_LENGTH 0x21 +#define HP_CCSR_TYPE 0x2 +#define HP_CCSR_GUID EFI_GUID(0x69e9adf9, 0x924f, 0xab5f, \ + 0xf6, 0x4a, 0x24, 0xd2, 0x01, 0x37, 0x0e, 0xad) + +struct acpi_hp_vendor_long { + u8 guid_id; + u8 guid[16]; + u8 csr_base[8]; + u8 csr_length[8]; +}; + +extern acpi_status hp_acpi_csr_space (acpi_handle, u64 *base, u64 *length); +extern acpi_status acpi_get_crs (acpi_handle, struct acpi_buffer *); +extern struct acpi_resource *acpi_get_crs_next (struct acpi_buffer *, int *); +extern union acpi_resource_data *acpi_get_crs_type (struct acpi_buffer *, int *, int); +extern void acpi_dispose_crs (struct acpi_buffer *); + +#endif /* _ASM_IA64_ACPI_EXT_H */ diff --git a/include/asm-ia64/acpi.h b/include/asm-ia64/acpi.h index bbd4e9f89369..580b1093f119 100644 --- a/include/asm-ia64/acpi.h +++ b/include/asm-ia64/acpi.h @@ -100,7 +100,9 @@ const char *acpi_get_sysname (void); int acpi_request_vector (u32 int_type); int acpi_get_prt (struct pci_vector_struct **vectors, int *count); int acpi_get_interrupt_model (int *type); +int acpi_register_irq (u32 gsi, u32 polarity, u32 trigger); int acpi_irq_to_vector (u32 irq); +int acpi_get_addr_space (void *obj, u8 type, u64 *base, u64 *length,u64 *tra); #ifdef CONFIG_ACPI_NUMA #include <asm/numa.h> diff --git a/include/asm-ia64/atomic.h b/include/asm-ia64/atomic.h index 69d171ada574..65b3f2974d67 100644 --- a/include/asm-ia64/atomic.h +++ b/include/asm-ia64/atomic.h @@ -55,6 +55,13 @@ ia64_atomic_sub (int i, atomic_t *v) return new; } +#define atomic_add_return(i,v) \ + ((__builtin_constant_p(i) && \ + ( (i == 1) || (i == 4) || (i == 8) || (i == 16) \ + || (i == -1) || (i == -4) || (i == -8) || (i == -16))) \ + ? ia64_fetch_and_add(i, &(v)->counter) \ + : ia64_atomic_add(i, v)) + /* * Atomically add I to V and return TRUE if the resulting value is * negative. @@ -62,15 +69,9 @@ ia64_atomic_sub (int i, atomic_t *v) static __inline__ int atomic_add_negative (int i, atomic_t *v) { - return ia64_atomic_add(i, v) < 0; + return atomic_add_return(i, v) < 0; } -#define atomic_add_return(i,v) \ - ((__builtin_constant_p(i) && \ - ( (i == 1) || (i == 4) || (i == 8) || (i == 16) \ - || (i == -1) || (i == -4) || (i == -8) || (i == -16))) \ - ? ia64_fetch_and_add(i, &(v)->counter) \ - : ia64_atomic_add(i, v)) #define atomic_sub_return(i,v) \ ((__builtin_constant_p(i) && \ diff --git a/include/asm-ia64/bitops.h b/include/asm-ia64/bitops.h index bec48081bba7..8a61b49df8b1 100644 --- a/include/asm-ia64/bitops.h +++ b/include/asm-ia64/bitops.h @@ -275,7 +275,7 @@ __test_and_change_bit (int nr, void *addr) } static __inline__ int -test_bit (int nr, volatile void *addr) +test_bit (int nr, const volatile void *addr) { return 1 & (((const volatile __u32 *) addr)[nr >> 5] >> (nr & 31)); } diff --git a/include/asm-ia64/compat.h b/include/asm-ia64/compat.h index 4dbbbf499800..54baeefdf13d 100644 --- a/include/asm-ia64/compat.h +++ b/include/asm-ia64/compat.h @@ -27,6 +27,11 @@ typedef s32 compat_daddr_t; typedef u32 compat_caddr_t; typedef __kernel_fsid_t compat_fsid_t; +typedef s32 compat_int_t; +typedef s32 compat_long_t; +typedef u32 compat_uint_t; +typedef u32 compat_ulong_t; + struct compat_timespec { compat_time_t tv_sec; s32 tv_nsec; @@ -68,6 +73,22 @@ struct compat_flock { compat_pid_t l_pid; }; +#define F_GETLK64 12 +#define F_SETLK64 13 +#define F_SETLKW64 14 + +/* + * IA32 uses 4 byte alignment for 64 bit quantities, + * so we need to pack this structure. + */ +struct compat_flock64 { + short l_type; + short l_whence; + compat_loff_t l_start; + compat_loff_t l_len; + compat_pid_t l_pid; +} __attribute__((packed)); + struct compat_statfs { int f_type; int f_bsize; @@ -88,4 +109,20 @@ typedef u32 compat_old_sigset_t; /* at least 32 bits */ typedef u32 compat_sigset_word; +#define COMPAT_OFF_T_MAX 0x7fffffff +#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL + +/* + * A pointer passed in from user mode. This should not be used for syscall parameters, + * just declare them as pointers because the syscall entry code will have appropriately + * comverted them already. + */ +typedef u32 compat_uptr_t; + +static inline void * +compat_ptr (compat_uptr_t uptr) +{ + return (void *) (unsigned long) uptr; +} + #endif /* _ASM_IA64_COMPAT_H */ diff --git a/include/asm-ia64/fcntl.h b/include/asm-ia64/fcntl.h index eeb42f793e61..fdb98be5134c 100644 --- a/include/asm-ia64/fcntl.h +++ b/include/asm-ia64/fcntl.h @@ -78,9 +78,6 @@ struct flock { pid_t l_pid; }; -#ifdef __KERNEL__ -# define flock64 flock -#endif - #define F_LINUX_SPECIFIC_BASE 1024 + #endif /* _ASM_IA64_FCNTL_H */ diff --git a/include/asm-ia64/fpu.h b/include/asm-ia64/fpu.h index 137d9f4d19c7..3859558ff0a4 100644 --- a/include/asm-ia64/fpu.h +++ b/include/asm-ia64/fpu.h @@ -2,7 +2,7 @@ #define _ASM_IA64_FPU_H /* - * Copyright (C) 1998, 1999, 2002 Hewlett-Packard Co + * Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co * David Mosberger-Tang <davidm@hpl.hp.com> */ @@ -57,8 +57,9 @@ struct ia64_fpreg { union { unsigned long bits[2]; + long double __dummy; /* force 16-byte alignment */ } u; -} __attribute__ ((aligned (16))); +}; # endif /* __ASSEMBLY__ */ diff --git a/include/asm-ia64/ia32.h b/include/asm-ia64/ia32.h index 35f3b28272c4..298dfc493669 100644 --- a/include/asm-ia64/ia32.h +++ b/include/asm-ia64/ia32.h @@ -18,10 +18,6 @@ #define IA32_PAGE_ALIGN(addr) (((addr) + IA32_PAGE_SIZE - 1) & IA32_PAGE_MASK) #define IA32_CLOCKS_PER_SEC 100 /* Cast in stone for IA32 Linux */ -#define F_GETLK64 12 -#define F_SETLK64 13 -#define F_SETLKW64 14 - /* sigcontext.h */ /* * As documented in the iBCS2 standard.. @@ -214,8 +210,11 @@ typedef struct siginfo32 { /* POSIX.1b timers */ struct { - unsigned int _timer1; - unsigned int _timer2; + timer_t _tid; /* timer id */ + int _overrun; /* overrun count */ + char _pad[sizeof(unsigned int) - sizeof(int)]; + sigval_t32 _sigval; /* same as below */ + int _sys_private; /* not to be passed to user */ } _timer; /* POSIX.1b signals */ diff --git a/include/asm-ia64/intrinsics.h b/include/asm-ia64/intrinsics.h index 95368f06fb50..976e3c8b5b2a 100644 --- a/include/asm-ia64/intrinsics.h +++ b/include/asm-ia64/intrinsics.h @@ -46,14 +46,10 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void); IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v))); \ else if ((i) == -4) \ IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v))); \ - else if ((i) == -2) \ - IA64_FETCHADD(_tmp, _v, -2, sizeof(*(v))); \ else if ((i) == -1) \ IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v))); \ else if ((i) == 1) \ IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v))); \ - else if ((i) == 2) \ - IA64_FETCHADD(_tmp, _v, 2, sizeof(*(v))); \ else if ((i) == 4) \ IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v))); \ else if ((i) == 8) \ diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h index 42e21b9646f1..0dd5ee42b8fd 100644 --- a/include/asm-ia64/io.h +++ b/include/asm-ia64/io.h @@ -69,22 +69,6 @@ phys_to_virt (unsigned long address) */ #define __ia64_mf_a() __asm__ __volatile__ ("mf.a" ::: "memory") -/** - * __ia64_mmiob - I/O space memory barrier - * - * Acts as a memory mapped I/O barrier for platforms that queue writes to - * I/O space. This ensures that subsequent writes to I/O space arrive after - * all previous writes. For most ia64 platforms, this is a simple - * 'mf.a' instruction, so the address is ignored. For other platforms, - * the address may be required to ensure proper ordering of writes to I/O space - * since a 'dummy' read might be necessary to barrier the write operation. - */ -static inline void -__ia64_mmiob (void) -{ - __ia64_mf_a(); -} - static inline const unsigned long __ia64_get_io_port_base (void) { @@ -287,7 +271,6 @@ __outsl (unsigned long port, void *src, unsigned long count) #define __outb platform_outb #define __outw platform_outw #define __outl platform_outl -#define __mmiob platform_mmiob #define inb(p) __inb(p) #define inw(p) __inw(p) @@ -301,31 +284,35 @@ __outsl (unsigned long port, void *src, unsigned long count) #define outsb(p,s,c) __outsb(p,s,c) #define outsw(p,s,c) __outsw(p,s,c) #define outsl(p,s,c) __outsl(p,s,c) -#define mmiob() __mmiob() /* * The address passed to these functions are ioremap()ped already. + * + * We need these to be machine vectors since some platforms don't provide + * DMA coherence via PIO reads (PCI drivers and the spec imply that this is + * a good idea). Writes are ok though for all existing ia64 platforms (and + * hopefully it'll stay that way). */ static inline unsigned char -__readb (void *addr) +__ia64_readb (void *addr) { return *(volatile unsigned char *)addr; } static inline unsigned short -__readw (void *addr) +__ia64_readw (void *addr) { return *(volatile unsigned short *)addr; } static inline unsigned int -__readl (void *addr) +__ia64_readl (void *addr) { return *(volatile unsigned int *) addr; } static inline unsigned long -__readq (void *addr) +__ia64_readq (void *addr) { return *(volatile unsigned long *) addr; } @@ -354,6 +341,11 @@ __writeq (unsigned long val, void *addr) *(volatile unsigned long *) addr = val; } +#define __readb platform_readb +#define __readw platform_readw +#define __readl platform_readl +#define __readq platform_readq + #define readb(a) __readb((void *)(a)) #define readw(a) __readw((void *)(a)) #define readl(a) __readl((void *)(a)) diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h index cd5e9cbc8b4f..31885a2be68a 100644 --- a/include/asm-ia64/machvec.h +++ b/include/asm-ia64/machvec.h @@ -43,7 +43,6 @@ typedef int ia64_mv_pci_map_sg (struct pci_dev *, struct scatterlist *, int, int typedef void ia64_mv_pci_unmap_sg (struct pci_dev *, struct scatterlist *, int, int); typedef void ia64_mv_pci_dma_sync_single (struct pci_dev *, dma_addr_t, size_t, int); typedef void ia64_mv_pci_dma_sync_sg (struct pci_dev *, struct scatterlist *, int, int); -typedef unsigned long ia64_mv_pci_dma_address (struct scatterlist *); typedef int ia64_mv_pci_dma_supported (struct pci_dev *, u64); /* @@ -61,7 +60,10 @@ typedef unsigned int ia64_mv_inl_t (unsigned long); typedef void ia64_mv_outb_t (unsigned char, unsigned long); typedef void ia64_mv_outw_t (unsigned short, unsigned long); typedef void ia64_mv_outl_t (unsigned int, unsigned long); -typedef void ia64_mv_mmiob_t (void); +typedef unsigned char ia64_mv_readb_t (void *); +typedef unsigned short ia64_mv_readw_t (void *); +typedef unsigned int ia64_mv_readl_t (void *); +typedef unsigned long ia64_mv_readq_t (void *); extern void machvec_noop (void); @@ -99,7 +101,6 @@ extern void machvec_noop (void); # define platform_pci_unmap_sg ia64_mv.unmap_sg # define platform_pci_dma_sync_single ia64_mv.sync_single # define platform_pci_dma_sync_sg ia64_mv.sync_sg -# define platform_pci_dma_address ia64_mv.dma_address # define platform_pci_dma_supported ia64_mv.dma_supported # define platform_irq_desc ia64_mv.irq_desc # define platform_irq_to_vector ia64_mv.irq_to_vector @@ -110,7 +111,10 @@ extern void machvec_noop (void); # define platform_outb ia64_mv.outb # define platform_outw ia64_mv.outw # define platform_outl ia64_mv.outl -# define platofrm_mmiob ia64_mv.mmiob +# define platform_readb ia64_mv.readb +# define platform_readw ia64_mv.readw +# define platform_readl ia64_mv.readl +# define platform_readq ia64_mv.readq # endif /* __attribute__((__aligned__(16))) is required to make size of the @@ -138,7 +142,6 @@ struct ia64_machine_vector { ia64_mv_pci_unmap_sg *unmap_sg; ia64_mv_pci_dma_sync_single *sync_single; ia64_mv_pci_dma_sync_sg *sync_sg; - ia64_mv_pci_dma_address *dma_address; ia64_mv_pci_dma_supported *dma_supported; ia64_mv_irq_desc *irq_desc; ia64_mv_irq_to_vector *irq_to_vector; @@ -149,8 +152,11 @@ struct ia64_machine_vector { ia64_mv_outb_t *outb; ia64_mv_outw_t *outw; ia64_mv_outl_t *outl; - ia64_mv_mmiob_t *mmiob; -} __attribute__((__aligned__(16))); + ia64_mv_readb_t *readb; + ia64_mv_readw_t *readw; + ia64_mv_readl_t *readl; + ia64_mv_readq_t *readq; +}; #define MACHVEC_INIT(name) \ { \ @@ -173,7 +179,6 @@ struct ia64_machine_vector { platform_pci_unmap_sg, \ platform_pci_dma_sync_single, \ platform_pci_dma_sync_sg, \ - platform_pci_dma_address, \ platform_pci_dma_supported, \ platform_irq_desc, \ platform_irq_to_vector, \ @@ -184,7 +189,10 @@ struct ia64_machine_vector { platform_outb, \ platform_outw, \ platform_outl, \ - platform_mmiob \ + platform_readb, \ + platform_readw, \ + platform_readl, \ + platform_readq, \ } extern struct ia64_machine_vector ia64_mv; @@ -206,7 +214,6 @@ extern ia64_mv_pci_map_sg swiotlb_map_sg; extern ia64_mv_pci_unmap_sg swiotlb_unmap_sg; extern ia64_mv_pci_dma_sync_single swiotlb_sync_single; extern ia64_mv_pci_dma_sync_sg swiotlb_sync_sg; -extern ia64_mv_pci_dma_address swiotlb_dma_address; extern ia64_mv_pci_dma_supported swiotlb_pci_dma_supported; /* @@ -267,9 +274,6 @@ extern ia64_mv_pci_dma_supported swiotlb_pci_dma_supported; #ifndef platform_pci_dma_sync_sg # define platform_pci_dma_sync_sg swiotlb_sync_sg #endif -#ifndef platform_pci_dma_address -# define platform_pci_dma_address swiotlb_dma_address -#endif #ifndef platform_pci_dma_supported # define platform_pci_dma_supported swiotlb_pci_dma_supported #endif @@ -300,8 +304,17 @@ extern ia64_mv_pci_dma_supported swiotlb_pci_dma_supported; #ifndef platform_outl # define platform_outl __ia64_outl #endif -#ifndef platform_mmiob -# define platform_mmiob __ia64_mmiob +#ifndef platform_readb +# define platform_readb __ia64_readb +#endif +#ifndef platform_readw +# define platform_readw __ia64_readw +#endif +#ifndef platform_readl +# define platform_readl __ia64_readl +#endif +#ifndef platform_readq +# define platform_readq __ia64_readq #endif #endif /* _ASM_IA64_MACHVEC_H */ diff --git a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h index a3ae277c6447..d6a6ef6a3880 100644 --- a/include/asm-ia64/machvec_hpzx1.h +++ b/include/asm-ia64/machvec_hpzx1.h @@ -8,7 +8,6 @@ extern ia64_mv_pci_map_single sba_map_single; extern ia64_mv_pci_unmap_single sba_unmap_single; extern ia64_mv_pci_map_sg sba_map_sg; extern ia64_mv_pci_unmap_sg sba_unmap_sg; -extern ia64_mv_pci_dma_address sba_dma_address; extern ia64_mv_pci_dma_supported sba_dma_supported; /* @@ -29,7 +28,6 @@ extern ia64_mv_pci_dma_supported sba_dma_supported; #define platform_pci_unmap_sg sba_unmap_sg #define platform_pci_dma_sync_single ((ia64_mv_pci_dma_sync_single *) machvec_noop) #define platform_pci_dma_sync_sg ((ia64_mv_pci_dma_sync_sg *) machvec_noop) -#define platform_pci_dma_address sba_dma_address #define platform_pci_dma_supported sba_dma_supported #endif /* _ASM_IA64_MACHVEC_HPZX1_h */ diff --git a/include/asm-ia64/machvec_init.h b/include/asm-ia64/machvec_init.h index 609b61eb44bd..71912c19c2d4 100644 --- a/include/asm-ia64/machvec_init.h +++ b/include/asm-ia64/machvec_init.h @@ -16,7 +16,6 @@ extern ia64_mv_inl_t __ia64_inl; extern ia64_mv_outb_t __ia64_outb; extern ia64_mv_outw_t __ia64_outw; extern ia64_mv_outl_t __ia64_outl; -extern ia64_mv_mmiob_t __ia64_mmiob; #define MACHVEC_HELPER(name) \ struct ia64_machine_vector machvec_##name __attribute__ ((unused, __section__ (".machvec"))) \ diff --git a/include/asm-ia64/machvec_sn1.h b/include/asm-ia64/machvec_sn1.h index 556ee9af651c..354b029bc45a 100644 --- a/include/asm-ia64/machvec_sn1.h +++ b/include/asm-ia64/machvec_sn1.h @@ -44,7 +44,6 @@ extern ia64_mv_inl_t sn1_inl; extern ia64_mv_outb_t sn1_outb; extern ia64_mv_outw_t sn1_outw; extern ia64_mv_outl_t sn1_outl; -extern ia64_mv_mmiob_t sn_mmiob; extern ia64_mv_pci_alloc_consistent sn1_pci_alloc_consistent; extern ia64_mv_pci_free_consistent sn1_pci_free_consistent; extern ia64_mv_pci_map_single sn1_pci_map_single; @@ -53,7 +52,6 @@ extern ia64_mv_pci_map_sg sn1_pci_map_sg; extern ia64_mv_pci_unmap_sg sn1_pci_unmap_sg; extern ia64_mv_pci_dma_sync_single sn1_pci_dma_sync_single; extern ia64_mv_pci_dma_sync_sg sn1_pci_dma_sync_sg; -extern ia64_mv_pci_dma_address sn1_dma_address; /* * This stuff has dual use! @@ -74,7 +72,6 @@ extern ia64_mv_pci_dma_address sn1_dma_address; #define platform_outb sn1_outb #define platform_outw sn1_outw #define platform_outl sn1_outl -#define platform_mmiob sn_mmiob #define platform_pci_dma_init machvec_noop #define platform_pci_alloc_consistent sn1_pci_alloc_consistent #define platform_pci_free_consistent sn1_pci_free_consistent @@ -84,6 +81,5 @@ extern ia64_mv_pci_dma_address sn1_dma_address; #define platform_pci_unmap_sg sn1_pci_unmap_sg #define platform_pci_dma_sync_single sn1_pci_dma_sync_single #define platform_pci_dma_sync_sg sn1_pci_dma_sync_sg -#define platform_pci_dma_address sn1_dma_address #endif /* _ASM_IA64_MACHVEC_SN1_h */ diff --git a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h index db55d39ec3af..6df35acde37b 100644 --- a/include/asm-ia64/machvec_sn2.h +++ b/include/asm-ia64/machvec_sn2.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2002 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2002-2003 Silicon Graphics, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License @@ -41,13 +41,16 @@ extern ia64_mv_global_tlb_purge_t sn2_global_tlb_purge; extern ia64_mv_irq_desc sn_irq_desc; extern ia64_mv_irq_to_vector sn_irq_to_vector; extern ia64_mv_local_vector_to_irq sn_local_vector_to_irq; -extern ia64_mv_inb_t sn_inb; -extern ia64_mv_inw_t sn_inw; -extern ia64_mv_inl_t sn_inl; -extern ia64_mv_outb_t sn_outb; -extern ia64_mv_outw_t sn_outw; -extern ia64_mv_outl_t sn_outl; -extern ia64_mv_mmiob_t sn2_mmiob; +extern ia64_mv_inb_t __sn_inb; +extern ia64_mv_inw_t __sn_inw; +extern ia64_mv_inl_t __sn_inl; +extern ia64_mv_outb_t __sn_outb; +extern ia64_mv_outw_t __sn_outw; +extern ia64_mv_outl_t __sn_outl; +extern ia64_mv_readb_t __sn_readb; +extern ia64_mv_readw_t __sn_readw; +extern ia64_mv_readl_t __sn_readl; +extern ia64_mv_readq_t __sn_readq; extern ia64_mv_pci_alloc_consistent sn_pci_alloc_consistent; extern ia64_mv_pci_free_consistent sn_pci_free_consistent; extern ia64_mv_pci_map_single sn_pci_map_single; @@ -56,7 +59,6 @@ extern ia64_mv_pci_map_sg sn_pci_map_sg; extern ia64_mv_pci_unmap_sg sn_pci_unmap_sg; extern ia64_mv_pci_dma_sync_single sn_pci_dma_sync_single; extern ia64_mv_pci_dma_sync_sg sn_pci_dma_sync_sg; -extern ia64_mv_pci_dma_address sn_dma_address; extern ia64_mv_pci_dma_supported sn_pci_dma_supported; /* @@ -72,13 +74,17 @@ extern ia64_mv_pci_dma_supported sn_pci_dma_supported; #define platform_irq_init sn_irq_init #define platform_send_ipi sn2_send_IPI #define platform_global_tlb_purge sn2_global_tlb_purge -#define platform_inb sn_inb -#define platform_inw sn_inw -#define platform_inl sn_inl -#define platform_outb sn_outb -#define platform_outw sn_outw -#define platform_outl sn_outl -#define platform_mmiob sn2_mmiob +#define platform_pci_fixup sn_pci_fixup +#define platform_inb __sn_inb +#define platform_inw __sn_inw +#define platform_inl __sn_inl +#define platform_outb __sn_outb +#define platform_outw __sn_outw +#define platform_outl __sn_outl +#define platform_readb __sn_readb +#define platform_readw __sn_readw +#define platform_readl __sn_readl +#define platform_readq __sn_readq #define platform_irq_desc sn_irq_desc #define platform_irq_to_vector sn_irq_to_vector #define platform_local_vector_to_irq sn_local_vector_to_irq @@ -91,7 +97,6 @@ extern ia64_mv_pci_dma_supported sn_pci_dma_supported; #define platform_pci_unmap_sg sn_pci_unmap_sg #define platform_pci_dma_sync_single sn_pci_dma_sync_single #define platform_pci_dma_sync_sg sn_pci_dma_sync_sg -#define platform_pci_dma_address sn_dma_address #define platform_pci_dma_supported sn_pci_dma_supported #endif /* _ASM_IA64_MACHVEC_SN2_H */ diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h index a42ec7f97a21..e4ddfbe0b37b 100644 --- a/include/asm-ia64/mca.h +++ b/include/asm-ia64/mca.h @@ -24,7 +24,7 @@ enum { IA64_MCA_FAILURE = 1 }; -#define IA64_MCA_RENDEZ_TIMEOUT (100 * HZ) /* 1000 milliseconds */ +#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */ #define IA64_CMC_INT_DISABLE 0 #define IA64_CMC_INT_ENABLE 1 diff --git a/include/asm-ia64/module.h b/include/asm-ia64/module.h index 93c32e28600f..d5b6ec9a1cec 100644 --- a/include/asm-ia64/module.h +++ b/include/asm-ia64/module.h @@ -1,6 +1,34 @@ #ifndef _ASM_IA64_MODULE_H #define _ASM_IA64_MODULE_H -/* Module support currently broken (due to in-kernel module loader). */ +/* + * IA-64-specific support for kernel module loader. + * + * Copyright (C) 2003 Hewlett-Packard Co + * David Mosberger-Tang <davidm@hpl.hp.com> + */ + +struct elf64_shdr; /* forward declration */ + +struct mod_arch_specific { + struct elf64_shdr *core_plt; /* core PLT section */ + struct elf64_shdr *init_plt; /* init PLT section */ + struct elf64_shdr *got; /* global offset table */ + struct elf64_shdr *opd; /* official procedure descriptors */ + struct elf64_shdr *unwind; /* unwind-table section */ + unsigned long gp; /* global-pointer for module */ + + void *unw_table; /* unwind-table cookie returned by unwinder */ + unsigned int next_got_entry; /* index of next available got entry */ +}; + +#define Elf_Shdr Elf64_Shdr +#define Elf_Sym Elf64_Sym +#define Elf_Ehdr Elf64_Ehdr + +#define MODULE_PROC_FAMILY "ia64" +#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY + +#define ARCH_SHF_SMALL SHF_IA_64_SHORT #endif /* _ASM_IA64_MODULE_H */ diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h index 69a58612d87b..56760f7abe13 100644 --- a/include/asm-ia64/pci.h +++ b/include/asm-ia64/pci.h @@ -21,7 +21,7 @@ #define PCIBIOS_MIN_MEM 0x10000000 void pcibios_config_init(void); -struct pci_bus * pcibios_scan_root(int bus); +struct pci_bus * pcibios_scan_root(void *acpi_handle, int segment, int bus); struct pci_dev; @@ -58,7 +58,6 @@ extern int pcibios_prep_mwi (struct pci_dev *); #define pci_unmap_sg platform_pci_unmap_sg #define pci_dma_sync_single platform_pci_dma_sync_single #define pci_dma_sync_sg platform_pci_dma_sync_sg -#define sg_dma_address platform_pci_dma_address #define pci_dma_supported platform_pci_dma_supported /* pci_unmap_{single,page} is not a nop, thus... */ @@ -92,11 +91,23 @@ extern int pcibios_prep_mwi (struct pci_dev *); #define pci_controller_num(PDEV) (0) #define sg_dma_len(sg) ((sg)->dma_length) +#define sg_dma_address(sg) ((sg)->dma_address) #define HAVE_PCI_MMAP extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); +struct pci_controller { + void *acpi_handle; + void *iommu; + int segment; + + u64 mem_offset; +}; + +#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata) +#define PCI_SEGMENT(busdev) (PCI_CONTROLLER(busdev)->segment) + /* generic pci stuff */ #include <asm-generic/pci.h> diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h index 04b48666fa34..8104da910e34 100644 --- a/include/asm-ia64/pgtable.h +++ b/include/asm-ia64/pgtable.h @@ -59,6 +59,9 @@ #define _PAGE_ED (__IA64_UL(1) << 52) /* exception deferral */ #define _PAGE_PROTNONE (__IA64_UL(1) << 63) +/* Valid only for a PTE with the present bit cleared: */ +#define _PAGE_FILE (1 << 1) /* see swap & file pte remarks below */ + #define _PFN_MASK _PAGE_PPN_MASK #define _PAGE_CHG_MASK (_PFN_MASK | _PAGE_A | _PAGE_D) @@ -253,6 +256,7 @@ ia64_phys_addr_valid (unsigned long addr) #define pte_exec(pte) ((pte_val(pte) & _PAGE_AR_RX) != 0) #define pte_dirty(pte) ((pte_val(pte) & _PAGE_D) != 0) #define pte_young(pte) ((pte_val(pte) & _PAGE_A) != 0) +#define pte_file(pte) ((pte_val(pte) & _PAGE_FILE) != 0) /* * Note: we convert AR_RWX to AR_RX and AR_RW to AR_R by clearing the 2nd bit in the * access rights: @@ -402,12 +406,35 @@ pte_same (pte_t a, pte_t b) extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; extern void paging_init (void); -#define __swp_type(entry) (((entry).val >> 1) & 0xff) +/* + * Note: The macros below rely on the fact that MAX_SWAPFILES_SHIFT <= number of + * bits in the swap-type field of the swap pte. It would be nice to + * enforce that, but we can't easily include <linux/swap.h> here. + * (Of course, better still would be to define MAX_SWAPFILES_SHIFT here...). + * + * Format of swap pte: + * bit 0 : present bit (must be zero) + * bit 1 : _PAGE_FILE (must be zero) + * bits 2- 8: swap-type + * bits 9-62: swap offset + * bit 63 : _PAGE_PROTNONE bit + * + * Format of file pte: + * bit 0 : present bit (must be zero) + * bit 1 : _PAGE_FILE (must be one) + * bits 2-62: file_offset/PAGE_SIZE + * bit 63 : _PAGE_PROTNONE bit + */ +#define __swp_type(entry) (((entry).val >> 2) & 0x7f) #define __swp_offset(entry) (((entry).val << 1) >> 10) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((long) (offset) << 9) }) +#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((long) (offset) << 9) }) #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) +#define PTE_FILE_MAX_BITS 61 +#define pte_to_pgoff(pte) ((pte_val(pte) << 1) >> 3) +#define pgoff_to_pte(off) ((pte_t) { ((off) << 2) | _PAGE_FILE }) + #define io_remap_page_range remap_page_range /* XXX is this right? */ /* diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h index 4c4e06dddd62..265c0bacbfc5 100644 --- a/include/asm-ia64/processor.h +++ b/include/asm-ia64/processor.h @@ -379,7 +379,7 @@ extern unsigned long get_wchan (struct task_struct *p); static inline unsigned long ia64_get_kr (unsigned long regnum) { - unsigned long r; + unsigned long r = 0; switch (regnum) { case 0: asm volatile ("mov %0=ar.k0" : "=r"(r)); break; @@ -915,13 +915,13 @@ ia64_tpa (__u64 addr) #define ARCH_HAS_SPINLOCK_PREFETCH #define PREFETCH_STRIDE 256 -extern inline void +static inline void prefetch (const void *x) { __asm__ __volatile__ ("lfetch [%0]" : : "r"(x)); } -extern inline void +static inline void prefetchw (const void *x) { __asm__ __volatile__ ("lfetch.excl [%0]" : : "r"(x)); diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h index 97e3db5ac033..519c90db71e6 100644 --- a/include/asm-ia64/sal.h +++ b/include/asm-ia64/sal.h @@ -36,14 +36,24 @@ extern spinlock_t sal_lock; #define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7) \ result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7) -# define SAL_CALL(result,args...) do { \ - unsigned long flags; \ - struct ia64_fpreg fr[6]; \ - ia64_save_scratch_fpregs(fr); \ - spin_lock_irqsave(&sal_lock, flags); \ - __SAL_CALL(result,args); \ - spin_unlock_irqrestore(&sal_lock, flags); \ - ia64_load_scratch_fpregs(fr); \ +# define SAL_CALL(result,args...) do { \ + unsigned long __ia64_sc_flags; \ + struct ia64_fpreg __ia64_sc_fr[6]; \ + ia64_save_scratch_fpregs(__ia64_sc_fr); \ + spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \ + __SAL_CALL(result, args); \ + spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \ + ia64_load_scratch_fpregs(__ia64_sc_fr); \ +} while (0) + +# define SAL_CALL_NOLOCK(result,args...) do { \ + unsigned long __ia64_scn_flags; \ + struct ia64_fpreg __ia64_scn_fr[6]; \ + ia64_save_scratch_fpregs(__ia64_scn_fr); \ + local_irq_save(__ia64_scn_flags); \ + __SAL_CALL(result, args); \ + local_irq_restore(__ia64_scn_flags); \ + ia64_load_scratch_fpregs(__ia64_scn_fr); \ } while (0) #define SAL_SET_VECTORS 0x01000000 @@ -686,13 +696,14 @@ ia64_sal_get_state_info_size (u64 sal_info_type) /* * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from - * the monarch processor. + * the monarch processor. Must not lock, because it will not return on any cpu until the + * monarch processor sends a wake up. */ static inline s64 ia64_sal_mc_rendez (void) { struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0); + SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0); return isrv.status; } diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h index 0ae7768fd7de..5147ca20d3ac 100644 --- a/include/asm-ia64/smp.h +++ b/include/asm-ia64/smp.h @@ -3,7 +3,7 @@ * * Copyright (C) 1999 VA Linux Systems * Copyright (C) 1999 Walt Drummond <drummond@valinux.com> - * Copyright (C) 2001-2002 Hewlett-Packard Co + * Copyright (C) 2001-2003 Hewlett-Packard Co * David Mosberger-Tang <davidm@hpl.hp.com> */ #ifndef _ASM_IA64_SMP_H @@ -74,7 +74,7 @@ cpu_logical_id (int cpuid) int i; for (i = 0; i < NR_CPUS; ++i) - if (cpu_physical_id(i) == (__u32) cpuid) + if (cpu_physical_id(i) == cpuid) break; return i; } diff --git a/include/asm-ia64/sn/io.h b/include/asm-ia64/sn/io.h index 9f8b1e6c8ffe..6d1f8668a161 100644 --- a/include/asm-ia64/sn/io.h +++ b/include/asm-ia64/sn/io.h @@ -3,8 +3,8 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * + * Copyright (C) 2000-2003 Silicon Graphics, Inc. All Rights Reserved. * Copyright (C) 2000 Ralf Baechle - * Copyright (C) 2000-2001 Silicon Graphics, Inc. */ #ifndef _ASM_IA64_SN_IO_H #define _ASM_IA64_SN_IO_H @@ -78,4 +78,9 @@ #include <asm/sn/sn2/shubio.h> #endif +/* + * Used to ensure write ordering (like mb(), but for I/O space) + */ +extern void sn_mmiob(void); + #endif /* _ASM_IA64_SN_IO_H */ diff --git a/include/asm-ia64/sn/sn2/io.h b/include/asm-ia64/sn/sn2/io.h new file mode 100644 index 000000000000..b0c928f01917 --- /dev/null +++ b/include/asm-ia64/sn/sn2/io.h @@ -0,0 +1,206 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. + */ + +#ifndef _ASM_SN_SN2_IO_H +#define _ASM_SN_SN2_IO_H + +extern void * sn_io_addr(unsigned long port); /* Forward definition */ +extern void sn_mmiob(void); /* Forward definition */ + +#define __sn_mf_a() __asm__ __volatile__ ("mf.a" ::: "memory") + +extern void sn_dma_flush(unsigned long); + +/* + * The following routines are SN Platform specific, called when + * a reference is made to inX/outX set macros. SN Platform + * inX set of macros ensures that Posted DMA writes on the + * Bridge is flushed. + * + * The routines should be self explainatory. + */ + +static inline unsigned int +__sn_inb (unsigned long port) +{ + volatile unsigned char *addr = sn_io_addr(port); + unsigned char ret; + + ret = *addr; + sn_dma_flush((unsigned long)addr); + __sn_mf_a(); + return ret; +} + +static inline unsigned int +__sn_inw (unsigned long port) +{ + volatile unsigned short *addr = sn_io_addr(port); + unsigned short ret; + + ret = *addr; + sn_dma_flush((unsigned long)addr); + __sn_mf_a(); + return ret; +} + +static inline unsigned int +__sn_inl (unsigned long port) +{ + volatile unsigned int *addr = sn_io_addr(port); + unsigned int ret; + + ret = *addr; + sn_dma_flush((unsigned long)addr); + __sn_mf_a(); + return ret; +} + +static inline void +__sn_outb (unsigned char val, unsigned long port) +{ + volatile unsigned char *addr = sn_io_addr(port); + + *addr = val; + sn_mmiob(); +} + +static inline void +__sn_outw (unsigned short val, unsigned long port) +{ + volatile unsigned short *addr = sn_io_addr(port); + + *addr = val; + sn_mmiob(); +} + +static inline void +__sn_outl (unsigned int val, unsigned long port) +{ + volatile unsigned int *addr = sn_io_addr(port); + + *addr = val; + sn_mmiob(); +} + +/* + * The following routines are SN Platform specific, called when + * a reference is made to readX/writeX set macros. SN Platform + * readX set of macros ensures that Posted DMA writes on the + * Bridge is flushed. + * + * The routines should be self explainatory. + */ + +static inline unsigned char +__sn_readb (void *addr) +{ + unsigned char val; + + val = *(volatile unsigned char *)addr; + sn_dma_flush((unsigned long)addr); + return val; +} + +static inline unsigned short +__sn_readw (void *addr) +{ + unsigned short val; + + val = *(volatile unsigned short *)addr; + sn_dma_flush((unsigned long)addr); + return val; +} + +static inline unsigned int +__sn_readl (void *addr) +{ + unsigned int val; + + val = *(volatile unsigned int *) addr; + sn_dma_flush((unsigned long)addr); + return val; +} + +static inline unsigned long +__sn_readq (void *addr) +{ + unsigned long val; + + val = *(volatile unsigned long *) addr; + sn_dma_flush((unsigned long)addr); + return val; +} + +/* + * For generic and SN2 kernels, we have a set of fast access + * PIO macros. These macros are provided on SN Platform + * because the normal inX and readX macros perform an + * additional task of flushing Post DMA request on the Bridge. + * + * These routines should be self explainatory. + */ + +static inline unsigned int +sn_inb_fast (unsigned long port) +{ + volatile unsigned char *addr = (unsigned char *)port; + unsigned char ret; + + ret = *addr; + __sn_mf_a(); + return ret; +} + +static inline unsigned int +sn_inw_fast (unsigned long port) +{ + volatile unsigned short *addr = (unsigned short *)port; + unsigned short ret; + + ret = *addr; + __sn_mf_a(); + return ret; +} + +static inline unsigned int +sn_inl_fast (unsigned long port) +{ + volatile unsigned int *addr = (unsigned int *)port; + unsigned int ret; + + ret = *addr; + __sn_mf_a(); + return ret; +} + +static inline unsigned char +sn_readb_fast (void *addr) +{ + return *(volatile unsigned char *)addr; +} + +static inline unsigned short +sn_readw_fast (void *addr) +{ + return *(volatile unsigned short *)addr; +} + +static inline unsigned int +sn_readl_fast (void *addr) +{ + return *(volatile unsigned int *) addr; +} + +static inline unsigned long +sn_readq_fast (void *addr) +{ + return *(volatile unsigned long *) addr; +} + +#endif diff --git a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h index 7478ee58fb9f..2a40f5496129 100644 --- a/include/asm-ia64/spinlock.h +++ b/include/asm-ia64/spinlock.h @@ -2,7 +2,7 @@ #define _ASM_IA64_SPINLOCK_H /* - * Copyright (C) 1998-2002 Hewlett-Packard Co + * Copyright (C) 1998-2003 Hewlett-Packard Co * David Mosberger-Tang <davidm@hpl.hp.com> * Copyright (C) 1999 Walt Drummond <drummond@valinux.com> * @@ -15,58 +15,6 @@ #include <asm/bitops.h> #include <asm/atomic.h> -#undef NEW_LOCK - -#ifdef NEW_LOCK - -typedef struct { - volatile unsigned int lock; -} spinlock_t; - -#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } -#define spin_lock_init(x) ((x)->lock = 0) - -/* - * Streamlined test_and_set_bit(0, (x)). We use test-and-test-and-set - * rather than a simple xchg to avoid writing the cache-line when - * there is contention. - */ -#define _raw_spin_lock(x) \ -{ \ - register char *addr __asm__ ("r31") = (char *) &(x)->lock; \ - \ - __asm__ __volatile__ ( \ - "mov r30=1\n" \ - "mov ar.ccv=r0\n" \ - ";;\n" \ - "cmpxchg4.acq r30=[%0],r30,ar.ccv\n" \ - ";;\n" \ - "cmp.ne p15,p0=r30,r0\n" \ - "(p15) br.call.spnt.few b7=ia64_spinlock_contention\n" \ - ";;\n" \ - "1:\n" /* force a new bundle */ \ - :: "r"(addr) \ - : "ar.ccv", "ar.pfs", "b7", "p15", "r28", "r29", "r30", "memory"); \ -} - -#define _raw_spin_trylock(x) \ -({ \ - register long result; \ - \ - __asm__ __volatile__ ( \ - "mov ar.ccv=r0\n" \ - ";;\n" \ - "cmpxchg4.acq %0=[%2],%1,ar.ccv\n" \ - : "=r"(result) : "r"(1), "r"(&(x)->lock) : "ar.ccv", "memory"); \ - (result == 0); \ -}) - -#define spin_is_locked(x) ((x)->lock != 0) -#define _raw_spin_unlock(x) do { barrier(); ((spinlock_t *) x)->lock = 0;} while (0) -#define spin_unlock_wait(x) do { barrier(); } while ((x)->lock) - -#else /* !NEW_LOCK */ - typedef struct { volatile unsigned int lock; } spinlock_t; @@ -123,8 +71,6 @@ do { \ #define _raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0) #define spin_unlock_wait(x) do { barrier(); } while ((x)->lock) -#endif /* !NEW_LOCK */ - typedef struct { volatile int read_counter:31; volatile int write_lock:1; @@ -136,7 +82,7 @@ typedef struct { #define _raw_read_lock(rw) \ do { \ - int tmp = 0; \ + int __read_lock_tmp = 0; \ __asm__ __volatile__ ("1:\tfetchadd4.acq %0 = [%1], 1\n" \ ";;\n" \ "tbit.nz p6,p0 = %0, 31\n" \ @@ -151,15 +97,15 @@ do { \ "br.cond.sptk.few 1b\n" \ ";;\n" \ ".previous\n" \ - : "=&r" (tmp) \ + : "=&r" (__read_lock_tmp) \ : "r" (rw) : "p6", "memory"); \ } while(0) #define _raw_read_unlock(rw) \ do { \ - int tmp = 0; \ + int __read_unlock_tmp = 0; \ __asm__ __volatile__ ("fetchadd4.rel %0 = [%1], -1\n" \ - : "=r" (tmp) \ + : "=r" (__read_unlock_tmp) \ : "r" (rw) \ : "memory"); \ } while(0) diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h index ef05383039b6..14867853e1a0 100644 --- a/include/asm-ia64/system.h +++ b/include/asm-ia64/system.h @@ -31,6 +31,7 @@ #include <linux/types.h> struct pci_vector_struct { + __u16 segment; /* PCI Segment number */ __u16 bus; /* PCI Bus number */ __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */ __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */ @@ -108,7 +109,7 @@ ia64_insn_group_barrier (void) #define set_mb(var, value) do { (var) = (value); mb(); } while (0) #define set_wmb(var, value) do { (var) = (value); mb(); } while (0) -#define safe_halt() ia64_pal_halt(1) /* PAL_HALT */ +#define safe_halt() ia64_pal_halt_light() /* PAL_HALT_LIGHT */ /* * The group barrier in front of the rsm & ssm are necessary to ensure diff --git a/include/asm-ia64/unaligned.h b/include/asm-ia64/unaligned.h index 118676881435..b9dd4ffc93df 100644 --- a/include/asm-ia64/unaligned.h +++ b/include/asm-ia64/unaligned.h @@ -7,8 +7,8 @@ * The main single-value unaligned transfer routines. Derived from * the Linux/Alpha version. * - * Copyright (C) 1998, 1999 Hewlett-Packard Co - * Copyright (C) 1998, 1999 David Mosberger-Tang <davidm@hpl.hp.com> + * Copyright (C) 1998, 1999, 2003 Hewlett-Packard Co + * David Mosberger-Tang <davidm@hpl.hp.com> */ #define get_unaligned(ptr) \ ((__typeof__(*(ptr)))ia64_get_unaligned((ptr), sizeof(*(ptr)))) @@ -16,110 +16,105 @@ #define put_unaligned(x,ptr) \ ia64_put_unaligned((unsigned long)(x), (ptr), sizeof(*(ptr))) -/* - * EGCS 1.1 knows about arbitrary unaligned loads. Define some - * packed structures to talk about such things with. - */ struct __una_u64 { __u64 x __attribute__((packed)); }; struct __una_u32 { __u32 x __attribute__((packed)); }; struct __una_u16 { __u16 x __attribute__((packed)); }; static inline unsigned long -__uldq (const unsigned long * r11) +__uld8 (const unsigned long * addr) { - const struct __una_u64 *ptr = (const struct __una_u64 *) r11; + const struct __una_u64 *ptr = (const struct __una_u64 *) addr; return ptr->x; } static inline unsigned long -__uldl (const unsigned int * r11) +__uld4 (const unsigned int * addr) { - const struct __una_u32 *ptr = (const struct __una_u32 *) r11; + const struct __una_u32 *ptr = (const struct __una_u32 *) addr; return ptr->x; } static inline unsigned long -__uldw (const unsigned short * r11) +__uld2 (const unsigned short * addr) { - const struct __una_u16 *ptr = (const struct __una_u16 *) r11; + const struct __una_u16 *ptr = (const struct __una_u16 *) addr; return ptr->x; } static inline void -__ustq (unsigned long r5, unsigned long * r11) +__ust8 (unsigned long val, unsigned long * addr) { - struct __una_u64 *ptr = (struct __una_u64 *) r11; - ptr->x = r5; + struct __una_u64 *ptr = (struct __una_u64 *) addr; + ptr->x = val; } static inline void -__ustl (unsigned long r5, unsigned int * r11) +__ust4 (unsigned long val, unsigned int * addr) { - struct __una_u32 *ptr = (struct __una_u32 *) r11; - ptr->x = r5; + struct __una_u32 *ptr = (struct __una_u32 *) addr; + ptr->x = val; } static inline void -__ustw (unsigned long r5, unsigned short * r11) +__ust2 (unsigned long val, unsigned short * addr) { - struct __una_u16 *ptr = (struct __una_u16 *) r11; - ptr->x = r5; + struct __una_u16 *ptr = (struct __una_u16 *) addr; + ptr->x = val; } /* - * This function doesn't actually exist. The idea is that when - * someone uses the macros below with an unsupported size (datatype), - * the linker will alert us to the problem via an unresolved reference - * error. + * This function doesn't actually exist. The idea is that when someone uses the macros + * below with an unsupported size (datatype), the linker will alert us to the problem via + * an unresolved reference error. */ extern unsigned long ia64_bad_unaligned_access_length (void); -#define ia64_get_unaligned(_ptr,size) \ -({ \ - const void *ptr = (_ptr); \ - unsigned long val; \ - \ - switch (size) { \ - case 1: \ - val = *(const unsigned char *) ptr; \ - break; \ - case 2: \ - val = __uldw((const unsigned short *)ptr); \ - break; \ - case 4: \ - val = __uldl((const unsigned int *)ptr); \ - break; \ - case 8: \ - val = __uldq((const unsigned long *)ptr); \ - break; \ - default: \ - val = ia64_bad_unaligned_access_length(); \ - } \ - val; \ +#define ia64_get_unaligned(_ptr,size) \ +({ \ + const void *__ia64_ptr = (_ptr); \ + unsigned long __ia64_val; \ + \ + switch (size) { \ + case 1: \ + __ia64_val = *(const unsigned char *) __ia64_ptr; \ + break; \ + case 2: \ + __ia64_val = __uld2((const unsigned short *)__ia64_ptr); \ + break; \ + case 4: \ + __ia64_val = __uld4((const unsigned int *)__ia64_ptr); \ + break; \ + case 8: \ + __ia64_val = __uld8((const unsigned long *)__ia64_ptr); \ + break; \ + default: \ + __ia64_val = ia64_bad_unaligned_access_length(); \ + } \ + __ia64_val; \ }) -#define ia64_put_unaligned(_val,_ptr,size) \ -do { \ - const void *ptr = (_ptr); \ - unsigned long val = (_val); \ - \ - switch (size) { \ - case 1: \ - *(unsigned char *)ptr = (val); \ - break; \ - case 2: \ - __ustw(val, (unsigned short *)ptr); \ - break; \ - case 4: \ - __ustl(val, (unsigned int *)ptr); \ - break; \ - case 8: \ - __ustq(val, (unsigned long *)ptr); \ - break; \ - default: \ - ia64_bad_unaligned_access_length(); \ - } \ +#define ia64_put_unaligned(_val,_ptr,size) \ +do { \ + const void *__ia64_ptr = (_ptr); \ + unsigned long __ia64_val = (_val); \ + \ + switch (size) { \ + case 1: \ + *(unsigned char *)__ia64_ptr = (__ia64_val); \ + break; \ + case 2: \ + __ust2(__ia64_val, (unsigned short *)__ia64_ptr); \ + break; \ + case 4: \ + __ust4(__ia64_val, (unsigned int *)__ia64_ptr); \ + break; \ + case 8: \ + __ust8(__ia64_val, (unsigned long *)__ia64_ptr); \ + break; \ + default: \ + ia64_bad_unaligned_access_length(); \ + } \ } while (0) #endif /* _ASM_IA64_UNALIGNED_H */ diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h index 2c40d116e5c7..308188f7c083 100644 --- a/include/asm-sparc/pci.h +++ b/include/asm-sparc/pci.h @@ -137,4 +137,7 @@ extern inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) #endif /* __KERNEL__ */ +/* generic pci stuff */ +#include <asm-generic/pci.h> + #endif /* __SPARC_PCI_H */ diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h index b352d0ef9160..65fd1f63d152 100644 --- a/include/asm-sparc/pgtable.h +++ b/include/asm-sparc/pgtable.h @@ -11,7 +11,7 @@ #include <linux/config.h> #include <linux/spinlock.h> -/* #include <asm/asi.h> */ /* doesn't seem like being used XXX */ +#include <asm/types.h> #ifdef CONFIG_SUN4 #include <asm/pgtsun4.h> #else @@ -252,6 +252,17 @@ extern __inline__ int pte_young(pte_t pte) return pte_val(pte) & BTFIXUP_HALF(pte_youngi); } +/* + * The following only work if pte_present() is not true. + */ +BTFIXUPDEF_HALF(pte_filei) + +extern int pte_file(pte_t pte) __attribute__((const)); +extern __inline__ int pte_file(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_filei); +} + BTFIXUPDEF_HALF(pte_wrprotecti) BTFIXUPDEF_HALF(pte_mkcleani) BTFIXUPDEF_HALF(pte_mkoldi) @@ -373,6 +384,17 @@ extern int invalid_segment; #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) +/* file-offset-in-pte helpers */ +BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte); +BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff); +BTFIXUPDEF_SIMM13(pte_file_max_bits); + +#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte) +#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off) +#define PTE_FILE_MAX_BITS BTFIXUP_SIMM13(pte_file_max_bits) + +/* + */ struct ctx_list { struct ctx_list *next; struct ctx_list *prev; diff --git a/include/asm-sparc/pgtsrmmu.h b/include/asm-sparc/pgtsrmmu.h index 1b902f9f31a3..424ee0dc3522 100644 --- a/include/asm-sparc/pgtsrmmu.h +++ b/include/asm-sparc/pgtsrmmu.h @@ -62,6 +62,11 @@ #define SRMMU_PRIV 0x1c #define SRMMU_PRIV_RDONLY 0x18 +#define SRMMU_FILE 0x40 /* Implemented in software */ + +#define SRMMU_PTE_FILE_MAX_BITS 24 +#define SRMMU_PTE_FILE_SHIFT 8 + #define SRMMU_CHG_MASK (0xffffff00 | SRMMU_REF | SRMMU_DIRTY) /* Some day I will implement true fine grained access bits for diff --git a/include/asm-sparc/pgtsun4c.h b/include/asm-sparc/pgtsun4c.h index 0cc124655045..3c70fc60a9e4 100644 --- a/include/asm-sparc/pgtsun4c.h +++ b/include/asm-sparc/pgtsun4c.h @@ -53,6 +53,7 @@ #define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ #define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */ #define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ +#define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */ #define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */ #define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */ #define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */ @@ -73,6 +74,12 @@ #define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\ _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV) +/* + * We have a couple of free bits left, but it's probably not a big + * deal, considering sizes of RAM and swap on sun4c. + */ +#define SUN4C_PTE_FILE_MAX_BITS 20 + #ifndef __ASSEMBLY__ extern __inline__ unsigned long sun4c_get_synchronous_error(void) diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h index 31fcc6d48eb2..86162b780635 100644 --- a/include/asm-sparc/system.h +++ b/include/asm-sparc/system.h @@ -11,7 +11,6 @@ #include <asm/segment.h> #include <asm/page.h> -#include <asm/openprom.h> /* romvec. XXX will be dealt later. Promise. */ #include <asm/psr.h> #include <asm/ptrace.h> #include <asm/btfixup.h> @@ -95,20 +94,12 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr, } while(0) #endif -// #define prepare_arch_schedule(prev) task_lock(prev) -// #define finish_arch_schedule(prev) task_unlock(prev) -#define prepare_arch_schedule(prev) do{ }while(0) -#define finish_arch_schedule(prev) do{ }while(0) - /* * Flush windows so that the VM switch which follows * would not pull the stack from under us. * * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work) * XXX WTF is the above comment? Found in late teen 2.4.x. - * - * XXX prepare_arch_switch() is much smarter than this in sparc64, are we sure? - * XXX Cosider if doing it the flush_user_windows way is faster (by uwinmask). */ #define prepare_arch_switch(rq, next) do { \ __asm__ __volatile__( \ @@ -133,14 +124,13 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr, * - Anton & Pete */ #define switch_to(prev, next, last) do { \ - __label__ here; \ - register unsigned long task_pc asm("o7"); \ SWITCH_ENTER(prev); \ SWITCH_DO_LAZY_FPU(next); \ next->active_mm->cpu_vm_mask |= (1 << smp_processor_id()); \ - task_pc = ((unsigned long) &&here) - 0x8; \ __asm__ __volatile__( \ + "sethi %%hi(here - 0x8), %%o7\n\t" \ "mov %%g6, %%g3\n\t" \ + "or %%o7, %%lo(here - 0x8), %%o7\n\t" \ "rd %%psr, %%g4\n\t" \ "std %%sp, [%%g6 + %4]\n\t" \ "rd %%wim, %%g5\n\t" \ @@ -155,7 +145,7 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr, "wr %%g4, 0x20, %%psr\n\t" \ "nop\n\t" \ "nop\n\t" \ - "nop\n\t" /* LEON needs this: load to %sp depends on CWP. */ \ + "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \ "ldd [%%g6 + %4], %%sp\n\t" \ "wr %%g5, 0x0, %%wim\n\t" \ "ldd [%%sp + 0x00], %%l0\n\t" \ @@ -165,18 +155,18 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr, "nop\n\t" \ "jmpl %%o7 + 0x8, %%g0\n\t" \ " ld [%%g3 + %5], %0\n\t" \ + "here:\n" \ : "=&r" (last) \ : "r" (&(current_set[hard_smp_processor_id()])), \ "r" ((next)->thread_info), \ "i" (TI_KPSR), \ "i" (TI_KSP), \ - "i" (TI_TASK), \ - "r" (task_pc) \ + "i" (TI_TASK) \ : "g1", "g2", "g3", "g4", "g5", "g7", \ "l0", "l1", "l3", "l4", "l5", "l6", "l7", \ "i0", "i1", "i2", "i3", "i4", "i5", \ - "o0", "o1", "o2", "o3"); \ -here:; } while(0) + "o0", "o1", "o2", "o3", "o7"); \ + } while(0) /* * Changing the IRQ level on the Sparc. diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h index d4b7771eb0c6..8abd61f88991 100644 --- a/include/asm-sparc/uaccess.h +++ b/include/asm-sparc/uaccess.h @@ -104,7 +104,7 @@ __get_user_check((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) * doing multiple accesses to the same area (the user has to do the * checks by hand with "access_ok()") */ -#define __put_user(x,ptr) __put_user_nocheck((x),(ptr),sizeof(*(ptr))) +#define __put_user(x,ptr) __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) #define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr))) struct __large_struct { unsigned long buf[100]; }; diff --git a/include/asm-v850/nb85e_cache.h b/include/asm-v850/nb85e_cache.h index db7f7eb9b99b..3b02fc8348c0 100644 --- a/include/asm-v850/nb85e_cache.h +++ b/include/asm-v850/nb85e_cache.h @@ -2,8 +2,8 @@ * include/asm-v850/nb85e_cache_cache.h -- Cache control for NB85E_CACHE212 and * NB85E_CACHE213 cache memories * - * Copyright (C) 2001 NEC Corporation - * Copyright (C) 2001 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,03 NEC Electronics Corporation + * Copyright (C) 2001,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -15,92 +15,65 @@ #ifndef __V850_NB85E_CACHE_H__ #define __V850_NB85E_CACHE_H__ +#include <asm/types.h> + + /* Cache control registers. */ -#define NB85E_CACHE_ICC_ADDR 0xFFFFF070 -#define NB85E_CACHE_DCC_ADDR 0xFFFFF078 +#define NB85E_CACHE_BHC_ADDR 0xFFFFF06A +#define NB85E_CACHE_BHC (*(volatile u16 *)NB85E_CACHE_BHC_ADDR) +#define NB85E_CACHE_ICC_ADDR 0xFFFFF070 +#define NB85E_CACHE_ICC (*(volatile u16 *)NB85E_CACHE_ICC_ADDR) +#define NB85E_CACHE_ISI_ADDR 0xFFFFF072 +#define NB85E_CACHE_ISI (*(volatile u16 *)NB85E_CACHE_ISI_ADDR) +#define NB85E_CACHE_DCC_ADDR 0xFFFFF078 +#define NB85E_CACHE_DCC (*(volatile u16 *)NB85E_CACHE_DCC_ADDR) /* Size of a cache line in bytes. */ -#define NB85E_CACHE_LINE_SIZE 16 +#define NB85E_CACHE_LINE_SIZE 16 + +/* For <asm/cache.h> */ +#define L1_CACHE_BYTES NB85E_CACHE_LINE_SIZE #ifndef __ASSEMBLY__ -extern inline void nb85e_cache_flush_cache (unsigned long cache_control_addr) -{ - /* - From the NB85E Instruction/Data Cache manual, how to flush - the instruction cache (ICC is the `Instruction Cache Control - Register'): - - mov 0x3, r2 - LOP0: - ld.h ICC[r0], r1 - cmp r0, r1 - bnz LOP0 - st.h r2, ICC[r0] - LOP1: - First TAG clear - ld.h ICC[r0], r1 - cmp r0, r1 - bnz LOP1 - st.h r2, ICC[r0] - LOP2: - Second TAG clear - ld.h ICC[r0], r1 - cmp r0, r1 - bnz LOP2 - */ - int cache_flush_bits, ccr_contents; - __asm__ __volatile__ ( - " mov 0x3, %1;" - "1: ld.h 0[%2], %0;" - " cmp r0, %0;" - " bnz 1b;" - " st.h %1, 0[%2];" - "2: ld.h 0[%2], %0;" - " cmp r0, %0;" - " bnz 2b;" - " st.h %1, 0[%2];" - "3: ld.h 0[%2], %0;" - " cmp r0, %0;" - " bnz 3b" - : "=&r" (ccr_contents), "=&r" (cache_flush_bits) - : "r" (cache_control_addr) - : "memory"); -} +/* Set caching params via the BHC and DCC registers. */ +void nb85e_cache_enable (u16 bhc, u16 dcc); -extern inline void nb85e_cache_flush_icache (void) -{ - nb85e_cache_flush_cache (NB85E_CACHE_ICC_ADDR); -} +struct page; +struct mm_struct; +struct vm_area_struct; -extern inline void nb85e_cache_flush_dcache (void) -{ - nb85e_cache_flush_cache (NB85E_CACHE_DCC_ADDR); -} +extern void nb85e_cache_flush_all (void); +extern void nb85e_cache_flush_mm (struct mm_struct *mm); +extern void nb85e_cache_flush_range (struct mm_struct *mm, + unsigned long start, + unsigned long end); +extern void nb85e_cache_flush_page (struct vm_area_struct *vma, + unsigned long page_addr); +extern void nb85e_cache_flush_dcache_page (struct page *page); +extern void nb85e_cache_flush_icache (void); +extern void nb85e_cache_flush_icache_range (unsigned long start, + unsigned long end); +extern void nb85e_cache_flush_icache_page (struct vm_area_struct *vma, + struct page *page); +extern void nb85e_cache_flush_icache_user_range (struct vm_area_struct *vma, + struct page *page, + unsigned long adr, int len); +extern void nb85e_cache_flush_sigtramp (unsigned long addr); -extern inline void nb85e_cache_flush (void) -{ - nb85e_cache_flush_icache (); - nb85e_cache_flush_dcache (); -} +#define flush_page_to_ram(x) ((void)0) +#define flush_cache_all nb85e_cache_flush_all +#define flush_cache_mm nb85e_cache_flush_mm +#define flush_cache_range nb85e_cache_flush_range +#define flush_cache_page nb85e_cache_flush_page +#define flush_dcache_page nb85e_cache_flush_dcache_page +#define flush_icache nb85e_cache_flush_icache +#define flush_icache_range nb85e_cache_flush_icache_range +#define flush_icache_page nb85e_cache_flush_icache_page +#define flush_icache_user_range nb85e_cache_flush_icache_user_range +#define flush_cache_sigtramp nb85e_cache_flush_sigtramp #endif /* !__ASSEMBLY__ */ - -/* Define standard definitions in terms of processor-specific ones. */ - -/* For <asm/cache.h> */ -#define L1_CACHE_BYTES NB85E_CACHE_LINE_SIZE - -/* For <asm/pgalloc.h> */ -#define flush_cache_all() nb85e_cache_flush () -#define flush_cache_mm(mm) nb85e_cache_flush () -#define flush_cache_range(mm, start, end) nb85e_cache_flush () -#define flush_cache_page(vma, vmaddr) nb85e_cache_flush () -#define flush_page_to_ram(page) nb85e_cache_flush () -#define flush_dcache_page(page) nb85e_cache_flush_dcache () -#define flush_icache_range(start, end) nb85e_cache_flush_icache () -#define flush_icache_page(vma,pg) nb85e_cache_flush_icache () -#define flush_icache() nb85e_cache_flush_icache () -#define flush_cache_sigtramp(vaddr) nb85e_cache_flush_icache () - #endif /* __V850_NB85E_CACHE_H__ */ diff --git a/include/asm-v850/nb85e_intc.h b/include/asm-v850/nb85e_intc.h index a093ae3a17c9..d81b777363cc 100644 --- a/include/asm-v850/nb85e_intc.h +++ b/include/asm-v850/nb85e_intc.h @@ -1,8 +1,8 @@ /* * include/asm-v850/nb85e_intc.h -- NB85E cpu core interrupt controller (INTC) * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -26,7 +26,7 @@ address. */ #define NB85E_INTC_IC_BASE_ADDR 0xFFFFF110 #define NB85E_INTC_IC_ADDR(irq) (NB85E_INTC_IC_BASE_ADDR + ((irq) << 1)) -#define NB85E_INTC_IC(irq) (*(char *)NB85E_INTC_IC_ADDR(irq)) +#define NB85E_INTC_IC(irq) (*(volatile u8 *)NB85E_INTC_IC_ADDR(irq)) /* Encode priority PR for storing in an interrupt control register. */ #define NB85E_INTC_IC_PR(pr) (pr) /* Interrupt disable bit in an interrupt control register. */ @@ -36,6 +36,13 @@ #define NB85E_INTC_IC_IF_BIT 7 #define NB85E_INTC_IC_IF (1 << NB85E_INTC_IC_IF_BIT) +/* The ISPR (In-service priority register) contains one bit for each interrupt + priority level, which is set to one when that level is currently being + serviced (and thus blocking any interrupts of equal or lesser level). */ +#define NB85E_INTC_ISPR_ADDR 0xFFFFF1FA +#define NB85E_INTC_ISPR (*(volatile u8 *)NB85E_INTC_ISPR_ADDR) + + #ifndef __ASSEMBLY__ /* Enable interrupt handling for interrupt IRQ. */ diff --git a/include/asm-v850/nb85e_timer_d.h b/include/asm-v850/nb85e_timer_d.h index 47973a0b5f03..2243bc1732c8 100644 --- a/include/asm-v850/nb85e_timer_d.h +++ b/include/asm-v850/nb85e_timer_d.h @@ -2,8 +2,8 @@ * include/asm-v850/nb85e_timer_d.h -- `Timer D' component often used * with the NB85E cpu core * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -27,7 +27,7 @@ /* Count compare registers for timer D. */ #define NB85E_TIMER_D_CMD_ADDR(n) (NB85E_TIMER_D_CMD_BASE_ADDR + 0x10 * (n)) -#define NB85E_TIMER_D_CMD(n) (*(u16 *)NB85E_TIMER_D_CMD_ADDR(n)) +#define NB85E_TIMER_D_CMD(n) (*(volatile u16 *)NB85E_TIMER_D_CMD_ADDR(n)) /* Control registers for timer D. */ #define NB85E_TIMER_D_TMCD_ADDR(n) (NB85E_TIMER_D_TMCD_BASE_ADDR + 0x10 * (n)) diff --git a/include/asm-v850/posix_types.h b/include/asm-v850/posix_types.h index 91feade6acfb..773fc0e1d955 100644 --- a/include/asm-v850/posix_types.h +++ b/include/asm-v850/posix_types.h @@ -1,8 +1,8 @@ /* * include/asm-v850/posix_types.h -- Kernel versions of standard types * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -31,6 +31,8 @@ typedef int __kernel_ptrdiff_t; typedef long __kernel_time_t; typedef long __kernel_suseconds_t; typedef long __kernel_clock_t; +typedef int __kernel_timer_t; +typedef int __kernel_clockid_t; typedef int __kernel_daddr_t; typedef char * __kernel_caddr_t; typedef unsigned short __kernel_uid16_t; diff --git a/include/asm-v850/processor.h b/include/asm-v850/processor.h index 180ae0548473..0d97022804ac 100644 --- a/include/asm-v850/processor.h +++ b/include/asm-v850/processor.h @@ -1,8 +1,8 @@ /* * include/asm-v850/processor.h * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -91,15 +91,17 @@ static inline void exit_thread (void) { } -/* Return saved (kernel) PC of a blocked thread. */ -extern inline unsigned long thread_saved_pc (struct thread_struct *t) -{ - struct pt_regs *r = (struct pt_regs *)(t->ksp + STATE_SAVE_PT_OFFSET); - /* Actually, we return the LP register, because the thread is - actually blocked in switch_thread, and we're interested in - the PC it will _return_ to. */ - return r->gpr[GPR_LP]; -} + +/* Return the registers saved during context-switch by the currently + not-running thread T. Note that this only includes some registers! + See entry.S for details. */ +#define thread_saved_regs(t) \ + ((struct pt_regs*)((t)->thread.ksp + STATE_SAVE_PT_OFFSET)) +/* Return saved (kernel) PC of a blocked thread. Actually, we return the + LP register, because the thread is actually blocked in switch_thread, + and we're interested in the PC it will _return_ to. */ +#define thread_saved_pc(t) (thread_saved_regs(t)->gpr[GPR_LP]) + unsigned long get_wchan (struct task_struct *p); diff --git a/include/asm-v850/ptrace.h b/include/asm-v850/ptrace.h index 62279c9eba45..8c7c759b42a3 100644 --- a/include/asm-v850/ptrace.h +++ b/include/asm-v850/ptrace.h @@ -1,8 +1,8 @@ /* * include/asm-v850/ptrace.h -- Access to CPU registers * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -102,10 +102,19 @@ struct pt_regs #define PT_CTBP ((NUM_GPRS + 4) * _PT_REG_SIZE) #define PT_KERNEL_MODE ((NUM_GPRS + 5) * _PT_REG_SIZE) -#define PT_SYSCALL PT_GPR(0) +/* Where the current syscall number is stashed; obviously only valid in + the kernel! */ +#define PT_CUR_SYSCALL PT_GPR(0) /* Size of struct pt_regs, including alignment. */ #define PT_SIZE ((NUM_GPRS + 6) * _PT_REG_SIZE) +/* These are `magic' values for PTRACE_PEEKUSR that return info about where + a process is located in memory. */ +#define PT_TEXT_ADDR (PT_SIZE + 1) +#define PT_TEXT_LEN (PT_SIZE + 2) +#define PT_DATA_ADDR (PT_SIZE + 3) + + #endif /* __V850_PTRACE_H__ */ diff --git a/include/asm-v850/rte_cb.h b/include/asm-v850/rte_cb.h index eb21170add51..610b8e30c655 100644 --- a/include/asm-v850/rte_cb.h +++ b/include/asm-v850/rte_cb.h @@ -1,8 +1,8 @@ /* * include/asm-v850/rte_cb.h -- Midas labs RTE-CB series of evaluation boards * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -15,18 +15,6 @@ #define __V850_RTE_CB_H__ -/* CPU addresses of GBUS memory spaces. */ -#define GCS0_ADDR 0x05000000 /* GCS0 - Common SRAM (2MB) */ -#define GCS0_SIZE 0x00200000 /* 2MB */ -#define GCS1_ADDR 0x06000000 /* GCS1 - Flash ROM (8MB) */ -#define GCS1_SIZE 0x00800000 /* 8MB */ -#define GCS2_ADDR 0x07900000 /* GCS2 - I/O registers */ -#define GCS2_SIZE 0x00400000 /* 4MB */ -#define GCS5_ADDR 0x04000000 /* GCS5 - PCI bus space */ -#define GCS5_SIZE 0x01000000 /* 16MB */ -#define GCS6_ADDR 0x07980000 /* GCS6 - PCI control registers */ -#define GCS6_SIZE 0x00000200 /* 512B */ - /* The SRAM on the Mother-A motherboard. */ #define MB_A_SRAM_ADDR GCS0_ADDR #define MB_A_SRAM_SIZE 0x00200000 /* 2MB */ @@ -78,9 +66,8 @@ #ifndef __ASSEMBLY__ - +extern void rte_cb_early_init (void); extern void rte_cb_init_irqs (void); - #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-v850/rte_ma1_cb.h b/include/asm-v850/rte_ma1_cb.h index 7eda15fafe36..c9e7fb89e34d 100644 --- a/include/asm-v850/rte_ma1_cb.h +++ b/include/asm-v850/rte_ma1_cb.h @@ -1,8 +1,8 @@ /* * include/asm-v850/rte_ma1_cb.h -- Midas labs RTE-V850/MA1-CB board * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -17,6 +17,19 @@ #include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */ +/* CPU addresses of GBUS memory spaces. */ +#define GCS0_ADDR 0x05000000 /* GCS0 - Common SRAM (2MB) */ +#define GCS0_SIZE 0x00200000 /* 2MB */ +#define GCS1_ADDR 0x06000000 /* GCS1 - Flash ROM (8MB) */ +#define GCS1_SIZE 0x00800000 /* 8MB */ +#define GCS2_ADDR 0x07900000 /* GCS2 - I/O registers */ +#define GCS2_SIZE 0x00400000 /* 4MB */ +#define GCS5_ADDR 0x04000000 /* GCS5 - PCI bus space */ +#define GCS5_SIZE 0x01000000 /* 16MB */ +#define GCS6_ADDR 0x07980000 /* GCS6 - PCI control registers */ +#define GCS6_SIZE 0x00000200 /* 512B */ + + /* The GBUS GINT0 - GINT4 interrupts are connected to the INTP000 - INTP011 pins on the CPU. These are shared among the GBUS interrupts. */ #define IRQ_GINT(n) IRQ_INTP(n) diff --git a/include/asm-v850/rte_nb85e_cb.h b/include/asm-v850/rte_nb85e_cb.h index f9f677a80f3a..e3799a1ec831 100644 --- a/include/asm-v850/rte_nb85e_cb.h +++ b/include/asm-v850/rte_nb85e_cb.h @@ -1,8 +1,8 @@ /* * include/asm-v850/rte_nb85e_cb.h -- Midas labs RTE-V850/NB85E-CB board * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -16,6 +16,30 @@ #include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */ + +/* CPU addresses of GBUS memory spaces. */ +#define GCS0_ADDR 0x00400000 /* GCS0 - Common SRAM (2MB) */ +#define GCS0_SIZE 0x00400000 /* 4MB */ +#define GCS1_ADDR 0x02000000 /* GCS1 - Flash ROM (8MB) */ +#define GCS1_SIZE 0x00800000 /* 8MB */ +#define GCS2_ADDR 0x03900000 /* GCS2 - I/O registers */ +#define GCS2_SIZE 0x00080000 /* 512KB */ +#define GCS3_ADDR 0x02800000 /* GCS3 - EXT-bus: memory space */ +#define GCS3_SIZE 0x00800000 /* 8MB */ +#define GCS4_ADDR 0x03A00000 /* GCS4 - EXT-bus: I/O space */ +#define GCS4_SIZE 0x00200000 /* 2MB */ +#define GCS5_ADDR 0x00800000 /* GCS5 - PCI bus space */ +#define GCS5_SIZE 0x00800000 /* 8MB */ +#define GCS6_ADDR 0x03980000 /* GCS6 - PCI control registers */ +#define GCS6_SIZE 0x00010000 /* 64KB */ + + +/* The GBUS GINT0 - GINT3 interrupts are connected to CPU interrupts 10-12. + These are shared among the GBUS interrupts. */ +#define IRQ_GINT(n) (10 + (n)) +#define IRQ_GINT_NUM 3 + + #define PLATFORM "rte-v850e/nb85e-cb" #define PLATFORM_LONG "Midas lab RTE-V850E/NB85E-CB" @@ -41,13 +65,13 @@ /* The chip's real interrupt vectors are in ROM, but they jump to a secondary interrupt vector table in RAM. */ -#define INTV_BASE 0x004F8000 +#define INTV_BASE 0x03CF8000 /* Scratch memory used by the ROM monitor, which shouldn't be used by linux (except for the alternate interrupt vector area, defined above). */ #define MON_SCRATCH_ADDR 0x03CE8000 -#define MON_SCRATCH_SIZE 0x00008000 /* 32KB */ +#define MON_SCRATCH_SIZE 0x00018000 /* 96KB */ #endif /* CONFIG_ROM_KERNEL */ @@ -60,4 +84,25 @@ #define LED_NUM_DIGITS 4 +/* Override the basic TEG UART pre-initialization so that we can + initialize extra stuff. */ +#undef NB85E_UART_PRE_CONFIGURE /* should be defined by <asm/teg.h> */ +#define NB85E_UART_PRE_CONFIGURE rte_nb85e_cb_uart_pre_configure +#ifndef __ASSEMBLY__ +extern void rte_nb85e_cb_uart_pre_configure (unsigned chan, + unsigned cflags, unsigned baud); +#endif + +/* This board supports RTS/CTS for the on-chip UART. */ + +/* CTS is pin P00. */ +#define NB85E_UART_CTS(chan) (! (TEG_PORT0_IO & 0x1)) +/* RTS is pin P02. */ +#define NB85E_UART_SET_RTS(chan, val) \ + do { \ + unsigned old = TEG_PORT0_IO; \ + TEG_PORT0_IO = val ? (old & ~0x4) : (old | 0x4); \ + } while (0) + + #endif /* __V850_RTE_NB85E_CB_H__ */ diff --git a/include/asm-v850/system.h b/include/asm-v850/system.h index 5ae2e951e33b..a183308ec44d 100644 --- a/include/asm-v850/system.h +++ b/include/asm-v850/system.h @@ -72,17 +72,10 @@ static inline int irqs_disabled (void) #define set_mb(var, value) set_rmb (var, value) #define set_wmb(var, value) do { var = value; wmb (); } while (0) -#ifdef CONFIG_SMP #define smp_mb() mb () #define smp_rmb() rmb () #define smp_wmb() wmb () #define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() barrier () -#define smp_rmb() barrier () -#define smp_wmb() barrier () -#define smp_read_barrier_depends() ((void)0) -#endif #define xchg(ptr, with) \ ((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr)))) diff --git a/include/asm-v850/teg.h b/include/asm-v850/teg.h index 7e471a65c7d0..caeac99dd611 100644 --- a/include/asm-v850/teg.h +++ b/include/asm-v850/teg.h @@ -1,8 +1,8 @@ /* - * include/asm-v850/nb85e_teg.h -- NB85E-TEG cpu chip + * include/asm-v850/teg.h -- NB85E-TEG cpu chip * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -11,33 +11,44 @@ * Written by Miles Bader <miles@gnu.org> */ -#ifndef __V850_NB85E_TEG_H__ -#define __V850_NB85E_TEG_H__ +#ifndef __V850_TEG_H__ +#define __V850_TEG_H__ -/* The NB85E_TEG uses the NB85E cpu core. */ + +/* The TEG uses the NB85E cpu core. */ #include <asm/nb85e.h> +#include <asm/nb85e_cache.h> + + +#define CPU_MODEL "v850e/nb85e-teg" +#define CPU_MODEL_LONG "NEC V850E/NB85E TEG" + -#define CHIP "v850e/nb85e-teg" -#define CHIP_LONG "NEC V850E/NB85E TEG" - -/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */ -#define IRQ_INTOV(n) (n) /* 0-3 */ -#define IRQ_INTOV_NUM 4 -#define IRQ_INTCMD(n) (0x1c + (n)) /* interval timer interrupts 0-3 */ -#define IRQ_INTCMD_NUM 4 -#define IRQ_INTDMA(n) (0x20 + (n)) /* DMA interrupts 0-3 */ -#define IRQ_INTDMA_NUM 4 -#define IRQ_INTCSI(n) (0x24 + (n)) /* CSI 0-2 transmit/receive completion */ -#define IRQ_INTCSI_NUM 3 -#define IRQ_INTSER(n) (0x25 + (n)) /* UART 0-2 reception error */ -#define IRQ_INTSER_NUM 3 -#define IRQ_INTSR(n) (0x26 + (n)) /* UART 0-2 reception completion */ -#define IRQ_INTSR_NUM 3 -#define IRQ_INTST(n) (0x27 + (n)) /* UART 0-2 transmission completion */ -#define IRQ_INTST_NUM 3 +/* For <asm/entry.h> */ +/* We use on-chip RAM, for a few miscellaneous variables that must be + accessible using a load instruction relative to R0. On the NB85E/TEG, + There's 60KB of iRAM starting at 0xFFFF0000, however we need the base + address to be addressable by a 16-bit signed offset, so we only use the + second half of it starting from 0xFFFF8000. */ +#define R0_RAM_ADDR 0xFFFF8000 + + +/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). + Some of these are parameterized even though there's only a single + interrupt, for compatibility with some generic code that works on other + processor models. */ +#define IRQ_INTCMD(n) 6 /* interval timer interrupt */ +#define IRQ_INTCMD_NUM 1 +#define IRQ_INTSER(n) 16 /* UART reception error */ +#define IRQ_INTSER_NUM 1 +#define IRQ_INTSR(n) 17 /* UART reception completion */ +#define IRQ_INTSR_NUM 1 +#define IRQ_INTST(n) 18 /* UART transmission completion */ +#define IRQ_INTST_NUM 1 /* For <asm/irq.h> */ -#define NUM_MACH_IRQS 0x30 +#define NUM_CPU_IRQS 64 + /* TEG UART details. */ #define NB85E_UART_BASE_ADDR(n) (0xFFFFF600 + 0x10 * (n)) @@ -50,9 +61,41 @@ #define NB85E_UART_RXB_ADDR(n) (NB85E_UART_BASE_ADDR(n) + 0xC) #define NB85E_UART_NUM_CHANNELS 1 #define NB85E_UART_BASE_FREQ CPU_CLOCK_FREQ +/* This is a function that gets called before configuring the UART. */ +#define NB85E_UART_PRE_CONFIGURE teg_uart_pre_configure +#ifndef __ASSEMBLY__ +extern void teg_uart_pre_configure (unsigned chan, + unsigned cflags, unsigned baud); +#endif + /* The TEG RTPU. */ #define NB85E_RTPU_BASE_ADDR 0xFFFFF210 -#endif /* __V850_NB85E_TEG_H__ */ +/* TEG series timer D details. */ +#define NB85E_TIMER_D_BASE_ADDR 0xFFFFF210 +#define NB85E_TIMER_D_TMCD_BASE_ADDR (NB85E_TIMER_D_BASE_ADDR + 0x0) +#define NB85E_TIMER_D_TMD_BASE_ADDR (NB85E_TIMER_D_BASE_ADDR + 0x4) +#define NB85E_TIMER_D_CMD_BASE_ADDR (NB85E_TIMER_D_BASE_ADDR + 0x8) +#define NB85E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ + + +/* `Interrupt Source Select' control register. */ +#define TEG_ISS_ADDR 0xFFFFF7FA +#define TEG_ISS (*(volatile u8 *)TEG_ISS_ADDR) + +/* Port 0 I/O register (bits 0-3 used). */ +#define TEG_PORT0_IO_ADDR 0xFFFFF7F2 +#define TEG_PORT0_IO (*(volatile u8 *)TEG_PORT0_IO_ADDR) +/* Port 0 control register (bits 0-3 control mode, 0 = output, 1 = input). */ +#define TEG_PORT0_PM_ADDR 0xFFFFF7F4 +#define TEG_PORT0_PM (*(volatile u8 *)TEG_PORT0_PM_ADDR) + + +#ifndef __ASSEMBLY__ +extern void teg_init_irqs (void); +#endif + + +#endif /* __V850_TEG_H__ */ diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h index 8eb57aef6db5..6f48d3da5fe8 100644 --- a/include/asm-v850/unistd.h +++ b/include/asm-v850/unistd.h @@ -1,8 +1,8 @@ /* * include/asm-v850/unistd.h -- System call numbers and invocation mechanism * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader <miles@gnu.org> + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this @@ -205,8 +205,6 @@ #define __NR_pivot_root 200 #define __NR_gettid 201 #define __NR_tkill 202 -/* #define __NR_mincore 203 */ -/* #define __NR_madvise 204 */ /* Syscall protocol: diff --git a/include/asm-x86_64/byteorder.h b/include/asm-x86_64/byteorder.h index daef6afb4f25..fd6ae95b4ffd 100644 --- a/include/asm-x86_64/byteorder.h +++ b/include/asm-x86_64/byteorder.h @@ -17,7 +17,7 @@ static __inline__ __const__ __u32 ___arch__swab32(__u32 x) return x; } -/* Do not define swab16. Gcc is smart enought to recognize "C" version and +/* Do not define swab16. Gcc is smart enough to recognize "C" version and convert it into rotation or exhange. */ #define __arch__swab32(x) ___arch__swab32(x) diff --git a/include/asm-x86_64/fixmap.h b/include/asm-x86_64/fixmap.h index fe37141fada3..1133a85d40ed 100644 --- a/include/asm-x86_64/fixmap.h +++ b/include/asm-x86_64/fixmap.h @@ -66,7 +66,7 @@ extern void __this_fixmap_does_not_exist(void); /* * 'index to address' translation. If anyone tries to use the idx - * directly without tranlation, we catch the bug with a NULL-deference + * directly without translation, we catch the bug with a NULL-deference * kernel oops. Illegal ranges of incoming indices are caught too. */ extern inline unsigned long fix_to_virt(const unsigned int idx) diff --git a/include/asm-x86_64/mmzone.h b/include/asm-x86_64/mmzone.h index 9d5b9772f81c..9db87d94b771 100644 --- a/include/asm-x86_64/mmzone.h +++ b/include/asm-x86_64/mmzone.h @@ -1,6 +1,6 @@ /* K8 NUMA support */ /* Copyright 2002,2003 by Andi Kleen, SuSE Labs */ -/* 2.5 Version losely based on the NUMAQ Code by Pat Gaughen. */ +/* 2.5 Version loosely based on the NUMAQ Code by Pat Gaughen. */ #ifndef _ASM_X86_64_MMZONE_H #define _ASM_X86_64_MMZONE_H 1 diff --git a/include/asm-x86_64/rwsem.h b/include/asm-x86_64/rwsem.h index fdada1f26b74..c002175b6e82 100644 --- a/include/asm-x86_64/rwsem.h +++ b/include/asm-x86_64/rwsem.h @@ -26,7 +26,7 @@ * This should be totally fair - if anything is waiting, a process that wants a * lock will go to the back of the queue. When the currently active lock is * released, if there's a writer at the front of the queue, then that and only - * that will be woken up; if there's a bunch of consequtive readers at the + * that will be woken up; if there's a bunch of consecutive readers at the * front, then they'll all be woken up, but no other readers will be. */ diff --git a/include/asm-x86_64/system.h b/include/asm-x86_64/system.h index 3d3846fc9e04..a392e47b5fa7 100644 --- a/include/asm-x86_64/system.h +++ b/include/asm-x86_64/system.h @@ -40,7 +40,7 @@ struct save_context_frame { /* It would be more efficient to let the compiler clobber most of these registers. Clobbering all is not possible because that lets reload freak out. Even just clobbering six generates wrong code with gcc 3.1 for me so do it this way for now. - rbp needs to be always explicitely saved because gcc cannot clobber the + rbp needs to be always explicitly saved because gcc cannot clobber the frame pointer and the scheduler is compiled with frame pointers. -AK */ #define SAVE_CONTEXT \ __PUSH(rsi) __PUSH(rdi) \ diff --git a/include/linux/agp_backend.h b/include/linux/agp_backend.h index 4ef3f220c8bc..5bb80a3731ad 100644 --- a/include/linux/agp_backend.h +++ b/include/linux/agp_backend.h @@ -53,7 +53,7 @@ enum chipset_type { INTEL_I850, INTEL_I860, INTEL_460GX, - INTEL_I7505, + INTEL_E7505, VIA_GENERIC, SIS_GENERIC, AMD_GENERIC, diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index b5a2f676c4f8..ee3f66a5e60c 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -260,7 +260,6 @@ struct request_queue #define blk_queue_plugged(q) !list_empty(&(q)->plug_list) #define blk_queue_tagged(q) test_bit(QUEUE_FLAG_QUEUED, &(q)->queue_flags) -#define blk_queue_empty(q) elv_queue_empty(q) #define blk_fs_request(rq) ((rq)->flags & REQ_CMD) #define blk_pc_request(rq) ((rq)->flags & REQ_BLOCK_PC) #define list_entry_rq(ptr) list_entry((ptr), struct request, queuelist) diff --git a/include/linux/compatmac.h b/include/linux/compatmac.h deleted file mode 100644 index 5ae68a6b58e7..000000000000 --- a/include/linux/compatmac.h +++ /dev/null @@ -1,160 +0,0 @@ - /* - * This header tries to allow you to write 2.3-compatible drivers, - * but (using this header) still allows you to run them on 2.2 and - * 2.0 kernels. - * - * Sometimes, a #define replaces a "construct" that older kernels - * had. For example, - * - * DECLARE_MUTEX(name); - * - * replaces the older - * - * struct semaphore name = MUTEX; - * - * This file then declares the DECLARE_MUTEX macro to compile into the - * older version. - * - * In some cases, a macro or function changes the number of arguments. - * In that case, there is nothing we can do except define an access - * macro that provides the same functionality on both versions of Linux. - * - * This is the case for example with the "get_user" macro 2.0 kernels use: - * - * a = get_user (b); - * - * while newer kernels use - * - * get_user (a,b); - * - * This is unfortunate. We therefore define "Get_user (a,b)" which looks - * almost the same as the 2.2+ construct, and translates into the - * appropriate sequence for earlier constructs. - * - * Supported by this file are the 2.0 kernels, 2.2 kernels, and the - * most recent 2.3 kernel. 2.3 support will be dropped as soon when 2.4 - * comes out. 2.0 support may someday be dropped. But then again, maybe - * not. - * - * I'll try to maintain this, provided that Linus agrees with the setup. - * Feel free to mail updates or suggestions. - * - * -- R.E.Wolff@BitWizard.nl - * - */ - -#ifndef COMPATMAC_H -#define COMPATMAC_H - -#include <linux/version.h> - -#if LINUX_VERSION_CODE < 0x020100 /* Less than 2.1.0 */ -#define TWO_ZERO -#else -#if LINUX_VERSION_CODE < 0x020200 /* less than 2.2.x */ -#warning "Please use a 2.2.x kernel. " -#else -#if LINUX_VERSION_CODE < 0x020300 /* less than 2.3.x */ -#define TWO_TWO -#else -#define TWO_THREE -#endif -#endif -#endif - -#ifdef TWO_ZERO - -/* Here is the section that makes the 2.2 compatible driver source - work for 2.0 too! We mostly try to adopt the "new thingies" from 2.2, - and provide for compatibility stuff here if possible. */ - -/* Some 200 days (on intel) */ -#define MAX_SCHEDULE_TIMEOUT ((long)(~0UL>>1)) - -#include <linux/bios32.h> - -#define Get_user(a,b) a = get_user(b) -#define Put_user(a,b) 0,put_user(a,b) -#define copy_to_user(a,b,c) memcpy_tofs(a,b,c) - -static inline int copy_from_user(void *to,const void *from, int c) -{ - memcpy_fromfs(to, from, c); - return 0; -} - -#define pci_present pcibios_present -#define pci_read_config_word pcibios_read_config_word -#define pci_read_config_dword pcibios_read_config_dword - -static inline unsigned char get_irq (unsigned char bus, unsigned char fn) -{ - unsigned char t; - pcibios_read_config_byte (bus, fn, PCI_INTERRUPT_LINE, &t); - return t; -} - -static inline void *ioremap(unsigned long base, long length) -{ - if (base < 0x100000) return (void *)base; - return vremap (base, length); -} - -#define my_iounmap(x, b) (((long)x<0x100000)?0:vfree ((void*)x)) - -#define tty_flip_buffer_push(tty) schedule_delayed_work(&tty->flip.work, 1) -#define signal_pending(current) (current->signal & ~current->blocked) -#define schedule_timeout(to) do {current->timeout = jiffies + (to);schedule ();} while (0) -#define time_after(t1,t2) (((long)t1-t2) > 0) - - -#define test_and_set_bit(nr, addr) set_bit(nr, addr) -#define test_and_clear_bit(nr, addr) clear_bit(nr, addr) - -/* Not yet implemented on 2.0 */ -#define ASYNC_SPD_SHI -1 -#define ASYNC_SPD_WARP -1 - - -/* Ugly hack: the driver_name doesn't exist in 2.0.x . So we define it - to the "name" field that does exist. As long as the assignments are - done in the right order, there is nothing to worry about. */ -#define driver_name name - -/* Should be in a header somewhere. They are in tty.h on 2.2 */ -#define TTY_HW_COOK_OUT 14 /* Flag to tell ntty what we can handle */ -#define TTY_HW_COOK_IN 15 /* in hardware - output and input */ - -/* The return type of a "close" routine. */ -#define INT void -#define NO_ERROR /* Nothing */ - -#else - -/* The 2.2.x compatibility section. */ -#include <asm/uaccess.h> - - -#define Get_user(a,b) get_user(a,b) -#define Put_user(a,b) put_user(a,b) -#define get_irq(pdev) pdev->irq - -#define INT int -#define NO_ERROR 0 - -#define my_iounmap(x,b) (iounmap((char *)(b))) - -#endif - -#ifndef TWO_THREE -/* These are new in 2.3. The source now uses 2.3 syntax, and here is - the compatibility define... */ -#define wait_queue_head_t struct wait_queue * -#define DECLARE_MUTEX(name) struct semaphore name = MUTEX -#define DECLARE_WAITQUEUE(wait, current) \ - struct wait_queue wait = { current, NULL } - -#endif - - -#endif diff --git a/include/linux/compiler.h b/include/linux/compiler.h index a28d0d51b851..4ef20f517d27 100644 --- a/include/linux/compiler.h +++ b/include/linux/compiler.h @@ -1,6 +1,14 @@ #ifndef __LINUX_COMPILER_H #define __LINUX_COMPILER_H +#ifdef __CHECKER__ + #define __user __attribute__((noderef, address_space(1))) + #define __kernel /* default address space */ +#else + #define __user + #define __kernel +#endif + #if (__GNUC__ > 3) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 1) #define inline __inline__ __attribute__((always_inline)) #define __inline__ __inline__ __attribute__((always_inline)) diff --git a/include/linux/dvb/audio.h b/include/linux/dvb/audio.h index d0ce5e27bcd5..58956c3bba52 100644 --- a/include/linux/dvb/audio.h +++ b/include/linux/dvb/audio.h @@ -47,10 +47,17 @@ typedef enum { typedef enum { AUDIO_STEREO, AUDIO_MONO_LEFT, - AUDIO_MONO_RIGHT, + AUDIO_MONO_RIGHT } audio_channel_select_t; +typedef struct audio_mixer { + unsigned int volume_left; + unsigned int volume_right; + // what else do we need? bass, pass-through, ... +} audio_mixer_t; + + typedef struct audio_status { int AV_sync_state; /* sync audio and video? */ int mute_state; /* audio is muted */ @@ -58,16 +65,10 @@ typedef struct audio_status { audio_stream_source_t stream_source; /* current stream source */ audio_channel_select_t channel_select; /* currently selected channel */ int bypass_mode; /* pass on audio data to */ + audio_mixer_t mixer_state; /* current mixer state */ } audio_status_t; /* separate decoder hardware */ -typedef struct audio_mixer { - unsigned int volume_left; - unsigned int volume_right; - // what else do we need? bass, pass-through, ... -} audio_mixer_t; - - typedef struct audio_karaoke{ /* if Vocal1 or Vocal2 are non-zero, they get mixed */ int vocal1; /* into left and right t at 70% each */ diff --git a/include/linux/dvb/ca.h b/include/linux/dvb/ca.h index a0bdd645c745..026e5c35c0ab 100644 --- a/include/linux/dvb/ca.h +++ b/include/linux/dvb/ca.h @@ -21,8 +21,8 @@ * */ -#ifndef _CA_H_ -#define _CA_H_ +#ifndef _DVBCA_H_ +#define _DVBCA_H_ /* slot interface types and info */ @@ -33,6 +33,7 @@ typedef struct ca_slot_info { #define CA_CI 1 /* CI high level interface */ #define CA_CI_LINK 2 /* CI link layer level interface */ #define CA_CI_PHYS 4 /* CI physical layer level interface */ +#define CA_DESCR 8 /* built-in descrambler */ #define CA_SC 128 /* simple smart card interface */ unsigned int flags; @@ -44,7 +45,7 @@ typedef struct ca_slot_info { /* descrambler types and info */ typedef struct ca_descr_info { - unsigned int num; /* number of available descramblers (keys) */ + unsigned int num; /* number of available descramblers (keys) */ unsigned int type; /* type of supported scrambling system */ #define CA_ECD 1 #define CA_NDS 2 @@ -59,19 +60,24 @@ typedef struct ca_caps { } ca_caps_t; /* a message to/from a CI-CAM */ -typedef struct ca_msg { - unsigned int index; +typedef struct ca_msg { + unsigned int index; unsigned int type; unsigned int length; unsigned char msg[256]; } ca_msg_t; typedef struct ca_descr { - unsigned int index; - unsigned int parity; + unsigned int index; + unsigned int parity; /* 0 == even, 1 == odd */ unsigned char cw[8]; } ca_descr_t; +typedef struct ca_pid { + unsigned int pid; + int index; /* -1 == disable*/ +} ca_pid_t; + #define CA_RESET _IO('o', 128) #define CA_GET_CAP _IOR('o', 129, ca_caps_t) #define CA_GET_SLOT_INFO _IOR('o', 130, ca_slot_info_t) @@ -79,6 +85,7 @@ typedef struct ca_descr { #define CA_GET_MSG _IOR('o', 132, ca_msg_t) #define CA_SEND_MSG _IOW('o', 133, ca_msg_t) #define CA_SET_DESCR _IOW('o', 134, ca_descr_t) +#define CA_SET_PID _IOW('o', 135, ca_pid_t) #endif diff --git a/include/linux/dvb/dmx.h b/include/linux/dvb/dmx.h index 38586a88ac3f..089b21734780 100644 --- a/include/linux/dvb/dmx.h +++ b/include/linux/dvb/dmx.h @@ -21,13 +21,14 @@ * */ -#ifndef _DMX_H_ -#define _DMX_H_ +#ifndef _DVBDMX_H_ +#define _DVBDMX_H_ #ifdef __KERNEL__ #include <linux/types.h> #else #include <stdint.h> +#include <time.h> #endif #define DMX_FILTER_SIZE 16 @@ -154,9 +155,15 @@ typedef enum { DMX_SOURCE_DVR0 = 16, DMX_SOURCE_DVR1, DMX_SOURCE_DVR2, - DMX_SOURCE_DVR3, + DMX_SOURCE_DVR3 } dmx_source_t; +struct dmx_stc { + unsigned int num; /* input : which STC? 0..N */ + unsigned int base; /* output: divisor for stc to get 90 kHz clock */ + uint64_t stc; /* output: stc in 'base'*90 kHz units */ +}; + #define DMX_START _IO('o',41) #define DMX_STOP _IO('o',42) @@ -164,9 +171,10 @@ typedef enum { #define DMX_SET_PES_FILTER _IOW('o',44,struct dmx_pes_filter_params) #define DMX_SET_BUFFER_SIZE _IO('o',45) #define DMX_GET_EVENT _IOR('o',46,struct dmx_event) -#define DMX_GET_PES_PIDS _IOR('o',47,uint16_t) +#define DMX_GET_PES_PIDS _IOR('o',47,uint16_t[5]) #define DMX_GET_CAPS _IOR('o',48,dmx_caps_t) #define DMX_SET_SOURCE _IOW('o',49,dmx_source_t) +#define DMX_GET_STC _IOWR('o',50,struct dmx_stc) -#endif /*_DMX_H_*/ +#endif /*_DVBDMX_H_*/ diff --git a/include/linux/dvb/frontend.h b/include/linux/dvb/frontend.h index 0256741c580b..8b17d6c2ea05 100644 --- a/include/linux/dvb/frontend.h +++ b/include/linux/dvb/frontend.h @@ -23,8 +23,8 @@ * */ -#ifndef _FRONTEND_H_ -#define _FRONTEND_H_ +#ifndef _DVBFRONTEND_H_ +#define _DVBFRONTEND_H_ #ifdef __KERNEL__ #include <linux/types.h> @@ -33,14 +33,14 @@ #endif -typedef enum { +typedef enum fe_type { FE_QPSK, FE_QAM, FE_OFDM } fe_type_t; -typedef enum { +typedef enum fe_caps { FE_IS_STUPID = 0, FE_CAN_INVERSION_AUTO = 0x1, FE_CAN_FEC_1_2 = 0x2, @@ -63,6 +63,8 @@ typedef enum { FE_CAN_BANDWIDTH_AUTO = 0x40000, FE_CAN_GUARD_INTERVAL_AUTO = 0x80000, FE_CAN_HIERARCHY_AUTO = 0x100000, + FE_CAN_RECOVER = 0x20000000, + FE_CAN_CLEAN_SETUP = 0x40000000, FE_CAN_MUTE_TS = 0x80000000 } fe_caps_t; @@ -99,25 +101,25 @@ struct dvb_diseqc_slave_reply { }; /* errorcode when no message was received */ -typedef enum { +typedef enum fe_sec_voltage { SEC_VOLTAGE_13, SEC_VOLTAGE_18 } fe_sec_voltage_t; -typedef enum { +typedef enum fe_sec_tone_mode { SEC_TONE_ON, SEC_TONE_OFF } fe_sec_tone_mode_t; -typedef enum { +typedef enum fe_sec_mini_cmd { SEC_MINI_A, SEC_MINI_B } fe_sec_mini_cmd_t; -typedef enum { +typedef enum fe_status { FE_HAS_SIGNAL = 0x01, /* found something above the noise level */ FE_HAS_CARRIER = 0x02, /* found a DVB signal */ FE_HAS_VITERBI = 0x04, /* FEC is stable */ @@ -125,17 +127,17 @@ typedef enum { FE_HAS_LOCK = 0x10, /* everything's working... */ FE_TIMEDOUT = 0x20, /* no lock within the last ~2 seconds */ FE_REINIT = 0x40 /* frontend was reinitialized, */ -} fe_status_t; /* application is recommned to reset */ +} fe_status_t; /* application is recommended to reset */ /* DiSEqC, tone and parameters */ -typedef enum { +typedef enum fe_spectral_inversion { INVERSION_OFF, INVERSION_ON, INVERSION_AUTO } fe_spectral_inversion_t; -typedef enum { +typedef enum fe_code_rate { FEC_NONE = 0, FEC_1_2, FEC_2_3, @@ -149,7 +151,7 @@ typedef enum { } fe_code_rate_t; -typedef enum { +typedef enum fe_modulation { QPSK, QAM_16, QAM_32, @@ -160,13 +162,13 @@ typedef enum { } fe_modulation_t; -typedef enum { +typedef enum fe_transmit_mode { TRANSMISSION_MODE_2K, TRANSMISSION_MODE_8K, TRANSMISSION_MODE_AUTO } fe_transmit_mode_t; -typedef enum { +typedef enum fe_bandwidth { BANDWIDTH_8_MHZ, BANDWIDTH_7_MHZ, BANDWIDTH_6_MHZ, @@ -174,7 +176,7 @@ typedef enum { } fe_bandwidth_t; -typedef enum { +typedef enum fe_guard_interval { GUARD_INTERVAL_1_32, GUARD_INTERVAL_1_16, GUARD_INTERVAL_1_8, @@ -183,7 +185,7 @@ typedef enum { } fe_guard_interval_t; -typedef enum { +typedef enum fe_hierarchy { HIERARCHY_NONE, HIERARCHY_1, HIERARCHY_2, @@ -257,5 +259,5 @@ struct dvb_frontend_event { #define FE_GET_EVENT _IOR('o', 78, struct dvb_frontend_event) -#endif /*_FRONTEND_H_*/ +#endif /*_DVBFRONTEND_H_*/ diff --git a/include/linux/dvb/net.h b/include/linux/dvb/net.h index 419d44884b72..5bf03b81e668 100644 --- a/include/linux/dvb/net.h +++ b/include/linux/dvb/net.h @@ -39,6 +39,7 @@ struct dvb_net_if { #define NET_ADD_IF _IOWR('o', 52, struct dvb_net_if) #define NET_REMOVE_IF _IO('o', 53) +#define NET_GET_IF _IOWR('o', 54, struct dvb_net_if) #endif /*_DVBNET_H_*/ diff --git a/include/linux/dvb/osd.h b/include/linux/dvb/osd.h index 760ccff6c75c..0d8143960a19 100644 --- a/include/linux/dvb/osd.h +++ b/include/linux/dvb/osd.h @@ -25,83 +25,83 @@ #define _DVBOSD_H_ typedef enum { - // All functions return -2 on "not open" + // All functions return -2 on "not open" OSD_Close=1, // () - // Disables OSD and releases the buffers - // returns 0 on success - OSD_Open, // (x0,y0,x1,y1,BitPerPixel[2/4/8](color&0x0F),mix[0..15](color&0xF0)) - // Opens OSD with this size and bit depth - // returns 0 on success, -1 on DRAM allocation error, -2 on "already open" - OSD_Show, // () - // enables OSD mode - // returns 0 on success - OSD_Hide, // () - // disables OSD mode - // returns 0 on success - OSD_Clear, // () - // Sets all pixel to color 0 - // returns 0 on success - OSD_Fill, // (color) - // Sets all pixel to color <col> - // returns 0 on success - OSD_SetColor, // (color,R{x0},G{y0},B{x1},opacity{y1}) - // set palette entry <num> to <r,g,b>, <mix> and <trans> apply - // R,G,B: 0..255 - // R=Red, G=Green, B=Blue - // opacity=0: pixel opacity 0% (only video pixel shows) - // opacity=1..254: pixel opacity as specified in header - // opacity=255: pixel opacity 100% (only OSD pixel shows) - // returns 0 on success, -1 on error - OSD_SetPalette, // (firstcolor{color},lastcolor{x0},data) - // Set a number of entries in the palette - // sets the entries "firstcolor" through "lastcolor" from the array "data" - // data has 4 byte for each color: - // R,G,B, and a opacity value: 0->transparent, 1..254->mix, 255->pixel - OSD_SetTrans, // (transparency{color}) - // Sets transparency of mixed pixel (0..15) - // returns 0 on success - OSD_SetPixel, // (x0,y0,color) - // sets pixel <x>,<y> to color number <col> - // returns 0 on success, -1 on error - OSD_GetPixel, // (x0,y0) - // returns color number of pixel <x>,<y>, or -1 - OSD_SetRow, // (x0,y0,x1,data) - // fills pixels x0,y through x1,y with the content of data[] - // returns 0 on success, -1 on clipping all pixel (no pixel drawn) - OSD_SetBlock, // (x0,y0,x1,y1,increment{color},data) - // fills pixels x0,y0 through x1,y1 with the content of data[] - // inc contains the width of one line in the data block, - // inc<=0 uses blockwidth as linewidth - // returns 0 on success, -1 on clipping all pixel - OSD_FillRow, // (x0,y0,x1,color) - // fills pixels x0,y through x1,y with the color <col> - // returns 0 on success, -1 on clipping all pixel - OSD_FillBlock, // (x0,y0,x1,y1,color) - // fills pixels x0,y0 through x1,y1 with the color <col> - // returns 0 on success, -1 on clipping all pixel - OSD_Line, // (x0,y0,x1,y1,color) - // draw a line from x0,y0 to x1,y1 with the color <col> - // returns 0 on success - OSD_Query, // (x0,y0,x1,y1,xasp{color}}), yasp=11 - // fills parameters with the picture dimensions and the pixel aspect ratio - // returns 0 on success - OSD_Test, // () - // draws a test picture. for debugging purposes only - // returns 0 on success + // Disables OSD and releases the buffers + // returns 0 on success + OSD_Open, // (x0,y0,x1,y1,BitPerPixel[2/4/8](color&0x0F),mix[0..15](color&0xF0)) + // Opens OSD with this size and bit depth + // returns 0 on success, -1 on DRAM allocation error, -2 on "already open" + OSD_Show, // () + // enables OSD mode + // returns 0 on success + OSD_Hide, // () + // disables OSD mode + // returns 0 on success + OSD_Clear, // () + // Sets all pixel to color 0 + // returns 0 on success + OSD_Fill, // (color) + // Sets all pixel to color <col> + // returns 0 on success + OSD_SetColor, // (color,R{x0},G{y0},B{x1},opacity{y1}) + // set palette entry <num> to <r,g,b>, <mix> and <trans> apply + // R,G,B: 0..255 + // R=Red, G=Green, B=Blue + // opacity=0: pixel opacity 0% (only video pixel shows) + // opacity=1..254: pixel opacity as specified in header + // opacity=255: pixel opacity 100% (only OSD pixel shows) + // returns 0 on success, -1 on error + OSD_SetPalette, // (firstcolor{color},lastcolor{x0},data) + // Set a number of entries in the palette + // sets the entries "firstcolor" through "lastcolor" from the array "data" + // data has 4 byte for each color: + // R,G,B, and a opacity value: 0->transparent, 1..254->mix, 255->pixel + OSD_SetTrans, // (transparency{color}) + // Sets transparency of mixed pixel (0..15) + // returns 0 on success + OSD_SetPixel, // (x0,y0,color) + // sets pixel <x>,<y> to color number <col> + // returns 0 on success, -1 on error + OSD_GetPixel, // (x0,y0) + // returns color number of pixel <x>,<y>, or -1 + OSD_SetRow, // (x0,y0,x1,data) + // fills pixels x0,y through x1,y with the content of data[] + // returns 0 on success, -1 on clipping all pixel (no pixel drawn) + OSD_SetBlock, // (x0,y0,x1,y1,increment{color},data) + // fills pixels x0,y0 through x1,y1 with the content of data[] + // inc contains the width of one line in the data block, + // inc<=0 uses blockwidth as linewidth + // returns 0 on success, -1 on clipping all pixel + OSD_FillRow, // (x0,y0,x1,color) + // fills pixels x0,y through x1,y with the color <col> + // returns 0 on success, -1 on clipping all pixel + OSD_FillBlock, // (x0,y0,x1,y1,color) + // fills pixels x0,y0 through x1,y1 with the color <col> + // returns 0 on success, -1 on clipping all pixel + OSD_Line, // (x0,y0,x1,y1,color) + // draw a line from x0,y0 to x1,y1 with the color <col> + // returns 0 on success + OSD_Query, // (x0,y0,x1,y1,xasp{color}}), yasp=11 + // fills parameters with the picture dimensions and the pixel aspect ratio + // returns 0 on success + OSD_Test, // () + // draws a test picture. for debugging purposes only + // returns 0 on success // TODO: remove "test" in final version - OSD_Text, // (x0,y0,size,color,text) - OSD_SetWindow, // (x0) set window with number 0<x0<8 as current - OSD_MoveWindow, // move current window to (x0, y0) + OSD_Text, // (x0,y0,size,color,text) + OSD_SetWindow, // (x0) set window with number 0<x0<8 as current + OSD_MoveWindow, // move current window to (x0, y0) } OSD_Command; typedef struct osd_cmd_s { - OSD_Command cmd; - int x0; - int y0; - int x1; - int y1; - int color; - void *data; + OSD_Command cmd; + int x0; + int y0; + int x1; + int y1; + int color; + void *data; } osd_cmd_t; diff --git a/include/linux/dvb/video.h b/include/linux/dvb/video.h index 8bcb009f5779..24353a7220b8 100644 --- a/include/linux/dvb/video.h +++ b/include/linux/dvb/video.h @@ -28,6 +28,7 @@ #include <linux/types.h> #else #include <stdint.h> +#include <time.h> #endif diff --git a/include/linux/fdreg.h b/include/linux/fdreg.h index 1d9026eed978..c2eeb63b72db 100644 --- a/include/linux/fdreg.h +++ b/include/linux/fdreg.h @@ -7,8 +7,12 @@ */ #ifdef FDPATCHES - #define FD_IOPORT fdc_state[fdc].address +#else +/* It would be a lot saner just to force fdc_state[fdc].address to always + be set ! FIXME */ +#define FD_IOPORT 0x3f0 +#endif /* Fd controller regs. S&C, about page 340 */ #define FD_STATUS (4 + FD_IOPORT ) @@ -23,16 +27,6 @@ /* Diskette Control Register (write)*/ #define FD_DCR (7 + FD_IOPORT ) -#else - -#define FD_STATUS 0x3f4 -#define FD_DATA 0x3f5 -#define FD_DOR 0x3f2 /* Digital Output Register */ -#define FD_DIR 0x3f7 /* Digital Input Register (read) */ -#define FD_DCR 0x3f7 /* Diskette Control Register (write)*/ - -#endif - /* Bits of main status register */ #define STATUS_BUSYMASK 0x0F /* drive busy mask */ #define STATUS_BUSY 0x10 /* FDC busy */ diff --git a/include/linux/fs.h b/include/linux/fs.h index af3852b4281d..5af89265c804 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -313,7 +313,7 @@ struct backing_dev_info; struct address_space { struct inode *host; /* owner: inode, block_device */ struct radix_tree_root page_tree; /* radix tree of all pages */ - rwlock_t page_lock; /* and rwlock protecting it */ + spinlock_t page_lock; /* and rwlock protecting it */ struct list_head clean_pages; /* list of clean pages */ struct list_head dirty_pages; /* list of dirty pages */ struct list_head locked_pages; /* list of locked pages */ @@ -321,8 +321,8 @@ struct address_space { unsigned long nrpages; /* number of total pages */ struct address_space_operations *a_ops; /* methods */ struct list_head i_mmap; /* list of private mappings */ - struct list_head i_mmap_shared; /* list of private mappings */ - struct semaphore i_shared_sem; /* and sem protecting it */ + struct list_head i_mmap_shared; /* list of shared mappings */ + struct semaphore i_shared_sem; /* protect both above lists */ unsigned long dirtied_when; /* jiffies of first page dirtying */ int gfp_mask; /* how to allocate the pages */ struct backing_dev_info *backing_dev_info; /* device readahead, etc */ @@ -705,10 +705,10 @@ typedef int (*read_actor_t)(read_descriptor_t *, struct page *, unsigned long, u struct file_operations { struct module *owner; loff_t (*llseek) (struct file *, loff_t, int); - ssize_t (*read) (struct file *, char *, size_t, loff_t *); - ssize_t (*aio_read) (struct kiocb *, char *, size_t, loff_t); - ssize_t (*write) (struct file *, const char *, size_t, loff_t *); - ssize_t (*aio_write) (struct kiocb *, const char *, size_t, loff_t); + ssize_t (*read) (struct file *, char __user *, size_t, loff_t *); + ssize_t (*aio_read) (struct kiocb *, char __user *, size_t, loff_t); + ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *); + ssize_t (*aio_write) (struct kiocb *, const char __user *, size_t, loff_t); int (*readdir) (struct file *, void *, filldir_t); unsigned int (*poll) (struct file *, struct poll_table_struct *); int (*ioctl) (struct inode *, struct file *, unsigned int, unsigned long); @@ -738,7 +738,7 @@ struct inode_operations { int (*mknod) (struct inode *,struct dentry *,int,dev_t); int (*rename) (struct inode *, struct dentry *, struct inode *, struct dentry *); - int (*readlink) (struct dentry *, char *,int); + int (*readlink) (struct dentry *, char __user *,int); int (*follow_link) (struct dentry *, struct nameidata *); void (*truncate) (struct inode *); int (*permission) (struct inode *, int); @@ -1024,7 +1024,7 @@ extern int do_truncate(struct dentry *, loff_t start); extern struct file *filp_open(const char *, int, int); extern struct file * dentry_open(struct dentry *, struct vfsmount *, int); extern int filp_close(struct file *, fl_owner_t id); -extern char * getname(const char *); +extern char * getname(const char __user *); /* fs/dcache.c */ extern void vfs_caches_init(unsigned long); diff --git a/include/linux/hdlc.h b/include/linux/hdlc.h index aeceb6f1a7be..6b89e9c85f9b 100644 --- a/include/linux/hdlc.h +++ b/include/linux/hdlc.h @@ -1,12 +1,11 @@ /* * Generic HDLC support routines for Linux * - * Copyright (C) 1999-2002 Krzysztof Halasa <khc@pm.waw.pl> + * Copyright (C) 1999-2003 Krzysztof Halasa <khc@pm.waw.pl> * * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * under the terms of version 2 of the GNU General Public License + * as published by the Free Software Foundation. */ #ifndef __HDLC_H @@ -52,7 +51,7 @@ #include <linux/hdlc/ioctl.h> #define HDLC_MAX_MTU 1500 /* Ethernet 1500 bytes */ -#define HDLC_MAX_MRU (HDLC_MAX_MTU + 10) /* max 10 bytes for FR */ +#define HDLC_MAX_MRU (HDLC_MAX_MTU + 10 + 14 + 4) /* for ETH+VLAN over FR */ #define MAXLEN_LMISTAT 20 /* max size of status enquiry frame */ @@ -145,17 +144,20 @@ typedef struct { typedef struct pvc_device_struct { - struct net_device netdev; /* PVC net device - must be first */ - struct net_device_stats stats; struct hdlc_device_struct *master; - struct pvc_device_struct *next; + struct net_device *main; + struct net_device *ether; /* bridged Ethernet interface */ + struct pvc_device_struct *next; /* Sorted in ascending DLCI order */ + int dlci; + int open_count; struct { - int active; - int new; - int deleted; - int fecn; - int becn; + unsigned int new: 1; + unsigned int active: 1; + unsigned int exist: 1; + unsigned int deleted: 1; + unsigned int fecn: 1; + unsigned int becn: 1; }state; }pvc_device; @@ -180,18 +182,20 @@ typedef struct hdlc_device_struct { void (*stop)(struct hdlc_device_struct *hdlc); void (*proto_detach)(struct hdlc_device_struct *hdlc); void (*netif_rx)(struct sk_buff *skb); + unsigned short (*type_trans)(struct sk_buff *skb, + struct net_device *dev); int proto; /* IF_PROTO_HDLC/CISCO/FR/etc. */ union { struct { fr_proto settings; pvc_device *first_pvc; - int pvc_count; + int dce_pvc_count; struct timer_list timer; int last_poll; int reliable; - int changed; + int dce_changed; int request; int fullrep_sent; u32 last_errors; /* last errors bit list */ @@ -226,6 +230,7 @@ typedef struct hdlc_device_struct { int hdlc_raw_ioctl(hdlc_device *hdlc, struct ifreq *ifr); +int hdlc_raw_eth_ioctl(hdlc_device *hdlc, struct ifreq *ifr); int hdlc_cisco_ioctl(hdlc_device *hdlc, struct ifreq *ifr); int hdlc_ppp_ioctl(hdlc_device *hdlc, struct ifreq *ifr); int hdlc_fr_ioctl(hdlc_device *hdlc, struct ifreq *ifr); @@ -254,15 +259,9 @@ static __inline__ hdlc_device* dev_to_hdlc(struct net_device *dev) } -static __inline__ struct net_device* pvc_to_dev(pvc_device *pvc) -{ - return &pvc->netdev; -} - - static __inline__ pvc_device* dev_to_pvc(struct net_device *dev) { - return (pvc_device*)dev; + return (pvc_device*)dev->priv; } @@ -272,19 +271,6 @@ static __inline__ const char *hdlc_to_name(hdlc_device *hdlc) } -static __inline__ const char *pvc_to_name(pvc_device *pvc) -{ - return pvc_to_dev(pvc)->name; -} - - -static __inline__ u16 netdev_dlci(struct net_device *dev) -{ - return ntohs(*(u16*)dev->dev_addr); -} - - - static __inline__ u16 q922_to_dlci(u8 *hdr) { return ((hdr[0] & 0xFC) << 2) | ((hdr[1] & 0xF0) >> 4); @@ -345,5 +331,15 @@ static __inline__ void hdlc_proto_detach(hdlc_device *hdlc) } +static __inline__ unsigned short hdlc_type_trans(struct sk_buff *skb, + struct net_device *dev) +{ + hdlc_device *hdlc = dev_to_hdlc(skb->dev); + if (hdlc->type_trans) + return hdlc->type_trans(skb, dev); + else + return __constant_htons(ETH_P_HDLC); +} + #endif /* __KERNEL */ #endif /* __HDLC_H */ diff --git a/include/linux/hdlc/ioctl.h b/include/linux/hdlc/ioctl.h index c35e1a35d847..78430ba3ea69 100644 --- a/include/linux/hdlc/ioctl.h +++ b/include/linux/hdlc/ioctl.h @@ -34,22 +34,15 @@ typedef struct { } fr_proto_pvc; /* for creating/deleting FR PVCs */ typedef struct { + unsigned int dlci; + char master[IFNAMSIZ]; /* Name of master FRAD device */ +}fr_proto_pvc_info; /* for returning PVC information only */ + +typedef struct { unsigned int interval; unsigned int timeout; } cisco_proto; /* PPP doesn't need any info now - supply length = 0 to ioctl */ -union hdlc_settings { - raw_hdlc_proto raw_hdlc; - cisco_proto cisco; - fr_proto fr; - fr_proto_pvc fr_pvc; -}; - -union line_settings { - sync_serial_settings sync; - te1_settings te1; -}; - #endif /* __HDLC_IOCTL_H__ */ diff --git a/include/linux/hdreg.h b/include/linux/hdreg.h index 5b1c363f89cb..29e0e40b7167 100644 --- a/include/linux/hdreg.h +++ b/include/linux/hdreg.h @@ -355,7 +355,7 @@ typedef struct hd_drive_hob_hdr { #define SETFEATURES_DIS_MSN 0x31 /* Disable Media Status Notification */ #define SETFEATURES_DIS_RETRY 0x33 /* Disable Retry */ #define SETFEATURES_EN_AAM 0x42 /* Enable Automatic Acoustic Management */ -#define SETFEATURES_RW_LONG 0x44 /* Set Lenght of VS bytes */ +#define SETFEATURES_RW_LONG 0x44 /* Set Length of VS bytes */ #define SETFEATURES_SET_CACHE 0x54 /* Set Cache segments to SC Reg. Val */ #define SETFEATURES_DIS_RLA 0x55 /* Disable read look-ahead feature */ #define SETFEATURES_EN_RI 0x5D /* Enable release interrupt */ diff --git a/include/linux/if.h b/include/linux/if.h index 898cfdf1bb14..c4c72e790700 100644 --- a/include/linux/if.h +++ b/include/linux/if.h @@ -21,6 +21,8 @@ #include <linux/types.h> /* for "__kernel_caddr_t" et al */ #include <linux/socket.h> /* for "struct sockaddr" et al */ + +#define IFNAMSIZ 16 #include <linux/hdlc/ioctl.h> /* Standard interface flags (netdevice->flags). */ @@ -69,7 +71,11 @@ #define IF_PROTO_FR_ADD_PVC 0x2004 /* Create FR PVC */ #define IF_PROTO_FR_DEL_PVC 0x2005 /* Delete FR PVC */ #define IF_PROTO_X25 0x2006 /* X.25 */ - +#define IF_PROTO_HDLC_ETH 0x2007 /* raw HDLC, Ethernet emulation */ +#define IF_PROTO_FR_ADD_ETH_PVC 0x2008 /* Create FR Ethernet-bridged PVC */ +#define IF_PROTO_FR_DEL_ETH_PVC 0x2009 /* Delete FR Ethernet-bridged PVC */ +#define IF_PROTO_FR_PVC 0x200A /* for reading PVC status */ +#define IF_PROTO_FR_ETH_PVC 0x200B /* @@ -103,6 +109,7 @@ struct if_settings cisco_proto *cisco; fr_proto *fr; fr_proto_pvc *fr_pvc; + fr_proto_pvc_info *fr_pvc_info; /* interface settings */ sync_serial_settings *sync; @@ -120,7 +127,6 @@ struct if_settings struct ifreq { #define IFHWADDRLEN 6 -#define IFNAMSIZ 16 union { char ifrn_name[IFNAMSIZ]; /* if name, e.g. "en0" */ diff --git a/include/linux/irda.h b/include/linux/irda.h index bdf23baa5483..948488ece2a8 100644 --- a/include/linux/irda.h +++ b/include/linux/irda.h @@ -25,6 +25,8 @@ #ifndef KERNEL_IRDA_H #define KERNEL_IRDA_H +#include <linux/socket.h> /* only for sa_family_t */ + /* Hint bit positions for first hint byte */ #define HINT_PNP 0x01 #define HINT_PDA 0x02 diff --git a/include/linux/jbd.h b/include/linux/jbd.h index 2cddeb1f450e..e00aec05a9b5 100644 --- a/include/linux/jbd.h +++ b/include/linux/jbd.h @@ -274,8 +274,9 @@ void buffer_assertion_failure(struct buffer_head *bh); #define __journal_expect(expr, why...) \ do { \ if (!(expr)) { \ - printk(KERN_ERR "EXT3-fs unexpected failure: %s;\n", # expr); \ - printk(KERN_ERR ## why); \ + printk(KERN_ERR \ + "EXT3-fs unexpected failure: %s;\n",# expr); \ + printk(KERN_ERR why); \ } \ } while (0) #define J_EXPECT(expr, why...) __journal_expect(expr, ## why) diff --git a/include/linux/kernel.h b/include/linux/kernel.h index f7f83f129d9f..94d476e7d80f 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -104,6 +104,7 @@ static inline void console_verbose(void) extern void bust_spinlocks(int yes); extern int oops_in_progress; /* If set, an oops, panic(), BUG() or die() is in progress */ +extern int panic_on_oops; extern int tainted; extern const char *print_tainted(void); diff --git a/include/linux/mm.h b/include/linux/mm.h index c6c2eef39d62..5f4bf646e187 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -231,8 +231,8 @@ static inline void get_page(struct page *page) static inline void put_page(struct page *page) { if (PageCompound(page)) { + page = (struct page *)page->lru.next; if (put_page_testzero(page)) { - page = (struct page *)page->lru.next; if (page->lru.prev) { /* destructor? */ (*(void (*)(struct page *))page->lru.prev)(page); } else { diff --git a/include/linux/module.h b/include/linux/module.h index 30892e436401..657802c8af75 100644 --- a/include/linux/module.h +++ b/include/linux/module.h @@ -408,9 +408,9 @@ __attribute__((section(".gnu.linkonce.this_module"))) = { #endif /* MODULE */ #define symbol_request(x) try_then_request_module(symbol_get(x), "symbol:" #x) +#define SET_MODULE_OWNER(dev) ((dev)->owner = THIS_MODULE) /* BELOW HERE ALL THESE ARE OBSOLETE AND WILL VANISH */ -#define SET_MODULE_OWNER(dev) ((dev)->owner = THIS_MODULE) struct obsolete_modparm { char name[64]; diff --git a/include/linux/mtd/compatmac.h b/include/linux/mtd/compatmac.h index 19e6d2f849d5..8b243674cf22 100644 --- a/include/linux/mtd/compatmac.h +++ b/include/linux/mtd/compatmac.h @@ -17,7 +17,6 @@ #ifndef __LINUX_MTD_COMPATMAC_H__ #define __LINUX_MTD_COMPATMAC_H__ -#include <linux/compatmac.h> #include <linux/types.h> /* used later in this header */ #include <linux/module.h> #ifndef LINUX_VERSION_CODE diff --git a/include/linux/namei.h b/include/linux/namei.h index 9d5b102f9e9e..16baf5cdb9c7 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -33,7 +33,7 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND}; #define LOOKUP_NOALT 32 -extern int FASTCALL(__user_walk(const char *, unsigned, struct nameidata *)); +extern int FASTCALL(__user_walk(const char __user *, unsigned, struct nameidata *)); #define user_path_walk(name,nd) \ __user_walk(name, LOOKUP_FOLLOW, nd) #define user_path_walk_link(name,nd) \ diff --git a/include/linux/net.h b/include/linux/net.h index 55083c938298..6ba6e1038521 100644 --- a/include/linux/net.h +++ b/include/linux/net.h @@ -19,7 +19,6 @@ #define _LINUX_NET_H #include <linux/config.h> -#include <linux/socket.h> #include <linux/wait.h> struct poll_table_struct; @@ -88,6 +87,8 @@ struct socket { struct vm_area_struct; struct page; struct kiocb; +struct sockaddr; +struct msghdr; struct proto_ops { int family; @@ -136,6 +137,8 @@ struct net_proto_family { short encrypt_net; }; +struct iovec; + extern int sock_wake_async(struct socket *sk, int how, int band); extern int sock_register(struct net_proto_family *fam); extern int sock_unregister(int family); diff --git a/include/linux/netlink.h b/include/linux/netlink.h index 69346c394563..30de192de7a9 100644 --- a/include/linux/netlink.h +++ b/include/linux/netlink.h @@ -1,6 +1,8 @@ #ifndef __LINUX_NETLINK_H #define __LINUX_NETLINK_H +#include <linux/socket.h> /* for sa_family_t */ + #define NETLINK_ROUTE 0 /* Routing/device hook */ #define NETLINK_SKIP 1 /* Reserved for ENskip */ #define NETLINK_USERSOCK 2 /* Reserved for user mode socket protocols */ diff --git a/include/linux/nfs4.h b/include/linux/nfs4.h index 7c0d596db02f..de82796383bf 100644 --- a/include/linux/nfs4.h +++ b/include/linux/nfs4.h @@ -206,6 +206,10 @@ enum { NFSPROC4_CLNT_READ, NFSPROC4_CLNT_WRITE, NFSPROC4_CLNT_COMMIT, + NFSPROC4_CLNT_OPEN, + NFSPROC4_CLNT_OPEN_CONFIRM, + NFSPROC4_CLNT_CLOSE, + NFSPROC4_CLNT_SETATTR, }; #endif diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index bc44563921f7..3d7525998534 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -155,6 +155,13 @@ struct nfs_inode { wait_queue_head_t nfs_i_wait; +#ifdef CONFIG_NFS_V4 + /* NFSv4 state */ + struct nfs4_shareowner *ro_owner; + struct nfs4_shareowner *wo_owner; + struct nfs4_shareowner *rw_owner; +#endif /* CONFIG_NFS_V4*/ + struct inode vfs_inode; }; @@ -435,28 +442,75 @@ extern void * nfs_root_data(void); #define NFS_JUKEBOX_RETRY_TIME (5 * HZ) #ifdef CONFIG_NFS_V4 + +/* + * In a seqid-mutating op, this macro controls which error return + * values trigger incrementation of the seqid. + * + * from rfc 3010: + * The client MUST monotonically increment the sequence number for the + * CLOSE, LOCK, LOCKU, OPEN, OPEN_CONFIRM, and OPEN_DOWNGRADE + * operations. This is true even in the event that the previous + * operation that used the sequence number received an error. The only + * exception to this rule is if the previous operation received one of + * the following errors: NFSERR_STALE_CLIENTID, NFSERR_STALE_STATEID, + * NFSERR_BAD_STATEID, NFSERR_BAD_SEQID, NFSERR_BADXDR, + * NFSERR_RESOURCE, NFSERR_NOFILEHANDLE. + * + */ +#define seqid_mutating_err(err) \ +(((err) != NFSERR_STALE_CLIENTID) && \ + ((err) != NFSERR_STALE_STATEID) && \ + ((err) != NFSERR_BAD_STATEID) && \ + ((err) != NFSERR_BAD_SEQID) && \ + ((err) != NFSERR_BAD_XDR) && \ + ((err) != NFSERR_RESOURCE) && \ + ((err) != NFSERR_NOFILEHANDLE)) + struct nfs4_client { - atomic_t cl_count; /* refcount */ u64 cl_clientid; /* constant */ - nfs4_verifier cl_confirm; + nfs4_verifier cl_confirm; - /* - * Starts a list of lockowners, linked through lo_list. - */ - struct list_head cl_lockowners; /* protected by state_spinlock */ + u32 cl_lockowner_id; +}; + +/* +* The ->so_sema is held during all shareowner seqid-mutating operations: +* OPEN, OPEN_DOWNGRADE, and CLOSE. +* Its purpose is to properly serialize so_seqid, as mandated by +* the protocol. +*/ +struct nfs4_shareowner { + u32 so_id; /* 32-bit identifier, unique */ + struct semaphore so_sema; + u32 so_seqid; /* protected by so_sema */ + nfs4_stateid so_stateid; /* protected by so_sema */ + unsigned int so_flags; /* protected by so_sema */ }; + /* nfs4proc.c */ extern int nfs4_proc_renew(struct nfs_server *server); +extern int nfs4_do_close(struct inode *inode, struct nfs4_shareowner *sp); /* nfs4renewd.c */ extern int nfs4_init_renewd(struct nfs_server *server); -#endif /* CONFIG_NFS_V4 */ - -#ifdef CONFIG_NFS_V4 +/* nfs4state.c */ extern struct nfs4_client *nfs4_get_client(void); extern void nfs4_put_client(struct nfs4_client *clp); +extern struct nfs4_shareowner * nfs4_get_shareowner(struct inode *inode); +void nfs4_put_shareowner(struct inode *inode, struct nfs4_shareowner *sp); +extern int nfs4_set_inode_share(struct inode * inode, + struct nfs4_shareowner *sp, unsigned int flags); +extern void nfs4_increment_seqid(u32 status, struct nfs4_shareowner *sp); +extern int nfs4_test_shareowner(struct inode *inode, unsigned int open_flags); +struct nfs4_shareowner * nfs4_get_inode_share(struct inode * inode, unsigned int open_flags); + + + + + struct nfs4_mount_data; static inline int @@ -481,6 +535,7 @@ destroy_nfsv4_state(struct nfs_server *server) #else #define create_nfsv4_state(server, data) 0 #define destroy_nfsv4_state(server) do { } while (0) +#define nfs4_put_shareowner(inode, owner) do { } while (0) #endif #endif /* __KERNEL__ */ diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h index cee23453bddc..816d447df238 100644 --- a/include/linux/nfs_fs_sb.h +++ b/include/linux/nfs_fs_sb.h @@ -36,6 +36,7 @@ struct nfs_server { struct nfs4_client * nfs4_state; /* all NFSv4 state starts here */ unsigned long lease_time; /* in jiffies */ unsigned long last_renewal; /* in jiffies */ + void *idmap; #endif }; diff --git a/include/linux/nfs_idmap.h b/include/linux/nfs_idmap.h new file mode 100644 index 000000000000..248adf707071 --- /dev/null +++ b/include/linux/nfs_idmap.h @@ -0,0 +1,69 @@ +/* + * include/linux/nfs_idmap.h + * + * UID and GID to name mapping for clients. + * + * Copyright (c) 2002 The Regents of the University of Michigan. + * All rights reserved. + * + * Marius Aamodt Eriksen <marius@umich.edu> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NFS_IDMAP_H +#define NFS_IDMAP_H + +/* XXX from bits/utmp.h */ +#define IDMAP_NAMESZ 128 + +#define IDMAP_TYPE_USER 0 +#define IDMAP_TYPE_GROUP 1 + +#define IDMAP_CONV_IDTONAME 0 +#define IDMAP_CONV_NAMETOID 1 + +#define IDMAP_STATUS_INVALIDMSG 0x01 +#define IDMAP_STATUS_AGAIN 0x02 +#define IDMAP_STATUS_LOOKUPFAIL 0x04 +#define IDMAP_STATUS_SUCCESS 0x08 + +struct idmap_msg { + u_int8_t im_type; + u_int8_t im_conv; + char im_name[IDMAP_NAMESZ]; + u_int32_t im_id; + u_int8_t im_status; +}; + +#ifdef __KERNEL__ +void *nfs_idmap_new(struct nfs_server *); +void nfs_idmap_delete(struct nfs_server *); +int nfs_idmap_id(struct nfs_server *, u_int8_t, char *, u_int, uid_t *); +int nfs_idmap_name(struct nfs_server *, u_int8_t, uid_t, char *, u_int *); +#endif /* __KERNEL__ */ + +#endif /* NFS_IDMAP_H */ diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h index 2b96e1e5aa97..3d46a2caaade 100644 --- a/include/linux/nfs_xdr.h +++ b/include/linux/nfs_xdr.h @@ -88,6 +88,67 @@ struct nfs_pathconf { }; /* + * Arguments to the open call. + */ +struct nfs_openargs { + struct nfs_fh * fh; + __u32 seqid; + __u32 share_access; + __u64 clientid; + __u32 id; + __u32 opentype; + __u32 createmode; + union { + struct iattr * attrs; /* UNCHECKED, GUARDED */ + nfs4_verifier verifier; /* EXCLUSIVE */ + } u; + struct qstr * name; + struct nfs4_getattr * f_getattr; + struct nfs4_getattr * d_getattr; + struct nfs_server * server; /* Needed for ID mapping */ +}; + +struct nfs_openres { + __u32 status; + nfs4_stateid stateid; + struct nfs_fh fh; + struct nfs4_change_info * cinfo; + __u32 rflags; + struct nfs4_getattr * f_getattr; + struct nfs4_getattr * d_getattr; + struct nfs_server * server; +}; + +/* + * Arguments to the open_confirm call. + */ +struct nfs_open_confirmargs { + struct nfs_fh * fh; + nfs4_stateid stateid; + __u32 seqid; +}; + +struct nfs_open_confirmres { + __u32 status; + nfs4_stateid stateid; +}; + +/* + * Arguments to the close call. + */ +struct nfs_closeargs { + struct nfs_fh * fh; + nfs4_stateid stateid; + __u32 seqid; +}; + +struct nfs_closeres { + __u32 status; + nfs4_stateid stateid; +}; + + +/* * Arguments to the read call. */ @@ -98,6 +159,7 @@ struct nfs_pathconf { struct nfs_readargs { struct nfs_fh * fh; + nfs4_stateid stateid; __u64 offset; __u32 count; unsigned int pgbase; @@ -120,6 +182,7 @@ struct nfs_readres { struct nfs_writeargs { struct nfs_fh * fh; + nfs4_stateid stateid; __u64 offset; __u32 count; enum nfs3_stable_how stable; @@ -182,6 +245,19 @@ struct nfs_renameargs { unsigned int tolen; }; +struct nfs_setattrargs { + struct nfs_fh * fh; + nfs4_stateid stateid; + struct iattr * iap; + struct nfs4_getattr * attr; + struct nfs_server * server; /* Needed for name mapping */ +}; + +struct nfs_setattrres { + struct nfs4_getattr * attr; + struct nfs_server * server; +}; + struct nfs_linkargs { struct nfs_fh * fromfh; struct nfs_fh * tofh; @@ -597,6 +673,7 @@ struct nfs_rpc_ops { void (*read_setup) (struct nfs_read_data *, unsigned int count); void (*write_setup) (struct nfs_write_data *, unsigned int count, int how); void (*commit_setup) (struct nfs_write_data *, u64 start, u32 len, int how); + int (*file_open) (struct inode *, struct file *); }; /* diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h index efe51537c564..b4d254418509 100644 --- a/include/linux/page-flags.h +++ b/include/linux/page-flags.h @@ -83,7 +83,6 @@ struct page_state { unsigned long nr_dirty; /* Dirty writeable pages */ unsigned long nr_writeback; /* Pages under writeback */ unsigned long nr_page_table_pages;/* Pages used for pagetables */ - unsigned long nr_reverse_maps; /* includes PageDirect */ unsigned long nr_mapped; /* mapped into pagetables */ unsigned long nr_slab; /* In slab */ #define GET_PAGE_STATE_LAST nr_slab diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 7af1d1d055a6..9f97fb7c9cc1 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1074,6 +1074,7 @@ #define PCI_DEVICE_ID_TTI_HPT374 0x0008 #define PCI_VENDOR_ID_VIA 0x1106 +#define PCI_DEVICE_ID_VIA_P4X600 0x0198 #define PCI_DEVICE_ID_VIA_8363_0 0x0305 #define PCI_DEVICE_ID_VIA_8371_0 0x0391 #define PCI_DEVICE_ID_VIA_8501_0 0x0501 @@ -1113,11 +1114,19 @@ #define PCI_DEVICE_ID_VIA_8653_0 0x3101 #define PCI_DEVICE_ID_VIA_8622 0x3102 #define PCI_DEVICE_ID_VIA_8233C_0 0x3109 -#define PCI_DEVICE_ID_VIA_8361 0x3112 +#define PCI_DEVICE_ID_VIA_8361 0x3112 +#define PCI_DEVICE_ID_VIA_KM266 0x3116 +#define PCI_DEVICE_ID_VIA_CLE266 0x3123 +#define PCI_DEVICE_ID_VIA_8753_0 0x3128 #define PCI_DEVICE_ID_VIA_8233A 0x3147 +#define PCI_DEVICE_ID_VIA_8752 0x3148 +#define PCI_DEVICE_ID_VIA_KN266 0x3156 #define PCI_DEVICE_ID_VIA_8754 0x3168 #define PCI_DEVICE_ID_VIA_8235 0x3177 +#define PCI_DEVICE_ID_VIA_P4N333 0x3178 #define PCI_DEVICE_ID_VIA_8377_0 0x3189 +#define PCI_DEVICE_ID_VIA_KM400 0x3205 +#define PCI_DEVICE_ID_VIA_P4M400 0x3209 #define PCI_DEVICE_ID_VIA_86C100A 0x6100 #define PCI_DEVICE_ID_VIA_8231 0x8231 #define PCI_DEVICE_ID_VIA_8231_4 0x8235 diff --git a/include/linux/scc.h b/include/linux/scc.h index c0f31c2caab0..4965e146b737 100644 --- a/include/linux/scc.h +++ b/include/linux/scc.h @@ -244,6 +244,9 @@ struct scc_channel { /* Timer */ struct timer_list tx_t; /* tx timer for this channel */ struct timer_list tx_wdog; /* tx watchdogs */ + + /* Channel lock */ + spinlock_t lock; /* Channel guard lock */ }; #endif /* defined(__KERNEL__) */ diff --git a/include/linux/sched.h b/include/linux/sched.h index f3b4c5891898..bbc51fac0cf6 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -686,7 +686,11 @@ static inline int thread_group_empty(task_t *p) extern void unhash_process(struct task_struct *p); -/* Protects ->fs, ->files, ->mm, and synchronises with wait4(). Nests inside tasklist_lock */ +/* Protects ->fs, ->files, ->mm, and synchronises with wait4(). + * Nests both inside and outside of read_lock(&tasklist_lock). + * It must not be nested with write_lock_irq(&tasklist_lock), + * neither inside nor outside. + */ static inline void task_lock(struct task_struct *p) { spin_lock(&p->alloc_lock); diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index 29a5f877d0f3..79b779f29c9f 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -129,6 +129,7 @@ enum KERN_CADPID=54, /* int: PID of the process to notify on CAD */ KERN_PIDMAX=55, /* int: PID # limit */ KERN_CORE_PATTERN=56, /* string: pattern for core-file names */ + KERN_PANIC_ON_OOPS=57, /* int: whether we will panic on an oops */ }; @@ -678,8 +679,8 @@ extern void sysctl_init(void); typedef struct ctl_table ctl_table; typedef int ctl_handler (ctl_table *table, int *name, int nlen, - void *oldval, size_t *oldlenp, - void *newval, size_t newlen, + void __user *oldval, size_t __user *oldlenp, + void __user *newval, size_t newlen, void **context); typedef int proc_handler (ctl_table *ctl, int write, struct file * filp, @@ -706,8 +707,8 @@ extern int do_sysctl (int *name, int nlen, extern int do_sysctl_strategy (ctl_table *table, int *name, int nlen, - void *oldval, size_t *oldlenp, - void *newval, size_t newlen, void ** context); + void __user *oldval, size_t __user *oldlenp, + void __user *newval, size_t newlen, void ** context); extern ctl_handler sysctl_string; extern ctl_handler sysctl_intvec; diff --git a/include/linux/time.h b/include/linux/time.h index 7f5be084e342..4d7238025fe9 100644 --- a/include/linux/time.h +++ b/include/linux/time.h @@ -31,7 +31,7 @@ struct timezone { * Have the 32 bit jiffies value wrap 5 minutes after boot * so jiffies wrap bugs show up earlier. */ -#define INITIAL_JIFFIES ((unsigned int) (-300*HZ)) +#define INITIAL_JIFFIES ((unsigned long)(unsigned int) (-300*HZ)) /* * Change timeval to jiffies, trying to avoid the diff --git a/include/media/saa7146.h b/include/media/saa7146.h new file mode 100644 index 000000000000..ac8544da416b --- /dev/null +++ b/include/media/saa7146.h @@ -0,0 +1,431 @@ +#ifndef __SAA7146__ +#define __SAA7146__ + +#include <linux/version.h> /* for version macros */ +#include <linux/module.h> /* for module-version */ +#include <linux/delay.h> /* for delay-stuff */ +#include <linux/slab.h> /* for kmalloc/kfree */ +#include <linux/pci.h> /* for pci-config-stuff, vendor ids etc. */ +#include <linux/wrapper.h> /* for mem_map_reserve */ +#include <linux/init.h> /* for "__init" */ +#include <linux/interrupt.h> /* for IMMEDIATE_BH */ +#include <linux/kmod.h> /* for kernel module loader */ +#include <linux/i2c.h> /* for i2c subsystem */ +#include <asm/io.h> /* for accessing devices */ +#include <linux/stringify.h> + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,51) + #include "compat.h" +#endif + +#define SAA7146_VERSION_CODE KERNEL_VERSION(0,5,0) + +#define saa7146_write(sxy,adr,dat) writel((dat),(sxy->mem+(adr))) +#define saa7146_read(sxy,adr) readl(sxy->mem+(adr)) + +extern unsigned int saa7146_debug; + +//#define DEBUG_PROLOG printk("(0x%08x)(0x%08x) %s: %s(): ",(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,RPS_ADDR0))),(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,IER))),__stringify(KBUILD_MODNAME),__FUNCTION__) + +#ifndef DEBUG_VARIABLE + #define DEBUG_VARIABLE saa7146_debug +#endif + +#define DEBUG_PROLOG printk("%s: %s(): ",__stringify(KBUILD_MODNAME),__FUNCTION__) +#define DEB_S(x) if (0!=(DEBUG_VARIABLE&0x01)) { DEBUG_PROLOG; printk x; } /* simple debug messages */ +#define DEB_D(x) if (0!=(DEBUG_VARIABLE&0x02)) { DEBUG_PROLOG; printk x; } /* more detailed debug messages */ +#define DEB_EE(x) if (0!=(DEBUG_VARIABLE&0x04)) { DEBUG_PROLOG; printk x; } /* print enter and exit of functions */ +#define DEB_I2C(x) if (0!=(DEBUG_VARIABLE&0x08)) { DEBUG_PROLOG; printk x; } /* i2c debug messages */ +#define DEB_VBI(x) if (0!=(DEBUG_VARIABLE&0x10)) { DEBUG_PROLOG; printk x; } /* vbi debug messages */ +#define DEB_INT(x) if (0!=(DEBUG_VARIABLE&0x20)) { DEBUG_PROLOG; printk x; } /* interrupt debug messages */ +#define DEB_CAP(x) if (0!=(DEBUG_VARIABLE&0x40)) { DEBUG_PROLOG; printk x; } /* capture debug messages */ + +#define ERR(x) { DEBUG_PROLOG; printk x; } +#define INFO(x) { printk("%s: ",__stringify(KBUILD_MODNAME)); printk x; } + +#define IER_DISABLE(x,y) \ + saa7146_write(x, IER, saa7146_read(x, IER) & ~(y)); +#define IER_ENABLE(x,y) \ + saa7146_write(x, IER, saa7146_read(x, IER) | (y)); + +struct saa7146_dev; +struct saa7146_extension; +struct saa7146_vv; + +/* saa7146 page table */ +struct saa7146_pgtable { + unsigned int size; + u32 *cpu; + dma_addr_t dma; + /* used for offsets for u,v planes for planar capture modes */ + unsigned long offset; +}; + +struct saa7146_pci_extension_data { + struct saa7146_extension *ext; + void *ext_priv; /* most likely a name string */ +}; + +#define MAKE_EXTENSION_PCI(x_var, x_vendor, x_device) \ + { \ + .vendor = PCI_VENDOR_ID_PHILIPS, \ + .device = PCI_DEVICE_ID_PHILIPS_SAA7146, \ + .subvendor = x_vendor, \ + .subdevice = x_device, \ + .driver_data = (unsigned long)& x_var, \ + } + +struct saa7146_extension +{ + char name[32]; /* name of the device */ +#define SAA7146_USE_I2C_IRQ 0x1 + int flags; + + struct saa7146_ext_vv *ext_vv_data; + + /* pairs of subvendor and subdevice ids for + supported devices, last entry 0xffff, 0xfff */ + struct module *module; + struct pci_driver driver; + struct pci_device_id *pci_tbl; + + /* extension functions */ + int (*probe)(struct saa7146_dev *); + int (*attach)(struct saa7146_dev *, struct saa7146_pci_extension_data *); + int (*detach)(struct saa7146_dev*); + + u32 irq_mask; /* mask to indicate, which irq-events are handled by the extension */ + void (*irq_func)(struct saa7146_dev*, u32* irq_mask); +}; + +struct saa7146_dev +{ + struct module *module; + + struct list_head item; + + /* different device locks */ + spinlock_t slock; + struct semaphore lock; + + unsigned char *mem; /* pointer to mapped IO memory */ + int revision; /* chip revision; needed for bug-workarounds*/ + + /* pci-device & irq stuff*/ + char name[32]; + struct pci_dev *pci; + u32 int_todo; + spinlock_t int_slock; + + /* extension handling */ + struct saa7146_extension *ext; /* indicates if handled by extension */ + void *ext_priv; /* pointer for extension private use (most likely some private data) */ + + /* per device video/vbi informations (if available) */ + struct saa7146_vv *vv_data; + void (*vv_callback)(struct saa7146_dev *dev, unsigned long status); + + /* i2c-stuff */ + struct semaphore i2c_lock; + u32 i2c_bitrate; + u32 *i2c_mem; /* pointer to i2c memory */ + wait_queue_head_t i2c_wq; + int i2c_op; + + /* memories */ + u32 *rps0; + u32 *rps1; +}; + +/* from saa7146_i2c.c */ +int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate); +int saa7146_i2c_transfer(struct saa7146_dev *saa, const struct i2c_msg msgs[], int num, int retries); + +/* from saa7146_core.c */ +extern struct list_head saa7146_devices; +extern struct semaphore saa7146_devices_lock; +int saa7146_register_extension(struct saa7146_extension*); +int saa7146_unregister_extension(struct saa7146_extension*); +struct saa7146_format* format_by_fourcc(struct saa7146_dev *dev, int fourcc); +int saa7146_pgtable_alloc(struct pci_dev *pci, struct saa7146_pgtable *pt); +void saa7146_pgtable_free(struct pci_dev *pci, struct saa7146_pgtable *pt); +void saa7146_pgtable_build_single(struct pci_dev *pci, struct saa7146_pgtable *pt, struct scatterlist *list, int length ); +char *saa7146_vmalloc_build_pgtable(struct pci_dev *pci, long length, struct saa7146_pgtable *pt); +void saa7146_setgpio(struct saa7146_dev *dev, int port, u32 data); + +/* some memory sizes */ +#define SAA7146_I2C_MEM ( 1*PAGE_SIZE) +#define SAA7146_RPS_MEM ( 1*PAGE_SIZE) + +/* some i2c constants */ +#define SAA7146_I2C_TIMEOUT 100 /* i2c-timeout-value in ms */ +#define SAA7146_I2C_RETRIES 3 /* how many times shall we retry an i2c-operation? */ +#define SAA7146_I2C_DELAY 5 /* time we wait after certain i2c-operations */ + +/* unsorted defines */ +#define ME1 0x0000000800 +#define PV1 0x0000000008 + +/* gpio defines */ +#define SAA7146_GPIO_INPUT 0x00 +#define SAA7146_GPIO_IRQHI 0x10 +#define SAA7146_GPIO_IRQLO 0x20 +#define SAA7146_GPIO_IRQHL 0x30 +#define SAA7146_GPIO_OUTLO 0x40 +#define SAA7146_GPIO_OUTHI 0x50 + +/* define for the register programming sequencer (rps) */ +#define CMD_NOP 0x00000000 /* No operation */ +#define CMD_CLR_EVENT 0x00000000 /* Clear event */ +#define CMD_SET_EVENT 0x10000000 /* Set signal event */ +#define CMD_PAUSE 0x20000000 /* Pause */ +#define CMD_CHECK_LATE 0x30000000 /* Check late */ +#define CMD_UPLOAD 0x40000000 /* Upload */ +#define CMD_STOP 0x50000000 /* Stop */ +#define CMD_INTERRUPT 0x60000000 /* Interrupt */ +#define CMD_JUMP 0x80000000 /* Jump */ +#define CMD_WR_REG 0x90000000 /* Write (load) register */ +#define CMD_RD_REG 0xa0000000 /* Read (store) register */ +#define CMD_WR_REG_MASK 0xc0000000 /* Write register with mask */ + +#define CMD_OAN MASK_27 +#define CMD_INV MASK_26 +#define CMD_SIG4 MASK_25 +#define CMD_SIG3 MASK_24 +#define CMD_SIG2 MASK_23 +#define CMD_SIG1 MASK_22 +#define CMD_SIG0 MASK_21 +#define CMD_O_FID_B MASK_14 +#define CMD_E_FID_B MASK_13 +#define CMD_O_FID_A MASK_12 +#define CMD_E_FID_A MASK_11 + +/* some events and command modifiers for rps1 squarewave generator */ +#define EVT_HS (1<<15) // Source Line Threshold reached +#define EVT_VBI_B (1<<9) // VSYNC Event +#define RPS_OAN (1<<27) // 1: OR events, 0: AND events +#define RPS_INV (1<<26) // Invert (compound) event +#define GPIO3_MSK 0xFF000000 // GPIO #3 control bits + +/* Bit mask constants */ +#define MASK_00 0x00000001 /* Mask value for bit 0 */ +#define MASK_01 0x00000002 /* Mask value for bit 1 */ +#define MASK_02 0x00000004 /* Mask value for bit 2 */ +#define MASK_03 0x00000008 /* Mask value for bit 3 */ +#define MASK_04 0x00000010 /* Mask value for bit 4 */ +#define MASK_05 0x00000020 /* Mask value for bit 5 */ +#define MASK_06 0x00000040 /* Mask value for bit 6 */ +#define MASK_07 0x00000080 /* Mask value for bit 7 */ +#define MASK_08 0x00000100 /* Mask value for bit 8 */ +#define MASK_09 0x00000200 /* Mask value for bit 9 */ +#define MASK_10 0x00000400 /* Mask value for bit 10 */ +#define MASK_11 0x00000800 /* Mask value for bit 11 */ +#define MASK_12 0x00001000 /* Mask value for bit 12 */ +#define MASK_13 0x00002000 /* Mask value for bit 13 */ +#define MASK_14 0x00004000 /* Mask value for bit 14 */ +#define MASK_15 0x00008000 /* Mask value for bit 15 */ +#define MASK_16 0x00010000 /* Mask value for bit 16 */ +#define MASK_17 0x00020000 /* Mask value for bit 17 */ +#define MASK_18 0x00040000 /* Mask value for bit 18 */ +#define MASK_19 0x00080000 /* Mask value for bit 19 */ +#define MASK_20 0x00100000 /* Mask value for bit 20 */ +#define MASK_21 0x00200000 /* Mask value for bit 21 */ +#define MASK_22 0x00400000 /* Mask value for bit 22 */ +#define MASK_23 0x00800000 /* Mask value for bit 23 */ +#define MASK_24 0x01000000 /* Mask value for bit 24 */ +#define MASK_25 0x02000000 /* Mask value for bit 25 */ +#define MASK_26 0x04000000 /* Mask value for bit 26 */ +#define MASK_27 0x08000000 /* Mask value for bit 27 */ +#define MASK_28 0x10000000 /* Mask value for bit 28 */ +#define MASK_29 0x20000000 /* Mask value for bit 29 */ +#define MASK_30 0x40000000 /* Mask value for bit 30 */ +#define MASK_31 0x80000000 /* Mask value for bit 31 */ + +#define MASK_B0 0x000000ff /* Mask value for byte 0 */ +#define MASK_B1 0x0000ff00 /* Mask value for byte 1 */ +#define MASK_B2 0x00ff0000 /* Mask value for byte 2 */ +#define MASK_B3 0xff000000 /* Mask value for byte 3 */ + +#define MASK_W0 0x0000ffff /* Mask value for word 0 */ +#define MASK_W1 0xffff0000 /* Mask value for word 1 */ + +#define MASK_PA 0xfffffffc /* Mask value for physical address */ +#define MASK_PR 0xfffffffe /* Mask value for protection register */ +#define MASK_ER 0xffffffff /* Mask value for the entire register */ + +#define MASK_NONE 0x00000000 /* No mask */ + +/* register aliases */ +#define BASE_ODD1 0x00 /* Video DMA 1 registers */ +#define BASE_EVEN1 0x04 +#define PROT_ADDR1 0x08 +#define PITCH1 0x0C +#define BASE_PAGE1 0x10 /* Video DMA 1 base page */ +#define NUM_LINE_BYTE1 0x14 + +#define BASE_ODD2 0x18 /* Video DMA 2 registers */ +#define BASE_EVEN2 0x1C +#define PROT_ADDR2 0x20 +#define PITCH2 0x24 +#define BASE_PAGE2 0x28 /* Video DMA 2 base page */ +#define NUM_LINE_BYTE2 0x2C + +#define BASE_ODD3 0x30 /* Video DMA 3 registers */ +#define BASE_EVEN3 0x34 +#define PROT_ADDR3 0x38 +#define PITCH3 0x3C +#define BASE_PAGE3 0x40 /* Video DMA 3 base page */ +#define NUM_LINE_BYTE3 0x44 + +#define PCI_BT_V1 0x48 /* Video/FIFO 1 */ +#define PCI_BT_V2 0x49 /* Video/FIFO 2 */ +#define PCI_BT_V3 0x4A /* Video/FIFO 3 */ +#define PCI_BT_DEBI 0x4B /* DEBI */ +#define PCI_BT_A 0x4C /* Audio */ + +#define DD1_INIT 0x50 /* Init setting of DD1 interface */ + +#define DD1_STREAM_B 0x54 /* DD1 B video data stream handling */ +#define DD1_STREAM_A 0x56 /* DD1 A video data stream handling */ + +#define BRS_CTRL 0x58 /* BRS control register */ +#define HPS_CTRL 0x5C /* HPS control register */ +#define HPS_V_SCALE 0x60 /* HPS vertical scale */ +#define HPS_V_GAIN 0x64 /* HPS vertical ACL and gain */ +#define HPS_H_PRESCALE 0x68 /* HPS horizontal prescale */ +#define HPS_H_SCALE 0x6C /* HPS horizontal scale */ +#define BCS_CTRL 0x70 /* BCS control */ +#define CHROMA_KEY_RANGE 0x74 +#define CLIP_FORMAT_CTRL 0x78 /* HPS outputs formats & clipping */ + +#define DEBI_CONFIG 0x7C +#define DEBI_COMMAND 0x80 +#define DEBI_PAGE 0x84 +#define DEBI_AD 0x88 + +#define I2C_TRANSFER 0x8C +#define I2C_STATUS 0x90 + +#define BASE_A1_IN 0x94 /* Audio 1 input DMA */ +#define PROT_A1_IN 0x98 +#define PAGE_A1_IN 0x9C + +#define BASE_A1_OUT 0xA0 /* Audio 1 output DMA */ +#define PROT_A1_OUT 0xA4 +#define PAGE_A1_OUT 0xA8 + +#define BASE_A2_IN 0xAC /* Audio 2 input DMA */ +#define PROT_A2_IN 0xB0 +#define PAGE_A2_IN 0xB4 + +#define BASE_A2_OUT 0xB8 /* Audio 2 output DMA */ +#define PROT_A2_OUT 0xBC +#define PAGE_A2_OUT 0xC0 + +#define RPS_PAGE0 0xC4 /* RPS task 0 page register */ +#define RPS_PAGE1 0xC8 /* RPS task 1 page register */ + +#define RPS_THRESH0 0xCC /* HBI threshold for task 0 */ +#define RPS_THRESH1 0xD0 /* HBI threshold for task 1 */ + +#define RPS_TOV0 0xD4 /* RPS timeout for task 0 */ +#define RPS_TOV1 0xD8 /* RPS timeout for task 1 */ + +#define IER 0xDC /* Interrupt enable register */ + +#define GPIO_CTRL 0xE0 /* GPIO 0-3 register */ + +#define EC1SSR 0xE4 /* Event cnt set 1 source select */ +#define EC2SSR 0xE8 /* Event cnt set 2 source select */ +#define ECT1R 0xEC /* Event cnt set 1 thresholds */ +#define ECT2R 0xF0 /* Event cnt set 2 thresholds */ + +#define ACON1 0xF4 +#define ACON2 0xF8 + +#define MC1 0xFC /* Main control register 1 */ +#define MC2 0x100 /* Main control register 2 */ + +#define RPS_ADDR0 0x104 /* RPS task 0 address register */ +#define RPS_ADDR1 0x108 /* RPS task 1 address register */ + +#define ISR 0x10C /* Interrupt status register */ +#define PSR 0x110 /* Primary status register */ +#define SSR 0x114 /* Secondary status register */ + +#define EC1R 0x118 /* Event counter set 1 register */ +#define EC2R 0x11C /* Event counter set 2 register */ + +#define PCI_VDP1 0x120 /* Video DMA pointer of FIFO 1 */ +#define PCI_VDP2 0x124 /* Video DMA pointer of FIFO 2 */ +#define PCI_VDP3 0x128 /* Video DMA pointer of FIFO 3 */ +#define PCI_ADP1 0x12C /* Audio DMA pointer of audio out 1 */ +#define PCI_ADP2 0x130 /* Audio DMA pointer of audio in 1 */ +#define PCI_ADP3 0x134 /* Audio DMA pointer of audio out 2 */ +#define PCI_ADP4 0x138 /* Audio DMA pointer of audio in 2 */ +#define PCI_DMA_DDP 0x13C /* DEBI DMA pointer */ + +#define LEVEL_REP 0x140, +#define A_TIME_SLOT1 0x180, /* from 180 - 1BC */ +#define A_TIME_SLOT2 0x1C0, /* from 1C0 - 1FC */ + +/* isr masks */ +#define SPCI_PPEF 0x80000000 /* PCI parity error */ +#define SPCI_PABO 0x40000000 /* PCI access error (target or master abort) */ +#define SPCI_PPED 0x20000000 /* PCI parity error on 'real time data' */ +#define SPCI_RPS_I1 0x10000000 /* Interrupt issued by RPS1 */ +#define SPCI_RPS_I0 0x08000000 /* Interrupt issued by RPS0 */ +#define SPCI_RPS_LATE1 0x04000000 /* RPS task 1 is late */ +#define SPCI_RPS_LATE0 0x02000000 /* RPS task 0 is late */ +#define SPCI_RPS_E1 0x01000000 /* RPS error from task 1 */ +#define SPCI_RPS_E0 0x00800000 /* RPS error from task 0 */ +#define SPCI_RPS_TO1 0x00400000 /* RPS timeout task 1 */ +#define SPCI_RPS_TO0 0x00200000 /* RPS timeout task 0 */ +#define SPCI_UPLD 0x00100000 /* RPS in upload */ +#define SPCI_DEBI_S 0x00080000 /* DEBI status */ +#define SPCI_DEBI_E 0x00040000 /* DEBI error */ +#define SPCI_IIC_S 0x00020000 /* I2C status */ +#define SPCI_IIC_E 0x00010000 /* I2C error */ +#define SPCI_A2_IN 0x00008000 /* Audio 2 input DMA protection / limit */ +#define SPCI_A2_OUT 0x00004000 /* Audio 2 output DMA protection / limit */ +#define SPCI_A1_IN 0x00002000 /* Audio 1 input DMA protection / limit */ +#define SPCI_A1_OUT 0x00001000 /* Audio 1 output DMA protection / limit */ +#define SPCI_AFOU 0x00000800 /* Audio FIFO over- / underflow */ +#define SPCI_V_PE 0x00000400 /* Video protection address */ +#define SPCI_VFOU 0x00000200 /* Video FIFO over- / underflow */ +#define SPCI_FIDA 0x00000100 /* Field ID video port A */ +#define SPCI_FIDB 0x00000080 /* Field ID video port B */ +#define SPCI_PIN3 0x00000040 /* GPIO pin 3 */ +#define SPCI_PIN2 0x00000020 /* GPIO pin 2 */ +#define SPCI_PIN1 0x00000010 /* GPIO pin 1 */ +#define SPCI_PIN0 0x00000008 /* GPIO pin 0 */ +#define SPCI_ECS 0x00000004 /* Event counter 1, 2, 4, 5 */ +#define SPCI_EC3S 0x00000002 /* Event counter 3 */ +#define SPCI_EC0S 0x00000001 /* Event counter 0 */ + +/* i2c */ +#define SAA7146_I2C_ABORT (1<<7) +#define SAA7146_I2C_SPERR (1<<6) +#define SAA7146_I2C_APERR (1<<5) +#define SAA7146_I2C_DTERR (1<<4) +#define SAA7146_I2C_DRERR (1<<3) +#define SAA7146_I2C_AL (1<<2) +#define SAA7146_I2C_ERR (1<<1) +#define SAA7146_I2C_BUSY (1<<0) + +#define SAA7146_I2C_START (0x3) +#define SAA7146_I2C_CONT (0x2) +#define SAA7146_I2C_STOP (0x1) +#define SAA7146_I2C_NOP (0x0) + +#define SAA7146_I2C_BUS_BIT_RATE_6400 (0x500) +#define SAA7146_I2C_BUS_BIT_RATE_3200 (0x100) +#define SAA7146_I2C_BUS_BIT_RATE_480 (0x400) +#define SAA7146_I2C_BUS_BIT_RATE_320 (0x600) +#define SAA7146_I2C_BUS_BIT_RATE_240 (0x700) +#define SAA7146_I2C_BUS_BIT_RATE_120 (0x000) +#define SAA7146_I2C_BUS_BIT_RATE_80 (0x200) +#define SAA7146_I2C_BUS_BIT_RATE_60 (0x300) + +#endif + diff --git a/include/media/saa7146_vv.h b/include/media/saa7146_vv.h new file mode 100644 index 000000000000..f45c32a4c86a --- /dev/null +++ b/include/media/saa7146_vv.h @@ -0,0 +1,269 @@ +#ifndef __SAA7146_VV__ +#define __SAA7146_VV__ + +#include <linux/videodev2.h> + +#include <media/saa7146.h> +#include <media/video-buf.h> + +#define MAX_SAA7146_CAPTURE_BUFFERS 32 /* arbitrary */ +#define BUFFER_TIMEOUT (HZ/2) /* 0.5 seconds */ + +struct saa7146_video_dma { + u32 base_odd; + u32 base_even; + u32 prot_addr; + u32 pitch; + u32 base_page; + u32 num_line_byte; +}; + +struct saa7146_format { + char *name; + int pixelformat; + u32 trans; + u8 depth; + int swap; +}; + +struct saa7146_standard +{ + char *name; + v4l2_std_id id; + + int v_offset; + int v_field; + int v_calc; + + int h_offset; + int h_pixels; + int h_calc; + + int v_max_out; + int h_max_out; +}; + +/* buffer for one video/vbi frame */ +struct saa7146_buf { + /* common v4l buffer stuff -- must be first */ + struct videobuf_buffer vb; + + /* saa7146 specific */ + struct v4l2_pix_format *fmt; + int (*activate)(struct saa7146_dev *dev, + struct saa7146_buf *buf, + struct saa7146_buf *next); + + /* page tables */ + struct saa7146_pgtable pt[3]; +}; + +struct saa7146_dmaqueue { + struct saa7146_dev *dev; + struct saa7146_buf *curr; + struct list_head queue; + struct timer_list timeout; +}; + +struct saa7146_overlay { + struct saa7146_fh *fh; + struct v4l2_window win; + struct v4l2_clip clips[16]; + int nclips; +}; + +/* per open data */ +struct saa7146_fh { + struct saa7146_dev *dev; + /* if this is a vbi or capture open */ + enum v4l2_buf_type type; + + /* video overlay */ + struct saa7146_overlay ov; + + /* video capture */ + struct videobuf_queue video_q; + struct v4l2_pix_format video_fmt; + + /* vbi capture */ + struct videobuf_queue vbi_q; + struct v4l2_vbi_format vbi_fmt; + struct timer_list vbi_read_timeout; +}; + +struct saa7146_vv +{ + int vbi_minor; + + /* vbi capture */ + struct saa7146_dmaqueue vbi_q; + /* vbi workaround interrupt queue */ + wait_queue_head_t vbi_wq; + int vbi_fieldcount; + struct saa7146_fh *vbi_streaming; + + int video_minor; + + /* video overlay */ + struct v4l2_framebuffer ov_fb; + struct saa7146_format *ov_fmt; + struct saa7146_overlay *ov_data; + + /* video capture */ + struct saa7146_dmaqueue video_q; + struct saa7146_fh *streaming; + + /* common: fixme? shouldn't this be in saa7146_fh? + (this leads to a more complicated question: shall the driver + store the different settings (for example S_INPUT) for every open + and restore it appropriately, or should all settings be common for + all opens? currently, we do the latter, like all other + drivers do... */ + struct saa7146_standard *standard; + + int vflip; + int hflip; + int current_hps_source; + int current_hps_sync; + + u32 *clipping; /* pointer to clipping memory */ +}; + +#define SAA7146_EXCLUSIVE 0x1 +#define SAA7146_BEFORE 0x2 +#define SAA7146_AFTER 0x4 + +struct saa7146_extension_ioctls +{ + unsigned int cmd; + int flags; +}; + +/* flags */ +#define SAA7146_EXT_SWAP_ODD_EVEN 0x1 /* needs odd/even fields swapped */ + +struct saa7146_ext_vv +{ + /* informations about the video capabilities of the device */ + int inputs; + int audios; + u32 capabilities; + int flags; + + /* additionally supported transmission standards */ + struct saa7146_standard *stds; + int num_stds; + int (*std_callback)(struct saa7146_dev*, struct saa7146_standard *); + + struct saa7146_extension_ioctls *ioctls; + int (*ioctl)(struct saa7146_dev*, unsigned int cmd, void *arg); +}; + +struct saa7146_use_ops { + void (*init)(struct saa7146_dev *, struct saa7146_vv *); + void(*open)(struct saa7146_dev *, struct saa7146_fh *); + void (*release)(struct saa7146_dev *, struct saa7146_fh *,struct file *); + void (*irq_done)(struct saa7146_dev *, unsigned long status); + ssize_t (*read)(struct file *, char *, size_t, loff_t *); + int (*capture_begin)(struct saa7146_fh *); + int (*capture_end)(struct saa7146_fh *); +}; + +/* from saa7146_fops.c */ +int saa7146_register_device(struct video_device *vid, struct saa7146_dev* dev, char *name, int type); +int saa7146_unregister_device(struct video_device *vid, struct saa7146_dev* dev); +void saa7146_buffer_finish(struct saa7146_dev *dev, struct saa7146_dmaqueue *q, int state); +void saa7146_buffer_next(struct saa7146_dev *dev, struct saa7146_dmaqueue *q,int vbi); +int saa7146_buffer_queue(struct saa7146_dev *dev, struct saa7146_dmaqueue *q, struct saa7146_buf *buf); +void saa7146_buffer_timeout(unsigned long data); +void saa7146_dma_free(struct saa7146_dev *dev,struct saa7146_buf *buf); + +int saa7146_vv_init(struct saa7146_dev* dev); +int saa7146_vv_release(struct saa7146_dev* dev); + + +/* from saa7146_hlp.c */ +void saa7146_set_overlay(struct saa7146_dev *dev, struct saa7146_fh *fh, int v); +void saa7146_set_capture(struct saa7146_dev *dev, struct saa7146_buf *buf, struct saa7146_buf *next); +void saa7146_write_out_dma(struct saa7146_dev* dev, int which, struct saa7146_video_dma* vdma) ; +void saa7146_set_hps_source_and_sync(struct saa7146_dev *saa, int source, int sync); +void saa7146_set_gpio(struct saa7146_dev *saa, u8 pin, u8 data); + +/* from saa7146_video.c */ +extern struct saa7146_use_ops saa7146_video_uops; + +/* from saa7146_vbi.c */ +extern struct saa7146_use_ops saa7146_vbi_uops; + +/* saa7146 source inputs */ +#define SAA7146_HPS_SOURCE_PORT_A 0x00 +#define SAA7146_HPS_SOURCE_PORT_B 0x01 +#define SAA7146_HPS_SOURCE_YPB_CPA 0x02 +#define SAA7146_HPS_SOURCE_YPA_CPB 0x03 + +/* sync inputs */ +#define SAA7146_HPS_SYNC_PORT_A 0x00 +#define SAA7146_HPS_SYNC_PORT_B 0x01 + +/* number of vertical active lines */ +#define V_ACTIVE_LINES_PAL 576 +#define V_ACTIVE_LINES_NTSC 480 +#define V_ACTIVE_LINES_SECAM 576 + +/* number of lines in a field for HPS to process */ +#define V_FIELD_PAL 288 +#define V_FIELD_NTSC 240 +#define V_FIELD_SECAM 288 + +/* number of lines of vertical offset before processing */ +#define V_OFFSET_PAL 0x17 +#define V_OFFSET_NTSC 0x16 +#define V_OFFSET_SECAM 0x14 + +/* number of horizontal pixels to process */ +#define H_PIXELS_PAL 680 +#define H_PIXELS_NTSC 708 +#define H_PIXELS_SECAM 720 + +/* horizontal offset of processing window */ +#define H_OFFSET_PAL 0x14 +#define H_OFFSET_NTSC 0x06 +#define H_OFFSET_SECAM 0x14 + +#define SAA7146_PAL_VALUES V_OFFSET_PAL, V_FIELD_PAL, V_ACTIVE_LINES_PAL, H_OFFSET_PAL, H_PIXELS_PAL, H_PIXELS_PAL+1, V_ACTIVE_LINES_PAL, 768 +#define SAA7146_NTSC_VALUES V_OFFSET_NTSC, V_FIELD_NTSC, V_ACTIVE_LINES_NTSC, H_OFFSET_NTSC, H_PIXELS_NTSC, H_PIXELS_NTSC+1, V_ACTIVE_LINES_NTSC, 640 +#define SAA7146_SECAM_VALUES V_OFFSET_SECAM, V_FIELD_SECAM, V_ACTIVE_LINES_SECAM, H_OFFSET_SECAM, H_PIXELS_SECAM, H_PIXELS_SECAM+1, V_ACTIVE_LINES_SECAM, 768 + +/* some memory sizes */ +#define SAA7146_CLIPPING_MEM (14*PAGE_SIZE) + +/* some defines for the various clipping-modes */ +#define SAA7146_CLIPPING_RECT 0x4 +#define SAA7146_CLIPPING_RECT_INVERTED 0x5 +#define SAA7146_CLIPPING_MASK 0x6 +#define SAA7146_CLIPPING_MASK_INVERTED 0x7 + +/* output formats: each entry holds four informations */ +#define RGB08_COMPOSED 0x0217 /* composed is used in the sense of "not-planar" */ +/* this means: planar?=0, yuv2rgb-conversation-mode=2, dither=yes(=1), format-mode = 7 */ +#define RGB15_COMPOSED 0x0213 +#define RGB16_COMPOSED 0x0210 +#define RGB24_COMPOSED 0x0201 +#define RGB32_COMPOSED 0x0202 + +#define Y8 0x0006 +#define YUV411_COMPOSED 0x0003 +#define YUV422_COMPOSED 0x0000 +/* this means: planar?=1, yuv2rgb-conversion-mode=0, dither=no(=0), format-mode = b */ +#define YUV411_DECOMPOSED 0x100b +#define YUV422_DECOMPOSED 0x1009 +#define YUV420_DECOMPOSED 0x100a + +#define IS_PLANAR(x) (x & 0xf000) + +/* misc defines */ +#define SAA7146_NO_SWAP (0x0) +#define SAA7146_TWO_BYTE_SWAP (0x1) +#define SAA7146_FOUR_BYTE_SWAP (0x2) + +#endif diff --git a/include/net/tcp.h b/include/net/tcp.h index b652650286fe..8844d3f3d8f9 100644 --- a/include/net/tcp.h +++ b/include/net/tcp.h @@ -31,6 +31,7 @@ #include <linux/percpu.h> #include <net/checksum.h> #include <net/sock.h> +#include <net/snmp.h> #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) #include <linux/ipv6.h> #endif @@ -639,6 +640,8 @@ DECLARE_SNMP_STAT(struct tcp_mib, tcp_statistics); #define TCP_INC_STATS_BH(field) SNMP_INC_STATS_BH(tcp_statistics, field) #define TCP_INC_STATS_USER(field) SNMP_INC_STATS_USER(tcp_statistics, field) #define TCP_DEC_STATS(field) SNMP_DEC_STATS(tcp_statistics, field) +#define TCP_ADD_STATS_BH(field, val) SNMP_ADD_STATS_BH(tcp_statistics, field, val) +#define TCP_ADD_STATS_USER(field, val) SNMP_ADD_STATS_USER(tcp_statistics, field, val) extern __inline__ void tcp_put_port(struct sock *sk); extern void tcp_inherit_port(struct sock *sk, struct sock *child); @@ -1398,6 +1401,9 @@ static __inline__ void tcp_set_state(struct sock *sk, int state) break; case TCP_CLOSE: + if (oldstate == TCP_CLOSE_WAIT || oldstate == TCP_ESTABLISHED) + TCP_INC_STATS(TcpEstabResets); + sk->prot->unhash(sk); if (sk->prev && !(sk->userlocks&SOCK_BINDPORT_LOCK)) tcp_put_port(sk); @@ -1878,4 +1884,13 @@ static inline int tcp_use_frto(const struct sock *sk) tp->snd_una + tp->snd_wnd)); } +static inline void tcp_mib_init(void) +{ + /* See RFC 2012 */ + TCP_ADD_STATS_USER(TcpRtoAlgorithm, 1); + TCP_ADD_STATS_USER(TcpRtoMin, TCP_RTO_MIN*1000/HZ); + TCP_ADD_STATS_USER(TcpRtoMax, TCP_RTO_MAX*1000/HZ); + TCP_ADD_STATS_USER(TcpMaxConn, -1); +} + #endif /* _TCP_H */ diff --git a/include/net/xfrm.h b/include/net/xfrm.h index fe32e5c32354..b75d2651adf0 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -84,6 +84,7 @@ extern struct semaphore xfrm_cfg_sem; /* Full description of state of transformer. */ struct xfrm_state { + /* Note: bydst is re-used during gc */ struct list_head bydst; struct list_head byspi; diff --git a/include/sound/memalloc.h b/include/sound/memalloc.h index 3871390993e2..02d57069a6f9 100644 --- a/include/sound/memalloc.h +++ b/include/sound/memalloc.h @@ -178,7 +178,7 @@ static inline dma_addr_t snd_sgbuf_get_addr(struct snd_sg_buf *sgbuf, size_t off /* * wrappers */ -#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 4, 0) + #ifdef CONFIG_PCI #if defined(__i386__) || defined(__ppc__) || defined(__x86_64__) #define HACK_PCI_ALLOC_CONSISTENT @@ -187,7 +187,6 @@ void *snd_pci_hack_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle); #endif /* arch */ #endif /* CONFIG_PCI */ -#endif /* LINUX >= 2.4.0 */ #endif /* __SOUND_MEMALLOC_H */ |