diff options
| author | James Simmons <jsimmons@bohr.(none)> | 2004-02-05 11:29:41 -0800 |
|---|---|---|
| committer | James Simmons <jsimmons@bohr.(none)> | 2004-02-05 11:29:41 -0800 |
| commit | 9ca5ce6c52c0de4812cd6631d9a85d4782226d45 (patch) | |
| tree | af7ba9491d76059b6c782c8ec6fee14d0c7e3d78 /include | |
| parent | 13ffe14293ec2c45c11ebc3ed0281724d0d22287 (diff) | |
| parent | d925eab60387b18a46b036d8812c0b2166a70332 (diff) | |
Merge bk://fbdev.bkbits.net/fbdev-2.6
into bohr.(none):/usr/src/fbdev-2.6
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-parisc/cache.h | 5 | ||||
| -rw-r--r-- | include/asm-parisc/compat.h | 14 | ||||
| -rw-r--r-- | include/asm-parisc/compat_rt_sigframe.h | 50 | ||||
| -rw-r--r-- | include/asm-parisc/compat_signal.h | 2 | ||||
| -rw-r--r-- | include/asm-parisc/compat_ucontext.h | 18 | ||||
| -rw-r--r-- | include/asm-parisc/pci.h | 9 | ||||
| -rw-r--r-- | include/asm-parisc/pdc.h | 6 | ||||
| -rw-r--r-- | include/asm-parisc/posix_types.h | 2 | ||||
| -rw-r--r-- | include/asm-parisc/rt_sigframe.h | 31 | ||||
| -rw-r--r-- | include/asm-parisc/siginfo.h | 2 | ||||
| -rw-r--r-- | include/asm-parisc/superio.h | 42 | ||||
| -rw-r--r-- | include/asm-parisc/uaccess.h | 26 | ||||
| -rw-r--r-- | include/linux/ioport.h | 2 |
13 files changed, 150 insertions, 59 deletions
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h index a6288967daff..c62fe66400f1 100644 --- a/include/asm-parisc/cache.h +++ b/include/asm-parisc/cache.h @@ -7,7 +7,6 @@ #include <linux/config.h> -#ifndef __ASSEMBLY__ /* * PA 2.0 processors have 64-byte cachelines; PA 1.1 processors have * 32-byte cachelines. The default configuration is not for SMP anyway, @@ -24,13 +23,13 @@ #define L1_CACHE_SHIFT 5 #endif +#ifndef __ASSEMBLY__ + #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #define SMP_CACHE_BYTES L1_CACHE_BYTES #define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */ -#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) - extern void flush_data_cache_local(void); /* flushes local data-cache only */ extern void flush_instruction_cache_local(void); /* flushes local code-cache only */ #ifdef CONFIG_SMP diff --git a/include/asm-parisc/compat.h b/include/asm-parisc/compat.h index cbb696307310..3edb5db3eace 100644 --- a/include/asm-parisc/compat.h +++ b/include/asm-parisc/compat.h @@ -24,6 +24,7 @@ typedef u16 compat_nlink_t; typedef u16 compat_ipc_pid_t; typedef s32 compat_daddr_t; typedef u32 compat_caddr_t; +typedef u32 compat_timer_t; typedef s32 compat_int_t; typedef s32 compat_long_t; @@ -101,6 +102,15 @@ struct compat_statfs { s32 f_spare[5]; }; +struct compat_sigcontext { + compat_int_t sc_flags; + compat_int_t sc_gr[32]; /* PSW in sc_gr[0] */ + u64 sc_fr[32]; + compat_int_t sc_iasq[2]; + compat_int_t sc_iaoq[2]; + compat_int_t sc_sar; /* cr11 */ +}; + #define COMPAT_RLIM_INFINITY 0xffffffff typedef u32 compat_old_sigset_t; /* at least 32 bits */ @@ -129,9 +139,7 @@ static inline void *compat_ptr(compat_uptr_t uptr) static __inline__ void *compat_alloc_user_space(long len) { struct pt_regs *regs = ¤t->thread.regs; - unsigned long usp = regs->gr[30]; - - return (void *)(usp + len); + return (void *)regs->gr[30]; } #endif /* _ASM_PARISC_COMPAT_H */ diff --git a/include/asm-parisc/compat_rt_sigframe.h b/include/asm-parisc/compat_rt_sigframe.h new file mode 100644 index 000000000000..81bec28bdc48 --- /dev/null +++ b/include/asm-parisc/compat_rt_sigframe.h @@ -0,0 +1,50 @@ +#include<linux/compat.h> +#include<linux/compat_siginfo.h> +#include<asm/compat_ucontext.h> + +#ifndef _ASM_PARISC_COMPAT_RT_SIGFRAME_H +#define _ASM_PARISC_COMPAT_RT_SIGFRAME_H + +/* In a deft move of uber-hackery, we decide to carry the top half of all + * 64-bit registers in a non-portable, non-ABI, hidden structure. + * Userspace can read the hidden structure if it *wants* but is never + * guaranteed to be in the same place. Infact the uc_sigmask from the + * ucontext_t structure may push the hidden register file downards + */ +struct compat_regfile { + /* Upper half of all the 64-bit registers that were truncated + on a copy to a 32-bit userspace */ + compat_int_t rf_gr[32]; + compat_int_t rf_iasq[2]; + compat_int_t rf_iaoq[2]; + compat_int_t rf_sar; +}; + +#define COMPAT_SIGRETURN_TRAMP 4 +#define COMPAT_SIGRESTARTBLOCK_TRAMP 5 +#define COMPAT_TRAMP_SIZE (COMPAT_SIGRETURN_TRAMP + COMPAT_SIGRESTARTBLOCK_TRAMP) + +struct compat_rt_sigframe { + /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c + Secondary to that it must protect the ERESTART_RESTARTBLOCK + trampoline we left on the stack (we were bad and didn't + change sp so we could run really fast.) */ + compat_uint_t tramp[COMPAT_TRAMP_SIZE]; + compat_siginfo_t info; + struct compat_ucontext uc; + /* Hidden location of truncated registers, *must* be last. */ + struct compat_regfile regs; +}; + +/* + * The 32-bit ABI wants at least 48 bytes for a function call frame: + * 16 bytes for arg0-arg3, and 32 bytes for magic (the only part of + * which Linux/parisc uses is sp-20 for the saved return pointer...) + * Then, the stack pointer must be rounded to a cache line (64 bytes). + */ +#define SIGFRAME32 64 +#define FUNCTIONCALLFRAME32 48 +#define PARISC_RT_SIGFRAME_SIZE32 \ + (((sizeof(struct compat_rt_sigframe) + FUNCTIONCALLFRAME32) + SIGFRAME32) & -SIGFRAME32) + +#endif diff --git a/include/asm-parisc/compat_signal.h b/include/asm-parisc/compat_signal.h new file mode 100644 index 000000000000..6ad02c360b21 --- /dev/null +++ b/include/asm-parisc/compat_signal.h @@ -0,0 +1,2 @@ +/* Use generic */ +#include <asm-generic/compat_signal.h> diff --git a/include/asm-parisc/compat_ucontext.h b/include/asm-parisc/compat_ucontext.h new file mode 100644 index 000000000000..a1228a3d2071 --- /dev/null +++ b/include/asm-parisc/compat_ucontext.h @@ -0,0 +1,18 @@ +#ifndef _ASM_PARISC_COMPAT_UCONTEXT_H +#define _ASM_PARISC_COMPAT_UCONTEXT_H + +#include<linux/compat.h> +#include<asm/compat_signal.h> + +/* 32-bit ucontext as seen from an 64-bit kernel */ +struct compat_ucontext { + compat_uint_t uc_flags; + compat_uptr_t uc_link; + compat_stack_t uc_stack; /* struct compat_sigaltstack (12 bytes)*/ + /* FIXME: Pad out to get uc_mcontext to start at an 8-byte aligned boundary */ + compat_uint_t pad[1]; + struct compat_sigcontext uc_mcontext; + compat_sigset_t uc_sigmask; /* mask last for extensibility */ +}; + +#endif /* !_ASM_PARISC_COMPAT_UCONTEXT_H */ diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index aca998aef8f1..d5dca01282f0 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h @@ -29,7 +29,8 @@ #ifdef PCI_DEBUG #define ASSERT(expr) \ if(!(expr)) { \ - printk( "\n" __FILE__ ":%d: Assertion " #expr " failed!\n",__LINE__); \ + printk("\n%s:%d: Assertion " #expr " failed!\n", \ + __FILE__, __LINE__); \ panic(#expr); \ } #else @@ -55,6 +56,12 @@ struct pci_hba_data { struct resource io_space; /* PIOP */ struct resource lmmio_space; /* bus addresses < 4Gb */ struct resource elmmio_space; /* additional bus addresses < 4Gb */ + struct resource gmmio_space; /* bus addresses > 4Gb */ + /* NOTE: Dino code assumes it can use *all* of the lmmio_space, + * elmmio_space and gmmio_space as a contiguous array of + * resources. This #define represents the array size */ + #define DINO_MAX_LMMIO_RESOURCES 3 + unsigned long lmmio_space_offset; /* CPU view - PCI view */ void * iommu; /* IOMMU this device is under */ /* REVISIT - spinlock to protect resources? */ diff --git a/include/asm-parisc/pdc.h b/include/asm-parisc/pdc.h index b3214f1bfe53..c49f73b1860f 100644 --- a/include/asm-parisc/pdc.h +++ b/include/asm-parisc/pdc.h @@ -478,7 +478,11 @@ extern int pdc_type; #define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */ #define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */ -#define is_pdc_pat() (pdc_type == PDC_TYPE_PAT) +#ifdef CONFIG_PARISC64 +#define is_pdc_pat() (PDC_TYPE_PAT == pdc_type) +#else +#define is_pdc_pat() (0) +#endif struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */ unsigned long actcnt; /* actual number of bytes returned */ diff --git a/include/asm-parisc/posix_types.h b/include/asm-parisc/posix_types.h index dc91ca54b78f..eb1962417b65 100644 --- a/include/asm-parisc/posix_types.h +++ b/include/asm-parisc/posix_types.h @@ -29,7 +29,7 @@ typedef long __kernel_time_t; typedef unsigned int __kernel_size_t; typedef int __kernel_ssize_t; typedef int __kernel_ptrdiff_t; -typedef int __kernel_time_t; +typedef long __kernel_time_t; #endif typedef char * __kernel_caddr_t; diff --git a/include/asm-parisc/rt_sigframe.h b/include/asm-parisc/rt_sigframe.h index a9b5193ff27a..5623c032b64c 100644 --- a/include/asm-parisc/rt_sigframe.h +++ b/include/asm-parisc/rt_sigframe.h @@ -1,32 +1,27 @@ #ifndef _ASM_PARISC_RT_SIGFRAME_H #define _ASM_PARISC_RT_SIGFRAME_H +#ifdef CONFIG_COMPAT +#include <asm/compat_rt_sigframe.h> +#endif + +#define SIGRETURN_TRAMP 4 +#define SIGRESTARTBLOCK_TRAMP 5 +#define TRAMP_SIZE (SIGRETURN_TRAMP + SIGRESTARTBLOCK_TRAMP) + struct rt_sigframe { - unsigned int tramp[4]; + /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c + Secondary to that it must protect the ERESTART_RESTARTBLOCK + trampoline we left on the stack (we were bad and didn't + change sp so we could run really fast.) */ + unsigned int tramp[TRAMP_SIZE]; struct siginfo info; struct ucontext uc; }; -/* - * The 32-bit ABI wants at least 48 bytes for a function call frame: - * 16 bytes for arg0-arg3, and 32 bytes for magic (the only part of - * which Linux/parisc uses is sp-20 for the saved return pointer...) - * Then, the stack pointer must be rounded to a cache line (64 bytes). - */ -#define SIGFRAME32 64 -#define FUNCTIONCALLFRAME32 48 -#define PARISC_RT_SIGFRAME_SIZE32 \ - (((sizeof(struct rt_sigframe) + FUNCTIONCALLFRAME32) + SIGFRAME32) & -SIGFRAME32) - -#ifdef __LP64__ #define SIGFRAME 128 #define FUNCTIONCALLFRAME 96 #define PARISC_RT_SIGFRAME_SIZE \ (((sizeof(struct rt_sigframe) + FUNCTIONCALLFRAME) + SIGFRAME) & -SIGFRAME) -#else -#define SIGFRAME SIGFRAME32 -#define FUNCTIONCALLFRAME FUNCTIONCALLFRAME32 -#define PARISC_RT_SIGFRAME_SIZE PARISC_RT_SIGFRAME_SIZE32 -#endif #endif diff --git a/include/asm-parisc/siginfo.h b/include/asm-parisc/siginfo.h index da7dbc4dba93..d4909f55fe35 100644 --- a/include/asm-parisc/siginfo.h +++ b/include/asm-parisc/siginfo.h @@ -1,8 +1,6 @@ #ifndef _PARISC_SIGINFO_H #define _PARISC_SIGINFO_H -#define HAVE_ARCH_COPY_SIGINFO_TO_USER - #include <asm-generic/siginfo.h> /* diff --git a/include/asm-parisc/superio.h b/include/asm-parisc/superio.h index 3002facccdf3..83cdf600d2cd 100644 --- a/include/asm-parisc/superio.h +++ b/include/asm-parisc/superio.h @@ -1,25 +1,33 @@ #ifndef _PARISC_SUPERIO_H #define _PARISC_SUPERIO_H -/* Offsets to configuration and base address registers */ #define IC_PIC1 0x20 /* PCI I/O address of master 8259 */ #define IC_PIC2 0xA0 /* PCI I/O address of slave */ + +/* Config Space Offsets to configuration and base address registers */ #define SIO_CR 0x5A /* Configuration Register */ -#define SIO_ACPIBAR 0x88 /* ACPI BAR */ +#define SIO_ACPIBAR 0x88 /* ACPI BAR */ #define SIO_FDCBAR 0x90 /* Floppy Disk Controller BAR */ #define SIO_SP1BAR 0x94 /* Serial 1 BAR */ #define SIO_SP2BAR 0x98 /* Serial 2 BAR */ #define SIO_PPBAR 0x9C /* Parallel BAR */ -/* Interrupt triggers and routing */ #define TRIGGER_1 0x67 /* Edge/level trigger register 1 */ #define TRIGGER_2 0x68 /* Edge/level trigger register 2 */ -#define IR_SER 0x69 /* Serial 1 [0:3] and Serial 2 [4:7] */ -#define IR_PFD 0x6a /* Parallel [0:3] and Floppy [4:7] */ -#define IR_IDE 0x6b /* IDE1 [0:3] and IDE2 [4:7] */ -#define IR_USB 0x6d /* USB [4:7] */ -#define IR_LOW 0x69 /* Lowest interrupt routing reg */ -#define IR_HIGH 0x71 /* Highest interrupt routing reg */ + +/* Interrupt Routing Control registers */ +#define CFG_IR_SER 0x69 /* Serial 1 [0:3] and Serial 2 [4:7] */ +#define CFG_IR_PFD 0x6a /* Parallel [0:3] and Floppy [4:7] */ +#define CFG_IR_IDE 0x6b /* IDE1 [0:3] and IDE2 [4:7] */ +#define CFG_IR_INTAB 0x6c /* PCI INTA [0:3] and INT B [4:7] */ +#define CFG_IR_INTCD 0x6d /* PCI INTC [0:3] and INT D [4:7] */ +#define CFG_IR_PS2 0x6e /* PS/2 KBINT [0:3] and Mouse [4:7] */ +#define CFG_IR_FXBUS 0x6f /* FXIRQ[0] [0:3] and FXIRQ[1] [4:7] */ +#define CFG_IR_USB 0x70 /* FXIRQ[2] [0:3] and USB [4:7] */ +#define CFG_IR_ACPI 0x71 /* ACPI SCI [0:3] and reserved [4:7] */ + +#define CFG_IR_LOW CFG_IR_SER /* Lowest interrupt routing reg */ +#define CFG_IR_HIGH CFG_IR_ACPI /* Highest interrupt routing reg */ /* 8259 operational control words */ #define OCW2_EOI 0x20 /* Non-specific EOI */ @@ -42,15 +50,15 @@ #define SUPERIO_NIRQS 8 struct superio_device { - u16 fdc_base; - u16 sp1_base; - u16 sp2_base; - u16 pp_base; - u16 acpi_base; - int iosapic_irq; - int iosapic_irq_enabled; + u32 fdc_base; + u32 sp1_base; + u32 sp2_base; + u32 pp_base; + u32 acpi_base; + int suckyio_irq_enabled; struct irq_region *irq_region; - struct pci_dev *lio_pdev; /* pci device for legacy IO fn */ + struct pci_dev *lio_pdev; /* pci device for legacy IO (fn 1) */ + struct pci_dev *usb_pdev; /* pci device for USB (fn 2) */ }; /* diff --git a/include/asm-parisc/uaccess.h b/include/asm-parisc/uaccess.h index 66510fd432f7..f147bac9db50 100644 --- a/include/asm-parisc/uaccess.h +++ b/include/asm-parisc/uaccess.h @@ -62,7 +62,7 @@ extern int __put_user_bad(void); */ struct exception_table_entry { - unsigned long addr; /* address of insn that is allowed to fault. */ + unsigned long insn; /* address of insn that is allowed to fault. */ long skip; /* pcoq skip | r9 clear flag | r8 -EFAULT flag */ }; @@ -98,7 +98,7 @@ struct exception_table_entry { #define __get_kernel_asm(ldx,ptr) \ __asm__("\n1:\t" ldx "\t0(%2),%0\n" \ "2:\n" \ - "\t.section __ex_table,\"a\"\n" \ + "\t.section __ex_table,\"aw\"\n" \ "\t.dword\t1b\n" \ "\t.dword\t(2b-1b)+3\n" \ "\t.previous" \ @@ -108,7 +108,7 @@ struct exception_table_entry { #define __get_user_asm(ldx,ptr) \ __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \ "2:\n" \ - "\t.section __ex_table,\"a\"\n" \ + "\t.section __ex_table,\"aw\"\n" \ "\t.dword\t1b\n" \ "\t.dword\t(2b-1b)+3\n" \ "\t.previous" \ @@ -118,7 +118,7 @@ struct exception_table_entry { #define __get_kernel_asm(ldx,ptr) \ __asm__("\n1:\t" ldx "\t0(%2),%0\n" \ "2:\n" \ - "\t.section __ex_table,\"a\"\n" \ + "\t.section __ex_table,\"aw\"\n" \ "\t.word\t1b\n" \ "\t.word\t(2b-1b)+3\n" \ "\t.previous" \ @@ -128,13 +128,13 @@ struct exception_table_entry { #define __get_user_asm(ldx,ptr) \ __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n" \ "2:\n" \ - "\t.section __ex_table,\"a\"\n" \ + "\t.section __ex_table,\"aw\"\n" \ "\t.word\t1b\n" \ "\t.word\t(2b-1b)+3\n" \ "\t.previous" \ : "=r"(__gu_val), "=r"(__gu_err) \ : "r"(ptr), "1"(__gu_err)); -#endif +#endif /* !__LP64__ */ #define __put_user(x,ptr) \ ({ \ @@ -173,7 +173,7 @@ struct exception_table_entry { __asm__ __volatile__ ( \ "\n1:\t" stx "\t%2,0(%1)\n" \ "2:\n" \ - "\t.section __ex_table,\"a\"\n" \ + "\t.section __ex_table,\"aw\"\n" \ "\t.dword\t1b\n" \ "\t.dword\t(2b-1b)+1\n" \ "\t.previous" \ @@ -184,7 +184,7 @@ struct exception_table_entry { __asm__ __volatile__ ( \ "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \ "2:\n" \ - "\t.section __ex_table,\"a\"\n" \ + "\t.section __ex_table,\"aw\"\n" \ "\t.dword\t1b\n" \ "\t.dword\t(2b-1b)+1\n" \ "\t.previous" \ @@ -195,7 +195,7 @@ struct exception_table_entry { __asm__ __volatile__ ( \ "\n1:\t" stx "\t%2,0(%1)\n" \ "2:\n" \ - "\t.section __ex_table,\"a\"\n" \ + "\t.section __ex_table,\"aw\"\n" \ "\t.word\t1b\n" \ "\t.word\t(2b-1b)+1\n" \ "\t.previous" \ @@ -206,7 +206,7 @@ struct exception_table_entry { __asm__ __volatile__ ( \ "\n1:\t" stx "\t%2,0(%%sr3,%1)\n" \ "2:\n" \ - "\t.section __ex_table,\"a\"\n" \ + "\t.section __ex_table,\"aw\"\n" \ "\t.word\t1b\n" \ "\t.word\t(2b-1b)+1\n" \ "\t.previous" \ @@ -221,7 +221,7 @@ static inline void __put_kernel_asm64(u64 x, void *ptr) "\n1:\tstw %1,0(%0)\n" "\n2:\tstw %2,4(%0)\n" "3:\n" - "\t.section __ex_table,\"a\"\n" + "\t.section __ex_table,\"aw\"\n" "\t.word\t1b\n" "\t.word\t(3b-1b)+1\n" "\t.word\t2b\n" @@ -239,7 +239,7 @@ static inline void __put_user_asm64(u64 x, void *ptr) "\n1:\tstw %1,0(%%sr3,%0)\n" "\n2:\tstw %2,4(%%sr3,%0)\n" "3:\n" - "\t.section __ex_table,\"a\"\n" + "\t.section __ex_table,\"aw\"\n" "\t.word\t1b\n" "\t.word\t(3b-1b)+1\n" "\t.word\t2b\n" @@ -249,7 +249,7 @@ static inline void __put_user_asm64(u64 x, void *ptr) } -#endif +#endif /* !__LP64__ */ /* diff --git a/include/linux/ioport.h b/include/linux/ioport.h index 5ad913d3cd96..363aef7268c6 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -99,6 +99,8 @@ extern int allocate_resource(struct resource *root, struct resource *new, void (*alignf)(void *, struct resource *, unsigned long, unsigned long), void *alignf_data); +int adjust_resource(struct resource *res, unsigned long start, + unsigned long size); /* Convenience shorthand with allocation */ #define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name)) |
