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| author | Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com> | 2026-02-05 19:09:50 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-02-05 18:25:28 +0000 |
| commit | a40236feb62ccbf2b36d288550a483122b3205e5 (patch) | |
| tree | 249186dbbbe3c6db0c390fdd3e3bfcd73be9382e /include | |
| parent | 324ecc7788c2e21d0d9197a8c015ff75382122d9 (diff) | |
spi: cadence-qspi: Add support for the Renesas RZ/N1 controller
Renesas RZ/N1 QSPI controllers embed a modified version of the Cadence
IP with the following settings:
- a limited bus clock range
- no DTR support
- no DMA
- no useful interrupt flag
- only direct accesses (no INDAC mode)
- write protection
The controller has been tested by running the SPI NOR check list with a
custom RZ/N1D400 based board mounted with a Spansion s25fl128s1 quad
SPI.
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20260205-schneider-6-19-rc1-qspi-v5-3-843632b3c674@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions