Merge http://linux-isdn.bkbits.net/linux-2.5.make

into home.transmeta.com:/home/torvalds/v2.5/linux

9 files changed, 558 insertions, 26 deletions

diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h
index 1d957c02e541..57100de26c0c 100644
--- a/include/asm-i386/pci.h
+++ b/include/asm-i386/pci.h
@@ -4,6 +4,7 @@
 #include <linux/config.h>
 
 #ifdef __KERNEL__
+#include <linux/mm.h>		/* for struct page */
 
 /* Can be used to override the logic in pci_scan_bus for skipping
    already-configured bus numbers - to be used for buggy BIOSes
diff --git a/include/asm-i386/pgalloc.h b/include/asm-i386/pgalloc.h
index 10e7021c33a6..f2d63db16cf5 100644
--- a/include/asm-i386/pgalloc.h
+++ b/include/asm-i386/pgalloc.h
@@ -5,6 +5,7 @@
 #include <asm/processor.h>
 #include <asm/fixmap.h>
 #include <linux/threads.h>
+#include <linux/mm.h>		/* for struct page */
 
 #define pmd_populate_kernel(mm, pmd, pte) \
 		set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
diff --git a/include/linux/bio.h b/include/linux/bio.h
index de52fa8f15e3..b244108a27a8 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -20,6 +20,7 @@
 #ifndef __LINUX_BIO_H
 #define __LINUX_BIO_H
 
+#include <linux/kdev_t.h>
 /* Platforms may set this to teach the BIO layer about IOMMU hardware. */
 #include <asm/io.h>
 #ifndef BIO_VMERGE_BOUNDARY
diff --git a/include/linux/device.h b/include/linux/device.h
index 1c35f87abc9e..053572009fa1 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -64,7 +64,7 @@ struct bus_type {
 	struct driver_dir_entry	device_dir;
 	struct driver_dir_entry	driver_dir;
 
-	int	(*bind)		(struct device * dev, struct device_driver * drv);
+	int	(*match)	(struct device * dev, struct device_driver * drv);
 };
 
 
diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h
index a78cd80f4ab6..e46232e8e126 100644
--- a/include/linux/spinlock.h
+++ b/include/linux/spinlock.h
@@ -7,6 +7,8 @@
 #include <linux/thread_info.h>
 #include <linux/kernel.h>
 
+#include <asm/system.h>
+
 /*
  * These are the generic versions of the spinlocks and read-write
  * locks..
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index e08fcf85c24f..18cce6c6526a 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -1,7 +1,6 @@
 #ifndef __LINUX_VMALLOC_H
 #define __LINUX_VMALLOC_H
 
-#include <linux/mm.h>
 #include <linux/spinlock.h>
 
 #include <asm/pgtable.h>
@@ -24,33 +23,13 @@ extern long vread(char *buf, char *addr, unsigned long count);
 extern void vmfree_area_pages(unsigned long address, unsigned long size);
 extern int vmalloc_area_pages(unsigned long address, unsigned long size,
                               int gfp_mask, pgprot_t prot);
-
-/*
- *	Allocate any pages
- */
- 
-static inline void * vmalloc (unsigned long size)
-{
-	return __vmalloc(size, GFP_KERNEL | __GFP_HIGHMEM, PAGE_KERNEL);
-}
-
 /*
- *	Allocate ISA addressable pages for broke crap
+ * Various ways to allocate pages.
  */
 
-static inline void * vmalloc_dma (unsigned long size)
-{
-	return __vmalloc(size, GFP_KERNEL|GFP_DMA, PAGE_KERNEL);
-}
-
-/*
- *	vmalloc 32bit PA addressable pages - eg for PCI 32bit devices
- */
- 
-static inline void * vmalloc_32(unsigned long size)
-{
-	return __vmalloc(size, GFP_KERNEL, PAGE_KERNEL);
-}
+extern void * vmalloc(unsigned long size);
+extern void * vmalloc_dma(unsigned long size);
+extern void * vmalloc_32(unsigned long size);
 
 /*
  * vmlist_lock is a read-write spinlock that protects vmlist
diff --git a/include/video/neomagic.h b/include/video/neomagic.h
new file mode 100644
index 000000000000..e0b73849bf0a
--- /dev/null
+++ b/include/video/neomagic.h
@@ -0,0 +1,264 @@
+/*
+ * linux/include/video/neo_reg.h -- NeoMagic Framebuffer Driver
+ *
+ * Copyright (c) 2001  Denis Oliver Kropp <dok@convergence.de>
+ *
+ * This file is subject to the terms and conditions of the GNU General
+ * Public License.  See the file COPYING in the main directory of this
+ * archive for more details.
+ */
+
+#define NEO_BS0_BLT_BUSY        0x00000001
+#define NEO_BS0_FIFO_AVAIL      0x00000002
+#define NEO_BS0_FIFO_PEND       0x00000004
+
+#define NEO_BC0_DST_Y_DEC       0x00000001
+#define NEO_BC0_X_DEC           0x00000002
+#define NEO_BC0_SRC_TRANS       0x00000004
+#define NEO_BC0_SRC_IS_FG       0x00000008
+#define NEO_BC0_SRC_Y_DEC       0x00000010
+#define NEO_BC0_FILL_PAT        0x00000020
+#define NEO_BC0_SRC_MONO        0x00000040
+#define NEO_BC0_SYS_TO_VID      0x00000080
+
+#define NEO_BC1_DEPTH8          0x00000100
+#define NEO_BC1_DEPTH16         0x00000200
+#define NEO_BC1_X_320           0x00000400
+#define NEO_BC1_X_640           0x00000800
+#define NEO_BC1_X_800           0x00000c00
+#define NEO_BC1_X_1024          0x00001000
+#define NEO_BC1_X_1152          0x00001400
+#define NEO_BC1_X_1280          0x00001800
+#define NEO_BC1_X_1600          0x00001c00
+#define NEO_BC1_DST_TRANS       0x00002000
+#define NEO_BC1_MSTR_BLT        0x00004000
+#define NEO_BC1_FILTER_Z        0x00008000
+
+#define NEO_BC2_WR_TR_DST       0x00800000
+
+#define NEO_BC3_SRC_XY_ADDR     0x01000000
+#define NEO_BC3_DST_XY_ADDR     0x02000000
+#define NEO_BC3_CLIP_ON         0x04000000
+#define NEO_BC3_FIFO_EN         0x08000000
+#define NEO_BC3_BLT_ON_ADDR     0x10000000
+#define NEO_BC3_SKIP_MAPPING    0x80000000
+
+#define NEO_MODE1_DEPTH8        0x0100
+#define NEO_MODE1_DEPTH16       0x0200
+#define NEO_MODE1_DEPTH24       0x0300
+#define NEO_MODE1_X_320         0x0400
+#define NEO_MODE1_X_640         0x0800
+#define NEO_MODE1_X_800         0x0c00
+#define NEO_MODE1_X_1024        0x1000
+#define NEO_MODE1_X_1152        0x1400
+#define NEO_MODE1_X_1280        0x1800
+#define NEO_MODE1_X_1600        0x1c00
+#define NEO_MODE1_BLT_ON_ADDR   0x2000
+
+#ifdef __KERNEL__
+
+#ifdef NEOFB_DEBUG
+# define DBG(x)		printk (KERN_DEBUG "neofb: %s\n", (x));
+#else
+# define DBG(x)
+#endif
+
+#define PCI_CHIP_NM2070 0x0001
+#define PCI_CHIP_NM2090 0x0002
+#define PCI_CHIP_NM2093 0x0003
+#define PCI_CHIP_NM2097 0x0083
+#define PCI_CHIP_NM2160 0x0004
+#define PCI_CHIP_NM2200 0x0005
+#define PCI_CHIP_NM2230 0x0025
+#define PCI_CHIP_NM2360 0x0006
+#define PCI_CHIP_NM2380 0x0016
+
+
+struct xtimings {
+  unsigned int pixclock;
+  unsigned int HDisplay;
+  unsigned int HSyncStart;
+  unsigned int HSyncEnd;
+  unsigned int HTotal;
+  unsigned int VDisplay;
+  unsigned int VSyncStart;
+  unsigned int VSyncEnd;
+  unsigned int VTotal;
+  unsigned int sync;
+  int	       dblscan;
+  int	       interlaced;
+};
+
+
+/* --------------------------------------------------------------------- */
+
+typedef volatile struct {
+  __u32 bltStat;
+  __u32 bltCntl;
+  __u32 xpColor;
+  __u32 fgColor;
+  __u32 bgColor;
+  __u32 pitch;
+  __u32 clipLT;
+  __u32 clipRB;
+  __u32 srcBitOffset;
+  __u32 srcStart;
+  __u32 reserved0;
+  __u32 dstStart;
+  __u32 xyExt;
+
+  __u32 reserved1[19];
+
+  __u32 pageCntl;
+  __u32 pageBase;
+  __u32 postBase;
+  __u32 postPtr;
+  __u32 dataPtr;
+} Neo2200;
+
+#define NR_PALETTE	256
+
+#define MMIO_SIZE 0x200000
+
+#define NEO_EXT_CR_MAX 0x85
+#define NEO_EXT_GR_MAX 0xC7
+
+struct neofb_par {
+  
+  unsigned char MiscOutReg;     /* Misc */
+  unsigned char CRTC[25];       /* Crtc Controller */
+  unsigned char Sequencer[5];   /* Video Sequencer */
+  unsigned char Graphics[9];    /* Video Graphics */
+  unsigned char Attribute[21];  /* Video Atribute */
+
+  unsigned char GeneralLockReg;
+  unsigned char ExtCRTDispAddr;
+  unsigned char ExtCRTOffset;
+  unsigned char SysIfaceCntl1;
+  unsigned char SysIfaceCntl2;
+  unsigned char ExtColorModeSelect;
+  unsigned char biosMode;
+
+  unsigned char PanelDispCntlReg1;
+  unsigned char PanelDispCntlReg2;
+  unsigned char PanelDispCntlReg3;
+  unsigned char PanelVertCenterReg1;
+  unsigned char PanelVertCenterReg2;
+  unsigned char PanelVertCenterReg3;
+  unsigned char PanelVertCenterReg4;
+  unsigned char PanelVertCenterReg5;
+  unsigned char PanelHorizCenterReg1;
+  unsigned char PanelHorizCenterReg2;
+  unsigned char PanelHorizCenterReg3;
+  unsigned char PanelHorizCenterReg4;
+  unsigned char PanelHorizCenterReg5;
+
+  int           ProgramVCLK;
+  unsigned char VCLK3NumeratorLow;
+  unsigned char VCLK3NumeratorHigh;
+  unsigned char VCLK3Denominator;
+  unsigned char VerticalExt;
+
+#ifdef CONFIG_MTRR
+  int    mtrr;
+#endif
+  u8    *mmio_vbase;
+
+  Neo2200 *neo2200;
+
+  /* Panels size */
+  int NeoPanelWidth;
+  int NeoPanelHeight;
+
+  int maxClock;
+
+  int pci_burst;
+  int lcd_stretch;
+  int internal_display;
+  int external_display;
+};
+
+typedef struct {
+    int x_res;
+    int y_res;
+    int mode;
+} biosMode;
+
+/* vga IO functions */
+static inline u8 VGArCR (u8 index)
+{
+  outb (index, 0x3d4);
+  return inb (0x3d5);
+}
+
+static inline void VGAwCR (u8 index, u8 val)
+{
+  outb (index, 0x3d4);
+  outb (val, 0x3d5);
+}
+
+static inline u8 VGArGR (u8 index)
+{
+  outb (index, 0x3ce);
+  return inb (0x3cf);
+}
+
+static inline void VGAwGR (u8 index, u8 val)
+{
+  outb (index, 0x3ce);
+  outb (val, 0x3cf);
+}
+
+static inline u8 VGArSEQ (u8 index)
+{
+  outb (index, 0x3c4);
+  return inb (0x3c5);
+}
+
+static inline void VGAwSEQ (u8 index, u8 val)
+{
+  outb (index, 0x3c4);
+  outb (val, 0x3c5);
+}
+
+
+static int paletteEnabled = 0;
+
+static inline void VGAenablePalette (void)
+{
+  u8 tmp;
+
+  tmp = inb (0x3da);
+  outb (0x00, 0x3c0);
+  paletteEnabled = 1;
+}
+
+static inline void VGAdisablePalette (void)
+{
+  u8 tmp;
+
+  tmp = inb (0x3da);
+  outb (0x20, 0x3c0);
+  paletteEnabled = 0;
+}
+
+static inline void VGAwATTR (u8 index, u8 value)
+{
+  u8 tmp;
+
+  if (paletteEnabled)
+    index &= ~0x20;
+  else
+    index |= 0x20;
+
+  tmp = inb (0x3da);
+  outb (index, 0x3c0);
+  outb (value, 0x3c0);
+}
+
+static inline void VGAwMISC (u8 value)
+{
+  outb (value, 0x3c2);
+}
+#endif
+
diff --git a/include/video/pm2fb.h b/include/video/pm2fb.h
new file mode 100644
index 000000000000..44d7464127dd
--- /dev/null
+++ b/include/video/pm2fb.h
@@ -0,0 +1,222 @@
+/*
+ * Permedia2 framebuffer driver definitions.
+ * Copyright (c) 1998-2000 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
+ * --------------------------------------------------------------------------
+ * $Id: pm2fb.h,v 1.26 2000/09/19 00:11:53 illo Exp $
+ * --------------------------------------------------------------------------
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file COPYING in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef PM2FB_H
+#define PM2FB_H
+
+#define PM2_REFERENCE_CLOCK	14318			/* in KHz */
+#define PM2_MAX_PIXCLOCK	230000			/* in KHz */
+#define PM2_REGS_SIZE		0x10000
+
+#define PM2TAG(r) (u32 )(((r)-0x8000)>>3)
+
+/*****************************************************************************
+ * Permedia2 registers used in the framebuffer
+ *****************************************************************************/
+ 
+#define PM2R_RESET_STATUS				0x0000
+#define PM2R_IN_FIFO_SPACE				0x0018
+#define PM2R_OUT_FIFO_WORDS				0x0020
+#define PM2R_APERTURE_ONE				0x0050
+#define PM2R_APERTURE_TWO				0x0058
+#define PM2R_FIFO_DISCON				0x0068
+#define PM2R_CHIP_CONFIG				0x0070
+
+#define PM2R_REBOOT					0x1000
+#define PM2R_MEM_CONTROL				0x1040
+#define PM2R_BOOT_ADDRESS				0x1080
+#define PM2R_MEM_CONFIG					0x10c0
+#define PM2R_BYPASS_WRITE_MASK				0x1100
+#define PM2R_FRAMEBUFFER_WRITE_MASK			0x1140
+
+#define PM2R_OUT_FIFO					0x2000
+
+#define PM2R_SCREEN_BASE				0x3000
+#define PM2R_SCREEN_STRIDE				0x3008
+#define PM2R_H_TOTAL					0x3010
+#define PM2R_HG_END					0x3018
+#define PM2R_HB_END					0x3020
+#define PM2R_HS_START					0x3028
+#define PM2R_HS_END					0x3030
+#define PM2R_V_TOTAL					0x3038
+#define PM2R_VB_END					0x3040
+#define PM2R_VS_START					0x3048
+#define PM2R_VS_END					0x3050
+#define PM2R_VIDEO_CONTROL				0x3058
+#define PM2R_LINE_COUNT					0x3070
+#define PM2R_FIFO_CONTROL				0x3078
+
+#define PM2R_RD_PALETTE_WRITE_ADDRESS			0x4000
+#define PM2R_RD_PALETTE_DATA				0x4008
+#define PM2R_RD_PIXEL_MASK				0x4010
+#define PM2R_RD_PALETTE_READ_ADDRESS			0x4018
+#define PM2R_RD_INDEXED_DATA				0x4050
+
+#define PM2R_START_X_DOM				0x8000
+#define PM2R_D_X_DOM					0x8008
+#define PM2R_START_X_SUB				0x8010
+#define PM2R_D_X_SUB					0x8018
+#define PM2R_START_Y					0x8020
+#define PM2R_D_Y					0x8028
+#define PM2R_COUNT					0x8030
+#define PM2R_RENDER					0x8038
+#define PM2R_RASTERIZER_MODE				0x80a0
+#define PM2R_RECTANGLE_ORIGIN				0x80d0
+#define PM2R_RECTANGLE_SIZE				0x80d8
+#define PM2R_PACKED_DATA_LIMITS				0x8150
+#define PM2R_SCISSOR_MODE				0x8180
+#define PM2R_SCREEN_SIZE				0x8198
+#define PM2R_AREA_STIPPLE_MODE				0x81a0
+#define PM2R_WINDOW_ORIGIN				0x81c8
+#define PM2R_TEXTURE_ADDRESS_MODE			0x8380
+#define PM2R_TEXTURE_MAP_FORMAT				0x8588
+#define PM2R_TEXTURE_DATA_FORMAT			0x8590
+#define PM2R_TEXTURE_READ_MODE				0x8670
+#define PM2R_TEXEL_LUT_MODE				0x8678
+#define PM2R_TEXTURE_COLOR_MODE				0x8680
+#define PM2R_FOG_MODE					0x8690
+#define PM2R_COLOR_DDA_MODE				0x87e0
+#define PM2R_ALPHA_BLEND_MODE				0x8810
+#define PM2R_DITHER_MODE				0x8818
+#define PM2R_FB_SOFT_WRITE_MASK				0x8820
+#define PM2R_LOGICAL_OP_MODE				0x8828
+#define PM2R_LB_READ_MODE				0x8880
+#define PM2R_LB_READ_FORMAT				0x8888
+#define PM2R_LB_SOURCE_OFFSET				0x8890
+#define PM2R_LB_WINDOW_BASE				0x88b8
+#define PM2R_LB_WRITE_FORMAT				0x88c8
+#define PM2R_STENCIL_MODE				0x8988
+#define PM2R_DEPTH_MODE					0x89a0
+#define PM2R_FB_READ_MODE				0x8a80
+#define PM2R_FB_SOURCE_OFFSET				0x8a88
+#define PM2R_FB_PIXEL_OFFSET				0x8a90
+#define PM2R_FB_WINDOW_BASE				0x8ab0
+#define PM2R_FB_WRITE_MODE				0x8ab8
+#define PM2R_FB_HARD_WRITE_MASK				0x8ac0
+#define PM2R_FB_BLOCK_COLOR				0x8ac8
+#define PM2R_FB_READ_PIXEL				0x8ad0
+#define PM2R_FILTER_MODE				0x8c00
+#define PM2R_SYNC					0x8c40
+#define PM2R_YUV_MODE					0x8f00
+#define PM2R_STATISTICS_MODE				0x8c08
+#define PM2R_FB_SOURCE_DELTA				0x8d88
+#define PM2R_CONFIG					0x8d90
+#define PM2R_DELTA_MODE					0x9300
+
+/* Permedia2v */
+#define PM2VR_RD_INDEX_LOW				0x4020
+#define PM2VR_RD_INDEX_HIGH				0x4028
+#define PM2VR_RD_INDEXED_DATA				0x4030
+
+/* Permedia2 RAMDAC indexed registers */
+#define PM2I_RD_CURSOR_CONTROL				0x06
+#define PM2I_RD_COLOR_MODE				0x18
+#define PM2I_RD_MODE_CONTROL				0x19
+#define PM2I_RD_MISC_CONTROL				0x1e
+#define PM2I_RD_PIXEL_CLOCK_A1				0x20
+#define PM2I_RD_PIXEL_CLOCK_A2				0x21
+#define PM2I_RD_PIXEL_CLOCK_A3				0x22
+#define PM2I_RD_PIXEL_CLOCK_STATUS			0x29
+#define PM2I_RD_MEMORY_CLOCK_1				0x30
+#define PM2I_RD_MEMORY_CLOCK_2				0x31
+#define PM2I_RD_MEMORY_CLOCK_3				0x32
+#define PM2I_RD_MEMORY_CLOCK_STATUS			0x33
+#define PM2I_RD_COLOR_KEY_CONTROL			0x40
+#define PM2I_RD_OVERLAY_KEY				0x41
+#define PM2I_RD_RED_KEY					0x42
+#define PM2I_RD_GREEN_KEY				0x43
+#define PM2I_RD_BLUE_KEY				0x44
+
+/* Permedia2v extensions */
+#define PM2VI_RD_MISC_CONTROL				0x000
+#define PM2VI_RD_SYNC_CONTROL				0x001
+#define PM2VI_RD_DAC_CONTROL				0x002
+#define PM2VI_RD_PIXEL_SIZE				0x003
+#define PM2VI_RD_COLOR_FORMAT				0x004
+#define PM2VI_RD_CURSOR_MODE				0x005
+#define PM2VI_RD_CURSOR_X_LOW				0x007
+#define PM2VI_RD_CURSOR_X_HIGH				0x008
+#define PM2VI_RD_CURSOR_Y_LOW				0x009
+#define PM2VI_RD_CURSOR_Y_HIGH				0x00A
+#define PM2VI_RD_CURSOR_X_HOT				0x00B
+#define PM2VI_RD_CURSOR_Y_HOT				0x00C
+#define PM2VI_RD_CLK0_PRESCALE				0x201
+#define PM2VI_RD_CLK0_FEEDBACK				0x202
+#define PM2VI_RD_CLK0_POSTSCALE				0x203
+#define PM2VI_RD_CLK1_PRESCALE				0x204
+#define PM2VI_RD_CLK1_FEEDBACK				0x205
+#define PM2VI_RD_CLK1_POSTSCALE				0x206
+#define PM2VI_RD_CURSOR_PALETTE				0x303
+#define PM2VI_RD_CURSOR_PATTERN				0x400
+
+/* Fields and flags */
+#define PM2F_RENDER_AREASTIPPLE				(1L<<0)
+#define PM2F_RENDER_FASTFILL				(1L<<3)
+#define PM2F_RENDER_PRIMITIVE_MASK			(3L<<6)
+#define PM2F_RENDER_LINE				0
+#define PM2F_RENDER_TRAPEZOID				(1L<<6)
+#define PM2F_RENDER_POINT				(2L<<6)
+#define PM2F_RENDER_RECTANGLE				(3L<<6)
+#define PM2F_SYNCHRONIZATION				(1L<<10)
+#define PM2F_PLL_LOCKED					0x10
+#define PM2F_BEING_RESET				(1L<<31)
+#define PM2F_DATATYPE_COLOR				0x8000
+#define PM2F_VGA_ENABLE					0x02
+#define PM2F_VGA_FIXED					0x04
+#define PM2F_FB_WRITE_ENABLE				0x01
+#define PM2F_FB_READ_SOURCE_ENABLE			0x0200
+#define PM2F_RD_PALETTE_WIDTH_8				0x02
+#define PM2F_PART_PROD_MASK				0x01ff
+#define PM2F_SCREEN_SCISSOR_ENABLE			0x02
+#define PM2F_DATA_64_ENABLE				0x00010000
+#define PM2F_BLANK_LOW					0x02
+#define PM2F_HSYNC_MASK					0x18
+#define PM2F_VSYNC_MASK					0x60
+#define PM2F_HSYNC_ACT_HIGH				0x08
+#define PM2F_HSYNC_FORCED_LOW				0x10
+#define PM2F_HSYNC_ACT_LOW				0x18
+#define PM2F_VSYNC_ACT_HIGH				0x20
+#define PM2F_VSYNC_FORCED_LOW				0x40
+#define PM2F_VSYNC_ACT_LOW				0x60
+#define PM2F_LINE_DOUBLE				0x04
+#define PM2F_VIDEO_ENABLE				0x01
+#define PM2F_RD_GUI_ACTIVE				0x10
+#define PM2F_RD_COLOR_MODE_RGB				0x20
+#define PM2F_DELTA_ORDER_RGB				(1L<<18)
+#define PM2F_RD_TRUECOLOR				0x80
+#define PM2F_NO_ALPHA_BUFFER				0x10
+#define PM2F_TEXTEL_SIZE_16				0x00080000
+#define PM2F_TEXTEL_SIZE_32				0x00100000
+#define PM2F_TEXTEL_SIZE_4				0x00180000
+#define PM2F_TEXTEL_SIZE_24				0x00200000
+#define PM2F_INCREASE_X					(1L<<21)
+#define PM2F_INCREASE_Y					(1L<<22)
+#define PM2F_CONFIG_FB_WRITE_ENABLE			(1L<<3)
+#define PM2F_CONFIG_FB_PACKED_DATA			(1L<<2)
+#define PM2F_CONFIG_FB_READ_DEST_ENABLE			(1L<<1)
+#define PM2F_CONFIG_FB_READ_SOURCE_ENABLE		(1L<<0)
+#define PM2F_COLOR_KEY_TEST_OFF				(1L<<4)
+#define PM2F_MEM_CONFIG_RAM_MASK			(3L<<29)
+#define PM2F_MEM_BANKS_1				0L
+#define PM2F_MEM_BANKS_2				(1L<<29)
+#define PM2F_MEM_BANKS_3				(2L<<29)
+#define PM2F_MEM_BANKS_4				(3L<<29)
+
+typedef enum {
+	PM2_TYPE_PERMEDIA2,
+	PM2_TYPE_PERMEDIA2V
+} pm2type_t;
+
+#endif /* PM2FB_H */
+
+/*****************************************************************************
+ * That's all folks!
+ *****************************************************************************/
diff --git a/include/video/tx3912.h b/include/video/tx3912.h
new file mode 100644
index 000000000000..6b6d006038c2
--- /dev/null
+++ b/include/video/tx3912.h
@@ -0,0 +1,62 @@
+/*
+ * linux/include/video/tx3912.h
+ *
+ * Copyright (C) 2001 Steven Hill (sjhill@realitydiluted.com)
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file COPYING in the main directory of this archive for
+ * more details.
+ *
+ * Includes for TMPR3912/05 and PR31700 LCD controller registers
+ */
+#include <asm/tx3912.h>
+
+#define VidCtrl1        REG_AT(0x028)
+#define VidCtrl2        REG_AT(0x02C)
+#define VidCtrl3        REG_AT(0x030)
+#define VidCtrl4        REG_AT(0x034)
+#define VidCtrl5        REG_AT(0x038)
+#define VidCtrl6        REG_AT(0x03C)
+#define VidCtrl7        REG_AT(0x040)
+#define VidCtrl8        REG_AT(0x044)
+#define VidCtrl9        REG_AT(0x048)
+#define VidCtrl10       REG_AT(0x04C)
+#define VidCtrl11       REG_AT(0x050)
+#define VidCtrl12       REG_AT(0x054)
+#define VidCtrl13       REG_AT(0x058)
+#define VidCtrl14       REG_AT(0x05C)
+
+/* Video Control 1 Register */
+#define LINECNT         0xffc00000
+#define LINECNT_SHIFT   22
+#define LOADDLY         BIT(21)
+#define BAUDVAL         (BIT(20) | BIT(19) | BIT(18) | BIT(17) | BIT(16))
+#define BAUDVAL_SHIFT   16
+#define VIDDONEVAL      (BIT(15) | BIT(14) | BIT(13) | BIT(12) | BIT(11) | BIT(10) | BIT(9))
+#define VIDDONEVAL_SHIFT  9
+#define ENFREEZEFRAME   BIT(8)
+#define TX3912_VIDCTRL1_BITSEL_MASK	0x000000c0
+#define TX3912_VIDCTRL1_2BIT_GRAY	0x00000040
+#define TX3912_VIDCTRL1_4BIT_GRAY	0x00000080
+#define TX3912_VIDCTRL1_8BIT_COLOR	0x000000c0
+#define BITSEL_SHIFT    6
+#define DISPSPLIT       BIT(5)
+#define DISP8           BIT(4)
+#define DFMODE          BIT(3)
+#define INVVID          BIT(2)
+#define DISPON          BIT(1)
+#define ENVID           BIT(0)
+
+/* Video Control 2 Register */
+#define VIDRATE_MASK    0xffc00000
+#define VIDRATE_SHIFT   22
+#define HORZVAL_MASK    0x001ff000
+#define HORZVAL_SHIFT   12
+#define LINEVAL_MASK    0x000001ff
+
+/* Video Control 3 Register */
+#define TX3912_VIDCTRL3_VIDBANK_MASK    0xfff00000
+#define TX3912_VIDCTRL3_VIDBASEHI_MASK  0x000ffff0
+
+/* Video Control 4 Register */
+#define TX3912_VIDCTRL4_VIDBASELO_MASK  0x000ffff0