diff options
| author | Linus Torvalds <torvalds@athlon.transmeta.com> | 2002-02-04 20:09:44 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@athlon.transmeta.com> | 2002-02-04 20:09:44 -0800 |
| commit | a67f1b5da2cf8b14395596048c876247b894aa5c (patch) | |
| tree | 0f125e709fddc4d32579fb267ede0f9c8079ff11 /include | |
| parent | e9e7d7fa16122d7bfa6f87188828baf6080cb02e (diff) | |
v2.4.8 -> v2.4.8.1
- Rui Sousa: emu10k1 module fixes, remove joystick part.
- Alan Cox: driver merges
- Andrea Arkangeli: alpha updates
- David Woodhouse: up_and_exit -> complete_and_exit
- David Miller: sparc and network update
- Andrew Morton: update 3c59x driver
- Neil Brown: NFS export VFAT, knfsd cleanups, raid fixes
- Ben Collins: ieee1394 updates
- Paul Mackerras: PPC update
- me: make sure we don't lose position bits in "filldir()"
Diffstat (limited to 'include')
144 files changed, 2734 insertions, 915 deletions
diff --git a/include/asm-alpha/cache.h b/include/asm-alpha/cache.h index e6d4d1695e25..e844765a100e 100644 --- a/include/asm-alpha/cache.h +++ b/include/asm-alpha/cache.h @@ -7,7 +7,7 @@ #include <linux/config.h> /* Bytes per L1 (data) cache line. */ -#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6) +#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67) # define L1_CACHE_BYTES 64 # define L1_CACHE_SHIFT 6 #else diff --git a/include/asm-alpha/console.h b/include/asm-alpha/console.h index 8a7d1d1fc964..ce7fa71ebfe1 100644 --- a/include/asm-alpha/console.h +++ b/include/asm-alpha/console.h @@ -22,8 +22,8 @@ #define CCB_GET_ENV 0x22 #define CCB_SAVE_ENV 0x23 -#define CCB_PSWITCH 0x30 -#define CCB_BIOS_EMUL 0x32 +#define CCB_PSWITCH 0x30 +#define CCB_BIOS_EMUL 0x32 /* * Environment variable numbers @@ -51,6 +51,8 @@ extern long callback_open(const char *device, long length); extern long callback_close(long unit); extern long callback_read(long channel, long count, const char *buf, long lbn); extern long callback_getenv(long id, const char *buf, unsigned long buf_size); +extern long callback_setenv(long id, const char *buf, unsigned long buf_size); +extern long callback_save_env(void); extern int srm_fixup(unsigned long new_callback_addr, unsigned long new_hwrpb_addr); diff --git a/include/asm-alpha/irq.h b/include/asm-alpha/irq.h index 254d8f17fddc..b7804cc7b1e1 100644 --- a/include/asm-alpha/irq.h +++ b/include/asm-alpha/irq.h @@ -43,6 +43,7 @@ # define NR_IRQS 40 #elif defined(CONFIG_ALPHA_DP264) || \ + defined(CONFIG_ALPHA_SHARK) || \ defined(CONFIG_ALPHA_EIGER) # define NR_IRQS 64 diff --git a/include/asm-alpha/keyboard.h b/include/asm-alpha/keyboard.h index eb0047023d48..8d3f08635cb9 100644 --- a/include/asm-alpha/keyboard.h +++ b/include/asm-alpha/keyboard.h @@ -22,6 +22,7 @@ extern int pckbd_translate(unsigned char scancode, unsigned char *keycode, char raw_mode); extern char pckbd_unexpected_up(unsigned char keycode); extern void pckbd_leds(unsigned char leds); +extern int pckbd_rate(struct kbd_repeat *rep); extern void pckbd_init_hw(void); extern unsigned char pckbd_sysrq_xlate[128]; @@ -30,6 +31,7 @@ extern unsigned char pckbd_sysrq_xlate[128]; #define kbd_translate pckbd_translate #define kbd_unexpected_up pckbd_unexpected_up #define kbd_leds pckbd_leds +#define kbd_rate pckbd_rate #define kbd_init_hw pckbd_init_hw #define kbd_sysrq_xlate pckbd_sysrq_xlate diff --git a/include/asm-alpha/pgtable.h b/include/asm-alpha/pgtable.h index 259eaa77b0a9..0cc4844308a4 100644 --- a/include/asm-alpha/pgtable.h +++ b/include/asm-alpha/pgtable.h @@ -178,7 +178,8 @@ extern unsigned long __zero_page(void); #error "EV6-only feature in a generic kernel" #endif #if defined(CONFIG_ALPHA_GENERIC) || \ - (defined(CONFIG_ALPHA_EV6) && !defined(USE_48_BIT_KSEG)) + ((defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)) && \ + !defined(USE_48_BIT_KSEG)) #define PHYS_TWIDDLE(phys) \ ((((phys) & 0xc0000000000UL) == 0x40000000000UL) \ ? ((phys) ^= 0xc0000000000UL) : (phys)) diff --git a/include/asm-alpha/system.h b/include/asm-alpha/system.h index 6de660cabfe1..183feb494670 100644 --- a/include/asm-alpha/system.h +++ b/include/asm-alpha/system.h @@ -192,7 +192,7 @@ enum implver_enum { #ifdef CONFIG_ALPHA_EV5 #define implver() IMPLVER_EV5 #endif -#ifdef CONFIG_ALPHA_EV6 +#if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67) #define implver() IMPLVER_EV6 #endif #endif diff --git a/include/asm-arm/arch-anakin/dma.h b/include/asm-arm/arch-anakin/dma.h new file mode 100644 index 000000000000..11b97e364f70 --- /dev/null +++ b/include/asm-arm/arch-anakin/dma.h @@ -0,0 +1,20 @@ +/* + * linux/include/asm-arm/arch-anakin/dma.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 09-Apr-2001 W/TTC Created + */ + +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +#define MAX_DMA_ADDRESS 0xffffffff +#define MAX_DMA_CHANNELS 0 + +#endif diff --git a/include/asm-arm/arch-anakin/hardware.h b/include/asm-arm/arch-anakin/hardware.h new file mode 100644 index 000000000000..bd237383535a --- /dev/null +++ b/include/asm-arm/arch-anakin/hardware.h @@ -0,0 +1,69 @@ +/* + * linux/include/asm-arm/arch-anakin/hardware.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 10-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +/* + * Memory map + */ +#define SRAM_START 0x00000000 +#define SRAM_SIZE 0x00100000 +#define SRAM_BASE 0xdf000000 + +#define SDRAM_START 0x20000000 +#define SDRAM_SIZE 0x04000000 +#define SDRAM_BASE 0xc0000000 + +#define IO_START 0x40000000 +#define IO_SIZE 0x00100000 +#define IO_BASE 0xe0000000 + +#define FLASH_START 0x60000000 +#define FLASH_SIZE 0x00080000 +#define FLASH_BASE 0xe8000000 + +#define VGA_START 0x80000000 +#define VGA_SIZE 0x0002db40 +#define VGA_BASE 0xf0000000 + +/* + * IO map + */ +#define IO_CONTROLLER 0x00000 +#define INTERRUPT_CONTROLLER 0x02000 +#define UART0 0x04000 +#define UART1 0x06000 +#define UART2 0x08000 +#define CODEC 0x0a000 +#define UART4 0x0c000 +#define UART3 0x0e000 +#define DISPLAY_CONTROLLER 0x10000 +#define DAB 0x12000 +#define STATE_CONTROLLER 0x14000 +#define CAN 0x23000 +#define COMPACTFLASH 0x24000 + +/* + * Use SRAM for D-cache flush + */ +#define FLUSH_BASE_PHYS SRAM_START +#define FLUSH_BASE SRAM_BASE +#define UNCACHEABLE_ADDR (SRAM_BASE + 0x10000) + +/* + * Use SDRAM for memory + */ +#define MEM_SIZE SDRAM_SIZE + +#endif diff --git a/include/asm-arm/arch-anakin/ide.h b/include/asm-arm/arch-anakin/ide.h new file mode 100644 index 000000000000..c998cfe70518 --- /dev/null +++ b/include/asm-arm/arch-anakin/ide.h @@ -0,0 +1,56 @@ +/* + * linux/include/asm-arm/arch-anakin/ide.h + * + * Copyright 2001 Blue Mug Inc. for Acunia N.V. + * + * 08-jun-2001: Initial clone of arch-sa1100/ide.h by Jon McClintock + * (jonm@bluemug.com). + */ + +#include <linux/config.h> +#include <asm/irq.h> +#include <asm/hardware.h> + +/* + * Set up a hw structure for a specified data port, control port and IRQ. + * This should follow whatever the default interface uses. + */ +static __inline__ void +ide_init_hwif_ports(hw_regs_t *hw, int data_port, int ctrl_port, int *irq) +{ + ide_ioreg_t reg; + int i; + int regincr = 4; + + memset(hw, 0, sizeof(*hw)); + + reg = (ide_ioreg_t)data_port; + + for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { + hw->io_ports[i] = reg; + reg += regincr; + } + + hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port; + + if (irq) + *irq = 0; +} + + +/* + * This registers the standard ports for this architecture with the IDE + * driver. + */ +static __inline__ void +ide_init_default_hwifs(void) +{ + hw_regs_t hw; + + ide_init_hwif_ports(&hw, IO_BASE + COMPACTFLASH, + IO_BASE + COMPACTFLASH + IDE_CONTROL_OFFSET, NULL); + hw.irq = IRQ_COMPACTFLASH; + ide_register_hw(&hw, NULL); +} + + diff --git a/include/asm-arm/arch-anakin/io.h b/include/asm-arm/arch-anakin/io.h new file mode 100644 index 000000000000..f535f6cbab4f --- /dev/null +++ b/include/asm-arm/arch-anakin/io.h @@ -0,0 +1,35 @@ +/* + * linux/include/asm-arm/arch-anakin/io.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 10-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + + +#define IO_SPACE_LIMIT 0xffffffff + +#define __io(a) a +#define __arch_getw(a) (*(volatile unsigned short *) (a)) +#define __arch_putw(b, a) (*(volatile unsigned short *) (a) = (b)) + +#define iomem_valid_addr(i, s) 1 +#define iomem_to_phys(i) i + +/* + * We don't support ins[lb]/outs[lb]. Make them fault. + */ +#define __raw_readsb(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_readsl(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_writesb(p,d,l) do { *(int *)0 = 0; } while (0) +#define __raw_writesl(p,d,l) do { *(int *)0 = 0; } while (0) + +#endif diff --git a/include/asm-arm/arch-anakin/irq.h b/include/asm-arm/arch-anakin/irq.h new file mode 100644 index 000000000000..e31ec96b1cad --- /dev/null +++ b/include/asm-arm/arch-anakin/irq.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm-arm/arch-anakin/irq.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 10-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_IRQ_H +#define __ASM_ARCH_IRQ_H + +#define fixup_irq(i) i + +#endif diff --git a/include/asm-arm/arch-anakin/irqs.h b/include/asm-arm/arch-anakin/irqs.h new file mode 100644 index 000000000000..228a2926f65d --- /dev/null +++ b/include/asm-arm/arch-anakin/irqs.h @@ -0,0 +1,33 @@ +/* + * linux/include/asm-arm/arch-anakin/irqs.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 10-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +#define NR_IRQS 16 + +#define IRQ_UART0 0 +#define IRQ_UART1 1 +#define IRQ_UART2 2 +#define IRQ_TICK 3 +#define IRQ_CODEC 4 +#define IRQ_UART4 5 +#define IRQ_TOUCHSCREEN 6 +#define IRQ_UART3 7 +#define IRQ_FIFO 8 +#define IRQ_CAN 9 +#define IRQ_COMPACTFLASH 10 +#define IRQ_BOSH 12 +#define IRQ_ANAKIN 15 + +#endif diff --git a/include/asm-arm/arch-anakin/keyboard.h b/include/asm-arm/arch-anakin/keyboard.h new file mode 100644 index 000000000000..fc3a319af435 --- /dev/null +++ b/include/asm-arm/arch-anakin/keyboard.h @@ -0,0 +1,29 @@ +/* + * linux/include/asm-arm/arch-anakin/keyboard.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 11-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_KEYBOARD_H +#define __ASM_ARCH_KEYBOARD_H + +#define kbd_setkeycode(s, k) (-EINVAL) +#define kbd_getkeycode(s) (-EINVAL) +#define kbd_translate(s, k, r) 0 +#define kbd_unexpected_up(k) 0 +#define kbd_leds(l) +#define kbd_init_hw() +#define kbd_sysrq_xlate ((int *) 0) +#define kbd_disable_irq() +#define kbd_enable_irq() + +#define SYSRQ_KEY 0x54 + +#endif diff --git a/include/asm-arm/arch-anakin/memory.h b/include/asm-arm/arch-anakin/memory.h new file mode 100644 index 000000000000..67bc64f31fd0 --- /dev/null +++ b/include/asm-arm/arch-anakin/memory.h @@ -0,0 +1,36 @@ +/* + * linux/include/asm-arm/arch-anakin/memory.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 09-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define TASK_SIZE (3u * 1024 * 1024 * 1024) +#define TASK_SIZE_26 (64u * 1024 * 1024) +#define TASK_UNMAPPED_BASE (1u * 1024 * 1024 * 1024) + +#define PAGE_OFFSET 0xc0000000 +#define PHYS_OFFSET 0x20000000 + +#define __virt_to_phys(a) ((a) - PAGE_OFFSET + PHYS_OFFSET) +#define __phys_to_virt(a) ((a) + PAGE_OFFSET - PHYS_OFFSET) +#define __virt_to_bus(a) __virt_to_phys(a) +#define __bus_to_virt(a) __phys_to_virt(a) + +#define __virt_to_phys__is_a_macro +#define __phys_to_virt__is_a_macro +#define __virt_to_bus__is_a_macro +#define __bus_to_virt__is_a_macro + +#define PHYS_TO_NID(addr) (0) + +#endif diff --git a/include/asm-arm/arch-anakin/param.h b/include/asm-arm/arch-anakin/param.h new file mode 100644 index 000000000000..704b3f8bf055 --- /dev/null +++ b/include/asm-arm/arch-anakin/param.h @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-anakin/param.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 11-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_PARAM_H +#define __ASM_ARCH_PARAM_H + +/* + * Reserved for future use + */ + +#endif diff --git a/include/asm-arm/arch-anakin/serial.h b/include/asm-arm/arch-anakin/serial.h new file mode 100644 index 000000000000..66c70f599e6a --- /dev/null +++ b/include/asm-arm/arch-anakin/serial.h @@ -0,0 +1,30 @@ +/* + * linux/include/asm-arm/arch-anakin/serial.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 11-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_SERIAL_H +#define __ASM_ARCH_SERIAL_H + +#include <asm/io.h> +#include <asm/irq.h> + +/* + * UART3 and UART4 are not supported yet + */ +#define RS_TABLE_SIZE 3 +#define STD_SERIAL_PORT_DEFNS \ + { 0, 0, IO_BASE + UART0, IRQ_UART0, 0 }, \ + { 0, 0, IO_BASE + UART1, IRQ_UART1, 0 }, \ + { 0, 0, IO_BASE + UART2, IRQ_UART2, 0 } +#define EXTRA_SERIAL_PORT_DEFNS + +#endif diff --git a/include/asm-arm/arch-anakin/serial_reg.h b/include/asm-arm/arch-anakin/serial_reg.h new file mode 100644 index 000000000000..44c5b65467d3 --- /dev/null +++ b/include/asm-arm/arch-anakin/serial_reg.h @@ -0,0 +1,65 @@ +/* + * linux/include/asm-arm/arch-anakin/serial_reg.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 09-Apr-2001 TTC Created + */ + +#ifndef ASM_ARCH_SERIAL_REG_H +#define ASM_ARCH_SERIAL_REG_H + +/* + * Serial registers (other than tx/rx) + */ + +/* + * [UARTx + 0x10] + */ +#define RXRELEASE (1 << 0) +#define TXEMPTY (1 << 1) +#define CTS (1 << 2) +#define PRESCALER (31 << 3) +#define SETBAUD(baud) ((230400 / (baud) - 1) << 3) +#define GETBAUD(prescaler) (230400 / (((prescaler) >> 3) + 1)) + + +/* + * [UARTx + 0x18] + */ +#define IRQENABLE (1 << 0) +#define SENDREQUEST (1 << 1) +#define RTS (1 << 2) +#define DTR (1 << 3) +#define DCD (1 << 4) +#define BLOCKRX (1 << 5) +#define PARITY (3 << 6) +#define SETPARITY(parity) ((parity) << 6) +#define GETPARITY(parity) ((parity) >> 6) +#define NONEPARITY (0) +#define ODDPARITY (1) +#define EVENPARITY (2) + +/* + * [UARTx + 0x1c] + */ +#define TX (1 << 0) +#define RX (1 << 1) +#define OVERRUN (1 << 2) + +/* + * [UARTx + 0x20] + */ +#define SETBREAK (1 << 0) + +/* + * Software interrupt register + */ +#define TXENABLE (1 << 0) + +#endif diff --git a/include/asm-arm/arch-anakin/system.h b/include/asm-arm/arch-anakin/system.h new file mode 100644 index 000000000000..e2955e32ce96 --- /dev/null +++ b/include/asm-arm/arch-anakin/system.h @@ -0,0 +1,29 @@ +/* + * linux/include/asm-arm/arch-anakin/system.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 11-Apr-2001 TTC Created + * 04-May-2001 W/PB Removed cpu_do_idle() + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +static inline void +arch_idle(void) +{ +} + +static inline void +arch_reset(char mode) +{ + cpu_reset(0); +} + +#endif diff --git a/include/asm-arm/arch-anakin/time.h b/include/asm-arm/arch-anakin/time.h new file mode 100644 index 000000000000..97717b5860e1 --- /dev/null +++ b/include/asm-arm/arch-anakin/time.h @@ -0,0 +1,31 @@ +/* + * linux/include/asm-arm/arch-anakin/time.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 10-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_TIME_H +#define __ASM_ARCH_TIME_H + +static void +anakin_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + do_timer(regs); +} + +static inline void +setup_timer(void) +{ + timer_irq.handler = anakin_timer_interrupt; + timer_irq.flags = SA_INTERRUPT; + setup_arm_irq(IRQ_TICK, &timer_irq); +} + +#endif diff --git a/include/asm-arm/arch-anakin/timex.h b/include/asm-arm/arch-anakin/timex.h new file mode 100644 index 000000000000..e624c704b5ce --- /dev/null +++ b/include/asm-arm/arch-anakin/timex.h @@ -0,0 +1,22 @@ +/* + * linux/include/asm-arm/arch-anakin/timex.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 09-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_TIMEX_H +#define __ASM_ARCH_TIMEX_H + +/* + * Timex specification for Anakin + */ +#define CLOCK_TICK_RATE (1000 / 8) + +#endif diff --git a/include/asm-arm/arch-anakin/uncompress.h b/include/asm-arm/arch-anakin/uncompress.h new file mode 100644 index 000000000000..5558abd8bf82 --- /dev/null +++ b/include/asm-arm/arch-anakin/uncompress.h @@ -0,0 +1,57 @@ +/* + * linux/include/asm-arm/arch-anakin/uncompress.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 10-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include <asm/io.h> +#include <asm/arch/serial_reg.h> + +#ifndef CONFIG_ANAKIN_DEFAULT_BAUDRATE +#define CONFIG_ANAKIN_DEFAULT_BAUDRATE 9600 +#endif + +static inline void +putc(int c) +{ + while (!(__raw_readl(IO_START + UART0 + 0x10) & TXEMPTY)); + __raw_writel(c, IO_START + UART0 + 0x14); + __raw_writel(__raw_readl(IO_START + UART0 + 0x18) + | SENDREQUEST, IO_START + UART0 + 0x18); +} + +static void +puts(const char *s) +{ + int c; + + while ((c = *s++)) { + putc(c); + if (c == '\n') putc('\r'); + } +} + +static void +arch_decomp_setup(void) +{ + __raw_writel(__raw_readl(IO_START + UART0 + 0x10) & ~PRESCALER + | SETBAUD(CONFIG_ANAKIN_DEFAULT_BAUDRATE), + IO_START + UART0 + 0x10); + __raw_writel(__raw_readl(IO_START + UART0 + 0x18) & ~(IRQENABLE + | RTS | DTR | BLOCKRX | PARITY), + IO_START + UART0 + 0x18); +} + +#define arch_decomp_wdog() + +#endif diff --git a/include/asm-arm/arch-anakin/vmalloc.h b/include/asm-arm/arch-anakin/vmalloc.h new file mode 100644 index 000000000000..1812fbab58e6 --- /dev/null +++ b/include/asm-arm/arch-anakin/vmalloc.h @@ -0,0 +1,26 @@ +/* + * linux/include/asm-arm/arch-anakin/vmalloc.h + * + * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * 09-Apr-2001 TTC Created + */ + +#ifndef __ASM_ARCH_VMALLOC_H +#define __ASM_ARCH_VMALLOC_H + +/* + * VMALLOC_ARCH_OFFSET must be set to VMALLOC_OFFSET (check + * linux/arch/arm/kernel/traps.c) + */ +#define VMALLOC_ARCH_OFFSET (8 * 1024 * 1024) +#define VMALLOC_VMADDR(a) ((unsigned int) (a)) +#define VMALLOC_START ((VMALLOC_VMADDR(high_memory) + VMALLOC_ARCH_OFFSET) & ~(VMALLOC_ARCH_OFFSET - 1)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) + +#endif diff --git a/include/asm-arm/arch-arc/hardware.h b/include/asm-arm/arch-arc/hardware.h index a296cdaf3c07..b25aa2006b7e 100644 --- a/include/asm-arm/arch-arc/hardware.h +++ b/include/asm-arm/arch-arc/hardware.h @@ -69,7 +69,6 @@ #define IOEB_MONTYPE (IOEB_BASE + 0x70) #endif -#define IO_EC_IOC4_BASE 0x8009c000 #define IO_EC_IOC_BASE 0x80090000 #define IO_EC_MEMC_BASE 0x80000000 diff --git a/include/asm-arm/arch-arc/io.h b/include/asm-arm/arch-arc/io.h index dd80763d943c..e874501c84fa 100644 --- a/include/asm-arm/arch-arc/io.h +++ b/include/asm-arm/arch-arc/io.h @@ -71,7 +71,7 @@ * Dynamic IO functions - let the compiler * optimize the expressions */ -extern __inline__ void __outb (unsigned int value, unsigned int port) +static inline void __outb (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -84,7 +84,7 @@ extern __inline__ void __outb (unsigned int value, unsigned int port) : "cc"); } -extern __inline__ void __outw (unsigned int value, unsigned int port) +static inline void __outw (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -97,7 +97,7 @@ extern __inline__ void __outw (unsigned int value, unsigned int port) : "cc"); } -extern __inline__ void __outl (unsigned int value, unsigned int port) +static inline void __outl (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -111,7 +111,7 @@ extern __inline__ void __outl (unsigned int value, unsigned int port) } #define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ +static inline unsigned sz __in##fnsuffix (unsigned int port) \ { \ unsigned long temp, value; \ __asm__ __volatile__( \ @@ -125,7 +125,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ return (unsigned sz)value; \ } -extern __inline__ unsigned int __ioaddr (unsigned int port) \ +static inline unsigned int __ioaddr (unsigned int port) \ { \ if (__PORT_PCIO(port)) \ return (unsigned int)(PCIO_BASE + (port << 2)); \ diff --git a/include/asm-arm/arch-arc/memory.h b/include/asm-arm/arch-arc/memory.h index 3c21224b5464..9dd2d4edc2d4 100644 --- a/include/asm-arm/arch-arc/memory.h +++ b/include/asm-arm/arch-arc/memory.h @@ -50,4 +50,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) (x) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-arc/system.h b/include/asm-arm/arch-arc/system.h index bdef90bcd13e..fce24985d3a1 100644 --- a/include/asm-arm/arch-arc/system.h +++ b/include/asm-arm/arch-arc/system.h @@ -13,7 +13,7 @@ static void arch_idle(void) while (!current->need_resched && !hlt_counter); } -extern __inline__ void arch_reset(char mode) +static inline void arch_reset(char mode) { /* * copy branch instruction to reset location and call it diff --git a/include/asm-arm/arch-arc/time.h b/include/asm-arm/arch-arc/time.h index 52add5ae3c89..ef13a0466c96 100644 --- a/include/asm-arm/arch-arc/time.h +++ b/include/asm-arm/arch-arc/time.h @@ -24,7 +24,7 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* * Set up timer interrupt. */ -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { ioctime_init(); diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h index 20f2275f51a8..376ca94ebb9c 100644 --- a/include/asm-arm/arch-cl7500/io.h +++ b/include/asm-arm/arch-cl7500/io.h @@ -68,7 +68,7 @@ * Dynamic IO functions - let the compiler * optimize the expressions */ -extern __inline__ void __outb (unsigned int value, unsigned int port) +static inline void __outb (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -81,7 +81,7 @@ extern __inline__ void __outb (unsigned int value, unsigned int port) : "cc"); } -extern __inline__ void __outw (unsigned int value, unsigned int port) +static inline void __outw (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -94,7 +94,7 @@ extern __inline__ void __outw (unsigned int value, unsigned int port) : "cc"); } -extern __inline__ void __outl (unsigned int value, unsigned int port) +static inline void __outl (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -108,7 +108,7 @@ extern __inline__ void __outl (unsigned int value, unsigned int port) } #define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ +static inline unsigned sz __in##fnsuffix (unsigned int port) \ { \ unsigned long temp, value; \ __asm__ __volatile__( \ @@ -122,7 +122,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ return (unsigned sz)value; \ } -extern __inline__ unsigned int __ioaddr (unsigned int port) \ +static inline unsigned int __ioaddr (unsigned int port) \ { \ if (__PORT_PCIO(port)) \ return (unsigned int)(PCIO_BASE + (port << 2)); \ diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h index 56e1d3bfcb62..908d02501faf 100644 --- a/include/asm-arm/arch-cl7500/memory.h +++ b/include/asm-arm/arch-cl7500/memory.h @@ -46,4 +46,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) __phys_to_virt(x) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-cl7500/time.h b/include/asm-arm/arch-cl7500/time.h index 0a21541d2f6f..107763e9c6bd 100644 --- a/include/asm-arm/arch-cl7500/time.h +++ b/include/asm-arm/arch-cl7500/time.h @@ -29,7 +29,7 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* * Set up timer interrupt. */ -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { extern void ioctime_init(void); ioctime_init(); diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h index b8f8e211dac2..937006c01dbd 100644 --- a/include/asm-arm/arch-ebsa110/memory.h +++ b/include/asm-arm/arch-ebsa110/memory.h @@ -48,4 +48,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) (x) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-ebsa110/time.h b/include/asm-arm/arch-ebsa110/time.h index a1a8b3c116bd..53b354720e55 100644 --- a/include/asm-arm/arch-ebsa110/time.h +++ b/include/asm-arm/arch-ebsa110/time.h @@ -33,7 +33,7 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* * Set up timer interrupt. */ -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { ebsa110_setup_timer(); diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h index 5e55da5cfa0c..a0591a8c562b 100644 --- a/include/asm-arm/arch-ebsa285/io.h +++ b/include/asm-arm/arch-ebsa285/io.h @@ -25,14 +25,14 @@ #define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a)) #else -extern __inline__ unsigned long ___mem_pci(unsigned long a) +static inline unsigned long ___mem_pci(unsigned long a) { if (a <= 0xc0000000 || a >= 0xe0000000) BUG(); return a; } -extern __inline__ unsigned long ___mem_isa(unsigned long a) +static inline unsigned long ___mem_isa(unsigned long a) { if (a >= 16*1048576) BUG(); diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index 41e730ceaf0e..0ab74c5bbc62 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -80,4 +80,6 @@ extern unsigned long __bus_to_virt(unsigned long); #define __phys_to_virt__is_a_macro #define __phys_to_virt(ppage) ((unsigned long)(ppage) + PAGE_OFFSET) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h index 33f3fb32797d..e9b4da1e93a7 100644 --- a/include/asm-arm/arch-ebsa285/system.h +++ b/include/asm-arm/arch-ebsa285/system.h @@ -35,7 +35,7 @@ static void arch_idle(void) slow_out: } -extern __inline__ void arch_reset(char mode) +static inline void arch_reset(char mode) { if (mode == 's') { /* diff --git a/include/asm-arm/arch-ebsa285/time.h b/include/asm-arm/arch-ebsa285/time.h index d42f472c150a..e70657d67aa3 100644 --- a/include/asm-arm/arch-ebsa285/time.h +++ b/include/asm-arm/arch-ebsa285/time.h @@ -199,7 +199,7 @@ static void timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* * Set up timer interrupt. */ -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { int irq; diff --git a/include/asm-arm/arch-integrator/memory.h b/include/asm-arm/arch-integrator/memory.h index 45605011117c..ca1ba7cd3cde 100644 --- a/include/asm-arm/arch-integrator/memory.h +++ b/include/asm-arm/arch-integrator/memory.h @@ -58,4 +58,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) (x - INTEGRATOR_HDR0_SDRAM_BASE + PAGE_OFFSET) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-integrator/system.h b/include/asm-arm/arch-integrator/system.h index a330cadc73b8..5efbcc5dbd39 100644 --- a/include/asm-arm/arch-integrator/system.h +++ b/include/asm-arm/arch-integrator/system.h @@ -32,7 +32,7 @@ static void arch_idle(void) cpu_do_idle(0); } -extern __inline__ void arch_reset(char mode) +static inline void arch_reset(char mode) { unsigned int hdr_ctrl = (IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET); unsigned int val; diff --git a/include/asm-arm/arch-integrator/time.h b/include/asm-arm/arch-integrator/time.h index 1dfb5fd68095..878ed34e242d 100644 --- a/include/asm-arm/arch-integrator/time.h +++ b/include/asm-arm/arch-integrator/time.h @@ -113,7 +113,7 @@ static void integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *re /* * Set up timer interrupt, and return the current time in seconds. */ -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE; volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE; diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h index c7bf136b3a71..50762b011d2d 100644 --- a/include/asm-arm/arch-l7200/io.h +++ b/include/asm-arm/arch-l7200/io.h @@ -29,7 +29,7 @@ #define __arch_getb(a) (*(volatile unsigned char *)(a)) #define __arch_getl(a) (*(volatile unsigned int *)(a)) -extern __inline__ unsigned int __arch_getw(unsigned long a) +static inline unsigned int __arch_getw(unsigned long a) { unsigned int value; __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" @@ -41,7 +41,7 @@ extern __inline__ unsigned int __arch_getw(unsigned long a) #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) -extern __inline__ void __arch_putw(unsigned int value, unsigned long a) +static inline void __arch_putw(unsigned int value, unsigned long a) { __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" : : "r" (value), "r" (a)); diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h index a34a0f9a41bb..609416d245b1 100644 --- a/include/asm-arm/arch-l7200/memory.h +++ b/include/asm-arm/arch-l7200/memory.h @@ -47,4 +47,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) __phys_to_virt(x) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-l7200/system.h b/include/asm-arm/arch-l7200/system.h index c229c4fdb054..9eb9fcac6f02 100644 --- a/include/asm-arm/arch-l7200/system.h +++ b/include/asm-arm/arch-l7200/system.h @@ -18,7 +18,7 @@ static void arch_idle(void) *(unsigned long *)(IO_BASE + 0x50004) = 1; /* idle mode */ } -extern inline void arch_reset(char mode) +static inline void arch_reset(char mode) { if (mode == 's') { cpu_reset(0); diff --git a/include/asm-arm/arch-l7200/time.h b/include/asm-arm/arch-l7200/time.h index 1312b3bc77bf..6806aa7c42df 100644 --- a/include/asm-arm/arch-l7200/time.h +++ b/include/asm-arm/arch-l7200/time.h @@ -52,7 +52,7 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* * Set up RTC timer interrupt, and return the current time in seconds. */ -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { RTC_RTCC = 0; /* Clear interrupt */ diff --git a/include/asm-arm/arch-nexuspci/io.h b/include/asm-arm/arch-nexuspci/io.h index 91de8ff9b251..20a360744b2b 100644 --- a/include/asm-arm/arch-nexuspci/io.h +++ b/include/asm-arm/arch-nexuspci/io.h @@ -18,7 +18,7 @@ #define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a)) #else -extern __inline__ unsigned long ___mem_pci(unsigned long a) +static inline unsigned long ___mem_pci(unsigned long a) { /* PCI addresses must have been ioremapped */ if (a <= 0xc0000000 || a >= 0xe0000000) @@ -26,7 +26,7 @@ extern __inline__ unsigned long ___mem_pci(unsigned long a) return a; } -extern __inline__ unsigned long ___mem_isa(unsigned long a) +static inline unsigned long ___mem_isa(unsigned long a) { if (a >= 16*1048576) BUG(); diff --git a/include/asm-arm/arch-nexuspci/memory.h b/include/asm-arm/arch-nexuspci/memory.h index a7e644257805..25d23ca08be0 100644 --- a/include/asm-arm/arch-nexuspci/memory.h +++ b/include/asm-arm/arch-nexuspci/memory.h @@ -43,4 +43,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) ((unsigned long)(x) + PAGE_OFFSET - BUS_OFFSET) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-nexuspci/time.h b/include/asm-arm/arch-nexuspci/time.h index 7bb4322f64b3..19eae054f184 100644 --- a/include/asm-arm/arch-nexuspci/time.h +++ b/include/asm-arm/arch-nexuspci/time.h @@ -43,7 +43,7 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) do_timer(regs); } -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { int tick = 3686400 / 16 / 2 / 100; diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h index 86f1248071e1..19def7bfff6b 100644 --- a/include/asm-arm/arch-rpc/io.h +++ b/include/asm-arm/arch-rpc/io.h @@ -70,7 +70,7 @@ /* * Dynamic IO functions. */ -extern __inline__ void __outb (unsigned int value, unsigned int port) +static inline void __outb (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -83,7 +83,7 @@ extern __inline__ void __outb (unsigned int value, unsigned int port) : "cc"); } -extern __inline__ void __outw (unsigned int value, unsigned int port) +static inline void __outw (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -96,7 +96,7 @@ extern __inline__ void __outw (unsigned int value, unsigned int port) : "cc"); } -extern __inline__ void __outl (unsigned int value, unsigned int port) +static inline void __outl (unsigned int value, unsigned int port) { unsigned long temp; __asm__ __volatile__( @@ -110,7 +110,7 @@ extern __inline__ void __outl (unsigned int value, unsigned int port) } #define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ +static inline unsigned sz __in##fnsuffix (unsigned int port) \ { \ unsigned long temp, value; \ __asm__ __volatile__( \ @@ -124,7 +124,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ return (unsigned sz)value; \ } -extern __inline__ unsigned int __ioaddr (unsigned int port) \ +static inline unsigned int __ioaddr (unsigned int port) \ { \ if (__PORT_PCIO(port)) \ return (unsigned int)(PCIO_BASE + (port << 2)); \ diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h index cf562f87f7b5..596effd86371 100644 --- a/include/asm-arm/arch-rpc/memory.h +++ b/include/asm-arm/arch-rpc/memory.h @@ -50,4 +50,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) __phys_to_virt(x) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h index 6b4df87a9ba0..6e070b9071a9 100644 --- a/include/asm-arm/arch-rpc/system.h +++ b/include/asm-arm/arch-rpc/system.h @@ -33,7 +33,7 @@ static void arch_idle(void) slow_out: } -extern __inline__ void arch_reset(char mode) +static inline void arch_reset(char mode) { iomd_writeb(0, IOMD_ROMCR0); diff --git a/include/asm-arm/arch-rpc/time.h b/include/asm-arm/arch-rpc/time.h index 334de6235249..e564892a28eb 100644 --- a/include/asm-arm/arch-rpc/time.h +++ b/include/asm-arm/arch-rpc/time.h @@ -24,7 +24,7 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* * Set up timer interrupt. */ -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { ioctime_init(); diff --git a/include/asm-arm/arch-sa1100/SA-1100.h b/include/asm-arm/arch-sa1100/SA-1100.h index 8729481794eb..e8c88721949f 100644 --- a/include/asm-arm/arch-sa1100/SA-1100.h +++ b/include/asm-arm/arch-sa1100/SA-1100.h @@ -455,6 +455,17 @@ typedef PCMCIAPrtType PCMCIAType [PCMCIASp/PCMCIAPrtSp] ; #define _Ser3UTSR0 _UTSR0 (3) /* Ser. port 3 UART Status Reg. 0 */ #define _Ser3UTSR1 _UTSR1 (3) /* Ser. port 3 UART Status Reg. 1 */ +/* + * Register offsets + */ +#define UTCR0 0x00 +#define UTCR1 0x04 +#define UTCR2 0x08 +#define UTCR3 0x0c +#define UTDR 0x14 +#define UTSR0 0x1c +#define UTSR1 0x20 + #if LANGUAGE == C #define Ser1UTCR0 /* Ser. port 1 UART Control Reg. 0 */ \ @@ -1917,6 +1928,7 @@ typedef PCMCIAPrtType PCMCIAType [PCMCIASp/PCMCIAPrtSp] ; (0xA0000010 + (Nb)*4) #define _MSC0 _MSC (0) /* Static memory Control reg. 0 */ #define _MSC1 _MSC (1) /* Static memory Control reg. 1 */ +#define _MSC2 0xA000002C /* Static memory Control reg. 2, not contiguous */ #if LANGUAGE == C /* Memory system: */ @@ -1925,6 +1937,7 @@ typedef PCMCIAPrtType PCMCIAType [PCMCIASp/PCMCIAPrtSp] ; ((volatile Word *) io_p2v (_MSC (0))) #define MSC0 (MSC [0]) /* Static memory Control reg. 0 */ #define MSC1 (MSC [1]) /* Static memory Control reg. 1 */ +#define MSC2 (*(volatile Word *) io_p2v (_MSC2)) /* Static memory Control reg. 2 */ #elif LANGUAGE == Assembly @@ -2748,10 +2761,10 @@ typedef PCMCIAPrtType PCMCIAType [PCMCIASp/PCMCIAPrtSp] ; #define LCCR1_DisWdth(Pixel) /* Display Width [16..1024 pix.] */ \ (((Pixel) - 16)/16 << FShft (LCCR1_PPL)) #define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ - /* pulse Width - 2 [Tpix] (L_LCLK) */ + /* pulse Width - 1 [Tpix] (L_LCLK) */ #define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \ - /* pulse Width [2..65 Tpix] */ \ - (((Tpix) - 2) << FShft (LCCR1_HSW)) + /* pulse Width [1..64 Tpix] */ \ + (((Tpix) - 1) << FShft (LCCR1_HSW)) #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */ /* count - 1 [Tpix] */ #define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \ @@ -2825,8 +2838,8 @@ typedef PCMCIAPrtType PCMCIAType [PCMCIASp/PCMCIAPrtSp] ; #define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */ /* pulse active Low */ #define LCCR3_PCP 0x00400000 /* Pixel Clock Polarity (L_PCLK) */ -#define LCCR3_PixFlEdg (LCCR3_PCP*0) /* Pixel clock Falling-Edge */ -#define LCCR3_PixRsEdg (LCCR3_PCP*1) /* Pixel clock Rising-Edge */ +#define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */ +#define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */ #define LCCR3_OEP 0x00800000 /* Output Enable Polarity (L_BIAS, */ /* active display mode) */ #define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ diff --git a/include/asm-arm/arch-sa1100/SA-1111.h b/include/asm-arm/arch-sa1100/SA-1111.h index 00e85126d42c..7e9d4c1e9e1e 100644 --- a/include/asm-arm/arch-sa1100/SA-1111.h +++ b/include/asm-arm/arch-sa1100/SA-1111.h @@ -231,7 +231,7 @@ #define SACR2_DREC (1<<3) #define SACR2_DRPL (1<<4) #define SACR2_ENLBF (1<<5) -#define SACR2_RESET (1<<5) +#define SACR2_RESET (1<<6) #define SASR0_TNF (1<<0) #define SASR0_RNE (1<<1) @@ -447,8 +447,8 @@ #define _MSECR _SA1111( 0x0C00 ) #define _MSESTAT _SA1111( 0x0C04 ) #define _MSEDATA _SA1111( 0x0C08 ) -#define _MSECLKDIV _SA1111( 0x0C10 ) -#define _MSEPRECNT _SA1111( 0x0C14 ) +#define _MSECLKDIV _SA1111( 0x0C0C ) +#define _MSEPRECNT _SA1111( 0x0C10 ) #if ( LANGUAGE == C ) diff --git a/include/asm-arm/arch-sa1100/assabet.h b/include/asm-arm/arch-sa1100/assabet.h index a8f3dc79de04..084dfe4afc1a 100644 --- a/include/asm-arm/arch-sa1100/assabet.h +++ b/include/asm-arm/arch-sa1100/assabet.h @@ -31,8 +31,14 @@ #define BCR_BASE 0xf1000000 #define BCR (*(volatile unsigned int *)(BCR_BASE)) -#define BCR_DB1110 (0x00A07410) -#define BCR_DB1111 (0x00A074E2) +#define BCR_DB1110 \ + (BCR_SPK_OFF | BCR_QMUTE | BCR_LED_GREEN | BCR_LED_RED | \ + BCR_RS232EN | BCR_LCD_12RGB | BCR_IRDA_MD0) + +#define BCR_DB1111 \ + (BCR_SPK_OFF | BCR_QMUTE | BCR_LED_GREEN | BCR_LED_RED | \ + BCR_RS232EN | BCR_LCD_12RGB | BCR_CF_BUS_OFF | BCR_STEREO_LB | \ + BCR_IRDA_MD1 | BCR_CF_RST) #define BCR_CF_PWR (1<<0) /* Compact Flash Power (1 = 3.3v, 0 = off) */ #define BCR_CF_RST (1<<1) /* Compact Flash Reset (1 = power up reset) */ @@ -67,6 +73,18 @@ extern unsigned long BCR_value; #define BCR_clear( x ) BCR = (BCR_value &= ~(x)) #endif +#define BSR_BASE 0xf1000000 +#define BSR (*(volatile unsigned int*)(BSR_BASE)) + +#define BSR_RS232_VALID (1 << 24) +#define BSR_COM_DCD (1 << 25) +#define BSR_COM_CTS (1 << 26) +#define BSR_COM_DSR (1 << 27) +#define BSR_RAD_CTS (1 << 28) +#define BSR_RAD_DSR (1 << 29) +#define BSR_RAD_DCD (1 << 30) +#define BSR_RAD_RI (1 << 31) + /* GPIOs for which the generic definition doesn't say much */ #define GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ @@ -144,6 +162,18 @@ extern unsigned long BCR_value; #define AUD_SEL_1341 (1<<0) #define AUD_MUTE_1341 (1<<1) +#define MDM_CTL0_RTS1 (1 << 0) +#define MDM_CTL0_DTR1 (1 << 1) +#define MDM_CTL0_RTS2 (1 << 2) +#define MDM_CTL0_DTR2 (1 << 3) + +#define MDM_CTL1_CTS1 (1 << 0) +#define MDM_CTL1_DSR1 (1 << 1) +#define MDM_CTL1_DCD1 (1 << 2) +#define MDM_CTL1_CTS2 (1 << 3) +#define MDM_CTL1_DSR2 (1 << 4) +#define MDM_CTL1_DCD2 (1 << 5) + #define NCR_GP01_OFF (1<<0) #define NCR_TP_PWR_EN (1<<1) #define NCR_MS_PWR_EN (1<<2) diff --git a/include/asm-arm/arch-sa1100/bitsy.h b/include/asm-arm/arch-sa1100/bitsy.h index 23761bfaa75c..acd71eb7eade 100644 --- a/include/asm-arm/arch-sa1100/bitsy.h +++ b/include/asm-arm/arch-sa1100/bitsy.h @@ -1,50 +1,79 @@ +/* +* +* Definitions for H3600 Handheld Computer +* +* Copyright 2000 Compaq Computer Corporation. +* +* Use consistent with the GNU GPL is permitted, +* provided that this copyright notice is +* preserved in its entirety in all copies and derived works. +* +* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, +* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS +* FITNESS FOR ANY PARTICULAR PURPOSE. +* +* Author: Jamey Hicks. +* +*/ + #ifndef _INCLUDE_BITSY_H_ #define _INCLUDE_BITSY_H_ -#define GPIO_BITSY_NPOWER_BUTTON GPIO_GPIO (0) -#define GPIO_BITSY_ACTION_BUTTON GPIO_GPIO (18) +#define GPIO_BITSY_NPOWER_BUTTON GPIO_GPIO (0) +#define GPIO_BITSY_ACTION_BUTTON GPIO_GPIO (18) -#define GPIO_BITSY_PCMCIA_CD0 GPIO_GPIO (17) -#define GPIO_BITSY_PCMCIA_CD1 GPIO_GPIO (10) -#define GPIO_BITSY_PCMCIA_IRQ0 GPIO_GPIO (21) -#define GPIO_BITSY_PCMCIA_IRQ1 GPIO_GPIO (11) +#define GPIO_BITSY_PCMCIA_CD0 GPIO_GPIO (17) +#define GPIO_BITSY_PCMCIA_CD1 GPIO_GPIO (10) +#define GPIO_BITSY_PCMCIA_IRQ0 GPIO_GPIO (21) +#define GPIO_BITSY_PCMCIA_IRQ1 GPIO_GPIO (11) /* audio sample rate clock generator */ -#define GPIO_BITSY_CLK_SET0 GPIO_GPIO (12) -#define GPIO_BITSY_CLK_SET1 GPIO_GPIO (13) +#define GPIO_BITSY_CLK_SET0 GPIO_GPIO (12) +#define GPIO_BITSY_CLK_SET1 GPIO_GPIO (13) + /* UDA1341 L3 Interface */ -#define GPIO_BITSY_L3_DATA GPIO_GPIO (14) -#define GPIO_BITSY_L3_CLOCK GPIO_GPIO (16) -#define GPIO_BITSY_L3_MODE GPIO_GPIO (15) +#define GPIO_BITSY_L3_DATA GPIO_GPIO (14) +#define GPIO_BITSY_L3_CLOCK GPIO_GPIO (16) +#define GPIO_BITSY_L3_MODE GPIO_GPIO (15) +#define GPIO_BITSY_OPT_LOCK GPIO_GPIO (22) +#define GPIO_BITSY_OPT_IRQ GPIO_GPIO (24) +#define GPIO_BITSY_OPT_DET GPIO_GPIO (27) +#define GPIO_BITSY_COM_DCD GPIO_GPIO (23) +#define GPIO_BITSY_COM_CTS GPIO_GPIO (25) +#define GPIO_BITSY_COM_RTS GPIO_GPIO (26) #define IRQ_GPIO_BITSY_NPOWER_BUTTON IRQ_GPIO0 #define IRQ_GPIO_BITSY_ACTION_BUTTON IRQ_GPIO18 #define IRQ_GPIO_BITSY_PCMCIA_CD0 IRQ_GPIO17 #define IRQ_GPIO_BITSY_PCMCIA_CD1 IRQ_GPIO10 #define IRQ_GPIO_BITSY_PCMCIA_IRQ0 IRQ_GPIO21 -#define IRQ_GPIO_BITSY_PCMCIA_IRQ1 IRQ_GPIO22 +#define IRQ_GPIO_BITSY_PCMCIA_IRQ1 IRQ_GPIO11 +#define IRQ_GPIO_BITSY_OPT_IRQ IRQ_GPIO24 +#define IRQ_GPIO_BITSY_OPT_DET IRQ_GPIO27 +#define IRQ_GPIO_BITSY_COM_DCD IRQ_GPIO23 +#define IRQ_GPIO_BITSY_COM_CTS IRQ_GPIO25 -#define EGPIO_BITSY_VPP_ON (1 << 0) -#define EGPIO_BITSY_CARD_RESET (1 << 1) /* reset the attached pcmcia/compactflash card. active high. */ -#define EGPIO_BITSY_OPT_RESET (1 << 2) /* reset the attached option pack. active high. */ -#define EGPIO_BITSY_CODEC_NRESET (1 << 3) /* reset the onboard UDA1341. active low. */ -#define EGPIO_BITSY_OPT_NVRAM_ON (1 << 4) /* apply power to optionpack nvram, active high. */ -#define EGPIO_BITSY_OPT_ON (1 << 5) /* full power to option pack. active high. */ -#define EGPIO_BITSY_LCD_ON (1 << 6) /* enable 3.3V to LCD. active high. */ -#define EGPIO_BITSY_RS232_ON (1 << 7) /* UART3 transceiver force on. Active high. */ -#define EGPIO_BITSY_LCD_PCI (1 << 8) /* LCD control IC enable. active high. */ -#define EGPIO_BITSY_IR_ON (1 << 9) /* apply power to IR module. active high. */ -#define EGPIO_BITSY_AUD_AMP_ON (1 << 10) /* apply power to audio power amp. active high. */ -#define EGPIO_BITSY_AUD_PWR_ON (1 << 11) /* apply poewr to reset of audio circuit. active high. */ -#define EGPIO_BITSY_QMUTE (1 << 12) /* mute control for onboard UDA1341. active high. */ -#define EGPIO_BITSY_IR_FSEL (1 << 13) /* IR speed select: 1->fast, 0->slow */ -#define EGPIO_BITSY_LCD_5V_ON (1 << 14) /* enable 5V to LCD. active high. */ -#define EGPIO_BITSY_LVDD_ON (1 << 15) /* enable 9V and -6.5V to LCD. */ +#define EGPIO_BITSY_VPP_ON (1 << 0) +#define EGPIO_BITSY_CARD_RESET (1 << 1) /* reset the attached pcmcia/compactflash card. active high. */ +#define EGPIO_BITSY_OPT_RESET (1 << 2) /* reset the attached option pack. active high. */ +#define EGPIO_BITSY_CODEC_NRESET (1 << 3) /* reset the onboard UDA1341. active low. */ +#define EGPIO_BITSY_OPT_NVRAM_ON (1 << 4) /* apply power to optionpack nvram, active high. */ +#define EGPIO_BITSY_OPT_ON (1 << 5) /* full power to option pack. active high. */ +#define EGPIO_BITSY_LCD_ON (1 << 6) /* enable 3.3V to LCD. active high. */ +#define EGPIO_BITSY_RS232_ON (1 << 7) /* UART3 transceiver force on. Active high. */ +#define EGPIO_BITSY_LCD_PCI (1 << 8) /* LCD control IC enable. active high. */ +#define EGPIO_BITSY_IR_ON (1 << 9) /* apply power to IR module. active high. */ +#define EGPIO_BITSY_AUD_AMP_ON (1 << 10) /* apply power to audio power amp. active high. */ +#define EGPIO_BITSY_AUD_PWR_ON (1 << 11) /* apply poewr to reset of audio circuit. active high. */ +#define EGPIO_BITSY_QMUTE (1 << 12) /* mute control for onboard UDA1341. active high. */ +#define EGPIO_BITSY_IR_FSEL (1 << 13) /* IR speed select: 1->fast, 0->slow */ +#define EGPIO_BITSY_LCD_5V_ON (1 << 14) /* enable 5V to LCD. active high. */ +#define EGPIO_BITSY_LVDD_ON (1 << 15) /* enable 9V and -6.5V to LCD. */ #ifndef __ASSEMBLY__ -#define BITSY_EGPIO (*(volatile int *)0xf0000000) +#define BITSY_EGPIO (*(volatile int *)0xf0000000) extern void clr_bitsy_egpio(unsigned long x); extern void set_bitsy_egpio(unsigned long x); #endif diff --git a/include/asm-arm/arch-sa1100/dma.h b/include/asm-arm/arch-sa1100/dma.h index 1171f6d95fbc..d44589428861 100644 --- a/include/asm-arm/arch-sa1100/dma.h +++ b/include/asm-arm/arch-sa1100/dma.h @@ -86,9 +86,9 @@ typedef void (*dma_callback_t)( void *buf_id, int size ); /* SA1100 DMA API */ -extern int sa1100_request_dma( dmach_t *channel, const char *device_id ); +extern int sa1100_request_dma( dmach_t *channel, const char *device_id, + dma_device_t device ); extern int sa1100_dma_set_callback( dmach_t channel, dma_callback_t cb ); -extern int sa1100_dma_set_device( dmach_t channel, dma_device_t device ); extern int sa1100_dma_set_spin( dmach_t channel, dma_addr_t addr, int size ); extern int sa1100_dma_queue_buffer( dmach_t channel, void *buf_id, dma_addr_t data, int size ); @@ -97,11 +97,23 @@ extern int sa1100_dma_stop( dmach_t channel ); extern int sa1100_dma_resume( dmach_t channel ); extern int sa1100_dma_flush_all( dmach_t channel ); extern void sa1100_free_dma( dmach_t channel ); +extern int sa1100_dma_sleep( dmach_t channel ); +extern int sa1100_dma_wakeup( dmach_t channel ); /* Sa1111 DMA interface (all but registration uses the above) */ extern int sa1111_sac_request_dma( dmach_t *channel, const char *device_id, unsigned int direction ); extern int sa1111_check_dma_bug( dma_addr_t addr ); +#ifdef CONFIG_SA1111 +static inline void +__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes) +{ + size[1] = size[0] - 256; + size[0] = 256; +} + +#define arch_adjust_zones(node,size,holes) __arch_adjust_zones(node,size,holes) +#endif #endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-sa1100/flexanet.h b/include/asm-arm/arch-sa1100/flexanet.h new file mode 100644 index 000000000000..f0b8d42f2278 --- /dev/null +++ b/include/asm-arm/arch-sa1100/flexanet.h @@ -0,0 +1,71 @@ +/* + * linux/include/asm-arm/arch-sa1100/flexanet.h + * + * Created 2001/05/04 by Jordi Colomer <jco@ict.es> + * + * This file contains the hardware specific definitions for FlexaNet + * + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include <asm/hardware.h> instead" +#endif + + +/* Board Control Register (virtual address) */ +#define BCR_PHYS 0x10000000 +#define BCR_VIRT 0xf0000000 +#define BCR (*(volatile unsigned int *)(BCR_VIRT)) + +/* Power-up value */ +#define BCR_POWERUP 0x00000000 + +/* Mandatory bits */ +#define BCR_LED_GREEN (1<<0) /* General-purpose green LED (1 = on) */ +#define BCR_GUI_NRST (1<<4) /* GUI board reset (0 = reset) */ + +/* Board Status Register (virtual address) */ +#define BSR_BASE BCR_BASE +#define BSR (*(volatile unsigned int *)(BSR_BASE)) + + +#ifndef __ASSEMBLY__ +extern unsigned long BCR_value; /* Image of the BCR */ +#define BCR_set( x ) BCR = (BCR_value |= (x)) +#define BCR_clear( x ) BCR = (BCR_value &= ~(x)) +#endif + + +/* GPIOs for which the generic definition doesn't say much */ +#define GPIO_GUI_IRQ GPIO_GPIO (23) /* IRQ from GUI board (i.e., UCB1300) */ +#define GPIO_ETH_IRQ GPIO_GPIO (24) /* IRQ from Ethernet controller */ +#define GPIO_LED_RED GPIO_GPIO (26) /* General-purpose red LED */ + +/* IRQ sources from GPIOs */ +#define IRQ_GPIO_GUI IRQ_GPIO23 +#define IRQ_GPIO_ETH IRQ_GPIO24 + +/* On-Board Ethernet */ +#define _FHH_ETH_IOBASE 0x18000000 /* I/O base (physical addr) */ +#define _FHH_ETH_MMBASE 0x18800000 /* Attribute-memory base */ +#define FHH_ETH_SIZE 0x01000000 /* total size */ +#define FHH_ETH_VIRT 0xF1000000 /* Ethernet virtual address */ + +#define FHH_ETH_p2v( x ) ((x) - _FHH_ETH_IOBASE + FHH_ETH_VIRT) +#define FHH_ETH_v2p( x ) ((x) - FHH_ETH_VIRT + _FHH_ETH_IOBASE) + +#define FHH_ETH_IOBASE FHH_ETH_p2v(_FHH_ETH_IOBASE) /* Virtual base addr */ +#define FHH_ETH_MMBASE FHH_ETH_p2v(_FHH_ETH_MMBASE) + + +/* Types of GUI */ +#ifndef __ASSEMBLY__ +extern unsigned long GUI_type; +#endif + +#define FHH_GUI_ERROR 0xFFFFFFFF +#define FHH_GUI_NONE 0x0000000F +#define FHH_GUI_TYPE_0 0 +#define FHH_GUI_TYPE_1 1 +#define FHH_GUI_TYPE_2 2 + diff --git a/include/asm-arm/arch-sa1100/freebird.h b/include/asm-arm/arch-sa1100/freebird.h new file mode 100644 index 000000000000..2b2d9050eb26 --- /dev/null +++ b/include/asm-arm/arch-sa1100/freebird.h @@ -0,0 +1,69 @@ +/* + * + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include <asm/hardware.h> instead" +#endif + + +/* Board Control Register */ + +#define BCR_BASE 0xf0000000 +#define BCR (*(volatile unsigned int *)(BCR_BASE)) + +#define BCR_DB1110 (0x00A07410) + + +#define BCR_FREEBIRD_AUDIO_PWR (1<<0) /* Audio Power (1 = on, 0 = off) */ +#define BCR_FREEBIRD_LCD_PWR (1<<1) /* LCD Power (1 = on) */ +#define BCR_FREEBIRD_CODEC_RST (1<<2) /* 0 = Holds UCB1300, ADI7171, and UDA1341 in reset */ +#define BCR_FREEBIRD_IRDA_FSEL (1<<3) /* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */ +#define BCR_FREEBIRD_IRDA_MD0 (1<<4) /* Range/Power select */ +#define BCR_FREEBIRD_IRDA_MD1 (1<<5) /* Range/Power select */ +#define BCR_FREEBIRD_LCD_DISP (1<<7) /* LCD display (1 = on, 0 = off */ +#define BCR_FREEBIRD_LCD_BACKLIGHT (1<<16) /* LCD backlight ,1=on */ +#define BCR_FREEBIRD_LCD_LIGHT_INC (1<<17) /* LCD backlight brightness */ +#define BCR_FREEBIRD_LCD_LIGHT_DU (1<<18) /* LCD backlight brightness */ +#define BCR_FREEBIRD_LCD_INC (1<<19) /* LCD contrast */ +#define BCR_FREEBIRD_LCD_DU (1<<20) /* LCD contrast */ +#define BCR_FREEBIRD_QMUTE (1<<21) /* Quick Mute */ +#define BCR_FREEBIRD_ALARM_LED (1<<22) /* ALARM LED control */ +#define BCR_FREEBIRD_SPK_OFF (1<<23) /* 1 = Speaker amplifier power off */ + +#ifndef __ASSEMBLY__ +extern unsigned long BCR_value; +#define BCR_set( x ) BCR = (BCR_value |= (x)) +#define BCR_clear( x ) BCR = (BCR_value &= ~(x)) +#endif + + +/* GPIOs for which the generic definition doesn't say much */ +#define GPIO_FREEBIRD_NPOWER_BUTTON GPIO_GPIO(0) +#define GPIO_FREEBIRD_APP1_BUTTON GPIO_GPIO(1) +#define GPIO_FREEBIRD_APP2_BUTTON GPIO_GPIO(2) +#define GPIO_FREEBIRD_APP3_BUTTOM GPIO_GPIO(3) +#define GPIO_FREEBIRD_UCB1300 GPIO_GPIO(4) + +#define GPIO_FREEBIRD_EXPWR GPIO_GPIO(8) +#define GPIO_FREEBIRD_CHARGING GPIO_GPIO(9) +#define GPIO_FREEBIRD_RAMD GPIO_GPIO(14) +#define GPIO_FREEBIRD_L3_DATA GPIO_GPIO(15) +#define GPIO_FREEBIRD_L3_MODE GPIO_GPIO(17) +#define GPIO_FREEBIRD_L3_CLOCK GPIO_GPIO(18) +#define GPIO_FREEBIRD_STEREO_64FS_CLK GPIO_GPIO(10) + +#define GPIO_FREEBIRD_CF_CD GPIO_GPIO(22) +#define GPIO_FREEBIRD_CF_IRQ GPIO_GPIO(21) +#define GPIO_FREEBIRD_CF_BVD GPIO_GPIO(25) + +#define IRQ_GPIO_FREEBIRD_NPOWER_BUTTON IRQ_GPIO0 +#define IRQ_GPIO_FREEBIRD_APP1_BUTTON IRQ_GPIO1 +#define IRQ_GPIO_FREEBIRD_APP2_BUTTON IRQ_GPIO2 +#define IRQ_GPIO_FREEBIRD_APP3_BUTTON IRQ_GPIO3 +#define IRQ_GPIO_FREEBIRD_UCB1300_IRQ IRQ_GPIO4 + +#define IRQ_GPIO_FREEBIRD_CF_IRQ IRQ_GPIO21 +#define IRQ_GPIO_FREEBIRD_CF_CD IRQ_GPIO22 +#define IRQ_GPIO_FREEBIRD_CF_BVD IRQ_GPIO25 + diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 9e9e45686f20..801008b3e4bd 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -73,6 +73,12 @@ #define GPIO_BOTH_EDGES 3 #ifndef __ASSEMBLY__ extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); + +/* + * Return the current CPU clock frequency in units of 100kHz + */ +extern unsigned short get_cclk_frequency(void); + #endif @@ -90,6 +96,24 @@ extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); #define machine_has_neponset() (0) #endif + +#ifdef CONFIG_SA1100_HUW_WEBPANEL +#include "huw_webpanel.h" +#endif + +#ifdef CONFIG_SA1100_PFS168 +#include "pfs168.h" +#endif + + +#ifdef CONFIG_SA1100_YOPY +#include "yopy.h" +#endif + +#ifdef CONFIG_SA1100_FREEBIRD +#include "freebird.h" +#endif + #ifdef CONFIG_SA1100_CERF #include "cerf.h" #endif @@ -102,10 +126,33 @@ extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); #include "bitsy.h" #endif +#ifdef CONFIG_SA1100_ITSY +#include "itsy.h" +#endif + #if defined(CONFIG_SA1100_GRAPHICSCLIENT) #include "graphicsclient.h" #endif +#if defined(CONFIG_SA1100_OMNIMETER) +#include "omnimeter.h" +#endif + +#if defined(CONFIG_SA1100_JORNADA720) +#include "jornada720.h" +#endif + +#if defined(CONFIG_SA1100_PLEB) +#include "pleb.h" +#endif + +#if defined(CONFIG_SA1100_LART) +#include "lart.h" +#endif + +#ifdef CONFIG_SA1100_SIMPAD +#include "simpad.h" +#endif #ifdef CONFIG_SA1101 @@ -121,6 +168,17 @@ extern void set_GPIO_IRQ_edge( int gpio_mask, int edge_mask ); #endif +#if defined(CONFIG_SA1100_OMNIMETER) +#include "omnimeter.h" +#endif + +#if defined(CONFIG_SA1100_JORNADA720) +#include "jornada720.h" +#endif + +#if defined(CONFIG_SA1100_FLEXANET) +#include "flexanet.h" +#endif #ifdef CONFIG_SA1111 diff --git a/include/asm-arm/arch-sa1100/huw_webpanel.h b/include/asm-arm/arch-sa1100/huw_webpanel.h new file mode 100644 index 000000000000..4f9100f7740d --- /dev/null +++ b/include/asm-arm/arch-sa1100/huw_webpanel.h @@ -0,0 +1,49 @@ +/* + * linux/include/asm-arm/arch-sa1100/huw_webpanel.h + * + * based of assabet.h + * + * This file contains the hardware specific definitions for HUW_Webpanel + * + * 2000/11/13 Roman Jordan <jor@hoeft-wessel.de> + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include <asm/hardware.h> instead" +#endif + +/* System Configuration Register flags */ + +#define SCR_SDRAM_LOW (1<<2) /* SDRAM size (low bit) */ +#define SCR_SDRAM_HIGH (1<<3) /* SDRAM size (high bit) */ +#define SCR_FLASH_LOW (1<<4) /* Flash size (low bit) */ +#define SCR_FLASH_HIGH (1<<5) /* Flash size (high bit) */ +#define SCR_GFX (1<<8) /* Graphics Accelerator (0 = present) */ +#define SCR_SA1111 (1<<9) /* Neponset (0 = present) */ + +#define SCR_INIT -1 + + +/* Board Control Register */ + +#define BCR_BASE 0xf1000000 +#define BCR (*(volatile unsigned int *)(BCR_BASE)) + +#define BCR_PSIO_DTR1 (1<<29) +#define BCR_TFT_NPWR (1<<28) +#define BCR_PSIO_DTR3 (1<<27) +#define BCR_TFT_ENA (1<<26) +#define BCR_CCFL_POW (1<<25) +#define BCR_PSIO_RTS1 (1<<24) +#define BCR_PWM_BACKLIGHT (1<<23) + + +#ifndef __ASSEMBLY__ +extern unsigned long SCR_value; +extern unsigned long BCR_value; +#define BCR_set( x ) BCR = (BCR_value |= (x)) +#define BCR_clear( x ) BCR = (BCR_value &= ~(x)) +#endif + + + diff --git a/include/asm-arm/arch-sa1100/irq.h b/include/asm-arm/arch-sa1100/irq.h index 8c3105066f31..56ae68a44e80 100644 --- a/include/asm-arm/arch-sa1100/irq.h +++ b/include/asm-arm/arch-sa1100/irq.h @@ -1,449 +1,13 @@ /* * linux/include/asm-arm/arch-sa1100/irq.h - * - * Copyright (C) 1996-1999 Russell king - * Copyright (C) 1999 Hugo Fiennes - * - * Changelog: - * 22-08-1998 RMK Restructured IRQ routines - * 06-01-1999 HBF SA1100 twiddles - * 12-02-1999 NP added ICCR - * 17-02-1999 NP empeg henry ugly hacks now in a separate file ;) - * 11-08-1999 PD SA1101 support added - * 25-09-1999 RMK Merged into main ARM tree, cleaned up - * 12-05-2000 NP IRQ dispatcher handler for GPIOs 11 to 27. - * 26-05-2000 JD SA-1111 support added - * 01-06-2000 NP GraphicsClient external IRQ dispatcher - * 09-10-2000 NP Fixed lost interrupts on GPIOs 11 to 27. + * + * Author: Nicolas Pitre */ -#include <linux/config.h> -#include <asm/irq.h> -#include <asm/hardware.h> -#include <asm/mach-types.h> #define fixup_irq(x) (x) -/* - * We don't need to ACK IRQs on the SA1100 unless they're GPIOs - * this is for internal IRQs i.e. from 11 to 31. - */ - -static void sa1100_mask_irq(unsigned int irq) -{ - ICMR &= ~(1 << irq); -} - -static void sa1100_unmask_irq(unsigned int irq) -{ - ICMR |= (1 << irq); -} - -/* - * SA1100 GPIO edge detection for IRQs. - */ -extern int GPIO_IRQ_rising_edge; -extern int GPIO_IRQ_falling_edge; - -/* - * GPIO IRQs must be acknoledged. This is for IRQs from 0 to 10. - */ - -static void sa1100_mask_and_ack_GPIO0_10_irq(unsigned int irq) -{ - ICMR &= ~(1 << irq); - GEDR = (1 << irq); -} - -static void sa1100_mask_GPIO0_10_irq(unsigned int irq) -{ - ICMR &= ~(1 << irq); -} - -static void sa1100_unmask_GPIO0_10_irq(unsigned int irq) -{ - GRER = (GRER & ~(1 << irq)) | (GPIO_IRQ_rising_edge & (1 << irq)); - GFER = (GFER & ~(1 << irq)) | (GPIO_IRQ_falling_edge & (1 << irq)); - ICMR |= (1 << irq); -} - -/* - * Install handler for GPIO 11-27 edge detect interrupts - */ - -void do_IRQ(int irq, struct pt_regs * regs); - -static int GPIO_11_27_enabled; /* enabled i.e. unmasked GPIO IRQs */ -static int GPIO_11_27_spurious; /* GPIOs that triggered when masked */ - -static void sa1100_GPIO11_27_demux(int irq, void *dev_id, - struct pt_regs *regs) -{ - int i, spurious; - - while( (irq = (GEDR & 0xfffff800)) ){ - /* - * We don't want to clear GRER/GFER when the corresponding - * IRQ is masked because we could miss a level transition - * i.e. an IRQ which need servicing as soon as it is - * unmasked. However, such situation should happen only - * during the loop below. Thus all IRQs which aren't - * enabled at this point are considered spurious. Those - * are cleared but only de-activated if they happen twice. - */ - spurious = irq & ~GPIO_11_27_enabled; - if (spurious) { - GEDR = spurious; - GRER &= ~(spurious & GPIO_11_27_spurious); - GFER &= ~(spurious & GPIO_11_27_spurious); - GPIO_11_27_spurious |= spurious; - irq ^= spurious; - if (!irq) continue; - } - - for (i = 11; i <= 27; ++i) { - if (irq & (1<<i)) { - do_IRQ( IRQ_GPIO_11_27(i), regs ); - } - } - } -} - -static struct irqaction GPIO11_27_irq = { - name: "GPIO 11-27", - handler: sa1100_GPIO11_27_demux, - flags: SA_INTERRUPT -}; - -static void sa1100_mask_and_ack_GPIO11_27_irq(unsigned int irq) -{ - int mask = (1 << GPIO_11_27_IRQ(irq)); - GPIO_11_27_spurious &= ~mask; - GPIO_11_27_enabled &= ~mask; - GEDR = mask; -} - -static void sa1100_mask_GPIO11_27_irq(unsigned int irq) -{ - int mask = (1 << GPIO_11_27_IRQ(irq)); - GPIO_11_27_spurious &= ~mask; - GPIO_11_27_enabled &= ~mask; -} - -static void sa1100_unmask_GPIO11_27_irq(unsigned int irq) -{ - int mask = (1 << GPIO_11_27_IRQ(irq)); - if (GPIO_11_27_spurious & mask) { - /* - * We don't want to miss an interrupt that would have occurred - * while it was masked. Simulate it if it is the case. - */ - int state = GPLR; - if (((state & GPIO_IRQ_rising_edge) | - (~state & GPIO_IRQ_falling_edge)) & mask) { - do_IRQ(irq, NULL); - /* we are being called again from do_IRQ() so ... */ - return; - } - } - GPIO_11_27_enabled |= mask; - GRER = (GRER & ~mask) | (GPIO_IRQ_rising_edge & mask); - GFER = (GFER & ~mask) | (GPIO_IRQ_falling_edge & mask); -} - - -#if defined(CONFIG_SA1111) - -/* - * Install handler for SA1111 IRQ handler. - */ - -static void sa1111_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs ) -{ - int i; - unsigned long stat0, stat1; - - for(;;) { - stat0 = INTSTATCLR0, stat1 = INTSTATCLR1; - if( !stat0 && !stat1 ) break; - if( stat0 ) - for( i = 0; i < 32; i++ ) - if( stat0 & (1<<i) ) - do_IRQ( SA1111_IRQ(i), regs ); - - if( stat1 ) - for( i = 32; i < 55; i++ ) - if( stat1 & (1<<(i-32)) ) - do_IRQ( SA1111_IRQ(i), regs ); - } -} - -static struct irqaction sa1111_irq = { - name: "SA1111", - handler: sa1111_IRQ_demux, - flags: SA_INTERRUPT -}; - -static void sa1111_mask_and_ack_lowirq(unsigned int irq) -{ - unsigned int mask = 1 << (irq - SA1111_IRQ(0)); - - //INTEN0 &= ~mask; - INTSTATCLR0 = mask; -} - -static void sa1111_mask_and_ack_highirq(unsigned int irq) -{ - unsigned int mask = 1 << (irq - SA1111_IRQ(32)); - - //INTEN1 &= ~mask; - INTSTATCLR1 = mask; -} - -static void sa1111_mask_lowirq(unsigned int irq) -{ - //INTEN0 &= ~(1 << (irq - SA1111_IRQ(0))); -} - -static void sa1111_mask_highirq(unsigned int irq) -{ - //INTEN1 &= ~(1 << (irq - SA1111_IRQ(32))); -} - -static void sa1111_unmask_lowirq(unsigned int irq) -{ - INTEN0 |= 1 << (irq - SA1111_IRQ(0)); -} - -static void sa1111_unmask_highirq(unsigned int irq) -{ - INTEN1 |= 1 << ((irq - SA1111_IRQ(32))); -} - -#endif /* CONFIG_SA1111 */ - - -#ifdef CONFIG_ASSABET_NEPONSET - -/* - * Install handler for Neponset IRQ. Yes, yes... we are way down the IRQ - * cascade which is not good for IRQ latency, but the hardware has been - * designed that way... - */ - -static void neponset_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs ) -{ - int irr; - - for(;;){ - irr = IRR & (IRR_ETHERNET | IRR_USAR | IRR_SA1111); - /* Let's have all active IRQ bits high. - * Note: there is a typo in the Neponset user's guide - * for the SA1111 IRR level. - */ - irr ^= (IRR_ETHERNET | IRR_USAR); - if (!irr) break; - - if( irr & IRR_ETHERNET ) - do_IRQ(NEPONSET_ETHERNET_IRQ, regs); - - if( irr & IRR_USAR ) - do_IRQ(NEPONSET_USAR_IRQ, regs); - - if( irr & IRR_SA1111 ) - sa1111_IRQ_demux(irq, dev_id, regs); - } -} - -static struct irqaction neponset_irq = { - name: "Neponset", - handler: neponset_IRQ_demux, - flags: SA_INTERRUPT -}; - -#endif - - -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) - /* - * IRQ handler for the ThinClient/GraphicsClient external IRQ controller + * This prototype is required for cascading of multiplexed interrupts. + * Since it doesn't exist elsewhere, we'll put it here for now. */ - -static void ADS_IRQ_demux( int irq, void *dev_id, struct pt_regs *regs ) -{ - int irq, i; - - while( (irq = ADS_INT_ST1 | (ADS_INT_ST2 << 8)) ){ - for( i = 0; i < 16; i++ ) - if( irq & (1<<i) ) - do_IRQ( ADS_EXT_IRQ(i), regs ); - } -} - -static struct irqaction ADS_ext_irq = { - name: "ADS_ext_IRQ", - handler: ADS_IRQ_demux, - flags: SA_INTERRUPT -}; - -static void ADS_mask_and_ack_irq0(unsigned int irq) -{ - int mask = (1 << (irq - ADS_EXT_IRQ(0))); - ADS_INT_EN1 &= ~mask; - ADS_INT_ST1 = mask; -} - -static void ADS_mask_irq0(unsigned int irq) -{ - ADS_INT_ST1 = (1 << (irq - ADS_EXT_IRQ(0))); -} - -static void ADS_unmask_irq0(unsigned int irq) -{ - ADS_INT_EN1 |= (1 << (irq - ADS_EXT_IRQ(0))); -} - -static void ADS_mask_and_ack_irq1(unsigned int irq) -{ - int mask = (1 << (irq - ADS_EXT_IRQ(8))); - ADS_INT_EN2 &= ~mask; - ADS_INT_ST2 = mask; -} - -static void ADS_mask_irq1(unsigned int irq) -{ - ADS_INT_ST2 = (1 << (irq - ADS_EXT_IRQ(8))); -} - -static void ADS_unmask_irq1(unsigned int irq) -{ - ADS_INT_EN2 |= (1 << (irq - ADS_EXT_IRQ(8))); -} - -#endif - - -static __inline__ void irq_init_irq(void) -{ - int irq; - - /* disable all IRQs */ - ICMR = 0; - - /* all IRQs are IRQ, not FIQ */ - ICLR = 0; - - /* clear all GPIO edge detects */ - GFER = 0; - GRER = 0; - GEDR = -1; - - /* - * Whatever the doc says, this has to be set for the wait-on-irq - * instruction to work... on a SA1100 rev 9 at least. - */ - ICCR = 1; - - for (irq = 0; irq <= 10; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = sa1100_mask_and_ack_GPIO0_10_irq; - irq_desc[irq].mask = sa1100_mask_GPIO0_10_irq; - irq_desc[irq].unmask = sa1100_unmask_GPIO0_10_irq; - } - - for (irq = 11; irq <= 31; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 0; - irq_desc[irq].mask_ack = sa1100_mask_irq; - irq_desc[irq].mask = sa1100_mask_irq; - irq_desc[irq].unmask = sa1100_unmask_irq; - } - - for (irq = 32; irq <= 48; irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = sa1100_mask_and_ack_GPIO11_27_irq; - irq_desc[irq].mask = sa1100_mask_GPIO11_27_irq; - irq_desc[irq].unmask = sa1100_unmask_GPIO11_27_irq; - } - setup_arm_irq( IRQ_GPIO11_27, &GPIO11_27_irq ); - -#ifdef CONFIG_SA1111 - if( machine_is_assabet() && machine_has_neponset() ){ - - /* disable all IRQs */ - INTEN0 = 0; - INTEN1 = 0; - - /* detect on rising edge */ - INTPOL0 = 0; - INTPOL1 = 0; - - /* clear all IRQs */ - INTSTATCLR0 = -1; - INTSTATCLR1 = -1; - - for (irq = SA1111_IRQ(0); irq <= SA1111_IRQ(26); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = sa1111_mask_and_ack_lowirq; - irq_desc[irq].mask = sa1111_mask_lowirq; - irq_desc[irq].unmask = sa1111_unmask_lowirq; - } - for (irq = SA1111_IRQ(32); irq <= SA1111_IRQ(54); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = sa1111_mask_and_ack_highirq; - irq_desc[irq].mask = sa1111_mask_highirq; - irq_desc[irq].unmask = sa1111_unmask_highirq; - } - - if( machine_has_neponset() ){ - /* setup extra Neponset IRQs */ - irq = NEPONSET_ETHERNET_IRQ; - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq = NEPONSET_USAR_IRQ; - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - set_GPIO_IRQ_edge( GPIO_NEP_IRQ, GPIO_RISING_EDGE ); - setup_arm_irq( IRQ_GPIO_NEP_IRQ, &neponset_irq ); - }else{ - /* for pure SA1111 designs to come (currently unused) */ - set_GPIO_IRQ_edge( 0, GPIO_RISING_EDGE ); - setup_arm_irq( -1, &sa1111_irq ); - } - } -#endif - -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) - if( machine_is_graphicsclient() ){ - /* disable all IRQs */ - ADS_INT_EN1 = 0; - ADS_INT_EN2 = 0; - /* clear all IRQs */ - ADS_INT_ST1 = 0xff; - ADS_INT_ST2 = 0xff; - - for (irq = ADS_EXT_IRQ(0); irq <= ADS_EXT_IRQ(7); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = ADS_mask_and_ack_irq0; - irq_desc[irq].mask = ADS_mask_irq0; - irq_desc[irq].unmask = ADS_unmask_irq0; - } - for (irq = ADS_EXT_IRQ(8); irq <= ADS_EXT_IRQ(15); irq++) { - irq_desc[irq].valid = 1; - irq_desc[irq].probe_ok = 1; - irq_desc[irq].mask_ack = ADS_mask_and_ack_irq1; - irq_desc[irq].mask = ADS_mask_irq1; - irq_desc[irq].unmask = ADS_unmask_irq1; - } - GPDR &= ~GPIO_GPIO0; - set_GPIO_IRQ_edge(GPIO_GPIO0, GPIO_FALLING_EDGE); - setup_arm_irq( IRQ_GPIO0, &ADS_ext_irq ); - } -#endif - -} +extern void do_IRQ(int irq, struct pt_regs *regs); diff --git a/include/asm-arm/arch-sa1100/itsy.h b/include/asm-arm/arch-sa1100/itsy.h new file mode 100644 index 000000000000..3950cf748433 --- /dev/null +++ b/include/asm-arm/arch-sa1100/itsy.h @@ -0,0 +1,5 @@ +#ifndef _INCLUDE_ITSY_H_ +#define _INCLUDE_ITSY_H_ + + +#endif diff --git a/include/asm-arm/arch-sa1100/jornada720.h b/include/asm-arm/arch-sa1100/jornada720.h new file mode 100644 index 000000000000..1b8e8a304800 --- /dev/null +++ b/include/asm-arm/arch-sa1100/jornada720.h @@ -0,0 +1,28 @@ +/* + * linux/include/asm-arm/arch-sa1100/jornada720.h + * + * Created 2000/11/29 by John Ankcorn <jca@lcs.mit.edu> + * + * This file contains the hardware specific definitions for HP Jornada 720 + * + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include <asm/hardware.h> instead" +#endif + +#define SA1111_BASE (0x40000000) + +#define GPIO_JORNADA720_KEYBOARD GPIO_GPIO(0) +#define GPIO_JORNADA720_MOUSE GPIO_GPIO(9) + +#define GPIO_JORNADA720_KEYBOARD_IRQ IRQ_GPIO0 +#define GPIO_JORNADA720_MOUSE_IRQ IRQ_GPIO9 + +#ifndef __ASSEMBLY__ + +void jornada720_mcu_init(void); +void jornada_contrast(int arg_contrast); +void jornada720_battery(void); +int jornada720_getkey(unsigned char *data, int size); +#endif diff --git a/include/asm-arm/arch-sa1100/keyboard.h b/include/asm-arm/arch-sa1100/keyboard.h index 119325c6fa64..83e9c02ee786 100644 --- a/include/asm-arm/arch-sa1100/keyboard.h +++ b/include/asm-arm/arch-sa1100/keyboard.h @@ -52,7 +52,18 @@ extern unsigned char gc_kbd_sysrq_xlate[128]; #define kbd_disable_irq gc_kbd_disable_irq #define kbd_sysrq_xlate gc_kbd_sysrq_xlate -#elif defined(CONFIG_SA1111) /*@@@@@*/ +#elif CONFIG_SA1100_BITSY + +#define kbd_setkeycode(x...) (-ENOSYS) +#define kbd_getkeycode(x...) (-ENOSYS) +#define kbd_translate(sc_,kc_,rm_) ((*(kc_)=(sc_)),1) +#define kbd_unexpected_up(x...) (1) +#define kbd_leds(x...) do { } while (0) +#define kbd_init_hw(x...) do { } while (0) +#define kbd_enable_irq(x...) do { } while (0) +#define kbd_disable_irq(x...) do { } while (0) + +#elif 0 //defined(CONFIG_SA1111) /*@@@@@*/ #define KEYBOARD_IRQ TPRXINT #define DISABLE_KBD_DURING_INTERRUPTS 0 @@ -158,7 +169,7 @@ extern unsigned char sa1111_sysrq_xlate[128]; /* needed if MAGIC_SYSRQ is enabled for serial console */ #ifndef SYSRQ_KEY -#define SYSRQ_KEY -1 +#define SYSRQ_KEY ((unsigned char)(-1)) #define kbd_sysrq_xlate ((unsigned char *)NULL) #endif diff --git a/include/asm-arm/arch-sa1100/lart.h b/include/asm-arm/arch-sa1100/lart.h new file mode 100644 index 000000000000..342391618ec6 --- /dev/null +++ b/include/asm-arm/arch-sa1100/lart.h @@ -0,0 +1,7 @@ +#ifndef _INCLUDE_LART_H +#define _INCLUDE_LART_H + +#define GPIO_UCB1200_IRQ GPIO_GPIO (18) +#define IRQ_GPIO_UCB1200_IRQ IRQ_GPIO18 + +#endif diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index 9aa94003dae1..192d44243330 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -1,12 +1,13 @@ /* * linux/include/asm-arm/arch-sa1100/memory.h * - * Copyright (c) 1999 Nicolas Pitre <nico@cam.org> + * Copyright (C) 1999-2000 Nicolas Pitre <nico@cam.org> */ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H +#include <linux/config.h> /* * Task size: 3GB @@ -54,4 +55,74 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +#ifdef CONFIG_DISCONTIGMEM +/* + * Because of the wide memory address space between physical RAM banks on the + * SA1100, it's much convenient to use Linux's NUMA support to implement our + * memory map representation. Assuming all memory nodes have equal access + * characteristics, we then have generic discontigous memory support. + * + * Of course, all this isn't mandatory for SA1100 implementations with only + * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. + * + * The nodes are matched with the physical memory bank addresses which are + * incidentally the same as virtual addresses. + * + * node 0: 0xc0000000 - 0xc7ffffff + * node 1: 0xc8000000 - 0xcfffffff + * node 2: 0xd0000000 - 0xd7ffffff + * node 3: 0xd8000000 - 0xdfffffff + */ + +#define NR_NODES 4 + +/* + * Given a kernel address, find the home node of the underlying memory. + */ +#define KVADDR_TO_NID(addr) \ + (((unsigned long)(addr) - 0xc0000000) >> 27) + +/* + * Given a physical address, convert it to a node id. + */ +#define PHYS_TO_NID(addr) KVADDR_TO_NID(__phys_to_virt(addr)) + +/* + * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory + * and returns the mem_map of that node. + */ +#define ADDR_TO_MAPBASE(kaddr) \ + NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) + +/* + * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory + * and returns the index corresponding to the appropriate page in the + * node's mem_map. + */ +#define LOCAL_MAP_NR(kvaddr) \ + (((unsigned long)(kvaddr) & 0x07ffffff) >> PAGE_SHIFT) + +/* + * Given a kaddr, virt_to_page returns a pointer to the corresponding + * mem_map entry. + */ +#define virt_to_page(kaddr) \ + (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr)) + +/* + * VALID_PAGE returns a non-zero value if given page pointer is valid. + * This assumes all node's mem_maps are stored within the node they refer to. + */ +#define VALID_PAGE(page) \ +({ unsigned int node = KVADDR_TO_NID(page); \ + ( (node < NR_NODES) && \ + ((unsigned)((page) - NODE_MEM_MAP(node)) < NODE_DATA(node)->node_size) ); \ +}) + +#else + +#define PHYS_TO_NID(addr) (0) + +#endif + #endif diff --git a/include/asm-arm/arch-sa1100/mmzone.h b/include/asm-arm/arch-sa1100/mmzone.h deleted file mode 100644 index 4862ab9e8125..000000000000 --- a/include/asm-arm/arch-sa1100/mmzone.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/mmzone.h - * - * (C) 1999-2000, Nicolas Pitre <nico@cam.org> - * (inspired by Kanoj Sarcar's code) - * - * Because of the wide memory address space between physical RAM banks on the - * SA1100, it's much convenient to use Linux's NUMA support to implement our - * memory map representation. Assuming all memory nodes have equal access - * characteristics, we then have generic discontigous memory support. - * - * Of course, all this isn't mandatory for SA1100 implementations with only - * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. - * - * The nodes are matched with the physical memory bank addresses which are - * incidentally the same as virtual addresses. - * - * node 0: 0xc0000000 - 0xc7ffffff - * node 1: 0xc8000000 - 0xcfffffff - * node 2: 0xd0000000 - 0xd7ffffff - * node 3: 0xd8000000 - 0xdfffffff - */ - -#define NR_NODES 4 - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(addr) \ - (((unsigned long)(addr) - 0xc0000000) >> 27) - -/* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and returns the mem_map of that node. - */ -#define ADDR_TO_MAPBASE(kaddr) \ - NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr))) - -/* - * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ -#define LOCAL_MAP_NR(kvaddr) \ - (((unsigned long)(kvaddr) & 0x07ffffff) >> PAGE_SHIFT) - -/* - * Given a kaddr, virt_to_page returns a pointer to the corresponding - * mem_map entry. - */ -#define virt_to_page(kaddr) \ - (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr)) - -/* - * VALID_PAGE returns a non-zero value if given page pointer is valid. - * This assumes all node's mem_maps are stored within the node they refer to. - */ -#define VALID_PAGE(page) \ -({ unsigned int node = KVADDR_TO_NID(page); \ - ( (node < NR_NODES) && \ - ((unsigned)((page) - NODE_MEM_MAP(node)) < NODE_DATA(node)->node_size) ); \ -}) - diff --git a/include/asm-arm/arch-sa1100/omnimeter.h b/include/asm-arm/arch-sa1100/omnimeter.h new file mode 100644 index 000000000000..6c7a7b237506 --- /dev/null +++ b/include/asm-arm/arch-sa1100/omnimeter.h @@ -0,0 +1,84 @@ +/* -*- Mode: c++ -*- + * + * Copyright 2000 Massachusetts Institute of Technology + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that + * copyright notice and this permission notice appear in supporting + * documentation, and that the name of M.I.T. not be used in advertising or + * publicity pertaining to distribution of the software without specific, + * written prior permission. M.I.T. makes no representations about the + * suitability of this software for any purpose. It is provided "as is" + * without express or implied warranty. + * + */ + +#ifndef OMNIMETER_H +#define OMNIMETER_H +// use the address of the second socket for both sockets +// (divide address space in half and use offsets to wrap second card accesses back to start of address space) +// Following values for programming Cirrus Logic chip +#define Socket1Base 0x40 + +#define SocketMemoryWindowLen (0x00400000) +#define Socket0MemoryWindowStart (0x00800000) +#define Socket1MemoryWindowStart (Socket0MemoryWindowStart + SocketMemoryWindowLen) + +#define SocketIOWindowLen (0x00008000) +#define Socket1IOWindowStart (SocketIOWindowLen) +#define Socket1IOWindowOffset (0x00010000 - Socket1IOWindowStart) + +// Following values for run-time access + +//#define PCCardBase (0xe4000000) //jca (0x30000000) +//#define PCCardBase (0x30000000) +#define PCCardBase (0xe0000000) //jag + +#define PCCard0IOBase (PCCardBase) +//#define PCCard0AttrBase (0xec000000) //jca (PCCardBase + 0x08000000) +#define PCCard0AttrBase (0xe8000000) +//#define PCCard0AttrBase (PCCardBase + 0x08000000) +//#define PCCard0MemBase (0xf4000000) //jca (PCCardBase + 0x0C000000) +//#define PCCard0MemBase (PCCardBase + 0x0C000000) +#define PCCard0MemBase (0xf0000000) + +//#define PCCard1IOBase (PCCardBase + SocketIOWindowLen) //jag +#define PCCard1IOBase (0xe4000000) +//#define PCCard1AttrBase (0xec000000 + SocketMemoryWindowLen) //jag +#define PCCard1AttrBase (0xec000000) +//#define PCCard1MemBase (0xf4000000 + SocketMemoryWindowLen) //jag +#define PCCard1MemBase (0xf4000000) + +#define PCCardIndexRegister (PCCard0IOBase + 0x000003E0) //altered +#define PCCardDataRegister (PCCardIndexRegister + 1) + +/* interrupts */ +#define PIN_cardInt2 13 +#define PIN_cardInt1 5 + +void SMBOn(unsigned char SMBaddress); +void SetSMB(unsigned char SMBaddress, unsigned int dacValue); + +#define GPIO_key6 0x00040000 +#define GPIO_scl 0x01000000 // output, SMB clock +#define GPIO_sda 0x02000000 // bidirect, SMB data +#define SMB_LCDVEE 0x2C +#define DefaultLCDContrast 16 + +#define LEDBacklightOn() ClearGPIOpin(GPIO_key6) +#define LEDBacklightOff() SetGPIOpin(GPIO_key6) +#define LCDPowerOn() SMBOn(SMB_LCDVEE) +#define LCDPowerOff() SMBOff(SMB_LCDVEE) +#define SetLCDContrast(d) SetSMB(SMB_LCDVEE, d) +#define WritePort32(port,value) (port = (value)) +#define ReadPort32(port) (port) +#define SetGPIOpin(pin) WritePort32(GPSR,pin) +#define ClearGPIOpin(pin) WritePort32(GPCR,pin) + +void jcaoutb(long p, unsigned char data); +unsigned char jcainb(long p); +void jcaoutw(long p, unsigned short data); +unsigned short jcainw_p(long p); + +#endif diff --git a/include/asm-arm/arch-sa1100/pfs168.h b/include/asm-arm/arch-sa1100/pfs168.h new file mode 100644 index 000000000000..65572645fe8a --- /dev/null +++ b/include/asm-arm/arch-sa1100/pfs168.h @@ -0,0 +1,77 @@ +/* + * linux/include/asm-arm/arch-sa1100/pfs168.h + * + * Created 2000/06/05 by Nicolas Pitre <nico@cam.org> + * + * This file contains the hardware specific definitions for PFS-168 + * + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include <asm/hardware.h> instead" +#endif + + +/* GPIOs for which the generic definition doesn't say much */ +#define GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ +#define GPIO_L3_I2C_SDA GPIO_GPIO (15) /* L3 and SMB control ports */ +#define GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ +#define GPIO_L3_MODE GPIO_GPIO (17) /* L3 mode signal with LED */ +#define GPIO_L3_I2C_SCL GPIO_GPIO (18) /* L3 and I2C control ports */ +#define GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ +#define GPIO_CF_IRQ GPIO_GPIO (21) /* CF IRQ */ +#define GPIO_MBGNT GPIO_GPIO (21) /* 1111 MBGNT */ +#define GPIO_CF_CD GPIO_GPIO (22) /* CF CD */ +#define GPIO_MBREQ GPIO_GPIO (22) /* 1111 MBREQ */ +#define GPIO_UCB1300_IRQ GPIO_GPIO (23) /* UCB GPIO and touchscreen */ +#define GPIO_CF_BVD2 GPIO_GPIO (24) /* CF BVD */ +#define GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ +#define GPIO_CF_BVD1 GPIO_GPIO (25) /* CF BVD */ +#define GPIO_NEP_IRQ GPIO_GPIO (25) /* Neponset IRQ */ +#define GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ +#define GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ + +#define IRQ_GPIO_CF_IRQ IRQ_GPIO21 +#define IRQ_GPIO_CF_CD IRQ_GPIO22 +#define IRQ_GPIO_MBREQ IRQ_GPIO22 +#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO23 +#define IRQ_GPIO_CF_BVD2 IRQ_GPIO24 +#define IRQ_GPIO_CF_BVD1 IRQ_GPIO25 +#define IRQ_GPIO_NEP_IRQ IRQ_GPIO25 + + +/* + * PFS-168 definitions: + */ + +#define SA1111_BASE (0x40000000) + +#ifndef __ASSEMBLY__ +#define machine_has_neponset() (0) + +#define PFS168_COM5_VBASE (*((volatile unsigned char *)(0xf0000000UL))) +#define PFS168_COM6_VBASE (*((volatile unsigned char *)(0xf0001000UL))) +#define PFS168_SYSC1RTS (*((volatile unsigned char *)(0xf0002000UL))) +#define PFS168_SYSLED (*((volatile unsigned char *)(0xf0003000UL))) +#define PFS168_SYSDTMF (*((volatile unsigned char *)(0xf0004000UL))) +#define PFS168_SYSLCDDE (*((volatile unsigned char *)(0xf0005000UL))) +#define PFS168_SYSC1DSR (*((volatile unsigned char *)(0xf0006000UL))) +#define PFS168_SYSC3TEN (*((volatile unsigned char *)(0xf0007000UL))) +#define PFS168_SYSCTLA (*((volatile unsigned char *)(0xf0008000UL))) +#define PFS168_SYSCTLB (*((volatile unsigned char *)(0xf0009000UL))) +#define PFS168_ETH_VBASE (*((volatile unsigned char *)(0xf000a000UL))) +#endif + +#define PFS168_SYSLCDDE_STNDE (1<<0) /* CSTN display enable/disable (1/0) */ +#define PFS168_SYSLCDDE_DESEL (1<<0) /* Active/Passive (1/0) display enable mode */ + +#define PFS168_SYSCTLA_BKLT (1<<0) /* LCD backlight invert on/off (1/0) */ +#define PFS168_SYSCTLA_RLY (1<<1) /* Relay on/off (1/0) */ +#define PFS168_SYSCTLA_PXON (1<<2) /* Opto relay connect/disconnect 1/0) */ +#define PFS168_SYSCTLA_IRDA_FSEL (1<<3) /* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */ + +#define PFS168_SYSCTLB_MG1 (1<<0) /* Motion detector gain select */ +#define PFS168_SYSCTLB_MG0 (1<<1) /* Motion detector gain select */ +#define PFS168_SYSCTLB_IRDA_MD1 (1<<2) /* Range/Power select */ +#define PFS168_SYSCTLB_IRDA_MD0 (1<<3) /* Range/Power select */ +#define PFS168_SYSCTLB_IRDA_MD_MASK (PFS168_SYSCTLB_IRDA_MD1|PFS168_SYSCTLB_IRDA_MD0) diff --git a/include/asm-arm/arch-sa1100/pleb.h b/include/asm-arm/arch-sa1100/pleb.h new file mode 100644 index 000000000000..8c1fc10595ca --- /dev/null +++ b/include/asm-arm/arch-sa1100/pleb.h @@ -0,0 +1,21 @@ +/* + * linux/include/asm-arm/arch-sa1100/pleb.h + * + * Created 2000/12/08 by Daniel Potts <danielp@cse.unsw.edu.au> + * + * This file contains the hardware specific definitions for the + * PLEB board. http://www.cse.unsw.edu.au/~pleb + */ + +#ifndef _INCLUDE_PLEB_H_ +#define _INCLUDE_PLEB_H_ + +#define PLEB_ETH0_P (0x20000300) /* Ethernet 0 in PCMCIA0 IO */ +#define PLEB_ETH0_V (0xf6000300) + +#define GPIO_ETH0_IRQ GPIO_GPIO (21) +#define GPIO_ETH0_EN GPIO_GPIO (26) + +#define IRQ_GPIO_ETH0_IRQ IRQ_GPIO21 + +#endif diff --git a/include/asm-arm/arch-sa1100/serial_reg.h b/include/asm-arm/arch-sa1100/serial_reg.h deleted file mode 100644 index de675b3cd69c..000000000000 --- a/include/asm-arm/arch-sa1100/serial_reg.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * include/asm/arch/serial_reg.h - * - * Redistribution of this file is permitted under the terms of the GNU - * Public License (GPL) - * - * These are the SA1100 UART port assignments, expressed as long index - * of the base address. - */ - -#ifndef ASM_ARCH_SERIAL_REG_H -#define ASM_ARCH_SERIAL_REG_H - - -/* - * Register index. - */ -#define UTCR0 0 /* 0x00 UART_LCR Line control register */ -#define UTCR1 1 /* 0x04 UART_DLLSB */ -#define UTCR2 2 /* 0x08 UART_DLMSB */ -#define UTCR3 3 /* 0x0c UART_IER */ -#define UTDR 5 /* 0x14 UART_RX, UART_TX */ -#define UTSR0 7 /* 0x1c */ -#define UTSR1 8 /* 0x20 UART_LSR Line Status register */ - -#define UART_RX UTDR /* Receive port, read only */ -#define UART_TX UTDR /* transmit port, write only */ - -#if 0 -/* - * Line control register flags - */ -#define UTCR0_PE 1 /* Parity enable */ -#define UTCR0_EP 2 /* Even parity */ -#define UTCR0_SB 4 /* Stop bit */ -#define UTCR0_DB 8 /* Data bits in transmission (0 = 7, 1 = 8) */ - -#define UTCR0_OES UTCR0_EP -#define UTCR0_SBS UTCR0_SB -#define UTCR0_DSS UTCR0_DB -#define UTCR0_SCE 16 /* Sample clock enable */ -#define UTCR0_RCE 32 /* Receive clock edge select */ -#define UTCR0_TCE 64 /* Transmit clock edge select */ - - -/* - * Line status bits. - */ -#define UTSR1_TBY 1 /* transmitter busy flag */ -#define UTSR1_RNE 2 /* receiver not empty (LSR_DR) */ -#define UTSR1_TNF 4 /* transmit fifo non full */ -#define UTSR1_PRE 8 /* parity read error (LSR_PE) */ -#define UTSR1_FRE 16 /* framing error (LSR_FE) */ -#define UTSR1_ROR 32 /* receive fifo overrun (LSR_OE) */ - -#define UTSR1_ERROR (UTSR1_PRE | UTSR1_FRE | UTSR1_ROR) /* LSR_ERROR */ - - -#define UTSR0_TFS 1 /* transmit fifo service request */ -#define UTSR0_RFS 2 /* receive fifo service request */ -#define UTSR0_RID 4 /* receiver idle */ -#define UTSR0_RBB 8 /* receiver begin of break */ -#define UTSR0_REB 16 /* receiver end of break */ -#define UTSR0_EIF 32 /* error in fifo */ - - -/* - * Interrupt enable register (IER) - */ -#define UTCR3_RXE 1 /* Receiver enable */ -#define UTCR3_TXE 2 /* Transmit enable */ -#define UTCR3_BRK 4 /* Break */ -#define UTCR3_RIM 8 /* Receive FIFO interrupt mask (IER_RDA) */ -#define UTCR3_TIM 16 /* Transmit FIFO interrupt mask (IER_THRE) */ -#define UTCR3_LBM 32 /* Loop Back Mode */ - -#endif - -#endif /* ASM_ARCH_SERIAL_REG_H */ diff --git a/include/asm-arm/arch-sa1100/simpad.h b/include/asm-arm/arch-sa1100/simpad.h new file mode 100644 index 000000000000..472cb9f3546f --- /dev/null +++ b/include/asm-arm/arch-sa1100/simpad.h @@ -0,0 +1,108 @@ +/* + * linux/include/asm-arm/arch-sa1100/trizeps.h + * + * based of assabet.h same as HUW_Webpanel + * + * This file contains the hardware specific definitions for Trizeps + * + * 2001/03/14 Peter Lueg <peter.lueg@dsa-ac.de> + */ + +#ifndef SIMPAD_H +#define SIMPAD_H + + +#ifndef __ASM_ARCH_HARDWARE_H +#error "include <asm/hardware.h> instead" +#endif + +/* System Configuration Register flags */ + +#define SCR_SDRAM_LOW (1<<2) /* SDRAM size (low bit) */ +#define SCR_SDRAM_HIGH (1<<3) /* SDRAM size (high bit) */ +#define SCR_FLASH_LOW (1<<4) /* Flash size (low bit) */ +#define SCR_FLASH_HIGH (1<<5) /* Flash size (high bit) */ +#define SCR_GFX (1<<8) /* Graphics Accelerator (0 = present) */ +#define SCR_SA1111 (1<<9) /* Neponset (0 = present) */ + +#define SCR_INIT -1 + +#define GPIO_UART1_RTS GPIO_GPIO14 +#define GPIO_UART1_DTR GPIO_GPIO7 +#define GPIO_UART1_CTS GPIO_GPIO8 +#define GPIO_UART1_DCD GPIO_GPIO23 +#define GPIO_UART1_DSR GPIO_GPIO6 + +#define GPIO_UART3_RTS GPIO_GPIO12 +#define GPIO_UART3_DTR GPIO_GPIO16 +#define GPIO_UART3_CTS GPIO_GPIO13 +#define GPIO_UART3_DCD GPIO_GPIO18 +#define GPIO_UART3_DSR GPIO_GPIO17 + +#define IRQ_UART1_CTS IRQ_GPIO15 +#define IRQ_UART1_DCD GPIO_GPIO23 +#define IRQ_UART1_DSR GPIO_GPIO6 +#define IRQ_UART3_CTS GPIO_GPIO13 +#define IRQ_UART3_DCD GPIO_GPIO18 +#define IRQ_UART3_DSR GPIO_GPIO17 + +#define GPIO_UCB1300_IRQ GPIO_GPIO (22) /* UCB GPIO and touchscreen */ +#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO22 + +#define SA1100_UART1_EXT \ + (struct huw_irq_desc){GPIO_UART1_CTS, IRQ_UART1_CTS, \ + GPIO_UART1_DCD, IRQ_UART1_DCD, \ + GPIO_UART1_DSR, IRQ_UART1_DSR} +#define SA1100_UART3_EXT \ + (struct huw_irq_desc){GPIO_UART3_CTS, IRQ_UART3_CTS, \ + GPIO_UART3_DCD, IRQ_UART3_DCD, \ + GPIO_UART3_DSR, IRQ_UART3_DSR} + + +/*--- PCMCIA ---*/ +#define GPIO_CF_CD GPIO_GPIO24 +#define GPIO_CF_IRQ GPIO_GPIO1 +#define IRQ_GPIO_CF_IRQ IRQ_GPIO1 +#define IRQ_GPIO_CF_CD IRQ_GPIO24 + +// CS3 Latch is write only, a shadow is neccessary + +#define CS3BUSTYPE unsigned volatile long +#define CS3_BASE 0xf1000000 + +#define VCC_5V_EN 0x0001 +#define VCC_3V_EN 0x0002 +#define EN1 0x0004 +#define EN0 0x0008 +#define DISPLAY_ON 0x0010 +#define PCMCIA_BUFF_DIS 0x0020 +#define MQ_RESET 0x0040 +#define PCMCIA_RESET 0x0080 +#define DECT_POWER_ON 0x0100 +#define IRDA_SD 0x0200 +#define RS232_ON 0x0400 +#define SD_MEDIAQ 0x0800 +#define LED2_ON 0x1000 +#define IRDA_MODE 0x2000 +#define ENABLE_5V 0x4000 +#define RESET_SIMCARD 0x8000 + +#define RS232_ENABLE 0x0440 +#define PCMCIAMASK 0x402f + +#ifndef __ASSEMBLY__ +static long cs3_shadow; +void init_simpad_cs3(); +void PCMCIA_setbit(int value); +void PCMCIA_clearbit(int value); +#endif + +#endif // SIMPAD_H + + + + + + + + diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h index 2685cbc6346d..d12c71ae866c 100644 --- a/include/asm-arm/arch-sa1100/system.h +++ b/include/asm-arm/arch-sa1100/system.h @@ -18,7 +18,7 @@ static inline void arch_idle(void) #else -extern inline void arch_reset(char mode) +static inline void arch_reset(char mode) { if (mode == 's') { /* Jump into ROM at address 0 */ diff --git a/include/asm-arm/arch-sa1100/time.h b/include/asm-arm/arch-sa1100/time.h index 4adca24559f4..701a9b94e12d 100644 --- a/include/asm-arm/arch-sa1100/time.h +++ b/include/asm-arm/arch-sa1100/time.h @@ -5,11 +5,47 @@ * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com> * * 2000/03/29 (C) Nicolas Pitre <nico@cam.org> - * Rewritten: big cleanup, much simpler, better HZ acuracy. + * Rewritten: big cleanup, much simpler, better HZ accuracy. * */ +#define RTC_DEF_DIVIDER 32768 - 1 +#define RTC_DEF_TRIM 0 + +static unsigned long __init sa1100_get_rtc_time(void) +{ + /* + * According to the manual we should be able to let RTTR be zero + * and then a default diviser for a 32.768KHz clock is used. + * Apparently this doesn't work, at least for my SA1110 rev 5. + * If the clock divider is uninitialized then reset it to the + * default value to get the 1Hz clock. + */ + if (RTTR == 0) { + RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); + printk(KERN_WARNING "Warning: uninitialized Real Time Clock\n"); + /* The current RTC value probably doesn't make sense either */ + RCNR = 0; + return 0; + } + return RCNR; +} + +static int sa1100_set_rtc(void) +{ + unsigned long current_time = xtime.tv_sec; + + if (RTSR & RTSR_ALE) { + /* make sure not to forward the clock over an alarm */ + unsigned long alarm = RTAR; + if (current_time >= alarm && alarm >= RCNR) + return -ERESTARTSYS; + } + RCNR = current_time; + return 0; +} + /* IRQs are disabled before entering here from do_gettimeofday() */ static unsigned long sa1100_gettimeoffset (void) { @@ -27,7 +63,6 @@ static unsigned long sa1100_gettimeoffset (void) return usec; } - static void sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { long flags; @@ -41,6 +76,7 @@ static void sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) */ do { do_leds(); + do_set_rtc(); save_flags_cli( flags ); do_timer(regs); OSSR = OSSR_M0; /* Clear match on timer 0 */ @@ -49,10 +85,11 @@ static void sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) } while( (signed long)(next_match - OSCR) <= 0 ); } - -extern inline void setup_timer (void) +static inline void setup_timer (void) { gettimeoffset = sa1100_gettimeoffset; + set_rtc = sa1100_set_rtc; + xtime.tv_sec = sa1100_get_rtc_time(); timer_irq.handler = sa1100_timer_interrupt; OSMR0 = 0; /* set initial match at 0 */ OSSR = 0xf; /* clear status on all timers */ diff --git a/include/asm-arm/arch-sa1100/uncompress.h b/include/asm-arm/arch-sa1100/uncompress.h index f2a46c0d823c..fc1daa24eb50 100644 --- a/include/asm-arm/arch-sa1100/uncompress.h +++ b/include/asm-arm/arch-sa1100/uncompress.h @@ -7,7 +7,6 @@ */ #include "hardware.h" -#include "serial_reg.h" #include <asm/mach-types.h> @@ -22,36 +21,41 @@ extern void sa1100_setup( int arch_id ); * The following code assumes the serial port has already been * initialized by the bootloader or such... */ + +#define UART(x) (*(volatile unsigned long *)(serial_port + (x))) + static void puts( const char *s ) { - volatile unsigned long *serial_port; + unsigned long serial_port; if (machine_is_assabet()) { if( machine_has_neponset() ) - serial_port = (unsigned long *)_Ser3UTCR0; + serial_port = _Ser3UTCR0; else - serial_port = (unsigned long *)_Ser1UTCR0; + serial_port = _Ser1UTCR0; } else if (machine_is_brutus()||machine_is_nanoengine() || - machine_is_pangolin()) - serial_port = (unsigned long *)_Ser1UTCR0; + machine_is_pangolin() || machine_is_freebird() || + machine_is_pfs168() || machine_is_flexanet()) + serial_port = _Ser1UTCR0; else if (machine_is_empeg() || machine_is_bitsy() || machine_is_victor() || machine_is_lart() || - machine_is_sherman() ) - serial_port = (unsigned long *)_Ser3UTCR0; + machine_is_sherman() || machine_is_yopy() || + machine_is_huw_webpanel() || machine_is_itsy() ) + serial_port = _Ser3UTCR0; else return; for (; *s; s++) { /* wait for space in the UART's transmiter */ - while (!(serial_port[UTSR1] & UTSR1_TNF)); + while (!(UART(UTSR1) & UTSR1_TNF)); /* send the character out. */ - serial_port[UART_TX] = *s; + UART(UTDR) = *s; /* if a LF, also do CR... */ if (*s == 10) { - while (!(serial_port[UTSR1] & UTSR1_TNF)); - serial_port[UART_TX] = 13; + while (!(UART(UTSR1) & UTSR1_TNF)); + UART(UTDR) = 13; } } } diff --git a/include/asm-arm/arch-sa1100/yopy.h b/include/asm-arm/arch-sa1100/yopy.h new file mode 100644 index 000000000000..7b4e0148d831 --- /dev/null +++ b/include/asm-arm/arch-sa1100/yopy.h @@ -0,0 +1,127 @@ +#ifndef __ASM_ARCH_YOPY_H__ +#define __ASM_ARCH_YOPY_H__ + +/****************************************************************************** + * Memory mappings + ******************************************************************************/ + +/* Flash memories */ +#define YOPY_FLASH0_BASE_P (0x00000000) /* CS0 */ +#define YOPY_FLASH0_BASE_V (0xe8000000) +#define YOPY_FLASH0_BASE YOPY_FLASH0_BASE_V +#define YOPY_FLASH0_SIZE (0x04000000) /* map 64MB */ + +#define YOPY_FLASH1_BASE_P (0x08000000) /* CS1 */ +#define YOPY_FLASH1_BASE_V (YOPY_FLASH0_BASE_V + YOPY_FLASH0_SIZE) +#define YOPY_FLASH1_BASE YOPY_FLASH1_BASE_V +#define YOPY_FLASH1_SIZE (0x04000000) /* map 64MB */ + +/* LCD Controller */ +#define YOPY_LCD_IO_BASE_P (0x48000000) /* CS5 */ +#define YOPY_LCD_IO_BASE_V (0xf0000000) + +#define YOPY_LCD_IO_BASE YOPY_LCD_IO_BASE_V +#define YOPY_LCD_IO_RANGE (0x00208000) + +/* Extended GPIO */ +#define YOPY_EGPIO_BASE_P (0x10000000) /* CS2 */ +#define YOPY_EGPIO_BASE_V (0xf1000000) + +#define YOPY_EGPIO_BASE YOPY_EGPIO_BASE_V +#define YOPY_EGPIO_RANGE 4 + +#define YOPY_EGPIO (*((volatile Word *)YOPY_EGPIO_BASE)) + + +/****************************************************************************** + * GPIO assignements + ******************************************************************************/ + +#define GPIO_UCB1200_IRQ GPIO_GPIO0 +#define GPIO_UCB1200_RESET GPIO_GPIO22 + +#define GPIO_CF_IREQ GPIO_GPIO2 +#define GPIO_CF_CD GPIO_GPIO3 +#define GPIO_CF_BVD1 GPIO_GPIO4 +#define GPIO_CF_BVD2 GPIO_GPIO5 +#define GPIO_CF_CSEL GPIO_GPIO6 +#define GPIO_CF_READY GPIO_CF_IREQ +#define GPIO_CF_STSCHG GPIO_CF_BVD1 +#define GPIO_CF_SPKR GPIO_CF_BVD2 + +#define GPIO_MASK(io) (1 << (io)) + +#define GPIO_YOPY_PLL_ML PPC_LDD7 +#define GPIO_YOPY_PLL_MC PPC_L_LCLK +#define GPIO_YOPY_PLL_MD PPC_L_FCLK + +#define GPIO_YOPY_L3_MODE PPC_LDD4 +#define GPIO_YOPY_L3_CLOCK PPC_LDD5 +#define GPIO_YOPY_L3_DATA PPC_LDD6 + +#define GPIO_CF_RESET 0 +#define GPIO_CLKDIV_CLR1 1 +#define GPIO_CLKDIV_CLR2 2 +#define GPIO_SPEAKER_MUTE 5 +#define GPIO_CF_POWER 8 +#define GPIO_AUDIO_OPAMP_POWER 11 +#define GPIO_AUDIO_CODEC_POWER 12 +#define GPIO_AUDIO_POWER 13 + +#define GPIO_IRDA_POWER PPC_L_PCLK +#define GPIO_IRDA_FIR PPC_LDD0 + +#ifndef __ASSEMBLY__ +extern int yopy_gpio_test(unsigned int gpio); +extern void yopy_gpio_set(unsigned int gpio, int level); +#endif + + +/****************************************************************************** + * IRQ assignements + ******************************************************************************/ + +/* for our old drivers */ +#define IRQ_SP0_UDC 13 +#define IRQ_SP1_SDLC 14 +#define IRQ_SP1_UART 15 +#define IRQ_SP2_ICP 16 +#define IRQ_SP2_UART 16 +#define IRQ_SP3_UART 17 +#define IRQ_SP4_MCP 18 +#define IRQ_SP4_SSP 19 +#define IRQ_RTC_HZ 30 +#define IRQ_RTC_ALARM 31 + +/* GPIO interrupts */ +#define IRQ_GPIO_UCB1200_IRQ IRQ_GPIO0 + +#define IRQ_CF_IREQ IRQ_GPIO2 +#define IRQ_CF_CD IRQ_GPIO3 +#define IRQ_CF_BVD1 IRQ_GPIO4 +#define IRQ_CF_BVD2 IRQ_GPIO5 + +#define IRQ_UART_CTS IRQ_GPIO7 +#define IRQ_UART_DCD IRQ_GPIO8 +#define IRQ_UART_DSR IRQ_GPIO9 + +#define IRQ_FLASH_STATUS IRQ_GPIO23 + +#define IRQ_BUTTON_POWER IRQ_GPIO1 +#define IRQ_BUTTON_UP IRQ_GPIO14 +#define IRQ_BUTTON_DOWN IRQ_GPIO15 +#define IRQ_BUTTON_LEFT IRQ_GPIO16 +#define IRQ_BUTTON_RIGHT IRQ_GPIO17 +#define IRQ_BUTTON_SHOT0 IRQ_GPIO18 +#define IRQ_BUTTON_SHOT1 IRQ_GPIO20 +#define IRQ_BUTTON_PIMS IRQ_UCB1200_IO1 +#define IRQ_BUTTON_MP3 IRQ_UCB1200_IO2 +#define IRQ_BUTTON_RECORD IRQ_UCB1200_IO3 +#define IRQ_BUTTON_PREV IRQ_UCB1200_IO4 +#define IRQ_BUTTON_SELECT IRQ_UCB1200_IO5 +#define IRQ_BUTTON_NEXT IRQ_UCB1200_IO6 +#define IRQ_BUTTON_CANCEL IRQ_UCB1200_IO7 +#define IRQ_BUTTON_REMOTE IRQ_UCB1200_IO8 + + +#endif diff --git a/include/asm-arm/arch-shark/dma.h b/include/asm-arm/arch-shark/dma.h index fd605d63a8d1..408a9af2d6c2 100644 --- a/include/asm-arm/arch-shark/dma.h +++ b/include/asm-arm/arch-shark/dma.h @@ -14,5 +14,17 @@ #define MAX_DMA_CHANNELS 8 #define DMA_ISA_CASCADE 4 +static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsigned long *zhole_size) +{ + if (node != 0) return; + /* Only the first 4 MB (=1024 Pages) are usable for DMA */ + zone_size[1] = zone_size[0] - 1024; + zone_size[0] = 1024; + zhole_size[1] = zhole_size[0]; + zhole_size[0] = 0; +} + +#define arch_adjust_zones(node,size,holes) __arch_adjust_zones(node,size,holes) + #endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h index e8915411b562..66d9ee195493 100644 --- a/include/asm-arm/arch-shark/io.h +++ b/include/asm-arm/arch-shark/io.h @@ -11,7 +11,8 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#define __arch_ioremap(off,size,nocache) __ioremap(off,size,0) +#define iomem_valid_addr(off,sz) (1) +#define iomem_to_phys(off) (off) #define IO_SPACE_LIMIT 0xffffffff @@ -28,7 +29,7 @@ * optimize the expressions */ #define DECLARE_DYN_OUT(fnsuffix,instr) \ -extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ +static inline void __out##fnsuffix (unsigned int value, unsigned int port) \ { \ unsigned long temp; \ __asm__ __volatile__( \ @@ -42,7 +43,7 @@ extern __inline__ void __out##fnsuffix (unsigned int value, unsigned int port) \ } #define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ +static inline unsigned sz __in##fnsuffix (unsigned int port) \ { \ unsigned long temp, value; \ __asm__ __volatile__( \ @@ -56,7 +57,7 @@ extern __inline__ unsigned sz __in##fnsuffix (unsigned int port) \ return (unsigned sz)value; \ } -extern __inline__ unsigned int __ioaddr (unsigned int port) \ +static inline unsigned int __ioaddr (unsigned int port) \ { \ if (__PORT_PCIO(port)) \ return (unsigned int)(PCIO_BASE + (port)); \ diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h index 324b756a79c1..6a2ead47a9b2 100644 --- a/include/asm-arm/arch-shark/memory.h +++ b/include/asm-arm/arch-shark/memory.h @@ -38,4 +38,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) __phys_to_virt(x) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-shark/time.h b/include/asm-arm/arch-shark/time.h index 925dd0e7d189..1ec42c251913 100644 --- a/include/asm-arm/arch-shark/time.h +++ b/include/asm-arm/arch-shark/time.h @@ -46,7 +46,7 @@ static void timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* * Set up timer interrupt, and return the current time in seconds. */ -extern __inline__ void setup_timer(void) +static inline void setup_timer(void) { struct rtc_time r_time; unsigned long flags; diff --git a/include/asm-arm/arch-tbox/io.h b/include/asm-arm/arch-tbox/io.h index 5fd9aa0a3783..869798595c94 100644 --- a/include/asm-arm/arch-tbox/io.h +++ b/include/asm-arm/arch-tbox/io.h @@ -15,7 +15,7 @@ /* * Generic virtual read/write */ -extern __inline__ unsigned int __arch_getw(unsigned long a) +static inline unsigned int __arch_getw(unsigned long a) { unsigned int value; __asm__ __volatile__("ldr%?h %0, [%1, #0] @ getw" @@ -24,7 +24,7 @@ extern __inline__ unsigned int __arch_getw(unsigned long a) return value; } -extern __inline__ void __arch_putw(unsigned int value, unsigned long a) +static inline void __arch_putw(unsigned int value, unsigned long a) { __asm__ __volatile__("str%?h %0, [%1, #0] @ putw" : : "r" (value), "r" (a)); diff --git a/include/asm-arm/arch-tbox/memory.h b/include/asm-arm/arch-tbox/memory.h index e93d0afb176f..ed9cfa109996 100644 --- a/include/asm-arm/arch-tbox/memory.h +++ b/include/asm-arm/arch-tbox/memory.h @@ -41,4 +41,6 @@ #define __bus_to_virt__is_a_macro #define __bus_to_virt(x) __phys_to_virt(x) +#define PHYS_TO_NID(addr) (0) + #endif diff --git a/include/asm-arm/arch-tbox/time.h b/include/asm-arm/arch-tbox/time.h index faf1a39bb89b..4d31c8ba64c7 100644 --- a/include/asm-arm/arch-tbox/time.h +++ b/include/asm-arm/arch-tbox/time.h @@ -29,7 +29,7 @@ static void timer_interrupt (int irq, void *dev_id, struct pt_regs *regs) do_timer(regs); } -extern __inline__ void setup_timer (void) +static inline void setup_timer (void) { /* * Default the date to 1 Jan 1970 0:0:0 diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h index 0907316dd992..ba1e5492811a 100644 --- a/include/asm-arm/atomic.h +++ b/include/asm-arm/atomic.h @@ -85,7 +85,7 @@ static __inline__ int atomic_dec_and_test(volatile atomic_t *v) return result; } -extern __inline__ int atomic_add_negative(int i, volatile atomic_t *v) +static inline int atomic_add_negative(int i, volatile atomic_t *v) { unsigned long flags; int result; @@ -107,5 +107,11 @@ static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *addr __restore_flags(flags); } +/* Atomic operations are already serializing on ARM */ +#define smp_mb__before_atomic_dec() barrier() +#define smp_mb__after_atomic_dec() barrier() +#define smp_mb__before_atomic_inc() barrier() +#define smp_mb__after_atomic_inc() barrier() + #endif #endif diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h index 2ad747a6a0ed..d6419ddb4921 100644 --- a/include/asm-arm/bitops.h +++ b/include/asm-arm/bitops.h @@ -86,7 +86,7 @@ extern int find_next_zero_bit(void * addr, int size, int offset); /* * This routine doesn't need to be atomic. */ -extern __inline__ int test_bit(int nr, const void * addr) +static inline int test_bit(int nr, const void * addr) { return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7)); } @@ -95,7 +95,7 @@ extern __inline__ int test_bit(int nr, const void * addr) * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ -extern __inline__ unsigned long ffz(unsigned long word) +static inline unsigned long ffz(unsigned long word) { int k; diff --git a/include/asm-arm/checksum.h b/include/asm-arm/checksum.h index 0090141fa36d..342d1cf8448c 100644 --- a/include/asm-arm/checksum.h +++ b/include/asm-arm/checksum.h @@ -149,7 +149,7 @@ extern unsigned long __csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len, __u32 proto, unsigned int sum); -extern __inline__ unsigned short int +static inline unsigned short int csum_ipv6_magic(struct in6_addr *saddr, struct in6_addr *daddr, __u32 len, unsigned short proto, unsigned int sum) { diff --git a/include/asm-arm/delay.h b/include/asm-arm/delay.h index 3f56cbd70698..4ebcea03406d 100644 --- a/include/asm-arm/delay.h +++ b/include/asm-arm/delay.h @@ -21,7 +21,7 @@ extern void __delay(int loops); */ extern void udelay(unsigned long usecs); -extern __inline__ unsigned long muldiv(unsigned long a, unsigned long b, unsigned long c) +static inline unsigned long muldiv(unsigned long a, unsigned long b, unsigned long c) { return a * b / c; } diff --git a/include/asm-arm/dma.h b/include/asm-arm/dma.h index dc23c66dd993..f42a8cf158ca 100644 --- a/include/asm-arm/dma.h +++ b/include/asm-arm/dma.h @@ -24,14 +24,14 @@ typedef unsigned int dmamode_t; extern spinlock_t dma_spin_lock; -extern __inline__ unsigned long claim_dma_lock(void) +static inline unsigned long claim_dma_lock(void) { unsigned long flags; spin_lock_irqsave(&dma_spin_lock, flags); return flags; } -extern __inline__ void release_dma_lock(unsigned long flags) +static inline void release_dma_lock(unsigned long flags) { spin_unlock_irqrestore(&dma_spin_lock, flags); } @@ -129,4 +129,8 @@ extern int isa_dma_bridge_buggy; #define isa_dma_bridge_buggy (0) #endif +#ifndef arch_adjust_zones +#define arch_adjust_zones(node,size,holes) +#endif + #endif /* _ARM_DMA_H */ diff --git a/include/asm-arm/floppy.h b/include/asm-arm/floppy.h index 1083b95a2120..6ea657c886b9 100644 --- a/include/asm-arm/floppy.h +++ b/include/asm-arm/floppy.h @@ -69,7 +69,7 @@ do { \ /* * Someday, we'll automatically detect which drives are present... */ -extern __inline__ void fd_scandrives (void) +static inline void fd_scandrives (void) { #if 0 int floppy, drive_count; diff --git a/include/asm-arm/hardirq.h b/include/asm-arm/hardirq.h index 1c080f179268..c3111a0a2e83 100644 --- a/include/asm-arm/hardirq.h +++ b/include/asm-arm/hardirq.h @@ -10,6 +10,7 @@ typedef struct { unsigned int __local_irq_count; unsigned int __local_bh_count; unsigned int __syscall_count; + struct task_struct * __ksoftirqd_task; /* waitqueue is too large */ } ____cacheline_aligned irq_cpustat_t; #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ diff --git a/include/asm-arm/hardware/pci_v3.h b/include/asm-arm/hardware/pci_v3.h index 28b8e6d7bfb1..274dcf0773c5 100644 --- a/include/asm-arm/hardware/pci_v3.h +++ b/include/asm-arm/hardware/pci_v3.h @@ -4,7 +4,7 @@ * Internal header file PCI V3 chip * * Copyright (C) ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd. + * Copyright (C) 2000-2001 Deep Blue Solutions Ltd. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -124,25 +124,59 @@ #define V3_PCI_MAP_M_REG_EN (1 << 1) #define V3_PCI_MAP_M_ENABLE (1 << 0) -/* 9 => 512M window size +/* + * LB_BASE0,1 register bits (Local bus -> PCI) */ -#define V3_PCI_MAP_M_ADR_SIZE_512M 0x00000090 -/* A => 1024M window size +#define V3_LB_BASE_ADR_BASE 0xfff00000 +#define V3_LB_BASE_SWAP (3 << 8) +#define V3_LB_BASE_ADR_SIZE (15 << 4) +#define V3_LB_BASE_PREFETCH (1 << 3) +#define V3_LB_BASE_ENABLE (1 << 0) + +#define V3_LB_BASE_ADR_SIZE_1MB (0 << 4) +#define V3_LB_BASE_ADR_SIZE_2MB (1 << 4) +#define V3_LB_BASE_ADR_SIZE_4MB (2 << 4) +#define V3_LB_BASE_ADR_SIZE_8MB (3 << 4) +#define V3_LB_BASE_ADR_SIZE_16MB (4 << 4) +#define V3_LB_BASE_ADR_SIZE_32MB (5 << 4) +#define V3_LB_BASE_ADR_SIZE_64MB (6 << 4) +#define V3_LB_BASE_ADR_SIZE_128MB (7 << 4) +#define V3_LB_BASE_ADR_SIZE_256MB (8 << 4) +#define V3_LB_BASE_ADR_SIZE_512MB (9 << 4) +#define V3_LB_BASE_ADR_SIZE_1GB (10 << 4) +#define V3_LB_BASE_ADR_SIZE_2GB (11 << 4) + +#define v3_addr_to_lb_base(a) ((a) & V3_LB_BASE_ADR_BASE) + +/* + * LB_MAP0,1 register bits (Local bus -> PCI) */ -#define V3_PCI_MAP_M_ADR_SIZE_1024M 0x000000A0 +#define V3_LB_MAP_MAP_ADR 0xfff0 +#define V3_LB_MAP_TYPE (7 << 1) +#define V3_LB_MAP_AD_LOW_EN (1 << 0) + +#define V3_LB_MAP_TYPE_IACK (0 << 1) +#define V3_LB_MAP_TYPE_IO (1 << 1) +#define V3_LB_MAP_TYPE_MEM (3 << 1) +#define V3_LB_MAP_TYPE_CONFIG (5 << 1) +#define V3_LB_MAP_TYPE_MEM_MULTIPLE (6 << 1) -/* LB_BASE register bits (Local bus -> PCI) +#define v3_addr_to_lb_map(a) (((a) >> 16) & V3_LB_MAP_MAP_ADR) + +/* + * LB_BASE2 register bits (Local bus -> PCI IO) */ -#define V3_LB_BASE_M_MAP_ADR 0xFFF00000 -#define V3_LB_BASE_M_SWAP (3 << 8) -#define V3_LB_BASE_M_ADR_SIZE 0x000000F0 -#define V3_LB_BASE_M_PREFETCH (1 << 3) -#define V3_LB_BASE_M_ENABLE (1 << 0) +#define V3_LB_BASE2_ADR_BASE 0xff00 +#define V3_LB_BASE2_SWAP (3 << 6) +#define V3_LB_BASE2_ENABLE (1 << 0) + +#define v3_addr_to_lb_base2(a) (((a) >> 16) & V3_LB_BASE2_ADR_BASE) -/* LB_MAP register bits (Local bus -> PCI) +/* + * LB_MAP2 register bits (Local bus -> PCI IO) */ -#define V3_LB_MAP_M_MAP_ADR 0xFFF0 -#define V3_LB_MAP_M_TYPE 0x000E -#define V3_LB_MAP_M_AD_LOW_EN (1 << 0) +#define V3_LB_MAP2_MAP_ADR 0xff00 + +#define v3_addr_to_lb_map2(a) (((a) >> 16) & V3_LB_MAP2_MAP_ADR) #endif diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index 7d1e41733e96..8d7520f0fdea 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -31,11 +31,40 @@ * read/writes. We define __arch_*[bl] here, and leave __arch_*w * to the architecture specific code. */ -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) +#define __arch_getb(a) (*(volatile unsigned char *)(a)) +#define __arch_getl(a) (*(volatile unsigned int *)(a)) -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) +#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) +#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) + +extern void __raw_writesb(unsigned int addr, void *data, int bytelen); +extern void __raw_writesw(unsigned int addr, void *data, int wordlen); +extern void __raw_writesl(unsigned int addr, void *data, int longlen); + +extern void __raw_readsb(unsigned int addr, void *data, int bytelen); +extern void __raw_readsw(unsigned int addr, void *data, int wordlen); +extern void __raw_readsl(unsigned int addr, void *data, int longlen); + +#define __raw_writeb(v,a) __arch_putb(v,a) +#define __raw_writew(v,a) __arch_putw(v,a) +#define __raw_writel(v,a) __arch_putl(v,a) + +#define __raw_readb(a) __arch_getb(a) +#define __raw_readw(a) __arch_getw(a) +#define __raw_readl(a) __arch_getl(a) + +/* + * The compiler seems to be incapable of optimising constants + * properly. Spell it out to the compiler in some cases. + * These are only valid for small values of "off" (< 1<<12) + */ +#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) +#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) +#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) + +#define __raw_base_readb(base,off) __arch_base_getb(base,off) +#define __raw_base_readw(base,off) __arch_base_getw(base,off) +#define __raw_base_readl(base,off) __arch_base_getl(base,off) /* * Now, pick up the machine-defined IO definitions @@ -43,18 +72,26 @@ #include <asm/arch/io.h> /* - * IO definitions. We define {out,in}[bwl] if __io is defined by - * the machine. Otherwise, these definitions are left for the - * machine specific header files to pick up. + * IO definitions. We define {out,in,outs,ins}[bwl] if __io is + * defined by the machine. Otherwise, these definitions are left + * for the machine specific header files to pick up. */ #ifdef __io -#define outb(v,p) __arch_putb(v,__io(p)) -#define outw(v,p) __arch_putw(v,__io(p)) -#define outl(v,p) __arch_putl(v,__io(p)) +#define outb(v,p) __raw_writeb(v,__io(p)) +#define outw(v,p) __raw_writew(v,__io(p)) +#define outl(v,p) __raw_writel(v,__io(p)) + +#define inb(p) __raw_readb(__io(p)) +#define inw(p) __raw_readw(__io(p)) +#define inl(p) __raw_readl(__io(p)) -#define inb(p) __arch_getb(__io(p)) -#define inw(p) __arch_getw(__io(p)) -#define inl(p) __arch_getl(__io(p)) +#define outsb(p,d,l) __raw_writesb(__io(p),d,l) +#define outsw(p,d,l) __raw_writesw(__io(p),d,l) +#define outsl(p,d,l) __raw_writesl(__io(p),d,l) + +#define insb(p,d,l) __raw_readsb(__io(p),d,l) +#define insw(p,d,l) __raw_readsw(__io(p),d,l) +#define insl(p,d,l) __raw_readsl(__io(p),d,l) #endif #define outb_p(val,port) outb((val),(port)) @@ -64,13 +101,6 @@ #define inw_p(port) inw((port)) #define inl_p(port) inl((port)) -extern void outsb(unsigned int port, const void *from, int len); -extern void outsw(unsigned int port, const void *from, int len); -extern void outsl(unsigned int port, const void *from, int len); -extern void insb(unsigned int port, void *from, int len); -extern void insw(unsigned int port, void *from, int len); -extern void insl(unsigned int port, void *from, int len); - #define outsb_p(port,from,len) outsb(port,from,len) #define outsw_p(port,from,len) outsw(port,from,len) #define outsl_p(port,from,len) outsl(port,from,len) @@ -122,27 +152,6 @@ extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); extern void consistent_sync(void *vaddr, size_t size, int rw); -#define __raw_writeb(v,a) __arch_putb(v,a) -#define __raw_writew(v,a) __arch_putw(v,a) -#define __raw_writel(v,a) __arch_putl(v,a) - -#define __raw_readb(a) __arch_getb(a) -#define __raw_readw(a) __arch_getw(a) -#define __raw_readl(a) __arch_getl(a) - -/* - * The compiler seems to be incapable of optimising constants - * properly. Spell it out to the compiler in some cases. - * These are only valid for small values of "off" (< 1<<12) - */ -#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off) -#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off) -#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off) - -#define __raw_base_readb(base,off) __arch_base_getb(base,off) -#define __raw_base_readw(base,off) __arch_base_getw(base,off) -#define __raw_base_readl(base,off) __arch_base_getl(base,off) - /* * String version of IO memory access ops: */ diff --git a/include/asm-arm/mach/amba_kmi.h b/include/asm-arm/mach/amba_kmi.h index bb679ec1f82b..b2ec51e8e45c 100644 --- a/include/asm-arm/mach/amba_kmi.h +++ b/include/asm-arm/mach/amba_kmi.h @@ -27,6 +27,7 @@ struct kmi_info { u_char last_tx; u_char resend_count; u_short res; + u_char present; wait_queue_head_t wait_q; void (*rx)(struct kmi_info *, u_int val, struct pt_regs *regs); diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h index d6e6c4daf5e8..5f47b7ee7105 100644 --- a/include/asm-arm/mach/arch.h +++ b/include/asm-arm/mach/arch.h @@ -12,15 +12,13 @@ * The size of struct machine_desc * (for assembler code) */ -#define SIZEOF_MACHINE_DESC 56 +#define SIZEOF_MACHINE_DESC 48 #ifndef __ASSEMBLY__ extern void setup_initrd(unsigned int start, unsigned int size); extern void setup_ramdisk(int doload, int prompt, int start, unsigned int rd_sz); -struct tagtable; - struct machine_desc { /* * Note! The first four elements are used @@ -41,8 +39,6 @@ struct machine_desc { unsigned int reserve_lp1 :1; /* never has lp1 */ unsigned int reserve_lp2 :1; /* never has lp2 */ unsigned int soft_reboot :1; /* soft reboot */ - const struct tagtable * tagtable; /* tag table */ - int tagsize; /* tag table size */ void (*fixup)(struct machine_desc *, struct param_struct *, char **, struct meminfo *); diff --git a/include/asm-arm/mach/pci.h b/include/asm-arm/mach/pci.h index b3f4d4b17cc7..f0fb5f4ec0df 100644 --- a/include/asm-arm/mach/pci.h +++ b/include/asm-arm/mach/pci.h @@ -30,3 +30,5 @@ struct hw_pci { extern u8 no_swizzle(struct pci_dev *dev, u8 *pin); extern void __init dc21285_setup_resources(struct resource **resource); extern void __init dc21285_init(void *sysdata); +extern void __init via82c505_init(void *sysdata); + diff --git a/include/asm-arm/mach/serial_sa1100.h b/include/asm-arm/mach/serial_sa1100.h new file mode 100644 index 000000000000..2576c11841d6 --- /dev/null +++ b/include/asm-arm/mach/serial_sa1100.h @@ -0,0 +1,37 @@ +/* + * linux/include/asm-arm/mach/serial_sa1100.h + * + * Author: Nicolas Pitre + * + * Moved to include/asm-arm/mach and changed lots, Russell King + * + * Low level machine dependent UART functions. + */ +#include <linux/config.h> + +struct uart_port; +struct uart_info; + +/* + * This is a temporary structure for registering these + * functions; it is intended to be discarded after boot. + */ +struct sa1100_port_fns { + void (*set_mctrl)(struct uart_port *, u_int); + int (*get_mctrl)(struct uart_port *); + void (*enable_ms)(struct uart_port *); + void (*pm)(struct uart_port *, u_int, u_int); + int (*open)(struct uart_port *, struct uart_info *); + void (*close)(struct uart_port *, struct uart_info *); +}; + +#if defined(CONFIG_SERIAL_SA1100) && !defined(CONFIG_SERIAL_SA1100_OLD) +void sa1100_register_uart_fns(struct sa1100_port_fns *fns); +void sa1100_register_uart(int idx, int port); +#else +#define sa1100_register_uart_fns(fns) do { } while (0) +#define sa1100_register_uart(idx,port) do { } while (0) +#endif + +void sa1100_uart1_altgpio(void); + diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index f2e0d2be90a5..c9f63415e223 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -16,12 +16,12 @@ #include <asm/arch/memory.h> -extern __inline__ unsigned long virt_to_phys(volatile void *x) +static inline unsigned long virt_to_phys(volatile void *x) { return __virt_to_phys((unsigned long)(x)); } -extern __inline__ void *phys_to_virt(unsigned long x) +static inline void *phys_to_virt(unsigned long x) { return (void *)(__phys_to_virt((unsigned long)(x))); } diff --git a/include/asm-arm/mmzone.h b/include/asm-arm/mmzone.h index bea120e10865..b87de151f0a4 100644 --- a/include/asm-arm/mmzone.h +++ b/include/asm-arm/mmzone.h @@ -25,6 +25,6 @@ extern pg_data_t discontig_node_data[]; */ #define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map) -#include <asm/arch/mmzone.h> +#include <asm/arch/memory.h> #endif diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index 7201ff55875d..bc3bd8275b08 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -69,7 +69,7 @@ extern void __bug(const char *file, int line, void *data); #define PAGE_BUG(page) __bug(__FILE__, __LINE__, page) /* Pure 2^n version of get_order */ -extern __inline__ int get_order(unsigned long size) +static inline int get_order(unsigned long size) { int order; diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h index 0bf0c26f3e46..2875af468575 100644 --- a/include/asm-arm/pci.h +++ b/include/asm-arm/pci.h @@ -5,12 +5,12 @@ #include <asm/arch/hardware.h> -extern inline void pcibios_set_master(struct pci_dev *dev) +static inline void pcibios_set_master(struct pci_dev *dev) { /* No special bus mastering setup handling */ } -extern inline void pcibios_penalize_isa_irq(int irq) +static inline void pcibios_penalize_isa_irq(int irq) { /* We don't do dynamic PCI IRQ allocation */ } @@ -37,20 +37,21 @@ extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t * References to the memory and mappings associated with cpu_addr/dma_addr * past this call are illegal. */ -extern inline void +static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle) { consistent_free(vaddr, size, dma_handle); } +#if !defined(CONFIG_SA1111) /* Map a single buffer of the indicated size for DMA in streaming mode. * The 32-bit bus address to use is returned. * * Once the device is given the dma address, the device owns this memory * until either pci_unmap_single or pci_dma_sync_single is performed. */ -extern inline dma_addr_t +static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction) { consistent_sync(ptr, size, direction); @@ -64,11 +65,19 @@ pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction) * After this call, reads by the cpu to the buffer are guarenteed to see * whatever the device wrote there. */ -extern inline void +static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction) { /* nothing to do */ } +#else +/* for SA1111 these functions are "magic" and relocate buffers */ +extern dma_addr_t pci_map_single(struct pci_dev *hwdev, + void *ptr, size_t size, int direction); +extern void pci_unmap_single(struct pci_dev *hwdev, + dma_addr_t dma_addr, + size_t size, int direction); +#endif /* Map a set of buffers described by scatterlist in streaming * mode for DMA. This is the scather-gather version of the @@ -85,7 +94,7 @@ pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int di * Device ownership issues as mentioned above for pci_map_single are * the same here. */ -extern inline int +static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction) { int i; @@ -102,7 +111,7 @@ pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int directi * Again, cpu read rules concerning calls here are the same as for * pci_unmap_single() above. */ -extern inline void +static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction) { /* nothing to do */ @@ -117,7 +126,7 @@ pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direc * next point you give the PCI dma address back to the card, the * device again owns the buffer. */ -extern inline void +static inline void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction) { consistent_sync(bus_to_virt(dma_handle), size, direction); @@ -129,7 +138,7 @@ pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, i * The same as pci_dma_sync_single but for a scatter-gather list, * same rules and usage. */ -extern inline void +static inline void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction) { int i; @@ -143,7 +152,7 @@ pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int d * only drive the low 24-bits during PCI bus mastering, then * you would pass 0x00ffffff as the mask to this function. */ -extern inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask) +static inline int pci_dma_supported(struct pci_dev *hwdev, dma_addr_t mask) { return 1; } diff --git a/include/asm-arm/pgalloc.h b/include/asm-arm/pgalloc.h index 4c2fe96c4791..348b6b54ef25 100644 --- a/include/asm-arm/pgalloc.h +++ b/include/asm-arm/pgalloc.h @@ -53,7 +53,7 @@ extern struct pgtable_cache_struct { #define __pgd_next(pgd) (((unsigned long *)pgd)[1]) #define __pte_next(pte) (((unsigned long *)pte)[0]) -extern __inline__ pgd_t *get_pgd_fast(void) +static inline pgd_t *get_pgd_fast(void) { unsigned long *ret; @@ -66,7 +66,7 @@ extern __inline__ pgd_t *get_pgd_fast(void) return (pgd_t *)ret; } -extern __inline__ void free_pgd_fast(pgd_t *pgd) +static inline void free_pgd_fast(pgd_t *pgd) { __pgd_next(pgd) = (unsigned long) pgd_quicklist; pgd_quicklist = (unsigned long *) pgd; @@ -86,7 +86,7 @@ static inline pte_t *pte_alloc_one_fast(struct mm_struct *mm, unsigned long addr return (pte_t *)ret; } -extern __inline__ void free_pte_fast(pte_t *pte) +static inline void free_pte_fast(pte_t *pte) { __pte_next(pte) = (unsigned long) pte_quicklist; pte_quicklist = (unsigned long *) pte; @@ -123,7 +123,7 @@ extern __inline__ void free_pte_fast(pte_t *pte) extern pgd_t *get_pgd_slow(struct mm_struct *mm); extern void free_pgd_slow(pgd_t *pgd); -extern __inline__ pgd_t *pgd_alloc(struct mm_struct *mm) +static inline pgd_t *pgd_alloc(struct mm_struct *mm) { pgd_t *pgd; diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index a33c3c31efed..12d7ae55a7b6 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -105,7 +105,7 @@ extern struct page *empty_zero_page; * Conversion functions: convert a page and protection to a page entry, * and a page entry and page directory to the page they refer to. */ -extern __inline__ pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) +static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) { pte_t pte; pte_val(pte) = physpage | pgprot_val(pgprot); @@ -151,7 +151,7 @@ extern __inline__ pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) #include <asm/proc/pgtable.h> -extern __inline__ pte_t pte_modify(pte_t pte, pgprot_t newprot) +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; diff --git a/include/asm-arm/proc-armo/cache.h b/include/asm-arm/proc-armo/cache.h index d64fe149f2c8..b35b40438ce0 100644 --- a/include/asm-arm/proc-armo/cache.h +++ b/include/asm-arm/proc-armo/cache.h @@ -45,7 +45,7 @@ /* * The following handle the weird MEMC chip */ -extern __inline__ void memc_update_all(void) +static inline void memc_update_all(void) { struct task_struct *p; @@ -66,7 +66,7 @@ static inline void memc_update_mm(struct mm_struct *mm) processor._set_pgd(mm->pgd); } -extern __inline__ void +static inline void memc_clear(struct mm_struct *mm, struct page *page) { cpu_memc_update_entry(mm->pgd, (unsigned long) page_address(page), 0); diff --git a/include/asm-arm/proc-armo/pgtable.h b/include/asm-arm/proc-armo/pgtable.h index 42cdb47669a1..eb6e8517f11d 100644 --- a/include/asm-arm/proc-armo/pgtable.h +++ b/include/asm-arm/proc-armo/pgtable.h @@ -77,17 +77,17 @@ static inline unsigned long pmd_page(pmd_t pmd) #define pte_dirty(pte) (!(pte_val(pte) & _PAGE_CLEAN)) #define pte_young(pte) (!(pte_val(pte) & _PAGE_OLD)) -extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_READONLY; return pte; } -extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) |= _PAGE_NOT_USER; return pte; } -extern inline pte_t pte_exprotect(pte_t pte) { pte_val(pte) |= _PAGE_NOT_USER; return pte; } -extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) |= _PAGE_CLEAN; return pte; } -extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) |= _PAGE_OLD; return pte; } +static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) |= _PAGE_READONLY; return pte; } +static inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) |= _PAGE_NOT_USER; return pte; } +static inline pte_t pte_exprotect(pte_t pte) { pte_val(pte) |= _PAGE_NOT_USER; return pte; } +static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) |= _PAGE_CLEAN; return pte; } +static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) |= _PAGE_OLD; return pte; } -extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_READONLY; return pte; } -extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) &= ~_PAGE_NOT_USER; return pte; } -extern inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NOT_USER; return pte; } -extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) &= ~_PAGE_CLEAN; return pte; } -extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) &= ~_PAGE_OLD; return pte; } +static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) &= ~_PAGE_READONLY; return pte; } +static inline pte_t pte_mkread(pte_t pte) { pte_val(pte) &= ~_PAGE_NOT_USER; return pte; } +static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NOT_USER; return pte; } +static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) &= ~_PAGE_CLEAN; return pte; } +static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) &= ~_PAGE_OLD; return pte; } #define pte_alloc_kernel pte_alloc diff --git a/include/asm-arm/proc-armo/system.h b/include/asm-arm/proc-armo/system.h index ced2af37b159..fccc6bbff83f 100644 --- a/include/asm-arm/proc-armo/system.h +++ b/include/asm-arm/proc-armo/system.h @@ -14,7 +14,7 @@ #define vectors_base() (0) -extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int size) +static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) { extern void __bad_xchg(volatile void *, int); diff --git a/include/asm-arm/proc-armo/uaccess.h b/include/asm-arm/proc-armo/uaccess.h index d3e733d87830..77fcf9e482a5 100644 --- a/include/asm-arm/proc-armo/uaccess.h +++ b/include/asm-arm/proc-armo/uaccess.h @@ -25,7 +25,7 @@ extern uaccess_t uaccess_user, uaccess_kernel; -extern __inline__ void set_fs (mm_segment_t fs) +static inline void set_fs (mm_segment_t fs) { current->addr_limit = fs; current->thread.uaccess = fs == USER_DS ? &uaccess_user : &uaccess_kernel; diff --git a/include/asm-arm/proc-armv/cache.h b/include/asm-arm/proc-armv/cache.h index dbda12e10bc6..777a14d2dc49 100644 --- a/include/asm-arm/proc-armv/cache.h +++ b/include/asm-arm/proc-armv/cache.h @@ -10,6 +10,12 @@ #include <asm/mman.h> /* + * This flag is used to indicate that the page pointed to by a pte + * is dirty and requires cleaning before returning it to the user. + */ +#define PG_dcache_dirty PG_arch_1 + +/* * Cache handling for 32-bit ARM processors. * * Note that on ARM, we have a more accurate specification than that @@ -54,6 +60,33 @@ /* * This flushes back any buffered write data. We have to clean the entries * in the cache for this page. This does not invalidate either I or D caches. + * + * Called from: + * 1. mm/filemap.c:filemap_nopage + * 2. mm/filemap.c:filemap_nopage + * [via do_no_page - ok] + * + * 3. mm/memory.c:break_cow + * [copy_cow_page doesn't do anything to the cache; insufficient cache + * handling. Need to add flush_dcache_page() here] + * + * 4. mm/memory.c:do_swap_page + * [read_swap_cache_async doesn't do anything to the cache: insufficient + * cache handling. Need to add flush_dcache_page() here] + * + * 5. mm/memory.c:do_anonymous_page + * [zero page, never written by kernel - ok] + * + * 6. mm/memory.c:do_no_page + * [we will be calling update_mmu_cache, which will catch on PG_dcache_dirty] + * + * 7. mm/shmem.c:shmem_nopage + * 8. mm/shmem.c:shmem_nopage + * [via do_no_page - ok] + * + * 9. fs/exec.c:put_dirty_page + * [we call flush_dcache_page prior to this, which will flush out the + * kernel virtual addresses from the dcache - ok] */ static __inline__ void flush_page_to_ram(struct page *page) { @@ -69,10 +102,28 @@ static __inline__ void flush_page_to_ram(struct page *page) #define flush_dcache_range(_s,_e) cpu_cache_clean_invalidate_range((_s),(_e),0) /* - * FIXME: We currently clean the dcache for this page. Should we - * also invalidate the Dcache? And what about the Icache? -- rmk + * flush_dcache_page is used when the kernel has written to the page + * cache page at virtual address page->virtual. + * + * If this page isn't mapped (ie, page->mapping = NULL), or it has + * userspace mappings (page->mapping->i_mmap or page->mapping->i_mmap_shared) + * then we _must_ always clean + invalidate the dcache entries associated + * with the kernel mapping. + * + * Otherwise we can defer the operation, and clean the cache when we are + * about to change to user space. This is the same method as used on SPARC64. + * See update_mmu_cache for the user space part. */ -#define flush_dcache_page(page) cpu_dcache_clean_page(page_address(page)) +static inline void flush_dcache_page(struct page *page) +{ + if (page->mapping && !(page->mapping->i_mmap) && + !(page->mapping->i_mmap_shared)) + set_bit(PG_dcache_dirty, &page->flags); + else { + unsigned long virt = (unsigned long)page_address(page); + cpu_cache_clean_invalidate_range(virt, virt + PAGE_SIZE, 0); + } +} #define clean_dcache_entry(_s) cpu_dcache_clean_entry((unsigned long)(_s)) @@ -84,11 +135,31 @@ static __inline__ void flush_page_to_ram(struct page *page) cpu_icache_invalidate_range((_s), (_e)); \ } while (0) -#define flush_icache_page(vma,pg) \ - do { \ - if ((vma)->vm_flags & PROT_EXEC) \ - cpu_icache_invalidate_page(page_address(pg)); \ - } while (0) +/* + * This function is misnamed IMHO. There are three places where it + * is called, each of which is preceded immediately by a call to + * flush_page_to_ram: + * + * 1. kernel/ptrace.c:access_one_page + * called after we have written to the kernel view of a user page. + * The user page has been expundged from the cache by flush_cache_page. + * [we don't need to do anything here if we add a call to + * flush_dcache_page] + * + * 2. mm/memory.c:do_swap_page + * called after we have (possibly) written to the kernel view of a + * user page, which has previously been removed (ie, has been through + * the swap cache). + * [if the flush_page_to_ram() conditions are satisfied, then ok] + * + * 3. mm/memory.c:do_no_page + * [if the flush_page_to_ram() conditions are satisfied, then ok] + * + * Invalidating the icache at the kernels virtual page isn't really + * going to do us much good, since we wouldn't have executed any + * instructions there. + */ +#define flush_icache_page(vma,pg) do { } while (0) /* * Old ARM MEMC stuff. This supports the reversed mapping handling that @@ -156,7 +227,11 @@ static __inline__ void flush_page_to_ram(struct page *page) } while (0) /* - * 32-bit ARM Processors don't have any MMU cache + * if PG_dcache_dirty is set for the page, we need to ensure that any + * cache entries for the kernels virtual memory range are written + * back to the page. */ -#define update_mmu_cache(vma,address,pte) do { } while (0) +extern void check_pgcache_dirty(struct page *page); + +#define update_mmu_cache(vma,address,pte) check_pgcache_dirty(pte_page(pte)) diff --git a/include/asm-arm/proc-armv/pgtable.h b/include/asm-arm/proc-armv/pgtable.h index d4e9693e4897..7532698e47e7 100644 --- a/include/asm-arm/proc-armv/pgtable.h +++ b/include/asm-arm/proc-armv/pgtable.h @@ -145,7 +145,7 @@ static inline unsigned long pmd_page(pmd_t pmd) #define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) #define PTE_BIT_FUNC(fn,op) \ -extern inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } +static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } /*PTE_BIT_FUNC(rdprotect, &= ~L_PTE_USER);*/ /*PTE_BIT_FUNC(mkread, |= L_PTE_USER);*/ diff --git a/include/asm-arm/proc-armv/system.h b/include/asm-arm/proc-armv/system.h index 77fd92b1198e..bc61642284fa 100644 --- a/include/asm-arm/proc-armv/system.h +++ b/include/asm-arm/proc-armv/system.h @@ -157,7 +157,7 @@ extern unsigned long cr_alignment; /* defined in entry-armv.S */ #define swp_is_buggy #endif -extern __inline__ unsigned long __xchg(unsigned long x, volatile void *ptr, int size) +static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) { extern void __bad_xchg(volatile void *, int); unsigned long ret; diff --git a/include/asm-arm/proc-armv/uaccess.h b/include/asm-arm/proc-armv/uaccess.h index 4c9d6b5a3cae..8eda14306d25 100644 --- a/include/asm-arm/proc-armv/uaccess.h +++ b/include/asm-arm/proc-armv/uaccess.h @@ -14,7 +14,7 @@ #define KERNEL_DS 0x00000000 #define USER_DS PAGE_OFFSET -extern __inline__ void set_fs (mm_segment_t fs) +static inline void set_fs (mm_segment_t fs) { current->addr_limit = fs; diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h index e6b6625cd08a..5fe9f79c8ec7 100644 --- a/include/asm-arm/processor.h +++ b/include/asm-arm/processor.h @@ -83,24 +83,16 @@ struct thread_struct { /* * Return saved PC of a blocked thread. */ -extern __inline__ unsigned long thread_saved_pc(struct thread_struct *t) +static inline unsigned long thread_saved_pc(struct thread_struct *t) { return t->save ? pc_pointer(t->save->pc) : 0; } -extern __inline__ unsigned long get_css_fp(struct thread_struct *t) +static inline unsigned long get_css_fp(struct thread_struct *t) { return t->save ? t->save->fp : 0; } -asmlinkage void ret_from_sys_call(void) __asm__("ret_from_sys_call"); - -extern __inline__ void init_thread_css(struct context_save_struct *save) -{ - *save = INIT_CSS; - save->pc |= (unsigned long)ret_from_sys_call; -} - /* Forward declaration, a strange C thing */ struct task_struct; diff --git a/include/asm-arm/semaphore.h b/include/asm-arm/semaphore.h index adabfd751232..fb73d9752319 100644 --- a/include/asm-arm/semaphore.h +++ b/include/asm-arm/semaphore.h @@ -42,7 +42,7 @@ struct semaphore { #define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) #define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) -extern inline void sema_init(struct semaphore *sem, int val) +static inline void sema_init(struct semaphore *sem, int val) { atomic_set(&sem->count, val); sem->sleepers = 0; @@ -79,7 +79,7 @@ extern void __up(struct semaphore * sem); * This is ugly, but we want the default case to fall through. * "__down" is the actual routine that waits... */ -extern inline void down(struct semaphore * sem) +static inline void down(struct semaphore * sem) { #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); @@ -92,7 +92,7 @@ extern inline void down(struct semaphore * sem) * This is ugly, but we want the default case to fall through. * "__down_interruptible" is the actual routine that waits... */ -extern inline int down_interruptible (struct semaphore * sem) +static inline int down_interruptible (struct semaphore * sem) { #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); @@ -101,7 +101,7 @@ extern inline int down_interruptible (struct semaphore * sem) return __down_op_ret(sem, __down_interruptible_failed); } -extern inline int down_trylock(struct semaphore *sem) +static inline int down_trylock(struct semaphore *sem) { #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); @@ -116,7 +116,7 @@ extern inline int down_trylock(struct semaphore *sem) * The default case (no contention) will result in NO * jumps for both down() and up(). */ -extern inline void up(struct semaphore * sem) +static inline void up(struct semaphore * sem) { #if WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h index 56b6147f69ae..2e27fe9ca212 100644 --- a/include/asm-arm/setup.h +++ b/include/asm-arm/setup.h @@ -10,6 +10,13 @@ * Structure passed to kernel to tell it about the * hardware it's running on. See linux/Documentation/arm/Setup * for more info. + * + * NOTE: + * This file contains two ways to pass information from the boot + * loader to the kernel. The old struct param_struct is deprecated, + * but it will be kept in the kernel for 5 years from now + * (2001). This will allow boot loaders to convert to the new struct + * tag way. */ #ifndef __ASMARM_SETUP_H #define __ASMARM_SETUP_H @@ -25,6 +32,7 @@ */ #define COMMAND_LINE_SIZE 1024 +/* This is the old deprecated way to pass parameters to the kernel */ struct param_struct { union { struct { @@ -53,7 +61,7 @@ struct param_struct { unsigned long system_rev; /* 76 */ unsigned long system_serial_low; /* 80 */ unsigned long system_serial_high; /* 84 */ - unsigned long mem_fclk_21285; /* 88 */ + unsigned long mem_fclk_21285; /* 88 */ } s; char unused[256]; } u1; @@ -67,9 +75,13 @@ struct param_struct { char commandline[COMMAND_LINE_SIZE]; }; + + /* - * New idea - a list of tagged entries + * The new way of passing information: a list of tagged entries */ + +/* The list ends with an ATAG_NONE node. */ #define ATAG_NONE 0x00000000 struct tag_header { @@ -77,6 +89,7 @@ struct tag_header { u32 tag; }; +/* The list must start with an ATAG_CORE node */ #define ATAG_CORE 0x54410001 struct tag_core { @@ -85,13 +98,15 @@ struct tag_core { u32 rootdev; }; +/* it is allowed to have multiple ATAG_MEM nodes */ #define ATAG_MEM 0x54410002 struct tag_mem32 { u32 size; - u32 start; + u32 start; /* physical start address */ }; +/* VGA text type displays */ #define ATAG_VIDEOTEXT 0x54410003 struct tag_videotext { @@ -106,21 +121,24 @@ struct tag_videotext { u16 video_points; }; +/* describes how the ramdisk will be used in kernel */ #define ATAG_RAMDISK 0x54410004 struct tag_ramdisk { - u32 flags; /* b0 = load, b1 = prompt */ - u32 size; - u32 start; + u32 flags; /* bit 0 = load, bit 1 = prompt */ + u32 size; /* decompressed ramdisk size */ + u32 start; /* starting block of floppy-based RAM disk image */ }; +/* describes where the compressed ramdisk image lives */ #define ATAG_INITRD 0x54410005 struct tag_initrd { - u32 start; - u32 size; + u32 start; /* physical start address */ + u32 size; /* size of compressed ramdisk image */ }; +/* board serial number. "64 bits should be enough for everybody" */ #define ATAG_SERIAL 0x54410006 struct tag_serialnr { @@ -128,12 +146,16 @@ struct tag_serialnr { u32 high; }; +/* board revision */ #define ATAG_REVISION 0x54410007 struct tag_revision { u32 rev; }; +/* initial values for vesafb-type framebuffers. see struct screen_info + * in include/linux/tty.h + */ #define ATAG_VIDEOLFB 0x54410008 struct tag_videolfb { @@ -153,12 +175,14 @@ struct tag_videolfb { u8 rsvd_pos; }; +/* command line: \0 terminated string */ #define ATAG_CMDLINE 0x54410009 struct tag_cmdline { - char cmdline[1]; + char cmdline[1]; /* this is the minimum size */ }; +/* acorn RiscPC specific information */ #define ATAG_ACORN 0x41000101 struct tag_acorn { @@ -168,6 +192,7 @@ struct tag_acorn { u8 adfsdrives; }; +/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */ #define ATAG_MEMCLK 0x41000402 struct tag_memclk { @@ -204,6 +229,20 @@ struct tagtable { int (*parse)(const struct tag *); }; +#define __tag __attribute__((unused, __section__(".taglist"))) +#define __tagtable(tag, fn) \ +static struct tagtable __tagtable_##fn __tag = { tag, fn } + +#define tag_member_present(tag,member) \ + ((unsigned long)(&((struct tag *)0L)->member + 1) \ + <= (tag)->hdr.size * 4) + +#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size)) +#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2) + +#define for_each_tag(t,base) \ + for (t = base; t->hdr.size; t = tag_next(t)) + /* * Memory map description */ diff --git a/include/asm-arm/siginfo.h b/include/asm-arm/siginfo.h index 33bf0fadbbef..2591a6fdc963 100644 --- a/include/asm-arm/siginfo.h +++ b/include/asm-arm/siginfo.h @@ -216,7 +216,7 @@ typedef struct sigevent { #ifdef __KERNEL__ #include <linux/string.h> -extern inline void copy_siginfo(siginfo_t *to, siginfo_t *from) +static inline void copy_siginfo(siginfo_t *to, siginfo_t *from) { if (from->si_code < 0) memcpy(to, from, sizeof(siginfo_t)); diff --git a/include/asm-arm/smplock.h b/include/asm-arm/smplock.h index 96565069c988..aa24f5389da0 100644 --- a/include/asm-arm/smplock.h +++ b/include/asm-arm/smplock.h @@ -38,13 +38,13 @@ do { \ * so we only need to worry about other * CPU's. */ -extern __inline__ void lock_kernel(void) +static inline void lock_kernel(void) { if (!++current->lock_depth) spin_lock(&kernel_flag); } -extern __inline__ void unlock_kernel(void) +static inline void unlock_kernel(void) { if (--current->lock_depth < 0) spin_unlock(&kernel_flag); diff --git a/include/asm-arm/softirq.h b/include/asm-arm/softirq.h index 20b01947bf10..14cb91c2f676 100644 --- a/include/asm-arm/softirq.h +++ b/include/asm-arm/softirq.h @@ -11,7 +11,6 @@ #define local_bh_disable() cpu_bh_disable(smp_processor_id()) #define __local_bh_enable() __cpu_bh_enable(smp_processor_id()) -#define __cpu_raise_softirq(cpu,nr) set_bit((nr), &softirq_pending(cpu)) #define in_softirq() (local_bh_count(smp_processor_id()) != 0) @@ -22,4 +21,6 @@ do { \ __asm__("bl%? __do_softirq": : : "lr");/* out of line */\ } while (0) +#define __cpu_raise_softirq(cpu, nr) __set_bit(nr, &softirq_pending(cpu)) + #endif /* __ASM_SOFTIRQ_H */ diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h index 8b5e076a9421..1fac1a34f62a 100644 --- a/include/asm-arm/uaccess.h +++ b/include/asm-arm/uaccess.h @@ -39,7 +39,7 @@ extern unsigned long search_exception_table(unsigned long); #define access_ok(type,addr,size) (__range_ok(addr,size) == 0) -extern __inline__ int verify_area(int type, const void * addr, unsigned long size) +static inline int verify_area(int type, const void * addr, unsigned long size) { return access_ok(type, addr, size) ? 0 : -EFAULT; } @@ -129,7 +129,7 @@ static __inline__ long __strncpy_from_user (char *dst, const char *src, long cou #define strlen_user(s) strnlen_user(s, ~0UL >> 1) -extern __inline__ long strnlen_user(const char *s, long n) +static inline long strnlen_user(const char *s, long n) { unsigned long res = 0; diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 36d92810fe52..510cac1b8435 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -1,3 +1,15 @@ +/* + * linux/include/asm-arm/unistd.h + * + * Copyright (C) 2001 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Please forward _all_ changes to this file to rmk@arm.linux.org.uk, + * no matter what the change is. Thanks! + */ #ifndef __ASM_ARM_UNISTD_H #define __ASM_ARM_UNISTD_H @@ -82,7 +94,7 @@ #define __NR_sigpending (__NR_SYSCALL_BASE+ 73) #define __NR_sethostname (__NR_SYSCALL_BASE+ 74) #define __NR_setrlimit (__NR_SYSCALL_BASE+ 75) -#define __NR_old_getrlimit (__NR_SYSCALL_BASE+ 76) /* Back compat 2GB limited rlimit */ +#define __NR_getrlimit (__NR_SYSCALL_BASE+ 76) /* Back compat 2GB limited rlimit */ #define __NR_getrusage (__NR_SYSCALL_BASE+ 77) #define __NR_gettimeofday (__NR_SYSCALL_BASE+ 78) #define __NR_settimeofday (__NR_SYSCALL_BASE+ 79) @@ -197,7 +209,7 @@ /* 188 reserved */ /* 189 reserved */ #define __NR_vfork (__NR_SYSCALL_BASE+190) -#define __NR_getrlimit (__NR_SYSCALL_BASE+191) /* SuS compliant getrlimit */ +#define __NR_ugetrlimit (__NR_SYSCALL_BASE+191) /* SuS compliant getrlimit */ #define __NR_mmap2 (__NR_SYSCALL_BASE+192) #define __NR_truncate64 (__NR_SYSCALL_BASE+193) #define __NR_ftruncate64 (__NR_SYSCALL_BASE+194) @@ -229,6 +241,15 @@ #define __NR_madvise (__NR_SYSCALL_BASE+220) #define __NR_fcntl64 (__NR_SYSCALL_BASE+221) +/* + * The following SWIs are ARM private. + */ +#define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000) +#define __ARM_NR_breakpoint (__ARM_NR_BASE+1) +#define __ARM_NR_cacheflush (__ARM_NR_BASE+2) +#define __ARM_NR_usr26 (__ARM_NR_BASE+3) +#define __ARM_NR_usr32 (__ARM_NR_BASE+4) + #define __sys2(x) #x #define __sys1(x) __sys2(x) diff --git a/include/asm-i386/apicdef.h b/include/asm-i386/apicdef.h index a331d78b8ba5..f855a7d88d82 100644 --- a/include/asm-i386/apicdef.h +++ b/include/asm-i386/apicdef.h @@ -33,6 +33,8 @@ #define APIC_ALL_CPUS 0xFF #define APIC_DFR 0xE0 #define APIC_SPIV 0xF0 +#define APIC_SPIV_FOCUS_DISABLED (1<<9) +#define APIC_SPIV_APIC_ENABLED (1<<8) #define APIC_ISR 0x100 #define APIC_TMR 0x180 #define APIC_IRR 0x200 diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h index f3bc33ea141e..55b2886e8181 100644 --- a/include/asm-i386/io.h +++ b/include/asm-i386/io.h @@ -135,6 +135,11 @@ static inline void * phys_to_virt(unsigned long address) return __va(address); } +/* + * Change "struct page" to physical address. + */ +#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT) + extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); static inline void * ioremap (unsigned long offset, unsigned long size) @@ -159,6 +164,7 @@ extern void iounmap(void *addr); */ #define virt_to_bus virt_to_phys #define bus_to_virt phys_to_virt +#define page_to_bus page_to_phys /* * readX/writeX() are used to access memory mapped devices. On some diff --git a/include/asm-i386/keyboard.h b/include/asm-i386/keyboard.h index 4b308f746386..c3062c3de049 100644 --- a/include/asm-i386/keyboard.h +++ b/include/asm-i386/keyboard.h @@ -15,6 +15,7 @@ #include <linux/kernel.h> #include <linux/ioport.h> +#include <linux/kd.h> #include <asm/io.h> #define KEYBOARD_IRQ 1 @@ -26,7 +27,9 @@ extern int pckbd_translate(unsigned char scancode, unsigned char *keycode, char raw_mode); extern char pckbd_unexpected_up(unsigned char keycode); extern void pckbd_leds(unsigned char leds); +extern int pckbd_rate(struct kbd_repeat *rep); extern void pckbd_init_hw(void); +extern void pckbd_pm_resume(void); extern unsigned char pckbd_sysrq_xlate[128]; #define kbd_setkeycode pckbd_setkeycode @@ -34,6 +37,7 @@ extern unsigned char pckbd_sysrq_xlate[128]; #define kbd_translate pckbd_translate #define kbd_unexpected_up pckbd_unexpected_up #define kbd_leds pckbd_leds +#define kbd_rate pckbd_rate #define kbd_init_hw pckbd_init_hw #define kbd_sysrq_xlate pckbd_sysrq_xlate diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h index 40d179704055..ec3d5cc5c2b4 100644 --- a/include/asm-i386/page.h +++ b/include/asm-i386/page.h @@ -117,7 +117,6 @@ static __inline__ int get_order(unsigned long size) #define virt_to_page(kaddr) (mem_map + (__pa(kaddr) >> PAGE_SHIFT)) #define VALID_PAGE(page) ((page - mem_map) < max_mapnr) - #endif /* __KERNEL__ */ #endif /* _I386_PAGE_H */ diff --git a/include/asm-m68k/keyboard.h b/include/asm-m68k/keyboard.h index 4129be7011e6..56fec35ab963 100644 --- a/include/asm-m68k/keyboard.h +++ b/include/asm-m68k/keyboard.h @@ -14,6 +14,7 @@ #ifdef __KERNEL__ #include <linux/config.h> +#include <linux/kd.h> #include <asm/machdep.h> #ifdef CONFIG_Q40 @@ -56,6 +57,7 @@ static __inline__ void kbd_leds(unsigned char leds) #define kbd_init_hw mach_keyb_init #define kbd_translate mach_kbd_translate +#define kbd_rate mach_kbdrate #define kbd_sysrq_xlate mach_sysrq_xlate diff --git a/include/asm-ppc/init.h b/include/asm-ppc/init.h index 33744bf0579d..0fb2199f6302 100644 --- a/include/asm-ppc/init.h +++ b/include/asm-ppc/init.h @@ -1,5 +1,5 @@ /* - * BK Id: SCCS/s.init.h 1.5 05/17/01 18:14:24 cort + * BK Id: SCCS/s.init.h 1.8 07/06/01 09:19:30 trini */ #ifdef __KERNEL__ #ifndef _PPC_INIT_H @@ -25,12 +25,6 @@ __argchrp __chrp; \ __argchrp -#define __apus __attribute__ ((__section__ (".text.apus"))) -#define __apusdata __attribute__ ((__section__ (".data.apus"))) -#define __apusfunc(__argapus) \ - __argapus __apus; \ - __argapus - /* this is actually just common chrp/pmac code, not OF code -- Cort */ #define __openfirmware __attribute__ ((__section__ (".text.openfirmware"))) #define __openfirmwaredata __attribute__ ((__section__ (".data.openfirmware"))) diff --git a/include/asm-ppc/prom.h b/include/asm-ppc/prom.h index 43e3f600341a..c501b2c8cac2 100644 --- a/include/asm-ppc/prom.h +++ b/include/asm-ppc/prom.h @@ -1,5 +1,5 @@ /* - * BK Id: SCCS/s.prom.h 1.14 06/13/01 15:28:43 paulus + * BK Id: SCCS/s.prom.h 1.16 07/25/01 14:11:37 trini */ /* * Definitions for talking to the Open Firmware PROM on @@ -79,7 +79,6 @@ extern struct device_node *find_type_devices(const char *type); extern struct device_node *find_path_device(const char *path); extern struct device_node *find_compatible_devices(const char *type, const char *compat); -extern struct device_node *find_phandle(phandle); extern struct device_node *find_all_nodes(void); extern int device_is_compatible(struct device_node *device, const char *); extern int machine_is_compatible(const char *compat); diff --git a/include/asm-ppc/types.h b/include/asm-ppc/types.h index c8874a253cd2..59a83febe6dd 100644 --- a/include/asm-ppc/types.h +++ b/include/asm-ppc/types.h @@ -1,5 +1,5 @@ /* - * BK Id: SCCS/s.types.h 1.5 05/17/01 18:14:26 cort + * BK Id: SCCS/s.types.h 1.8 07/07/01 13:37:26 paulus */ #ifndef _PPC_TYPES_H #define _PPC_TYPES_H @@ -47,9 +47,14 @@ typedef __vector128 vector128; /* DMA addresses are 32-bits wide */ typedef u32 dma_addr_t; +#endif /* __KERNEL__ */ + +/* + * XXX allowed outside of __KERNEL__ for now, until glibc gets + * a proper set of asm headers of its own. -- paulus + */ typedef unsigned short umode_t; -#endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ #endif diff --git a/include/asm-s390/softirq.h b/include/asm-s390/softirq.h index b5fb68fe173f..839dbe4b9599 100644 --- a/include/asm-s390/softirq.h +++ b/include/asm-s390/softirq.h @@ -17,31 +17,27 @@ #include <asm/hardirq.h> #include <asm/lowcore.h> -#define local_bh_disable() \ -do { \ - local_bh_count(smp_processor_id())++; \ - barrier(); \ -} while (0) +#define __cpu_bh_enable(cpu) \ + do { barrier(); local_bh_count(cpu)--; } while (0) +#define cpu_bh_disable(cpu) \ + do { local_bh_count(cpu)++; barrier(); } while (0) -#define __local_bh_enable() \ -do { \ - barrier(); \ - local_bh_count(smp_processor_id())--; \ -} while (0) +#define local_bh_disable() cpu_bh_disable(smp_processor_id()) +#define __local_bh_enable() __cpu_bh_enable(smp_processor_id()) + +#define in_softirq() (local_bh_count(smp_processor_id()) != 0) -#define local_bh_enable() \ -do { \ - if (!--local_bh_count(smp_processor_id()) \ - && softirq_pending(smp_processor_id())) { \ - do_softirq(); \ - __sti(); \ - } \ +#define local_bh_enable() \ +do { \ + unsigned int *ptr = &local_bh_count(smp_processor_id()); \ + barrier(); \ + if (!--*ptr) \ + if (softirq_pending(smp_processor_id())) \ + do_softirq(); \ } while (0) #define __cpu_raise_softirq(cpu, nr) (softirq_pending(cpu) |= (1<<nr)) -#define in_softirq() (local_bh_count(smp_processor_id()) != 0) - #endif /* __ASM_SOFTIRQ_H */ diff --git a/include/asm-s390x/softirq.h b/include/asm-s390x/softirq.h index b5fb68fe173f..839dbe4b9599 100644 --- a/include/asm-s390x/softirq.h +++ b/include/asm-s390x/softirq.h @@ -17,31 +17,27 @@ #include <asm/hardirq.h> #include <asm/lowcore.h> -#define local_bh_disable() \ -do { \ - local_bh_count(smp_processor_id())++; \ - barrier(); \ -} while (0) +#define __cpu_bh_enable(cpu) \ + do { barrier(); local_bh_count(cpu)--; } while (0) +#define cpu_bh_disable(cpu) \ + do { local_bh_count(cpu)++; barrier(); } while (0) -#define __local_bh_enable() \ -do { \ - barrier(); \ - local_bh_count(smp_processor_id())--; \ -} while (0) +#define local_bh_disable() cpu_bh_disable(smp_processor_id()) +#define __local_bh_enable() __cpu_bh_enable(smp_processor_id()) + +#define in_softirq() (local_bh_count(smp_processor_id()) != 0) -#define local_bh_enable() \ -do { \ - if (!--local_bh_count(smp_processor_id()) \ - && softirq_pending(smp_processor_id())) { \ - do_softirq(); \ - __sti(); \ - } \ +#define local_bh_enable() \ +do { \ + unsigned int *ptr = &local_bh_count(smp_processor_id()); \ + barrier(); \ + if (!--*ptr) \ + if (softirq_pending(smp_processor_id())) \ + do_softirq(); \ } while (0) #define __cpu_raise_softirq(cpu, nr) (softirq_pending(cpu) |= (1<<nr)) -#define in_softirq() (local_bh_count(smp_processor_id()) != 0) - #endif /* __ASM_SOFTIRQ_H */ diff --git a/include/asm-sparc64/mmu_context.h b/include/asm-sparc64/mmu_context.h index f1d14f0112ce..76e23b44d07d 100644 --- a/include/asm-sparc64/mmu_context.h +++ b/include/asm-sparc64/mmu_context.h @@ -1,4 +1,4 @@ -/* $Id: mmu_context.h,v 1.48 2001/08/03 06:18:52 davem Exp $ */ +/* $Id: mmu_context.h,v 1.49 2001/08/09 21:10:20 davem Exp $ */ #ifndef __SPARC64_MMU_CONTEXT_H #define __SPARC64_MMU_CONTEXT_H @@ -23,7 +23,6 @@ extern unsigned long mmu_context_bmap[]; #define CTX_FIRST_VERSION ((1UL << CTX_VERSION_SHIFT) + 1UL) #define CTX_VALID(__ctx) \ (!(((__ctx) ^ tlb_context_cache) & CTX_VERSION_MASK)) -#define CTX_NEVER_WAS_VALID(__ctx) ((__ctx) == 0UL) #define CTX_HWBITS(__ctx) ((__ctx) & ~CTX_VERSION_MASK) extern void get_new_mmu_context(struct mm_struct *mm); diff --git a/include/linux/ac97_codec.h b/include/linux/ac97_codec.h index 6936d00ab649..986599666c2b 100644 --- a/include/linux/ac97_codec.h +++ b/include/linux/ac97_codec.h @@ -152,8 +152,7 @@ struct ac97_codec { int dev_mixer; int type; - /* codec specific init/reset routines, used mainly for 4 or 6 channel support */ - int (*codec_init) (struct ac97_codec *codec); + struct ac97_ops *codec_ops; /* controller specific lower leverl ac97 accessing routines */ u16 (*codec_read) (struct ac97_codec *codec, u8 reg); @@ -184,6 +183,20 @@ struct ac97_codec { int (*modem_ioctl)(struct ac97_codec *codec, unsigned int cmd, unsigned long arg); }; +/* + * Operation structures for each known AC97 chip + */ + +struct ac97_ops +{ + /* Initialise */ + int (*init)(struct ac97_codec *c); + /* Amplifier control */ + int (*amplifier)(struct ac97_codec *codec, int on); + /* Digital mode control */ + int (*digital)(struct ac97_codec *codec, int format); +}; + extern int ac97_read_proc (char *page_out, char **start, off_t off, int count, int *eof, void *data); extern int ac97_probe_codec(struct ac97_codec *); diff --git a/include/linux/fs.h b/include/linux/fs.h index 2512dbe7393b..d8fed404b1e2 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -763,7 +763,7 @@ extern int vfs_rename(struct inode *, struct dentry *, struct inode *, struct de * This allows the kernel to read directories into kernel space or * to have different dirent layouts depending on the binary type. */ -typedef int (*filldir_t)(void *, const char *, int, off_t, ino_t, unsigned); +typedef int (*filldir_t)(void *, const char *, int, loff_t, ino_t, unsigned); struct block_device_operations { int (*open) (struct inode *, struct file *); @@ -1344,6 +1344,7 @@ extern int file_read_actor(read_descriptor_t * desc, struct page *page, unsigned extern ssize_t generic_file_read(struct file *, char *, size_t, loff_t *); extern ssize_t generic_file_write(struct file *, const char *, size_t, loff_t *); extern void do_generic_file_read(struct file *, loff_t *, read_descriptor_t *, read_actor_t); +extern loff_t no_llseek(struct file *file, loff_t offset, int origin); extern loff_t generic_file_llseek(struct file *file, loff_t offset, int origin); extern ssize_t generic_read_dir(struct file *, char *, size_t, loff_t *); diff --git a/include/linux/i2o.h b/include/linux/i2o.h index cebfa0df8717..45c45ef0170a 100644 --- a/include/linux/i2o.h +++ b/include/linux/i2o.h @@ -78,6 +78,7 @@ struct i2o_device */ struct i2o_pci { + struct pci_dev *pdev; /* PCI device */ int irq; int queue_buggy:1; /* Don't send a lot of messages */ int short_req:1; /* Use small block sizes */ @@ -126,6 +127,11 @@ struct i2o_controller u32 mem_phys; /* MFA physical */ int battery:1; /* Has a battery backup */ + int io_alloc:1; /* An I/O resource was allocated */ + int mem_alloc:1; /* A memory resource was allocated */ + + struct resource io_resource; /* I/O resource allocated to the IOP */ + struct resource mem_resource; /* Mem resource allocated to the IOP */ struct proc_dir_entry* proc_entry; /* /proc dir */ diff --git a/include/linux/iso_fs_sb.h b/include/linux/iso_fs_sb.h index 7bb55a504ce5..1f1100bbbc57 100644 --- a/include/linux/iso_fs_sb.h +++ b/include/linux/iso_fs_sb.h @@ -13,6 +13,7 @@ struct isofs_sb_info { unsigned char s_high_sierra; /* A simple flag */ unsigned char s_mapping; + int s_rock_offset; /* offset of SUSP fields within SU area */ unsigned char s_rock; unsigned char s_joliet_level; unsigned char s_utf8; diff --git a/include/linux/jffs.h b/include/linux/jffs.h index 61e7b66fe39b..3b1f1c81275d 100644 --- a/include/linux/jffs.h +++ b/include/linux/jffs.h @@ -22,6 +22,8 @@ #define JFFS_VERSION_STRING "1.0" +#include <linux/completion.h> + /* This is a magic number that is used as an identification number for this file system. It is written to the super_block structure. */ #define JFFS_MAGIC_SB_BITMASK 0x07c0 /* 1984 */ @@ -185,7 +187,7 @@ struct jffs_control struct jffs_delete_list *delete_list; /* Track deleted files. */ pid_t thread_pid; /* GC thread's PID */ struct task_struct *gc_task; /* GC task struct */ - struct semaphore gc_thread_sem; /* GC thread exit mutex */ + struct completion gc_thread_comp; /* GC thread exit mutex */ __u32 gc_minfree_threshold; /* GC trigger thresholds */ __u32 gc_maxdirty_threshold; }; diff --git a/include/linux/kernel.h b/include/linux/kernel.h index c915687b8b65..6f1882dbaeb5 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -45,14 +45,14 @@ #define FASTCALL(x) x #endif -struct semaphore; +struct completion; extern struct notifier_block *panic_notifier_list; NORET_TYPE void panic(const char * fmt, ...) __attribute__ ((NORET_AND format (printf, 1, 2))); NORET_TYPE void do_exit(long error_code) ATTRIB_NORET; -NORET_TYPE void up_and_exit(struct semaphore *, long) +NORET_TYPE void complete_and_exit(struct completion *, long) ATTRIB_NORET; extern int abs(int); extern unsigned long simple_strtoul(const char *,char **,unsigned int); diff --git a/include/linux/major.h b/include/linux/major.h index f47c315e144d..e46f28eee6bb 100644 --- a/include/linux/major.h +++ b/include/linux/major.h @@ -176,4 +176,18 @@ static __inline__ int scsi_blk_major(int m) { return SCSI_BLK_MAJOR(m); } +/* + * Tests for IDE devices + */ +#define IDE_DISK_MAJOR(M) ((M) == IDE0_MAJOR || (M) == IDE1_MAJOR || \ + (M) == IDE2_MAJOR || (M) == IDE3_MAJOR || \ + (M) == IDE4_MAJOR || (M) == IDE5_MAJOR || \ + (M) == IDE6_MAJOR || (M) == IDE7_MAJOR || \ + (M) == IDE8_MAJOR || (M) == IDE9_MAJOR) + +static __inline__ int ide_blk_major(int m) +{ + return IDE_DISK_MAJOR(m); +} + #endif diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 003326eb3361..c6d1f405f728 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -344,7 +344,7 @@ struct net_device #define NETIF_F_HW_CSUM 8 /* Can checksum all the packets. */ #define NETIF_F_DYNALLOC 16 /* Self-dectructable device. */ #define NETIF_F_HIGHDMA 32 /* Can DMA to high memory. */ -#define NETIF_F_FRAGLIST 1 /* Scatter/gather IO. */ +#define NETIF_F_FRAGLIST 64 /* Scatter/gather IO. */ /* Called after device is detached from network. */ void (*uninit)(struct net_device *dev); diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index fcd93ba5e88b..a32080868dcd 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -348,6 +348,8 @@ #define PCI_DEVICE_ID_AMD_SCSI 0x2020 #define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006 #define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007 +#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C +#define PCI_DEVIDE_ID_AMD_FE_GATE_700D 0x700D #define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E #define PCI_DEVICE_ID_AMD_FE_GATE_700F 0x700F #define PCI_DEVICE_ID_AMD_COBRA_7400 0x7400 @@ -572,6 +574,7 @@ #define PCI_DEVICE_ID_PROMISE_20246 0x4d33 #define PCI_DEVICE_ID_PROMISE_20262 0x4d38 #define PCI_DEVICE_ID_PROMISE_20268 0x4d68 +#define PCI_DEVICE_ID_PROMISE_20268R 0x6268 #define PCI_DEVICE_ID_PROMISE_5300 0x5300 #define PCI_VENDOR_ID_N9 0x105d @@ -1041,8 +1044,8 @@ #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 #define PCI_DEVICE_ID_SERVERWORKS_CIOB30 0x0010 #define PCI_DEVICE_ID_SERVERWORKS_CMIC_HE 0x0011 -#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 #define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 +#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 #define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211 #define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE 0x0212 #define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220 @@ -1441,6 +1444,9 @@ #define PCI_VENDOR_ID_ZOLTRIX 0x15b0 #define PCI_DEVICE_ID_ZOLTRIX_2BD0 0x2bd0 +#define PCI_VENDOR_ID_PDC 0x15e9 +#define PCI_DEVICE_ID_PDC_1841 0x1841 + #define PCI_VENDOR_ID_SYMPHONY 0x1c1c #define PCI_DEVICE_ID_SYMPHONY_101 0x0001 @@ -1502,6 +1508,7 @@ #define PCI_DEVICE_ID_INTEL_82430 0x0486 #define PCI_DEVICE_ID_INTEL_82434 0x04a3 #define PCI_DEVICE_ID_INTEL_I960 0x0960 +#define PCI_DEVICE_ID_INTEL_82562ET 0x1031 #define PCI_DEVICE_ID_INTEL_82559ER 0x1209 #define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 #define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222 diff --git a/include/linux/raid/md.h b/include/linux/raid/md.h index 5cd20c6fcc1b..d18f20205636 100644 --- a/include/linux/raid/md.h +++ b/include/linux/raid/md.h @@ -36,6 +36,7 @@ #include <linux/locks.h> #include <linux/kernel_stat.h> #include <asm/io.h> +#include <linux/completion.h> #include <linux/raid/md_compatible.h> /* diff --git a/include/linux/raid/md_k.h b/include/linux/raid/md_k.h index 8b6c3d7c0060..3b51e92fe555 100644 --- a/include/linux/raid/md_k.h +++ b/include/linux/raid/md_k.h @@ -323,7 +323,7 @@ typedef struct mdk_thread_s { void *data; md_wait_queue_head_t wqueue; unsigned long flags; - struct semaphore *sem; + struct completion *event; struct task_struct *tsk; const char *name; } mdk_thread_t; @@ -366,5 +366,30 @@ do { \ __wait_event_lock_irq(wq, condition, lock); \ } while (0) + +#define __wait_disk_event(wq, condition) \ +do { \ + wait_queue_t __wait; \ + init_waitqueue_entry(&__wait, current); \ + \ + add_wait_queue(&wq, &__wait); \ + for (;;) { \ + set_current_state(TASK_UNINTERRUPTIBLE); \ + if (condition) \ + break; \ + run_task_queue(&tq_disk); \ + schedule(); \ + } \ + current->state = TASK_RUNNING; \ + remove_wait_queue(&wq, &__wait); \ +} while (0) + +#define wait_disk_event(wq, condition) \ +do { \ + if (condition) \ + break; \ + __wait_disk_event(wq, condition); \ +} while (0) + #endif diff --git a/include/linux/raid/raid1.h b/include/linux/raid/raid1.h index a9a9d3e8edb8..40675b40ca0f 100644 --- a/include/linux/raid/raid1.h +++ b/include/linux/raid/raid1.h @@ -42,7 +42,10 @@ struct raid1_private_data { */ struct buffer_head *freebh; int freebh_cnt; /* how many are on the list */ + int freebh_blocked; struct raid1_bh *freer1; + int freer1_blocked; + int freer1_cnt; struct raid1_bh *freebuf; /* each bh_req has a page allocated */ md_wait_queue_head_t wait_buffer; diff --git a/include/linux/serio.h b/include/linux/serio.h index 2232e06ac141..3619a866ec57 100644 --- a/include/linux/serio.h +++ b/include/linux/serio.h @@ -2,7 +2,7 @@ #define _SERIO_H /* - * $Id: serio.h,v 1.8 2000/07/17 10:42:14 vojtech Exp $ + * $Id: serio.h,v 1.11 2001/05/29 02:58:50 jsimmons Exp $ * * Copyright (C) 1999 Vojtech Pavlik * @@ -104,6 +104,10 @@ static __inline__ int serio_write(struct serio *serio, unsigned char data) #define SERIO_GUNZE 0x1c #define SERIO_IFORCE 0x1d #define SERIO_STINGER 0x1e +#define SERIO_NEWTON 0x1f +#define SERIO_STOWAWAY 0x20 +#define SERIO_H3600 0x21 +#define SERIO_PS2SER 0x22 #define SERIO_ID 0xff00UL #define SERIO_EXTRA 0xff0000UL diff --git a/include/linux/swap.h b/include/linux/swap.h index 4ad0da50e974..dd83dac6be0d 100644 --- a/include/linux/swap.h +++ b/include/linux/swap.h @@ -116,9 +116,7 @@ extern wait_queue_head_t kswapd_wait; extern wait_queue_head_t kreclaimd_wait; extern int page_launder(int, int); extern int free_shortage(void); -extern int total_free_shortage(void); extern int inactive_shortage(void); -extern int total_inactive_shortage(void); extern void wakeup_kswapd(void); extern int try_to_free_pages(unsigned int gfp_mask); diff --git a/include/net/irda/smc-ircc.h b/include/net/irda/smc-ircc.h index 0bd5e38b464a..f4af39082e86 100644 --- a/include/net/irda/smc-ircc.h +++ b/include/net/irda/smc-ircc.h @@ -154,22 +154,12 @@ #define IRCC_1152 0x80 #define IRCC_CRC 0x40 -struct smc_chip { - char *name; - unsigned char entr1; - unsigned char entr2; - unsigned char cid_index; - unsigned char cid_value; - int (*probe)(struct smc_chip *chip, chipio_t *info); -}; -typedef struct smc_chip smc_chip_t; - /* Private data for each instance */ struct ircc_cb { struct net_device *netdev; /* Yes! we are some kind of netdevice */ struct irlap_cb *irlap; /* The link layer we are binded to */ - chipio_t io; /* IrDA controller information */ + chipio_t *io; /* IrDA controller information */ iobuff_t tx_buff; /* Transmit buffer */ iobuff_t rx_buff; /* Receive buffer */ diff --git a/include/net/irda/vlsi_ir.h b/include/net/irda/vlsi_ir.h new file mode 100644 index 000000000000..6b8f7a3c125c --- /dev/null +++ b/include/net/irda/vlsi_ir.h @@ -0,0 +1,576 @@ + +/********************************************************************* + * + * vlsi_ir.h: VLSI82C147 PCI IrDA controller driver for Linux + * + * Version: 0.1, Aug 6, 2001 + * + * Copyright (c) 2001 Martin Diehl + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + ********************************************************************/ + +#ifndef IRDA_VLSI_FIR_H +#define IRDA_VLSI_FIR_H + +/* ================================================================ */ + +/* non-standard PCI registers */ + +enum vlsi_pci_regs { + VLSI_PCI_CLKCTL = 0x40, /* chip clock input control */ + VLSI_PCI_MSTRPAGE = 0x41, /* addr [31:24] for all busmaster cycles */ + VLSI_PCI_IRMISC = 0x42 /* mainly legacy UART related */ +}; + +/* ------------------------------------------ */ + +/* VLSI_PCI_CLKCTL: Clock Control Register (u8, rw) */ + +/* Three possible clock sources: either on-chip 48MHz PLL or + * external clock applied to EXTCLK pin. External clock may + * be either 48MHz or 40MHz, which is indicated by XCKSEL. + * CLKSTP controls whether the selected clock source gets + * connected to the IrDA block. + * + * On my HP OB-800 the BIOS sets external 40MHz clock as source + * when IrDA enabled and I've never detected any PLL lock success. + * Apparently the 14.31818MHz OSC input required for the PLL to work + * is not connected and the 40MHz EXTCLK is provided externally. + * At least this is what makes the driver working for me. + */ + +enum vlsi_pci_clkctl { + + /* PLL control */ + + CLKCTL_NO_PD = 0x04, /* PD# (inverted power down) signal, + * i.e. PLL is powered, if PD_INV is set */ + CLKCTL_LOCK = 0x40, /* (ro) set, if PLL is locked */ + + /* clock source selection */ + + CLKCTL_EXTCLK = 0x20, /* set to select external clock input */ + CLKCTL_XCKSEL = 0x10, /* set to indicate 40MHz EXTCLK, not 48MHz */ + + /* IrDA block control */ + + CLKCTL_CLKSTP = 0x80, /* set to disconnect from selected clock source */ + CLKCTL_WAKE = 0x08 /* set to enable wakeup feature: whenever IR activity + * is detected, PD_INV gets set and CLKSTP cleared */ +}; + +/* ------------------------------------------ */ + +/* VLSI_PCI_MSTRPAGE: Master Page Register (u8, rw) and busmastering stuff */ + +#define DMA_MASK_USED_BY_HW 0xffffffff +#define DMA_MASK_MSTRPAGE 0x00ffffff +#define MSTRPAGE_VALUE (DMA_MASK_MSTRPAGE >> 24) + + + /* PCI busmastering is somewhat special for this guy - in short: + * + * We select to operate using MSTRPAGE=0 fixed, use ISA DMA + * address restrictions to make the PCI BM api aware of this, + * but ensure the hardware is dealing with real 32bit access. + * + * In detail: + * The chip executes normal 32bit busmaster cycles, i.e. + * drives all 32 address lines. These addresses however are + * composed of [0:23] taken from various busaddr-pointers + * and [24:31] taken from the MSTRPAGE register in the VLSI82C147 + * config space. Therefore _all_ busmastering must be + * targeted to/from one single 16MB (busaddr-) superpage! + * The point is to make sure all the allocations for memory + * locations with busmaster access (ring descriptors, buffers) + * are indeed bus-mappable to the same 16MB range (for x86 this + * means they must reside in the same 16MB physical memory address + * range). The only constraint we have which supports "several objects + * mappable to common 16MB range" paradigma, is the old ISA DMA + * restriction to the first 16MB of physical address range. + * Hence the approach here is to enable PCI busmaster support using + * the correct 32bit dma-mask used by the chip. Afterwards the device's + * dma-mask gets restricted to 24bit, which must be honoured by all + * allocations for memory areas to be exposed to the chip. + * + * Note: + * Don't be surprised to get "Setting latency timer..." messages every + * time when PCI busmastering is enabled for the chip. + * The chip has its PCI latency timer RO fixed at 0 - which is not a + * problem here, because it is never requesting _burst_ transactions. + */ + +/* ------------------------------------------ */ + +/* VLSI_PCIIRMISC: IR Miscellaneous Register (u8, rw) */ + +/* leagcy UART emulation - not used by this driver - would require: + * (see below for some register-value definitions) + * + * - IRMISC_UARTEN must be set to enable UART address decoding + * - IRMISC_UARTSEL configured + * - IRCFG_MASTER must be cleared + * - IRCFG_SIR must be set + * - IRENABLE_IREN must be asserted 0->1 (and hence IRENABLE_SIR_ON) + */ + +enum vlsi_pci_irmisc { + + /* IR transceiver control */ + + IRMISC_IRRAIL = 0x40, /* (ro?) IR rail power indication (and control?) + * 0=3.3V / 1=5V. Probably set during power-on? + * Not touched by driver */ + IRMISC_IRPD = 0x08, /* transceiver power down, if set */ + + /* legacy UART control */ + + IRMISC_UARTTST = 0x80, /* UART test mode - "always write 0" */ + IRMISC_UARTEN = 0x04, /* enable UART address decoding */ + + /* bits [1:0] IRMISC_UARTSEL to select legacy UART address */ + + IRMISC_UARTSEL_3f8 = 0x00, + IRMISC_UARTSEL_2f8 = 0x01, + IRMISC_UARTSEL_3e8 = 0x02, + IRMISC_UARTSEL_2e8 = 0x03 +}; + + +/* ================================================================ */ + +/* registers mapped to 32 byte PCI IO space */ + +/* note: better access all registers at the indicated u8/u16 size + * although some of them contain only 1 byte of information. + * some of them (particaluarly PROMPT and IRCFG) ignore + * access when using the wrong addressing mode! + */ + +enum vlsi_pio_regs { + VLSI_PIO_IRINTR = 0x00, /* interrupt enable/request (u8, rw) */ + VLSI_PIO_RINGPTR = 0x02, /* rx/tx ring pointer (u16, ro) */ + VLSI_PIO_RINGBASE = 0x04, /* [23:10] of ring address (u16, rw) */ + VLSI_PIO_RINGSIZE = 0x06, /* rx/tx ring size (u16, rw) */ + VLSI_PIO_PROMPT = 0x08, /* triggers ring processing (u16, wo) */ + /* 0x0a-0x0f: reserved, duplicated UART regs */ + VLSI_PIO_IRCFG = 0x10, /* configuration select (u16, rw) */ + VLSI_PIO_SIRFLAG = 0x12, /* BOF/EOF for filtered SIR (u16, ro) */ + VLSI_PIO_IRENABLE = 0x14, /* enable and status register (u16, rw/ro) */ + VLSI_PIO_PHYCTL = 0x16, /* physical layer current status (u16, ro) */ + VLSI_PIO_NPHYCTL = 0x18, /* next physical layer select (u16, rw) */ + VLSI_PIO_MAXPKT = 0x1a, /* [11:0] max len for packet receive (u16, rw) */ + VLSI_PIO_RCVBCNT = 0x1c /* current receive-FIFO byte count (u16, ro) */ + /* 0x1e-0x1f: reserved, duplicated UART regs */ +}; + +/* ------------------------------------------ */ + +/* VLSI_PIO_IRINTR: Interrupt Register (u8, rw) */ + +/* enable-bits: + * 1 = enable / 0 = disable + * interrupt condition bits: + * set according to corresponding interrupt source + * (regardless of the state of the enable bits) + * enable bit status indicated whether interrupt gets raised + * write-to-clear + * note: RPKTINT and TPKTINT behave different in legacy UART mode (which we don't use :-) + */ + +enum vlsi_pio_irintr { + IRINTR_ACTEN = 0x80, /* activity interrupt enable */ + IRINTR_ACTIVITY = 0x40, /* activity monitor (traffic detected) */ + IRINTR_RPKTEN = 0x20, /* receive packet interrupt enable*/ + IRINTR_RPKTINT = 0x10, /* rx-packet transfered from fifo to memory finished */ + IRINTR_TPKTEN = 0x08, /* transmit packet interrupt enable */ + IRINTR_TPKTINT = 0x04, /* last bit of tx-packet+crc shifted to ir-pulser */ + IRINTR_OE_EN = 0x02, /* UART rx fifo overrun error interrupt enable */ + IRINTR_OE_INT = 0x01 /* UART rx fifo overrun error (read LSR to clear) */ +}; + +/* we use this mask to check whether the (shared PCI) interrupt is ours */ + +#define IRINTR_INT_MASK (IRINTR_ACTIVITY|IRINTR_RPKTINT|IRINTR_TPKTINT) + +/* ------------------------------------------ */ + +/* VLSI_PIO_RINGPTR: Ring Pointer Read-Back Register (u16, ro) */ + +#define MAX_RING_DESCR 64 /* tx, rx rings may contain up to 64 descr each */ + +/* _both_ ring pointers are indices relative to the _entire_ rx,tx-ring! + * i.e. the referenced descriptor is located + * at RINGBASE + PTR * sizeof(descr) for rx and tx + * therefore, the tx-pointer has offset by MAX_RING_DESCR + */ + +#define RINGPTR_RX_MASK (MAX_RING_DESCR-1) +#define RINGPTR_TX_MASK ((MAX_RING_DESCR|(MAX_RING_DESCR-1))<<8) + +#define RINGPTR_GET_RX(p) ((p)&RINGPTR_RX_MASK) +#define RINGPTR_GET_TX(p) (((p)&RINGPTR_TX_MASK)>>8) + +/* ------------------------------------------ */ + +/* VLSI_PIO_RINGBASE: Ring Pointer Base Address Register (u16, ro) */ + +/* Contains [23:10] part of the ring base (bus-) address + * which must be 1k-alinged. [31:24] is taken from + * VLSI_PCI_MSTRPAGE above. + * The controler initiates non-burst PCI BM cycles to + * fetch and update the descriptors in the ring. + * Once fetched, the descriptor remains cached onchip + * until it gets closed and updated due to the ring + * processing state machine. + * The entire ring area is split in rx and tx areas with each + * area consisting of 64 descriptors of 8 bytes each. + * The rx(tx) ring is located at ringbase+0 (ringbase+8*64). + */ + +#define BUS_TO_RINGBASE(p) (((p)>>10)&0x3fff) + +/* ------------------------------------------ */ + +/* VLSI_PIO_RINGSIZE: Ring Size Register (u16, rw) */ + +/* bit mask to indicate the ring size to be used for rx and tx. + * possible values encoded bits + * 4 0000 + * 8 0001 + * 16 0011 + * 32 0111 + * 64 1111 + * located at [15:12] for tx and [11:8] for rx ([7:0] unused) + * + * note: probably a good idea to have IRCFG_MSTR cleared when writing + * this so the state machines are stopped and the RINGPTR is reset! + */ + +#define SIZE_TO_BITS(num) ((((num)-1)>>2)&0x0f) +#define TX_RX_TO_RINGSIZE(tx,rx) ((SIZE_TO_BITS(tx)<<12)|(SIZE_TO_BITS(rx)<<8)) +#define RINGSIZE_TO_RXSIZE(rs) ((((rs)&0x0f00)>>6)+4) +#define RINGSIZE_TO_TXSIZE(rs) ((((rs)&0xf000)>>10)+4) + + +/* ------------------------------------------ */ + +/* VLSI_PIO_PROMPT: Ring Prompting Register (u16, write-to-start) */ + +/* writing any value kicks the ring processing state machines + * for both tx, rx rings. + * currently enabled rings (according to IRENABLE_ENTXST, IRENABLE_ENRXST + * status reporting - see below) are considered as follows: + * - active rings (currently owning an active descriptor) + * ignore the prompt and continue + * - idle rings fetch the next descr from the ring and start + * their processing + */ + +/* ------------------------------------------ */ + +/* VLSI_PIO_IRCFG: IR Config Register (u16, rw) */ + +/* notes: + * - not more than one SIR/MIR/FIR bit must be set at any time + * - SIR, MIR, FIR and CRC16 select the configuration which will + * be applied now/next time if/when IRENABLE_IREN is _cleared_ (see below) + * - besides allowing the PCI interface to execute busmaster cycles + * and therefore the ring SM to operate, the MSTR bit has side-effects: + * when MSTR is cleared, the RINGPTR's get reset and the legacy UART mode + * (in contrast to busmaster access mode) gets enabled. + * - clearing ENRX or setting ENTX while data is received may stall the + * receive fifo until ENRX reenabled _and_ another packet arrives + * - SIRFILT means the chip performs the required unwrapping of hardware + * headers (XBOF's, BOF/EOF) and un-escaping in the _receive_ direction. + * Only the resulting IrLAP payload is copied to the receive buffers - + * but with the 16bit FCS still encluded. Question remains, whether it + * was already checked or we should do it before passing the packet to IrLAP? + */ + +enum vlsi_pio_ircfg { + IRCFG_LOOP = 0x4000, /* enable loopback test mode */ + IRCFG_ENTX = 0x1000, /* transmit enable */ + IRCFG_ENRX = 0x0800, /* receive enable */ + IRCFG_MSTR = 0x0400, /* master enable */ + IRCFG_RXANY = 0x0200, /* receive any packet */ + IRCFG_CRC16 = 0x0080, /* 16bit (not 32bit) CRC select for MIR/FIR */ + IRCFG_FIR = 0x0040, /* FIR 4PPM encoding mode enable */ + IRCFG_MIR = 0x0020, /* MIR HDLC encoding mode enable */ + IRCFG_SIR = 0x0010, /* SIR encoding mode enable */ + IRCFG_SIRFILT = 0x0008, /* enable SIR decode filter (receiver unwrapping) */ + IRCFG_SIRTEST = 0x0004, /* allow SIR decode filter when not in SIR mode */ + IRCFG_TXPOL = 0x0002, /* invert tx polarity when set */ + IRCFG_RXPOL = 0x0001 /* invert rx polarity when set */ +}; + +/* ------------------------------------------ */ + +/* VLSI_PIO_SIRFLAG: SIR Flag Register (u16, ro) */ + +/* register contains hardcoded BOF=0xc0 at [7:0] and EOF=0xc1 at [15:8] + * which is used for unwrapping received frames in SIR decode-filter mode + */ + +/* ------------------------------------------ */ + +/* VLSI_PIO_IRENABLE: IR Enable Register (u16, rw/ro) */ + +/* notes: + * - IREN acts as gate for latching the configured IR mode information + * from IRCFG and IRPHYCTL when IREN=reset and applying them when + * IREN gets set afterwards. + * - ENTXST reflects IRCFG_ENTX + * - ENRXST = IRCFG_ENRX && (!IRCFG_ENTX || IRCFG_LOOP) + */ + +enum vlsi_pio_irenable { + IRENABLE_IREN = 0x8000, /* enable IR phy and gate mode config (rw) */ + IRENABLE_CFGER = 0x4000, /* mode configuration error (ro) */ + IRENABLE_FIR_ON = 0x2000, /* FIR on status (ro) */ + IRENABLE_MIR_ON = 0x1000, /* MIR on status (ro) */ + IRENABLE_SIR_ON = 0x0800, /* SIR on status (ro) */ + IRENABLE_ENTXST = 0x0400, /* transmit enable status (ro) */ + IRENABLE_ENRXST = 0x0200, /* Receive enable status (ro) */ + IRENABLE_CRC16_ON = 0x0100 /* 16bit (not 32bit) CRC enabled status (ro) */ +}; + +#define IRENABLE_MASK 0xff00 /* Read mask */ + + +/* ------------------------------------------ */ + +/* VLSI_PIO_PHYCTL: IR Physical Layer Current Control Register (u16, ro) */ + + +/* read-back of the currently applied physical layer status. + * applied from VLSI_PIO_NPHYCTL at rising edge of IRENABLE_IREN + * contents identical to VLSI_PIO_NPHYCTL (see below) + */ + + + +/* ------------------------------------------ */ + + +/* VLSI_PIO_NPHYCTL: IR Physical Layer Next Control Register (u16, rw) */ + +/* latched during IRENABLE_IREN=0 and applied at 0-1 transition + * + * consists of BAUD[15:10], PLSWID[9:5] and PREAMB[4:0] bits defined as follows: + * + * SIR-mode: BAUD = (115.2kHz / baudrate) - 1 + * PLSWID = (pulsetime * freq / (BAUD+1)) - 1 + * where pulsetime is the requested IrPHY pulse width + * and freq is 8(16)MHz for 40(48)MHz primary input clock + * PREAMB: dont care for SIR + * + * The nominal SIR pulse width is 3/16 bit time so we have PLSWID=12 + * fixed for all SIR speeds at 40MHz input clock (PLSWID=24 at 48MHz). + * IrPHY also allows shorter pulses down to the nominal pulse duration + * at 115.2kbaud (minus some tolerance) which is 1.41 usec. + * Using the expression PLSWID = 12/(BAUD+1)-1 (multiplied by to for 48MHz) + * we get the minimum acceptable PLSWID values according to the VLSI + * specification, which provides 1.5 usec pulse width for all speeds (except + * for 2.4kbaud getting 6usec). This is well inside IrPHY v1.3 specs and + * reduces the transceiver power which drains the battery. At 9.6kbaud for + * example this makes more than 90% battery power saving! + * + * MIR-mode: BAUD = 0 + * PLSWID = 9(10) for 40(48) MHz input clock + * to get nominal MIR pulse width + * PREAMB = 1 + * + * FIR-mode: BAUD = 0 + * PLSWID: dont care + * PREAMB = 15 + */ + +#define BWP_TO_PHYCTL(B,W,P) ((((B)&0x3f)<<10) | (((W)&0x1f)<<5) | (((P)&0x1f)<<0)) +#define BAUD_BITS(br) ((115200/br)-1) + +static inline unsigned +calc_width_bits(unsigned baudrate, unsigned widthselect, unsigned clockselect) +{ + unsigned tmp; + + if (widthselect) /* nominal 3/16 puls width */ + return (clockselect) ? 12 : 24; + + tmp = ((clockselect) ? 12 : 24) / (BAUD_BITS(baudrate)+1); + + /* intermediate result of integer division needed here */ + + return (tmp>0) ? (tmp-1) : 0; +} + + +#define PHYCTL_SIR(br,ws,cs) BWP_TO_PHYCTL(BAUD_BITS(br),calc_width_bits((br),(ws),(cs)),0) +#define PHYCTL_MIR(cs) BWP_TO_PHYCTL(0,((cs)?9:10),1) +#define PHYCTL_FIR BWP_TO_PHYCTL(0,0,15) + +/* quite ugly, I know. But implementing these calculations here avoids + * having magic numbers in the code and allows some playing with pulsewidths + * without risk to violate the standards. + * FWIW, here is the table for reference: + * + * baudrate BAUD min-PLSWID nom-PLSWID PREAMB + * 2400 47 0(0) 12(24) 0 + * 9600 11 0(0) 12(24) 0 + * 19200 5 1(2) 12(24) 0 + * 38400 2 3(6) 12(24) 0 + * 57600 1 5(10) 12(24) 0 + * 115200 0 11(22) 12(24) 0 + * MIR 0 - 9(10) 1 + * FIR 0 - 0 15 + * + * note: x(y) means x-value for 40MHz / y-value for 48MHz primary input clock + */ + +/* ------------------------------------------ */ + + +/* VLSI_PIO_MAXPKT: Maximum Packet Length register (u16, rw) */ + +/* specifies the maximum legth (up to 4096 bytes), which a + * received frame may have - i.e. the size of the corresponding + * receive buffers. For simplicity we use the same length for + * receive and submit buffers. Therefore we use 3k to have + * enough space for a lot of XBOF's and escapes we may need at + * some point when wrapping MTU=2048 sized packets for transmission. + */ + +#define MAX_PACKET_LENGTH 3172 + + +/* ------------------------------------------ */ + + +/* VLSI_PIO_RCVBCNT: Receive Byte Count Register (u16, ro) */ + +/* recive packet counter gets incremented on every non-filtered + * byte which was put in the receive fifo and reset for each + * new packet. Used to decide whether we are just in the middle + * of receiving receiving + */ + +#define RCVBCNT_MASK 0x0fff + +/* ================================================================ */ + + +/* descriptors for rx/tx ring + * + * accessed by hardware - don't change! + * + * the descriptor is owned by hardware, when the ACTIVE status bit + * is set and nothing (besides reading status to test the bit) + * shall be done. The bit gets cleared by hw, when the descriptor + * gets closed. Premature reaping of descriptors owned be the chip + * can be achieved by disabling IRCFG_MSTR + * + * Attention: Writing addr overwrites status! + * + * ### FIXME: we depend on endianess here + */ + +struct ring_descr { + volatile u16 rd_count; /* tx/rx count [11:0] */ + u16 reserved; + union { + u32 addr; /* [23:0] of the buffer's busaddress */ + struct { + u8 addr_res[3]; + volatile u8 status; /* descriptor status */ + } rd_s; + } rd_u; +}; + +#define rd_addr rd_u.addr +#define rd_status rd_u.rd_s.status + + +/* ring descriptor status bits */ + +#define RD_STAT_ACTIVE 0x80 /* descriptor owned by hw (both TX,RX) */ + +/* TX ring descriptor status */ + +#define TX_STAT_DISCRC 0x40 /* do not send CRC (for SIR) */ +#define TX_STAT_BADCRC 0x20 /* force a bad CRC */ +#define TX_STAT_PULSE 0x10 /* send indication pulse after this frame (MIR/FIR) */ +#define TX_STAT_FRCEUND 0x08 /* force underrun */ +#define TX_STAT_CLRENTX 0x04 /* clear ENTX after this frame */ +#define TX_STAT_UNDRN 0x01 /* TX fifo underrun (probably PCI problem) */ + +/* RX ring descriptor status */ + +#define RX_STAT_PHYERR 0x40 /* physical encoding error */ +#define RX_STAT_CRCERR 0x20 /* CRC error (MIR/FIR) */ +#define RX_STAT_LENGTH 0x10 /* frame exceeds buffer length */ +#define RX_STAT_OVER 0x08 /* RX fifo overrun (probably PCI problem) */ +#define RX_STAT_SIRBAD 0x04 /* EOF missing: BOF follows BOF (SIR, filtered) */ + + +#define RX_STAT_ERROR 0x7c /* any error in frame */ + + +/* ------------------------------------------ */ + +/* contains the objects we've put into the ring descriptors + * static buffers for now - probably skb's later + */ + +struct ring_entry { + struct sk_buff *skb; + void *head; +}; + +/* ------------------------------------------ */ + +/* our compound VLSI-PCI-IRDA device information */ + +typedef struct vlsi_irda_dev { + struct pci_dev *pdev; + struct net_device_stats stats; + + struct irlap_cb *irlap; + + struct qos_info qos; + + unsigned mode; + int baud, new_baud; + + dma_addr_t busaddr; + + struct ring_descr *ring_hw; + + struct ring_entry *ring_buf; + + unsigned tx_mask, rx_mask; + + unsigned tx_put, tx_get, rx_put, rx_get; + + spinlock_t lock; + +} vlsi_irda_dev_t; + +/********************************************************/ + +#endif /* IRDA_VLSI_FIR_H */ + |