[PATCH] mips: SGI IP22 updates

 o Remove old unused header files
 o Update the VINO video driver to something that's vaguely working
 o Bug fixes for the IP22 Zilog driver
 o Fix use of config.h

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

4 files changed, 13 insertions, 301 deletions

diff --git a/include/asm-mips/ng1.h b/include/asm-mips/ng1.h
deleted file mode 100644
index 8c980fed63a9..000000000000
--- a/include/asm-mips/ng1.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * SGI/Newport video card ioctl definitions
- */
-#ifndef _ASM_NG1_H
-#define _ASM_NG1_H
-
-typedef struct {
-        int flags;
-        __u16 w, h;
-        __u16 fields_sec;
-} ng1_vof_info_t;
-
-struct ng1_info {
-	struct gfx_info gfx_info;
-	__u8 boardrev;
-        __u8 rex3rev;
-        __u8 vc2rev;
-        __u8 monitortype;
-        __u8 videoinstalled;
-        __u8 mcrev;
-        __u8 bitplanes;
-        __u8 xmap9rev;
-        __u8 cmaprev;
-        ng1_vof_info_t ng1_vof_info;
-        __u8 bt445rev;
-        __u8 paneltype;
-};
-
-#define GFX_NAME_NEWPORT "NG1"
-
-/* ioctls */
-#define NG1_SET_CURSOR_HOTSPOT 21001
-struct ng1_set_cursor_hotspot {
-	unsigned short xhot;
-        unsigned short yhot;
-};
-
-#define NG1_SETDISPLAYMODE     21006
-struct ng1_setdisplaymode_args {
-        int wid;
-        unsigned int mode;
-};
-
-#define NG1_SETGAMMARAMP0      21007
-struct ng1_setgammaramp_args {
-        unsigned char red   [256];
-        unsigned char green [256];
-        unsigned char blue  [256];
-};
-
-#endif /* _ASM_NG1_H */
diff --git a/include/asm-mips/ng1hw.h b/include/asm-mips/ng1hw.h
deleted file mode 100644
index 8d34dc447444..000000000000
--- a/include/asm-mips/ng1hw.h
+++ /dev/null
@@ -1,219 +0,0 @@
-/*
- * ng1hw.h: Tweaks the newport.h structures and definitions to be compatible
- * 	    with IRIX.  Quite ugly, but it works.
- *
- * Copyright (C) 1999 Ulf Carlsson (ulfc@thepuffingroup.com)
- */
-#ifndef _SGI_NG1HW_H
-#define _SGI_NG1HW_H
-
-#include <video/newport.h>
-
-#define rex3regs	newport_rexregs
-#define configregs	newport_cregs
-#define float_long	npfreg_t
-
-typedef struct newport_rexregs Rex3regs;
-typedef struct newport_cregs Configregs;
-typedef union np_dcb DCB_reg;
-
-
-/* It looks like I can't do a simple tweak with this structure because the IRIX
- * version is just *too* stupid.  Ok, here's a new version of it..
- */
-
-struct rex3chip {
-	struct newport_rexregs set;
-	unsigned long _unused0[0x16e];
-	struct newport_rexregs go;
-	unsigned long _unused1[0x22e];
-	struct {
-		struct newport_cregs set;
-		unsigned long _unused2[0x1ef];
-		struct newport_cregs go;
-	} p1;
-};
-
-typedef struct rex3chip rex3Chip;
-typedef struct rex3chip Rex3chip;
-
-/* Tweak the defines .. */
-
-#define DM0_OPCODE		NPORT_DMODE0_OPMASK
-#define DM0_NOP			NPORT_DMODE0_NOP
-#define DM0_READ		NPORT_DMODE0_RD
-#define DM0_DRAW		NPORT_DMODE0_DRAW
-#define DM0_SCR2SCR		NPORT_DMODE0_S2S
-
-#define DM0_ADRMODE_SHIFT	2
-#define DM0_ADRMODE		NPORT_DMODE0_AMMASK
-#define DM0_SPAN		NPORT_DMODE0_SPAN
-#define DM0_BLOCK		NPORT_DMODE0_BLOCK
-#define DM0_ILINE		NPORT_DMODE0_ILINE
-#define DM0_FLINE		NPORT_DMODE0_FLINE
-#define DM0_ALINE		NPORT_DMODE0_ALINE
-#define DM0_TLINE		NPORT_DMODE0_TLINE
-#define DM0_BLINE               NPORT_DMODE0_BLINE
-
-#define DM0_DOSETUP		NPORT_DMODE0_DOSETUP
-#define DM0_COLORHOST		NPORT_DMODE0_CHOST
-#define DM0_ALPHAHOST		NPORT_DMODE0_AHOST
-#define DM0_STOPONX		NPORT_DMODE0_STOPX
-#define DM0_STOPONY		NPORT_DMODE0_STOPY
-#define DM0_STOPONXY		(NPORT_DMODE0_STOPX | NPORT_DMODE0_STOPY)
-#define DM0_SKIPFIRST		NPORT_DMODE0_SK1ST
-#define DM0_SKIPLAST		NPORT_DMODE0_SKLST
-#define DM0_ENZPATTERN		NPORT_DMODE0_ZPENAB
-#define DM0_ENLSPATTERN		NPORT_DMODE0_LISPENAB
-#define DM0_LSADVLAST		NPORT_DMODE0_LISLST
-#define DM0_LENGTH32		NPORT_DMODE0_L32
-#define DM0_ZOPAQUE		NPORT_DMODE0_ZOPQ
-#define DM0_LSOPAQUE		NPORT_DMODE0_LISOPQ
-#define DM0_SHADE		NPORT_DMODE0_SHADE
-#define DM0_LRONLY		NPORT_DMODE0_LRONLY
-#define DM0_XYOFFSET		NPORT_DMODE0_XYOFF
-#define DM0_CICLAMP		NPORT_DMODE0_CLAMP
-#define DM0_ENDPTFILTER		NPORT_DMODE0_ENDPF
-#define	DM0_YSTRIDE		NPORT_DMODE0_YSTR
-
-#define DM1_PLANES_SHIFT	0
-/* The rest of the DM1 planes defines are in newport.h */
-
-#define DM1_DRAWDEPTH_SHIFT	3
-#define DM1_DRAWDEPTH_MASK	NPORT_DMODE1_DDMASK
-#define DM1_DRAWDEPTH		NPORT_DMODE1_DD24 /* An alias? */
-#define DM1_DRAWDEPTH4		NPORT_DMODE1_DD4
-#define DM1_DRAWDEPTH8		NPORT_DMODE1_DD8
-#define DM1_DRAWDEPTH12		NPORT_DMODE1_DD12
-#define DM1_DRAWDEPTH24		NPORT_DMODE1_DD24
-
-#define DM1_DBLSRC		NPORT_DMODE1_DSRC
-#define DM1_YFLIP		NPORT_DMODE1_YFLIP
-#define DM1_RWPACKED		NPORT_DMODE1_RWPCKD
-
-#define DM1_HOSTDEPTH_SHIFT 	8
-#define DM1_HOSTDEPTH_MASK	NPORT_DMODE1_HDMASK
-#define DM1_HOSTDEPTH		NPORT_DMODE1_HD32 /* An alias? */
-#define DM1_HOSTDEPTH4		NPORT_DMODE1_HD4
-#define DM1_HOSTDEPTH8		NPORT_DMODE1_HD8
-#define DM1_HOSTDEPTH12		NPORT_DMODE1_HD12
-#define DM1_HOSTDEPTH32		NPORT_DMODE1_HD32
-
-#define DM1_RWDOUBLE		NPORT_DMODE1_RWDBL
-#define DM1_SWAPENDIAN		NPORT_DMODE1_ESWAP
-
-#define DM1_COLORCOMPARE_SHIFT	12
-#define DM1_COLORCOMPARE_MASK	NPORT_DMODE1_CCMASK
-#define DM1_COLORCOMPARE	NPORT_DMODE1_CCMASK
-#define DM1_COLORCOMPLT		NPORT_DMODE1_CCLT
-#define DM1_COLORCOMPEQ		NPORT_DMODE1_CCEQ
-#define DM1_COLORCOMPGT		NPORT_DMODE1_CCGT
-
-#define DM1_RGBMODE		NPORT_DMODE1_RGBMD
-#define DM1_ENDITHER		NPORT_DMODE1_DENAB
-#define DM1_FASTCLEAR		NPORT_DMODE1_FCLR
-#define DM1_ENBLEND		NPORT_DMODE1_BENAB
-
-#define DM1_SF_SHIFT		19
-#define DM1_SF_MASK   		NPORT_DMODE1_SFMASK
-#define DM1_SF			NPORT_DMODE1_SFMASK
-#define DM1_SF_ZERO		NPORT_DMODE1_SF0
-#define DM1_SF_ONE		NPORT_DMODE1_SF1
-#define DM1_SF_DC		NPORT_DMODE1_SFDC
-#define DM1_SF_MDC		NPORT_DMODE1_SFMDC
-#define DM1_SF_SA		NPORT_DMODE1_SFSA
-#define DM1_SF_MSA		NPORT_DMODE1_SFMSA
-
-#define DM1_DF_SHIFT		22	/* dfactor(2:0)	*/
-#define DM1_DF_MASK		NPORT_DMODE1_DFMASK
-#define DM1_DF			NPORT_DMODE1_DFMASK
-#define DM1_DF_ZERO		NPORT_DMODE1_DF0
-#define DM1_DF_ONE		NPORT_DMODE1_DF1
-#define DM1_DF_SC		NPORT_DMODE1_DFSC
-#define DM1_DF_MSC		NPORT_DMODE1_DFMSC
-#define DM1_DF_SA		NPORT_DMODE1_DFSA
-#define DM1_DF_MSA		NPORT_DMODE1_DFMSA
-
-#define DM1_ENBACKBLEND		NPORT_DMODE1_BBENAB
-#define DM1_ENPREFETCH		NPORT_DMODE1_PFENAB
-#define DM1_BLENDALPHA		NPORT_DMODE1_ABLEND
-
-#define DM1_LO_SHIFT		28
-#define DM1_LO			NPORT_DMODE1_LOMASK
-#define DM1_LO_MASK      	NPORT_DMODE1_LOMASK
-#define DM1_LO_ZERO		NPORT_DMODE1_LOZERO
-#define DM1_LO_AND		NPORT_DMODE1_LOAND
-#define DM1_LO_ANDR		NPORT_DMODE1_LOANDR
-#define DM1_LO_SRC		NPORT_DMODE1_LOSRC
-#define DM1_LO_ANDI		NPORT_DMODE1_LOANDI
-#define DM1_LO_DST		NPORT_DMODE1_LODST
-#define DM1_LO_XOR		NPORT_DMODE1_LOXOR
-#define DM1_LO_OR		NPORT_DMODE1_LOOR
-#define DM1_LO_NOR		NPORT_DMODE1_LONOR
-#define DM1_LO_XNOR		NPORT_DMODE1_LOXNOR
-#define DM1_LO_NDST		NPORT_DMODE1_LONDST
-#define DM1_LO_ORR		NPORT_DMODE1_LOORR
-#define DM1_LO_NSRC		NPORT_DMODE1_LONSRC
-#define DM1_LO_ORI		NPORT_DMODE1_LOORI
-#define DM1_LO_NAND		NPORT_DMODE1_LONAND
-#define DM1_LO_ONE		NPORT_DMODE1_LOONE
-
-#define SMASK0			NPORT_CMODE_SM0
-#define SMASK1			NPORT_CMODE_SM1
-#define SMASK2			NPORT_CMODE_SM2
-#define SMASK3			NPORT_CMODE_SM3
-#define SMASK4			NPORT_CMODE_SM4
-#define ALL_SMASKS		0x1f
-
-#define CM_CIDMATCH_SHIFT       9
-#define CM_CIDMATCH_MASK        NPORT_CMODE_CMSK
-
-#define REX3VERSION_MASK	NPORT_STAT_VERS
-#define GFXBUSY        		NPORT_STAT_GBUSY
-#define BACKBUSY        	NPORT_STAT_BBUSY
-#define VRINT           	NPORT_STAT_VRINT
-#define VIDEOINT        	NPORT_STAT_VIDINT
-#define GFIFO_LEVEL_SHIFT       7
-#define GFIFO_LEVEL_MASK        NPORT_STAT_GLMSK
-#define BFIFO_LEVEL_SHIFT       13
-#define BFIFO_LEVEL_MASK        NPORT_STAT_BLMSK
-#define BFIFO_INT        	NPORT_STAT_BFIRQ
-#define GFIFO_INT        	NPORT_STAT_GFIRQ
-
-#define GIO32MODE		NPORT_CFG_G32MD
-#define BUSWIDTH		NPORT_CFG_BWIDTH
-#define EXTREGXCVR		NPORT_CFG_ERCVR
-#define BFIFODEPTH_SHIFT	3
-#define BFIFODEPTH_MASK		NPORT_CFG_BDMSK
-#define BFIFOABOVEINT		NPORT_CFG_BFAINT
-#define GFIFODEPTH_SHIFT        8
-#define GFIFODEPTH_MASK		NPORT_CFG_GDMSK
-#define GFIFOABOVEINT		NPORT_CFG_GFAINT
-#define TIMEOUT_SHIFT		14
-#define TIMEOUT_MASK		NPORT_CFG_TOMSK
-#define VREFRESH_SHIFT		17
-#define VREFRESH_MASK		NPORT_CFG_VRMSK
-#define FB_TYPE			NPORT_CFG_FBTYP
-
-#define DCB_DATAWIDTH_MASK	(0x3)
-
-#define DCB_CRS_MASK		(0x7 << DCB_CRS_SHIFT)
-#define DCB_ADDR_MASK		(0xf << DCB_ADDR_SHIFT)
-#define DCB_CSWIDTH_MASK	(0x1f << DCB_CSWIDTH_SHIFT)
-#define DCB_CSHOLD_MASK		(0x1f << DCB_CSHOLD_SHIFT)
-#define DCB_CSSETUP_MASK	(0x1f << DCB_CSSETUP_SHIFT)
-
-#define DCB_SWAPENDIAN		(1 << 28)
-
-#define REX3WAIT(rex3)  while ((rex3)->p1.set.status & GFXBUSY)
-#define BFIFOWAIT(rex3)  while ((rex3)->p1.set.status & BACKBUSY)
-
-#define REX3_GIO_ADDR_0         0x1f0f0000
-#define REX3_GIO_ADDR_1         0x1f4f0000
-#define REX3_GIO_ADDR_2         0x1f8f0000
-#define REX3_GIO_ADDR_3         0x1fcf0000
-
-#define NG1_XSIZE		1280
-#define NG1_YSIZE		1024
-
-#endif
diff --git a/include/asm-mips/sgi/sgi.h b/include/asm-mips/sgi/sgi.h
index ace2b34df56f..645cea7c0f8e 100644
--- a/include/asm-mips/sgi/sgi.h
+++ b/include/asm-mips/sgi/sgi.h
@@ -28,8 +28,8 @@ enum sgi_mach {
 	ip26,	/* TFP UP, Indigo2 */
 	ip27,	/* R10k MP, R12k MP, Origin */
 	ip28,	/* R10k UP, Indigo2 */
-	ip30,
-	ip32,
+	ip30,	/* Octane */
+	ip32,	/* O2 */
 };
 
 extern enum sgi_mach sgimach;
diff --git a/include/video/newport.h b/include/video/newport.h
index f4d1fd7cdb76..812dac5b55f4 100644
--- a/include/video/newport.h
+++ b/include/video/newport.h
@@ -291,8 +291,6 @@ struct newport_regs {
 	unsigned int _unused2[0x1ef];
 	struct newport_cregs cgo;
 };
-extern struct newport_regs *npregs;
-
 
 typedef struct {
 	unsigned int drawmode1;
@@ -450,38 +448,26 @@ static __inline__ void newport_cmap_setrgb(struct newport_regs *regs,
 
 /* Miscellaneous NEWPORT routines. */
 #define BUSY_TIMEOUT 100000
-static __inline__ int newport_wait(void)
+static __inline__ int newport_wait(struct newport_regs *regs)
 {
-	int i = 0;
+	int t = BUSY_TIMEOUT;
 
-	while(i < BUSY_TIMEOUT)
-		if(!(npregs->cset.status & NPORT_STAT_GBUSY))
+	while (t--)
+		if (!(regs->cset.status & NPORT_STAT_GBUSY))
 			break;
-	if(i == BUSY_TIMEOUT)
-		return 1;
-	return 0;
+	return !t;
 }
 
-static __inline__ int newport_bfwait(void)
+static __inline__ int newport_bfwait(struct newport_regs *regs)
 {
-	int i = 0;
+	int t = BUSY_TIMEOUT;
 
-	while(i < BUSY_TIMEOUT)
-		if(!(npregs->cset.status & NPORT_STAT_BBUSY))
+	while (t--)
+		if(!(regs->cset.status & NPORT_STAT_BBUSY))
 			break;
-	if(i == BUSY_TIMEOUT)
-		return 1;
-	return 0;
+	return !t;
 }
 
-/* newport.c and cons_newport.c routines */
-extern struct graphics_ops *newport_probe (int, const char **);
-
-void newport_save    (void *);
-void newport_restore (void *);
-void newport_reset   (void);
-int  newport_ioctl   (int card, int cmd, unsigned long arg);
-
 /*
  * DCBMODE register defines:
  */
@@ -564,7 +550,7 @@ xmap9FIFOWait (struct newport_regs *rex)
 {
         rex->set.dcbmode = DCB_XMAP0 | XM9_CRS_FIFO_AVAIL |
 		DCB_DATAWIDTH_1 | R_DCB_XMAP9_PROTOCOL;
-        newport_bfwait ();
+        newport_bfwait (rex);
 	
         while ((rex->set.dcbdata0.bybytes.b3 & 3) != XM9_FIFO_EMPTY)
 		;