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authorJakub Kicinski <kuba@kernel.org>2025-09-29 18:57:43 -0700
committerJakub Kicinski <kuba@kernel.org>2025-09-29 18:57:43 -0700
commitc5cb31c99257aacd5cc2ff72a3b6f0c660046c9b (patch)
tree62051a47e9889f0c2e17904b084ac407cb70e23a /include
parent377ea331281f2c63dc281a6ea2dc318e4e1fc2d1 (diff)
parent9363b4837659d1b7ee04cfa714373ce4b4b8269f (diff)
Merge branch 'dpll-add-phase-offset-averaging-factor'
Ivan Vecera says: ==================== dpll: add phase offset averaging factor For some hardware, the phase shift may result from averaging previous values and the newly measured value. In this case, the averaging is controlled by a configurable averaging factor. Add new device level attribute phase-offset-avg-factor, appropriate callbacks and implement them in zl3073x driver. ==================== Link: https://patch.msgid.link/20250927084912.2343597-1-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/dpll.h6
-rw-r--r--include/uapi/linux/dpll.h1
2 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/dpll.h b/include/linux/dpll.h
index fa1e76920d0e..25be745bf41f 100644
--- a/include/linux/dpll.h
+++ b/include/linux/dpll.h
@@ -38,6 +38,12 @@ struct dpll_device_ops {
void *dpll_priv,
enum dpll_feature_state *state,
struct netlink_ext_ack *extack);
+ int (*phase_offset_avg_factor_set)(const struct dpll_device *dpll,
+ void *dpll_priv, u32 factor,
+ struct netlink_ext_ack *extack);
+ int (*phase_offset_avg_factor_get)(const struct dpll_device *dpll,
+ void *dpll_priv, u32 *factor,
+ struct netlink_ext_ack *extack);
};
struct dpll_pin_ops {
diff --git a/include/uapi/linux/dpll.h b/include/uapi/linux/dpll.h
index 37b438ce8efc..ab1725a954d7 100644
--- a/include/uapi/linux/dpll.h
+++ b/include/uapi/linux/dpll.h
@@ -216,6 +216,7 @@ enum dpll_a {
DPLL_A_LOCK_STATUS_ERROR,
DPLL_A_CLOCK_QUALITY_LEVEL,
DPLL_A_PHASE_OFFSET_MONITOR,
+ DPLL_A_PHASE_OFFSET_AVG_FACTOR,
__DPLL_A_MAX,
DPLL_A_MAX = (__DPLL_A_MAX - 1)