Merge bk://bkbits.ras.ucalgary.ca/rgooch-2.5

into home.transmeta.com:/home/torvalds/v2.5/linux

17 files changed, 135 insertions, 330 deletions

diff --git a/include/asm-arm/arch-ebsa285/keyboard.h b/include/asm-arm/arch-ebsa285/keyboard.h
index 968163b3f883..f47b43fe800c 100644
--- a/include/asm-arm/arch-ebsa285/keyboard.h
+++ b/include/asm-arm/arch-ebsa285/keyboard.h
@@ -6,63 +6,4 @@
  * Copyright (C) 1998-2001 Russell King
  * (C) 1998 Phil Blundell
  */
-#include <linux/config.h>
-#include <linux/ioport.h>
-#include <asm/irq.h>
-#include <asm/system.h>
-
-#define KEYBOARD_IRQ		IRQ_ISA_KEYBOARD
-#define NR_SCANCODES		128
-
-#define kbd_disable_irq()	do { } while (0)
-#define kbd_enable_irq()	do { } while (0)
-
-extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
-extern int pckbd_getkeycode(unsigned int scancode);
-extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
-			   char raw_mode);
-extern char pckbd_unexpected_up(unsigned char keycode);
-extern void pckbd_leds(unsigned char leds);
-extern void pckbd_init_hw(void);
-extern unsigned char pckbd_sysrq_xlate[128];
-
-static inline void kbd_init_hw(void)
-{
-	if (have_isa_bridge) {
-		k_setkeycode    = pckbd_setkeycode;
-		k_getkeycode    = pckbd_getkeycode;
-		k_translate     = pckbd_translate;
-		k_unexpected_up = pckbd_unexpected_up;
-		k_leds          = pckbd_leds;
-#ifdef CONFIG_MAGIC_SYSRQ
-		k_sysrq_key     = 0x54;
-		k_sysrq_xlate   = pckbd_sysrq_xlate;
-#endif
-		pckbd_init_hw();
-	}
-}
-
-
-/*
- * The rest of this file is to do with supporting pc_keyb.c
- */
-
-/* resource allocation */
-#define kbd_request_region()	request_region(0x60, 16, "keyboard")
-#define kbd_request_irq(handler) request_irq(KEYBOARD_IRQ, handler, 0, \
-					     "keyboard", NULL)
-
-/* How to access the keyboard macros on this platform.  */
-#define kbd_read_input() inb(KBD_DATA_REG)
-#define kbd_read_status() inb(KBD_STATUS_REG)
-#define kbd_write_output(val) outb(val, KBD_DATA_REG)
-#define kbd_write_command(val) outb(val, KBD_CNTL_REG)
-
-/* Some stoneage hardware needs delays after some operations.  */
-#define kbd_pause() do { } while(0)
-
-#define aux_request_irq(hand, dev_id)					\
-	request_irq(AUX_IRQ, hand, SA_SHIRQ, "PS/2 Mouse", dev_id)
-
-#define aux_free_irq(dev_id) free_irq(AUX_IRQ, dev_id)
-
+#define kbd_init_hw()		do { } while (0)
diff --git a/include/asm-arm/arch-integrator/keyboard.h b/include/asm-arm/arch-integrator/keyboard.h
index 48aab706c868..2ca4754586a9 100644
--- a/include/asm-arm/arch-integrator/keyboard.h
+++ b/include/asm-arm/arch-integrator/keyboard.h
@@ -17,13 +17,6 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  *
  *  Keyboard driver definitions for the Integrator architecture
+ *  Now using the input subsystem...
  */
-#include <asm/irq.h>
-
-#define NR_SCANCODES 128
-
-extern int kmi_kbd_init(void);
-
-#define kbd_disable_irq()	disable_irq(IRQ_KMIINT0)
-#define kbd_enable_irq()	enable_irq(IRQ_KMIINT0)
-#define kbd_init_hw()		kmi_kbd_init()
+#define kbd_init_hw()		do { } while (0)
diff --git a/include/asm-arm/arch-rpc/keyboard.h b/include/asm-arm/arch-rpc/keyboard.h
index 8aed4bd00fba..db187f96b1cc 100644
--- a/include/asm-arm/arch-rpc/keyboard.h
+++ b/include/asm-arm/arch-rpc/keyboard.h
@@ -8,13 +8,6 @@
  * published by the Free Software Foundation.
  *
  *  Keyboard driver definitions for RiscPC architecture
+ *  Now using the input subsystem...
  */
-#include <asm/irq.h>
-
-#define NR_SCANCODES 128
-
-extern int ps2kbd_init_hw(void);
-
-#define kbd_disable_irq()	disable_irq(IRQ_KEYBOARDRX)
-#define kbd_enable_irq()	enable_irq(IRQ_KEYBOARDRX)
-#define kbd_init_hw()		ps2kbd_init_hw()
+#define kbd_init_hw()		do { } while (0)
diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index f12446570ffd..8a505f6c3ed3 100644
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -13,8 +13,6 @@
 #define __ASM_ARCH_HARDWARE_H
 
 #include <linux/config.h>
-#include <asm/mach-types.h>
-
 
 /* Flushing areas */
 #define FLUSH_BASE_PHYS		0xe0000000	/* SA1100 zero bank */
diff --git a/include/asm-arm/arch-sa1100/keyboard.h b/include/asm-arm/arch-sa1100/keyboard.h
index aa7f317092e5..e2a0c0196bfc 100644
--- a/include/asm-arm/arch-sa1100/keyboard.h
+++ b/include/asm-arm/arch-sa1100/keyboard.h
@@ -8,21 +8,13 @@
 
 #include <linux/config.h>
 #include <asm/mach-types.h>
-#include <asm/arch/assabet.h>
 
-#define kbd_disable_irq()	do { } while(0)
-#define kbd_enable_irq()	do { } while(0)
-
-extern int sa1111_kbd_init_hw(void);
 extern void gc_kbd_init_hw(void);
 extern void smartio_kbd_init_hw(void);
 extern void cerf_kbd_init_hw(void);
 
 static inline void kbd_init_hw(void)
 {
-	if ((machine_is_assabet() && machine_has_neponset()) ||
-	    machine_is_graphicsmaster())
-		sa1111_kbd_init_hw();
 	if (machine_is_graphicsclient())
 		gc_kbd_init_hw();
 	if (machine_is_adsbitsy())
@@ -31,11 +23,6 @@ static inline void kbd_init_hw(void)
 	if (machine_is_cerf())
 		cerf_kbd_init_hw();
 #endif
-#ifdef CONFIG_SA1100_PT_SYSTEM3
-	/* TODO: add system 3 board specific functions here */
-	if (machine_is_pt_system3())
-		sa1111_kbd_init_hw();
-#endif
 }
 
 #endif  /* _SA1100_KEYBOARD_H */
diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h
index d1b48d65ff23..ba9e4b72d821 100644
--- a/include/asm-arm/atomic.h
+++ b/include/asm-arm/atomic.h
@@ -36,7 +36,7 @@ static inline void atomic_add(int i, volatile atomic_t *v)
 {
 	unsigned long flags;
 
-	local_save_flags_cli(flags);
+	local_irq_save(flags);
 	v->counter += i;
 	local_irq_restore(flags);
 }
@@ -45,7 +45,7 @@ static inline void atomic_sub(int i, volatile atomic_t *v)
 {
 	unsigned long flags;
 
-	local_save_flags_cli(flags);
+	local_irq_save(flags);
 	v->counter -= i;
 	local_irq_restore(flags);
 }
@@ -54,7 +54,7 @@ static inline void atomic_inc(volatile atomic_t *v)
 {
 	unsigned long flags;
 
-	local_save_flags_cli(flags);
+	local_irq_save(flags);
 	v->counter += 1;
 	local_irq_restore(flags);
 }
@@ -63,7 +63,7 @@ static inline void atomic_dec(volatile atomic_t *v)
 {
 	unsigned long flags;
 
-	local_save_flags_cli(flags);
+	local_irq_save(flags);
 	v->counter -= 1;
 	local_irq_restore(flags);
 }
@@ -73,7 +73,7 @@ static inline int atomic_dec_and_test(volatile atomic_t *v)
 	unsigned long flags;
 	int val;
 
-	local_save_flags_cli(flags);
+	local_irq_save(flags);
 	val = v->counter;
 	v->counter = val -= 1;
 	local_irq_restore(flags);
@@ -86,7 +86,7 @@ static inline int atomic_add_negative(int i, volatile atomic_t *v)
 	unsigned long flags;
 	int val;
 
-	local_save_flags_cli(flags);
+	local_irq_save(flags);
 	val = v->counter;
 	v->counter = val += i;
 	local_irq_restore(flags);
@@ -98,7 +98,7 @@ static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
 {
 	unsigned long flags;
 
-	local_save_flags_cli(flags);
+	local_irq_save(flags);
 	*addr &= ~mask;
 	local_irq_restore(flags);
 }
diff --git a/include/asm-arm/hardirq.h b/include/asm-arm/hardirq.h
index c96c7a390692..0e6a5492e1e4 100644
--- a/include/asm-arm/hardirq.h
+++ b/include/asm-arm/hardirq.h
@@ -17,27 +17,70 @@ typedef struct {
 #include <linux/irq_cpustat.h>	/* Standard mappings for irq_cpustat_t above */
 
 /*
- * Are we in an interrupt context? Either doing bottom half
- * or hardware interrupt processing?
+ * We put the hardirq and softirq counter into the preemption
+ * counter.  The bitmask has the following meaning:
+ *
+ * - bits 0-7 are the preemption count (max depth: 256)
+ * - bits 8-15 are the softirq count (max # of softirqs: 256)
+ * - bits 16-23 are the hardirq count (max # of hardirqs: 256)
+ * - bit 26 is the PREEMPT_ACTIVE flag
  */
-#define in_interrupt() ({ const int __cpu = smp_processor_id(); \
-	(local_irq_count(__cpu) + local_bh_count(__cpu) != 0); })
+#define PREEMPT_BITS	8
+#define SOFTIRQ_BITS	8
+#define HARDIRQ_BITS	8
 
-#define in_irq() (local_irq_count(smp_processor_id()) != 0)
+#define PREEMPT_SHIFT	0
+#define SOFTIRQ_SHIFT	(PREEMPT_SHIFT + PREEMPT_BITS)
+#define HARDIRQ_SHIFT	(SOFTIRQ_SHIFT + SOFTIRQ_BITS)
 
-#ifndef CONFIG_SMP
+#define __MASK(x)	((1UL << (x))-1)
+
+#define PREEMPT_MASK	(__MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
+#define HARDIRQ_MASK	(__MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
+#define SOFTIRQ_MASK	(__MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
+
+#define hardirq_count()	(preempt_count() & HARDIRQ_MASK)
+#define softirq_count()	(preempt_count() & SOFTIRQ_MASK)
+#define irq_count()	(preempt_count() & (HARDIRQ_MASK|SOFTIRQ_MASK))
 
-#define hardirq_trylock(cpu)	(local_irq_count(cpu) == 0)
-#define hardirq_endlock(cpu)	do { } while (0)
+#define PREEMPT_OFFSET	(1UL << PREEMPT_SHIFT)
+#define SOFTIRQ_OFFSET	(1UL << SOFTIRQ_SHIFT)
+#define HARDIRQ_OFFSET	(1UL << HARDIRQ_SHIFT)
 
-#define irq_enter(cpu,irq)	(local_irq_count(cpu)++)
-#define irq_exit(cpu,irq)	(local_irq_count(cpu)--)
+/*
+ * The hardirq mask has to be large enough to have space
+ * for potentially all IRQ sources in the system nesting
+ * on a single CPU:
+ */
+#if (1 << HARDIRQ_BITS) < NR_IRQS
+# error HARDIRQ_BITS is too low!
+#endif
 
-#define synchronize_irq()	do { } while (0)
-#define release_irqlock(cpu)	do { } while (0)
+/*
+ * Are we doing bottom half or hardware interrupt processing?
+ * Are we in a softirq context? Interrupt context?
+ */
+#define in_irq()		(hardirq_count())
+#define in_softirq()		(softirq_count())
+#define in_interrupt()		(irq_count())
+
+#define hardirq_trylock()	(!in_interrupt())
+#define hardirq_endlock()	do { } while (0)
+
+#define irq_enter()		(preempt_count() += HARDIRQ_OFFSET)
+
+#ifndef CONFIG_SMP
+#define irq_exit()							\
+	do {								\
+		preempt_count() -= HARDIRQ_OFFSET;			\
+		if (!in_interrupt() && softirq_pending(smp_processor_id())) \
+			__asm__("bl%? __do_softirq": : : "lr");/* out of line */\
+		preempt_enable_no_resched();				\
+	} while (0)
 
+#define synchronize_irq(irq)	barrier()
 #else
 #error SMP not supported
-#endif /* CONFIG_SMP */
+#endif
 
 #endif /* __ASM_HARDIRQ_H */
diff --git a/include/asm-arm/hardware/sa1111.h b/include/asm-arm/hardware/sa1111.h
index a6ef00569bc6..f00889d5976c 100644
--- a/include/asm-arm/hardware/sa1111.h
+++ b/include/asm-arm/hardware/sa1111.h
@@ -529,120 +529,31 @@
  *
  */
 
-#define _KBD( x )   _SA1111( 0x0A00 )
-#define _MSE( x )   _SA1111( 0x0C00 )
-
-#define _KBDCR	    _SA1111( 0x0A00 )
-#define _KBDSTAT    _SA1111( 0x0A04 )
-#define _KBDDATA    _SA1111( 0x0A08 )
-#define _KBDCLKDIV  _SA1111( 0x0A0C )
-#define _KBDPRECNT  _SA1111( 0x0A10 )
-#define _MSECR	    _SA1111( 0x0C00 )
-#define _MSESTAT    _SA1111( 0x0C04 )
-#define _MSEDATA    _SA1111( 0x0C08 )
-#define _MSECLKDIV  _SA1111( 0x0C0C )
-#define _MSEPRECNT  _SA1111( 0x0C10 )
-
-#if ( LANGUAGE == C )
-
-#define KBDCR		__CCREG(0x0a00)
-#define KBDSTAT		__CCREG(0x0a04)
-#define KBDDATA		__CCREG(0x0a08)
-#define KBDCLKDIV	__CCREG(0x0a0c)
-#define KBDPRECNT	__CCREG(0x0a10)
-#define MSECR		__CCREG(0x0c00)
-#define MSESTAT		__CCREG(0x0c04)
-#define MSEDATA		__CCREG(0x0c08)
-#define MSECLKDIV	__CCREG(0x0c0c)
-#define MSEPRECNT	__CCREG(0x0c10)
-
-#define KBDCR_ENA        0x08
-#define KBDCR_FKD        0x02
-#define KBDCR_FKC        0x01
-
-#define KBDSTAT_TXE      0x80
-#define KBDSTAT_TXB      0x40
-#define KBDSTAT_RXF      0x20
-#define KBDSTAT_RXB      0x10
-#define KBDSTAT_ENA      0x08
-#define KBDSTAT_RXP      0x04
-#define KBDSTAT_KBD      0x02
-#define KBDSTAT_KBC      0x01
-
-#define KBDCLKDIV_DivVal     Fld(4,0)
-
-#define MSECR_ENA        0x08
-#define MSECR_FKD        0x02
-#define MSECR_FKC        0x01
-
-#define MSESTAT_TXE      0x80
-#define MSESTAT_TXB      0x40
-#define MSESTAT_RXF      0x20
-#define MSESTAT_RXB      0x10
-#define MSESTAT_ENA      0x08
-#define MSESTAT_RXP      0x04
-#define MSESTAT_MSD      0x02
-#define MSESTAT_MSC      0x01
-
-#define MSECLKDIV_DivVal     Fld(4,0)
-
-#define KBDTEST1_CD      0x80
-#define KBDTEST1_RC1         0x40
-#define KBDTEST1_MC      0x20
-#define KBDTEST1_C       Fld(2,3)
-#define KBDTEST1_T2      0x40
-#define KBDTEST1_T1      0x20
-#define KBDTEST1_T0      0x10
-#define KBDTEST2_TICBnRES    0x08
-#define KBDTEST2_RKC         0x04
-#define KBDTEST2_RKD         0x02
-#define KBDTEST2_SEL         0x01
-#define KBDTEST3_ms_16       0x80
-#define KBDTEST3_us_64       0x40
-#define KBDTEST3_us_16       0x20
-#define KBDTEST3_DIV8        0x10
-#define KBDTEST3_DIn         0x08
-#define KBDTEST3_CIn         0x04
-#define KBDTEST3_KD      0x02
-#define KBDTEST3_KC      0x01
-#define KBDTEST4_BC12        0x80
-#define KBDTEST4_BC11        0x40
-#define KBDTEST4_TRES        0x20
-#define KBDTEST4_CLKOE       0x10
-#define KBDTEST4_CRES        0x08
-#define KBDTEST4_RXB         0x04
-#define KBDTEST4_TXB         0x02
-#define KBDTEST4_SRX         0x01
-
-#define MSETEST1_CD      0x80
-#define MSETEST1_RC1         0x40
-#define MSETEST1_MC      0x20
-#define MSETEST1_C       Fld(2,3)
-#define MSETEST1_T2      0x40
-#define MSETEST1_T1      0x20
-#define MSETEST1_T0      0x10
-#define MSETEST2_TICBnRES    0x08
-#define MSETEST2_RKC         0x04
-#define MSETEST2_RKD         0x02
-#define MSETEST2_SEL         0x01
-#define MSETEST3_ms_16       0x80
-#define MSETEST3_us_64       0x40
-#define MSETEST3_us_16       0x20
-#define MSETEST3_DIV8        0x10
-#define MSETEST3_DIn         0x08
-#define MSETEST3_CIn         0x04
-#define MSETEST3_KD      0x02
-#define MSETEST3_KC      0x01
-#define MSETEST4_BC12        0x80
-#define MSETEST4_BC11        0x40
-#define MSETEST4_TRES        0x20
-#define MSETEST4_CLKOE       0x10
-#define MSETEST4_CRES        0x08
-#define MSETEST4_RXB         0x04
-#define MSETEST4_TXB         0x02
-#define MSETEST4_SRX         0x01
+#define SA1111_KBD		0x0a00
+#define SA1111_MSE		0x0c00
 
-#endif  /* LANGUAGE == C */
+/*
+ * These are offsets from the above bases.
+ */
+#define SA1111_PS2CR		0x0000
+#define SA1111_PS2STAT		0x0004
+#define SA1111_PS2DATA		0x0008
+#define SA1111_PS2CLKDIV	0x000c
+#define SA1111_PS2PRECNT	0x0010
+
+#define PS2CR_ENA		0x08
+#define PS2CR_FKD		0x02
+#define PS2CR_FKC		0x01
+
+#define PS2STAT_STP		0x0100
+#define PS2STAT_TXE		0x0080
+#define PS2STAT_TXB		0x0040
+#define PS2STAT_RXF		0x0020
+#define PS2STAT_RXB		0x0010
+#define PS2STAT_ENA		0x0008
+#define PS2STAT_RXP		0x0004
+#define PS2STAT_KBD		0x0002
+#define PS2STAT_KBC		0x0001
 
 /*
  * PCMCIA Interface
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 21ca5ae0b847..ebaef59d788a 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -29,6 +29,13 @@
 #include <asm/arch/hardware.h>
 
 /*
+ * ISA I/O bus memory addresses are 1:1 with the physical address.
+ */
+#define isa_virt_to_bus virt_to_phys
+#define isa_page_to_bus page_to_phys
+#define isa_bus_to_virt phys_to_virt
+
+/*
  * Generic IO read/write.  These perform native-endian accesses.  Note
  * that some architectures will want to re-define __raw_{read,write}w.
  */
diff --git a/include/asm-arm/proc-armv/rmap.h b/include/asm-arm/proc-armv/rmap.h
deleted file mode 100644
index f775d26eea88..000000000000
--- a/include/asm-arm/proc-armv/rmap.h
+++ /dev/null
@@ -1,51 +0,0 @@
-#ifndef _ARMV_RMAP_H
-#define _ARMV_RMAP_H
-/*
- * linux/include/asm-arm/proc-armv/rmap.h
- *
- * Architecture dependant parts of the reverse mapping code,
- *
- * ARM is different since hardware page tables are smaller than
- * the page size and Linux uses a "duplicate" one with extra info.
- * For rmap this means that the first 2 kB of a page are the hardware
- * page tables and the last 2 kB are the software page tables.
- */
-
-static inline void pgtable_add_rmap(pte_t * ptep, struct mm_struct * mm, unsigned long address)
-{
-	struct page * page = virt_to_page(ptep);
-
-	page->mm = mm;
-	page->index = address & ~((PTRS_PER_PTE * PAGE_SIZE) - 1);
-	inc_page_state(nr_page_table_pages);
-}
-
-static inline void pgtable_remove_rmap(pte_t * ptep)
-{
-	struct page * page = virt_to_page(ptep);
-
-	page->mm = NULL;
-	page->index = 0;
-	dec_page_state(nr_page_table_pages);
-}
-
-static inline struct mm_struct * ptep_to_mm(pte_t * ptep)
-{
-	struct page * page = virt_to_page(ptep);
-
-	return page->mm;
-}
-
-/* The page table takes half of the page */
-#define PTE_MASK  ((PAGE_SIZE / 2) - 1)
-
-static inline unsigned long ptep_to_address(pte_t * ptep)
-{
-	struct page * page = virt_to_page(ptep);
-	unsigned long low_bits;
-
-	low_bits = ((unsigned long)ptep & PTE_MASK) * PTRS_PER_PTE;
-	return page->index + low_bits;
-}
-
-#endif /* _ARMV_RMAP_H */
diff --git a/include/asm-arm/proc-armv/system.h b/include/asm-arm/proc-armv/system.h
index d9647dc39f6a..e95668d52510 100644
--- a/include/asm-arm/proc-armv/system.h
+++ b/include/asm-arm/proc-armv/system.h
@@ -43,17 +43,23 @@ extern unsigned long cr_alignment;	/* defined in entry-armv.S */
 #endif
 
 /*
- * A couple of speedups for the ARM
+ * Save the current interrupt enable state.
  */
+#define local_save_flags(x)					\
+	({							\
+	__asm__ __volatile__(					\
+	"mrs	%0, cpsr		@ local_save_flags"	\
+	: "=r" (x) : : "memory");				\
+	})
 
 /*
  * Save the current interrupt enable state & disable IRQs
  */
-#define local_save_flags_cli(x)					\
+#define local_irq_save(x)					\
 	({							\
 		unsigned long temp;				\
 	__asm__ __volatile__(					\
-	"mrs	%0, cpsr		@ save_flags_cli\n"	\
+	"mrs	%0, cpsr		@ local_irq_save\n"	\
 "	orr	%1, %0, #128\n"					\
 "	msr	cpsr_c, %1"					\
 	: "=r" (x), "=r" (temp)					\
@@ -64,11 +70,11 @@ extern unsigned long cr_alignment;	/* defined in entry-armv.S */
 /*
  * Enable IRQs
  */
-#define local_irq_enable()							\
+#define local_irq_enable()					\
 	({							\
 		unsigned long temp;				\
 	__asm__ __volatile__(					\
-	"mrs	%0, cpsr		@ sti\n"		\
+	"mrs	%0, cpsr		@ local_irq_enable\n"	\
 "	bic	%0, %0, #128\n"					\
 "	msr	cpsr_c, %0"					\
 	: "=r" (temp)						\
@@ -79,11 +85,11 @@ extern unsigned long cr_alignment;	/* defined in entry-armv.S */
 /*
  * Disable IRQs
  */
-#define local_irq_disable()							\
+#define local_irq_disable()					\
 	({							\
 		unsigned long temp;				\
 	__asm__ __volatile__(					\
-	"mrs	%0, cpsr		@ cli\n"		\
+	"mrs	%0, cpsr		@ local_irq_disable\n"	\
 "	orr	%0, %0, #128\n"					\
 "	msr	cpsr_c, %0"					\
 	: "=r" (temp)						\
@@ -122,21 +128,11 @@ extern unsigned long cr_alignment;	/* defined in entry-armv.S */
 	})
 
 /*
- * save current IRQ & FIQ state
- */
-#define local_save_flags(x)						\
-	__asm__ __volatile__(					\
-	"mrs	%0, cpsr		@ save_flags\n"		\
-	  : "=r" (x)						\
-	  :							\
-	  : "memory")
-
-/*
  * restore saved IRQ & FIQ state
  */
 #define local_irq_restore(x)					\
 	__asm__ __volatile__(					\
-	"msr	cpsr_c, %0		@ restore_flags\n"	\
+	"msr	cpsr_c, %0		@ local_irq_restore\n"	\
 	:							\
 	: "r" (x)						\
 	: "memory")
@@ -168,14 +164,14 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
 	switch (size) {
 #ifdef swp_is_buggy
 		case 1:
-			local_save_flags_cli(flags);
+			local_irq_save(flags);
 			ret = *(volatile unsigned char *)ptr;
 			*(volatile unsigned char *)ptr = x;
 			local_irq_restore(flags);
 			break;
 
 		case 4:
-			local_save_flags_cli(flags);
+			local_irq_save(flags);
 			ret = *(volatile unsigned long *)ptr;
 			*(volatile unsigned long *)ptr = x;
 			local_irq_restore(flags);
diff --git a/include/asm-arm/rmap.h b/include/asm-arm/rmap.h
index d79cb373829b..bb9ee93c1796 100644
--- a/include/asm-arm/rmap.h
+++ b/include/asm-arm/rmap.h
@@ -1,6 +1,6 @@
 #ifndef _ARM_RMAP_H
 #define _ARM_RMAP_H
 
-#include <asm/proc/rmap.h>
+#include <asm-generic/rmap.h>
 
 #endif /* _ARM_RMAP_H */
diff --git a/include/asm-arm/softirq.h b/include/asm-arm/softirq.h
index 6653175f53d8..3dfcdb13ecaf 100644
--- a/include/asm-arm/softirq.h
+++ b/include/asm-arm/softirq.h
@@ -1,26 +1,20 @@
 #ifndef __ASM_SOFTIRQ_H
 #define __ASM_SOFTIRQ_H
 
-#include <asm/atomic.h>
+#include <linux/preempt.h>
 #include <asm/hardirq.h>
 
-#define __cpu_bh_enable(cpu) \
-		do { barrier(); local_bh_count(cpu)--; preempt_enable(); } while (0)
-#define cpu_bh_disable(cpu) \
-		do { preempt_disable(); local_bh_count(cpu)++; barrier(); } while (0)
+#define local_bh_disable() \
+	do { preempt_count() += SOFTIRQ_OFFSET; barrier(); } while (0)
+#define __local_bh_enable() \
+	do { barrier(); preempt_count() -= SOFTIRQ_OFFSET; } while (0)
 
-#define local_bh_disable()	cpu_bh_disable(smp_processor_id())
-#define __local_bh_enable()	__cpu_bh_enable(smp_processor_id())
-
-#define in_softirq()		(local_bh_count(smp_processor_id()) != 0)
-
-#define _local_bh_enable()						\
+#define local_bh_enable()						\
 do {									\
-	unsigned int *ptr = &local_bh_count(smp_processor_id());	\
-	if (!--*ptr && ptr[-2])						\
+	__local_bh_enable();						\
+	if (unlikely(!in_interrupt() && softirq_pending(smp_processor_id()))) \
 		__asm__("bl%? __do_softirq": : : "lr");/* out of line */\
+	preempt_check_resched();					\
 } while (0)
 
-#define local_bh_enable() do { _local_bh_enable(); preempt_enable(); } while (0)
-
 #endif	/* __ASM_SOFTIRQ_H */
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index f110ae2eb76b..25b6975fbceb 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -64,20 +64,12 @@ extern asmlinkage void __backtrace(void);
 struct thread_info;
 extern struct task_struct *__switch_to(struct thread_info *, struct thread_info *);
 
-#define prepare_arch_schedule(prev)		do { } while(0)
-#define finish_arch_schedule(prev)		do { } while(0)
-#define prepare_arch_switch(rq)			do { } while(0)
-#define finish_arch_switch(rq)			spin_unlock_irq(&(rq)->lock)
-
 #define switch_to(prev,next,last)					\
 	do {			 					\
 		__switch_to(prev->thread_info,next->thread_info);	\
 		mb();							\
 	} while (0)
 
-/* For spinlocks etc */
-#define local_irq_save(x)	local_save_flags_cli(x)
-
 #ifdef CONFIG_SMP
 #error SMP not supported
 
@@ -91,12 +83,8 @@ extern struct task_struct *__switch_to(struct thread_info *, struct thread_info
 #define smp_rmb()		barrier()
 #define smp_wmb()		barrier()
 
-#define cli()			local_irq_disable()
-#define sti()			local_irq_enable()
 #define clf()			__clf()
 #define stf()			__stf()
-#define save_flags(x)		local_save_flags(x)
-#define restore_flags(x)	local_irq_restore(x)
 
 #endif /* CONFIG_SMP */
 
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 5099b9f382e0..c5f593251536 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -567,6 +567,8 @@ int pci_write_config_byte(struct pci_dev *dev, int where, u8 val);
 int pci_write_config_word(struct pci_dev *dev, int where, u16 val);
 int pci_write_config_dword(struct pci_dev *dev, int where, u32 val);
 
+extern spinlock_t pci_lock;
+
 int pci_enable_device(struct pci_dev *dev);
 void pci_disable_device(struct pci_dev *dev);
 void pci_set_master(struct pci_dev *dev);
diff --git a/include/linux/security.h b/include/linux/security.h
index 156e9ddce632..34fd73a0fed2 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -407,7 +407,6 @@ struct swap_info_struct;
  *	@file contains the file structure.
  *	@cmd contains the posix-translated lock operation to perform
  *	(e.g. F_RDLCK, F_WRLCK).
- *	@blocking indicates if the request is for a blocking lock.
  *	Return 0 if permission is granted.
  * @file_fcntl:
  *	Check permission before allowing the file operation specified by @cmd
@@ -753,7 +752,7 @@ struct security_operations {
 	int (*file_mmap) (struct file * file,
 			  unsigned long prot, unsigned long flags);
 	int (*file_mprotect) (struct vm_area_struct * vma, unsigned long prot);
-	int (*file_lock) (struct file * file, unsigned int cmd, int blocking);
+	int (*file_lock) (struct file * file, unsigned int cmd);
 	int (*file_fcntl) (struct file * file, unsigned int cmd,
 			   unsigned long arg);
 	int (*file_set_fowner) (struct file * file);
diff --git a/include/linux/smp.h b/include/linux/smp.h
index 454fdcdf14d2..df77d136f5e2 100644
--- a/include/linux/smp.h
+++ b/include/linux/smp.h
@@ -101,9 +101,13 @@ static inline void smp_send_reschedule_all(void) { }
 #define this_cpu(var)				var
 
 /* Need to know about CPUs going up/down? */
-#define register_cpu_notifier(nb) 0
-#define unregister_cpu_notifier(nb) do { } while(0)
-
+static inline int register_cpu_notifier(struct notifier_block *nb)
+{
+	return 0;
+}
+static inline void unregister_cpu_notifier(struct notifier_block *nb)
+{
+}
 #endif /* !SMP */
 
 #define get_cpu()		({ preempt_disable(); smp_processor_id(); })