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authorMartin J. Bligh <mbligh@aracnet.com>2002-12-22 18:19:35 -0800
committerPatrick Mochel <mochel@osdl.org>2002-12-22 18:19:35 -0800
commitdf0e5a8ffcb7fb0bfe7ef38e2be8bec869efc629 (patch)
treefce812f22b8f34a0a48123eed1c1e217a89baa73 /include
parent172a3ef7e144207eeae4e31056ab08fd87962485 (diff)
[PATCH] abstract out clustered APIC code
Code originally by James Cleverdon. This abstracts out some sections that were switched by clustered_apic_mode into the following functions: - apic_id_registered() - init_apic_ldr() - multi_timer_check() Changes the return check in balance_irq from testing clustered_apic_mode to testing "no_balance_irq" to be more general. The removal of: entry.dest.logical.logical_dest = TARGET_CPUS; is because it's a duplicate (we do it twice in the same function for no reason).
Diffstat (limited to 'include')
-rw-r--r--include/asm-i386/mach-default/mach_apic.h38
-rw-r--r--include/asm-i386/mach-numaq/mach_apic.h25
2 files changed, 47 insertions, 16 deletions
diff --git a/include/asm-i386/mach-default/mach_apic.h b/include/asm-i386/mach-default/mach_apic.h
index 9b1e59a7df5e..b527dcdc68f7 100644
--- a/include/asm-i386/mach-default/mach_apic.h
+++ b/include/asm-i386/mach-default/mach_apic.h
@@ -1,14 +1,6 @@
#ifndef __ASM_MACH_APIC_H
#define __ASM_MACH_APIC_H
-static inline unsigned long calculate_ldr(unsigned long old)
-{
- unsigned long id;
-
- id = 1UL << smp_processor_id();
- return ((old & ~APIC_LDR_MASK) | SET_APIC_LOGICAL_ID(id));
-}
-
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#ifdef CONFIG_SMP
@@ -17,6 +9,8 @@ static inline unsigned long calculate_ldr(unsigned long old)
#define TARGET_CPUS 0x01
#endif
+#define no_balance_irq (0)
+
#define APIC_BROADCAST_ID 0x0F
#define check_apicid_used(bitmap, apicid) (bitmap & (1 << apicid))
@@ -24,12 +18,40 @@ static inline void summit_check(char *oem, char *productid)
{
}
+static inline int apic_id_registered(void)
+{
+ return (test_bit(GET_APIC_ID(apic_read(APIC_ID)),
+ &phys_cpu_present_map));
+}
+
+/*
+ * Set up the logical destination ID.
+ *
+ * Intel recommends to set DFR, LDR and TPR before enabling
+ * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
+ * document number 292116). So here it goes...
+ */
+static inline void init_apic_ldr(void)
+{
+ unsigned long val;
+
+ apic_write_around(APIC_DFR, APIC_DFR_VALUE);
+ val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+ val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
+ apic_write_around(APIC_LDR, val);
+}
+
static inline void clustered_apic_check(void)
{
printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
"Flat", nr_ioapics);
}
+static inline int multi_timer_check(int apic, int irq)
+{
+ return 0;
+}
+
static inline int cpu_present_to_apicid(int mps_cpu)
{
return mps_cpu;
diff --git a/include/asm-i386/mach-numaq/mach_apic.h b/include/asm-i386/mach-numaq/mach_apic.h
index 77c7317d26fd..82a4a7fae61d 100644
--- a/include/asm-i386/mach-numaq/mach_apic.h
+++ b/include/asm-i386/mach-numaq/mach_apic.h
@@ -1,18 +1,12 @@
#ifndef __ASM_MACH_APIC_H
#define __ASM_MACH_APIC_H
-static inline unsigned long calculate_ldr(unsigned long old)
-{
- unsigned long id;
-
- id = 1UL << smp_processor_id();
- return ((old & ~APIC_LDR_MASK) | SET_APIC_LOGICAL_ID(id));
-}
-
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
#define TARGET_CPUS (0xf)
+#define no_balance_irq (1)
+
#define APIC_BROADCAST_ID 0x0F
#define check_apicid_used(bitmap, apicid) (bitmap & (1 << apicid))
@@ -20,12 +14,27 @@ static inline void summit_check(char *oem, char *productid)
{
}
+static inline int apic_id_registered(void)
+{
+ return (1);
+}
+
+static inline void init_apic_ldr(void)
+{
+ /* Already done in NUMA-Q firmware */
+}
+
static inline void clustered_apic_check(void)
{
printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
"NUMA-Q", nr_ioapics);
}
+static inline int multi_timer_check(int apic, int irq)
+{
+ return (apic != 0 && irq == 0);
+}
+
static inline int cpu_present_to_apicid(int mps_cpu)
{
return ( ((mps_cpu/4)*16) + (1<<(mps_cpu%4)) );