diff options
| author | Mark Brown <broonie@kernel.org> | 2026-04-02 16:33:51 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-04-02 16:33:51 +0100 |
| commit | e8f504c790103a3221a2f2082704b9f2245d81e8 (patch) | |
| tree | 27509c5c020e77f82fea510e84da2d7a9fe9ea99 /include | |
| parent | dee5680d3e42101f7035b650f02f84a660f7e8ab (diff) | |
| parent | 8ea6e25c8536031604d95dc29a90ef0f114012d7 (diff) | |
ASoC: qcom: q6dsp: few fixes and enhancements
Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> says:
This patchset contains few fixes for the bugs hit during testing with
Monza EVK platform
- around array out of bounds access on dai ids which keep extending but
the drivers seems to have hardcoded some numbers, fix this and clean
the mess up
- fix few issues discovered while trying to shut down dsp.
- flooding rpmsg with write requests due to not resetting queue pointer,
fix this resetting the pointer in trigger stop.
- possible multiple graph opens which can result in open failures.
Apart from this few new enhancements to the dsp side
- add new LPI MI2S and senary dai entries
- handle pipewire and Displayport issues by moving graph start to
trigger level, which should fix outstanding pipewire and DP issues on
Qualcomm SoCs.
- remove some unnessary loops in hot path
- support early memory map on DSP.
Tested this on top of linux-next on VENTUNO-Q platform.
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h index 6d1ce7f5da51..45850f2d4342 100644 --- a/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h +++ b/include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h @@ -140,6 +140,18 @@ #define DISPLAY_PORT_RX_6 134 #define DISPLAY_PORT_RX_7 135 #define USB_RX 136 +#define LPI_MI2S_RX_0 137 +#define LPI_MI2S_TX_0 138 +#define LPI_MI2S_RX_1 139 +#define LPI_MI2S_TX_1 140 +#define LPI_MI2S_RX_2 141 +#define LPI_MI2S_TX_2 142 +#define LPI_MI2S_RX_3 143 +#define LPI_MI2S_TX_3 144 +#define LPI_MI2S_RX_4 145 +#define LPI_MI2S_TX_4 146 +#define SENARY_MI2S_RX 147 +#define SENARY_MI2S_TX 148 #define LPASS_CLK_ID_PRI_MI2S_IBIT 1 #define LPASS_CLK_ID_PRI_MI2S_EBIT 2 |