Merge new serial additions

230 files changed, 5339 insertions, 3357 deletions

diff --git a/include/asm-alpha/checksum.h b/include/asm-alpha/checksum.h
index f3e379787ecd..a5c9f08447fb 100644
--- a/include/asm-alpha/checksum.h
+++ b/include/asm-alpha/checksum.h
@@ -1,6 +1,7 @@
 #ifndef _ALPHA_CHECKSUM_H
 #define _ALPHA_CHECKSUM_H
 
+#include <linux/in6.h>
 
 /*
  *	This is a version of ip_compute_csum() optimized for IP headers,
diff --git a/include/asm-alpha/cpumask.h b/include/asm-alpha/cpumask.h
deleted file mode 100644
index bc3381ad1643..000000000000
--- a/include/asm-alpha/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_ALPHA_CPUMASK_H
-#define _ASM_ALPHA_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_ALPHA_CPUMASK_H */
diff --git a/include/asm-alpha/setup.h b/include/asm-alpha/setup.h
new file mode 100644
index 000000000000..2e023a4aa317
--- /dev/null
+++ b/include/asm-alpha/setup.h
@@ -0,0 +1,6 @@
+#ifndef __ALPHA_SETUP_H
+#define __ALPHA_SETUP_H
+
+#define COMMAND_LINE_SIZE	256
+
+#endif
diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h
index d342a017ceb6..cbc173ae45aa 100644
--- a/include/asm-alpha/smp.h
+++ b/include/asm-alpha/smp.h
@@ -50,9 +50,7 @@ extern cpumask_t cpu_online_map;
 extern int smp_num_cpus;
 #define cpu_possible_map	cpu_present_mask
 
-#define cpu_online(cpu)		cpu_isset(cpu, cpu_online_map)
-
-extern int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, unsigned long cpu);
+int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu);
 
 #else /* CONFIG_SMP */
 
diff --git a/include/asm-alpha/system.h b/include/asm-alpha/system.h
index 606a0553c688..1e5ac92d2073 100644
--- a/include/asm-alpha/system.h
+++ b/include/asm-alpha/system.h
@@ -43,7 +43,6 @@
  */
 #define PARAM			ZERO_PGE
 #define COMMAND_LINE		((char*)(PARAM + 0x0000))
-#define COMMAND_LINE_SIZE	256
 #define INITRD_START		(*(unsigned long *) (PARAM+0x100))
 #define INITRD_SIZE		(*(unsigned long *) (PARAM+0x108))
 
diff --git a/include/asm-arm/arch-adifcc/adi_evb.h b/include/asm-arm/arch-adifcc/adi_evb.h
deleted file mode 100644
index f4b74c6fcf9a..000000000000
--- a/include/asm-arm/arch-adifcc/adi_evb.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * linux/include/asm/arch-80200fcc/adi_evb.h
- *
- * ADI 80200FCC evaluation board definitions
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (C) 2001 MontaVista Software Inc.
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- */
-
-#define ADI_EVB__RAMBASE	0xa0000000
-#define ADI_EVB__UART		0x00400000    /* UART */
-#define ADI_EVB_7SEG_1		0x00500000    /* 7-Segment */
-
diff --git a/include/asm-arm/arch-adifcc/dma.h b/include/asm-arm/arch-adifcc/dma.h
deleted file mode 100644
index 19aa1dbc3be7..000000000000
--- a/include/asm-arm/arch-adifcc/dma.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/*
- * linux/include/asm-arm/arch-80200fcc/dma.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS		0xffffffff
-
-/* No DMA */
-#define MAX_DMA_CHANNELS	0
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-adifcc/hardware.h b/include/asm-arm/arch-adifcc/hardware.h
deleted file mode 100644
index 9eeb3cb507da..000000000000
--- a/include/asm-arm/arch-adifcc/hardware.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * linux/include/asm-arm/arch-adifcc/hardware.h
- *
- * Hardware definitions for ADI based systems
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (C) 2000-2001 MontaVista Software Inc.
- *
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the  License, or (at your
- *  option) any later version.
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <linux/config.h>
-
-#define PCIO_BASE	0
-
-#if defined(CONFIG_ARCH_ADI_EVB)
-#include "adi_evb.h"
-#endif
-
-#endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-adifcc/io.h b/include/asm-arm/arch-adifcc/io.h
deleted file mode 100644
index bdcaec08bddf..000000000000
--- a/include/asm-arm/arch-adifcc/io.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * linux/include/asm-arm/arch-adifcc/io.h
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (C) 2001  MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-#define __io(a)			(PCIO_BASE + (a))
-#define __mem_pci(a)		((unsigned long)(a))
-#define __mem_isa(a)		((unsigned long)(a))
-
-#endif
diff --git a/include/asm-arm/arch-adifcc/irqs.h b/include/asm-arm/arch-adifcc/irqs.h
deleted file mode 100644
index b559ca79ef80..000000000000
--- a/include/asm-arm/arch-adifcc/irqs.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * linux/include/asm-arm/arch-80200fcc/irqs.h
- *
- * Author:	Deepak Saxena <dsaxena@mvista.com>
- * Copyright:	(C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#define IRQ_XS80200_BCU		0	/* Bus Control Unit */
-#define IRQ_XS80200_PMU		1	/* Performance Monitoring Unit */
-#define IRQ_XS80200_EXTIRQ	2	/* external IRQ signal */
-#define IRQ_XS80200_EXTFIQ	3	/* external IRQ signal */
-
-#define NR_XS80200_IRQS		4
-#define NR_IRQS			NR_XS80200_IRQS
-
-#define	IRQ_XSCALE_PMU		IRQ_XS80200_PMU
diff --git a/include/asm-arm/arch-adifcc/memory.h b/include/asm-arm/arch-adifcc/memory.h
deleted file mode 100644
index b76187d8d42b..000000000000
--- a/include/asm-arm/arch-adifcc/memory.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * linux/include/asm-arm/arch-adifcc/memory.h
- *
- * Copyright (c) 2001 MontaVista Software, Inc.
- */
-
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/*
- * Physical DRAM offset.
- */
-#define PHYS_OFFSET	(0xC0000000UL)
-
-/*
- * Virtual view <-> DMA view memory address translations
- * virt_to_bus: Used to translate the virtual address to an
- *		address suitable to be passed to set_dma_addr
- * bus_to_virt: Used to convert an address for DMA operations
- *		to an address that the kernel can use.
- *
- * These are dummies for now.
- */
-#define __virt_to_bus(x)	 __virt_to_phys(x)
-#define __bus_to_virt(x)	 __phys_to_virt(x)
-
-#endif
diff --git a/include/asm-arm/arch-adifcc/param.h b/include/asm-arm/arch-adifcc/param.h
deleted file mode 100644
index b1a410eff447..000000000000
--- a/include/asm-arm/arch-adifcc/param.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-adifcc/param.h
- */
diff --git a/include/asm-arm/arch-adifcc/serial.h b/include/asm-arm/arch-adifcc/serial.h
deleted file mode 100644
index ce4e87699c91..000000000000
--- a/include/asm-arm/arch-adifcc/serial.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * include/asm-arm/arch-adifcc/serial.h
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (c) 2001 MontaVista Software, Inc.
- */
-#include <linux/config.h>
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD ( 1852000 / 16 )
-
-/* Standard COM flags */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#ifdef CONFIG_ARCH_ADI_EVB
-
-/*
- * One serial port, int goes to FIQ, so we run in polled mode
- */
-#define STD_SERIAL_PORT_DEFNS			\
-       /* UART CLK      PORT        IRQ        FLAGS        */			\
-	{ 0, BASE_BAUD, 0xff400000, 0,  STD_COM_FLAGS }  /* ttyS0 */
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
-
diff --git a/include/asm-arm/arch-adifcc/system.h b/include/asm-arm/arch-adifcc/system.h
deleted file mode 100644
index 4bffbdc294a0..000000000000
--- a/include/asm-arm/arch-adifcc/system.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * linux/include/asm-arm/arch-adifcc/system.h
- *
- * Copyright (C) 2001 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-static inline void arch_idle(void)
-{
-#if 0
-	cpu_do_idle();
-#endif
-}
-
-
-static inline void arch_reset(char mode)
-{
-	if ( 1 && mode == 's') {
-		/* Jump into ROM at address 0 */
-		cpu_reset(0);
-	} else {
-		/* Use on-chip reset capability */
-	}
-}
-
diff --git a/include/asm-arm/arch-adifcc/time.h b/include/asm-arm/arch-adifcc/time.h
deleted file mode 100644
index 2237ef006e71..000000000000
--- a/include/asm-arm/arch-adifcc/time.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/*
- * linux/include/asm-arm/arch-adifcc/time.h
- *
- */
-
-/*
- * No on board timer, implementation @ arch/arm/kernel/xscale-time.c
- */
-
diff --git a/include/asm-arm/arch-adifcc/timex.h b/include/asm-arm/arch-adifcc/timex.h
deleted file mode 100644
index d994c8abecd5..000000000000
--- a/include/asm-arm/arch-adifcc/timex.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/*
- * linux/include/asm-arm/arch-adifcc/timex.h
- *
- * XScale architecture timex specifications
- */
-
-/* This is for a timer based on the XS80200's PMU counter */
-
-#define CLOCK_TICK_RATE 600000000 /* Underlying HZ */
-
diff --git a/include/asm-arm/arch-adifcc/uncompress.h b/include/asm-arm/arch-adifcc/uncompress.h
deleted file mode 100644
index 792b4e17aa86..000000000000
--- a/include/asm-arm/arch-adifcc/uncompress.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * linux/include/asm-arm/arch-adifcc/uncompress.h
- *
- * Author: Deepak Saxena <dsaxena@mvista.com>
- *
- * Copyright (c) 2001 MontaVista Software, Inc.
- *
- */
-
-#define UART_BASE    ((volatile unsigned char *)0x00400000)
-
-static __inline__ void putc(char c)
-{
-	while ((UART_BASE[5] & 0x60) != 0x60);
-	UART_BASE[0] = c;
-}
-
-/*
- * This does not append a newline
- */
-static void puts(const char *s)
-{
-	while (*s) {
-		putc(*s);
-		if (*s == '\n')
-			putc('\r');
-		s++;
-	}
-}
-
-/*
- * nothing to do
- */
-#define arch_decomp_setup()
-#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-adifcc/vmalloc.h b/include/asm-arm/arch-adifcc/vmalloc.h
deleted file mode 100644
index d45b27e1ad0e..000000000000
--- a/include/asm-arm/arch-adifcc/vmalloc.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * linux/include/asm-arm/arch-adifcc/vmalloc.h
- */
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts.  That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-#define VMALLOC_OFFSET	  (8*1024*1024)
-#define VMALLOC_START	  (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
-#define VMALLOC_END       (0xe8000000)
diff --git a/include/asm-arm/arch-cl7500/time.h b/include/asm-arm/arch-cl7500/time.h
deleted file mode 100644
index e5e5be510265..000000000000
--- a/include/asm-arm/arch-cl7500/time.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * linux/include/asm-arm/arch-cl7500/time.h
- *
- * Copyright (c) 1996-2000 Russell King.
- *
- * Changelog:
- *  24-Sep-1996	RMK	Created
- *  10-Oct-1996	RMK	Brought up to date with arch-sa110eval
- *  04-Dec-1997	RMK	Updated for new arch/arm/time.c
- */
-
-extern void ioctime_init(void);
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	do_timer(regs);
-	do_set_rtc();
-	do_profile(regs);
-
-	{
-		/* Twinkle the lights. */
-		static int count, state = 0xff00;
-		if (count-- == 0) {
-			state ^= 0x100;
-			count = 25;
-			*((volatile unsigned int *)LED_ADDRESS) = state;
-		}
-	}
-	return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt.
- */
-void __init time_init(void)
-{
-	ioctime_init();
-
-	timer_irq.handler = timer_interrupt;
-
-	setup_irq(IRQ_TIMER, &timer_irq);
-}
diff --git a/include/asm-arm/arch-ebsa110/time.h b/include/asm-arm/arch-ebsa110/time.h
deleted file mode 100644
index c482e372b012..000000000000
--- a/include/asm-arm/arch-ebsa110/time.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-ebsa110/time.h
- *
- *  Copyright (C) 1996,1997,1998 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * No real time clock on the evalulation board!
- *
- * Changelog:
- *  10-Oct-1996	RMK	Created
- *  04-Dec-1997	RMK	Updated for new arch/arm/kernel/time.c
- *  07-Aug-1998	RMK	Updated for arch/arm/kernel/leds.c
- *  28-Dec-1998	APH	Made leds code optional
- */
-
-#include <asm/leds.h>
-#include <asm/io.h>
-
-extern unsigned long (*gettimeoffset)(void);
-
-#define PIT_CTRL		(PIT_BASE + 0x0d)
-#define PIT_T2			(PIT_BASE + 0x09)
-#define PIT_T1			(PIT_BASE + 0x05)
-#define PIT_T0			(PIT_BASE + 0x01)
-
-/*
- * This is the rate at which your MCLK signal toggles (in Hz)
- * This was measured on a 10 digit frequency counter sampling
- * over 1 second.
- */
-#define MCLK	47894000
-
-/*
- * This is the rate at which the PIT timers get clocked
- */
-#define CLKBY7	(MCLK / 7)
-
-/*
- * This is the counter value.  We tick at 200Hz on this platform.
- */
-#define COUNT	((CLKBY7 + (HZ / 2)) / HZ)
-
-/*
- * Get the time offset from the system PIT.  Note that if we have missed an
- * interrupt, then the PIT counter will roll over (ie, be negative).
- * This actually works out to be convenient.
- */
-static unsigned long ebsa110_gettimeoffset(void)
-{
-	unsigned long offset, count;
-
-	__raw_writeb(0x40, PIT_CTRL);
-	count = __raw_readb(PIT_T1);
-	count |= __raw_readb(PIT_T1) << 8;
-
-	/*
-	 * If count > COUNT, make the number negative.
-	 */
-	if (count > COUNT)
-		count |= 0xffff0000;
-
-	offset = COUNT;
-	offset -= count;
-
-	/*
-	 * `offset' is in units of timer counts.  Convert
-	 * offset to units of microseconds.
-	 */
-	offset = offset * (1000000 / HZ) / COUNT;
-
-	return offset;
-}
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	u32 count;
-
-	/* latch and read timer 1 */
-	__raw_writeb(0x40, PIT_CTRL);
-	count = __raw_readb(PIT_T1);
-	count |= __raw_readb(PIT_T1) << 8;
-
-	count += COUNT;
-
-	__raw_writeb(count & 0xff, PIT_T1);
-	__raw_writeb(count >> 8, PIT_T1);
-
-	do_leds();
-	do_timer(regs);
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt.
- */
-void __init time_init(void)
-{
-	/*
-	 * Timer 1, mode 2, LSB/MSB
-	 */
-	__raw_writeb(0x70, PIT_CTRL);
-	__raw_writeb(COUNT & 0xff, PIT_T1);
-	__raw_writeb(COUNT >> 8, PIT_T1);
-
-	gettimeoffset = ebsa110_gettimeoffset;
-
-	timer_irq.handler = timer_interrupt;
-
-	setup_irq(IRQ_EBSA110_TIMER0, &timer_irq);
-}
-
-
diff --git a/include/asm-arm/arch-ebsa285/time.h b/include/asm-arm/arch-ebsa285/time.h
deleted file mode 100644
index f651eeb655be..000000000000
--- a/include/asm-arm/arch-ebsa285/time.h
+++ /dev/null
@@ -1,287 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-ebsa285/time.h
- *
- *  Copyright (C) 1998 Russell King.
- *  Copyright (C) 1998 Phil Blundell
- *
- * CATS has a real-time clock, though the evaluation board doesn't.
- *
- * Changelog:
- *  21-Mar-1998	RMK	Created
- *  27-Aug-1998	PJB	CATS support
- *  28-Dec-1998	APH	Made leds optional
- *  20-Jan-1999	RMK	Started merge of EBSA285, CATS and NetWinder
- *  16-Mar-1999	RMK	More support for EBSA285-like machines with RTCs in
- */
-
-#define RTC_PORT(x)		(rtc_base+(x))
-#define RTC_ALWAYS_BCD		0
-
-#include <linux/mc146818rtc.h>
-#include <linux/bcd.h>
-
-#include <asm/hardware/dec21285.h>
-#include <asm/leds.h>
-#include <asm/mach-types.h>
-
-static int rtc_base;
-
-#define mSEC_10_from_14 ((14318180 + 100) / 200)
-
-static unsigned long isa_gettimeoffset(void)
-{
-	int count;
-
-	static int count_p = (mSEC_10_from_14/6);    /* for the first call after boot */
-	static unsigned long jiffies_p = 0;
-
-	/*
-	 * cache volatile jiffies temporarily; we have IRQs turned off. 
-	 */
-	unsigned long jiffies_t;
-
-	/* timer count may underflow right here */
-	outb_p(0x00, 0x43);	/* latch the count ASAP */
-
-	count = inb_p(0x40);	/* read the latched count */
-
-	/*
-	 * We do this guaranteed double memory access instead of a _p 
-	 * postfix in the previous port access. Wheee, hackady hack
-	 */
- 	jiffies_t = jiffies;
-
-	count |= inb_p(0x40) << 8;
-
-	/* Detect timer underflows.  If we haven't had a timer tick since 
-	   the last time we were called, and time is apparently going
-	   backwards, the counter must have wrapped during this routine. */
-	if ((jiffies_t == jiffies_p) && (count > count_p))
-		count -= (mSEC_10_from_14/6);
-	else
-		jiffies_p = jiffies_t;
-
-	count_p = count;
-
-	count = (((mSEC_10_from_14/6)-1) - count) * (tick_nsec / 1000);
-	count = (count + (mSEC_10_from_14/6)/2) / (mSEC_10_from_14/6);
-
-	return count;
-}
-
-static irqreturn_t
-isa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	if (machine_is_netwinder())
-		do_leds();
-
-	do_timer(regs);
-	do_set_rtc();
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-static unsigned long __init get_isa_cmos_time(void)
-{
-	unsigned int year, mon, day, hour, min, sec;
-	int i;
-
-	// check to see if the RTC makes sense.....
-	if ((CMOS_READ(RTC_VALID) & RTC_VRT) == 0)
-		return mktime(1970, 1, 1, 0, 0, 0);
-
-	/* The Linux interpretation of the CMOS clock register contents:
-	 * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
-	 * RTC registers show the second which has precisely just started.
-	 * Let's hope other operating systems interpret the RTC the same way.
-	 */
-	/* read RTC exactly on falling edge of update flag */
-	for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
-		if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
-			break;
-
-	for (i = 0 ; i < 1000000 ; i++) /* must try at least 2.228 ms */
-		if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
-			break;
-
-	do { /* Isn't this overkill ? UIP above should guarantee consistency */
-		sec  = CMOS_READ(RTC_SECONDS);
-		min  = CMOS_READ(RTC_MINUTES);
-		hour = CMOS_READ(RTC_HOURS);
-		day  = CMOS_READ(RTC_DAY_OF_MONTH);
-		mon  = CMOS_READ(RTC_MONTH);
-		year = CMOS_READ(RTC_YEAR);
-	} while (sec != CMOS_READ(RTC_SECONDS));
-
-	if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
-		BCD_TO_BIN(sec);
-		BCD_TO_BIN(min);
-		BCD_TO_BIN(hour);
-		BCD_TO_BIN(day);
-		BCD_TO_BIN(mon);
-		BCD_TO_BIN(year);
-	}
-	if ((year += 1900) < 1970)
-		year += 100;
-	return mktime(year, mon, day, hour, min, sec);
-}
-
-static int
-set_isa_cmos_time(void)
-{
-	int retval = 0;
-	int real_seconds, real_minutes, cmos_minutes;
-	unsigned char save_control, save_freq_select;
-	unsigned long nowtime = xtime.tv_sec;
-
-	save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
-	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
-
-	save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
-	CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
-
-	cmos_minutes = CMOS_READ(RTC_MINUTES);
-	if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
-		BCD_TO_BIN(cmos_minutes);
-
-	/*
-	 * since we're only adjusting minutes and seconds,
-	 * don't interfere with hour overflow. This avoids
-	 * messing with unknown time zones but requires your
-	 * RTC not to be off by more than 15 minutes
-	 */
-	real_seconds = nowtime % 60;
-	real_minutes = nowtime / 60;
-	if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
-		real_minutes += 30;		/* correct for half hour time zone */
-	real_minutes %= 60;
-
-	if (abs(real_minutes - cmos_minutes) < 30) {
-		if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
-			BIN_TO_BCD(real_seconds);
-			BIN_TO_BCD(real_minutes);
-		}
-		CMOS_WRITE(real_seconds,RTC_SECONDS);
-		CMOS_WRITE(real_minutes,RTC_MINUTES);
-	} else
-		retval = -1;
-
-	/* The following flags have to be released exactly in this order,
-	 * otherwise the DS12887 (popular MC146818A clone with integrated
-	 * battery and quartz) will not reset the oscillator and will not
-	 * update precisely 500 ms later. You won't find this mentioned in
-	 * the Dallas Semiconductor data sheets, but who believes data
-	 * sheets anyway ...                           -- Markus Kuhn
-	 */
-	CMOS_WRITE(save_control, RTC_CONTROL);
-	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
-
-	return retval;
-}
-
-
-static unsigned long timer1_latch;
-
-static unsigned long timer1_gettimeoffset (void)
-{
-	unsigned long value = timer1_latch - *CSR_TIMER1_VALUE;
-
-	return ((tick_nsec / 1000) * value) / timer1_latch;
-}
-
-static irqreturn_t
-timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	*CSR_TIMER1_CLR = 0;
-
-	/* Do the LEDs things */
-	do_leds();
-	do_timer(regs);
-	do_set_rtc();
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt.
- */
-void __init time_init(void)
-{
-	int irq;
-
-	if (machine_is_co285() ||
-	    machine_is_personal_server())
-		/*
-		 * Add-in 21285s shouldn't access the RTC
-		 */
-		rtc_base = 0;
-	else
-		rtc_base = 0x70;
-
-	if (rtc_base) {
-		int reg_d, reg_b;
-
-		/*
-		 * Probe for the RTC.
-		 */
-		reg_d = CMOS_READ(RTC_REG_D);
-
-		/*
-		 * make sure the divider is set
-		 */
-		CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A);
-
-		/*
-		 * Set control reg B
-		 *   (24 hour mode, update enabled)
-		 */
-		reg_b = CMOS_READ(RTC_REG_B) & 0x7f;
-		reg_b |= 2;
-		CMOS_WRITE(reg_b, RTC_REG_B);
-
-		if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ &&
-		    CMOS_READ(RTC_REG_B) == reg_b) {
-			struct timespec tv;
-
-			/*
-			 * We have a RTC.  Check the battery
-			 */
-			if ((reg_d & 0x80) == 0)
-				printk(KERN_WARNING "RTC: *** warning: CMOS battery bad\n");
-
-			tv.tv_nsec = 0;
-			tv.tv_sec = get_isa_cmos_time();
-			do_settimeofday(&tv);
-			set_rtc = set_isa_cmos_time;
-		} else
-			rtc_base = 0;
-	}
-
-	if (machine_is_ebsa285() ||
-	    machine_is_co285() ||
-	    machine_is_personal_server()) {
-		gettimeoffset = timer1_gettimeoffset;
-
-		timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
-
-		*CSR_TIMER1_CLR  = 0;
-		*CSR_TIMER1_LOAD = timer1_latch;
-		*CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
-
-		timer_irq.handler = timer1_interrupt;
-		irq = IRQ_TIMER1;
-	} else {
-		/* enable PIT timer */
-		/* set for periodic (4) and LSB/MSB write (0x30) */
-		outb(0x34, 0x43);
-		outb((mSEC_10_from_14/6) & 0xFF, 0x40);
-		outb((mSEC_10_from_14/6) >> 8, 0x40);
-
-		gettimeoffset = isa_gettimeoffset;
-		timer_irq.handler = isa_timer_interrupt;
-		irq = IRQ_ISA_TIMER;
-	}
-	setup_irq(irq, &timer_irq);
-}
diff --git a/include/asm-arm/arch-epxa10db/time.h b/include/asm-arm/arch-epxa10db/time.h
deleted file mode 100644
index 749770b83e9a..000000000000
--- a/include/asm-arm/arch-epxa10db/time.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-epxa10db/time.h
- *
- *  Copyright (C) 2001 Altera Corporation
- * 
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#include <asm/system.h>
-#include <asm/leds.h>
-#include <asm/arch/hardware.h>
-#define TIMER00_TYPE (volatile unsigned int*)
-#include <asm/arch/timer00.h>
-
-
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t
-excalibur_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-
-	// ...clear the interrupt
-	*TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))|=TIMER0_CR_CI_MSK;
-
-	do_leds();
-	do_timer(regs);
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init time_init(void)
-{
-	timer_irq.handler = excalibur_timer_interrupt;
-
-	/* 
-	 * Make irqs happen for the system timer
-	 */
-	setup_irq(IRQ_TIMER0, &timer_irq);
-
-	/* Start the timer */
-	*TIMER0_LIMIT(IO_ADDRESS(EXC_TIMER00_BASE))=(unsigned int)(EXC_AHB2_CLK_FREQUENCY/200);
-	*TIMER0_PRESCALE(IO_ADDRESS(EXC_TIMER00_BASE))=1;
-	*TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))=TIMER0_CR_IE_MSK | TIMER0_CR_S_MSK;
-}
diff --git a/include/asm-arm/arch-integrator/platform.h b/include/asm-arm/arch-integrator/platform.h
index 6b67e41669f4..09ec7902f4bf 100644
--- a/include/asm-arm/arch-integrator/platform.h
+++ b/include/asm-arm/arch-integrator/platform.h
@@ -457,6 +457,10 @@
 #define mSEC_25                         (mSEC_1 * 25)
 #define SEC_1                           (mSEC_1 * 1000)
 
+#ifndef __ASSEMBLY__
+extern void integrator_time_init(unsigned long, unsigned int);
+#endif
+
 #define INTEGRATOR_CSR_BASE             0x10000000
 #define INTEGRATOR_CSR_SIZE             0x10000000
 
diff --git a/include/asm-arm/arch-iop3xx/time.h b/include/asm-arm/arch-iop3xx/time.h
deleted file mode 100644
index b58ac84f954e..000000000000
--- a/include/asm-arm/arch-iop3xx/time.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * linux/include/asm-arm/arch-iop80310/time.h
- *
- * Author:  Nicolas Pitre
- * Copyright:   (C) 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
index 52c1c445c536..b8ea57968d4a 100644
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ b/include/asm-arm/arch-ixp4xx/platform.h
@@ -58,6 +58,7 @@ struct ixp4xx_i2c_pins {
  */
 extern void ixp4xx_map_io(void);
 extern void ixp4xx_init_irq(void);
+extern void ixp4xx_init_time(void);
 extern void ixp4xx_pci_preinit(void);
 struct pci_sys_data;
 extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
diff --git a/include/asm-arm/arch-ixp4xx/time.h b/include/asm-arm/arch-ixp4xx/time.h
deleted file mode 100644
index e79f4acbe7b3..000000000000
--- a/include/asm-arm/arch-ixp4xx/time.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/*
- * linux/include/asm-arm/arch-ixp4xx/time.h
- *
- * We implement timer code in arch/arm/mach-ixp4xx/time.c
- *
- */
-
diff --git a/include/asm-arm/arch-lh7a40x/time.h b/include/asm-arm/arch-lh7a40x/time.h
deleted file mode 100644
index 5f1cf4f9b2c7..000000000000
--- a/include/asm-arm/arch-lh7a40x/time.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* include/asm-arm/arch-lh7a40x/time.h
- *
- *  Copyright (C) 2004 Logic Product Development
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  version 2 as published by the Free Software Foundation.
- *
- */
-
-#if HZ < 100
-# define TIMER_CONTROL	TIMER_CONTROL1
-# define TIMER_LOAD	TIMER_LOAD1
-# define TIMER_CONSTANT	(508469/HZ)
-# define TIMER_MODE	(TIMER_C_ENABLE | TIMER_C_PERIODIC | TIMER_C_508KHZ)
-# define TIMER_EOI	TIMER_EOI1
-# define TIMER_IRQ	IRQ_T1UI
-#else
-# define TIMER_CONTROL	TIMER_CONTROL3
-# define TIMER_LOAD	TIMER_LOAD3
-# define TIMER_CONSTANT	(3686400/HZ)
-# define TIMER_MODE	(TIMER_C_ENABLE | TIMER_C_PERIODIC)
-# define TIMER_EOI	TIMER_EOI3
-# define TIMER_IRQ	IRQ_T3UI
-#endif
-
-static irqreturn_t
-lh7a40x_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	TIMER_EOI = 0;
-	do_profile (regs);
-	do_leds();
-	do_set_rtc();
-	do_timer (regs);
-
-	return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
-				/* Stop/disable all timers */
-	TIMER_CONTROL1 = 0;
-	TIMER_CONTROL2 = 0;
-	TIMER_CONTROL3 = 0;
-
-	timer_irq.handler = lh7a40x_timer_interrupt;
-	timer_irq.flags |= SA_INTERRUPT;
-	setup_irq (TIMER_IRQ, &timer_irq);
-
-	TIMER_LOAD = TIMER_CONSTANT;
-	TIMER_CONTROL = TIMER_MODE;
-}
-
diff --git a/include/asm-arm/arch-omap/time.h b/include/asm-arm/arch-omap/time.h
deleted file mode 100644
index 85d481219824..000000000000
--- a/include/asm-arm/arch-omap/time.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/*
- * linux/include/asm-arm/arch-omap/time.h
- *
- * 32kHz timer definition
- *
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: Greg Lonnon <glonnon@ridgerun.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the  GNU General Public License along
- * with this program; if not, write  to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#if !defined(__ASM_ARCH_OMAP_TIME_H)
-#define __ASM_ARCH_OMAP_TIME_H
-
-#include <linux/config.h>
-#include <linux/delay.h>
-#include <asm/system.h>
-#include <asm/hardware.h>
-#include <asm/io.h>
-#include <asm/leds.h>
-#include <asm/irq.h>
-#include <asm/mach/irq.h>
-#include <asm/arch/clocks.h>
-
-#ifndef __instrument
-#define __instrument
-#define __noinstrument __attribute__ ((no_instrument_function))
-#endif
-
-typedef struct {
-	u32 cntl;     /* CNTL_TIMER, R/W */
-	u32 load_tim; /* LOAD_TIM,   W */
-	u32 read_tim; /* READ_TIM,   R */
-} mputimer_regs_t;
-
-#define mputimer_base(n) \
-    ((volatile mputimer_regs_t*)IO_ADDRESS(OMAP_MPUTIMER_BASE + \
-				 (n)*OMAP_MPUTIMER_OFFSET))
-
-static inline unsigned long timer32k_read(int reg) {
-	unsigned long val;
-	val = omap_readw(reg + OMAP_32kHz_TIMER_BASE);
-	return val;
-}
-static inline void timer32k_write(int reg,int val) {
-	omap_writew(val, reg + OMAP_32kHz_TIMER_BASE);
-}
-
-/*
- * How long is the timer interval? 100 HZ, right...
- * IRQ rate = (TVR + 1) / 32768 seconds
- * TVR = 32768 * IRQ_RATE -1
- * IRQ_RATE =  1/100
- * TVR = 326
- */
-#define TIMER32k_PERIOD 326
-//#define TIMER32k_PERIOD 0x7ff
-
-static inline void start_timer32k(void) {
-	timer32k_write(TIMER32k_CR,
-		       TIMER32k_TSS | TIMER32k_TRB |
-		       TIMER32k_INT | TIMER32k_ARL);
-}
-
-#ifdef CONFIG_MACH_OMAP_PERSEUS2
-/*
- * After programming PTV with 0 and setting the MPUTIM_CLOCK_ENABLE
- * (external clock enable)  bit, the timer count rate is 6.5 MHz (13
- * MHZ input/2). !! The divider by 2 is undocumented !!
- */
-#define MPUTICKS_PER_SEC (13000000/2)
-#else
-/*
- * After programming PTV with 0, the timer count rate is 6 MHz.
- * WARNING! this must be an even number, or machinecycles_to_usecs
- * below will break.
- */
-#define MPUTICKS_PER_SEC  (12000000/2)
-#endif
-
-static int mputimer_started[3] = {0,0,0};
-
-static inline void __noinstrument start_mputimer(int n,
-						 unsigned long load_val)
-{
-	volatile mputimer_regs_t* timer = mputimer_base(n);
-
-	mputimer_started[n] = 0;
-	timer->cntl = MPUTIM_CLOCK_ENABLE;
-	udelay(1);
-
-	timer->load_tim = load_val;
-        udelay(1);
-	timer->cntl = (MPUTIM_CLOCK_ENABLE | MPUTIM_AR | MPUTIM_ST);
-	mputimer_started[n] = 1;
-}
-
-static inline unsigned long __noinstrument
-read_mputimer(int n)
-{
-	volatile mputimer_regs_t* timer = mputimer_base(n);
-	return (mputimer_started[n] ? timer->read_tim : 0);
-}
-
-void __noinstrument start_mputimer1(unsigned long load_val)
-{
-	start_mputimer(0, load_val);
-}
-void __noinstrument start_mputimer2(unsigned long load_val)
-{
-	start_mputimer(1, load_val);
-}
-void __noinstrument start_mputimer3(unsigned long load_val)
-{
-	start_mputimer(2, load_val);
-}
-
-unsigned long __noinstrument read_mputimer1(void)
-{
-	return read_mputimer(0);
-}
-unsigned long __noinstrument read_mputimer2(void)
-{
-	return read_mputimer(1);
-}
-unsigned long __noinstrument read_mputimer3(void)
-{
-	return read_mputimer(2);
-}
-
-unsigned long __noinstrument do_getmachinecycles(void)
-{
-	return 0 - read_mputimer(0);
-}
-
-unsigned long __noinstrument machinecycles_to_usecs(unsigned long mputicks)
-{
-	/* Round up to nearest usec */
-	return ((mputicks * 1000) / (MPUTICKS_PER_SEC / 2 / 1000) + 1) >> 1;
-}
-
-/*
- * This marks the time of the last system timer interrupt
- * that was *processed by the ISR* (timer 2).
- */
-static unsigned long systimer_mark;
-
-static unsigned long omap1510_gettimeoffset(void)
-{
-	/* Return elapsed usecs since last system timer ISR */
-	return machinecycles_to_usecs(do_getmachinecycles() - systimer_mark);
-}
-
-static irqreturn_t
-omap1510_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	unsigned long now, ilatency;
-
-	/*
-	 * Mark the time at which the timer interrupt ocurred using
-	 * timer1. We need to remove interrupt latency, which we can
-	 * retrieve from the current system timer2 counter. Both the
-	 * offset timer1 and the system timer2 are counting at 6MHz,
-	 * so we're ok.
-	 */
-	now = 0 - read_mputimer1();
-	ilatency = MPUTICKS_PER_SEC / 100 - read_mputimer2();
-	systimer_mark = now - ilatency;
-
-	do_leds();
-	do_timer(regs);
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
-	/* Since we don't call request_irq, we must init the structure */
-	gettimeoffset = omap1510_gettimeoffset;
-
-	timer_irq.handler = omap1510_timer_interrupt;
-	timer_irq.flags = SA_INTERRUPT;
-#ifdef OMAP1510_USE_32KHZ_TIMER
-	timer32k_write(TIMER32k_CR, 0x0);
-	timer32k_write(TIMER32k_TVR,TIMER32k_PERIOD);
-	setup_irq(INT_OS_32kHz_TIMER, &timer_irq);
-	start_timer32k();
-#else
-	setup_irq(INT_TIMER2, &timer_irq);
-	start_mputimer2(MPUTICKS_PER_SEC / 100 - 1);
-#endif
-}
-
-#endif
diff --git a/include/asm-arm/arch-pxa/time.h b/include/asm-arm/arch-pxa/time.h
deleted file mode 100644
index bc9437a8c38d..000000000000
--- a/include/asm-arm/arch-pxa/time.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * linux/include/asm-arm/arch-pxa/time.h
- *
- * Author:	Nicolas Pitre
- * Created:	Jun 15, 2001
- * Copyright:	MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-
-static inline unsigned long pxa_get_rtc_time(void)
-{
-	return RCNR;
-}
-
-static int pxa_set_rtc(void)
-{
-	unsigned long current_time = xtime.tv_sec;
-
-	if (RTSR & RTSR_ALE) {
-		/* make sure not to forward the clock over an alarm */
-		unsigned long alarm = RTAR;
-		if (current_time >= alarm && alarm >= RCNR)
-			return -ERESTARTSYS;
-	}
-	RCNR = current_time;
-	return 0;
-}
-
-/* IRQs are disabled before entering here from do_gettimeofday() */
-static unsigned long pxa_gettimeoffset (void)
-{
-	long ticks_to_match, elapsed, usec;
-
-	/* Get ticks before next timer match */
-	ticks_to_match = OSMR0 - OSCR;
-
-	/* We need elapsed ticks since last match */
-	elapsed = LATCH - ticks_to_match;
-
-	/* don't get fooled by the workaround in pxa_timer_interrupt() */
-	if (elapsed <= 0)
-		return 0;
-
-	/* Now convert them to usec */
-	usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
-
-	return usec;
-}
-
-static irqreturn_t
-pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	int next_match;
-
-	do_profile(regs);
-
-	/* Loop until we get ahead of the free running timer.
-	 * This ensures an exact clock tick count and time accuracy.
-	 * IRQs are disabled inside the loop to ensure coherence between
-	 * lost_ticks (updated in do_timer()) and the match reg value, so we
-	 * can use do_gettimeofday() from interrupt handlers.
-	 *
-	 * HACK ALERT: it seems that the PXA timer regs aren't updated right
-	 * away in all cases when a write occurs.  We therefore compare with
-	 * 8 instead of 0 in the while() condition below to avoid missing a
-	 * match if OSCR has already reached the next OSMR value.
-	 * Experience has shown that up to 6 ticks are needed to work around
-	 * this problem, but let's use 8 to be conservative.  Note that this
-	 * affect things only when the timer IRQ has been delayed by nearly
-	 * exactly one tick period which should be a pretty rare event.
-	 */
-	do {
-		do_leds();
-		do_set_rtc();
-		do_timer(regs);
-		OSSR = OSSR_M0;  /* Clear match on timer 0 */
-		next_match = (OSMR0 += LATCH);
-	} while( (signed long)(next_match - OSCR) <= 8 );
-
-	return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
-	struct timespec tv;
-
-	gettimeoffset = pxa_gettimeoffset;
-	set_rtc = pxa_set_rtc;
-
-	tv.tv_nsec = 0;
-	tv.tv_sec = pxa_get_rtc_time();
-	do_settimeofday(&tv);
-
-	timer_irq.handler = pxa_timer_interrupt;
-	OSMR0 = 0;		/* set initial match at 0 */
-	OSSR = 0xf;		/* clear status on all timers */
-	setup_irq(IRQ_OST0, &timer_irq);
-	OIER |= OIER_E0;	/* enable match on timer 0 to cause interrupts */
-	OSCR = 0;		/* initialize free-running timer, force first match */
-}
-
diff --git a/include/asm-arm/arch-rpc/time.h b/include/asm-arm/arch-rpc/time.h
deleted file mode 100644
index 1df6a12cd0e3..000000000000
--- a/include/asm-arm/arch-rpc/time.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-rpc/time.h
- *
- *  Copyright (C) 1996-2000 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  Changelog:
- *   24-Sep-1996 RMK	Created
- *   10-Oct-1996 RMK	Brought up to date with arch-sa110eval
- *   04-Dec-1997 RMK	Updated for new arch/arm/time.c
- */
-extern void ioctime_init(void);
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	do_timer(regs);
-	do_set_rtc();
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt.
- */
-void __init time_init(void)
-{
-	ioctime_init();
-
-	timer_irq.handler = timer_interrupt;
-
-	setup_irq(IRQ_TIMER, &timer_irq);
-}
diff --git a/include/asm-arm/arch-s3c2410/time.h b/include/asm-arm/arch-s3c2410/time.h
deleted file mode 100644
index 8aab3438a992..000000000000
--- a/include/asm-arm/arch-s3c2410/time.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/* linux/include/asm-arm/arch-s3c2410/time.h
- *
- *  Copyright (C) 2003 Simtec Electronics <linux@simtec.co.uk>
- *    Ben Dooks, <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#include <asm/system.h>
-#include <asm/leds.h>
-#include <asm/mach-types.h>
-
-#include <asm/io.h>
-#include <asm/arch/map.h>
-#include <asm/arch/regs-timer.h>
-
-extern unsigned long (*gettimeoffset)(void);
-
-static unsigned long timer_startval;
-static unsigned long timer_ticks_usec;
-
-#ifdef CONFIG_S3C2410_RTC
-extern void s3c2410_rtc_check();
-#endif
-
-/* with an 12MHz clock, we get 12 ticks per-usec
- */
-
-
-/***
- * Returns microsecond  since last clock interrupt.  Note that interrupts
- * will have been disabled by do_gettimeoffset()
- * IRQs are disabled before entering here from do_gettimeofday()
- */
-static unsigned long s3c2410_gettimeoffset (void)
-{
-	unsigned long tdone;
-	unsigned long usec;
-
-	/* work out how many ticks have gone since last timer interrupt */
-
-	tdone = timer_startval - __raw_readl(S3C2410_TCNTO(4));
-
-	/* currently, tcnt is in 12MHz units, but this may change
-	 * for non-bast machines...
-	 */
-
-	usec = tdone / timer_ticks_usec;
-
-	return usec;
-}
-
-
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t
-s3c2410_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	do_leds();
-	do_timer(regs);
-
-	do_set_rtc();
-	//s3c2410_rtc_check();
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-
-/* currently we only use timer4, as it is the only timer which has no
- * other function that can be exploited externally
-*/
-
-void __init time_init (void)
-{
-	unsigned long tcon;
-	unsigned long tcnt;
-	unsigned long tcfg1;
-	unsigned long tcfg0;
-
-	gettimeoffset = s3c2410_gettimeoffset;
-	timer_irq.handler = s3c2410_timer_interrupt;
-
-	tcnt = 0xffff;  /* default value for tcnt */
-
-	/* read the current timer configuration bits */
-
-	tcon = __raw_readl(S3C2410_TCON);
-	tcfg1 = __raw_readl(S3C2410_TCFG1);
-	tcfg0 = __raw_readl(S3C2410_TCFG0);
-
-	/* configure the system for whichever machine is in use */
-
-	if (machine_is_bast() || machine_is_vr1000()) {
-		timer_ticks_usec = 12;	      /* timer is at 12MHz */
-		tcnt = (timer_ticks_usec * (1000*1000)) / HZ;
-	}
-
-	/* for the h1940, we use the pclk from the core to generate
-	 * the timer values. since 67.5MHz is not a value we can directly
-	 * generate the timer value from, we need to pre-scale and
-	 * divied before using it.
-	 *
-	 * overall divsior to get 200Hz is 337500
-	 *   we can fit tcnt if we pre-scale by 6, producing a tick rate
-	 *   of 11.25MHz, and a tcnt of 56250.
-	 */
-
-	if (machine_is_h1940() || machine_is_smdk2410() ) {
-		timer_ticks_usec = s3c2410_pclk / (1000*1000);
-		timer_ticks_usec /= 6;
-
-		tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
-		tcfg1 |= S3C2410_TCFG1_MUX4_DIV2;
-
-		tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
-		tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT;
-
-		tcnt = (s3c2410_pclk / 6) / HZ;
-	}
-
-
-	printk("setup_timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx\n",
-	       tcon, tcnt, tcfg0, tcfg1);
-
-	/* check to see if timer is within 16bit range... */
-	if (tcnt > 0xffff) {
-		panic("setup_timer: HZ is too small, cannot configure timer!");
-		return;
-	}
-
-	__raw_writel(tcfg1, S3C2410_TCFG1);
-	__raw_writel(tcfg0, S3C2410_TCFG0);
-
-	timer_startval = tcnt;
-	__raw_writel(tcnt, S3C2410_TCNTB(4));
-
-	/* ensure timer is stopped... */
-
-	tcon &= ~(7<<20);
-	tcon |= S3C2410_TCON_T4RELOAD;
-	tcon |= S3C2410_TCON_T4MANUALUPD;
-
-	__raw_writel(tcon, S3C2410_TCON);
-	__raw_writel(tcnt, S3C2410_TCNTB(4));
-	__raw_writel(tcnt, S3C2410_TCMPB(4));
-
-	setup_irq(IRQ_TIMER4, &timer_irq);
-
-	/* start the timer running */
-	tcon |= S3C2410_TCON_T4START;
-	tcon &= ~S3C2410_TCON_T4MANUALUPD;
-	__raw_writel(tcon, S3C2410_TCON);
-}
-
-
-
diff --git a/include/asm-arm/arch-sa1100/time.h b/include/asm-arm/arch-sa1100/time.h
deleted file mode 100644
index d962626154dd..000000000000
--- a/include/asm-arm/arch-sa1100/time.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * linux/include/asm-arm/arch-sa1100/time.h
- *
- * Copyright (C) 1998 Deborah Wallach.
- * Twiddles  (C) 1999 	Hugo Fiennes <hugo@empeg.com>
- * 
- * 2000/03/29 (C) Nicolas Pitre <nico@cam.org>
- *	Rewritten: big cleanup, much simpler, better HZ accuracy.
- *
- */
-
-
-#define RTC_DEF_DIVIDER		(32768 - 1)
-#define RTC_DEF_TRIM            0
-
-static unsigned long __init sa1100_get_rtc_time(void)
-{
-	/*
-	 * According to the manual we should be able to let RTTR be zero
-	 * and then a default diviser for a 32.768KHz clock is used.
-	 * Apparently this doesn't work, at least for my SA1110 rev 5.
-	 * If the clock divider is uninitialized then reset it to the
-	 * default value to get the 1Hz clock.
-	 */
-	if (RTTR == 0) {
-		RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
-		printk(KERN_WARNING "Warning: uninitialized Real Time Clock\n");
-		/* The current RTC value probably doesn't make sense either */
-		RCNR = 0;
-		return 0;
-	}
-	return RCNR;
-}
-
-static int sa1100_set_rtc(void)
-{
-	unsigned long current_time = xtime.tv_sec;
-
-	if (RTSR & RTSR_ALE) {
-		/* make sure not to forward the clock over an alarm */
-		unsigned long alarm = RTAR;
-		if (current_time >= alarm && alarm >= RCNR)
-			return -ERESTARTSYS;
-	}
-	RCNR = current_time;
-	return 0;
-}
-
-/* IRQs are disabled before entering here from do_gettimeofday() */
-static unsigned long sa1100_gettimeoffset (void)
-{
-	unsigned long ticks_to_match, elapsed, usec;
-
-	/* Get ticks before next timer match */
-	ticks_to_match = OSMR0 - OSCR;
-
-	/* We need elapsed ticks since last match */
-	elapsed = LATCH - ticks_to_match;
-
-	/* Now convert them to usec */
-	usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
-
-	return usec;
-}
-
-/*
- * We will be entered with IRQs enabled.
- *
- * Loop until we get ahead of the free running timer.
- * This ensures an exact clock tick count and time accuracy.
- * IRQs are disabled inside the loop to ensure coherence between
- * lost_ticks (updated in do_timer()) and the match reg value, so we
- * can use do_gettimeofday() from interrupt handlers.
- */
-static irqreturn_t
-sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	unsigned int next_match;
-
-	do {
-		do_leds();
-		do_timer(regs);
-		OSSR = OSSR_M0;  /* Clear match on timer 0 */
-		next_match = (OSMR0 += LATCH);
-		do_set_rtc();
-	} while ((signed long)(next_match - OSCR) <= 0);
-
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-void __init time_init(void)
-{
-	struct timespec tv;
-
-	gettimeoffset = sa1100_gettimeoffset;
-	set_rtc = sa1100_set_rtc;
-
-	tv.tv_nsec = 0;
-	tv.tv_sec = sa1100_get_rtc_time();
-	do_settimeofday(&tv);
-
-	timer_irq.handler = sa1100_timer_interrupt;
-	OSMR0 = 0;		/* set initial match at 0 */
-	OSSR = 0xf;		/* clear status on all timers */
-	setup_irq(IRQ_OST0, &timer_irq);
-	OIER |= OIER_E0;	/* enable match on timer 0 to cause interrupts */
-	OSCR = 0;		/* initialize free-running timer, force first match */
-}
-
diff --git a/include/asm-arm/arch-shark/time.h b/include/asm-arm/arch-shark/time.h
deleted file mode 100644
index 66e45254a628..000000000000
--- a/include/asm-arm/arch-shark/time.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * linux/include/asm-arm/arch-shark/time.h
- *
- * by Alexander Schulz
- *
- * derived from include/asm-arm/arch-ebsa110/time.h
- * Copyright (c) 1996,1997,1998 Russell King.
- */
-
-#include <asm/leds.h>
-#include <asm/param.h>
-
-#define IRQ_TIMER 0
-#define HZ_TIME ((1193180 + HZ/2) / HZ)
-
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	do_leds();
-	do_timer(regs);
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init time_init(void)
-{
-        unsigned long flags;
-
-	outb(0x34, 0x43);               /* binary, mode 0, LSB/MSB, Ch 0 */
-	outb(HZ_TIME & 0xff, 0x40);     /* LSB of count */
-	outb(HZ_TIME >> 8, 0x40);
-
-	timer_irq.handler = timer_interrupt;
-	setup_irq(IRQ_TIMER, &timer_irq);
-}
diff --git a/include/asm-arm/arch-versatile/time.h b/include/asm-arm/arch-versatile/time.h
deleted file mode 100644
index 7d97d9565a4b..000000000000
--- a/include/asm-arm/arch-versatile/time.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- *  linux/include/asm-arm/arch-versatile/time.h
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#include <asm/system.h>
-#include <asm/leds.h>
-
-/*
- * Where is the timer (VA)?
- */
-#define TIMER0_VA_BASE		 IO_ADDRESS(VERSATILE_TIMER0_1_BASE)
-#define TIMER1_VA_BASE		(IO_ADDRESS(VERSATILE_TIMER0_1_BASE) + 0x20)
-#define TIMER2_VA_BASE		 IO_ADDRESS(VERSATILE_TIMER2_3_BASE)
-#define TIMER3_VA_BASE		(IO_ADDRESS(VERSATILE_TIMER2_3_BASE) + 0x20)
-#define VA_IC_BASE		 IO_ADDRESS(VERSATILE_VIC_BASE) 
-
-/*
- * How long is the timer interval?
- */
-#define TIMER_INTERVAL	(TICKS_PER_uSEC * mSEC_10)
-#if TIMER_INTERVAL >= 0x100000
-#define TIMER_RELOAD	(TIMER_INTERVAL >> 8)		/* Divide by 256 */
-#define TIMER_CTRL	0x88				/* Enable, Clock / 256 */
-#define TICKS2USECS(x)	(256 * (x) / TICKS_PER_uSEC)
-#elif TIMER_INTERVAL >= 0x10000
-#define TIMER_RELOAD	(TIMER_INTERVAL >> 4)		/* Divide by 16 */
-#define TIMER_CTRL	0x84				/* Enable, Clock / 16 */
-#define TICKS2USECS(x)	(16 * (x) / TICKS_PER_uSEC)
-#else
-#define TIMER_RELOAD	(TIMER_INTERVAL)
-#define TIMER_CTRL	0x80				/* Enable */
-#define TICKS2USECS(x)	((x) / TICKS_PER_uSEC)
-#endif
-
-#define TIMER_CTRL_IE	(1 << 5)	/* Interrupt Enable */
-
-/*
- * What does it look like?
- */
-typedef struct TimerStruct {
-	unsigned long TimerLoad;
-	unsigned long TimerValue;
-	unsigned long TimerControl;
-	unsigned long TimerClear;
-} TimerStruct_t;
-
-extern unsigned long (*gettimeoffset)(void);
-
-/*
- * Returns number of ms since last clock interrupt.  Note that interrupts
- * will have been disabled by do_gettimeoffset()
- */
-static unsigned long versatile_gettimeoffset(void)
-{
-	volatile TimerStruct_t *timer0 = (TimerStruct_t *)TIMER0_VA_BASE;
-	unsigned long ticks1, ticks2, status;
-
-	/*
-	 * Get the current number of ticks.  Note that there is a race
-	 * condition between us reading the timer and checking for
-	 * an interrupt.  We get around this by ensuring that the
-	 * counter has not reloaded between our two reads.
-	 */
-	ticks2 = timer0->TimerValue & 0xffff;
-	do {
-		ticks1 = ticks2;
-		status = __raw_readl(VA_IC_BASE + VIC_IRQ_RAW_STATUS);
-		ticks2 = timer0->TimerValue & 0xffff;
-	} while (ticks2 > ticks1);
-
-	/*
-	 * Number of ticks since last interrupt.
-	 */
-	ticks1 = TIMER_RELOAD - ticks2;
-
-	/*
-	 * Interrupt pending?  If so, we've reloaded once already.
-	 *
-	 * FIXME: Need to check this is effectively timer 0 that expires
-	 */
-	if (status & IRQMASK_TIMERINT0_1)
-		ticks1 += TIMER_RELOAD;
-
-	/*
-	 * Convert the ticks to usecs
-	 */
-	return TICKS2USECS(ticks1);
-}
-
-/*
- * IRQ handler for the timer
- */
-static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
-{
-	volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
-
-	// ...clear the interrupt
-	timer0->TimerClear = 1;
-
-	do_leds();
-	do_timer(regs);
-	do_profile(regs);
-
-	return IRQ_HANDLED;
-}
-
-/*
- * Set up timer interrupt, and return the current time in seconds.
- */
-void __init time_init(void)
-{
-	volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
-	volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
-	volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE;
-	volatile TimerStruct_t *timer3 = (volatile TimerStruct_t *)TIMER3_VA_BASE;
-
-	/* 
-	 * set clock frequency: 
-	 *	VERSATILE_REFCLK is 32KHz
-	 *	VERSATILE_TIMCLK is 1MHz
-	 */
-	*(volatile unsigned int *)IO_ADDRESS(VERSATILE_SCTL_BASE) |= 
-	  ((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | 
-	   (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) | (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel));
-
-	timer_irq.handler = versatile_timer_interrupt;
-
-	/*
-	 * Initialise to a known state (all timers off)
-	 */
-	timer0->TimerControl = 0;
-	timer1->TimerControl = 0;
-	timer2->TimerControl = 0;
-	timer3->TimerControl = 0;
-
-	timer0->TimerLoad    = TIMER_RELOAD;
-	timer0->TimerValue   = TIMER_RELOAD;
-	timer0->TimerControl = TIMER_CTRL | 0x40 | TIMER_CTRL_IE;  /* periodic + IE */
-
-	/* 
-	 * Make irqs happen for the system timer
-	 */
-	setup_irq(IRQ_TIMERINT0_1, &timer_irq);
-	gettimeoffset = versatile_gettimeoffset;
-}
diff --git a/include/asm-arm/checksum.h b/include/asm-arm/checksum.h
index daa0f4e0abbf..f82f595c75af 100644
--- a/include/asm-arm/checksum.h
+++ b/include/asm-arm/checksum.h
@@ -9,6 +9,8 @@
 #ifndef __ASM_ARM_CHECKSUM_H
 #define __ASM_ARM_CHECKSUM_H
 
+#include <linux/in6.h>
+
 /*
  * computes the checksum of a memory block at buff, length len,
  * and adds in "sum" (32-bit)
diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h
index 00f936197ad9..ff48022e4720 100644
--- a/include/asm-arm/cpu-multi32.h
+++ b/include/asm-arm/cpu-multi32.h
@@ -7,9 +7,6 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#ifndef __ASSEMBLY__
-
-#include <asm/memory.h>
 #include <asm/page.h>
 
 struct mm_struct;
@@ -64,16 +61,4 @@ extern struct processor {
 #define cpu_do_idle()			processor._do_idle()
 #define cpu_dcache_clean_area(addr,sz)	processor.dcache_clean_area(addr,sz)
 #define cpu_set_pte(ptep, pte)		processor.set_pte(ptep, pte)
-
-#define cpu_switch_mm(pgd,mm)	processor.switch_mm(__virt_to_phys((unsigned long)(pgd)),mm)
-
-#define cpu_get_pgd()	\
-	({						\
-		unsigned long pg;			\
-		__asm__("mrc	p15, 0, %0, c2, c0, 0"	\
-			 : "=r" (pg) : : "cc");		\
-		pg &= ~0x3fff;				\
-		(pgd_t *)phys_to_virt(pg);		\
-	})
-
-#endif
+#define cpu_do_switch_mm(pgd,mm)	processor.switch_mm(pgd,mm)
diff --git a/include/asm-arm/cpu-single.h b/include/asm-arm/cpu-single.h
index cc213ad7167f..b5ec5d54665d 100644
--- a/include/asm-arm/cpu-single.h
+++ b/include/asm-arm/cpu-single.h
@@ -27,12 +27,9 @@
 #define cpu_reset			__cpu_fn(CPU_NAME,_reset)
 #define cpu_do_idle			__cpu_fn(CPU_NAME,_do_idle)
 #define cpu_dcache_clean_area		__cpu_fn(CPU_NAME,_dcache_clean_area)
-#define cpu__switch_mm			__cpu_fn(CPU_NAME,_switch_mm)
+#define cpu_do_switch_mm		__cpu_fn(CPU_NAME,_switch_mm)
 #define cpu_set_pte			__cpu_fn(CPU_NAME,_set_pte)
 
-#ifndef __ASSEMBLY__
-
-#include <asm/memory.h>
 #include <asm/page.h>
 
 struct mm_struct;
@@ -42,20 +39,6 @@ extern void cpu_proc_init(void);
 extern void cpu_proc_fin(void);
 extern int cpu_do_idle(void);
 extern void cpu_dcache_clean_area(void *, int);
-extern void cpu__switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
+extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
 extern void cpu_set_pte(pte_t *ptep, pte_t pte);
-
 extern volatile void cpu_reset(unsigned long addr);
-
-#define cpu_switch_mm(pgd,mm) cpu__switch_mm(__virt_to_phys((unsigned long)(pgd)),mm)
-
-#define cpu_get_pgd()	\
-	({						\
-		unsigned long pg;			\
-		__asm__("mrc	p15, 0, %0, c2, c0, 0"	\
-			 : "=r" (pg) : : "cc");		\
-		pg &= ~0x3fff;				\
-		(pgd_t *)phys_to_virt(pg);		\
-	})
-
-#endif
diff --git a/include/asm-arm/cpumask.h b/include/asm-arm/cpumask.h
deleted file mode 100644
index e3cf01fdf9c9..000000000000
--- a/include/asm-arm/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_ARM_CPUMASK_H
-#define _ASM_ARM_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_ARM_CPUMASK_H */
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index d751faf725de..37ae74796331 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -45,6 +45,7 @@ struct machine_desc {
 					 struct meminfo *);
 	void			(*map_io)(void);/* IO mapping function	*/
 	void			(*init_irq)(void);
+	void			(*init_time)(void);
 	void			(*init_machine)(void);
 };
 
@@ -87,6 +88,9 @@ const struct machine_desc __mach_desc_##_type	\
 #define INITIRQ(_func)				\
 	.init_irq	= _func,
 
+#define INITTIME(_func)				\
+	.init_time	= _func,
+
 #define INIT_MACHINE(_func)			\
 	.init_machine	= _func,
 
diff --git a/include/asm-arm/mach/time.h b/include/asm-arm/mach/time.h
new file mode 100644
index 000000000000..edb6fcc6a200
--- /dev/null
+++ b/include/asm-arm/mach/time.h
@@ -0,0 +1,20 @@
+/*
+ * linux/include/asm-arm/mach/time.h
+ *
+ * Copyright (C) 2004 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_ARM_MACH_TIME_H
+#define __ASM_ARM_MACH_TIME_H
+
+extern void (*init_arch_time)(void);
+
+extern int (*set_rtc)(void);
+extern unsigned long(*gettimeoffset)(void);
+
+void timer_tick(struct pt_regs *);
+
+#endif
diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h
index 9599c6e2f55a..7bef2bf6be51 100644
--- a/include/asm-arm/proc-fns.h
+++ b/include/asm-arm/proc-fns.h
@@ -148,11 +148,27 @@
 # endif
 #endif
 
+#ifndef __ASSEMBLY__
+
 #ifndef MULTI_CPU
 #include "asm/cpu-single.h"
 #else
 #include "asm/cpu-multi32.h"
 #endif
 
+#include <asm/memory.h>
+
+#define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm)
+
+#define cpu_get_pgd()	\
+	({						\
+		unsigned long pg;			\
+		__asm__("mrc	p15, 0, %0, c2, c0, 0"	\
+			 : "=r" (pg) : : "cc");		\
+		pg &= ~0x3fff;				\
+		(pgd_t *)phys_to_virt(pg);		\
+	})
+
+#endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* __ASM_PROCFNS_H */
diff --git a/include/asm-arm26/cpumask.h b/include/asm-arm26/cpumask.h
deleted file mode 100644
index d181df4ed512..000000000000
--- a/include/asm-arm26/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_ARM26_CPUMASK_H
-#define _ASM_ARM26_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_ARM26_CPUMASK_H */
diff --git a/include/asm-cris/cpumask.h b/include/asm-cris/cpumask.h
deleted file mode 100644
index 123b032a6eae..000000000000
--- a/include/asm-cris/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_CRIS_CPUMASK_H
-#define _ASM_CRIS_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_CRIS_CPUMASK_H */
diff --git a/include/asm-cris/setup.h b/include/asm-cris/setup.h
index 832c197edf48..b90728652d1a 100644
--- a/include/asm-cris/setup.h
+++ b/include/asm-cris/setup.h
@@ -1,3 +1,6 @@
 #ifndef _CRIS_SETUP_H
 #define _CRIS_SETUP_H
+
+#define COMMAND_LINE_SIZE	256
+
 #endif
diff --git a/include/asm-generic/bitops.h b/include/asm-generic/bitops.h
index 23ac5227b702..ce31b739fd80 100644
--- a/include/asm-generic/bitops.h
+++ b/include/asm-generic/bitops.h
@@ -42,7 +42,7 @@ extern __inline__ int clear_bit(int nr, long * addr)
 	return retval;
 }
 
-extern __inline__ int test_bit(int nr, long * addr)
+extern __inline__ int test_bit(int nr, const unsigned long * addr)
 {
 	int	mask;
 
diff --git a/include/asm-generic/cpumask.h b/include/asm-generic/cpumask.h
deleted file mode 100644
index a5103259d7a9..000000000000
--- a/include/asm-generic/cpumask.h
+++ /dev/null
@@ -1,40 +0,0 @@
-#ifndef __ASM_GENERIC_CPUMASK_H
-#define __ASM_GENERIC_CPUMASK_H
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/threads.h>
-#include <linux/types.h>
-#include <linux/bitmap.h>
-
-#if NR_CPUS > BITS_PER_LONG && NR_CPUS != 1
-#define CPU_ARRAY_SIZE		BITS_TO_LONGS(NR_CPUS)
-
-struct cpumask
-{
-	unsigned long mask[CPU_ARRAY_SIZE];
-};
-
-typedef struct cpumask cpumask_t;
-
-#else
-typedef unsigned long cpumask_t;
-#endif
-
-#ifdef CONFIG_SMP
-#if NR_CPUS > BITS_PER_LONG
-#include <asm-generic/cpumask_array.h>
-#else
-#include <asm-generic/cpumask_arith.h>
-#endif
-#else
-#include <asm-generic/cpumask_up.h>
-#endif
-
-#if NR_CPUS <= 4*BITS_PER_LONG
-#include <asm-generic/cpumask_const_value.h>
-#else
-#include <asm-generic/cpumask_const_reference.h>
-#endif
-
-#endif /* __ASM_GENERIC_CPUMASK_H */
diff --git a/include/asm-generic/cpumask_arith.h b/include/asm-generic/cpumask_arith.h
deleted file mode 100644
index b4d25ac46a9f..000000000000
--- a/include/asm-generic/cpumask_arith.h
+++ /dev/null
@@ -1,49 +0,0 @@
-#ifndef __ASM_GENERIC_CPUMASK_ARITH_H
-#define __ASM_GENERIC_CPUMASK_ARITH_H
-
-/*
- * Arithmetic type -based cpu bitmaps. A single unsigned long is used
- * to contain the whole cpu bitmap.
- */
-
-#define cpu_set(cpu, map)		set_bit(cpu, &(map))
-#define cpu_clear(cpu, map)		clear_bit(cpu, &(map))
-#define cpu_isset(cpu, map)		test_bit(cpu, &(map))
-#define cpu_test_and_set(cpu, map)	test_and_set_bit(cpu, &(map))
-
-#define cpus_and(dst,src1,src2)		do { dst = (src1) & (src2); } while (0)
-#define cpus_or(dst,src1,src2)		do { dst = (src1) | (src2); } while (0)
-#define cpus_clear(map)			do { map = 0; } while (0)
-#define cpus_complement(map)		do { map = ~(map); } while (0)
-#define cpus_equal(map1, map2)		((map1) == (map2))
-#define cpus_empty(map)			((map) == 0)
-#define cpus_addr(map)			(&(map))
-
-#if BITS_PER_LONG == 32
-#define cpus_weight(map)		hweight32(map)
-#elif BITS_PER_LONG == 64
-#define cpus_weight(map)		hweight64(map)
-#endif
-
-#define cpus_shift_right(dst, src, n)	do { dst = (src) >> (n); } while (0)
-#define cpus_shift_left(dst, src, n)	do { dst = (src) << (n); } while (0)
-
-#define any_online_cpu(map)			\
-({						\
-	cpumask_t __tmp__;			\
-	cpus_and(__tmp__, map, cpu_online_map);	\
-	__tmp__ ? first_cpu(__tmp__) : NR_CPUS;	\
-})
-
-#define CPU_MASK_ALL	(~((cpumask_t)0) >> (8*sizeof(cpumask_t) - NR_CPUS))
-#define CPU_MASK_NONE	((cpumask_t)0)
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_coerce(map)		((unsigned long)(map))
-#define cpus_promote(map)		({ map; })
-#define cpumask_of_cpu(cpu)		({ ((cpumask_t)1) << (cpu); })
-
-#define first_cpu(map)			find_first_bit(&(map), NR_CPUS)
-#define next_cpu(cpu, map)		find_next_bit(&(map), NR_CPUS, cpu + 1)
-
-#endif /* __ASM_GENERIC_CPUMASK_ARITH_H */
diff --git a/include/asm-generic/cpumask_array.h b/include/asm-generic/cpumask_array.h
deleted file mode 100644
index ddd6e1185dba..000000000000
--- a/include/asm-generic/cpumask_array.h
+++ /dev/null
@@ -1,54 +0,0 @@
-#ifndef __ASM_GENERIC_CPUMASK_ARRAY_H
-#define __ASM_GENERIC_CPUMASK_ARRAY_H
-
-/*
- * Array-based cpu bitmaps. An array of unsigned longs is used to contain
- * the bitmap, and then contained in a structure so it may be passed by
- * value.
- */
-
-#define CPU_ARRAY_SIZE		BITS_TO_LONGS(NR_CPUS)
-
-#define cpu_set(cpu, map)		set_bit(cpu, (map).mask)
-#define cpu_clear(cpu, map)		clear_bit(cpu, (map).mask)
-#define cpu_isset(cpu, map)		test_bit(cpu, (map).mask)
-#define cpu_test_and_set(cpu, map)	test_and_set_bit(cpu, (map).mask)
-
-#define cpus_and(dst,src1,src2)	bitmap_and((dst).mask,(src1).mask, (src2).mask, NR_CPUS)
-#define cpus_or(dst,src1,src2)	bitmap_or((dst).mask, (src1).mask, (src2).mask, NR_CPUS)
-#define cpus_clear(map)		bitmap_zero((map).mask, NR_CPUS)
-#define cpus_complement(map)	bitmap_complement((map).mask, NR_CPUS)
-#define cpus_equal(map1, map2)	bitmap_equal((map1).mask, (map2).mask, NR_CPUS)
-#define cpus_empty(map)		bitmap_empty(map.mask, NR_CPUS)
-#define cpus_addr(map)		((map).mask)
-#define cpus_weight(map)		bitmap_weight((map).mask, NR_CPUS)
-#define cpus_shift_right(d, s, n)	bitmap_shift_right((d).mask, (s).mask, n, NR_CPUS)
-#define cpus_shift_left(d, s, n)	bitmap_shift_left((d).mask, (s).mask, n, NR_CPUS)
-#define first_cpu(map)		find_first_bit((map).mask, NR_CPUS)
-#define next_cpu(cpu, map)	find_next_bit((map).mask, NR_CPUS, cpu + 1)
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_coerce(map)	((map).mask[0])
-#define cpus_promote(map)	({ cpumask_t __cpu_mask = CPU_MASK_NONE;\
-					__cpu_mask.mask[0] = map;	\
-					__cpu_mask;			\
-				})
-#define cpumask_of_cpu(cpu)	({ cpumask_t __cpu_mask = CPU_MASK_NONE;\
-					cpu_set(cpu, __cpu_mask);	\
-					__cpu_mask;			\
-				})
-#define any_online_cpu(map)			\
-({						\
-	cpumask_t __tmp__;			\
-	cpus_and(__tmp__, map, cpu_online_map);	\
-	find_first_bit(__tmp__.mask, NR_CPUS);	\
-})
-
-
-/*
- * um, these need to be usable as static initializers
- */
-#define CPU_MASK_ALL	((cpumask_t) { {[0 ... CPU_ARRAY_SIZE-1] = ~0UL} })
-#define CPU_MASK_NONE	((cpumask_t) { {[0 ... CPU_ARRAY_SIZE-1] =  0UL} })
-
-#endif /* __ASM_GENERIC_CPUMASK_ARRAY_H */
diff --git a/include/asm-generic/cpumask_const_reference.h b/include/asm-generic/cpumask_const_reference.h
deleted file mode 100644
index e98da01bcfdf..000000000000
--- a/include/asm-generic/cpumask_const_reference.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H
-#define __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H
-
-struct cpumask_ref {
-	const cpumask_t *val;
-};
-
-typedef const struct cpumask_ref cpumask_const_t;
-
-#define mk_cpumask_const(map)		((cpumask_const_t){ &(map) })
-#define cpu_isset_const(cpu, map)	cpu_isset(cpu, *(map).val)
-
-#define cpus_and_const(dst,src1,src2)	cpus_and(dst,*(src1).val,*(src2).val)
-#define cpus_or_const(dst,src1,src2)	cpus_or(dst,*(src1).val,*(src2).val)
-
-#define cpus_equal_const(map1, map2)	cpus_equal(*(map1).val, *(map2).val)
-
-#define cpus_copy_const(map1, map2)	bitmap_copy((map1).mask, (map2).val->mask, NR_CPUS)
-
-#define cpus_empty_const(map)		cpus_empty(*(map).val)
-#define cpus_weight_const(map)		cpus_weight(*(map).val)
-#define first_cpu_const(map)		first_cpu(*(map).val)
-#define next_cpu_const(cpu, map)	next_cpu(cpu, *(map).val)
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_coerce_const(map)		cpus_coerce(*(map).val)
-#define any_online_cpu_const(map)	any_online_cpu(*(map).val)
-
-#endif /* __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H */
diff --git a/include/asm-generic/cpumask_const_value.h b/include/asm-generic/cpumask_const_value.h
deleted file mode 100644
index 16ca16d286dc..000000000000
--- a/include/asm-generic/cpumask_const_value.h
+++ /dev/null
@@ -1,21 +0,0 @@
-#ifndef __ASM_GENERIC_CPUMASK_CONST_VALUE_H
-#define __ASM_GENERIC_CPUMASK_CONST_VALUE_H
-
-typedef const cpumask_t cpumask_const_t;
-
-#define mk_cpumask_const(map)		(map)
-#define cpu_isset_const(cpu, map)	cpu_isset(cpu, map)
-#define cpus_and_const(dst,src1,src2)	cpus_and(dst, src1, src2)
-#define cpus_or_const(dst,src1,src2)	cpus_or(dst, src1, src2)
-#define cpus_equal_const(map1, map2)	cpus_equal(map1, map2)
-#define cpus_empty_const(map)		cpus_empty(map)
-#define cpus_copy_const(map1, map2)	do { map1 = (cpumask_t)map2; } while (0)
-#define cpus_weight_const(map)		cpus_weight(map)
-#define first_cpu_const(map)		first_cpu(map)
-#define next_cpu_const(cpu, map)	next_cpu(cpu, map)
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_coerce_const(map)		cpus_coerce(map)
-#define any_online_cpu_const(map)	any_online_cpu(map)
-
-#endif /* __ASM_GENERIC_CPUMASK_CONST_VALUE_H */
diff --git a/include/asm-generic/cpumask_up.h b/include/asm-generic/cpumask_up.h
deleted file mode 100644
index f55c265a0e3b..000000000000
--- a/include/asm-generic/cpumask_up.h
+++ /dev/null
@@ -1,59 +0,0 @@
-#ifndef __ASM_GENERIC_CPUMASK_UP_H
-#define __ASM_GENERIC_CPUMASK_UP_H
-
-#define cpus_coerce(map)	(map)
-
-#define cpu_set(cpu, map)		do { (void)(cpu); cpus_coerce(map) = 1UL; } while (0)
-#define cpu_clear(cpu, map)		do { (void)(cpu); cpus_coerce(map) = 0UL; } while (0)
-#define cpu_isset(cpu, map)		((void)(cpu), cpus_coerce(map) != 0UL)
-#define cpu_test_and_set(cpu, map)	((void)(cpu), test_and_set_bit(0, &(map)))
-
-#define cpus_and(dst, src1, src2)					\
-	do {								\
-		if (cpus_coerce(src1) && cpus_coerce(src2))		\
-			cpus_coerce(dst) = 1UL;				\
-		else							\
-			cpus_coerce(dst) = 0UL;				\
-	} while (0)
-
-#define cpus_or(dst, src1, src2)					\
-	do {								\
-		if (cpus_coerce(src1) || cpus_coerce(src2))		\
-			cpus_coerce(dst) = 1UL;				\
-		else							\
-			cpus_coerce(dst) = 0UL;				\
-	} while (0)
-
-#define cpus_clear(map)			do { cpus_coerce(map) = 0UL; } while (0)
-
-#define cpus_complement(map)						\
-	do {								\
-		cpus_coerce(map) = !cpus_coerce(map);			\
-	} while (0)
-
-#define cpus_equal(map1, map2)		(cpus_coerce(map1) == cpus_coerce(map2))
-#define cpus_empty(map)			(cpus_coerce(map) == 0UL)
-#define cpus_addr(map)			(&(map))
-#define cpus_weight(map)		(cpus_coerce(map) ? 1UL : 0UL)
-#define cpus_shift_right(d, s, n)	do { cpus_coerce(d) = 0UL; } while (0)
-#define cpus_shift_left(d, s, n)	do { cpus_coerce(d) = 0UL; } while (0)
-#define first_cpu(map)			(cpus_coerce(map) ? 0 : 1)
-#define next_cpu(cpu, map)		1
-
-/* only ever use this for things that are _never_ used on large boxen */
-#define cpus_promote(map)						\
-	({								\
-		cpumask_t __tmp__;					\
-		cpus_coerce(__tmp__) = map;				\
-		__tmp__;						\
-	})
-#define cpumask_of_cpu(cpu)		((void)(cpu), cpus_promote(1))
-#define any_online_cpu(map)		(cpus_coerce(map) ? 0 : 1)
-
-/*
- * um, these need to be usable as static initializers
- */
-#define CPU_MASK_ALL	1UL
-#define CPU_MASK_NONE	0UL
-
-#endif /* __ASM_GENERIC_CPUMASK_UP_H */
diff --git a/include/asm-h8300/cpumask.h b/include/asm-h8300/cpumask.h
deleted file mode 100644
index 3b403850c043..000000000000
--- a/include/asm-h8300/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_H8300_CPUMASK_H
-#define _ASM_H8300_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_H8300_CPUMASK_H */
diff --git a/include/asm-h8300/h8300_ne.h b/include/asm-h8300/h8300_ne.h
deleted file mode 100644
index c797603f3819..000000000000
--- a/include/asm-h8300/h8300_ne.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/****************************************************************************/
-
-/*
- *	h8300_ne.h -- NE2000 in H8/300H Evalution Board.
- *      
- *	(C) Copyright 2002, Yoshinori Sato <ysato@users.sourceforge.jp>
- */
-
-/****************************************************************************/
-#ifndef	h8300ne_h
-#define	h8300ne_h
-/****************************************************************************/
-
-#define H8300_NE_DEFINE
-#include <asm/machine-depend.h>
-#define NE2000_IRQ_VECTOR	(12 + NE2000_IRQ)
-#undef  H8300_NE_DEFINE
-
-/****************************************************************************/
-#endif	/* h8300ne_h */
diff --git a/include/asm-h8300/setup.h b/include/asm-h8300/setup.h
index 4fc416e80bef..e2c600e96733 100644
--- a/include/asm-h8300/setup.h
+++ b/include/asm-h8300/setup.h
@@ -1 +1,6 @@
-/* Nothing do */
+#ifndef __H8300_SETUP_H
+#define __H8300_SETUP_H
+
+#define COMMAND_LINE_SIZE	512
+
+#endif
diff --git a/include/asm-i386/cpumask.h b/include/asm-i386/cpumask.h
deleted file mode 100644
index 8bf5a829c528..000000000000
--- a/include/asm-i386/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_I386_CPUMASK_H
-#define _ASM_I386_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_I386_CPUMASK_H */
diff --git a/include/asm-i386/genapic.h b/include/asm-i386/genapic.h
index d62ac259622c..fc813b2e8274 100644
--- a/include/asm-i386/genapic.h
+++ b/include/asm-i386/genapic.h
@@ -62,7 +62,7 @@ struct genapic {
 
 	unsigned (*get_apic_id)(unsigned long x);
 	unsigned long apic_id_mask;
-	unsigned int (*cpu_mask_to_apicid)(cpumask_const_t cpumask);
+	unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
 	
 	/* ipi */
 	void (*send_IPI_mask)(cpumask_t mask, int vector);
diff --git a/include/asm-i386/mach-bigsmp/mach_apic.h b/include/asm-i386/mach-bigsmp/mach_apic.h
index ab60c85a5c08..2339868270ef 100644
--- a/include/asm-i386/mach-bigsmp/mach_apic.h
+++ b/include/asm-i386/mach-bigsmp/mach_apic.h
@@ -28,11 +28,11 @@ static inline cpumask_t target_cpus(void)
 	static unsigned long cpu = NR_CPUS;
 	do {
 		if (cpu >= NR_CPUS)
-			cpu = first_cpu_const(cpu_online_map);
+			cpu = first_cpu(cpu_online_map);
 		else
-			cpu = next_cpu_const(cpu, cpu_online_map);
+			cpu = next_cpu(cpu, cpu_online_map);
 	} while (cpu >= NR_CPUS);
-	return mk_cpumask_const(cpumask_of_cpu(cpu));
+	return cpumask_of_cpu(cpu);
 }
 #define TARGET_CPUS	(target_cpus())
 
@@ -149,12 +149,12 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
 }
 
 /* As we are using single CPU as destination, pick only one CPU here */
-static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 {
 	int cpu;
 	int apicid;	
 
-	cpu = first_cpu_const(cpumask);
+	cpu = first_cpu(cpumask);
 	apicid = cpu_to_logical_apicid(cpu);
 	return apicid;
 }
diff --git a/include/asm-i386/mach-default/mach_apic.h b/include/asm-i386/mach-default/mach_apic.h
index 87f688705979..627f1cd084ba 100644
--- a/include/asm-i386/mach-default/mach_apic.h
+++ b/include/asm-i386/mach-default/mach_apic.h
@@ -6,12 +6,12 @@
 
 #define APIC_DFR_VALUE	(APIC_DFR_FLAT)
 
-static inline cpumask_const_t target_cpus(void)
+static inline cpumask_t target_cpus(void)
 { 
 #ifdef CONFIG_SMP
-	return mk_cpumask_const(cpu_online_map);
+	return cpu_online_map;
 #else
-	return mk_cpumask_const(cpumask_of_cpu(0));
+	return cpumask_of_cpu(0);
 #endif
 } 
 #define TARGET_CPUS (target_cpus())
@@ -116,9 +116,9 @@ static inline int apic_id_registered(void)
 	return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map);
 }
 
-static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 {
-	return cpus_coerce_const(cpumask);
+	return cpus_addr(cpumask)[0];
 }
 
 static inline void enable_apic_mode(void)
diff --git a/include/asm-i386/mach-es7000/mach_apic.h b/include/asm-i386/mach-es7000/mach_apic.h
index fd0430c77565..888f7f04262d 100644
--- a/include/asm-i386/mach-es7000/mach_apic.h
+++ b/include/asm-i386/mach-es7000/mach_apic.h
@@ -88,7 +88,7 @@ static inline void clustered_apic_check(void)
 	int apic = bios_cpu_apicid[smp_processor_id()];
 	printk("Enabling APIC mode:  %s.  Using %d I/O APICs, target cpus %lx\n",
 		(apic_version[apic] == 0x14) ? 
-		"Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_coerce(TARGET_CPUS));
+		"Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);
 }
 
 static inline int multi_timer_check(int apic, int irq)
@@ -158,14 +158,14 @@ static inline int check_phys_apicid_present(int cpu_physical_apicid)
 	return (1);
 }
 
-static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 {
 	int num_bits_set;
 	int cpus_found = 0;
 	int cpu;
 	int apicid;	
 
-	num_bits_set = cpus_weight_const(cpumask);
+	num_bits_set = cpus_weight(cpumask);
 	/* Return id to all */
 	if (num_bits_set == NR_CPUS)
 #if defined CONFIG_ES7000_CLUSTERED_APIC
@@ -177,10 +177,10 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
 	 * The cpus in the mask must all be on the apic cluster.  If are not 
 	 * on the same apicid cluster return default value of TARGET_CPUS. 
 	 */
-	cpu = first_cpu_const(cpumask);
+	cpu = first_cpu(cpumask);
 	apicid = cpu_to_logical_apicid(cpu);
 	while (cpus_found < num_bits_set) {
-		if (cpu_isset_const(cpu, cpumask)) {
+		if (cpu_isset(cpu, cpumask)) {
 			int new_apicid = cpu_to_logical_apicid(cpu);
 			if (apicid_cluster(apicid) != 
 					apicid_cluster(new_apicid)){
diff --git a/include/asm-i386/mach-es7000/mach_ipi.h b/include/asm-i386/mach-es7000/mach_ipi.h
index 6b7a56c1ddd5..cb8a2fdb5c59 100644
--- a/include/asm-i386/mach-es7000/mach_ipi.h
+++ b/include/asm-i386/mach-es7000/mach_ipi.h
@@ -10,9 +10,8 @@ static inline void send_IPI_mask(cpumask_t mask, int vector)
 
 static inline void send_IPI_allbutself(int vector)
 {
-	cpumask_t mask = cpumask_of_cpu(smp_processor_id());
-	cpus_complement(mask);
-	cpus_and(mask, mask, cpu_online_map);
+	cpumask_t mask = cpu_online_map;
+	cpu_clear(smp_processor_id(), mask);
 	if (!cpus_empty(mask))
 		send_IPI_mask(mask, vector);
 }
diff --git a/include/asm-i386/mach-numaq/mach_apic.h b/include/asm-i386/mach-numaq/mach_apic.h
index b66e78d7b6df..b852593a1c7b 100644
--- a/include/asm-i386/mach-numaq/mach_apic.h
+++ b/include/asm-i386/mach-numaq/mach_apic.h
@@ -8,8 +8,7 @@
 
 static inline cpumask_t target_cpus(void)
 {
-	cpumask_t tmp = CPU_MASK_ALL;
-	return tmp;
+	return CPU_MASK_ALL;
 }
 
 #define TARGET_CPUS (target_cpus())
@@ -135,7 +134,7 @@ static inline void enable_apic_mode(void)
  * We use physical apicids here, not logical, so just return the default
  * physical broadcast to stop people from breaking us
  */
-static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 {
 	return (int) 0xF;
 }
diff --git a/include/asm-i386/mach-summit/mach_apic.h b/include/asm-i386/mach-summit/mach_apic.h
index 9ea48a79d629..214263a48f71 100644
--- a/include/asm-i386/mach-summit/mach_apic.h
+++ b/include/asm-i386/mach-summit/mach_apic.h
@@ -19,8 +19,7 @@
 
 static inline cpumask_t target_cpus(void)
 {
-	cpumask_t tmp = CPU_MASK_ALL;
-	return tmp;
+	return CPU_MASK_ALL;
 } 
 #define TARGET_CPUS	(target_cpus())
 
@@ -139,14 +138,14 @@ static inline void enable_apic_mode(void)
 {
 }
 
-static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 {
 	int num_bits_set;
 	int cpus_found = 0;
 	int cpu;
 	int apicid;	
 
-	num_bits_set = cpus_weight_const(cpumask);
+	num_bits_set = cpus_weight(cpumask);
 	/* Return id to all */
 	if (num_bits_set == NR_CPUS)
 		return (int) 0xFF;
@@ -154,10 +153,10 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
 	 * The cpus in the mask must all be on the apic cluster.  If are not 
 	 * on the same apicid cluster return default value of TARGET_CPUS. 
 	 */
-	cpu = first_cpu_const(cpumask);
+	cpu = first_cpu(cpumask);
 	apicid = cpu_to_logical_apicid(cpu);
 	while (cpus_found < num_bits_set) {
-		if (cpu_isset_const(cpu, cpumask)) {
+		if (cpu_isset(cpu, cpumask)) {
 			int new_apicid = cpu_to_logical_apicid(cpu);
 			if (apicid_cluster(apicid) != 
 					apicid_cluster(new_apicid)){
diff --git a/include/asm-i386/mach-visws/mach_apic.h b/include/asm-i386/mach-visws/mach_apic.h
index 4b92eabb92ff..c367d820f23f 100644
--- a/include/asm-i386/mach-visws/mach_apic.h
+++ b/include/asm-i386/mach-visws/mach_apic.h
@@ -86,9 +86,9 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
 	return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
 }
 
-static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 {
-	return cpus_coerce_const(cpumask);
+	return cpus_addr(cpumask)[0];
 }
 
 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
diff --git a/include/asm-i386/mpspec.h b/include/asm-i386/mpspec.h
index b2cc2feeb8a4..8170e019af8d 100644
--- a/include/asm-i386/mpspec.h
+++ b/include/asm-i386/mpspec.h
@@ -53,7 +53,7 @@ typedef struct physid_mask physid_mask_t;
 #define physids_and(dst, src1, src2)		bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
 #define physids_or(dst, src1, src2)		bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
 #define physids_clear(map)			bitmap_zero((map).mask, MAX_APICS)
-#define physids_complement(map)			bitmap_complement((map).mask, MAX_APICS)
+#define physids_complement(dst, src)		bitmap_complement((dst).mask,(src).mask, MAX_APICS)
 #define physids_empty(map)			bitmap_empty((map).mask, MAX_APICS)
 #define physids_equal(map1, map2)		bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
 #define physids_weight(map)			bitmap_weight((map).mask, MAX_APICS)
diff --git a/include/asm-i386/param.h b/include/asm-i386/param.h
index e0a47502836d..b6440526e42a 100644
--- a/include/asm-i386/param.h
+++ b/include/asm-i386/param.h
@@ -18,5 +18,6 @@
 #endif
 
 #define MAXHOSTNAMELEN	64	/* max length of hostname */
+#define COMMAND_LINE_SIZE 256
 
 #endif
diff --git a/include/asm-i386/spinlock.h b/include/asm-i386/spinlock.h
index 8bd4f23a562e..d6dbfd469565 100644
--- a/include/asm-i386/spinlock.h
+++ b/include/asm-i386/spinlock.h
@@ -42,7 +42,6 @@ typedef struct {
 
 #define spin_is_locked(x)	(*(volatile signed char *)(&(x)->lock) <= 0)
 #define spin_unlock_wait(x)	do { barrier(); } while(spin_is_locked(x))
-#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock)
 
 #define spin_lock_string \
 	"\n1:\t" \
@@ -56,6 +55,23 @@ typedef struct {
 	"jmp 1b\n" \
 	LOCK_SECTION_END
 
+#define spin_lock_string_flags \
+	"\n1:\t" \
+	"lock ; decb %0\n\t" \
+	"js 2f\n\t" \
+	LOCK_SECTION_START("") \
+	"2:\t" \
+	"testl $0x200, %1\n\t" \
+	"jz 3f\n\t" \
+	"sti\n\t" \
+	"3:\t" \
+	"rep;nop\n\t" \
+	"cmpb $0, %0\n\t" \
+	"jle 3b\n\t" \
+	"cli\n\t" \
+	"jmp 1b\n" \
+	LOCK_SECTION_END
+
 /*
  * This works. Despite all the confusion.
  * (except on PPro SMP or if we are using OOSTORE)
@@ -126,6 +142,20 @@ here:
 		:"=m" (lock->lock) : : "memory");
 }
 
+static inline void _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags)
+{
+#ifdef CONFIG_DEBUG_SPINLOCK
+	__label__ here;
+here:
+	if (unlikely(lock->magic != SPINLOCK_MAGIC)) {
+		printk("eip: %p\n", &&here);
+		BUG();
+	}
+#endif
+	__asm__ __volatile__(
+		spin_lock_string_flags
+		:"=m" (lock->lock) : "r" (flags) : "memory");
+}
 
 /*
  * Read-write spinlocks, allowing multiple readers
diff --git a/include/asm-ia64/cpumask.h b/include/asm-ia64/cpumask.h
deleted file mode 100644
index 7764aef653e8..000000000000
--- a/include/asm-ia64/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_IA64_CPUMASK_H
-#define _ASM_IA64_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_IA64_CPUMASK_H */
diff --git a/include/asm-ia64/setup.h b/include/asm-ia64/setup.h
new file mode 100644
index 000000000000..ea29b57affcb
--- /dev/null
+++ b/include/asm-ia64/setup.h
@@ -0,0 +1,6 @@
+#ifndef __IA64_SETUP_H
+#define __IA64_SETUP_H
+
+#define COMMAND_LINE_SIZE	512
+
+#endif
diff --git a/include/asm-m68k/cpumask.h b/include/asm-m68k/cpumask.h
deleted file mode 100644
index b12450332e19..000000000000
--- a/include/asm-m68k/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_M68K_CPUMASK_H
-#define _ASM_M68K_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_M68K_CPUMASK_H */
diff --git a/include/asm-m68k/setup.h b/include/asm-m68k/setup.h
index 47b4627ef846..ce2762822a2b 100644
--- a/include/asm-m68k/setup.h
+++ b/include/asm-m68k/setup.h
@@ -357,6 +357,7 @@ extern int m68k_is040or060;
 
 #define NUM_MEMINFO	4
 #define CL_SIZE		256
+#define COMMAND_LINE_SIZE	CL_SIZE
 
 #ifndef __ASSEMBLY__
 extern int m68k_num_memory;		/* # of memory blocks found (and used) */
diff --git a/include/asm-m68knommu/cpumask.h b/include/asm-m68knommu/cpumask.h
deleted file mode 100644
index cd9cc78af838..000000000000
--- a/include/asm-m68knommu/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_M68KNOMMU_CPUMASK_H
-#define _ASM_M68KNOMMU_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_M68KNOMMU_CPUMASK_H */
diff --git a/include/asm-m68knommu/setup.h b/include/asm-m68knommu/setup.h
index ff4565ead5d7..d2b0fcce41b2 100644
--- a/include/asm-m68knommu/setup.h
+++ b/include/asm-m68knommu/setup.h
@@ -1 +1,5 @@
 #include <asm-m68k/setup.h>
+
+/* We have a bigger command line buffer. */
+#undef COMMAND_LINE_SIZE
+#define COMMAND_LINE_SIZE	512
diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
index c70f00d83364..37a460aa0378 100644
--- a/include/asm-mips/asmmacro.h
+++ b/include/asm-mips/asmmacro.h
@@ -9,6 +9,7 @@
 #define _ASM_ASMMACRO_H
  
 #include <linux/config.h>
+#include <asm/hazards.h>
  
 #ifdef CONFIG_MIPS32
 #include <asm/asmmacro-32.h>
@@ -21,6 +22,7 @@
 	mfc0	\reg, CP0_STATUS
 	ori	\reg, \reg, 1
 	mtc0	\reg, CP0_STATUS
+	irq_enable_hazard
 	.endm
 
 	.macro	local_irq_disable reg=t0
@@ -28,7 +30,7 @@
 	ori	\reg, \reg, 1
 	xori	\reg, \reg, 1
 	mtc0	\reg, CP0_STATUS
-	SSNOP; SSNOP; SSNOP
+	irq_disable_hazard
 	.endm
 
 #ifdef CONFIG_CPU_SB1
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h
index 1262c6eafb95..c8c6a5a8c5aa 100644
--- a/include/asm-mips/atomic.h
+++ b/include/asm-mips/atomic.h
@@ -9,7 +9,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1996, 97, 99, 2000, 03 by Ralf Baechle
+ * Copyright (C) 1996, 97, 99, 2000, 03, 04 by Ralf Baechle
  */
 
 /*
@@ -127,6 +127,32 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 	return result;
 }
 
+/*
+ * atomic_sub_if_positive - add integer to atomic variable
+ * @v: pointer of type atomic_t
+ *
+ * Atomically test @v and decrement if it is greater than 0.
+ * The function returns the old value of @v minus 1.
+ */
+static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
+{
+	unsigned long temp, result;
+
+	__asm__ __volatile__(
+	"1:	ll	%1, %2		# atomic_sub_if_positive\n"
+	"	subu	%0, %1, %3				\n"
+	"	bltz	%0, 1f					\n"
+	"	sc	%0, %2					\n"
+	"	beqz	%0, 1b					\n"
+	"	sync						\n"
+	"1:							\n"
+	: "=&r" (result), "=&r" (temp), "=m" (v->counter)
+	: "Ir" (i), "m" (v->counter)
+	: "memory");
+
+	return result;
+}
+
 #else
 
 /*
@@ -192,6 +218,28 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 	return temp;
 }
 
+/*
+ * atomic_sub_if_positive - add integer to atomic variable
+ * @v: pointer of type atomic_t
+ *
+ * Atomically test @v and decrement if it is greater than 0.
+ * The function returns the old value of @v minus 1.
+ */
+static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
+{
+	unsigned long flags;
+	int temp;
+
+	spin_lock_irqsave(&atomic_lock, flags);
+	temp = v->counter;
+	temp -= i;
+	if (temp >= 0)
+		v->counter = temp;
+	spin_unlock_irqrestore(&atomic_lock, flags);
+
+	return temp;
+}
+
 #endif /* CONFIG_CPU_HAS_LLSC */
 
 #define atomic_dec_return(v) atomic_sub_return(1,(v))
@@ -229,6 +277,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
 #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
 
 /*
+ * atomic_dec_if_positive - decrement by 1 if old value positive
+ * @v: pointer of type atomic_t
+ */
+#define atomic_dec_if_positive(v)	atomic_sub_if_positive(1, v)
+
+/*
  * atomic_inc - increment atomic variable
  * @v: pointer of type atomic_t
  *
@@ -284,7 +338,7 @@ typedef struct { volatile __s64 counter; } atomic64_t;
  *
  * Atomically adds @i to @v.
  */
-static __inline__ void atomic64_add(int i, atomic64_t * v)
+static __inline__ void atomic64_add(long i, atomic64_t * v)
 {
 	unsigned long temp;
 
@@ -304,7 +358,7 @@ static __inline__ void atomic64_add(int i, atomic64_t * v)
  *
  * Atomically subtracts @i from @v.
  */
-static __inline__ void atomic64_sub(int i, atomic64_t * v)
+static __inline__ void atomic64_sub(long i, atomic64_t * v)
 {
 	unsigned long temp;
 
@@ -320,7 +374,7 @@ static __inline__ void atomic64_sub(int i, atomic64_t * v)
 /*
  * Same as above, but return the result value
  */
-static __inline__ int atomic64_add_return(int i, atomic64_t * v)
+static __inline__ long atomic64_add_return(long i, atomic64_t * v)
 {
 	unsigned long temp, result;
 
@@ -338,7 +392,7 @@ static __inline__ int atomic64_add_return(int i, atomic64_t * v)
 	return result;
 }
 
-static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
+static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
 {
 	unsigned long temp, result;
 
@@ -356,6 +410,32 @@ static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
 	return result;
 }
 
+/*
+ * atomic64_sub_if_positive - add integer to atomic variable
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically test @v and decrement if it is greater than 0.
+ * The function returns the old value of @v minus 1.
+ */
+static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
+{
+	unsigned long temp, result;
+
+	__asm__ __volatile__(
+	"1:	lld	%1, %2		# atomic64_sub_if_positive\n"
+	"	dsubu	%0, %1, %3				\n"
+	"	bltz	%0, 1f					\n"
+	"	scd	%0, %2					\n"
+	"	beqz	%0, 1b					\n"
+	"	sync						\n"
+	"1:							\n"
+	: "=&r" (result), "=&r" (temp), "=m" (v->counter)
+	: "Ir" (i), "m" (v->counter)
+	: "memory");
+
+	return result;
+}
+
 #else
 
 /*
@@ -368,7 +448,7 @@ static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
  *
  * Atomically adds @i to @v.
  */
-static __inline__ void atomic64_add(int i, atomic64_t * v)
+static __inline__ void atomic64_add(long i, atomic64_t * v)
 {
 	unsigned long flags;
 
@@ -384,7 +464,7 @@ static __inline__ void atomic64_add(int i, atomic64_t * v)
  *
  * Atomically subtracts @i from @v.
  */
-static __inline__ void atomic64_sub(int i, atomic64_t * v)
+static __inline__ void atomic64_sub(long i, atomic64_t * v)
 {
 	unsigned long flags;
 
@@ -393,10 +473,10 @@ static __inline__ void atomic64_sub(int i, atomic64_t * v)
 	spin_unlock_irqrestore(&atomic_lock, flags);
 }
 
-static __inline__ int atomic64_add_return(int i, atomic64_t * v)
+static __inline__ long atomic64_add_return(long i, atomic64_t * v)
 {
 	unsigned long flags;
-	int temp;
+	long temp;
 
 	spin_lock_irqsave(&atomic_lock, flags);
 	temp = v->counter;
@@ -407,10 +487,10 @@ static __inline__ int atomic64_add_return(int i, atomic64_t * v)
 	return temp;
 }
 
-static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
+static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
 {
 	unsigned long flags;
-	int temp;
+	long temp;
 
 	spin_lock_irqsave(&atomic_lock, flags);
 	temp = v->counter;
@@ -421,6 +501,28 @@ static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
 	return temp;
 }
 
+/*
+ * atomic64_sub_if_positive - add integer to atomic variable
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically test @v and decrement if it is greater than 0.
+ * The function returns the old value of @v minus 1.
+ */
+static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
+{
+	unsigned long flags;
+	long temp;
+
+	spin_lock_irqsave(&atomic_lock, flags);
+	temp = v->counter;
+	temp -= i;
+	if (temp >= 0)
+		v->counter = temp;
+	spin_unlock_irqrestore(&atomic_lock, flags);
+
+	return temp;
+}
+
 #endif /* CONFIG_CPU_HAS_LLDSCD */
 
 #define atomic64_dec_return(v) atomic64_sub_return(1,(v))
@@ -458,6 +560,12 @@ static __inline__ int atomic64_sub_return(int i, atomic64_t * v)
 #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0)
 
 /*
+ * atomic64_dec_if_positive - decrement by 1 if old value positive
+ * @v: pointer of type atomic64_t
+ */
+#define atomic64_dec_if_positive(v)	atomic64_sub_if_positive(1, v)
+
+/*
  * atomic64_inc - increment atomic variable
  * @v: pointer of type atomic64_t
  *
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index aacab4d6ebf6..c9c257c201eb 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -12,6 +12,7 @@
 #define _ASM_BOOTINFO_H
 
 #include <linux/types.h>
+#include <asm/setup.h>
 
 /*
  * The MACH_GROUP_ IDs are the equivalent to PCI vendor IDs; the remaining
@@ -209,7 +210,7 @@
 #define MACH_GROUP_TITAN       22	/* PMC-Sierra Titan		*/
 #define  MACH_TITAN_YOSEMITE	1	/* PMC-Sierra Yosemite		*/
 
-#define CL_SIZE			(256)
+#define CL_SIZE			COMMAND_LINE_SIZE
 
 const char *get_system_type(void);
 
diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h
index fda57132db2c..4517bdf20953 100644
--- a/include/asm-mips/cache.h
+++ b/include/asm-mips/cache.h
@@ -18,4 +18,6 @@
 #define SMP_CACHE_SHIFT		L1_CACHE_SHIFT
 #define SMP_CACHE_BYTES		L1_CACHE_BYTES
 
+#define ARCH_KMALLOC_MINALIGN	8
+
 #endif /* _ASM_CACHE_H */
diff --git a/include/asm-mips/cpumask.h b/include/asm-mips/cpumask.h
deleted file mode 100644
index cf562af10d6f..000000000000
--- a/include/asm-mips/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_MIPS_CPUMASK_H
-#define _ASM_MIPS_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_MIPS_CPUMASK_H */
diff --git a/include/asm-mips/gt64240.h b/include/asm-mips/gt64240.h
new file mode 100644
index 000000000000..12964c2c3e34
--- /dev/null
+++ b/include/asm-mips/gt64240.h
@@ -0,0 +1,1264 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright - Galileo technology.
+ * Copyright (C) 2004 by Ralf Baechle
+ */
+#ifndef __ASM_MIPS_MV64240_H
+#define __ASM_MIPS_MV64240_H
+
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+
+/*
+ * CPU Control Registers
+ */
+
+#define CPU_CONFIGURATION					0x000
+#define CPU_MODE						0x120
+#define CPU_READ_RESPONSE_CROSSBAR_LOW				0x170
+#define CPU_READ_RESPONSE_CROSSBAR_HIGH				0x178
+
+/*
+ * Processor Address Space
+ */
+
+/* Sdram's BAR'S */
+#define SCS_0_LOW_DECODE_ADDRESS				0x008
+#define SCS_0_HIGH_DECODE_ADDRESS				0x010
+#define SCS_1_LOW_DECODE_ADDRESS				0x208
+#define SCS_1_HIGH_DECODE_ADDRESS				0x210
+#define SCS_2_LOW_DECODE_ADDRESS				0x018
+#define SCS_2_HIGH_DECODE_ADDRESS				0x020
+#define SCS_3_LOW_DECODE_ADDRESS				0x218
+#define SCS_3_HIGH_DECODE_ADDRESS				0x220
+/* Devices BAR'S */
+#define CS_0_LOW_DECODE_ADDRESS					0x028
+#define CS_0_HIGH_DECODE_ADDRESS				0x030
+#define CS_1_LOW_DECODE_ADDRESS					0x228
+#define CS_1_HIGH_DECODE_ADDRESS				0x230
+#define CS_2_LOW_DECODE_ADDRESS					0x248
+#define CS_2_HIGH_DECODE_ADDRESS				0x250
+#define CS_3_LOW_DECODE_ADDRESS					0x038
+#define CS_3_HIGH_DECODE_ADDRESS				0x040
+#define BOOTCS_LOW_DECODE_ADDRESS				0x238
+#define BOOTCS_HIGH_DECODE_ADDRESS				0x240
+
+#define PCI_0I_O_LOW_DECODE_ADDRESS				0x048
+#define PCI_0I_O_HIGH_DECODE_ADDRESS				0x050
+#define PCI_0MEMORY0_LOW_DECODE_ADDRESS				0x058
+#define PCI_0MEMORY0_HIGH_DECODE_ADDRESS			0x060
+#define PCI_0MEMORY1_LOW_DECODE_ADDRESS				0x080
+#define PCI_0MEMORY1_HIGH_DECODE_ADDRESS			0x088
+#define PCI_0MEMORY2_LOW_DECODE_ADDRESS				0x258
+#define PCI_0MEMORY2_HIGH_DECODE_ADDRESS			0x260
+#define PCI_0MEMORY3_LOW_DECODE_ADDRESS				0x280
+#define PCI_0MEMORY3_HIGH_DECODE_ADDRESS			0x288
+
+#define PCI_1I_O_LOW_DECODE_ADDRESS				0x090
+#define PCI_1I_O_HIGH_DECODE_ADDRESS				0x098
+#define PCI_1MEMORY0_LOW_DECODE_ADDRESS				0x0a0
+#define PCI_1MEMORY0_HIGH_DECODE_ADDRESS			0x0a8
+#define PCI_1MEMORY1_LOW_DECODE_ADDRESS				0x0b0
+#define PCI_1MEMORY1_HIGH_DECODE_ADDRESS			0x0b8
+#define PCI_1MEMORY2_LOW_DECODE_ADDRESS				0x2a0
+#define PCI_1MEMORY2_HIGH_DECODE_ADDRESS			0x2a8
+#define PCI_1MEMORY3_LOW_DECODE_ADDRESS				0x2b0
+#define PCI_1MEMORY3_HIGH_DECODE_ADDRESS			0x2b8
+
+#define INTERNAL_SPACE_DECODE					0x068
+
+#define CPU_0_LOW_DECODE_ADDRESS				0x290
+#define CPU_0_HIGH_DECODE_ADDRESS				0x298
+#define CPU_1_LOW_DECODE_ADDRESS				0x2c0
+#define CPU_1_HIGH_DECODE_ADDRESS				0x2c8
+
+#define PCI_0I_O_ADDRESS_REMAP					0x0f0
+#define PCI_0MEMORY0_ADDRESS_REMAP				0x0f8
+#define PCI_0MEMORY0_HIGH_ADDRESS_REMAP				0x320
+#define PCI_0MEMORY1_ADDRESS_REMAP				0x100
+#define PCI_0MEMORY1_HIGH_ADDRESS_REMAP				0x328
+#define PCI_0MEMORY2_ADDRESS_REMAP				0x2f8
+#define PCI_0MEMORY2_HIGH_ADDRESS_REMAP				0x330
+#define PCI_0MEMORY3_ADDRESS_REMAP				0x300
+#define PCI_0MEMORY3_HIGH_ADDRESS_REMAP				0x338
+
+#define PCI_1I_O_ADDRESS_REMAP					0x108
+#define PCI_1MEMORY0_ADDRESS_REMAP				0x110
+#define PCI_1MEMORY0_HIGH_ADDRESS_REMAP				0x340
+#define PCI_1MEMORY1_ADDRESS_REMAP				0x118
+#define PCI_1MEMORY1_HIGH_ADDRESS_REMAP				0x348
+#define PCI_1MEMORY2_ADDRESS_REMAP				0x310
+#define PCI_1MEMORY2_HIGH_ADDRESS_REMAP				0x350
+#define PCI_1MEMORY3_ADDRESS_REMAP				0x318
+#define PCI_1MEMORY3_HIGH_ADDRESS_REMAP				0x358
+
+/*
+ * CPU Sync Barrier
+ */
+
+#define PCI_0SYNC_BARIER_VIRTUAL_REGISTER			0x0c0
+#define PCI_1SYNC_BARIER_VIRTUAL_REGISTER			0x0c8
+
+
+/*
+ * CPU Access Protect
+ */
+
+#define CPU_LOW_PROTECT_ADDRESS_0				0X180
+#define CPU_HIGH_PROTECT_ADDRESS_0				0X188
+#define CPU_LOW_PROTECT_ADDRESS_1				0X190
+#define CPU_HIGH_PROTECT_ADDRESS_1				0X198
+#define CPU_LOW_PROTECT_ADDRESS_2				0X1a0
+#define CPU_HIGH_PROTECT_ADDRESS_2				0X1a8
+#define CPU_LOW_PROTECT_ADDRESS_3				0X1b0
+#define CPU_HIGH_PROTECT_ADDRESS_3				0X1b8
+#define CPU_LOW_PROTECT_ADDRESS_4				0X1c0
+#define CPU_HIGH_PROTECT_ADDRESS_4				0X1c8
+#define CPU_LOW_PROTECT_ADDRESS_5				0X1d0
+#define CPU_HIGH_PROTECT_ADDRESS_5				0X1d8
+#define CPU_LOW_PROTECT_ADDRESS_6				0X1e0
+#define CPU_HIGH_PROTECT_ADDRESS_6				0X1e8
+#define CPU_LOW_PROTECT_ADDRESS_7				0X1f0
+#define CPU_HIGH_PROTECT_ADDRESS_7				0X1f8
+
+
+/*
+ * Snoop Control
+ */
+
+#define SNOOP_BASE_ADDRESS_0					0x380
+#define SNOOP_TOP_ADDRESS_0					0x388
+#define SNOOP_BASE_ADDRESS_1					0x390
+#define SNOOP_TOP_ADDRESS_1					0x398
+#define SNOOP_BASE_ADDRESS_2					0x3a0
+#define SNOOP_TOP_ADDRESS_2					0x3a8
+#define SNOOP_BASE_ADDRESS_3					0x3b0
+#define SNOOP_TOP_ADDRESS_3					0x3b8
+
+/*
+ * CPU Error Report
+ */
+
+#define CPU_ERROR_ADDRESS_LOW					0x070
+#define CPU_ERROR_ADDRESS_HIGH					0x078
+#define CPU_ERROR_DATA_LOW					0x128
+#define CPU_ERROR_DATA_HIGH					0x130
+#define CPU_ERROR_PARITY					0x138
+#define CPU_ERROR_CAUSE						0x140
+#define CPU_ERROR_MASK						0x148
+
+/*
+ * Pslave Debug
+ */
+
+#define X_0_ADDRESS						0x360
+#define X_0_COMMAND_ID						0x368
+#define X_1_ADDRESS						0x370
+#define X_1_COMMAND_ID						0x378
+#define WRITE_DATA_LOW						0x3c0
+#define WRITE_DATA_HIGH						0x3c8
+#define WRITE_BYTE_ENABLE					0X3e0
+#define READ_DATA_LOW						0x3d0
+#define READ_DATA_HIGH						0x3d8
+#define READ_ID							0x3e8
+
+
+/*
+ * SDRAM and Device Address Space
+ */
+
+
+/*
+ * SDRAM Configuration
+ */
+
+#define SDRAM_CONFIGURATION					0x448
+#define SDRAM_OPERATION_MODE					0x474
+#define SDRAM_ADDRESS_DECODE					0x47C
+#define SDRAM_TIMING_PARAMETERS					0x4b4
+#define SDRAM_UMA_CONTROL					0x4a4
+#define SDRAM_CROSS_BAR_CONTROL_LOW				0x4a8
+#define SDRAM_CROSS_BAR_CONTROL_HIGH				0x4ac
+#define SDRAM_CROSS_BAR_TIMEOUT					0x4b0
+
+
+/*
+ * SDRAM Parameters
+ */
+
+#define SDRAM_BANK0PARAMETERS					0x44C
+#define SDRAM_BANK1PARAMETERS					0x450
+#define SDRAM_BANK2PARAMETERS					0x454
+#define SDRAM_BANK3PARAMETERS					0x458
+
+
+/*
+ * SDRAM Error Report
+ */
+
+#define SDRAM_ERROR_DATA_LOW					0x484
+#define SDRAM_ERROR_DATA_HIGH					0x480
+#define SDRAM_AND_DEVICE_ERROR_ADDRESS				0x490
+#define SDRAM_RECEIVED_ECC					0x488
+#define SDRAM_CALCULATED_ECC					0x48c
+#define SDRAM_ECC_CONTROL					0x494
+#define SDRAM_ECC_ERROR_COUNTER					0x498
+
+
+/*
+ * SDunit Debug (for internal use)
+ */
+
+#define X0_ADDRESS						0x500
+#define X0_COMMAND_AND_ID					0x504
+#define X0_WRITE_DATA_LOW					0x508
+#define X0_WRITE_DATA_HIGH					0x50c
+#define X0_WRITE_BYTE_ENABLE					0x518
+#define X0_READ_DATA_LOW					0x510
+#define X0_READ_DATA_HIGH					0x514
+#define X0_READ_ID						0x51c
+#define X1_ADDRESS						0x520
+#define X1_COMMAND_AND_ID					0x524
+#define X1_WRITE_DATA_LOW					0x528
+#define X1_WRITE_DATA_HIGH					0x52c
+#define X1_WRITE_BYTE_ENABLE					0x538
+#define X1_READ_DATA_LOW					0x530
+#define X1_READ_DATA_HIGH					0x534
+#define X1_READ_ID						0x53c
+#define X0_SNOOP_ADDRESS					0x540
+#define X0_SNOOP_COMMAND					0x544
+#define X1_SNOOP_ADDRESS					0x548
+#define X1_SNOOP_COMMAND					0x54c
+
+
+/*
+ * Device Parameters
+ */
+
+#define DEVICE_BANK0PARAMETERS					0x45c
+#define DEVICE_BANK1PARAMETERS					0x460
+#define DEVICE_BANK2PARAMETERS					0x464
+#define DEVICE_BANK3PARAMETERS					0x468
+#define DEVICE_BOOT_BANK_PARAMETERS				0x46c
+#define DEVICE_CONTROL						0x4c0
+#define DEVICE_CROSS_BAR_CONTROL_LOW				0x4c8
+#define DEVICE_CROSS_BAR_CONTROL_HIGH				0x4cc
+#define DEVICE_CROSS_BAR_TIMEOUT				0x4c4
+
+
+/*
+ * Device Interrupt
+ */
+
+#define DEVICE_INTERRUPT_CAUSE					0x4d0
+#define DEVICE_INTERRUPT_MASK					0x4d4
+#define DEVICE_ERROR_ADDRESS					0x4d8
+
+/*
+ * DMA Record
+ */
+
+#define CHANNEL0_DMA_BYTE_COUNT					0x800
+#define CHANNEL1_DMA_BYTE_COUNT					0x804
+#define CHANNEL2_DMA_BYTE_COUNT					0x808
+#define CHANNEL3_DMA_BYTE_COUNT					0x80C
+#define CHANNEL4_DMA_BYTE_COUNT					0x900
+#define CHANNEL5_DMA_BYTE_COUNT					0x904
+#define CHANNEL6_DMA_BYTE_COUNT					0x908
+#define CHANNEL7_DMA_BYTE_COUNT					0x90C
+#define CHANNEL0_DMA_SOURCE_ADDRESS				0x810
+#define CHANNEL1_DMA_SOURCE_ADDRESS				0x814
+#define CHANNEL2_DMA_SOURCE_ADDRESS				0x818
+#define CHANNEL3_DMA_SOURCE_ADDRESS				0x81C
+#define CHANNEL4_DMA_SOURCE_ADDRESS				0x910
+#define CHANNEL5_DMA_SOURCE_ADDRESS				0x914
+#define CHANNEL6_DMA_SOURCE_ADDRESS				0x918
+#define CHANNEL7_DMA_SOURCE_ADDRESS				0x91C
+#define CHANNEL0_DMA_DESTINATION_ADDRESS			0x820
+#define CHANNEL1_DMA_DESTINATION_ADDRESS			0x824
+#define CHANNEL2_DMA_DESTINATION_ADDRESS			0x828
+#define CHANNEL3_DMA_DESTINATION_ADDRESS			0x82C
+#define CHANNEL4_DMA_DESTINATION_ADDRESS			0x920
+#define CHANNEL5_DMA_DESTINATION_ADDRESS			0x924
+#define CHANNEL6_DMA_DESTINATION_ADDRESS			0x928
+#define CHANNEL7_DMA_DESTINATION_ADDRESS			0x92C
+#define CHANNEL0NEXT_RECORD_POINTER				0x830
+#define CHANNEL1NEXT_RECORD_POINTER				0x834
+#define CHANNEL2NEXT_RECORD_POINTER				0x838
+#define CHANNEL3NEXT_RECORD_POINTER				0x83C
+#define CHANNEL4NEXT_RECORD_POINTER				0x930
+#define CHANNEL5NEXT_RECORD_POINTER				0x934
+#define CHANNEL6NEXT_RECORD_POINTER				0x938
+#define CHANNEL7NEXT_RECORD_POINTER				0x93C
+#define CHANNEL0CURRENT_DESCRIPTOR_POINTER			0x870
+#define CHANNEL1CURRENT_DESCRIPTOR_POINTER			0x874
+#define CHANNEL2CURRENT_DESCRIPTOR_POINTER			0x878
+#define CHANNEL3CURRENT_DESCRIPTOR_POINTER			0x87C
+#define CHANNEL4CURRENT_DESCRIPTOR_POINTER			0x970
+#define CHANNEL5CURRENT_DESCRIPTOR_POINTER			0x974
+#define CHANNEL6CURRENT_DESCRIPTOR_POINTER			0x978
+#define CHANNEL7CURRENT_DESCRIPTOR_POINTER			0x97C
+#define CHANNEL0_DMA_SOURCE_HIGH_PCI_ADDRESS			0x890
+#define CHANNEL1_DMA_SOURCE_HIGH_PCI_ADDRESS			0x894
+#define CHANNEL2_DMA_SOURCE_HIGH_PCI_ADDRESS			0x898
+#define CHANNEL3_DMA_SOURCE_HIGH_PCI_ADDRESS			0x89c
+#define CHANNEL4_DMA_SOURCE_HIGH_PCI_ADDRESS			0x990
+#define CHANNEL5_DMA_SOURCE_HIGH_PCI_ADDRESS			0x994
+#define CHANNEL6_DMA_SOURCE_HIGH_PCI_ADDRESS			0x998
+#define CHANNEL7_DMA_SOURCE_HIGH_PCI_ADDRESS			0x99c
+#define CHANNEL0_DMA_DESTINATION_HIGH_PCI_ADDRESS		0x8a0
+#define CHANNEL1_DMA_DESTINATION_HIGH_PCI_ADDRESS		0x8a4
+#define CHANNEL2_DMA_DESTINATION_HIGH_PCI_ADDRESS		0x8a8
+#define CHANNEL3_DMA_DESTINATION_HIGH_PCI_ADDRESS		0x8ac
+#define CHANNEL4_DMA_DESTINATION_HIGH_PCI_ADDRESS		0x9a0
+#define CHANNEL5_DMA_DESTINATION_HIGH_PCI_ADDRESS		0x9a4
+#define CHANNEL6_DMA_DESTINATION_HIGH_PCI_ADDRESS		0x9a8
+#define CHANNEL7_DMA_DESTINATION_HIGH_PCI_ADDRESS		0x9ac
+#define CHANNEL0_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS	0x8b0
+#define CHANNEL1_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS	0x8b4
+#define CHANNEL2_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS	0x8b8
+#define CHANNEL3_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS	0x8bc
+#define CHANNEL4_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS	0x9b0
+#define CHANNEL5_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS	0x9b4
+#define CHANNEL6_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS	0x9b8
+#define CHANNEL7_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS	0x9bc
+
+/*
+ * DMA Channel Control
+ */
+
+#define CHANNEL0CONTROL						0x840
+#define CHANNEL0CONTROL_HIGH					0x880
+
+#define CHANNEL1CONTROL						0x844
+#define CHANNEL1CONTROL_HIGH					0x884
+
+#define CHANNEL2CONTROL						0x848
+#define CHANNEL2CONTROL_HIGH					0x888
+
+#define CHANNEL3CONTROL						0x84C
+#define CHANNEL3CONTROL_HIGH					0x88C
+
+#define CHANNEL4CONTROL						0x940
+#define CHANNEL4CONTROL_HIGH					0x980
+
+#define CHANNEL5CONTROL						0x944
+#define CHANNEL5CONTROL_HIGH					0x984
+
+#define CHANNEL6CONTROL						0x948
+#define CHANNEL6CONTROL_HIGH					0x988
+
+#define CHANNEL7CONTROL						0x94C
+#define CHANNEL7CONTROL_HIGH					0x98C
+
+
+/*
+ * DMA Arbiter
+ */
+
+#define ARBITER_CONTROL_0_3					0x860
+#define ARBITER_CONTROL_4_7					0x960
+
+
+/*
+ * DMA Interrupt
+ */
+
+#define CHANELS0_3_INTERRUPT_CAUSE				0x8c0
+#define CHANELS0_3_INTERRUPT_MASK				0x8c4
+#define CHANELS0_3_ERROR_ADDRESS				0x8c8
+#define CHANELS0_3_ERROR_SELECT					0x8cc
+#define CHANELS4_7_INTERRUPT_CAUSE				0x9c0
+#define CHANELS4_7_INTERRUPT_MASK				0x9c4
+#define CHANELS4_7_ERROR_ADDRESS				0x9c8
+#define CHANELS4_7_ERROR_SELECT					0x9cc
+
+
+/*
+ * DMA Debug (for internal use)
+ */
+
+#define DMA_X0_ADDRESS						0x8e0
+#define DMA_X0_COMMAND_AND_ID					0x8e4
+#define DMA_X0_WRITE_DATA_LOW					0x8e8
+#define DMA_X0_WRITE_DATA_HIGH					0x8ec
+#define DMA_X0_WRITE_BYTE_ENABLE				0x8f8
+#define DMA_X0_READ_DATA_LOW					0x8f0
+#define DMA_X0_READ_DATA_HIGH					0x8f4
+#define DMA_X0_READ_ID						0x8fc
+#define DMA_X1_ADDRESS						0x9e0
+#define DMA_X1_COMMAND_AND_ID					0x9e4
+#define DMA_X1_WRITE_DATA_LOW					0x9e8
+#define DMA_X1_WRITE_DATA_HIGH					0x9ec
+#define DMA_X1_WRITE_BYTE_ENABLE				0x9f8
+#define DMA_X1_READ_DATA_LOW					0x9f0
+#define DMA_X1_READ_DATA_HIGH					0x9f4
+#define DMA_X1_READ_ID						0x9fc
+
+/*
+ * Timer_Counter
+ */
+
+#define TIMER_COUNTER0						0x850
+#define TIMER_COUNTER1						0x854
+#define TIMER_COUNTER2						0x858
+#define TIMER_COUNTER3						0x85C
+#define TIMER_COUNTER_0_3_CONTROL				0x864
+#define TIMER_COUNTER_0_3_INTERRUPT_CAUSE			0x868
+#define TIMER_COUNTER_0_3_INTERRUPT_MASK			0x86c
+#define TIMER_COUNTER4						0x950
+#define TIMER_COUNTER5						0x954
+#define TIMER_COUNTER6						0x958
+#define TIMER_COUNTER7						0x95C
+#define TIMER_COUNTER_4_7_CONTROL				0x964
+#define TIMER_COUNTER_4_7_INTERRUPT_CAUSE			0x968
+#define TIMER_COUNTER_4_7_INTERRUPT_MASK			0x96c
+
+/*
+ * PCI Slave Address Decoding
+ */
+
+#define PCI_0SCS_0_BANK_SIZE					0xc08
+#define PCI_1SCS_0_BANK_SIZE					0xc88
+#define PCI_0SCS_1_BANK_SIZE					0xd08
+#define PCI_1SCS_1_BANK_SIZE					0xd88
+#define PCI_0SCS_2_BANK_SIZE					0xc0c
+#define PCI_1SCS_2_BANK_SIZE					0xc8c
+#define PCI_0SCS_3_BANK_SIZE					0xd0c
+#define PCI_1SCS_3_BANK_SIZE					0xd8c
+#define PCI_0CS_0_BANK_SIZE					0xc10
+#define PCI_1CS_0_BANK_SIZE					0xc90
+#define PCI_0CS_1_BANK_SIZE					0xd10
+#define PCI_1CS_1_BANK_SIZE					0xd90
+#define PCI_0CS_2_BANK_SIZE					0xd18
+#define PCI_1CS_2_BANK_SIZE					0xd98
+#define PCI_0CS_3_BANK_SIZE					0xc14
+#define PCI_1CS_3_BANK_SIZE					0xc94
+#define PCI_0CS_BOOT_BANK_SIZE					0xd14
+#define PCI_1CS_BOOT_BANK_SIZE					0xd94
+#define PCI_0P2P_MEM0_BAR_SIZE					0xd1c
+#define PCI_1P2P_MEM0_BAR_SIZE					0xd9c
+#define PCI_0P2P_MEM1_BAR_SIZE					0xd20
+#define PCI_1P2P_MEM1_BAR_SIZE					0xda0
+#define PCI_0P2P_I_O_BAR_SIZE					0xd24
+#define PCI_1P2P_I_O_BAR_SIZE					0xda4
+#define PCI_0CPU_BAR_SIZE					0xd28
+#define PCI_1CPU_BAR_SIZE					0xda8
+#define PCI_0DAC_SCS_0_BANK_SIZE				0xe00
+#define PCI_1DAC_SCS_0_BANK_SIZE				0xe80
+#define PCI_0DAC_SCS_1_BANK_SIZE				0xe04
+#define PCI_1DAC_SCS_1_BANK_SIZE				0xe84
+#define PCI_0DAC_SCS_2_BANK_SIZE				0xe08
+#define PCI_1DAC_SCS_2_BANK_SIZE				0xe88
+#define PCI_0DAC_SCS_3_BANK_SIZE				0xe0c
+#define PCI_1DAC_SCS_3_BANK_SIZE				0xe8c
+#define PCI_0DAC_CS_0_BANK_SIZE					0xe10
+#define PCI_1DAC_CS_0_BANK_SIZE					0xe90
+#define PCI_0DAC_CS_1_BANK_SIZE					0xe14
+#define PCI_1DAC_CS_1_BANK_SIZE					0xe94
+#define PCI_0DAC_CS_2_BANK_SIZE					0xe18
+#define PCI_1DAC_CS_2_BANK_SIZE					0xe98
+#define PCI_0DAC_CS_3_BANK_SIZE					0xe1c
+#define PCI_1DAC_CS_3_BANK_SIZE					0xe9c
+#define PCI_0DAC_BOOTCS_BANK_SIZE				0xe20
+#define PCI_1DAC_BOOTCS_BANK_SIZE				0xea0
+#define PCI_0DAC_P2P_MEM0_BAR_SIZE				0xe24
+#define PCI_1DAC_P2P_MEM0_BAR_SIZE				0xea4
+#define PCI_0DAC_P2P_MEM1_BAR_SIZE				0xe28
+#define PCI_1DAC_P2P_MEM1_BAR_SIZE				0xea8
+#define PCI_0DAC_CPU_BAR_SIZE					0xe2c
+#define PCI_1DAC_CPU_BAR_SIZE					0xeac
+#define PCI_0EXPANSION_ROM_BAR_SIZE				0xd2c
+#define PCI_1EXPANSION_ROM_BAR_SIZE				0xdac
+#define PCI_0BASE_ADDRESS_REGISTERS_ENABLE			0xc3c
+#define PCI_1BASE_ADDRESS_REGISTERS_ENABLE			0xcbc
+#define PCI_0SCS_0_BASE_ADDRESS_REMAP				0xc48
+#define PCI_1SCS_0_BASE_ADDRESS_REMAP				0xcc8
+#define PCI_0SCS_1_BASE_ADDRESS_REMAP				0xd48
+#define PCI_1SCS_1_BASE_ADDRESS_REMAP				0xdc8
+#define PCI_0SCS_2_BASE_ADDRESS_REMAP				0xc4c
+#define PCI_1SCS_2_BASE_ADDRESS_REMAP				0xccc
+#define PCI_0SCS_3_BASE_ADDRESS_REMAP				0xd4c
+#define PCI_1SCS_3_BASE_ADDRESS_REMAP				0xdcc
+#define PCI_0CS_0_BASE_ADDRESS_REMAP				0xc50
+#define PCI_1CS_0_BASE_ADDRESS_REMAP				0xcd0
+#define PCI_0CS_1_BASE_ADDRESS_REMAP				0xd50
+#define PCI_1CS_1_BASE_ADDRESS_REMAP				0xdd0
+#define PCI_0CS_2_BASE_ADDRESS_REMAP				0xd58
+#define PCI_1CS_2_BASE_ADDRESS_REMAP				0xdd8
+#define PCI_0CS_3_BASE_ADDRESS_REMAP				0xc54
+#define PCI_1CS_3_BASE_ADDRESS_REMAP				0xcd4
+#define PCI_0CS_BOOTCS_BASE_ADDRESS_REMAP			0xd54
+#define PCI_1CS_BOOTCS_BASE_ADDRESS_REMAP			0xdd4
+#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_LOW			0xd5c
+#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_LOW			0xddc
+#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_HIGH			0xd60
+#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_HIGH			0xde0
+#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_LOW			0xd64
+#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_LOW			0xde4
+#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_HIGH			0xd68
+#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_HIGH			0xde8
+#define PCI_0P2P_I_O_BASE_ADDRESS_REMAP				0xd6c
+#define PCI_1P2P_I_O_BASE_ADDRESS_REMAP				0xdec
+#define PCI_0CPU_BASE_ADDRESS_REMAP				0xd70
+#define PCI_1CPU_BASE_ADDRESS_REMAP				0xdf0
+#define PCI_0DAC_SCS_0_BASE_ADDRESS_REMAP			0xf00
+#define PCI_1DAC_SCS_0_BASE_ADDRESS_REMAP			0xff0
+#define PCI_0DAC_SCS_1_BASE_ADDRESS_REMAP			0xf04
+#define PCI_1DAC_SCS_1_BASE_ADDRESS_REMAP			0xf84
+#define PCI_0DAC_SCS_2_BASE_ADDRESS_REMAP			0xf08
+#define PCI_1DAC_SCS_2_BASE_ADDRESS_REMAP			0xf88
+#define PCI_0DAC_SCS_3_BASE_ADDRESS_REMAP			0xf0c
+#define PCI_1DAC_SCS_3_BASE_ADDRESS_REMAP			0xf8c
+#define PCI_0DAC_CS_0_BASE_ADDRESS_REMAP			0xf10
+#define PCI_1DAC_CS_0_BASE_ADDRESS_REMAP			0xf90
+#define PCI_0DAC_CS_1_BASE_ADDRESS_REMAP			0xf14
+#define PCI_1DAC_CS_1_BASE_ADDRESS_REMAP			0xf94
+#define PCI_0DAC_CS_2_BASE_ADDRESS_REMAP			0xf18
+#define PCI_1DAC_CS_2_BASE_ADDRESS_REMAP			0xf98
+#define PCI_0DAC_CS_3_BASE_ADDRESS_REMAP			0xf1c
+#define PCI_1DAC_CS_3_BASE_ADDRESS_REMAP			0xf9c
+#define PCI_0DAC_BOOTCS_BASE_ADDRESS_REMAP			0xf20
+#define PCI_1DAC_BOOTCS_BASE_ADDRESS_REMAP			0xfa0
+#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW		0xf24
+#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW		0xfa4
+#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH		0xf28
+#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH		0xfa8
+#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW		0xf2c
+#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW		0xfac
+#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH		0xf30
+#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH		0xfb0
+#define PCI_0DAC_CPU_BASE_ADDRESS_REMAP				0xf34
+#define PCI_1DAC_CPU_BASE_ADDRESS_REMAP				0xfb4
+#define PCI_0EXPANSION_ROM_BASE_ADDRESS_REMAP			0xf38
+#define PCI_1EXPANSION_ROM_BASE_ADDRESS_REMAP			0xfb8
+#define PCI_0ADDRESS_DECODE_CONTROL				0xd3c
+#define PCI_1ADDRESS_DECODE_CONTROL				0xdbc
+
+/*
+ * PCI Control
+ */
+
+#define PCI_0COMMAND						0xc00
+#define PCI_1COMMAND						0xc80
+#define PCI_0MODE						0xd00
+#define PCI_1MODE						0xd80
+#define PCI_0TIMEOUT_RETRY					0xc04
+#define PCI_1TIMEOUT_RETRY					0xc84
+#define PCI_0READ_BUFFER_DISCARD_TIMER				0xd04
+#define PCI_1READ_BUFFER_DISCARD_TIMER				0xd84
+#define MSI_0TRIGGER_TIMER					0xc38
+#define MSI_1TRIGGER_TIMER					0xcb8
+#define PCI_0ARBITER_CONTROL					0x1d00
+#define PCI_1ARBITER_CONTROL					0x1d80
+/* changing untill here */
+#define PCI_0CROSS_BAR_CONTROL_LOW				 0x1d08
+#define PCI_0CROSS_BAR_CONTROL_HIGH				 0x1d0c
+#define PCI_0CROSS_BAR_TIMEOUT					 0x1d04
+#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_LOW		 0x1d18
+#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_HIGH		 0x1d1c
+#define PCI_0SYNC_BARRIER_VIRTUAL_REGISTER			 0x1d10
+#define PCI_0P2P_CONFIGURATION					 0x1d14
+#define PCI_0ACCESS_CONTROL_BASE_0_LOW				 0x1e00
+#define PCI_0ACCESS_CONTROL_BASE_0_HIGH				 0x1e04
+#define PCI_0ACCESS_CONTROL_TOP_0				 0x1e08
+#define PCI_0ACCESS_CONTROL_BASE_1_LOW				 0c1e10
+#define PCI_0ACCESS_CONTROL_BASE_1_HIGH				 0x1e14
+#define PCI_0ACCESS_CONTROL_TOP_1				 0x1e18
+#define PCI_0ACCESS_CONTROL_BASE_2_LOW				 0c1e20
+#define PCI_0ACCESS_CONTROL_BASE_2_HIGH				 0x1e24
+#define PCI_0ACCESS_CONTROL_TOP_2				 0x1e28
+#define PCI_0ACCESS_CONTROL_BASE_3_LOW				 0c1e30
+#define PCI_0ACCESS_CONTROL_BASE_3_HIGH				 0x1e34
+#define PCI_0ACCESS_CONTROL_TOP_3				 0x1e38
+#define PCI_0ACCESS_CONTROL_BASE_4_LOW				 0c1e40
+#define PCI_0ACCESS_CONTROL_BASE_4_HIGH				 0x1e44
+#define PCI_0ACCESS_CONTROL_TOP_4				 0x1e48
+#define PCI_0ACCESS_CONTROL_BASE_5_LOW				 0c1e50
+#define PCI_0ACCESS_CONTROL_BASE_5_HIGH				 0x1e54
+#define PCI_0ACCESS_CONTROL_TOP_5				 0x1e58
+#define PCI_0ACCESS_CONTROL_BASE_6_LOW				 0c1e60
+#define PCI_0ACCESS_CONTROL_BASE_6_HIGH				 0x1e64
+#define PCI_0ACCESS_CONTROL_TOP_6				 0x1e68
+#define PCI_0ACCESS_CONTROL_BASE_7_LOW				 0c1e70
+#define PCI_0ACCESS_CONTROL_BASE_7_HIGH				 0x1e74
+#define PCI_0ACCESS_CONTROL_TOP_7				 0x1e78
+#define PCI_1CROSS_BAR_CONTROL_LOW				 0x1d88
+#define PCI_1CROSS_BAR_CONTROL_HIGH				 0x1d8c
+#define PCI_1CROSS_BAR_TIMEOUT					 0x1d84
+#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_LOW		 0x1d98
+#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_HIGH		 0x1d9c
+#define PCI_1SYNC_BARRIER_VIRTUAL_REGISTER			 0x1d90
+#define PCI_1P2P_CONFIGURATION					 0x1d94
+#define PCI_1ACCESS_CONTROL_BASE_0_LOW				 0x1e80
+#define PCI_1ACCESS_CONTROL_BASE_0_HIGH				 0x1e84
+#define PCI_1ACCESS_CONTROL_TOP_0				 0x1e88
+#define PCI_1ACCESS_CONTROL_BASE_1_LOW				 0c1e90
+#define PCI_1ACCESS_CONTROL_BASE_1_HIGH				 0x1e94
+#define PCI_1ACCESS_CONTROL_TOP_1				 0x1e98
+#define PCI_1ACCESS_CONTROL_BASE_2_LOW				 0c1ea0
+#define PCI_1ACCESS_CONTROL_BASE_2_HIGH				 0x1ea4
+#define PCI_1ACCESS_CONTROL_TOP_2				 0x1ea8
+#define PCI_1ACCESS_CONTROL_BASE_3_LOW				 0c1eb0
+#define PCI_1ACCESS_CONTROL_BASE_3_HIGH				 0x1eb4
+#define PCI_1ACCESS_CONTROL_TOP_3				 0x1eb8
+#define PCI_1ACCESS_CONTROL_BASE_4_LOW				 0c1ec0
+#define PCI_1ACCESS_CONTROL_BASE_4_HIGH				 0x1ec4
+#define PCI_1ACCESS_CONTROL_TOP_4				 0x1ec8
+#define PCI_1ACCESS_CONTROL_BASE_5_LOW				 0c1ed0
+#define PCI_1ACCESS_CONTROL_BASE_5_HIGH				 0x1ed4
+#define PCI_1ACCESS_CONTROL_TOP_5				 0x1ed8
+#define PCI_1ACCESS_CONTROL_BASE_6_LOW				 0c1ee0
+#define PCI_1ACCESS_CONTROL_BASE_6_HIGH				 0x1ee4
+#define PCI_1ACCESS_CONTROL_TOP_6				 0x1ee8
+#define PCI_1ACCESS_CONTROL_BASE_7_LOW				 0c1ef0
+#define PCI_1ACCESS_CONTROL_BASE_7_HIGH				 0x1ef4
+#define PCI_1ACCESS_CONTROL_TOP_7				 0x1ef8
+
+/*
+ * PCI Snoop Control
+ */
+
+#define PCI_0SNOOP_CONTROL_BASE_0_LOW				 0x1f00
+#define PCI_0SNOOP_CONTROL_BASE_0_HIGH				 0x1f04
+#define PCI_0SNOOP_CONTROL_TOP_0				 0x1f08
+#define PCI_0SNOOP_CONTROL_BASE_1_0_LOW				 0x1f10
+#define PCI_0SNOOP_CONTROL_BASE_1_0_HIGH			 0x1f14
+#define PCI_0SNOOP_CONTROL_TOP_1				 0x1f18
+#define PCI_0SNOOP_CONTROL_BASE_2_0_LOW				 0x1f20
+#define PCI_0SNOOP_CONTROL_BASE_2_0_HIGH			 0x1f24
+#define PCI_0SNOOP_CONTROL_TOP_2				 0x1f28
+#define PCI_0SNOOP_CONTROL_BASE_3_0_LOW				 0x1f30
+#define PCI_0SNOOP_CONTROL_BASE_3_0_HIGH			 0x1f34
+#define PCI_0SNOOP_CONTROL_TOP_3				 0x1f38
+#define PCI_1SNOOP_CONTROL_BASE_0_LOW				 0x1f80
+#define PCI_1SNOOP_CONTROL_BASE_0_HIGH				 0x1f84
+#define PCI_1SNOOP_CONTROL_TOP_0				 0x1f88
+#define PCI_1SNOOP_CONTROL_BASE_1_0_LOW				 0x1f90
+#define PCI_1SNOOP_CONTROL_BASE_1_0_HIGH			 0x1f94
+#define PCI_1SNOOP_CONTROL_TOP_1				 0x1f98
+#define PCI_1SNOOP_CONTROL_BASE_2_0_LOW				 0x1fa0
+#define PCI_1SNOOP_CONTROL_BASE_2_0_HIGH			 0x1fa4
+#define PCI_1SNOOP_CONTROL_TOP_2				 0x1fa8
+#define PCI_1SNOOP_CONTROL_BASE_3_0_LOW				 0x1fb0
+#define PCI_1SNOOP_CONTROL_BASE_3_0_HIGH			 0x1fb4
+#define PCI_1SNOOP_CONTROL_TOP_3				 0x1fb8
+
+/*
+ * PCI Configuration Address
+ */
+
+#define PCI_0CONFIGURATION_ADDRESS				0xcf8
+#define PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER		0xcfc
+#define PCI_1CONFIGURATION_ADDRESS				0xc78
+#define PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER		0xc7c
+#define PCI_0INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER		0xc34
+#define PCI_1INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER		0xcb4
+
+/*
+ * PCI Error Report
+ */
+
+#define PCI_0SERR_MASK						 0xc28
+#define PCI_0ERROR_ADDRESS_LOW					 0x1d40
+#define PCI_0ERROR_ADDRESS_HIGH					 0x1d44
+#define PCI_0ERROR_DATA_LOW					 0x1d48
+#define PCI_0ERROR_DATA_HIGH					 0x1d4c
+#define PCI_0ERROR_COMMAND					 0x1d50
+#define PCI_0ERROR_CAUSE					 0x1d58
+#define PCI_0ERROR_MASK						 0x1d5c
+
+#define PCI_1SERR_MASK						 0xca8
+#define PCI_1ERROR_ADDRESS_LOW					 0x1dc0
+#define PCI_1ERROR_ADDRESS_HIGH					 0x1dc4
+#define PCI_1ERROR_DATA_LOW					 0x1dc8
+#define PCI_1ERROR_DATA_HIGH					 0x1dcc
+#define PCI_1ERROR_COMMAND					 0x1dd0
+#define PCI_1ERROR_CAUSE					 0x1dd8
+#define PCI_1ERROR_MASK						 0x1ddc
+
+
+/*
+ * Lslave Debug	 (for internal use)
+ */
+
+#define L_SLAVE_X0_ADDRESS					0x1d20
+#define L_SLAVE_X0_COMMAND_AND_ID				0x1d24
+#define L_SLAVE_X1_ADDRESS					0x1d28
+#define L_SLAVE_X1_COMMAND_AND_ID				0x1d2c
+#define L_SLAVE_WRITE_DATA_LOW					0x1d30
+#define L_SLAVE_WRITE_DATA_HIGH					0x1d34
+#define L_SLAVE_WRITE_BYTE_ENABLE				0x1d60
+#define L_SLAVE_READ_DATA_LOW					0x1d38
+#define L_SLAVE_READ_DATA_HIGH					0x1d3c
+#define L_SLAVE_READ_ID						0x1d64
+
+#if 0 /* Disabled because PCI_* namespace belongs to PCI subsystem ... */
+
+/*
+ * PCI Configuration Function 0
+ */
+
+#define PCI_DEVICE_AND_VENDOR_ID				0x000
+#define PCI_STATUS_AND_COMMAND					0x004
+#define PCI_CLASS_CODE_AND_REVISION_ID				0x008
+#define PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE		0x00C
+#define PCI_SCS_0_BASE_ADDRESS					0x010
+#define PCI_SCS_1_BASE_ADDRESS					0x014
+#define PCI_SCS_2_BASE_ADDRESS					0x018
+#define PCI_SCS_3_BASE_ADDRESS					0x01C
+#define PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS	0x020
+#define PCI_INTERNAL_REGISTERS_I_OMAPPED_BASE_ADDRESS		0x024
+#define PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID		0x02C
+#define PCI_EXPANSION_ROM_BASE_ADDRESS_REGISTER			0x030
+#define PCI_CAPABILTY_LIST_POINTER				0x034
+#define PCI_INTERRUPT_PIN_AND_LINE				0x03C
+#define PCI_POWER_MANAGEMENT_CAPABILITY				0x040
+#define PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL			0x044
+#define PCI_VPD_ADDRESS						0x048
+#define PCI_VPD_DATA						0X04c
+#define PCI_MSI_MESSAGE_CONTROL					0x050
+#define PCI_MSI_MESSAGE_ADDRESS					0x054
+#define PCI_MSI_MESSAGE_UPPER_ADDRESS				0x058
+#define PCI_MSI_MESSAGE_DATA					0x05c
+#define PCI_COMPACT_PCI_HOT_SWAP_CAPABILITY			0x058
+
+/*
+ * PCI Configuration Function 1
+ */
+
+#define PCI_CS_0_BASE_ADDRESS					0x110
+#define PCI_CS_1_BASE_ADDRESS					0x114
+#define PCI_CS_2_BASE_ADDRESS					0x118
+#define PCI_CS_3_BASE_ADDRESS					0x11c
+#define PCI_BOOTCS_BASE_ADDRESS					0x120
+
+/*
+ * PCI Configuration Function 2
+ */
+
+#define PCI_P2P_MEM0_BASE_ADDRESS				0x210
+#define PCI_P2P_MEM1_BASE_ADDRESS				0x214
+#define PCI_P2P_I_O_BASE_ADDRESS				0x218
+#define PCI_CPU_BASE_ADDRESS					0x21c
+
+/*
+ * PCI Configuration Function 4
+ */
+
+#define PCI_DAC_SCS_0_BASE_ADDRESS_LOW				0x410
+#define PCI_DAC_SCS_0_BASE_ADDRESS_HIGH				0x414
+#define PCI_DAC_SCS_1_BASE_ADDRESS_LOW				0x418
+#define PCI_DAC_SCS_1_BASE_ADDRESS_HIGH				0x41c
+#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_LOW			0x420
+#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_HIGH			0x424
+
+
+/*
+ * PCI Configuration Function 5
+ */
+
+#define PCI_DAC_SCS_2_BASE_ADDRESS_LOW				0x510
+#define PCI_DAC_SCS_2_BASE_ADDRESS_HIGH				0x514
+#define PCI_DAC_SCS_3_BASE_ADDRESS_LOW				0x518
+#define PCI_DAC_SCS_3_BASE_ADDRESS_HIGH				0x51c
+#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_LOW			0x520
+#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_HIGH			0x524
+
+
+/*
+ * PCI Configuration Function 6
+ */
+
+#define PCI_DAC_CS_0_BASE_ADDRESS_LOW				0x610
+#define PCI_DAC_CS_0_BASE_ADDRESS_HIGH				0x614
+#define PCI_DAC_CS_1_BASE_ADDRESS_LOW				0x618
+#define PCI_DAC_CS_1_BASE_ADDRESS_HIGH				0x61c
+#define PCI_DAC_CS_2_BASE_ADDRESS_LOW				0x620
+#define PCI_DAC_CS_2_BASE_ADDRESS_HIGH				0x624
+
+/*
+ * PCI Configuration Function 7
+ */
+
+#define PCI_DAC_CS_3_BASE_ADDRESS_LOW				0x710
+#define PCI_DAC_CS_3_BASE_ADDRESS_HIGH				0x714
+#define PCI_DAC_BOOTCS_BASE_ADDRESS_LOW				0x718
+#define PCI_DAC_BOOTCS_BASE_ADDRESS_HIGH			0x71c
+#define PCI_DAC_CPU_BASE_ADDRESS_LOW				0x720
+#define PCI_DAC_CPU_BASE_ADDRESS_HIGH				0x724
+#endif
+
+/*
+ * Interrupts
+ */
+
+#define LOW_INTERRUPT_CAUSE_REGISTER				0xc18
+#define HIGH_INTERRUPT_CAUSE_REGISTER				0xc68
+#define CPU_INTERRUPT_MASK_REGISTER_LOW				0xc1c
+#define CPU_INTERRUPT_MASK_REGISTER_HIGH			0xc6c
+#define CPU_SELECT_CAUSE_REGISTER				0xc70
+#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW			0xc24
+#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH			0xc64
+#define PCI_0SELECT_CAUSE					0xc74
+#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW			0xca4
+#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH			0xce4
+#define PCI_1SELECT_CAUSE					0xcf4
+#define CPU_INT_0_MASK						0xe60
+#define CPU_INT_1_MASK						0xe64
+#define CPU_INT_2_MASK						0xe68
+#define CPU_INT_3_MASK						0xe6c
+
+/*
+ * I20 Support registers
+ */
+
+#define INBOUND_MESSAGE_REGISTER0_PCI0_SIDE			0x010
+#define INBOUND_MESSAGE_REGISTER1_PCI0_SIDE			0x014
+#define OUTBOUND_MESSAGE_REGISTER0_PCI0_SIDE			0x018
+#define OUTBOUND_MESSAGE_REGISTER1_PCI0_SIDE			0x01C
+#define INBOUND_DOORBELL_REGISTER_PCI0_SIDE			0x020
+#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE		0x024
+#define INBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE		0x028
+#define OUTBOUND_DOORBELL_REGISTER_PCI0_SIDE			0x02C
+#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE		0x030
+#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE		0x034
+#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE		0x040
+#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE		0x044
+#define QUEUE_CONTROL_REGISTER_PCI0_SIDE			0x050
+#define QUEUE_BASE_ADDRESS_REGISTER_PCI0_SIDE			0x054
+#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE		0x060
+#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE		0x064
+#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE		0x068
+#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE		0x06C
+#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE		0x070
+#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE		0x074
+#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE		0x0F8
+#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE		0x0FC
+
+#define INBOUND_MESSAGE_REGISTER0_PCI1_SIDE			0x090
+#define INBOUND_MESSAGE_REGISTER1_PCI1_SIDE			0x094
+#define OUTBOUND_MESSAGE_REGISTER0_PCI1_SIDE			0x098
+#define OUTBOUND_MESSAGE_REGISTER1_PCI1_SIDE			0x09C
+#define INBOUND_DOORBELL_REGISTER_PCI1_SIDE			0x0A0
+#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE		0x0A4
+#define INBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE		0x0A8
+#define OUTBOUND_DOORBELL_REGISTER_PCI1_SIDE			0x0AC
+#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE		0x0B0
+#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE		0x0B4
+#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE		0x0C0
+#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE		0x0C4
+#define QUEUE_CONTROL_REGISTER_PCI1_SIDE			0x0D0
+#define QUEUE_BASE_ADDRESS_REGISTER_PCI1_SIDE			0x0D4
+#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE		0x0E0
+#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE		0x0E4
+#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE		0x0E8
+#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE		0x0EC
+#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE		0x0F0
+#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE		0x0F4
+#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE		0x078
+#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE		0x07C
+
+#define INBOUND_MESSAGE_REGISTER0_CPU0_SIDE			0X1C10
+#define INBOUND_MESSAGE_REGISTER1_CPU0_SIDE			0X1C14
+#define OUTBOUND_MESSAGE_REGISTER0_CPU0_SIDE			0X1C18
+#define OUTBOUND_MESSAGE_REGISTER1_CPU0_SIDE			0X1C1C
+#define INBOUND_DOORBELL_REGISTER_CPU0_SIDE			0X1C20
+#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE		0X1C24
+#define INBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE		0X1C28
+#define OUTBOUND_DOORBELL_REGISTER_CPU0_SIDE			0X1C2C
+#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE		0X1C30
+#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE		0X1C34
+#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE		0X1C40
+#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE		0X1C44
+#define QUEUE_CONTROL_REGISTER_CPU0_SIDE			0X1C50
+#define QUEUE_BASE_ADDRESS_REGISTER_CPU0_SIDE			0X1C54
+#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE		0X1C60
+#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE		0X1C64
+#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE		0X1C68
+#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE		0X1C6C
+#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE		0X1C70
+#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE		0X1C74
+#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE		0X1CF8
+#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE		0X1CFC
+
+#define INBOUND_MESSAGE_REGISTER0_CPU1_SIDE			0X1C90
+#define INBOUND_MESSAGE_REGISTER1_CPU1_SIDE			0X1C94
+#define OUTBOUND_MESSAGE_REGISTER0_CPU1_SIDE			0X1C98
+#define OUTBOUND_MESSAGE_REGISTER1_CPU1_SIDE			0X1C9C
+#define INBOUND_DOORBELL_REGISTER_CPU1_SIDE			0X1CA0
+#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE		0X1CA4
+#define INBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE		0X1CA8
+#define OUTBOUND_DOORBELL_REGISTER_CPU1_SIDE			0X1CAC
+#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE		0X1CB0
+#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE		0X1CB4
+#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE		0X1CC0
+#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE		0X1CC4
+#define QUEUE_CONTROL_REGISTER_CPU1_SIDE			0X1CD0
+#define QUEUE_BASE_ADDRESS_REGISTER_CPU1_SIDE			0X1CD4
+#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE		0X1CE0
+#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE		0X1CE4
+#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE		0X1CE8
+#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE		0X1CEC
+#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE		0X1CF0
+#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE		0X1CF4
+#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE		0X1C78
+#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE		0X1C7C
+
+/*
+ * Communication Unit Registers
+ */
+
+#define ETHERNET_0_ADDRESS_CONTROL_LOW
+#define ETHERNET_0_ADDRESS_CONTROL_HIGH				0xf204
+#define ETHERNET_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS		0xf208
+#define ETHERNET_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS		0xf20c
+#define ETHERNET_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf210
+#define ETHERNET_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf214
+#define ETHERNET_0_HASH_TABLE_PCI_HIGH_ADDRESS			0xf218
+#define ETHERNET_1_ADDRESS_CONTROL_LOW				0xf220
+#define ETHERNET_1_ADDRESS_CONTROL_HIGH				0xf224
+#define ETHERNET_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS		0xf228
+#define ETHERNET_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS		0xf22c
+#define ETHERNET_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf230
+#define ETHERNET_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf234
+#define ETHERNET_1_HASH_TABLE_PCI_HIGH_ADDRESS			0xf238
+#define ETHERNET_2_ADDRESS_CONTROL_LOW				0xf240
+#define ETHERNET_2_ADDRESS_CONTROL_HIGH				0xf244
+#define ETHERNET_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS		0xf248
+#define ETHERNET_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS		0xf24c
+#define ETHERNET_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf250
+#define ETHERNET_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf254
+#define ETHERNET_2_HASH_TABLE_PCI_HIGH_ADDRESS			0xf258
+#define MPSC_0_ADDRESS_CONTROL_LOW				0xf280
+#define MPSC_0_ADDRESS_CONTROL_HIGH				0xf284
+#define MPSC_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS			0xf288
+#define MPSC_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS			0xf28c
+#define MPSC_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf290
+#define MPSC_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf294
+#define MPSC_1_ADDRESS_CONTROL_LOW				0xf2a0
+#define MPSC_1_ADDRESS_CONTROL_HIGH				0xf2a4
+#define MPSC_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS			0xf2a8
+#define MPSC_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS			0xf2ac
+#define MPSC_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf2b0
+#define MPSC_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf2b4
+#define MPSC_2_ADDRESS_CONTROL_LOW				0xf2c0
+#define MPSC_2_ADDRESS_CONTROL_HIGH				0xf2c4
+#define MPSC_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS			0xf2c8
+#define MPSC_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS			0xf2cc
+#define MPSC_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf2d0
+#define MPSC_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS		0xf2d4
+#define SERIAL_INIT_PCI_HIGH_ADDRESS				0xf320
+#define SERIAL_INIT_LAST_DATA					0xf324
+#define SERIAL_INIT_STATUS_AND_CONTROL				0xf328
+#define COMM_UNIT_ARBITER_CONTROL				0xf300
+#define COMM_UNIT_CROSS_BAR_TIMEOUT				0xf304
+#define COMM_UNIT_INTERRUPT_CAUSE				0xf310
+#define COMM_UNIT_INTERRUPT_MASK				0xf314
+#define COMM_UNIT_ERROR_ADDRESS					0xf314
+
+/*
+ * Cunit Debug	(for internal use)
+ */
+
+#define CUNIT_ADDRESS						0xf340
+#define CUNIT_COMMAND_AND_ID					0xf344
+#define CUNIT_WRITE_DATA_LOW					0xf348
+#define CUNIT_WRITE_DATA_HIGH					0xf34c
+#define CUNIT_WRITE_BYTE_ENABLE					0xf358
+#define CUNIT_READ_DATA_LOW					0xf350
+#define CUNIT_READ_DATA_HIGH					0xf354
+#define CUNIT_READ_ID						0xf35c
+
+/*
+ * Fast Ethernet Unit Registers
+ */
+
+/* Ethernet */
+
+#define ETHERNET_PHY_ADDRESS_REGISTER				0x2000
+#define ETHERNET_SMI_REGISTER					0x2010
+
+/* Ethernet 0 */
+
+#define ETHERNET0_PORT_CONFIGURATION_REGISTER			0x2400
+#define ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER		0x2408
+#define ETHERNET0_PORT_COMMAND_REGISTER				0x2410
+#define ETHERNET0_PORT_STATUS_REGISTER				0x2418
+#define ETHERNET0_SERIAL_PARAMETRS_REGISTER			0x2420
+#define ETHERNET0_HASH_TABLE_POINTER_REGISTER			0x2428
+#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_LOW		0x2430
+#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_HIGH		0x2438
+#define ETHERNET0_SDMA_CONFIGURATION_REGISTER			0x2440
+#define ETHERNET0_SDMA_COMMAND_REGISTER				0x2448
+#define ETHERNET0_INTERRUPT_CAUSE_REGISTER			0x2450
+#define ETHERNET0_INTERRUPT_MASK_REGISTER			0x2458
+#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0			0x2480
+#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER1			0x2484
+#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER2			0x2488
+#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER3			0x248c
+#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0		0x24a0
+#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER1		0x24a4
+#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER2		0x24a8
+#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER3		0x24ac
+#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0		0x24e0
+#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER1		0x24e4
+#define ETHERNET0_MIB_COUNTER_BASE				0x2500
+
+/* Ethernet 1 */
+
+#define ETHERNET1_PORT_CONFIGURATION_REGISTER			0x2800
+#define ETHERNET1_PORT_CONFIGURATION_EXTEND_REGISTER		0x2808
+#define ETHERNET1_PORT_COMMAND_REGISTER				0x2810
+#define ETHERNET1_PORT_STATUS_REGISTER				0x2818
+#define ETHERNET1_SERIAL_PARAMETRS_REGISTER			0x2820
+#define ETHERNET1_HASH_TABLE_POINTER_REGISTER			0x2828
+#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_LOW		0x2830
+#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_HIGH		0x2838
+#define ETHERNET1_SDMA_CONFIGURATION_REGISTER			0x2840
+#define ETHERNET1_SDMA_COMMAND_REGISTER				0x2848
+#define ETHERNET1_INTERRUPT_CAUSE_REGISTER			0x2850
+#define ETHERNET1_INTERRUPT_MASK_REGISTER			0x2858
+#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER0			0x2880
+#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER1			0x2884
+#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER2			0x2888
+#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER3			0x288c
+#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER0		0x28a0
+#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER1		0x28a4
+#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER2		0x28a8
+#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER3		0x28ac
+#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER0		0x28e0
+#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER1		0x28e4
+#define ETHERNET1_MIB_COUNTER_BASE				0x2900
+
+/* Ethernet 2 */
+
+#define ETHERNET2_PORT_CONFIGURATION_REGISTER			0x2c00
+#define ETHERNET2_PORT_CONFIGURATION_EXTEND_REGISTER		0x2c08
+#define ETHERNET2_PORT_COMMAND_REGISTER				0x2c10
+#define ETHERNET2_PORT_STATUS_REGISTER				0x2c18
+#define ETHERNET2_SERIAL_PARAMETRS_REGISTER			0x2c20
+#define ETHERNET2_HASH_TABLE_POINTER_REGISTER			0x2c28
+#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_LOW		0x2c30
+#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_HIGH		0x2c38
+#define ETHERNET2_SDMA_CONFIGURATION_REGISTER			0x2c40
+#define ETHERNET2_SDMA_COMMAND_REGISTER				0x2c48
+#define ETHERNET2_INTERRUPT_CAUSE_REGISTER			0x2c50
+#define ETHERNET2_INTERRUPT_MASK_REGISTER			0x2c58
+#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER0			0x2c80
+#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER1			0x2c84
+#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER2			0x2c88
+#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER3			0x2c8c
+#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER0		0x2ca0
+#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER1		0x2ca4
+#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER2		0x2ca8
+#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER3		0x2cac
+#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER0		0x2ce0
+#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER1		0x2ce4
+#define ETHERNET2_MIB_COUNTER_BASE				0x2d00
+
+/*
+ * SDMA Registers
+ */
+
+#define SDMA_GROUP_CONFIGURATION_REGISTER			0xb1f0
+#define CHANNEL0_CONFIGURATION_REGISTER				0x4000
+#define CHANNEL0_COMMAND_REGISTER				0x4008
+#define CHANNEL0_RX_CMD_STATUS					0x4800
+#define CHANNEL0_RX_PACKET_AND_BUFFER_SIZES			0x4804
+#define CHANNEL0_RX_BUFFER_POINTER				0x4808
+#define CHANNEL0_RX_NEXT_POINTER				0x480c
+#define CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER			0x4810
+#define CHANNEL0_TX_CMD_STATUS					0x4C00
+#define CHANNEL0_TX_PACKET_SIZE					0x4C04
+#define CHANNEL0_TX_BUFFER_POINTER				0x4C08
+#define CHANNEL0_TX_NEXT_POINTER				0x4C0c
+#define CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER			0x4c10
+#define CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER			0x4c14
+#define CHANNEL1_CONFIGURATION_REGISTER				0x6000
+#define CHANNEL1_COMMAND_REGISTER				0x6008
+#define CHANNEL1_RX_CMD_STATUS					0x6800
+#define CHANNEL1_RX_PACKET_AND_BUFFER_SIZES			0x6804
+#define CHANNEL1_RX_BUFFER_POINTER				0x6808
+#define CHANNEL1_RX_NEXT_POINTER				0x680c
+#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER			0x6810
+#define CHANNEL1_TX_CMD_STATUS					0x6C00
+#define CHANNEL1_TX_PACKET_SIZE					0x6C04
+#define CHANNEL1_TX_BUFFER_POINTER				0x6C08
+#define CHANNEL1_TX_NEXT_POINTER				0x6C0c
+#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER			0x6810
+#define CHANNEL1_CURRENT_TX_DESCRIPTOR_POINTER			0x6c10
+#define CHANNEL1_FIRST_TX_DESCRIPTOR_POINTER			0x6c14
+
+/* SDMA Interrupt */
+
+#define SDMA_CAUSE						0xb820
+#define SDMA_MASK						0xb8a0
+
+
+/*
+ * Baude Rate Generators Registers
+ */
+
+/* BRG 0 */
+
+#define BRG0_CONFIGURATION_REGISTER				0xb200
+#define BRG0_BAUDE_TUNING_REGISTER				0xb204
+
+/* BRG 1 */
+
+#define BRG1_CONFIGURATION_REGISTER				0xb208
+#define BRG1_BAUDE_TUNING_REGISTER				0xb20c
+
+/* BRG 2 */
+
+#define BRG2_CONFIGURATION_REGISTER				0xb210
+#define BRG2_BAUDE_TUNING_REGISTER				0xb214
+
+/* BRG Interrupts */
+
+#define BRG_CAUSE_REGISTER					0xb834
+#define BRG_MASK_REGISTER					0xb8b4
+
+/* MISC */
+
+#define MAIN_ROUTING_REGISTER					0xb400
+#define RECEIVE_CLOCK_ROUTING_REGISTER				0xb404
+#define TRANSMIT_CLOCK_ROUTING_REGISTER				0xb408
+#define COMM_UNIT_ARBITER_CONFIGURATION_REGISTER		0xb40c
+#define WATCHDOG_CONFIGURATION_REGISTER				0xb410
+#define WATCHDOG_VALUE_REGISTER					0xb414
+
+
+/*
+ * Flex TDM Registers
+ */
+
+/* FTDM Port */
+
+#define FLEXTDM_TRANSMIT_READ_POINTER				0xa800
+#define FLEXTDM_RECEIVE_READ_POINTER				0xa804
+#define FLEXTDM_CONFIGURATION_REGISTER				0xa808
+#define FLEXTDM_AUX_CHANNELA_TX_REGISTER			0xa80c
+#define FLEXTDM_AUX_CHANNELA_RX_REGISTER			0xa810
+#define FLEXTDM_AUX_CHANNELB_TX_REGISTER			0xa814
+#define FLEXTDM_AUX_CHANNELB_RX_REGISTER			0xa818
+
+/* FTDM Interrupts */
+
+#define FTDM_CAUSE_REGISTER					0xb830
+#define FTDM_MASK_REGISTER					0xb8b0
+
+
+/*
+ * GPP Interface Registers
+ */
+
+#define GPP_IO_CONTROL						0xf100
+#define GPP_LEVEL_CONTROL					0xf110
+#define GPP_VALUE						0xf104
+#define GPP_INTERRUPT_CAUSE					0xf108
+#define GPP_INTERRUPT_MASK					0xf10c
+
+#define MPP_CONTROL0						0xf000
+#define MPP_CONTROL1						0xf004
+#define MPP_CONTROL2						0xf008
+#define MPP_CONTROL3						0xf00c
+#define DEBUG_PORT_MULTIPLEX					0xf014
+#define SERIAL_PORT_MULTIPLEX					0xf010
+
+/*
+ * I2C Registers
+ */
+
+#define I2C_SLAVE_ADDRESS					0xc000
+#define I2C_EXTENDED_SLAVE_ADDRESS				0xc040
+#define I2C_DATA						0xc004
+#define I2C_CONTROL						0xc008
+#define I2C_STATUS_BAUDE_RATE					0xc00C
+#define I2C_SOFT_RESET						0xc01c
+
+/*
+ * MPSC Registers
+ */
+
+/*
+ * MPSC0
+ */
+
+#define MPSC0_MAIN_CONFIGURATION_LOW				0x8000
+#define MPSC0_MAIN_CONFIGURATION_HIGH				0x8004
+#define MPSC0_PROTOCOL_CONFIGURATION				0x8008
+#define CHANNEL0_REGISTER1					0x800c
+#define CHANNEL0_REGISTER2					0x8010
+#define CHANNEL0_REGISTER3					0x8014
+#define CHANNEL0_REGISTER4					0x8018
+#define CHANNEL0_REGISTER5					0x801c
+#define CHANNEL0_REGISTER6					0x8020
+#define CHANNEL0_REGISTER7					0x8024
+#define CHANNEL0_REGISTER8					0x8028
+#define CHANNEL0_REGISTER9					0x802c
+#define CHANNEL0_REGISTER10					0x8030
+#define CHANNEL0_REGISTER11					0x8034
+
+/*
+ * MPSC1
+ */
+
+#define MPSC1_MAIN_CONFIGURATION_LOW				0x9000
+#define MPSC1_MAIN_CONFIGURATION_HIGH				0x9004
+#define MPSC1_PROTOCOL_CONFIGURATION				0x9008
+#define CHANNEL1_REGISTER1					0x900c
+#define CHANNEL1_REGISTER2					0x9010
+#define CHANNEL1_REGISTER3					0x9014
+#define CHANNEL1_REGISTER4					0x9018
+#define CHANNEL1_REGISTER5					0x901c
+#define CHANNEL1_REGISTER6					0x9020
+#define CHANNEL1_REGISTER7					0x9024
+#define CHANNEL1_REGISTER8					0x9028
+#define CHANNEL1_REGISTER9					0x902c
+#define CHANNEL1_REGISTER10					0x9030
+#define CHANNEL1_REGISTER11					0x9034
+
+/*
+ * MPSCs Interupts
+ */
+
+#define MPSC0_CAUSE						0xb804
+#define MPSC0_MASK						0xb884
+#define MPSC1_CAUSE						0xb80c
+#define MPSC1_MASK						0xb88c
+
+extern unsigned long gt64240_base;
+
+#define GT64240_BASE	   (gt64240_base)
+
+/*
+ * Because of an error/peculiarity in the Galileo chip, we need to swap the
+ * bytes when running bigendian.
+ */
+#define __GT_READ(ofs)							\
+	(*(volatile u32 *)(GT64240_BASE+(ofs)))
+#define __GT_WRITE(ofs, data)						\
+	do { *(volatile u32 *)(GT64240_BASE+(ofs)) = (data); } while (0)
+
+#define GT_READ(ofs)		le32_to_cpu(__GT_READ(ofs))
+#define GT_WRITE(ofs, data)	__GT_WRITE(ofs, cpu_to_le32(data))
+
+#define GT_READ_16(ofs, data)						\
+        le16_to_cpu(*(volatile u16 *)(GT64240_BASE+(ofs)))
+#define GT_WRITE_16(ofs, data)  \
+        *(volatile u16 *)(GT64240_BASE+(ofs)) = cpu_to_le16(data)
+
+#define GT_READ_8(ofs, data)						\
+        *(data) = *(volatile u8 *)(GT64240_BASE+(ofs))
+#define GT_WRITE_8(ofs, data)						\
+        *(volatile u8 *)(GT64240_BASE+(ofs)) = data
+
+extern struct pci_ops gt_bus0_pci_ops;
+extern struct pci_ops gt_bus1_pci_ops;
+
+#endif	/* __ASM_MIPS_MV64240_H */
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 4a024fa727cc..f70b9362aa9f 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -12,22 +12,27 @@
 
 #ifdef __ASSEMBLY__
 
+	.macro	_ssnop
+	sll	$0, $2, 1
+	.endm
+
 /*
  * RM9000 hazards.  When the JTLB is updated by tlbwi or tlbwr, a subsequent
  * use of the JTLB for instructions should not occur for 4 cpu cycles and use
  * for data translations should not occur for 3 cpu cycles.
  */
 #ifdef CONFIG_CPU_RM9000
+
 #define mtc0_tlbw_hazard						\
 	.set	push;							\
 	.set	mips32;							\
-	ssnop; ssnop; ssnop; ssnop;					\
+	_ssnop; _ssnop; _ssnop; _ssnop;					\
 	.set	pop
 
 #define tlbw_eret_hazard						\
 	.set	push;							\
 	.set	mips32;							\
-	ssnop; ssnop; ssnop; ssnop;					\
+	_ssnop; _ssnop; _ssnop; _ssnop;					\
 	.set	pop
 
 #else
@@ -43,6 +48,33 @@
 #define tlbw_eret_hazard
 #endif
 
+/*
+ * mtc0->mfc0 hazard
+ * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
+ * It is a MIPS32R2 processor so ehb will clear the hazard.
+ */
+
+#ifdef CONFIG_CPU_MIPSR2
+/*
+ * Use a macro for ehb unless explicit support for MIPSR2 is enabled
+ */
+	.macro	ehb
+	sll	$0, $0, 3
+	.endm
+
+#define irq_enable_hazard						\
+	ehb		# irq_enable_hazard
+
+#define irq_disable_hazard						\
+	ehb		# irq_disable_hazard
+
+#else
+
+#define irq_enable_hazard
+#define irq_disable_hazard
+
+#endif
+
 #else /* __ASSEMBLY__ */
 
 /*
@@ -55,13 +87,13 @@
 #define mtc0_tlbw_hazard()						\
 	__asm__ __volatile__(						\
 		".set\tmips32\n\t"					\
-		"ssnop; ssnop; ssnop; ssnop\n\t"			\
+		"_ssnop; _ssnop; _ssnop; _ssnop\n\t"			\
 		".set\tmips0")
 
 #define tlbw_use_hazard()						\
 	__asm__ __volatile__(						\
 		".set\tmips32\n\t"					\
-		"ssnop; ssnop; ssnop; ssnop\n\t"			\
+		"_ssnop; _ssnop; _ssnop; _ssnop\n\t"			\
 		".set\tmips0")
 #else
 
@@ -82,6 +114,83 @@
 
 #endif
 
+/*
+ * mtc0->mfc0 hazard
+ * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
+ * It is a MIPS32R2 processor so ehb will clear the hazard.
+ */
+
+#ifdef CONFIG_CPU_MIPSR2
+/*
+ * Use a macro for ehb unless explicit support for MIPSR2 is enabled
+ */
+__asm__(
+	"	.macro	ehb					\n\t"
+	"	sll	$0, $0, 3				\n\t"
+	"	.endm						\n\t"
+	"							\n\t"
+	"	.macro\tirq_enable_hazard			\n\t"
+	"	ehb						\n\t"
+	"	.endm						\n\t"
+	"							\n\t"
+	"	.macro\tirq_disable_hazard			\n\t"
+	"	ehb						\n\t"
+	"	.endm");
+
+#define irq_enable_hazard()						\
+	__asm__ __volatile__(						\
+	"ehb\t\t\t\t# irq_enable_hazard")
+
+#define irq_disable_hazard()						\
+	__asm__ __volatile__(						\
+	"ehb\t\t\t\t# irq_disable_hazard")
+
+#elif defined(CONFIG_CPU_R10000)
+
+/*
+ * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
+ */
+
+__asm__(
+	"	.macro\tirq_enable_hazard			\n\t"
+	"	.endm						\n\t"
+	"							\n\t"
+	"	.macro\tirq_disable_hazard			\n\t"
+	"	.endm");
+
+#define irq_enable_hazard()	do { } while (0)
+#define irq_disable_hazard()	do { } while (0)
+
+#else
+
+/*
+ * Default for classic MIPS processors.  Assume worst case hazards but don't
+ * care about the irq_enable_hazard - sooner or later the hardware will
+ * enable it and we don't care when exactly.
+ */
+
+__asm__(
+	"	.macro	_ssnop					\n\t"
+	"	sll	$0, $2, 1				\n\t"
+	"	.endm						\n\t"
+	"							\n\t"
+	"	#						\n\t"
+	"	# There is a hazard but we do not care		\n\t"
+	"	#						\n\t"
+	"	.macro\tirq_enable_hazard			\n\t"
+	"	.endm						\n\t"
+	"							\n\t"
+	"	.macro\tirq_disable_hazard			\n\t"
+	"	_ssnop; _ssnop; _ssnop				\n\t"
+	"	.endm");
+
+#define irq_enable_hazard()	do { } while (0)
+#define irq_disable_hazard()						\
+	__asm__ __volatile__(						\
+	"_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
+
+#endif
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_HAZARDS_H */
diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
new file mode 100644
index 000000000000..1de5c32a5884
--- /dev/null
+++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h
@@ -0,0 +1,38 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 2004 Ralf Baechle
+ */
+#ifndef __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H
+
+/*
+ * Momentum Jaguar ATX always has the RM9000 processor.
+ */
+#define cpu_has_watch		1
+#define cpu_has_mips16		0
+#define cpu_has_divec		0
+#define cpu_has_vce		0
+#define cpu_has_cache_cdex_p	0
+#define cpu_has_cache_cdex_s	0
+#define cpu_has_prefetch	1
+#define cpu_has_mcheck		0
+#define cpu_has_ejtag		0
+
+#define cpu_has_llsc		1
+#define cpu_has_vtag_icache	0
+#define cpu_has_dc_aliases	0
+#define cpu_has_ic_fills_f_dc	0
+
+#define cpu_has_nofpuex		0
+#define cpu_has_64bits		1
+
+#define cpu_has_subset_pcaches	0
+
+#define cpu_dcache_line_size()	32
+#define cpu_icache_line_size()	32
+#define cpu_scache_line_size()	32
+
+#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 8bdab9794feb..71198779fcd6 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -632,7 +632,7 @@ do {									\
 } while (0)
 
 /*
- * On The RM7000 these are use to access cop0 set 1 registers
+ * On RM7000/RM9000 these are uses to access cop0 set 1 registers
  */
 #define __read_32bit_c0_ctrl_register(source)				\
 ({ int __res;								\
diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h
index e42794180211..dd7591b48ee1 100644
--- a/include/asm-mips/mmu_context.h
+++ b/include/asm-mips/mmu_context.h
@@ -45,12 +45,17 @@ extern unsigned long pgd_current[];
 #define ASID_INC	0x40
 #define ASID_MASK	0xfc0
 
+#elif defined(CONFIG_CPU_R8000)
+
+#define ASID_INC	0x10
+#define ASID_MASK	0xff0
+
 #elif defined(CONFIG_CPU_RM9000)
 
 #define ASID_INC	0x1
 #define ASID_MASK	0xfff
 
-#else /* FIXME: not correct for R6000, R8000 */
+#else /* FIXME: not correct for R6000 */
 
 #define ASID_INC	0x1
 #define ASID_MASK	0xff
@@ -78,9 +83,8 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long cpu)
 	unsigned long asid = asid_cache(cpu);
 
 	if (! ((asid += ASID_INC) & ASID_MASK) ) {
-#ifdef CONFIG_VTAG_ICACHE
-		flush_icache_all();
-#endif
+		if (cpu_has_vtag_icache)
+			flush_icache_all();
 		local_flush_tlb_all();	/* start new asid cycle */
 		if (!asid)		/* fix version if needed */
 			asid = ASID_FIRST_VERSION;
diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h
index 99635e6b610e..90ee24aad955 100644
--- a/include/asm-mips/module.h
+++ b/include/asm-mips/module.h
@@ -2,11 +2,14 @@
 #define _ASM_MODULE_H
 
 #include <linux/config.h>
+#include <linux/list.h>
+#include <asm/uaccess.h>
 
 struct mod_arch_specific {
 	/* Data Bus Error exception tables */
-	const struct exception_table_entry *dbe_table_start;
-	const struct exception_table_entry *dbe_table_end;
+	struct list_head dbe_list;
+	const struct exception_table_entry *dbe_start;
+	const struct exception_table_entry *dbe_end;
 };
 
 typedef uint8_t Elf64_Byte;		/* Type for a 8-bit quantity.  */
@@ -38,4 +41,16 @@ typedef struct
 
 #endif
 
+#ifdef CONFIG_MODULES
+/* Given an address, look for it in the exception tables. */
+const struct exception_table_entry*search_module_dbetables(unsigned long addr);
+#else
+/* Given an address, look for it in the exception tables. */
+static inline const struct exception_table_entry *
+search_module_dbetables(unsigned long addr)
+{
+	return NULL;
+}
+#endif
+
 #endif /* _ASM_MODULE_H */
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index 37de18f63b43..47ca67f25e54 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -10,16 +10,20 @@
 #define _ASM_PAGE_H
 
 #include <linux/config.h>
-#include <spaces.h>
 
 #ifdef __KERNEL__
 
+#include <spaces.h>
+
 /*
  * PAGE_SHIFT determines the page size
  */
 #ifdef CONFIG_PAGE_SIZE_4KB
 #define PAGE_SHIFT	12
 #endif
+#ifdef CONFIG_PAGE_SIZE_8KB
+#define PAGE_SHIFT	13
+#endif
 #ifdef CONFIG_PAGE_SIZE_16KB
 #define PAGE_SHIFT	14
 #endif
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index ba29750e4f1c..1af4e5b600c6 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -87,6 +87,9 @@ extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
 extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
 	dma64_addr_t dma_addr, size_t len, int direction);
 
+extern void pcibios_resource_to_bus(struct pci_dev *dev,
+	struct pci_bus_region *region, struct resource *res);
+
 #endif /* __KERNEL__ */
 
 /* implement the pci_ DMA API in terms of the generic device dma_ one */
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 51326d10b880..65bee143ebe3 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -141,35 +141,8 @@ static inline void pgd_clear(pgd_t *pgdp)	{ }
 #define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 #endif
 
-#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
-
-/*
- * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset
- * into this range:
- */
-#define pte_to_pgoff(_pte) \
-	((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 ))
-
-#define pgoff_to_pte(off) \
-	((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE })
-
-#else
-
-/*
- * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
- * into this range:
- */
-#define pte_to_pgoff(_pte) \
-	((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
- 
-#define pgoff_to_pte(off) \
-	((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
-
-#endif
-
 #define __pgd_offset(address)	pgd_index(address)
-#define __pmd_offset(address) \
-	(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+#define __pmd_offset(address)	(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
 
 /* to find an entry in a kernel page-table-directory */
 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
@@ -200,17 +173,46 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
 #define pte_unmap(pte) ((void)(pte))
 #define pte_unmap_nested(pte) ((void)(pte))
 
-/* Swap entries must have VALID and GLOBAL bits cleared. */
 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
 
-#define __swp_type(x)		(((x).val >> 1) & 0x7f)
-#define __swp_offset(x)		((x).val >> 10)
-#define __swp_entry(type,offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 10) })
+/* Swap entries must have VALID bit cleared. */
+#define __swp_type(x)		(((x).val >> 10) & 0x1f)
+#define __swp_offset(x)		((x).val >> 15)
+#define __swp_entry(type,offset)	\
+	((swp_entry_t) { ((type) << 10) | ((offset) << 15) })
+
+/*
+ * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset
+ * into this range:
+ */
+#define PTE_FILE_MAX_BITS	27
+
+#define pte_to_pgoff(_pte) \
+	((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 ))
+
+#define pgoff_to_pte(off) \
+	((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE })
+
 #else
 
-#define __swp_type(x)		(((x).val >> 1) & 0x1f)
-#define __swp_offset(x)		((x).val >> 8)
-#define __swp_entry(type,offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
+/* Swap entries must have VALID and GLOBAL bits cleared. */
+#define __swp_type(x)		(((x).val >> 8) & 0x1f)
+#define __swp_offset(x)		((x).val >> 13)
+#define __swp_entry(type,offset)	\
+		((swp_entry_t) { ((type) << 8) | ((offset) << 13) })
+
+/*
+ * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
+ * into this range:
+ */
+#define PTE_FILE_MAX_BITS	27
+
+#define pte_to_pgoff(_pte) \
+	((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
+
+#define pgoff_to_pte(off) \
+	((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
+
 #endif
 
 #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index eba84a79efc9..333d9a8f585f 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -53,7 +53,11 @@
  * We used to implement 41 bits by having an order 1 pmd level but that seemed
  * rather pointless.
  *
- * For 16kB page size we use a 2 level page tree which permit a total of
+ * For 8kB page size we use a 3 level page tree which permits a total of
+ * 8TB of address space.  Alternatively a 33-bit / 8GB organization using
+ * two levels would be easy to implement.
+ *
+ * For 16kB page size we use a 2 level page tree which permits a total of
  * 36 bits of virtual address space.  We could add a third leve. but it seems
  * like at the moment there's no need for this.
  *
@@ -65,6 +69,11 @@
 #define PMD_ORDER		1
 #define PTE_ORDER		0
 #endif
+#ifdef CONFIG_PAGE_SIZE_8KB
+#define PGD_ORDER		0
+#define PMD_ORDER		0
+#define PTE_ORDER		0
+#endif
 #ifdef CONFIG_PAGE_SIZE_16KB
 #define PGD_ORDER		0
 #define PMD_ORDER		0
@@ -148,16 +157,6 @@ static inline void pgd_clear(pgd_t *pgdp)
 #define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 #endif
 
-/*
- * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset
- * into this range:
- */
-#define pte_to_pgoff(_pte) \
-	((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
-
-#define pgoff_to_pte(off) \
-	((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
-
 #define __pgd_offset(address)	pgd_index(address)
 #define page_pte(page) page_pte_prot(page, __pgprot(0))
 
@@ -215,6 +214,18 @@ static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
 #define __swp_entry_to_pte(x)	((pte_t) { (x).val })
 
 /*
+ * Bits 0, 1, 2, 7 and 8 are taken, split up the 32 bits of offset
+ * into this range:
+ */
+#define PTE_FILE_MAX_BITS	32
+
+#define pte_to_pgoff(_pte) \
+	((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 ))
+
+#define pgoff_to_pte(off) \
+	((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE })
+
+/*
  * Used for the b0rked handling of kernel pagetables on the 64-bit kernel.
  */
 extern pte_t kptbl[(PAGE_SIZE << PGD_ORDER)/sizeof(pte_t)];
diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h
index 22d19833a4b4..76c1ae1c7dee 100644
--- a/include/asm-mips/pgtable-bits.h
+++ b/include/asm-mips/pgtable-bits.h
@@ -60,7 +60,7 @@
 #define _PAGE_SILENT_WRITE          (1<<8)
 #define _CACHE_MASK                 (7<<9)
 
-#if defined(CONFIG_CPU_SB1)
+#ifdef CONFIG_CPU_SB1
 
 /* No penalty for being coherent on the SB1, so just
    use it for "noncoherent" spaces, too.  Shouldn't hurt. */
@@ -70,6 +70,20 @@
 #define _CACHE_CACHABLE_NONCOHERENT (5<<9)
 #define _CACHE_UNCACHED_ACCELERATED (7<<9)
 
+#elif defined(CONFIG_CPU_RM9000)
+
+#define _CACHE_WT			(0 << 9)
+#define _CACHE_WTWA			(1 << 9)
+#define _CACHE_UC_B			(2 << 9)
+#define _CACHE_WB			(3 << 9)
+#define _CACHE_CWBEA			(4 << 9)
+#define _CACHE_CWB			(5 << 9)
+#define _CACHE_UCNB			(6 << 9)
+#define _CACHE_FPC			(7 << 9)
+
+#define _CACHE_UNCACHED			_CACHE_UC_B
+#define _CACHE_CACHABLE_NONCOHERENT	_CACHE_UC_B
+
 #else
 
 #define _CACHE_CACHABLE_NO_WA       (0<<9)  /* R4600 only              */
@@ -93,6 +107,8 @@
 #define PAGE_CACHABLE_DEFAULT	_CACHE_UNCACHED
 #elif defined(CONFIG_DMA_NONCOHERENT)
 #define PAGE_CACHABLE_DEFAULT	_CACHE_CACHABLE_NONCOHERENT
+#elif defined(CONFIG_CPU_RM9000)
+#define PAGE_CACHABLE_DEFAULT	_CACHE_CWBEA
 #else
 #define PAGE_CACHABLE_DEFAULT	_CACHE_CACHABLE_COW
 #endif
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 5b2aa070cfa2..9d5a8fad0949 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -125,8 +125,6 @@ static inline void pte_clear(pte_t *ptep)
 
 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 
-#define PTE_FILE_MAX_BITS	27
-
 /*
  * The following only work if pte_present() is true.
  * Undefined behaviour if not..
diff --git a/include/asm-mips/pmon.h b/include/asm-mips/pmon.h
index 0162517854d4..7b4f990e152a 100644
--- a/include/asm-mips/pmon.h
+++ b/include/asm-mips/pmon.h
@@ -17,6 +17,9 @@ struct callvectors {
 	int	(*printf) (const char*, ...);		/*	20 */
 	void	(*cacheflush) (void);			/*	24 */
 	char*	(*gets) (char*);			/*	28 */
+	int	(*cpustart) (int, void *, int, int);	/*	32 */
 };
 
+extern struct callvectors *debug_vectors;
+
 #endif /* _ASM_PMON_H */
diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h
index 70534af2a59c..8e38389a9915 100644
--- a/include/asm-mips/processor.h
+++ b/include/asm-mips/processor.h
@@ -280,15 +280,6 @@ unsigned long get_wchan(struct task_struct *p);
  */
 #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);})
 
-/*
- * For now.  The 32-bit cycle counter is screwed up so solving this nicely takes a little
- * brainwork ...
- */
-static inline unsigned long long sched_clock(void)
-{
-	return 0ULL;
-}
-
 #ifdef CONFIG_CPU_HAS_PREFETCH
 
 #define ARCH_HAS_PREFETCH
diff --git a/include/asm-mips/semaphore.h b/include/asm-mips/semaphore.h
index bab913a90644..ed9a3d774c6a 100644
--- a/include/asm-mips/semaphore.h
+++ b/include/asm-mips/semaphore.h
@@ -4,61 +4,70 @@
  * for more details.
  *
  * Copyright (C) 1996  Linus Torvalds
- * Copyright (C) 1998, 99, 2000, 01  Ralf Baechle
+ * Copyright (C) 1998, 99, 2000, 01, 04  Ralf Baechle
  * Copyright (C) 1999, 2000, 01  Silicon Graphics, Inc.
  * Copyright (C) 2000, 01 MIPS Technologies, Inc.
+ *
+ * In all honesty, little of the old MIPS code left - the PPC64 variant was
+ * just looking nice and portable so I ripped it.  Credits to whoever wrote
+ * it.
  */
-#ifndef _ASM_SEMAPHORE_H
-#define _ASM_SEMAPHORE_H
+#ifndef __ASM_SEMAPHORE_H
+#define __ASM_SEMAPHORE_H
+
+/*
+ * Remove spinlock-based RW semaphores; RW semaphore definitions are
+ * now in rwsem.h and we use the generic lib/rwsem.c implementation.
+ * Rework semaphores to use atomic_dec_if_positive.
+ * -- Paul Mackerras (paulus@samba.org)
+ */
+
+#ifdef __KERNEL__
 
-#include <linux/compiler.h>
-#include <linux/config.h>
-#include <linux/spinlock.h>
+#include <asm/atomic.h>
+#include <asm/system.h>
 #include <linux/wait.h>
 #include <linux/rwsem.h>
-#include <asm/atomic.h>
 
 struct semaphore {
-#ifdef __MIPSEB__
-	atomic_t count;
-	atomic_t waking;
-#else
-	atomic_t waking;
+	/*
+	 * Note that any negative value of count is equivalent to 0,
+	 * but additionally indicates that some process(es) might be
+	 * sleeping on `wait'.
+	 */
 	atomic_t count;
-#endif
 	wait_queue_head_t wait;
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	long __magic;
 #endif
-} __attribute__((aligned(8)));
+};
 
-#if WAITQUEUE_DEBUG
-# define __SEM_DEBUG_INIT(name) , .__magic = (long)&(name).__magic
+#ifdef WAITQUEUE_DEBUG
+# define __SEM_DEBUG_INIT(name) \
+		, (long)&(name).__magic
 #else
 # define __SEM_DEBUG_INIT(name)
 #endif
 
-#define __SEMAPHORE_INITIALIZER(name,_count) {				\
-	.count	= ATOMIC_INIT(_count),					\
-	.waking	= ATOMIC_INIT(0),					\
-	.wait	= __WAIT_QUEUE_HEAD_INITIALIZER((name).wait)		\
-	__SEM_DEBUG_INIT(name)						\
-}
+#define __SEMAPHORE_INITIALIZER(name, count) \
+	{ ATOMIC_INIT(count), \
+	  __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
+	  __SEM_DEBUG_INIT(name) }
 
-#define __MUTEX_INITIALIZER(name) __SEMAPHORE_INITIALIZER(name, 1)
+#define __MUTEX_INITIALIZER(name) \
+	__SEMAPHORE_INITIALIZER(name, 1)
 
-#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
-	struct semaphore name = __SEMAPHORE_INITIALIZER(name, count)
+#define __DECLARE_SEMAPHORE_GENERIC(name, count) \
+	struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
 
-#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1)
-#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
+#define DECLARE_MUTEX(name)		__DECLARE_SEMAPHORE_GENERIC(name, 1)
+#define DECLARE_MUTEX_LOCKED(name)	__DECLARE_SEMAPHORE_GENERIC(name, 0)
 
 static inline void sema_init (struct semaphore *sem, int val)
 {
 	atomic_set(&sem->count, val);
-	atomic_set(&sem->waking, 0);
 	init_waitqueue_head(&sem->wait);
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	sem->__magic = (long)&sem->__magic;
 #endif
 }
@@ -73,211 +82,57 @@ static inline void init_MUTEX_LOCKED (struct semaphore *sem)
 	sema_init(sem, 0);
 }
 
-#ifndef CONFIG_CPU_HAS_LLDSCD
-/*
- * On machines without lld/scd we need a spinlock to make the manipulation of
- * sem->count and sem->waking atomic.
- */
-extern spinlock_t semaphore_lock;
-#endif
-
-extern void __down_failed(struct semaphore * sem);
-extern int  __down_failed_interruptible(struct semaphore * sem);
-extern void __up_wakeup(struct semaphore * sem);
+extern void __down(struct semaphore * sem);
+extern int  __down_interruptible(struct semaphore * sem);
+extern void __up(struct semaphore * sem);
 
 static inline void down(struct semaphore * sem)
 {
-	int count;
-
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	CHECK_MAGIC(sem->__magic);
 #endif
 	might_sleep();
-	count = atomic_dec_return(&sem->count);
-	if (unlikely(count < 0))
-		__down_failed(sem);
+
+	/*
+	 * Try to get the semaphore, take the slow path if we fail.
+	 */
+	if (unlikely(atomic_dec_return(&sem->count) < 0))
+		__down(sem);
 }
 
-/*
- * Interruptible try to acquire a semaphore.  If we obtained
- * it, return zero.  If we were interrupted, returns -EINTR
- */
 static inline int down_interruptible(struct semaphore * sem)
 {
-	int count;
+	int ret = 0;
 
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	CHECK_MAGIC(sem->__magic);
 #endif
 	might_sleep();
-	count = atomic_dec_return(&sem->count);
-	if (unlikely(count < 0))
-		return __down_failed_interruptible(sem);
-
-	return 0;
-}
-
-#ifdef CONFIG_CPU_HAS_LLDSCD
-
-/*
- * down_trylock returns 0 on success, 1 if we failed to get the lock.
- *
- * We must manipulate count and waking simultaneously and atomically.
- * Here, we do this by using lld/scd on the pair of 32-bit words.
- *
- * Pseudocode:
- *
- *   Decrement(sem->count)
- *   If(sem->count >=0) {
- *	Return(SUCCESS)			// resource is free
- *   } else {
- *	If(sem->waking <= 0) {		// if no wakeup pending
- *	   Increment(sem->count)	// undo decrement
- *	   Return(FAILURE)
- *      } else {
- *	   Decrement(sem->waking)	// otherwise "steal" wakeup
- *	   Return(SUCCESS)
- *	}
- *   }
- */
-static inline int down_trylock(struct semaphore * sem)
-{
-	long ret, tmp, tmp2, sub;
-
-#if WAITQUEUE_DEBUG
-	CHECK_MAGIC(sem->__magic);
-#endif
-
-	__asm__ __volatile__(
-	"	.set	mips3			# down_trylock		\n"
-	"0:	lld	%1, %4						\n"
-	"	dli	%3, 0x0000000100000000	# count -= 1		\n"
-	"	dsubu	%1, %3						\n"
-	"	li	%0, 0			# ret = 0		\n"
-	"	bgez	%1, 2f			# if count >= 0		\n"
-	"	sll	%2, %1, 0		# extract waking	\n"
-	"	blez	%2, 1f			# if waking < 0 -> 1f	\n"
-	"	daddiu	%1, %1, -1		# waking -= 1		\n"
-	"	b	2f						\n"
-	"1:	daddu	%1, %1, %3		# count += 1		\n"
-	"	li	%0, 1			# ret = 1		\n"
-	"2:	scd	%1, %4						\n"
-	"	beqz	%1, 0b						\n"
-	"	sync							\n"
-	"	.set	mips0						\n"
-	: "=&r"(ret), "=&r"(tmp), "=&r"(tmp2), "=&r"(sub)
-	: "m"(*sem)
-	: "memory");
 
+	if (unlikely(atomic_dec_return(&sem->count) < 0))
+		ret = __down_interruptible(sem);
 	return ret;
 }
 
-/*
- * Note! This is subtle. We jump to wake people up only if
- * the semaphore was negative (== somebody was waiting on it).
- */
-static inline void up(struct semaphore * sem)
-{
-	unsigned long tmp, tmp2;
-	int count;
-
-#if WAITQUEUE_DEBUG
-	CHECK_MAGIC(sem->__magic);
-#endif
-	/*
-	 * We must manipulate count and waking simultaneously and atomically.
-	 * Otherwise we have races between up and __down_failed_interruptible
-	 * waking up on a signal.
-	 */
-
-	__asm__ __volatile__(
-	"	.set	mips3					\n"
-	"	sync			# up			\n"
-	"1:	lld	%1, %3					\n"
-	"	dsra32	%0, %1, 0	# extract count to %0	\n"
-	"	daddiu	%0, 1		# count += 1		\n"
-	"	slti	%2, %0, 1	# %3 = (%0 <= 0)	\n"
-	"	daddu	%1, %2		# waking += %3		\n"
-	"	dsll32 %1, %1, 0	# zero-extend %1	\n"
-	"	dsrl32 %1, %1, 0				\n"
-	"	dsll32	%2, %0, 0	# Reassemble union	\n"
-	"	or	%1, %2		# from count and waking	\n"
-	"	scd	%1, %3					\n"
-	"	beqz	%1, 1b					\n"
-	"	.set	mips0					\n"
-	: "=&r"(count), "=&r"(tmp), "=&r"(tmp2), "+m"(*sem)
-	:
-	: "memory");
-
-	if (unlikely(count <= 0))
-		__up_wakeup(sem);
-}
-
-#else
-
-/*
- * Non-blockingly attempt to down() a semaphore.
- * Returns zero if we acquired it
- */
 static inline int down_trylock(struct semaphore * sem)
 {
-	unsigned long flags;
-	int count, waking;
-	int ret = 0;
-
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	CHECK_MAGIC(sem->__magic);
 #endif
 
-	spin_lock_irqsave(&semaphore_lock, flags);
-	count = atomic_read(&sem->count) - 1;
-	atomic_set(&sem->count, count);
-	if (unlikely(count < 0)) {
-		waking = atomic_read(&sem->waking);
-		if (waking <= 0) {
-			atomic_set(&sem->count, count + 1);
-			ret = 1;
-		} else {
-			atomic_set(&sem->waking, waking - 1);
-			ret = 0;
-		}
-	}
-	spin_unlock_irqrestore(&semaphore_lock, flags);
-
-	return ret;
+	return atomic_dec_if_positive(&sem->count) < 0;
 }
 
-/*
- * Note! This is subtle. We jump to wake people up only if
- * the semaphore was negative (== somebody was waiting on it).
- */
 static inline void up(struct semaphore * sem)
 {
-	unsigned long flags;
-	int count, waking;
-
-#if WAITQUEUE_DEBUG
+#ifdef WAITQUEUE_DEBUG
 	CHECK_MAGIC(sem->__magic);
 #endif
-	/*
-	 * We must manipulate count and waking simultaneously and atomically.
-	 * Otherwise we have races between up and __down_failed_interruptible
-	 * waking up on a signal.
-	 */
-
-	spin_lock_irqsave(&semaphore_lock, flags);
-	count = atomic_read(&sem->count) + 1;
-	waking = atomic_read(&sem->waking);
-	if (count <= 0)
-		waking++;
-	atomic_set(&sem->count, count);
-	atomic_set(&sem->waking, waking);
-	spin_unlock_irqrestore(&semaphore_lock, flags);
 
-	if (unlikely(count <= 0))
-		__up_wakeup(sem);
+	if (unlikely(atomic_inc_return(&sem->count) <= 0))
+		__up(sem);
 }
 
-#endif /* CONFIG_CPU_HAS_LLDSCD */
+#endif /* __KERNEL__ */
 
-#endif /* _ASM_SEMAPHORE_H */
+#endif /* __ASM_SEMAPHORE_H */
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index ae455b04b31a..83c735adef98 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -315,24 +315,6 @@
 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS
 #endif
 
-#ifdef CONFIG_TITAN_SERIAL
-/* 16552 20 MHz crystal */
-#define TITAN_SERIAL_BASE_BAUD	( 20000000 / 16 )
-#define	TITAN_SERIAL_IRQ	XXX
-#define	TITAN_SERIAL_BASE	0xffffffff
-
-#define	_TITAN_SERIAL_INIT(int, base)					\
-	{ baud_base: TITAN_SERIAL_BASE_BAUD, irq: int,			\
-	  flags: STD_COM_FLAGS,	iomem_base: (u8 *) base,		\
-	  iomem_reg_shift: 2, io_type: SERIAL_IO_MEM			\
-	}
-
-#define TITAN_SERIAL_PORT_DEFNS						\
-	_TITAN_SERIAL_INIT(TITAN_SERIAL_IRQ, TITAN_SERIAL_BASE)
-#else
-#define TITAN_SERIAL_PORT_DEFNS
-#endif
-
 #ifdef CONFIG_DDB5477
 #include <asm/ddb5xxx/ddb5477.h>
 #define DDB5477_SERIAL_PORT_DEFNS                                       \
@@ -371,7 +353,6 @@
 	MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS		\
 	MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS		\
 	MOMENCO_OCELOT_SERIAL_PORT_DEFNS		\
-	TITAN_SERIAL_PORT_DEFNS				\
 	TXX927_SERIAL_PORT_DEFNS                        \
 	AU1000_SERIAL_PORT_DEFNS
 
diff --git a/include/asm-mips/setup.h b/include/asm-mips/setup.h
new file mode 100644
index 000000000000..737fa4a6912e
--- /dev/null
+++ b/include/asm-mips/setup.h
@@ -0,0 +1,8 @@
+#ifdef __KERNEL__
+#ifndef _MIPS_SETUP_H
+#define _MIPS_SETUP_H
+
+#define COMMAND_LINE_SIZE	256
+
+#endif /* __SETUP_H */
+#endif /* __KERNEL__ */
diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h
index 4146d42d48fe..f0ef26b43f7e 100644
--- a/include/asm-mips/smp.h
+++ b/include/asm-mips/smp.h
@@ -51,8 +51,6 @@ extern cpumask_t phys_cpu_present_map;
 extern cpumask_t cpu_online_map;
 #define cpu_possible_map	phys_cpu_present_map
 
-#define cpu_online(cpu)		cpu_isset(cpu, cpu_online_map)
-
 extern cpumask_t cpu_callout_map;
 /* We don't mark CPUs online until __cpu_up(), so we need another measure */
 static inline int num_booting_cpus(void)
@@ -91,12 +89,6 @@ extern void prom_init_secondary(void);
 extern void prom_prepare_cpus(unsigned int max_cpus);
 
 /*
- * Do whatever setup needs to be done for SMP at the board level.  Return
- * the number of cpus in the system, including this one
- */
-extern int prom_setup_smp(void);
-
-/*
  * Last chance for the board code to finish SMP initialization before
  * the CPU is "online".
  */
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 626a8ab288e1..53a441c3cb3b 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -302,6 +302,7 @@
 		or	t0, t1
 		xori	t0, 0x1f
 		mtc0	t0, CP0_STATUS
+		irq_disable_hazard
 		.endm
 
 /*
@@ -314,6 +315,7 @@
 		or	t0, t1
 		xori	t0, 0x1e
 		mtc0	t0, CP0_STATUS
+		irq_enable_hazard
 		.endm
 
 /*
@@ -326,6 +328,7 @@
 		or	t0, t1
 		xori	t0, 0x1e
 		mtc0	t0, CP0_STATUS
+		irq_disable_hazard
 		.endm
 
 #endif /* _ASM_STACKFRAME_H */
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 9b7354b872f1..9bacd119796b 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -19,6 +19,7 @@
 
 #include <asm/addrspace.h>
 #include <asm/ptrace.h>
+#include <asm/hazards.h>
 
 __asm__ (
 	".macro\tlocal_irq_enable\n\t"
@@ -29,6 +30,7 @@ __asm__ (
 	"ori\t$1,0x1f\n\t"
 	"xori\t$1,0x1e\n\t"
 	"mtc0\t$1,$12\n\t"
+	"irq_enable_hazard\n\t"
 	".set\tpop\n\t"
 	".endm");
 
@@ -57,9 +59,7 @@ __asm__ (
 	"xori\t$1,1\n\t"
 	".set\tnoreorder\n\t"
 	"mtc0\t$1,$12\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
+	"irq_disable_hazard\n\t"
 	".set\tpop\n\t"
 	".endm");
 
@@ -80,7 +80,7 @@ __asm__ (
 	".set\tpop\n\t"
 	".endm");
 
-#define local_save_flags(x)							\
+#define local_save_flags(x)						\
 __asm__ __volatile__(							\
 	"local_save_flags %0"						\
 	: "=r" (x))
@@ -95,9 +95,7 @@ __asm__ (
 	"xori\t$1, 1\n\t"
 	".set\tnoreorder\n\t"
 	"mtc0\t$1, $12\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
+	"irq_disable_hazard\n\t"
 	".set\tpop\n\t"
 	".endm");
 
@@ -108,7 +106,8 @@ __asm__ __volatile__(							\
 	: /* no inputs */						\
 	: "memory")
 
-__asm__(".macro\tlocal_irq_restore flags\n\t"
+__asm__ (
+	".macro\tlocal_irq_restore flags\n\t"
 	".set\tnoreorder\n\t"
 	".set\tnoat\n\t"
 	"mfc0\t$1, $12\n\t"
@@ -117,14 +116,12 @@ __asm__(".macro\tlocal_irq_restore flags\n\t"
 	"xori\t$1, 1\n\t"
 	"or\t\\flags, $1\n\t"
 	"mtc0\t\\flags, $12\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
+	"irq_disable_hazard\n\t"
 	".set\tat\n\t"
 	".set\treorder\n\t"
 	".endm");
 
-#define local_irq_restore(flags)						\
+#define local_irq_restore(flags)					\
 do {									\
 	unsigned long __tmp1;						\
 									\
diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h
index 11782520310b..508b32ad330a 100644
--- a/include/asm-mips/thread_info.h
+++ b/include/asm-mips/thread_info.h
@@ -68,6 +68,9 @@ register struct thread_info *__current_thread_info __asm__("$28");
 #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS64)
 #define THREAD_SIZE_ORDER (2)
 #endif
+#ifdef CONFIG_PAGE_SIZE_8KB
+#define THREAD_SIZE_ORDER (1)
+#endif
 #ifdef CONFIG_PAGE_SIZE_16KB
 #define THREAD_SIZE_ORDER (0)
 #endif
diff --git a/include/asm-mips/titan_dep.h b/include/asm-mips/titan_dep.h
index e25423d39bb5..d820445e8ead 100644
--- a/include/asm-mips/titan_dep.h
+++ b/include/asm-mips/titan_dep.h
@@ -16,9 +16,6 @@
 #include <asm/addrspace.h>              /* for KSEG1ADDR() */
 #include <asm/byteorder.h>              /* for cpu_to_le32() */
 
-/* Turn on serial */
-#define	CONFIG_TITAN_SERIAL
-
 /* PCI */
 #define	TITAN_PCI_BASE			0xbb000000
 
@@ -50,8 +47,181 @@
  */
 #define RM9000x2_HTLINK_REG     0xbb000644
 #define RM9000x2_BASE_ADDR      0xbb000000
-#define RM9000x2_OCD_HTCFGA     0x06f8
-#define RM9000x2_OCD_HTCFGD     0x06fc
+
+#define OCD_BASE                0xfb000000UL
+#define OCD_SIZE                0x3000UL
+
+extern unsigned long ocd_base;
+
+/*
+ * OCD Registers
+ */
+#define RM9000x2_OCD_LKB5		0x0128		/* Ethernet */
+#define RM9000x2_OCD_LKM5		0x012c
+
+#define RM9000x2_OCD_LKB7		0x0138		/* HT Region 0 */
+#define RM9000x2_OCD_LKM7		0x013c
+#define RM9000x2_OCD_LKB8		0x0140		/* HT Region 1 */
+#define RM9000x2_OCD_LKM8		0x0144
+
+#define RM9000x2_OCD_LKB9		0x0148		/* Local Bus */
+#define RM9000x2_OCD_LKM9		0x014c
+#define RM9000x2_OCD_LKB10		0x0150
+#define RM9000x2_OCD_LKM10		0x0154
+#define RM9000x2_OCD_LKB11		0x0158
+#define RM9000x2_OCD_LKM11		0x015c
+#define RM9000x2_OCD_LKB12		0x0160
+#define RM9000x2_OCD_LKM12		0x0164
+
+#define RM9000x2_OCD_LKB13		0x0168		/* Scratch RAM */
+#define RM9000x2_OCD_LKM13		0x016c
+
+#define RM9000x2_OCD_LPD0		0x0200		/* Local Bus */
+#define RM9000x2_OCD_LPD1		0x0210
+#define RM9000x2_OCD_LPD2		0x0220
+#define RM9000x2_OCD_LPD3		0x0230
+
+#define RM9000x2_OCD_HTDVID		0x0600	/* HT Device Header */
+#define RM9000x2_OCD_HTSC		0x0604
+#define RM9000x2_OCD_HTCCR		0x0608
+#define RM9000x2_OCD_HTBHL		0x060c
+#define RM9000x2_OCD_HTBAR0		0x0610
+#define RM9000x2_OCD_HTBAR1		0x0614
+#define RM9000x2_OCD_HTBAR2		0x0618
+#define RM9000x2_OCD_HTBAR3		0x061c
+#define RM9000x2_OCD_HTBAR4		0x0620
+#define RM9000x2_OCD_HTBAR5		0x0624
+#define RM9000x2_OCD_HTCBCPT		0x0628
+#define RM9000x2_OCD_HTSDVID		0x062c
+#define RM9000x2_OCD_HTXRA		0x0630
+#define RM9000x2_OCD_HTCAP1		0x0634
+#define RM9000x2_OCD_HTIL		0x063c
+
+#define RM9000x2_OCD_HTLCC		0x0640	/* HT Capability Block */
+#define RM9000x2_OCD_HTLINK		0x0644
+#define RM9000x2_OCD_HTFQREV		0x0648
+
+#define RM9000x2_OCD_HTERCTL		0x0668	/* HT Controller */
+#define RM9000x2_OCD_HTRXDB		0x066c
+#define RM9000x2_OCD_HTIMPED		0x0670
+#define RM9000x2_OCD_HTSWIMP		0x0674
+#define RM9000x2_OCD_HTCAL		0x0678
+
+#define RM9000x2_OCD_HTBAA30		0x0680
+#define RM9000x2_OCD_HTBAA54		0x0684
+#define RM9000x2_OCD_HTMASK0		0x0688
+#define RM9000x2_OCD_HTMASK1		0x068c
+#define RM9000x2_OCD_HTMASK2		0x0690
+#define RM9000x2_OCD_HTMASK3		0x0694
+#define RM9000x2_OCD_HTMASK4		0x0698
+#define RM9000x2_OCD_HTMASK5		0x069c
+
+#define RM9000x2_OCD_HTIFCTL		0x06a0
+#define RM9000x2_OCD_HTPLL		0x06a4
+
+#define RM9000x2_OCD_HTSRI		0x06b0
+#define RM9000x2_OCD_HTRXNUM		0x06b4
+#define RM9000x2_OCD_HTTXNUM		0x06b8
+
+#define RM9000x2_OCD_HTTXCNT		0x06c8
+
+#define RM9000x2_OCD_HTERROR		0x06d8
+#define RM9000x2_OCD_HTRCRCE		0x06dc
+#define RM9000x2_OCD_HTEOI		0x06e0
+
+#define RM9000x2_OCD_CRCR		0x06f0
+
+#define RM9000x2_OCD_HTCFGA		0x06f8
+#define RM9000x2_OCD_HTCFGD		0x06fc
+
+#define RM9000x2_OCD_INTMSG		0x0a00
+
+#define RM9000x2_OCD_INTPIN0		0x0a40
+#define RM9000x2_OCD_INTPIN1		0x0a44
+#define RM9000x2_OCD_INTPIN2		0x0a48
+#define RM9000x2_OCD_INTPIN3		0x0a4c
+#define RM9000x2_OCD_INTPIN4		0x0a50
+#define RM9000x2_OCD_INTPIN5		0x0a54
+#define RM9000x2_OCD_INTPIN6		0x0a58
+#define RM9000x2_OCD_INTPIN7		0x0a5c
+#define RM9000x2_OCD_SEM		0x0a60
+#define RM9000x2_OCD_SEMSET		0x0a64
+#define RM9000x2_OCD_SEMCLR		0x0a68
+
+#define RM9000x2_OCD_TKT		0x0a70
+#define RM9000x2_OCD_TKTINC		0x0a74
+
+#define RM9000x2_OCD_NMICONFIG		0x0ac0		/* Interrupts */
+#define RM9000x2_OCD_INTP0PRI		0x1a80
+#define RM9000x2_OCD_INTP1PRI		0x1a80
+#define RM9000x2_OCD_INTP0STATUS0	0x1b00
+#define RM9000x2_OCD_INTP0MASK0		0x1b04
+#define RM9000x2_OCD_INTP0SET0		0x1b08
+#define RM9000x2_OCD_INTP0CLEAR0	0x1b0c
+#define RM9000x2_OCD_INTP0STATUS1	0x1b10
+#define RM9000x2_OCD_INTP0MASK1		0x1b14
+#define RM9000x2_OCD_INTP0SET1		0x1b18
+#define RM9000x2_OCD_INTP0CLEAR1	0x1b1c
+#define RM9000x2_OCD_INTP0STATUS2	0x1b20
+#define RM9000x2_OCD_INTP0MASK2		0x1b24
+#define RM9000x2_OCD_INTP0SET2		0x1b28
+#define RM9000x2_OCD_INTP0CLEAR2	0x1b2c
+#define RM9000x2_OCD_INTP0STATUS3	0x1b30
+#define RM9000x2_OCD_INTP0MASK3		0x1b34
+#define RM9000x2_OCD_INTP0SET3		0x1b38
+#define RM9000x2_OCD_INTP0CLEAR3	0x1b3c
+#define RM9000x2_OCD_INTP0STATUS4	0x1b40
+#define RM9000x2_OCD_INTP0MASK4		0x1b44
+#define RM9000x2_OCD_INTP0SET4		0x1b48
+#define RM9000x2_OCD_INTP0CLEAR4	0x1b4c
+#define RM9000x2_OCD_INTP0STATUS5	0x1b50
+#define RM9000x2_OCD_INTP0MASK5		0x1b54
+#define RM9000x2_OCD_INTP0SET5		0x1b58
+#define RM9000x2_OCD_INTP0CLEAR5	0x1b5c
+#define RM9000x2_OCD_INTP0STATUS6	0x1b60
+#define RM9000x2_OCD_INTP0MASK6		0x1b64
+#define RM9000x2_OCD_INTP0SET6		0x1b68
+#define RM9000x2_OCD_INTP0CLEAR6	0x1b6c
+#define RM9000x2_OCD_INTP0STATUS7	0x1b70
+#define RM9000x2_OCD_INTP0MASK7		0x1b74
+#define RM9000x2_OCD_INTP0SET7		0x1b78
+#define RM9000x2_OCD_INTP0CLEAR7	0x1b7c
+#define RM9000x2_OCD_INTP1STATUS0	0x2b00
+#define RM9000x2_OCD_INTP1MASK0		0x2b04
+#define RM9000x2_OCD_INTP1SET0		0x2b08
+#define RM9000x2_OCD_INTP1CLEAR0	0x2b0c
+#define RM9000x2_OCD_INTP1STATUS1	0x2b10
+#define RM9000x2_OCD_INTP1MASK1		0x2b14
+#define RM9000x2_OCD_INTP1SET1		0x2b18
+#define RM9000x2_OCD_INTP1CLEAR1	0x2b1c
+#define RM9000x2_OCD_INTP1STATUS2	0x2b20
+#define RM9000x2_OCD_INTP1MASK2		0x2b24
+#define RM9000x2_OCD_INTP1SET2		0x2b28
+#define RM9000x2_OCD_INTP1CLEAR2	0x2b2c
+#define RM9000x2_OCD_INTP1STATUS3	0x2b30
+#define RM9000x2_OCD_INTP1MASK3		0x2b34
+#define RM9000x2_OCD_INTP1SET3		0x2b38
+#define RM9000x2_OCD_INTP1CLEAR3	0x2b3c
+#define RM9000x2_OCD_INTP1STATUS4	0x2b40
+#define RM9000x2_OCD_INTP1MASK4		0x2b44
+#define RM9000x2_OCD_INTP1SET4		0x2b48
+#define RM9000x2_OCD_INTP1CLEAR4	0x2b4c
+#define RM9000x2_OCD_INTP1STATUS5	0x2b50
+#define RM9000x2_OCD_INTP1MASK5		0x2b54
+#define RM9000x2_OCD_INTP1SET5		0x2b58
+#define RM9000x2_OCD_INTP1CLEAR5	0x2b5c
+#define RM9000x2_OCD_INTP1STATUS6	0x2b60
+#define RM9000x2_OCD_INTP1MASK6		0x2b64
+#define RM9000x2_OCD_INTP1SET6		0x2b68
+#define RM9000x2_OCD_INTP1CLEAR6	0x2b6c
+#define RM9000x2_OCD_INTP1STATUS7	0x2b70
+#define RM9000x2_OCD_INTP1MASK7		0x2b74
+#define RM9000x2_OCD_INTP1SET7		0x2b78
+#define RM9000x2_OCD_INTP1CLEAR7	0x2b7c
+
+#define OCD_READ(reg)		(*(volatile unsigned int *)(ocd_base + (reg)))
+#define OCD_WRITE(reg, val)					\
+	do { *(volatile unsigned int *)(ocd_base + (reg)) = (val); } while (0)
 
 /*
  * Hypertransport specific macros
@@ -65,4 +235,3 @@
 #define RM9K_READ_16(ofs, val)  *(val) = *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs)
 
 #endif 
-
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index 4dfc72bd1b98..7c5a30028776 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -297,16 +297,17 @@
 #define __NR_mq_timedreceive		(__NR_Linux + 274)
 #define __NR_mq_notify			(__NR_Linux + 275)
 #define __NR_mq_getsetattr		(__NR_Linux + 276)
+#define __NR_vserver			(__NR_Linux + 277)
 
 /*
  * Offset of the last Linux o32 flavoured syscall
  */
-#define __NR_Linux_syscalls		276
+#define __NR_Linux_syscalls		277
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 
 #define __NR_O32_Linux			4000
-#define __NR_O32_Linux_syscalls		276
+#define __NR_O32_Linux_syscalls		277
 
 #if _MIPS_SIM == _MIPS_SIM_ABI64
 
@@ -550,16 +551,17 @@
 #define __NR_mq_timedreceive		(__NR_Linux + 233)
 #define __NR_mq_notify			(__NR_Linux + 234)
 #define __NR_mq_getsetattr		(__NR_Linux + 235)
+#define __NR_vserver			(__NR_Linux + 236)
 
 /*
  * Offset of the last Linux flavoured syscall
  */
-#define __NR_Linux_syscalls		235
+#define __NR_Linux_syscalls		236
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
 
 #define __NR_64_Linux			5000
-#define __NR_64_Linux_syscalls		235
+#define __NR_64_Linux_syscalls		236
 
 #if _MIPS_SIM == _MIPS_SIM_NABI32
 
@@ -807,16 +809,17 @@
 #define __NR_mq_timedreceive		(__NR_Linux + 237)
 #define __NR_mq_notify			(__NR_Linux + 238)
 #define __NR_mq_getsetattr		(__NR_Linux + 239)
+#define __NR_vserver			(__NR_Linux + 240)
 
 /*
  * Offset of the last N32 flavoured syscall
  */
-#define __NR_Linux_syscalls		239
+#define __NR_Linux_syscalls		240
 
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 
 #define __NR_N32_Linux			6000
-#define __NR_N32_Linux_syscalls		239
+#define __NR_N32_Linux_syscalls		240
 
 #ifndef __ASSEMBLY__
 
diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h
index 82d9db6cb352..5b55083c5281 100644
--- a/include/asm-mips/vr41xx/capcella.h
+++ b/include/asm-mips/vr41xx/capcella.h
@@ -1,54 +1,28 @@
 /*
- * FILE NAME
- *	include/asm-mips/vr41xx/capcella.h
+ *  capcella.h, Include file for ZAO Networks Capcella.
  *
- * BRIEF MODULE DESCRIPTION
- *	Include file for ZAO Networks Capcella.
+ *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  *
- * Copyright 2002,2003 Yoichi Yuasa
- *                yuasa@hh.iij4u.or.jp
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
  *
- *  This program is free software; you can redistribute it and/or modify it
- *  under the terms of the GNU General Public License as published by the
- *  Free Software Foundation; either version 2 of the License, or (at your
- *  option) any later version.
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #ifndef __ZAO_CAPCELLA_H
 #define __ZAO_CAPCELLA_H
 
-#include <asm/addrspace.h>
 #include <asm/vr41xx/vr41xx.h>
 
 /*
- * Board specific address mapping
- */
-#define VR41XX_PCI_MEM1_BASE		0x10000000
-#define VR41XX_PCI_MEM1_SIZE		0x04000000
-#define VR41XX_PCI_MEM1_MASK		0x7c000000
-
-#define VR41XX_PCI_MEM2_BASE		0x14000000
-#define VR41XX_PCI_MEM2_SIZE		0x02000000
-#define VR41XX_PCI_MEM2_MASK		0x7e000000
-
-#define VR41XX_PCI_IO_BASE		0x16000000
-#define VR41XX_PCI_IO_SIZE		0x02000000
-#define VR41XX_PCI_IO_MASK		0x7e000000
-
-#define VR41XX_PCI_IO_START		0x01000000
-#define VR41XX_PCI_IO_END		0x01ffffff
-
-#define VR41XX_PCI_MEM_START		0x12000000
-#define VR41XX_PCI_MEM_END		0x15ffffff
-
-#define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
-#define IO_PORT_RESOURCE_START		0
-#define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
-#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
-#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
-#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
-#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
-
-/*
  * General-Purpose I/O Pin Number
  */
 #define PC104PLUS_INTA_PIN		2
diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h
index bff9f0aafcce..e6ac3c8e8bae 100644
--- a/include/asm-mips/vr41xx/mpc30x.h
+++ b/include/asm-mips/vr41xx/mpc30x.h
@@ -1,54 +1,28 @@
 /*
- * FILE NAME
- *	include/asm-mips/vr41xx/mpc30x.h
+ *  mpc30x.h, Include file for Victor MP-C303/304.
  *
- * BRIEF MODULE DESCRIPTION
- *	Include file for Victor MP-C303/304.
+ *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  *
- * Copyright 2002,2003 Yoichi Yuasa
- *                yuasa@hh.iij4u.or.jp
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
  *
- *  This program is free software; you can redistribute it and/or modify it
- *  under the terms of the GNU General Public License as published by the
- *  Free Software Foundation; either version 2 of the License, or (at your
- *  option) any later version.
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #ifndef __VICTOR_MPC30X_H
 #define __VICTOR_MPC30X_H
 
-#include <asm/addrspace.h>
 #include <asm/vr41xx/vr41xx.h>
 
 /*
- * Board specific address mapping
- */
-#define VR41XX_PCI_MEM1_BASE		0x10000000
-#define VR41XX_PCI_MEM1_SIZE		0x04000000
-#define VR41XX_PCI_MEM1_MASK		0x7c000000
-
-#define VR41XX_PCI_MEM2_BASE		0x14000000
-#define VR41XX_PCI_MEM2_SIZE		0x02000000
-#define VR41XX_PCI_MEM2_MASK		0x7e000000
-
-#define VR41XX_PCI_IO_BASE		0x16000000
-#define VR41XX_PCI_IO_SIZE		0x02000000
-#define VR41XX_PCI_IO_MASK		0x7e000000
-
-#define VR41XX_PCI_IO_START		0x01000000
-#define VR41XX_PCI_IO_END		0x01ffffff
-
-#define VR41XX_PCI_MEM_START		0x12000000
-#define VR41XX_PCI_MEM_END		0x15ffffff
-
-#define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
-#define IO_PORT_RESOURCE_START		0
-#define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
-#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
-#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
-#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
-#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
-
-/*
  * General-Purpose I/O Pin Number
  */
 #define VRC4173_PIN			1
diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h
new file mode 100644
index 000000000000..273c6392688f
--- /dev/null
+++ b/include/asm-mips/vr41xx/tb0219.h
@@ -0,0 +1,42 @@
+/*
+ *  tb0219.h, Include file for TANBAC TB0219.
+ *
+ *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
+ *
+ *  Modified for TANBAC TB0219:
+ *  Copyright (C) 2003 Megasolution Inc.  <matsu@megasolution.jp>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#ifndef __TANBAC_TB0219_H
+#define __TANBAC_TB0219_H
+
+#include <asm/vr41xx/vr41xx.h>
+
+/*
+ * General-Purpose I/O Pin Number
+ */
+#define TB0219_PCI_SLOT1_PIN		2
+#define TB0219_PCI_SLOT2_PIN		3
+#define TB0219_PCI_SLOT3_PIN		4
+
+/*
+ * Interrupt Number
+ */
+#define TB0219_PCI_SLOT1_IRQ		GIU_IRQ(TB0219_PCI_SLOT1_PIN)
+#define TB0219_PCI_SLOT2_IRQ		GIU_IRQ(TB0219_PCI_SLOT2_PIN)
+#define TB0219_PCI_SLOT3_IRQ		GIU_IRQ(TB0219_PCI_SLOT3_PIN)
+
+#endif /* __TANBAC_TB0219_H */
diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h
index 97ca8898b763..0ff9a60ecacc 100644
--- a/include/asm-mips/vr41xx/tb0226.h
+++ b/include/asm-mips/vr41xx/tb0226.h
@@ -1,54 +1,28 @@
 /*
- * FILE NAME
- *	include/asm-mips/vr41xx/tb0226.h
+ *  tb0226.h, Include file for TANBAC TB0226.
  *
- * BRIEF MODULE DESCRIPTION
- *	Include file for TANBAC TB0226.
+ *  Copyright (C) 2002-2004  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  *
- * Copyright 2002,2003 Yoichi Yuasa
- *                yuasa@hh.iij4u.or.jp
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
  *
- *  This program is free software; you can redistribute it and/or modify it
- *  under the terms of the GNU General Public License as published by the
- *  Free Software Foundation; either version 2 of the License, or (at your
- *  option) any later version.
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #ifndef __TANBAC_TB0226_H
 #define __TANBAC_TB0226_H
 
-#include <asm/addrspace.h>
 #include <asm/vr41xx/vr41xx.h>
 
 /*
- * Board specific address mapping
- */
-#define VR41XX_PCI_MEM1_BASE		0x10000000
-#define VR41XX_PCI_MEM1_SIZE		0x04000000
-#define VR41XX_PCI_MEM1_MASK		0x7c000000
-
-#define VR41XX_PCI_MEM2_BASE		0x14000000
-#define VR41XX_PCI_MEM2_SIZE		0x02000000
-#define VR41XX_PCI_MEM2_MASK		0x7e000000
-
-#define VR41XX_PCI_IO_BASE		0x16000000
-#define VR41XX_PCI_IO_SIZE		0x02000000
-#define VR41XX_PCI_IO_MASK		0x7e000000
-
-#define VR41XX_PCI_IO_START		0x01000000
-#define VR41XX_PCI_IO_END		0x01ffffff
-
-#define VR41XX_PCI_MEM_START		0x12000000
-#define VR41XX_PCI_MEM_END		0x15ffffff
-
-#define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
-#define IO_PORT_RESOURCE_START		0
-#define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
-#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
-#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
-#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
-#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
-
-/*
  * General-Purpose I/O Pin Number
  */
 #define GD82559_1_PIN			2
diff --git a/include/asm-mips/vr41xx/tb0229.h b/include/asm-mips/vr41xx/tb0229.h
deleted file mode 100644
index bd8cbc876e49..000000000000
--- a/include/asm-mips/vr41xx/tb0229.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * FILE NAME
- *	include/asm-mips/vr41xx/tb0229.h
- *
- * BRIEF MODULE DESCRIPTION
- *	Include file for TANBAC TB0229 and TB0219.
- *
- * Copyright 2002,2003 Yoichi Yuasa
- *                yuasa@hh.iij4u.or.jp
- *
- * Modified for TANBAC TB0229:
- * Copyright 2003 Megasolution Inc.
- *                matsu@megasolution.jp
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under the terms of the GNU General Public License as published by the
- *  Free Software Foundation; either version 2 of the License, or (at your
- *  option) any later version.
- */
-#ifndef __TANBAC_TB0229_H
-#define __TANBAC_TB0229_H
-
-#include <asm/addrspace.h>
-#include <asm/vr41xx/vr41xx.h>
-
-/*
- * Board specific address mapping
- */
-#define VR41XX_PCI_MEM1_BASE		0x10000000
-#define VR41XX_PCI_MEM1_SIZE		0x04000000
-#define VR41XX_PCI_MEM1_MASK		0x7c000000
-
-#define VR41XX_PCI_MEM2_BASE		0x14000000
-#define VR41XX_PCI_MEM2_SIZE		0x02000000
-#define VR41XX_PCI_MEM2_MASK		0x7e000000
-
-#define VR41XX_PCI_IO_BASE		0x16000000
-#define VR41XX_PCI_IO_SIZE		0x02000000
-#define VR41XX_PCI_IO_MASK		0x7e000000
-
-#define VR41XX_PCI_IO_START		0x01000000
-#define VR41XX_PCI_IO_END		0x01ffffff
-
-#define VR41XX_PCI_MEM_START		0x12000000
-#define VR41XX_PCI_MEM_END		0x15ffffff
-
-#define IO_PORT_BASE			KSEG1ADDR(VR41XX_PCI_IO_BASE)
-#define IO_PORT_RESOURCE_START		0
-#define IO_PORT_RESOURCE_END		VR41XX_PCI_IO_SIZE
-#define IO_MEM1_RESOURCE_START		VR41XX_PCI_MEM1_BASE
-#define IO_MEM1_RESOURCE_END		(VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE)
-#define IO_MEM2_RESOURCE_START		VR41XX_PCI_MEM2_BASE
-#define IO_MEM2_RESOURCE_END		(VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE)
-
-/*
- * General-Purpose I/O Pin Number
- */
-#define TB0219_PCI_SLOT1_PIN		2
-#define TB0219_PCI_SLOT2_PIN		3
-#define TB0219_PCI_SLOT3_PIN		4
-
-/*
- * Interrupt Number
- */
-#define TB0219_PCI_SLOT1_IRQ		GIU_IRQ(TB0219_PCI_SLOT1_PIN)
-#define TB0219_PCI_SLOT2_IRQ		GIU_IRQ(TB0219_PCI_SLOT2_PIN)
-#define TB0219_PCI_SLOT3_IRQ		GIU_IRQ(TB0219_PCI_SLOT3_PIN)
-
-#define TB0219_RESET_REGS		KSEG1ADDR(0x0a00000e)
-
-extern void tanbac_tb0229_restart(char *command);
-
-#endif /* __TANBAC_TB0229_H */
diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h
index 53fe1162af7e..c57c8dca6117 100644
--- a/include/asm-mips/vr41xx/vr41xx.h
+++ b/include/asm-mips/vr41xx/vr41xx.h
@@ -43,12 +43,6 @@
 #define PRID_VR4133		0x00000c84
 
 /*
- * Memory resource
- */
-#define IO_MEM_RESOURCE_START	0UL
-#define IO_MEM_RESOURCE_END	0x1fffffffUL
-
-/*
  * Bus Control Uint
  */
 extern unsigned long vr41xx_get_vtclock_frequency(void);
@@ -136,8 +130,71 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
 extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
 extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq));
 
-extern void vr41xx_enable_dsiuint(void);
-extern void vr41xx_disable_dsiuint(void);
+#define PIUINT_COMMAND		0x0040
+#define PIUINT_DATA		0x0020
+#define PIUINT_PAGE1		0x0010
+#define PIUINT_PAGE0		0x0008
+#define PIUINT_DATALOST		0x0004
+#define PIUINT_STATUSCHANGE	0x0001
+
+extern void vr41xx_enable_piuint(uint16_t mask);
+extern void vr41xx_disable_piuint(uint16_t mask);
+
+#define AIUINT_INPUT_DMAEND	0x0800
+#define AIUINT_INPUT_DMAHALT	0x0400
+#define AIUINT_INPUT_DATALOST	0x0200
+#define AIUINT_INPUT_DATA	0x0100
+#define AIUINT_OUTPUT_DMAEND	0x0008
+#define AIUINT_OUTPUT_DMAHALT	0x0004
+#define AIUINT_OUTPUT_NODATA	0x0002
+
+extern void vr41xx_enable_aiuint(uint16_t mask);
+extern void vr41xx_disable_aiuint(uint16_t mask);
+
+#define KIUINT_DATALOST		0x0004
+#define KIUINT_DATAREADY	0x0002
+#define KIUINT_SCAN		0x0001
+
+extern void vr41xx_enable_kiuint(uint16_t mask);
+extern void vr41xx_disable_kiuint(uint16_t mask);
+
+#define DSIUINT_CTS		0x0800
+#define DSIUINT_RXERR		0x0400
+#define DSIUINT_RX		0x0200
+#define DSIUINT_TX		0x0100
+#define DSIUINT_ALL		0x0f00
+
+extern void vr41xx_enable_dsiuint(uint16_t mask);
+extern void vr41xx_disable_dsiuint(uint16_t mask);
+
+#define FIRINT_UNIT		0x0010
+#define FIRINT_RX_DMAEND	0x0008
+#define FIRINT_RX_DMAHALT	0x0004
+#define FIRINT_TX_DMAEND	0x0002
+#define FIRINT_TX_DMAHALT	0x0001
+
+extern void vr41xx_enable_firint(uint16_t mask);
+extern void vr41xx_disable_firint(uint16_t mask);
+
+extern void vr41xx_enable_pciint(void);
+extern void vr41xx_disable_pciint(void);
+
+extern void vr41xx_enable_scuint(void);
+extern void vr41xx_disable_scuint(void);
+
+#define CSIINT_TX_DMAEND	0x0040
+#define CSIINT_TX_DMAHALT	0x0020
+#define CSIINT_TX_DATA		0x0010
+#define CSIINT_TX_FIFOEMPTY	0x0008
+#define CSIINT_RX_DMAEND	0x0004
+#define CSIINT_RX_DMAHALT	0x0002
+#define CSIINT_RX_FIFOEMPTY	0x0001
+
+extern void vr41xx_enable_csiint(uint16_t mask);
+extern void vr41xx_disable_csiint(uint16_t mask);
+
+extern void vr41xx_enable_bcuint(void);
+extern void vr41xx_disable_bcuint(void);
 
 /*
  * Power Management Unit
@@ -220,18 +277,71 @@ extern void vr41xx_dsiu_init(void);
 /*
  * PCI Control Unit
  */
-struct vr41xx_pci_address_space {
-	u32 internal_base;
-	u32 address_mask;
-	u32 pci_base;
+#define PCI_MASTER_ADDRESS_MASK	0x7fffffffU
+
+struct pci_master_address_conversion {
+	uint32_t bus_base_address;
+	uint32_t address_mask;
+	uint32_t pci_base_address;
+};
+
+struct pci_target_address_conversion {
+	uint32_t address_mask;
+	uint32_t bus_base_address;
+};
+
+typedef enum {
+	CANNOT_LOCK_FROM_DEVICE,
+	CAN_LOCK_FROM_DEVICE,
+} pci_exclusive_access_t;
+
+struct pci_mailbox_address {
+	uint32_t base_address;
 };
 
-struct vr41xx_pci_address_map {
-	struct vr41xx_pci_address_space *mem1;
-	struct vr41xx_pci_address_space *mem2;
-	struct vr41xx_pci_address_space *io;
+struct pci_target_address_window {
+	uint32_t base_address;
+};
+
+typedef enum {
+	PCI_ARBITRATION_MODE_FAIR,
+	PCI_ARBITRATION_MODE_ALTERNATE_0,
+	PCI_ARBITRATION_MODE_ALTERNATE_B,
+} pci_arbiter_priority_control_t;
+
+typedef enum {
+	PCI_TAKE_AWAY_GNT_DISABLE,
+	PCI_TAKE_AWAY_GNT_ENABLE,
+} pci_take_away_gnt_mode_t;
+
+struct pci_controller_unit_setup {
+	struct pci_master_address_conversion *master_memory1;
+	struct pci_master_address_conversion *master_memory2;
+
+	struct pci_target_address_conversion *target_memory1;
+	struct pci_target_address_conversion *target_memory2;
+
+	struct pci_master_address_conversion *master_io;
+
+	pci_exclusive_access_t exclusive_access;
+
+	uint32_t pci_clock_max;
+	uint8_t wait_time_limit_from_irdy_to_trdy;	/* Only VR4122 is supported */
+
+	struct pci_mailbox_address *mailbox;
+	struct pci_target_address_window *target_window1;
+	struct pci_target_address_window *target_window2;
+
+	uint8_t master_latency_timer;
+	uint8_t retry_limit;
+
+	pci_arbiter_priority_control_t arbiter_priority_control;
+	pci_take_away_gnt_mode_t take_away_gnt_mode;
+
+	struct resource *mem_resource;
+	struct resource *io_resource;
 };
 
-extern void vr41xx_pciu_init(struct vr41xx_pci_address_map *map);
+extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup);
 
 #endif /* __NEC_VR41XX_H */
diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h
index a8e873c06481..b14ef0377da1 100644
--- a/include/asm-mips/vr41xx/vrc4173.h
+++ b/include/asm-mips/vr41xx/vrc4173.h
@@ -1,19 +1,24 @@
 /*
- * FILE NAME
- *	include/asm-mips/vr41xx/vrc4173.h
+ *  vrc4173.h, Include file for NEC VRC4173.
  *
- * BRIEF MODULE DESCRIPTION
- *	Include file for NEC VRC4173.
+ *  Copyright (C) 2000  Michael R. McDonald
+ *  Copyright (C) 2001-2003 Montavista Software Inc.
+ *    Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com>
+ *  Copyright (C) 2004  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
  *
- * Copyright (C) 2000 by Michael R. McDonald
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
  *
- * Copyright 2001-2003 Montavista Software Inc.
- * Author: Yoichi Yuasa
- *         yyuasa@mvista.com or source@mvista.com
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #ifndef __NEC_VRC4173_H 
 #define __NEC_VRC4173_H 
@@ -72,35 +77,38 @@ extern unsigned long vrc4173_io_offset;
 /*
  * Clock Mask Unit
  */
-#define VRC4173_PIU_CLOCK		0x0001
-#define VRC4173_KIU_CLOCK		0x0002
-#define VRC4173_AIU_CLOCK		0x0004
-#define VRC4173_PS2CH1_CLOCK		0x0008
-#define VRC4173_PS2CH2_CLOCK		0x0010
-#define VRC4173_USBU_PCI_CLOCK		0x0020
-#define VRC4173_CARDU1_PCI_CLOCK	0x0040
-#define VRC4173_CARDU2_PCI_CLOCK	0x0080
-#define VRC4173_AC97U_PCI_CLOCK		0x0100
-#define VRC4173_USBU_48MHz_CLOCK	0x0400
-#define VRC4173_EXT_48MHz_CLOCK		0x0800
-#define VRC4173_48MHz_CLOCK		0x1000
+typedef enum vrc4173_clock {
+	VRC4173_PIU_CLOCK,
+	VRC4173_KIU_CLOCK,
+	VRC4173_AIU_CLOCK,
+	VRC4173_PS2_CH1_CLOCK,
+	VRC4173_PS2_CH2_CLOCK,
+	VRC4173_USBU_PCI_CLOCK,
+	VRC4173_CARDU1_PCI_CLOCK,
+	VRC4173_CARDU2_PCI_CLOCK,
+	VRC4173_AC97U_PCI_CLOCK,
+	VRC4173_USBU_48MHz_CLOCK,
+	VRC4173_EXT_48MHz_CLOCK,
+	VRC4173_48MHz_CLOCK,
+} vrc4173_clock_t;
 
-extern void vrc4173_clock_supply(u16 mask);
-extern void vrc4173_clock_mask(u16 mask);
+extern void vrc4173_supply_clock(vrc4173_clock_t clock);
+extern void vrc4173_mask_clock(vrc4173_clock_t clock);
 
 /*
  * General-Purpose I/O Unit
  */
-enum {
-	PS2CH1_SELECT,
-	PS2CH2_SELECT,
-	TOUCHPANEL_SELECT,
-	KIU8_SELECT,
-	KIU10_SELECT,
-	KIU12_SELECT,
-	GPIO_SELECT
-};
+typedef enum vrc4173_function {
+	PS2_CHANNEL1,
+	PS2_CHANNEL2,
+	TOUCHPANEL,
+	KEYBOARD_8SCANLINES,
+	KEYBOARD_10SCANLINES,
+	KEYBOARD_12SCANLINES,
+	GPIO_0_15PINS,
+	GPIO_16_20PINS,
+} vrc4173_function_t;
 
-extern void vrc4173_select_function(int func);
+extern void vrc4173_select_function(vrc4173_function_t function);
 
 #endif /* __NEC_VRC4173_H */
diff --git a/include/asm-parisc/cpumask.h b/include/asm-parisc/cpumask.h
deleted file mode 100644
index 27f4f17fb15a..000000000000
--- a/include/asm-parisc/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_PARISC_CPUMASK_H
-#define _ASM_PARISC_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_PARISC_CPUMASK_H */
diff --git a/include/asm-parisc/setup.h b/include/asm-parisc/setup.h
index ae25cc4275d3..7da2e5b8747e 100644
--- a/include/asm-parisc/setup.h
+++ b/include/asm-parisc/setup.h
@@ -1,10 +1,6 @@
-/*
- *	Just a place holder. We don't want to have to test x86 before
- *	we include stuff
- */
+#ifndef _PARISC_SETUP_H
+#define _PARISC_SETUP_H
 
-#ifndef _i386_SETUP_H
-#define _i386_SETUP_H
+#define COMMAND_LINE_SIZE	1024
 
-
-#endif /* _i386_SETUP_H */
+#endif /* _PARISC_SETUP_H */
diff --git a/include/asm-ppc/cpumask.h b/include/asm-ppc/cpumask.h
deleted file mode 100644
index 30901089dd41..000000000000
--- a/include/asm-ppc/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_PPC_CPUMASK_H
-#define _ASM_PPC_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_PPC_CPUMASK_H */
diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h
index 4ace72fc4e7b..fca154980c17 100644
--- a/include/asm-ppc/machdep.h
+++ b/include/asm-ppc/machdep.h
@@ -106,7 +106,6 @@ struct machdep_calls {
 };
 
 extern struct machdep_calls ppc_md;
-#define COMMAND_LINE_SIZE 512
 extern char cmd_line[COMMAND_LINE_SIZE];
 
 extern void setup_pci_ptrs(void);
diff --git a/include/asm-ppc/pmac_feature.h b/include/asm-ppc/pmac_feature.h
index 11065e368382..ee15e9c59aa2 100644
--- a/include/asm-ppc/pmac_feature.h
+++ b/include/asm-ppc/pmac_feature.h
@@ -273,6 +273,12 @@ static inline long pmac_call_feature(int selector, struct device_node* node,
  */
 #define PMAC_FTR_ENABLE_MPIC		PMAC_FTR_DEF(19)
 
+/* PMAC_FTR_AACK_DELAY_ENABLE	(NULL, int enable, 0)
+ *
+ * Enable/disable the AACK delay on the northbridge for systems using DFS
+ */
+#define PMAC_FTR_AACK_DELAY_ENABLE     	PMAC_FTR_DEF(20)
+
 
 /* Don't use those directly, they are for the sake of pmac_setup.c */
 extern long pmac_do_feature_call(unsigned int selector, ...);
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index fe7a94383a1d..63fc68e784c5 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -197,6 +197,8 @@ extern inline void prefetchw(const void *x)
 
 #define spin_lock_prefetch(x)	prefetchw(x)
 
+extern int emulate_altivec(struct pt_regs *regs);
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* __ASM_PPC_PROCESSOR_H */
diff --git a/include/asm-ppc/reg.h b/include/asm-ppc/reg.h
index f02ec3cf65ec..15c93af4079a 100644
--- a/include/asm-ppc/reg.h
+++ b/include/asm-ppc/reg.h
@@ -174,6 +174,7 @@
 
 #define SPRN_HID1	0x3F1		/* Hardware Implementation Register 1 */
 #define HID1_EMCP	(1<<31)		/* 7450 Machine Check Pin Enable */
+#define HID1_DFS	(1<<22)		/* 7447A Dynamic Frequency Scaling */
 #define HID1_PC0	(1<<16)		/* 7450 PLL_CFG[0] */
 #define HID1_PC1	(1<<15)		/* 7450 PLL_CFG[1] */
 #define HID1_PC2	(1<<14)		/* 7450 PLL_CFG[2] */
diff --git a/include/asm-ppc/setup.h b/include/asm-ppc/setup.h
index cd458c4f1642..d2d19ee103df 100644
--- a/include/asm-ppc/setup.h
+++ b/include/asm-ppc/setup.h
@@ -6,6 +6,9 @@
 #define m68k_memory memory
 
 #include <asm-m68k/setup.h>
+/* We have a bigger command line buffer. */
+#undef COMMAND_LINE_SIZE
+#define COMMAND_LINE_SIZE	512
 
 #endif /* _PPC_SETUP_H */
 #endif /* __KERNEL__ */
diff --git a/include/asm-ppc/smp.h b/include/asm-ppc/smp.h
index 803fdb583348..4bd15cbdcfaf 100644
--- a/include/asm-ppc/smp.h
+++ b/include/asm-ppc/smp.h
@@ -47,8 +47,6 @@ extern void smp_local_timer_interrupt(struct pt_regs *);
 
 #define smp_processor_id() (current_thread_info()->cpu)
 
-#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map)
-
 extern int __cpu_up(unsigned int cpu);
 
 extern int smp_hw_index[];
diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h
index fdccd739c2d7..e49964652b50 100644
--- a/include/asm-ppc/system.h
+++ b/include/asm-ppc/system.h
@@ -82,7 +82,6 @@ extern int fix_alignment(struct pt_regs *);
 extern void cvt_fd(float *from, double *to, unsigned long *fpscr);
 extern void cvt_df(double *from, float *to, unsigned long *fpscr);
 extern int call_rtas(const char *, int, int, unsigned long *, ...);
-extern int abs(int);
 extern void cacheable_memzero(void *p, unsigned int nb);
 extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
 extern void bad_page_fault(struct pt_regs *, unsigned long, int);
diff --git a/include/asm-ppc/uninorth.h b/include/asm-ppc/uninorth.h
index eeff122f365b..2cf025936edf 100644
--- a/include/asm-ppc/uninorth.h
+++ b/include/asm-ppc/uninorth.h
@@ -142,6 +142,12 @@
  */
 #define UNI_N_HWINIT_STATE_CPU1_FLAG	0x10000000
 
+/* This register controls AACK delay, which is set when 2004 iBook/PowerBook
+ * is in low speed mode.
+ */
+#define UNI_N_AACK_DELAY		0x0100
+#define UNI_N_AACK_DELAY_ENABLE		0x00000001
+
 /* Uninorth 1.5 rev. has additional perf. monitor registers at 0xf00-0xf50 */
 
 
diff --git a/include/asm-ppc64/bitops.h b/include/asm-ppc64/bitops.h
index feeeb9b77b29..6d820e7ea772 100644
--- a/include/asm-ppc64/bitops.h
+++ b/include/asm-ppc64/bitops.h
@@ -288,15 +288,15 @@ static __inline__ int ffs(int x)
 #define hweight16(x) generic_hweight16(x)
 #define hweight8(x) generic_hweight8(x)
 
-extern unsigned long find_next_zero_bit(unsigned long *addr, unsigned long size, unsigned long offset);
+extern unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
 #define find_first_zero_bit(addr, size) \
 	find_next_zero_bit((addr), (size), 0)
 
-extern unsigned long find_next_bit(unsigned long *addr, unsigned long size, unsigned long offset);
+extern unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
 #define find_first_bit(addr, size) \
 	find_next_bit((addr), (size), 0)
 
-extern unsigned long find_next_zero_le_bit(unsigned long *addr, unsigned long size, unsigned long offset);
+extern unsigned long find_next_zero_le_bit(const unsigned long *addr, unsigned long size, unsigned long offset);
 #define find_first_zero_le_bit(addr, size) \
 	find_next_zero_le_bit((addr), (size), 0)
 
diff --git a/include/asm-ppc64/cpumask.h b/include/asm-ppc64/cpumask.h
deleted file mode 100644
index 0914511db218..000000000000
--- a/include/asm-ppc64/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_PPC64_CPUMASK_H
-#define _ASM_PPC64_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_PPC64_CPUMASK_H */
diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h
index bb961a029fae..f0b00cc458c7 100644
--- a/include/asm-ppc64/machdep.h
+++ b/include/asm-ppc64/machdep.h
@@ -11,6 +11,7 @@
 
 #include <linux/config.h>
 #include <linux/seq_file.h>
+#include <linux/init.h>
 #include <linux/dma-mapping.h>
 
 struct pt_regs;
@@ -112,9 +113,7 @@ struct machdep_calls {
 };
 
 extern struct machdep_calls ppc_md;
-#define COMMAND_LINE_SIZE 512
 extern char cmd_line[COMMAND_LINE_SIZE];
-extern char saved_command_line[COMMAND_LINE_SIZE];
 
 /* Functions to produce codes on the leds.
  * The SRC code should be unique for the message category and should
diff --git a/include/asm-ppc64/prom.h b/include/asm-ppc64/prom.h
index c39e115975c0..fdc158a0c658 100644
--- a/include/asm-ppc64/prom.h
+++ b/include/asm-ppc64/prom.h
@@ -25,7 +25,7 @@
 #define LONG_MSW(X) (((unsigned long)X) >> 32)
 
 typedef u32 phandle;
-typedef void *ihandle;
+typedef u32 ihandle;
 typedef u32 phandle32;
 typedef u32 ihandle32;
 
diff --git a/include/asm-ppc64/rtas.h b/include/asm-ppc64/rtas.h
index e51ebb166d12..4ce9bddc62a2 100644
--- a/include/asm-ppc64/rtas.h
+++ b/include/asm-ppc64/rtas.h
@@ -37,7 +37,7 @@
  * Where n_in is the number of input parameters and
  *       n_out is the number of output parameters
  *
- * If the "string" is invalid on this system, RTAS_UNKOWN_SERVICE
+ * If the "string" is invalid on this system, RTAS_UNKNOWN_SERVICE
  * will be returned as a token.  rtas_call() does look for this
  * token and error out gracefully so rtas_call(rtas_token("str"), ...)
  * may be safely used for one-shot calls to RTAS.
@@ -168,7 +168,7 @@ extern struct rtas_t rtas;
 
 extern void enter_rtas(unsigned long);
 extern int rtas_token(const char *service);
-extern long rtas_call(int token, int, int, unsigned long *, ...);
+extern int rtas_call(int token, int, int, int *, ...);
 extern void call_rtas_display_status(char);
 extern void rtas_restart(char *cmd);
 extern void rtas_power_off(void);
diff --git a/include/asm-ppc64/setup.h b/include/asm-ppc64/setup.h
index d6e62d15a5dd..b257b8348c73 100644
--- a/include/asm-ppc64/setup.h
+++ b/include/asm-ppc64/setup.h
@@ -1,6 +1,6 @@
 #ifndef _PPC_SETUP_H
 #define _PPC_SETUP_H
 
-/* This is a place holder include */
+#define COMMAND_LINE_SIZE 512
 
 #endif /* _PPC_SETUP_H */
diff --git a/include/asm-ppc64/smp.h b/include/asm-ppc64/smp.h
index 3d7e3d7c7663..3b14c7145546 100644
--- a/include/asm-ppc64/smp.h
+++ b/include/asm-ppc64/smp.h
@@ -51,8 +51,6 @@ extern cpumask_t cpu_possible_map;
 extern cpumask_t cpu_available_map;
 
 #define cpu_present_at_boot(cpu) cpu_isset(cpu, cpu_present_at_boot)
-#define cpu_online(cpu)          cpu_isset(cpu, cpu_online_map) 
-#define cpu_possible(cpu)        cpu_isset(cpu, cpu_possible_map) 
 #define cpu_available(cpu)       cpu_isset(cpu, cpu_available_map) 
 
 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h
index 67ac484a14cd..47c78eef463c 100644
--- a/include/asm-ppc64/system.h
+++ b/include/asm-ppc64/system.h
@@ -116,6 +116,7 @@ extern void enable_kernel_fp(void);
 extern void giveup_altivec(struct task_struct *);
 extern void disable_kernel_altivec(void);
 extern void enable_kernel_altivec(void);
+extern int emulate_altivec(struct pt_regs *);
 extern void cvt_fd(float *from, double *to, unsigned long *fpscr);
 extern void cvt_df(double *from, float *to, unsigned long *fpscr);
 
@@ -127,8 +128,6 @@ static inline void flush_altivec_to_thread(struct task_struct *t)
 }
 #endif
 
-extern int abs(int);
-
 extern struct task_struct *__switch_to(struct task_struct *,
 				       struct task_struct *);
 #define switch_to(prev, next, last)	((last) = __switch_to((prev), (next)))
diff --git a/include/asm-s390/byteorder.h b/include/asm-s390/byteorder.h
index 91a6f3893bcd..2cc35a0e188e 100644
--- a/include/asm-s390/byteorder.h
+++ b/include/asm-s390/byteorder.h
@@ -14,7 +14,7 @@
 #ifdef __GNUC__
 
 #ifdef __s390x__
-static __inline__ __u64 ___arch__swab64p(__u64 *x)
+static __inline__ __u64 ___arch__swab64p(const __u64 *x)
 {
 	__u64 result;
 
@@ -40,7 +40,7 @@ static __inline__ void ___arch__swab64s(__u64 *x)
 }
 #endif /* __s390x__ */
 
-static __inline__ __u32 ___arch__swab32p(__u32 *x)
+static __inline__ __u32 ___arch__swab32p(const __u32 *x)
 {
 	__u32 result;
 	
@@ -77,7 +77,7 @@ static __inline__ void ___arch__swab32s(__u32 *x)
 	*x = ___arch__swab32p(x);
 }
 
-static __inline__ __u16 ___arch__swab16p(__u16 *x)
+static __inline__ __u16 ___arch__swab16p(const __u16 *x)
 {
 	__u16 result;
 	
diff --git a/include/asm-s390/cpumask.h b/include/asm-s390/cpumask.h
deleted file mode 100644
index 4deef1641ec6..000000000000
--- a/include/asm-s390/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_S390_CPUMASK_H
-#define _ASM_S390_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_S390_CPUMASK_H */
diff --git a/include/asm-s390/smp.h b/include/asm-s390/smp.h
index 7e613240088e..70d06261bb9e 100644
--- a/include/asm-s390/smp.h
+++ b/include/asm-s390/smp.h
@@ -31,10 +31,6 @@ typedef struct
 
 extern int smp_call_function_on(void (*func) (void *info), void *info,
 				int nonatomic, int wait, int cpu);
-
-extern cpumask_t cpu_online_map;
-extern cpumask_t cpu_possible_map;
-
 #define NO_PROC_ID		0xFF		/* No processor magic marker */
 
 /*
@@ -51,8 +47,6 @@ extern cpumask_t cpu_possible_map;
 
 #define smp_processor_id() (S390_lowcore.cpu_data.cpu_nr)
 
-#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map)
-
 extern __inline__ __u16 hard_smp_processor_id(void)
 {
         __u16 cpu_address;
diff --git a/include/asm-sh/adc.h b/include/asm-sh/adc.h
new file mode 100644
index 000000000000..64747dc61899
--- /dev/null
+++ b/include/asm-sh/adc.h
@@ -0,0 +1,12 @@
+#ifndef __ASM_ADC_H
+#define __ASM_ADC_H
+
+/*
+ * Copyright (C) 2004  Andriy Skulysh
+ */
+
+#include <asm/cpu/adc.h>
+
+int adc_single(unsigned int channel);
+
+#endif /* __ASM_ADC_H */
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index 9ceca407fe60..154d774f982f 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -26,7 +26,7 @@ static void __init check_bugs(void)
 	case CPU_SH7604:
 		*p++ = '2';
 		break;
-	case CPU_SH7708 ... CPU_SH7729:
+	case CPU_SH7705 ... CPU_SH7300:
 		*p++ = '3';
 		break;
 	case CPU_SH7750 ... CPU_ST40GX1:
diff --git a/include/asm-sh/bus-sh.h b/include/asm-sh/bus-sh.h
new file mode 100644
index 000000000000..f782a33a98fa
--- /dev/null
+++ b/include/asm-sh/bus-sh.h
@@ -0,0 +1,65 @@
+/*
+ * include/asm-sh/bus-sh.h
+ *
+ * Copyright (C) 2004 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_SH_BUS_SH_H
+#define __ASM_SH_BUS_SH_H
+
+extern struct bus_type sh_bus_types[];
+
+struct sh_dev {
+	struct device	dev;
+	char		*name;
+	unsigned int	dev_id;
+	unsigned int	bus_id;
+	struct resource	res;
+	void		*mapbase;
+	unsigned int	irq[6];
+	u64		*dma_mask;
+};
+
+#define to_sh_dev(d)	container_of((d), struct sh_dev, dev)
+
+#define sh_get_drvdata(d)	dev_get_drvdata(&(d)->dev)
+#define sh_set_drvdata(d,p)	dev_set_drvdata(&(d)->dev, (p))
+
+struct sh_driver {
+	struct device_driver	drv;
+	unsigned int		dev_id;
+	unsigned int		bus_id;
+	int (*probe)(struct sh_dev *);
+	int (*remove)(struct sh_dev *);
+	int (*suspend)(struct sh_dev *, u32);
+	int (*resume)(struct sh_dev *);
+};
+
+#define to_sh_driver(d)	container_of((d), struct sh_driver, drv)
+#define sh_name(d)	((d)->dev.driver->name)
+
+/*
+ * Device ID numbers for bus types
+ */
+enum {
+	SH_DEV_ID_USB_OHCI,
+};
+
+#define SH_NR_BUSES		1
+#define SH_BUS_NAME_VIRT	"shbus"
+
+enum {
+	SH_BUS_VIRT,
+};
+
+/* arch/sh/kernel/cpu/bus.c */
+extern int sh_device_register(struct sh_dev *dev);
+extern void sh_device_unregister(struct sh_dev *dev);
+extern int sh_driver_register(struct sh_driver *drv);
+extern void sh_driver_unregister(struct sh_driver *drv);
+
+#endif /* __ASM_SH_BUS_SH_H */
+
diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h
index 9decb1ced217..62b2f50fb20b 100644
--- a/include/asm-sh/cache.h
+++ b/include/asm-sh/cache.h
@@ -28,7 +28,8 @@ struct cache_info {
 	unsigned int sets;
 	unsigned int linesz;
 
-	unsigned int way_shift;
+	unsigned int way_incr;
+
 	unsigned int entry_shift;
 	unsigned int entry_mask;
 
diff --git a/include/asm-sh/cpu-sh3/adc.h b/include/asm-sh/cpu-sh3/adc.h
new file mode 100644
index 000000000000..b289e3ca19a6
--- /dev/null
+++ b/include/asm-sh/cpu-sh3/adc.h
@@ -0,0 +1,28 @@
+#ifndef __ASM_CPU_SH3_ADC_H
+#define __ASM_CPU_SH3_ADC_H
+
+/*
+ * Copyright (C) 2004  Andriy Skulysh
+ */
+
+
+#define ADDRAH	0xa4000080
+#define ADDRAL	0xa4000082
+#define ADDRBH	0xa4000084
+#define ADDRBL	0xa4000086
+#define ADDRCH	0xa4000088
+#define ADDRCL	0xa400008a
+#define ADDRDH	0xa400008c
+#define ADDRDL	0xa400008e
+#define ADCSR	0xa4000090
+
+#define ADCSR_ADF	0x80
+#define ADCSR_ADIE	0x40
+#define ADCSR_ADST	0x20
+#define ADCSR_MULTI	0x10
+#define ADCSR_CKS	0x08
+#define ADCSR_CH_MASK	0x07
+
+#define ADCR	0xa4000092
+
+#endif /* __ASM_CPU_SH3_ADC_H */
diff --git a/include/asm-sh/cpu-sh3/dac.h b/include/asm-sh/cpu-sh3/dac.h
index 7f4129d25632..05fda8316ebc 100644
--- a/include/asm-sh/cpu-sh3/dac.h
+++ b/include/asm-sh/cpu-sh3/dac.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_SH_DAC_H
-#define __ASM_SH_DAC_H
+#ifndef __ASM_CPU_SH3_DAC_H
+#define __ASM_CPU_SH3_DAC_H
 
 /*
  * Copyright (C) 2003  Andriy Skulysh
@@ -38,5 +38,4 @@ static __inline__ void sh_dac_output(u8 value, int channel)
 	else ctrl_outb(value,DADR0);
 }
 
-#endif /* __ASM_SH_DAC_H */
-
+#endif /* __ASM_CPU_SH3_DAC_H */
diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h
index 3ef2d0a54668..e2b91adf821a 100644
--- a/include/asm-sh/cpu-sh4/dma.h
+++ b/include/asm-sh/cpu-sh4/dma.h
@@ -3,5 +3,15 @@
 
 #define SH_DMAC_BASE	0xffa00000
 
+#define SAR	((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \
+				   SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30})
+#define DAR	((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \
+				   SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34})
+#define DMATCR	((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \
+				   SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38})
+#define CHCR	((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \
+				   SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c})
+#define DMAOR	(SH_DMAC_BASE + 0x40)
+
 #endif /* __ASM_CPU_SH4_DMA_H */
 
diff --git a/include/asm-sh/cpumask.h b/include/asm-sh/cpumask.h
deleted file mode 100644
index deaf3bb85d7e..000000000000
--- a/include/asm-sh/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_SH_CPUMASK_H
-#define _ASM_SH_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_SH_CPUMASK_H */
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h
index f3817945edb5..8f149477ee2c 100644
--- a/include/asm-sh/dma-mapping.h
+++ b/include/asm-sh/dma-mapping.h
@@ -44,6 +44,8 @@ static inline void *dma_alloc_coherent(struct device *dev, size_t size,
 	if (dev && dev->bus == &pci_bus_type)
 		return __pci_alloc_consistent(NULL, size, dma_handle);
 #endif
+	if (sh_mv.mv_consistent_alloc)
+		return sh_mv.mv_consistent_alloc(dev, size, dma_handle, flag);
 
 	return consistent_alloc(flag, size, dma_handle);
 }
@@ -61,6 +63,11 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
 	}
 #endif
 
+	if (sh_mv.mv_consistent_free) {
+		sh_mv.mv_consistent_free(dev, size, vaddr, dma_handle);
+		return;
+	}
+
 	consistent_free(vaddr, size);
 }
 
@@ -152,6 +159,26 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
 	}
 }
 
+static inline void dma_sync_single_for_cpu(struct device *dev,
+					   dma_addr_t dma_handle, size_t size,
+					   enum dma_data_direction dir)
+	__attribute__ ((alias("dma_sync_single")));
+
+static inline void dma_sync_single_for_device(struct device *dev,
+					   dma_addr_t dma_handle, size_t size,
+					   enum dma_data_direction dir)
+	__attribute__ ((alias("dma_sync_single")));
+
+static inline void dma_sync_sg_for_cpu(struct device *dev,
+				       struct scatterlist *sg, int nelems,
+				       enum dma_data_direction dir)
+	__attribute__ ((alias("dma_sync_sg")));
+
+static inline void dma_sync_sg_for_device(struct device *dev,
+				       struct scatterlist *sg, int nelems,
+				       enum dma_data_direction dir)
+	__attribute__ ((alias("dma_sync_sg")));
+
 static inline int dma_get_cache_alignment(void)
 {
 	/*
@@ -161,5 +188,10 @@ static inline int dma_get_cache_alignment(void)
 	return L1_CACHE_BYTES;
 }
 
+static inline int dma_mapping_error(dma_addr_t dma_addr)
+{
+	return dma_addr == 0;
+}
+
 #endif /* __ASM_SH_DMA_MAPPING_H */
 
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h
index bc5c3b6a215d..f9b95e2116f5 100644
--- a/include/asm-sh/dma.h
+++ b/include/asm-sh/dma.h
@@ -1,7 +1,7 @@
 /*
  * include/asm-sh/dma.h
  *
- * Copyright (C) 2003  Paul Mundt
+ * Copyright (C) 2003, 2004  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -13,6 +13,7 @@
 #include <linux/config.h>
 #include <linux/spinlock.h>
 #include <linux/wait.h>
+#include <linux/sysdev.h>
 #include <asm/cpu/dma.h>
 #include <asm/semaphore.h>
 
@@ -29,7 +30,7 @@
 #  define MAX_DMA_CHANNELS	(CONFIG_NR_ONCHIP_DMA_CHANNELS)
 #endif
 
-/* 
+/*
  * Read and write modes can mean drastically different things depending on the
  * channel configuration. Consult your DMAC documentation and module
  * implementation for further clues.
@@ -38,40 +39,69 @@
 #define DMA_MODE_WRITE		0x01
 #define DMA_MODE_MASK		0x01
 
+#define DMA_AUTOINIT		0x10
+
+/*
+ * DMAC (dma_info) flags
+ */
+enum {
+	DMAC_CHANNELS_CONFIGURED	= 0x00,
+	DMAC_CHANNELS_TEI_CAPABLE	= 0x01,
+};
+
+/*
+ * DMA channel capabilities / flags
+ */
+enum {
+	DMA_CONFIGURED			= 0x00,
+	DMA_TEI_CAPABLE			= 0x01,
+};
+
 extern spinlock_t dma_spin_lock;
 
-struct dma_info;
+struct dma_channel;
 
 struct dma_ops {
-	const char *name;
-
-	int (*request)(struct dma_info *info);
-	void (*free)(struct dma_info *info);
+	int (*request)(struct dma_channel *chan);
+	void (*free)(struct dma_channel *chan);
 
-	int (*get_residue)(struct dma_info *info);
-	int (*xfer)(struct dma_info *info);
-	void (*configure)(struct dma_info *info, unsigned long flags);
+	int (*get_residue)(struct dma_channel *chan);
+	int (*xfer)(struct dma_channel *chan);
+	void (*configure)(struct dma_channel *chan, unsigned long flags);
 };
 
-struct dma_info {
-	const char *dev_id;
+struct dma_channel {
+	char dev_id[16];
 
 	unsigned int chan;
 	unsigned int mode;
 	unsigned int count;
-	
+
 	unsigned long sar;
 	unsigned long dar;
 
-	unsigned int configured:1;
-	unsigned int tei_capable:1;
+	unsigned long flags;
 	atomic_t busy;
 
 	struct semaphore sem;
 	wait_queue_head_t wait_queue;
+
+	struct sys_device dev;
+};
+
+struct dma_info {
+	const char *name;
+	unsigned int nr_channels;
+	unsigned long flags;
+
 	struct dma_ops *ops;
+	struct dma_channel *channels;
+
+	struct list_head list;
 };
 
+#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
+
 /* arch/sh/drivers/dma/dma-api.c */
 extern int dma_xfer(unsigned int chan, unsigned long from,
 		    unsigned long to, size_t size, unsigned int mode);
@@ -90,17 +120,22 @@ extern int request_dma(unsigned int chan, const char *dev_id);
 extern void free_dma(unsigned int chan);
 extern int get_dma_residue(unsigned int chan);
 extern struct dma_info *get_dma_info(unsigned int chan);
+extern struct dma_channel *get_dma_channel(unsigned int chan);
 extern void dma_wait_for_completion(unsigned int chan);
 extern void dma_configure_channel(unsigned int chan, unsigned long flags);
 
-extern int register_dmac(struct dma_ops *ops);
+extern int register_dmac(struct dma_info *info);
+extern void unregister_dmac(struct dma_info *info);
 
-extern struct dma_info dma_info[];
+#ifdef CONFIG_SYSFS
+/* arch/sh/drivers/dma/dma-sysfs.c */
+extern int dma_create_sysfs_files(struct dma_channel *);
+#endif
 
 #ifdef CONFIG_PCI
 extern int isa_dma_bridge_buggy;
 #else
-#define isa_dma_bridge_buggy 	(0)
+#define isa_dma_bridge_buggy	(0)
 #endif
 
 #endif /* __ASM_SH_DMA_H */
diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h
new file mode 100644
index 000000000000..509224bdba28
--- /dev/null
+++ b/include/asm-sh/fixmap.h
@@ -0,0 +1,111 @@
+/*
+ * fixmap.h: compile-time virtual memory allocation
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1998 Ingo Molnar
+ *
+ * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
+ */
+
+#ifndef _ASM_FIXMAP_H
+#define _ASM_FIXMAP_H
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <asm/page.h>
+#ifdef CONFIG_HIGHMEM
+#include <linux/threads.h>
+#include <asm/kmap_types.h>
+#endif
+
+/*
+ * Here we define all the compile-time 'special' virtual
+ * addresses. The point is to have a constant address at
+ * compile time, but to set the physical address only
+ * in the boot process. We allocate these special  addresses
+ * from the end of virtual memory (0xfffff000) backwards.
+ * Also this lets us do fail-safe vmalloc(), we
+ * can guarantee that these special addresses and
+ * vmalloc()-ed addresses never overlap.
+ *
+ * these 'compile-time allocated' memory buffers are
+ * fixed-size 4k pages. (or larger if used with an increment
+ * highger than 1) use fixmap_set(idx,phys) to associate
+ * physical memory with fixmap indices.
+ *
+ * TLB entries of such buffers will not be flushed across
+ * task switches.
+ */
+
+/*
+ * on UP currently we will have no trace of the fixmap mechanizm,
+ * no page table allocations, etc. This might change in the
+ * future, say framebuffers for the console driver(s) could be
+ * fix-mapped?
+ */
+enum fixed_addresses {
+#ifdef CONFIG_HIGHMEM
+	FIX_KMAP_BEGIN,	/* reserved pte's for temporary kernel mappings */
+	FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
+#endif
+	__end_of_fixed_addresses
+};
+
+extern void __set_fixmap (enum fixed_addresses idx,
+					unsigned long phys, pgprot_t flags);
+
+#define set_fixmap(idx, phys) \
+		__set_fixmap(idx, phys, PAGE_KERNEL)
+/*
+ * Some hardware wants to get fixmapped without caching.
+ */
+#define set_fixmap_nocache(idx, phys) \
+		__set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
+/*
+ * used by vmalloc.c.
+ *
+ * Leave one empty page between vmalloc'ed areas and
+ * the start of the fixmap, and leave one page empty
+ * at the top of mem..
+ */
+#define FIXADDR_TOP	(P4SEG - PAGE_SIZE)
+#define FIXADDR_SIZE	(__end_of_fixed_addresses << PAGE_SHIFT)
+#define FIXADDR_START	(FIXADDR_TOP - FIXADDR_SIZE)
+
+#define __fix_to_virt(x)	(FIXADDR_TOP - ((x) << PAGE_SHIFT))
+#define __virt_to_fix(x)	((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT)
+
+extern void __this_fixmap_does_not_exist(void);
+
+/*
+ * 'index to address' translation. If anyone tries to use the idx
+ * directly without tranlation, we catch the bug with a NULL-deference
+ * kernel oops. Illegal ranges of incoming indices are caught too.
+ */
+static inline unsigned long fix_to_virt(const unsigned int idx)
+{
+	/*
+	 * this branch gets completely eliminated after inlining,
+	 * except when someone tries to use fixaddr indices in an
+	 * illegal way. (such as mixing up address types or using
+	 * out-of-range indices).
+	 *
+	 * If it doesn't get removed, the linker will complain
+	 * loudly with a reasonably clear error message..
+	 */
+	if (idx >= __end_of_fixed_addresses)
+		__this_fixmap_does_not_exist();
+
+        return __fix_to_virt(idx);
+}
+
+static inline unsigned long virt_to_fix(const unsigned long vaddr)
+{
+	BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
+	return __virt_to_fix(vaddr);
+}
+
+#endif
diff --git a/include/asm-sh/hp6xx/hp6xx.h b/include/asm-sh/hp6xx/hp6xx.h
index 53079d2954da..a26247fd3d87 100644
--- a/include/asm-sh/hp6xx/hp6xx.h
+++ b/include/asm-sh/hp6xx/hp6xx.h
@@ -5,9 +5,22 @@
  * Copyright (C) 2003  Andriy Skulysh
  */
 
+#define HP680_TS_IRQ IRQ3_IRQ
 
-#define DAC_LCD_BRIGHTNESS		0
-#define DAC_SPEAKER_VOLUME		1
+#define DAC_LCD_BRIGHTNESS	0
+#define DAC_SPEAKER_VOLUME	1
+
+#define PHDR_TS_PEN_DOWN	0x08
+
+#define SCPDR_TS_SCAN_ENABLE	0x20
+#define SCPDR_TS_SCAN_Y		0x02
+#define SCPDR_TS_SCAN_X		0x01
+
+#define SCPCR_TS_ENABLE		0x405
+#define SCPCR_TS_MASK		0xc0f
+
+#define ADC_CHANNEL_TS_Y	1
+#define ADC_CHANNEL_TS_X	2
 
 #define HD64461_GPADR_SPEAKER	0x01
 #define HD64461_GPADR_PCMCIA0	(0x02|0x08)
@@ -16,4 +29,3 @@
 
 
 #endif /* __ASM_SH_HP6XX_H */
-
diff --git a/include/asm-sh/hp6xx/ide.h b/include/asm-sh/hp6xx/ide.h
new file mode 100644
index 000000000000..570395a5ebe5
--- /dev/null
+++ b/include/asm-sh/hp6xx/ide.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_SH_HP6XX_IDE_H
+#define __ASM_SH_HP6XX_IDE_H
+
+#define IRQ_CFCARD	93
+#define IRQ_PCMCIA	94
+
+#endif /* __ASM_SH_HP6XX_IDE_H */
+
diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h
new file mode 100644
index 000000000000..5f995f937a44
--- /dev/null
+++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h
@@ -0,0 +1,47 @@
+#ifndef __ASM_SH_RENESAS_HS7751RVOIP_H
+#define __ASM_SH_RENESAS_HS7751RVOIP_H
+
+/*
+ * linux/include/asm-sh/hs7751rvoip/hs7751rvoip.h
+ *
+ * Copyright (C) 2000  Atom Create Engineering Co., Ltd.
+ *
+ * Renesas Technology Sales HS7751RVoIP support
+ */
+
+/* Box specific addresses.  */
+
+#define PA_BCR		0xa4000000	/* FPGA */
+#define PA_SLICCNTR1	0xa4000006	/* SLIC PIO Control 1 */
+#define PA_SLICCNTR2	0xa4000008	/* SLIC PIO Control 2 */
+#define PA_DMACNTR	0xa400000a	/* USB DMA Control */
+#define PA_INPORTR	0xa400000c	/* Input Port Register */
+#define PA_OUTPORTR	0xa400000e	/* Output Port Reguster */
+#define PA_VERREG	0xa4000014	/* FPGA Version Register */
+
+#define PA_AREA5_IO	0xb4000000	/* Area 5 IO Memory */
+#define PA_AREA6_IO	0xb8000000	/* Area 6 IO Memory */
+#define PA_IDE_OFFSET	0x1f0		/* CF IDE Offset */
+
+#define IRLCNTR1	(PA_BCR + 0)	/* Interrupt Control Register1 */
+#define IRLCNTR2	(PA_BCR + 2)	/* Interrupt Control Register2 */
+#define IRLCNTR3	(PA_BCR + 4)	/* Interrupt Control Register3 */
+#define IRLCNTR4	(PA_BCR + 16)	/* Interrupt Control Register4 */
+#define IRLCNTR5	(PA_BCR + 18)	/* Interrupt Control Register5 */
+
+#define IRQ_PCIETH	6		/* PCI Ethernet IRQ */
+#define IRQ_PCIHUB	7		/* PCI Ethernet Hub IRQ */
+#define IRQ_USBCOM	8		/* USB Comunication IRQ */
+#define IRQ_USBCON	9		/* USB Connect IRQ */
+#define IRQ_USBDMA	10		/* USB DMA IRQ */
+#define IRQ_CFCARD	11		/* CF Card IRQ */
+#define IRQ_PCMCIA	12		/* PCMCIA IRQ */
+#define IRQ_PCISLOT	13		/* PCI Slot #1 IRQ */
+#define IRQ_ONHOOK1	0		/* ON HOOK1 IRQ */
+#define IRQ_OFFHOOK1	1		/* OFF HOOK1 IRQ */
+#define IRQ_ONHOOK2	2		/* ON HOOK2 IRQ */
+#define IRQ_OFFHOOK2	3		/* OFF HOOK2 IRQ */
+#define	IRQ_RINGING	4		/* Ringing IRQ */
+#define	IRQ_CODEC	5		/* CODEC IRQ */
+
+#endif  /* __ASM_SH_RENESAS_HS7751RVOIP */
diff --git a/include/asm-sh/hs7751rvoip/ide.h b/include/asm-sh/hs7751rvoip/ide.h
new file mode 100644
index 000000000000..65ad1d0f763b
--- /dev/null
+++ b/include/asm-sh/hs7751rvoip/ide.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_SH_HS7751RVOIP_IDE_H
+#define __ASM_SH_HS7751RVOIP_IDE_H
+
+/* Nothing to see here.. */
+#include <asm/hs7751rvoip/hs7751rvoip.h>
+
+#endif /* __ASM_SH_HS7751RVOIP_IDE_H */
+
diff --git a/include/asm-sh/hs7751rvoip/io.h b/include/asm-sh/hs7751rvoip/io.h
new file mode 100644
index 000000000000..513c8514001b
--- /dev/null
+++ b/include/asm-sh/hs7751rvoip/io.h
@@ -0,0 +1,39 @@
+/*
+ * include/asm-sh/hs7751rvoip/hs7751rvoip.h
+ *
+ * Modified version of io_se.h for the hs7751rvoip-specific functions.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * IO functions for an Renesas Technology sales HS7751RVOIP
+ */
+
+#ifndef _ASM_SH_IO_HS7751RVOIP_H
+#define _ASM_SH_IO_HS7751RVOIP_H
+
+#include <asm/io_generic.h>
+
+extern unsigned char hs7751rvoip_inb(unsigned long port);
+extern unsigned short hs7751rvoip_inw(unsigned long port);
+extern unsigned int hs7751rvoip_inl(unsigned long port);
+
+extern void hs7751rvoip_outb(unsigned char value, unsigned long port);
+extern void hs7751rvoip_outw(unsigned short value, unsigned long port);
+extern void hs7751rvoip_outl(unsigned int value, unsigned long port);
+
+extern unsigned char hs7751rvoip_inb_p(unsigned long port);
+extern void hs7751rvoip_outb_p(unsigned char value, unsigned long port);
+
+extern void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count);
+extern void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count);
+extern void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count);
+extern void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count);
+extern void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count);
+extern void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count);
+
+extern void *hs7751rvoip_ioremap(unsigned long offset, unsigned long size);
+
+extern unsigned long hs7751rvoip_isa_port2addr(unsigned long offset);
+
+#endif /* _ASM_SH_IO_HS7751RVOIP_H */
diff --git a/include/asm-sh/ide.h b/include/asm-sh/ide.h
index 7758b3ec3a47..f42cf3977a57 100644
--- a/include/asm-sh/ide.h
+++ b/include/asm-sh/ide.h
@@ -15,73 +15,12 @@
 #ifdef __KERNEL__
 
 #include <linux/config.h>
-#include <asm/machvec.h>
 
 #ifndef MAX_HWIFS
-/* Should never have less than 2, ide-pci.c(ide_match_hwif) requires it */
-#define MAX_HWIFS	2
+#define MAX_HWIFS	CONFIG_IDE_MAX_HWIFS
 #endif
 
-#define IDE_ARCH_OBSOLETE_DEFAULTS
-
-static inline int ide_default_irq_hp600(unsigned long base)
-{
-	switch (base) {
-		case 0x01f0: return 93;
-		case 0x0170: return 94;
-		default:
-			return 0;
-	}
-}
-
-static inline int ide_default_irq(unsigned long base)
-{
-	if (MACH_HP600) {
-		return ide_default_irq_hp600(base);
-	}
-	switch (base) {
-		case 0x01f0: return 14;
-		case 0x0170: return 15;
-		default:
-			return 0;
-	}
-}
-
-static inline unsigned long ide_default_io_base_hp600(int index)
-{
-	switch (index) {
-		case 0:	
-			return 0x01f0;
-		case 1:	
-			return 0x0170;
-		default:
-			return 0;
-	}
-}
-
-static inline unsigned long ide_default_io_base(int index)
-{
-	if (MACH_HP600) {
-		return ide_default_io_base_hp600(index);
-	}
-	switch (index) {
-		case 0:	
-			return 0x1f0;
-		case 1:	
-			return 0x170;
-		default:
-			return 0;
-	}
-}
-
-#define IDE_ARCH_OBSOLETE_INIT
-#define ide_default_io_ctl(base)	((base) + 0x206) /* obsolete */
-
-#ifdef CONFIG_PCI
-#define ide_init_default_irq(base)	(0)
-#else
-#define ide_init_default_irq(base)	ide_default_irq(base)
-#endif
+#define ide_default_io_ctl(base)	(0)
 
 #include <asm-generic/ide_iops.h>
 
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h
index 7dd2a5ae10b5..58bd8df7a53d 100644
--- a/include/asm-sh/irq.h
+++ b/include/asm-sh/irq.h
@@ -15,9 +15,15 @@
 #include <asm/machvec.h>
 #include <asm/ptrace.h>		/* for pt_regs */
 
+#if defined(CONFIG_SH_HP600) || \
+    defined(CONFIG_SH_RTS7751R2D) || \
+    defined(CONFIG_SH_HS7751RVOIP)
+#include <asm/mach/ide.h>
+#endif
+
 #if defined(CONFIG_CPU_SH3)
-#define INTC_IPRA  	0xfffffee2UL
-#define INTC_IPRB  	0xfffffee4UL
+#define INTC_IPRA	0xfffffee2UL
+#define INTC_IPRB	0xfffffee4UL
 #elif defined(CONFIG_CPU_SH4)
 #define INTC_IPRA	0xffd00004UL
 #define INTC_IPRB	0xffd00008UL
@@ -25,6 +31,15 @@
 #define INTC_IPRD	0xffd00010UL
 #endif
 
+#ifdef CONFIG_IDE
+# ifndef IRQ_CFCARD
+#  define IRQ_CFCARD	14
+# endif
+# ifndef IRQ_PCMCIA
+#  define IRQ_PCMCIA	15
+# endif
+#endif
+
 #define TIMER_IRQ	16
 #define TIMER_IPR_ADDR	INTC_IPRA
 #define TIMER_IPR_POS	 3
@@ -48,6 +63,111 @@
 #define DMA_IPR_ADDR	INTC_IPRE
 #define DMA_IPR_POS	3
 #define DMA_PRIORITY	7
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+/* TMU2 */
+#define TIMER2_IRQ      18
+#define TIMER2_IPR_ADDR INTC_IPRA
+#define TIMER2_IPR_POS   1
+#define TIMER2_PRIORITY  2
+
+/* WDT */
+#define WDT_IRQ		27
+#define WDT_IPR_ADDR	INTC_IPRB
+#define WDT_IPR_POS	 3
+#define WDT_PRIORITY	 2
+
+/* SIM (SIM Card Module) */
+#define SIM_ERI_IRQ	23
+#define SIM_RXI_IRQ	24
+#define SIM_TXI_IRQ	25
+#define SIM_TEND_IRQ	26
+#define SIM_IPR_ADDR	INTC_IPRB
+#define SIM_IPR_POS	 1
+#define SIM_PRIORITY	 2
+
+/* VIO (Video I/O) */
+#define VIO_IRQ		52
+#define VIO_IPR_ADDR	INTC_IPRE
+#define VIO_IPR_POS	 2
+#define VIO_PRIORITY	 2
+
+/* MFI (Multi Functional Interface) */
+#define MFI_IRQ		56
+#define MFI_IPR_ADDR	INTC_IPRE
+#define MFI_IPR_POS	 1
+#define MFI_PRIORITY	 2
+
+/* VPU (Video Processing Unit) */
+#define VPU_IRQ		60
+#define VPU_IPR_ADDR	INTC_IPRE
+#define VPU_IPR_POS	 0
+#define VPU_PRIORITY	 2
+
+/* KEY (Key Scan Interface) */
+#define KEY_IRQ		79
+#define KEY_IPR_ADDR	INTC_IPRF
+#define KEY_IPR_POS	 3
+#define KEY_PRIORITY	 2
+
+/* CMT (Compare Match Timer) */
+#define CMT_IRQ		104
+#define CMT_IPR_ADDR	INTC_IPRF
+#define CMT_IPR_POS	 0
+#define CMT_PRIORITY	 2
+
+/* DMAC(1) */
+#define DMTE0_IRQ	48
+#define DMTE1_IRQ	49
+#define DMTE2_IRQ	50
+#define DMTE3_IRQ	51
+#define DMA1_IPR_ADDR	INTC_IPRE
+#define DMA1_IPR_POS	3
+#define DMA1_PRIORITY	7
+
+/* DMAC(2) */
+#define DMTE4_IRQ	76
+#define DMTE5_IRQ	77
+#define DMA2_IPR_ADDR	INTC_IPRF
+#define DMA2_IPR_POS	2
+#define DMA2_PRIORITY	7
+
+/* SIOF0 */
+#define SIOF0_IRQ	84
+#define SIOF0_IPR_ADDR	INTC_IPRH
+#define SIOF0_IPR_POS	3
+#define SIOF0_PRIORITY	3
+
+/* FLCTL (Flash Memory Controller) */
+#define FLSTE_IRQ	92
+#define FLTEND_IRQ	93
+#define FLTRQ0_IRQ	94
+#define FLTRQ1_IRQ	95
+#define FLCTL_IPR_ADDR	INTC_IPRH
+#define FLCTL_IPR_POS	1
+#define FLCTL_PRIORITY	3
+
+/* IIC (IIC Bus Interface) */
+#define IIC_ALI_IRQ	96
+#define IIC_TACKI_IRQ	97
+#define IIC_WAITI_IRQ	98
+#define IIC_DTEI_IRQ	99
+#define IIC_IPR_ADDR	INTC_IPRH
+#define IIC_IPR_POS	0
+#define IIC_PRIORITY	3
+
+/* SIO0 */
+#define SIO0_IRQ	88
+#define SIO0_IPR_ADDR	INTC_IPRI
+#define SIO0_IPR_POS	3
+#define SIO0_PRIORITY	3
+
+/* SIU (Sound Interface Unit) */
+#define SIU_IRQ		108
+#define SIU_IPR_ADDR	INTC_IPRJ
+#define SIU_IPR_POS	1
+#define SIU_PRIORITY	3
+
+#endif
 #elif defined(CONFIG_CPU_SH4)
 #define DMTE0_IRQ	34
 #define DMTE1_IRQ	35
@@ -74,7 +194,14 @@
 #define SCI_PRIORITY	3
 #endif
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+#define SCIF0_IRQ	80
+#define SCIF0_IPR_ADDR	INTC_IPRG
+#define SCIF0_IPR_POS	3
+#define SCIF0_PRIORITY	3
+#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7709)
 #define SCIF_ERI_IRQ	56
 #define SCIF_RXI_IRQ	57
 #define SCIF_BRI_IRQ	58
@@ -127,7 +254,8 @@
 #  define PINT_NR_IRQS   16
 # elif defined(CONFIG_CPU_SUBTYPE_SH7708)
 #  define ONCHIP_NR_IRQS 32
-# elif defined(CONFIG_CPU_SUBTYPE_SH7709)
+# elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \
+       defined(CONFIG_CPU_SUBTYPE_SH7705)
 #  define ONCHIP_NR_IRQS 64	// Actually 61
 #  define PINT_NR_IRQS   16
 # elif defined(CONFIG_CPU_SUBTYPE_SH7750)
@@ -138,6 +266,8 @@
 #  define ONCHIP_NR_IRQS 110
 # elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
 #  define ONCHIP_NR_IRQS 144
+# elif defined(CONFIG_CPU_SUBTYPE_SH7300)
+#  define ONCHIP_NR_IRQS 109
 # endif
 #endif
 
@@ -207,7 +337,121 @@ extern void make_ipr_irq(unsigned int irq, unsigned int addr,
 			 int pos,  int priority);
 extern void make_imask_irq(unsigned int irq);
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7604)
+#if defined(CONFIG_CPU_SUBTYPE_SH7300)
+#undef INTC_IPRA
+#undef INTC_IPRB
+#define INTC_IPRA  	0xA414FEE2UL
+#define INTC_IPRB  	0xA414FEE4UL
+#define INTC_IPRC  	0xA4140016UL
+#define INTC_IPRD  	0xA4140018UL
+#define INTC_IPRE  	0xA414001AUL
+#define INTC_IPRF  	0xA4080000UL
+#define INTC_IPRG  	0xA4080002UL
+#define INTC_IPRH  	0xA4080004UL
+#define INTC_IPRI  	0xA4080006UL
+#define INTC_IPRJ  	0xA4080008UL
+
+#define INTC_IMR0	0xA4080040UL
+#define INTC_IMR1	0xA4080042UL
+#define INTC_IMR2	0xA4080044UL
+#define INTC_IMR3	0xA4080046UL
+#define INTC_IMR4	0xA4080048UL
+#define INTC_IMR5	0xA408004AUL
+#define INTC_IMR6	0xA408004CUL
+#define INTC_IMR7	0xA408004EUL
+#define INTC_IMR8	0xA4080050UL
+#define INTC_IMR9	0xA4080052UL
+#define INTC_IMR10	0xA4080054UL
+
+#define INTC_IMCR0	0xA4080060UL
+#define INTC_IMCR1	0xA4080062UL
+#define INTC_IMCR2	0xA4080064UL
+#define INTC_IMCR3	0xA4080066UL
+#define INTC_IMCR4	0xA4080068UL
+#define INTC_IMCR5	0xA408006AUL
+#define INTC_IMCR6	0xA408006CUL
+#define INTC_IMCR7	0xA408006EUL
+#define INTC_IMCR8	0xA4080070UL
+#define INTC_IMCR9	0xA4080072UL
+#define INTC_IMCR10	0xA4080074UL
+
+#define INTC_ICR0	0xA414FEE0UL
+#define INTC_ICR1	0xA4140010UL
+
+#define INTC_IRR0	0xA4140004UL
+
+#define PORT_PACR	0xA4050100UL
+#define PORT_PBCR	0xA4050102UL
+#define PORT_PCCR	0xA4050104UL
+#define PORT_PDCR	0xA4050106UL
+#define PORT_PECR	0xA4050108UL
+#define PORT_PFCR	0xA405010AUL
+#define PORT_PGCR	0xA405010CUL
+#define PORT_PHCR	0xA405010EUL
+#define PORT_PJCR	0xA4050110UL
+#define PORT_PKCR	0xA4050112UL
+#define PORT_PLCR	0xA4050114UL
+#define PORT_SCPCR	0xA4050116UL
+#define PORT_PMCR	0xA4050118UL
+#define PORT_PNCR	0xA405011AUL
+#define PORT_PQCR	0xA405011CUL
+
+#define PORT_PSELA	0xA4050140UL
+#define PORT_PSELB	0xA4050142UL
+#define PORT_PSELC	0xA4050144UL
+
+#define PORT_HIZCRA	0xA4050146UL
+#define PORT_HIZCRB	0xA4050148UL
+#define PORT_DRVCR	0xA4050150UL
+
+#define PORT_PADR  	0xA4050120UL
+#define PORT_PBDR  	0xA4050122UL
+#define PORT_PCDR  	0xA4050124UL
+#define PORT_PDDR  	0xA4050126UL
+#define PORT_PEDR  	0xA4050128UL
+#define PORT_PFDR  	0xA405012AUL
+#define PORT_PGDR  	0xA405012CUL
+#define PORT_PHDR  	0xA405012EUL
+#define PORT_PJDR  	0xA4050130UL
+#define PORT_PKDR  	0xA4050132UL
+#define PORT_PLDR  	0xA4050134UL
+#define PORT_SCPDR  	0xA4050136UL
+#define PORT_PMDR  	0xA4050138UL
+#define PORT_PNDR  	0xA405013AUL
+#define PORT_PQDR  	0xA405013CUL
+
+#define IRQ0_IRQ	32
+#define IRQ1_IRQ	33
+#define IRQ2_IRQ	34
+#define IRQ3_IRQ	35
+#define IRQ4_IRQ	36
+#define IRQ5_IRQ	37
+
+#define IRQ0_IPR_ADDR	INTC_IPRC
+#define IRQ1_IPR_ADDR	INTC_IPRC
+#define IRQ2_IPR_ADDR	INTC_IPRC
+#define IRQ3_IPR_ADDR	INTC_IPRC
+#define IRQ4_IPR_ADDR	INTC_IPRD
+#define IRQ5_IPR_ADDR	INTC_IPRD
+
+#define IRQ0_IPR_POS	0
+#define IRQ1_IPR_POS	1
+#define IRQ2_IPR_POS	2
+#define IRQ3_IPR_POS	3
+#define IRQ4_IPR_POS	0
+#define IRQ5_IPR_POS	1
+
+#define IRQ0_PRIORITY	1
+#define IRQ1_PRIORITY	1
+#define IRQ2_PRIORITY	1
+#define IRQ3_PRIORITY	1
+#define IRQ4_PRIORITY	1
+#define IRQ5_PRIORITY	1
+
+extern int ipr_irq_demux(int irq);
+#define __irq_demux(irq) ipr_irq_demux(irq)
+
+#elif defined(CONFIG_CPU_SUBTYPE_SH7604)
 #define INTC_IPRA	0xfffffee2UL
 #define INTC_IPRB	0xfffffe60UL
 
@@ -222,21 +466,27 @@ extern void make_imask_irq(unsigned int irq);
 #define INTC_VCRDMA1	0xffffffa8UL
 
 #define INTC_ICR	0xfffffee0UL
-#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
+#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7707) || \
+      defined(CONFIG_CPU_SUBTYPE_SH7709)
 #define INTC_IRR0	0xa4000004UL
 #define INTC_IRR1	0xa4000006UL
 #define INTC_IRR2	0xa4000008UL
 
-#define INTC_ICR0  	0xfffffee0UL
-#define INTC_ICR1  	0xa4000010UL
-#define INTC_ICR2  	0xa4000012UL
-#define INTC_INTER 	0xa4000014UL
+#define INTC_ICR0	0xfffffee0UL
+#define INTC_ICR1	0xa4000010UL
+#define INTC_ICR2	0xa4000012UL
+#define INTC_INTER	0xa4000014UL
 
-#define INTC_IPRC  	0xa4000016UL
-#define INTC_IPRD  	0xa4000018UL
-#define INTC_IPRE  	0xa400001aUL
+#define INTC_IPRC	0xa4000016UL
+#define INTC_IPRD	0xa4000018UL
+#define INTC_IPRE	0xa400001aUL
 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
 #define INTC_IPRF	0xa400001cUL
+#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
+#define INTC_IPRF	0xa4080000UL
+#define INTC_IPRG	0xa4080002UL
+#define INTC_IPRH	0xa4080004UL
 #endif
 
 #define PORT_PACR	0xa4000100UL
@@ -307,20 +557,20 @@ extern int ipr_irq_demux(int irq);
 #ifdef CONFIG_CPU_SUBTYPE_ST40STB1
 #define INTC2_FIRST_IRQ 64
 #define NR_INTC2_IRQS 25
- 
+
 #define INTC2_BASE0 0xfe080000
 #define INTC2_INTC2MODE  (INTC2_BASE0+0x80)
- 
+
 #define INTC2_INTPRI_OFFSET	0x00
 #define INTC2_INTREQ_OFFSET	0x20
 #define INTC2_INTMSK_OFFSET	0x40
 #define INTC2_INTMSKCLR_OFFSET	0x60
- 
+
 extern void make_intc2_irq(unsigned int irq,unsigned int addr,
                            unsigned int group,int pos,int priority);
- 
-#endif                                                                        
-       
+
+#endif
+
 static inline int generic_irq_demux(int irq)
 {
 	return irq;
diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h
index 4953570c961d..8a2e3dcd1779 100644
--- a/include/asm-sh/machvec.h
+++ b/include/asm-sh/machvec.h
@@ -17,6 +17,7 @@
 #include <asm/machtypes.h>
 #include <asm/machvec_init.h>
 
+struct device;
 struct timeval;
 
 struct sh_machine_vector
@@ -62,6 +63,9 @@ struct sh_machine_vector
 	void (*mv_init_pci)(void);
 
 	void (*mv_heartbeat)(void);
+
+	void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, int);
+	void (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t);
 };
 
 extern struct sh_machine_vector sh_mv;
diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h
index 9b7038442cd6..8a1b3597ff30 100644
--- a/include/asm-sh/pgalloc.h
+++ b/include/asm-sh/pgalloc.h
@@ -84,71 +84,10 @@ static inline void pte_free(struct page *pte)
 #define pmd_free(x)			do { } while (0)
 #define __pmd_free_tlb(tlb,x)		do { } while (0)
 #define pgd_populate(mm, pmd, pte)	BUG()
+#define check_pgt_cache()		do { } while (0)
 
-#if defined(CONFIG_CPU_SH4)
-#define PG_mapped	PG_arch_1
-
-/*
- * For SH-4, we have our own implementation for ptep_get_and_clear
- */
-static inline pte_t ptep_get_and_clear(pte_t *ptep)
-{
-	pte_t pte = *ptep;
-
-	pte_clear(ptep);
-	if (!pte_not_present(pte)) {
-		unsigned long pfn = pte_pfn(pte);
-		if (pfn_valid(pfn)) {
-			struct page *page = pfn_to_page(pfn);
-			struct address_space *mapping = page_mapping(page);
-			if (!mapping || !mapping_writably_mapped(mapping))
-				__clear_bit(PG_mapped, &page->flags);
-		}
-	}
-	return pte;
-}
-#else
-static inline pte_t ptep_get_and_clear(pte_t *ptep)
-{
-	pte_t pte = *ptep;
-	pte_clear(ptep);
-	return pte;
-}
+#ifdef CONFIG_CPU_SH4
+#define PG_mapped			PG_arch_1
 #endif
 
-/*
- * Following functions are same as generic ones.
- */
-static inline int ptep_test_and_clear_young(pte_t *ptep)
-{
-	pte_t pte = *ptep;
-	if (!pte_young(pte))
-		return 0;
-	set_pte(ptep, pte_mkold(pte));
-	return 1;
-}
-
-static inline int ptep_test_and_clear_dirty(pte_t *ptep)
-{
-	pte_t pte = *ptep;
-	if (!pte_dirty(pte))
-		return 0;
-	set_pte(ptep, pte_mkclean(pte));
-	return 1;
-}
-
-static inline void ptep_set_wrprotect(pte_t *ptep)
-{
-	pte_t old_pte = *ptep;
-	set_pte(ptep, pte_wrprotect(old_pte));
-}
-
-static inline void ptep_mkdirty(pte_t *ptep)
-{
-	pte_t old_pte = *ptep;
-	set_pte(ptep, pte_mkdirty(old_pte));
-}
-
-#define check_pgt_cache()	do { } while (0)
-
 #endif /* __ASM_SH_PGALLOC_H */
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 292511404349..7cbe42971cfb 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -3,7 +3,7 @@
 
 /*
  * Copyright (C) 1999 Niibe Yutaka
- * Copyright (C) 2002, 2003 Paul Mundt
+ * Copyright (C) 2002, 2003, 2004 Paul Mundt
  */
 
 #include <linux/config.h>
@@ -16,6 +16,7 @@
 #ifndef __ASSEMBLY__
 #include <asm/processor.h>
 #include <asm/addrspace.h>
+#include <asm/fixmap.h>
 #include <linux/threads.h>
 
 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
@@ -51,7 +52,7 @@ extern unsigned long empty_zero_page[1024];
  * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
  */
 #define VMALLOC_START	(P3SEG+0x00100000)
-#define VMALLOC_END	P4SEG
+#define VMALLOC_END	(FIXADDR_START-2*PAGE_SIZE)
 
 #define	_PAGE_WT	0x001  /* WT-bit on SH-4, 0 on SH-3 */
 #define _PAGE_HW_SHARED	0x002  /* SH-bit  : page is shared among processes */
@@ -119,17 +120,20 @@ extern unsigned long empty_zero_page[1024];
 #define PAGE_COPY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 #define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
 #define PAGE_KERNEL	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
+#define PAGE_KERNEL_NOCACHE \
+			__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
 #define PAGE_KERNEL_RO	__pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
 #define PAGE_KERNEL_PCC(slot, type) \
 			__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type))
 #else /* no mmu */
-#define PAGE_NONE	__pgprot(0)
-#define PAGE_SHARED	__pgprot(0)
-#define PAGE_COPY	__pgprot(0)
-#define PAGE_READONLY	__pgprot(0)
-#define PAGE_KERNEL	__pgprot(0)
-#define PAGE_KERNEL_RO	__pgprot(0)
-#define PAGE_KERNEL_PCC	__pgprot(0)
+#define PAGE_NONE		__pgprot(0)
+#define PAGE_SHARED		__pgprot(0)
+#define PAGE_COPY		__pgprot(0)
+#define PAGE_READONLY		__pgprot(0)
+#define PAGE_KERNEL		__pgprot(0)
+#define PAGE_KERNEL_NOCACHE	__pgprot(0)
+#define PAGE_KERNEL_RO		__pgprot(0)
+#define PAGE_KERNEL_PCC		__pgprot(0)
 #endif
 
 /*
@@ -254,25 +258,17 @@ extern void update_mmu_cache(struct vm_area_struct * vma,
 #define __swp_type(x)		((x).val & 0xff)
 #define __swp_offset(x)		((x).val >> 10)
 #define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) })
-#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x)	((pte_t) { (x).val })
+#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) >> 1 })
+#define __swp_entry_to_pte(x)	((pte_t) { (x).val << 1 })
 
 /*
  * Encode and decode a nonlinear file mapping entry
  */
 #define PTE_FILE_MAX_BITS	29
-#define pte_to_pgoff(pte)	(pte_val(pte))
-#define pgoff_to_pte(off)	((pte_t) { (off) | _PAGE_FILE })
+#define pte_to_pgoff(pte)	(pte_val(pte) >> 1)
+#define pgoff_to_pte(off)	((pte_t) { ((off) << 1) | _PAGE_FILE })
 
-/*
- * Routines for update of PTE 
- *
- * We just can use generic implementation, as SuperH has no SMP feature.
- * (We needed atomic implementation for SMP)
- *
- */
-
-#define pte_same(A,B)	(pte_val(A) == pte_val(B))
+typedef pte_t *pte_addr_t;
 
 #endif /* !__ASSEMBLY__ */
 
@@ -289,12 +285,11 @@ extern void update_mmu_cache(struct vm_area_struct * vma,
 extern unsigned int kobjsize(const void *objp);
 #endif /* !CONFIG_MMU */
 
-#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
-#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
+#ifdef CONFIG_CPU_SH4
 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-#define __HAVE_ARCH_PTEP_SET_WRPROTECT
-#define __HAVE_ARCH_PTEP_MKDIRTY
-#define __HAVE_ARCH_PTE_SAME
+extern inline pte_t ptep_get_and_clear(pte_t *ptep);
+#endif
+
 #include <asm-generic/pgtable.h>
 
 #endif /* __ASM_SH_PAGE_H */
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 786d41c3663c..922c927478c1 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -37,8 +37,8 @@ enum cpu_type {
 	CPU_SH7604,
 
 	/* SH-3 types */
-	CPU_SH7707,  CPU_SH7708, CPU_SH7708S, CPU_SH7708R, CPU_SH7709,
-	CPU_SH7709A, CPU_SH7729, CPU_SH7300,
+	CPU_SH7705, CPU_SH7707,  CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
+	CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300,
 
 	/* SH-4 types */
 	CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
@@ -271,6 +271,7 @@ extern unsigned long get_wchan(struct task_struct *p);
 #define KSTK_EIP(tsk)  ((tsk)->thread.pc)
 #define KSTK_ESP(tsk)  ((tsk)->thread.sp)
 
-#define cpu_relax()	__asm__ __volatile__ ("sleep" : : : "memory")
+#define cpu_sleep()	__asm__ __volatile__ ("sleep" : : : "memory")
+#define cpu_relax()	do { } while (0)
 
 #endif /* __ASM_SH_PROCESSOR_H */
diff --git a/include/asm-sh/rts7751r2d/ide.h b/include/asm-sh/rts7751r2d/ide.h
new file mode 100644
index 000000000000..416f96b407cb
--- /dev/null
+++ b/include/asm-sh/rts7751r2d/ide.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_SH_RTS7751R2D_IDE_H
+#define __ASM_SH_RTS7751R2D_IDE_H
+
+/* Nothing to see here.. */
+#include <asm/rts7751r2d/rts7751r2d.h>
+
+#endif /* __ASM_SH_RTS7751R2D_IDE_H */
+
diff --git a/include/asm-sh/rts7751r2d/io.h b/include/asm-sh/rts7751r2d/io.h
new file mode 100644
index 000000000000..241094020567
--- /dev/null
+++ b/include/asm-sh/rts7751r2d/io.h
@@ -0,0 +1,37 @@
+/*
+ * include/asm-sh/io_rts7751r2d.h
+ *
+ * Modified version of io_se.h for the rts7751r2d-specific functions.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * IO functions for an Renesas Technology sales RTS7751R2D
+ */
+
+#ifndef _ASM_SH_IO_RTS7751R2D_H
+#define _ASM_SH_IO_RTS7751R2D_H
+
+extern unsigned char rts7751r2d_inb(unsigned long port);
+extern unsigned short rts7751r2d_inw(unsigned long port);
+extern unsigned int rts7751r2d_inl(unsigned long port);
+
+extern void rts7751r2d_outb(unsigned char value, unsigned long port);
+extern void rts7751r2d_outw(unsigned short value, unsigned long port);
+extern void rts7751r2d_outl(unsigned int value, unsigned long port);
+
+extern unsigned char rts7751r2d_inb_p(unsigned long port);
+extern void rts7751r2d_outb_p(unsigned char value, unsigned long port);
+
+extern void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count);
+extern void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count);
+extern void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count);
+extern void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count);
+extern void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count);
+extern void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count);
+
+extern void *rts7751r2d_ioremap(unsigned long offset, unsigned long size);
+
+extern unsigned long rts7751r2d_isa_port2addr(unsigned long offset);
+
+#endif /* _ASM_SH_IO_RTS7751R2D_H */
diff --git a/include/asm-sh/rts7751r2d/rts7751r2d.h b/include/asm-sh/rts7751r2d/rts7751r2d.h
new file mode 100644
index 000000000000..4e09ba597e9a
--- /dev/null
+++ b/include/asm-sh/rts7751r2d/rts7751r2d.h
@@ -0,0 +1,73 @@
+#ifndef __ASM_SH_RENESAS_RTS7751R2D_H
+#define __ASM_SH_RENESAS_RTS7751R2D_H
+
+/*
+ * linux/include/asm-sh/renesas_rts7751r2d.h
+ *
+ * Copyright (C) 2000  Atom Create Engineering Co., Ltd.
+ *
+ * Renesas Technology Sales RTS7751R2D support
+ */
+
+/* Box specific addresses.  */
+
+#define PA_BCR		0xa4000000	/* FPGA */
+#define PA_IRLMON	0xa4000002	/* Interrupt Status control */
+#define PA_CFCTL	0xa4000004	/* CF Timing control */
+#define PA_CFPOW	0xa4000006	/* CF Power control */
+#define PA_DISPCTL	0xa4000008	/* Display Timing control */
+#define PA_SDMPOW	0xa400000a	/* SD Power control */
+#define PA_RTCCE	0xa400000c	/* RTC(9701) Enable control */
+#define PA_PCICD	0xa400000e	/* PCI Extention detect control */
+#define PA_VOYAGERRTS	0xa4000020	/* VOYAGER Reset control */
+#if defined(CONFIG_RTS7751R2D_REV11)
+#define PA_AXRST	0xa4000022	/* AX_LAN Reset control */
+#define PA_CFRST	0xa4000024	/* CF Reset control */
+#define	PA_ADMRTS	0xa4000026	/* SD Reset control */
+#define PA_EXTRST	0xa4000028	/* Extention Reset control */
+#define PA_CFCDINTCLR	0xa400002a	/* CF Insert Interrupt clear */
+#else
+#define PA_CFRST	0xa4000022	/* CF Reset control */
+#define	PA_ADMRTS	0xa4000024	/* SD Reset control */
+#define PA_EXTRST	0xa4000026	/* Extention Reset control */
+#define PA_CFCDINTCLR	0xa4000028	/* CF Insert Interrupt clear */
+#define	PA_KEYCTLCLR	0xa400002a	/* Key Interrupt clear */
+#endif
+#define PA_POWOFF	0xa4000030	/* Board Power OFF control */
+#define PA_VERREG	0xa4000032	/* FPGA Version Register */
+#define PA_INPORT	0xa4000034	/* KEY Input Port control */
+#define PA_OUTPORT	0xa4000036	/* LED control */
+#define PA_DMPORT	0xa4000038	/* DM270 Output Port control */
+
+#define PA_AX88796L	0xaa000400	/* AX88796L Area */
+#define PA_VOYAGER	0xab000000	/* VOYAGER GX Area */
+#define PA_AREA5_IO	0xb4000000	/* Area 5 IO Memory */
+#define PA_AREA6_IO	0xb8000000	/* Area 6 IO Memory */
+#define PA_IDE_OFFSET	0x1f0		/* CF IDE Offset */
+#define AX88796L_IO_BASE	0x1000	/* AX88796L IO Base Address */
+
+#define IRLCNTR1	(PA_BCR + 0)	/* Interrupt Control Register1 */
+
+#if defined(CONFIG_RTS7751R2D_REV11)
+#define IRQ_PCIETH	0		/* PCI Ethernet IRQ */
+#define IRQ_CFCARD	1		/* CF Card IRQ */
+#define IRQ_CFINST	2		/* CF Card Insert IRQ */
+#define IRQ_PCMCIA	3		/* PCMCIA IRQ */
+#define IRQ_VOYAGER	4		/* VOYAGER IRQ */
+#define IRQ_ONETH	5		/* On board Ethernet IRQ */
+#else
+#define IRQ_KEYIN	0		/* Key Input IRQ */
+#define IRQ_PCIETH	1		/* PCI Ethernet IRQ */
+#define IRQ_CFCARD	2		/* CF Card IRQ */
+#define IRQ_CFINST	3		/* CF Card Insert IRQ */
+#define IRQ_PCMCIA	4		/* PCMCIA IRQ */
+#define IRQ_VOYAGER	5		/* VOYAGER IRQ */
+#endif
+#define IRQ_RTCALM	6		/* RTC Alarm IRQ */
+#define IRQ_RTCTIME	7		/* RTC Timer IRQ */
+#define IRQ_SDCARD	8		/* SD Card IRQ */
+#define IRQ_PCISLOT1	9		/* PCI Slot #1 IRQ */
+#define IRQ_PCISLOT2	10		/* PCI Slot #2 IRQ */
+#define	IRQ_EXTENTION	11		/* EXTn IRQ */
+
+#endif  /* __ASM_SH_RENESAS_RTS7751R2D */
diff --git a/include/asm-sh/rts7751r2d/voyagergx_reg.h b/include/asm-sh/rts7751r2d/voyagergx_reg.h
new file mode 100644
index 000000000000..f031b5d6cf54
--- /dev/null
+++ b/include/asm-sh/rts7751r2d/voyagergx_reg.h
@@ -0,0 +1,313 @@
+/* -------------------------------------------------------------------- */
+/* voyagergx_reg.h                                                      */
+/* -------------------------------------------------------------------- */
+/*  This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+    Copyright 2003 (c) Lineo uSolutions,Inc.
+*/
+/* -------------------------------------------------------------------- */
+
+#ifndef _VOYAGER_GX_REG_H
+#define _VOYAGER_GX_REG_H
+
+#define VOYAGER_BASE			0xb3e00000
+#define VOYAGER_USBH_BASE		(0x40000 + VOYAGER_BASE)
+#define VOYAGER_UART_BASE		(0x30000 + VOYAGER_BASE)
+#define	VOYAGER_AC97_BASE		(0xa0000 + VOYAGER_BASE)
+
+#define VOYAGER_IRQ_NUM			32
+#define VOYAGER_IRQ_BASE		50
+#define VOYAGER_USBH_IRQ		VOYAGER_IRQ_BASE + 6
+#define VOYAGER_8051_IRQ		VOYAGER_IRQ_BASE + 10
+#define VOYAGER_UART0_IRQ		VOYAGER_IRQ_BASE + 12
+#define VOYAGER_UART1_IRQ		VOYAGER_IRQ_BASE + 13
+#define	VOYAGER_AC97_IRQ		VOYAGER_IRQ_BASE + 17
+
+/* ----- MISC controle  register ------------------------------ */
+#define MISC_CTRL			(0x000004 + VOYAGER_BASE)
+#define MISC_CTRL_USBCLK_48		(3 << 28)
+#define MISC_CTRL_USBCLK_96		(2 << 28)
+#define MISC_CTRL_USBCLK_CRYSTAL	(1 << 28)
+
+/* ----- GPIO[31:0] register --------------------------------- */
+#define GPIO_MUX_LOW			(0x000008 + VOYAGER_BASE)
+#define GPIO_MUX_LOW_AC97		0x1F000000
+#define GPIO_MUX_LOW_8051		0x0000ffff
+#define GPIO_MUX_LOW_PWM		(1 << 29)
+
+/* ----- GPIO[63:32] register --------------------------------- */
+#define GPIO_MUX_HIGH			(0x00000C + VOYAGER_BASE)
+
+/* ----- DRAM controle  register ------------------------------- */
+#define DRAM_CTRL			(0x000010 + VOYAGER_BASE)
+#define DRAM_CTRL_EMBEDDED		(1 << 31)
+#define DRAM_CTRL_CPU_BURST_1		(0 << 28)
+#define DRAM_CTRL_CPU_BURST_2		(1 << 28)
+#define DRAM_CTRL_CPU_BURST_4		(2 << 28)
+#define DRAM_CTRL_CPU_BURST_8		(3 << 28)
+#define DRAM_CTRL_CPU_CAS_LATENCY	(1 << 27)
+#define DRAM_CTRL_CPU_SIZE_2		(0 << 24)
+#define DRAM_CTRL_CPU_SIZE_4		(1 << 24)
+#define DRAM_CTRL_CPU_SIZE_64		(4 << 24)
+#define DRAM_CTRL_CPU_SIZE_32		(5 << 24)
+#define DRAM_CTRL_CPU_SIZE_16		(6 << 24)
+#define DRAM_CTRL_CPU_SIZE_8		(7 << 24)
+#define DRAM_CTRL_CPU_COLUMN_SIZE_1024	(0 << 22)
+#define DRAM_CTRL_CPU_COLUMN_SIZE_512	(2 << 22)
+#define DRAM_CTRL_CPU_COLUMN_SIZE_256	(3 << 22)
+#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE	(1 << 21)
+#define DRAM_CTRL_CPU_RESET		(1 << 20)
+#define DRAM_CTRL_CPU_BANKS		(1 << 19)
+#define DRAM_CTRL_CPU_WRITE_PRECHARGE	(1 << 18)
+#define DRAM_CTRL_BLOCK_WRITE		(1 << 17)
+#define DRAM_CTRL_REFRESH_COMMAND	(1 << 16)
+#define DRAM_CTRL_SIZE_4		(0 << 13)
+#define DRAM_CTRL_SIZE_8		(1 << 13)
+#define DRAM_CTRL_SIZE_16		(2 << 13)
+#define DRAM_CTRL_SIZE_32		(3 << 13)
+#define DRAM_CTRL_SIZE_64		(4 << 13)
+#define DRAM_CTRL_SIZE_2		(5 << 13)
+#define DRAM_CTRL_COLUMN_SIZE_256	(0 << 11)
+#define DRAM_CTRL_COLUMN_SIZE_512	(2 << 11)
+#define DRAM_CTRL_COLUMN_SIZE_1024	(3 << 11)
+#define DRAM_CTRL_BLOCK_WRITE_TIME	(1 << 10)
+#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE	(1 << 9)
+#define DRAM_CTRL_ACTIVE_PRECHARGE	(1 << 8)
+#define DRAM_CTRL_RESET			(1 << 7)
+#define DRAM_CTRL_REMAIN_ACTIVE		(1 << 6)
+#define DRAM_CTRL_BANKS			(1 << 1)
+#define DRAM_CTRL_WRITE_PRECHARGE	(1 << 0)
+
+/* ----- Arvitration control register -------------------------- */
+#define ARBITRATION_CTRL		(0x000014 + VOYAGER_BASE)
+#define ARBITRATION_CTRL_CPUMEM		(1 << 29)
+#define ARBITRATION_CTRL_INTMEM		(1 << 28)
+#define ARBITRATION_CTRL_USB_OFF	(0 << 24)
+#define ARBITRATION_CTRL_USB_PRIORITY_1	(1 << 24)
+#define ARBITRATION_CTRL_USB_PRIORITY_2	(2 << 24)
+#define ARBITRATION_CTRL_USB_PRIORITY_3	(3 << 24)
+#define ARBITRATION_CTRL_USB_PRIORITY_4	(4 << 24)
+#define ARBITRATION_CTRL_USB_PRIORITY_5	(5 << 24)
+#define ARBITRATION_CTRL_USB_PRIORITY_6	(6 << 24)
+#define ARBITRATION_CTRL_USB_PRIORITY_7	(7 << 24)
+#define ARBITRATION_CTRL_PANEL_OFF	(0 << 20)
+#define ARBITRATION_CTRL_PANEL_PRIORITY_1	(1 << 20)
+#define ARBITRATION_CTRL_PANEL_PRIORITY_2	(2 << 20)
+#define ARBITRATION_CTRL_PANEL_PRIORITY_3	(3 << 20)
+#define ARBITRATION_CTRL_PANEL_PRIORITY_4	(4 << 20)
+#define ARBITRATION_CTRL_PANEL_PRIORITY_5	(5 << 20)
+#define ARBITRATION_CTRL_PANEL_PRIORITY_6	(6 << 20)
+#define ARBITRATION_CTRL_PANEL_PRIORITY_7	(7 << 20)
+#define ARBITRATION_CTRL_ZVPORT_OFF	(0 << 16)
+#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_1	(1 << 16)
+#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_2	(2 << 16)
+#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_3	(3 << 16)
+#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_4	(4 << 16)
+#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_5	(5 << 16)
+#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_6	(6 << 16)
+#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_7	(7 << 16)
+#define ARBITRATION_CTRL_CMD_INTPR_OFF	(0 << 12)
+#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_1	(1 << 12)
+#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_2	(2 << 12)
+#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_3	(3 << 12)
+#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_4	(4 << 12)
+#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_5	(5 << 12)
+#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_6	(6 << 12)
+#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_7	(7 << 12)
+#define ARBITRATION_CTRL_DMA_OFF	(0 << 8)
+#define ARBITRATION_CTRL_DMA_PRIORITY_1	(1 << 8)
+#define ARBITRATION_CTRL_DMA_PRIORITY_2	(2 << 8)
+#define ARBITRATION_CTRL_DMA_PRIORITY_3	(3 << 8)
+#define ARBITRATION_CTRL_DMA_PRIORITY_4	(4 << 8)
+#define ARBITRATION_CTRL_DMA_PRIORITY_5	(5 << 8)
+#define ARBITRATION_CTRL_DMA_PRIORITY_6	(6 << 8)
+#define ARBITRATION_CTRL_DMA_PRIORITY_7	(7 << 8)
+#define ARBITRATION_CTRL_VIDEO_OFF	(0 << 4)
+#define ARBITRATION_CTRL_VIDEO_PRIORITY_1	(1 << 4)
+#define ARBITRATION_CTRL_VIDEO_PRIORITY_2	(2 << 4)
+#define ARBITRATION_CTRL_VIDEO_PRIORITY_3	(3 << 4)
+#define ARBITRATION_CTRL_VIDEO_PRIORITY_4	(4 << 4)
+#define ARBITRATION_CTRL_VIDEO_PRIORITY_5	(5 << 4)
+#define ARBITRATION_CTRL_VIDEO_PRIORITY_6	(6 << 4)
+#define ARBITRATION_CTRL_VIDEO_PRIORITY_7	(7 << 4)
+#define ARBITRATION_CTRL_CRT_OFF	(0 << 0)
+#define ARBITRATION_CTRL_CRT_PRIORITY_1	(1 << 0)
+#define ARBITRATION_CTRL_CRT_PRIORITY_2	(2 << 0)
+#define ARBITRATION_CTRL_CRT_PRIORITY_3	(3 << 0)
+#define ARBITRATION_CTRL_CRT_PRIORITY_4	(4 << 0)
+#define ARBITRATION_CTRL_CRT_PRIORITY_5	(5 << 0)
+#define ARBITRATION_CTRL_CRT_PRIORITY_6	(6 << 0)
+#define ARBITRATION_CTRL_CRT_PRIORITY_7	(7 << 0)
+
+/* ----- Command list status register -------------------------- */
+#define CMD_INTPR_STATUS		(0x000024 + VOYAGER_BASE)
+
+/* ----- Interrupt status register ----------------------------- */
+#define INT_STATUS			(0x00002c + VOYAGER_BASE)
+#define INT_STATUS_UH			(1 << 6)
+#define INT_STATUS_MC			(1 << 10)
+#define INT_STATUS_U0			(1 << 12)
+#define INT_STATUS_U1			(1 << 13)
+#define	INT_STATUS_AC			(1 << 17)
+
+/* ----- Interrupt mask register ------------------------------ */
+#define VOYAGER_INT_MASK		(0x000030 + VOYAGER_BASE)
+#define VOYAGER_INT_MASK_AC		(1 << 17)
+
+/* ----- Current Gate register ---------------------------------*/
+#define CURRENT_GATE			(0x000038 + VOYAGER_BASE)
+
+/* ----- Power mode 0 gate register --------------------------- */
+#define POWER_MODE0_GATE		(0x000040 + VOYAGER_BASE)
+#define POWER_MODE0_GATE_G		(1 << 6)
+#define POWER_MODE0_GATE_U0		(1 << 7)
+#define POWER_MODE0_GATE_U1		(1 << 8)
+#define POWER_MODE0_GATE_UH		(1 << 11)
+#define	POWER_MODE0_GATE_AC		(1 << 18)
+
+/* ----- Power mode 1 gate register --------------------------- */
+#define POWER_MODE1_GATE		(0x000048 + VOYAGER_BASE)
+#define POWER_MODE1_GATE_G		(1 << 6)
+#define POWER_MODE1_GATE_U0		(1 << 7)
+#define POWER_MODE1_GATE_U1		(1 << 8)
+#define POWER_MODE1_GATE_UH		(1 << 11)
+#define	POWER_MODE1_GATE_AC		(1 << 18)
+
+/* ----- Power mode 0 clock register -------------------------- */
+#define POWER_MODE0_CLOCK		(0x000044 + VOYAGER_BASE)
+
+/* ----- Power mode 1 clock register -------------------------- */
+#define POWER_MODE1_CLOCK		(0x00004C + VOYAGER_BASE)
+
+/* ----- Power mode controll register ------------------------- */
+#define POWER_MODE_CTRL			(0x000054 + VOYAGER_BASE)
+
+/* ----- Miscellaneous Timing register ------------------------ */
+#define SYSTEM_DRAM_CTRL		(0x000068 + VOYAGER_BASE)
+
+/* ----- PWM register ------------------------------------------*/
+#define PWM_0				(0x010020 + VOYAGER_BASE)
+#define PWM_0_HC(x)			(((x)&0x0fff)<<20)
+#define PWM_0_LC(x)			(((x)&0x0fff)<<8 )
+#define PWM_0_CLK_DEV(x)		(((x)&0x000f)<<4 )
+#define PWM_0_EN			(1<<0)
+
+/* ----- I2C register ----------------------------------------- */
+#define I2C_BYTECOUNT			(0x010040 + VOYAGER_BASE)
+#define I2C_CONTROL			(0x010041 + VOYAGER_BASE)
+#define I2C_STATUS			(0x010042 + VOYAGER_BASE)
+#define I2C_RESET			(0x010042 + VOYAGER_BASE)
+#define I2C_SADDRESS			(0x010043 + VOYAGER_BASE)
+#define I2C_DATA			(0x010044 + VOYAGER_BASE)
+
+/* ----- Controle register bits ----------------------------------------- */
+#define I2C_CONTROL_E			(1 << 0)
+#define I2C_CONTROL_MODE		(1 << 1)
+#define I2C_CONTROL_STATUS		(1 << 2)
+#define I2C_CONTROL_INT			(1 << 4)
+#define I2C_CONTROL_INTACK		(1 << 5)
+#define I2C_CONTROL_REPEAT		(1 << 6)
+
+/* ----- Status register bits ----------------------------------------- */
+#define I2C_STATUS_BUSY			(1 << 0)
+#define I2C_STATUS_ACK			(1 << 1)
+#define I2C_STATUS_ERROR		(1 << 2)
+#define I2C_STATUS_COMPLETE		(1 << 3)
+
+/* ----- Reset register  ---------------------------------------------- */
+#define I2C_RESET_ERROR			(1 << 2)
+
+/* ----- transmission frequencies ------------------------------------- */
+#define I2C_SADDRESS_SELECT		(1 << 0)
+
+/* ----- Display Controll register ----------------------------------------- */
+#define PANEL_DISPLAY_CTRL		(0x080000 + VOYAGER_BASE)
+#define PANEL_DISPLAY_CTRL_BIAS         (1<<26)
+#define PANEL_PAN_CTRL			(0x080004 + VOYAGER_BASE)
+#define PANEL_COLOR_KEY			(0x080008 + VOYAGER_BASE)
+#define PANEL_FB_ADDRESS		(0x08000C + VOYAGER_BASE)
+#define PANEL_FB_WIDTH			(0x080010 + VOYAGER_BASE)
+#define PANEL_WINDOW_WIDTH		(0x080014 + VOYAGER_BASE)
+#define PANEL_WINDOW_HEIGHT		(0x080018 + VOYAGER_BASE)
+#define PANEL_PLANE_TL			(0x08001C + VOYAGER_BASE)
+#define PANEL_PLANE_BR			(0x080020 + VOYAGER_BASE)
+#define PANEL_HORIZONTAL_TOTAL		(0x080024 + VOYAGER_BASE)
+#define PANEL_HORIZONTAL_SYNC		(0x080028 + VOYAGER_BASE)
+#define PANEL_VERTICAL_TOTAL		(0x08002C + VOYAGER_BASE)
+#define PANEL_VERTICAL_SYNC		(0x080030 + VOYAGER_BASE)
+#define PANEL_CURRENT_LINE		(0x080034 + VOYAGER_BASE)
+#define VIDEO_DISPLAY_CTRL		(0x080040 + VOYAGER_BASE)
+#define VIDEO_FB_0_ADDRESS		(0x080044 + VOYAGER_BASE)
+#define VIDEO_FB_WIDTH			(0x080048 + VOYAGER_BASE)
+#define VIDEO_FB_0_LAST_ADDRESS		(0x08004C + VOYAGER_BASE)
+#define VIDEO_PLANE_TL			(0x080050 + VOYAGER_BASE)
+#define VIDEO_PLANE_BR			(0x080054 + VOYAGER_BASE)
+#define VIDEO_SCALE			(0x080058 + VOYAGER_BASE)
+#define VIDEO_INITIAL_SCALE		(0x08005C + VOYAGER_BASE)
+#define VIDEO_YUV_CONSTANTS		(0x080060 + VOYAGER_BASE)
+#define VIDEO_FB_1_ADDRESS		(0x080064 + VOYAGER_BASE)
+#define VIDEO_FB_1_LAST_ADDRESS		(0x080068 + VOYAGER_BASE)
+#define VIDEO_ALPHA_DISPLAY_CTRL	(0x080080 + VOYAGER_BASE)
+#define VIDEO_ALPHA_FB_ADDRESS		(0x080084 + VOYAGER_BASE)
+#define VIDEO_ALPHA_FB_WIDTH		(0x080088 + VOYAGER_BASE)
+#define VIDEO_ALPHA_FB_LAST_ADDRESS	(0x08008C + VOYAGER_BASE)
+#define VIDEO_ALPHA_PLANE_TL		(0x080090 + VOYAGER_BASE)
+#define VIDEO_ALPHA_PLANE_BR		(0x080094 + VOYAGER_BASE)
+#define VIDEO_ALPHA_SCALE		(0x080098 + VOYAGER_BASE)
+#define VIDEO_ALPHA_INITIAL_SCALE	(0x08009C + VOYAGER_BASE)
+#define VIDEO_ALPHA_CHROMA_KEY		(0x0800A0 + VOYAGER_BASE)
+#define PANEL_HWC_ADDRESS		(0x0800F0 + VOYAGER_BASE)
+#define PANEL_HWC_LOCATION		(0x0800F4 + VOYAGER_BASE)
+#define PANEL_HWC_COLOR_12		(0x0800F8 + VOYAGER_BASE)
+#define PANEL_HWC_COLOR_3		(0x0800FC + VOYAGER_BASE)
+#define ALPHA_DISPLAY_CTRL		(0x080100 + VOYAGER_BASE)
+#define ALPHA_FB_ADDRESS		(0x080104 + VOYAGER_BASE)
+#define ALPHA_FB_WIDTH			(0x080108 + VOYAGER_BASE)
+#define ALPHA_PLANE_TL			(0x08010C + VOYAGER_BASE)
+#define ALPHA_PLANE_BR			(0x080110 + VOYAGER_BASE)
+#define ALPHA_CHROMA_KEY		(0x080114 + VOYAGER_BASE)
+#define CRT_DISPLAY_CTRL		(0x080200 + VOYAGER_BASE)
+#define CRT_FB_ADDRESS			(0x080204 + VOYAGER_BASE)
+#define CRT_FB_WIDTH			(0x080208 + VOYAGER_BASE)
+#define CRT_HORIZONTAL_TOTAL		(0x08020C + VOYAGER_BASE)
+#define CRT_HORIZONTAL_SYNC		(0x080210 + VOYAGER_BASE)
+#define CRT_VERTICAL_TOTAL		(0x080214 + VOYAGER_BASE)
+#define CRT_VERTICAL_SYNC		(0x080218 + VOYAGER_BASE)
+#define CRT_SIGNATURE_ANALYZER		(0x08021C + VOYAGER_BASE)
+#define CRT_CURRENT_LINE		(0x080220 + VOYAGER_BASE)
+#define CRT_MONITOR_DETECT		(0x080224 + VOYAGER_BASE)
+#define CRT_HWC_ADDRESS			(0x080230 + VOYAGER_BASE)
+#define CRT_HWC_LOCATION		(0x080234 + VOYAGER_BASE)
+#define CRT_HWC_COLOR_12		(0x080238 + VOYAGER_BASE)
+#define CRT_HWC_COLOR_3			(0x08023C + VOYAGER_BASE)
+#define CRT_PALETTE_RAM			(0x080400 + VOYAGER_BASE)
+#define PANEL_PALETTE_RAM		(0x080800 + VOYAGER_BASE)
+#define VIDEO_PALETTE_RAM		(0x080C00 + VOYAGER_BASE)
+
+/* ----- 8051 Controle register ----------------------------------------- */
+#define VOYAGER_8051_BASE		(0x000c0000 + VOYAGER_BASE)
+#define VOYAGER_8051_RESET		(0x000b0000 + VOYAGER_BASE)
+#define VOYAGER_8051_SELECT		(0x000b0004 + VOYAGER_BASE)
+#define VOYAGER_8051_CPU_INT		(0x000b000c + VOYAGER_BASE)
+
+/* ----- AC97 Controle register ----------------------------------------- */
+#define AC97_TX_SLOT0			(0x00000000 + VOYAGER_AC97_BASE)
+#define AC97_CONTROL_STATUS		(0x00000080 + VOYAGER_AC97_BASE)
+#define AC97C_READ			(1 << 19)
+#define AC97C_WD_BIT			(1 << 2)
+#define AC97C_INDEX_MASK		0x7f
+/* -------------------------------------------------------------------- */
+
+#endif /* _VOYAGER_GX_REG_H */
diff --git a/include/asm-sh/se7300/io.h b/include/asm-sh/se7300/io.h
new file mode 100644
index 000000000000..c6af85529714
--- /dev/null
+++ b/include/asm-sh/se7300/io.h
@@ -0,0 +1,29 @@
+/*
+ * include/asm-sh/se7300/io.h
+ *
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ * IO functions for SH-Mobile(SH7300) SolutionEngine
+ */
+
+#ifndef _ASM_SH_IO_7300SE_H
+#define _ASM_SH_IO_7300SE_H
+
+extern unsigned char sh7300se_inb(unsigned long port);
+extern unsigned short sh7300se_inw(unsigned long port);
+extern unsigned int sh7300se_inl(unsigned long port);
+
+extern void sh7300se_outb(unsigned char value, unsigned long port);
+extern void sh7300se_outw(unsigned short value, unsigned long port);
+extern void sh7300se_outl(unsigned int value, unsigned long port);
+
+extern unsigned char sh7300se_inb_p(unsigned long port);
+extern void sh7300se_outb_p(unsigned char value, unsigned long port);
+
+extern void sh7300se_insb(unsigned long port, void *addr, unsigned long count);
+extern void sh7300se_insw(unsigned long port, void *addr, unsigned long count);
+extern void sh7300se_insl(unsigned long port, void *addr, unsigned long count);
+extern void sh7300se_outsb(unsigned long port, const void *addr, unsigned long count);
+extern void sh7300se_outsw(unsigned long port, const void *addr, unsigned long count);
+extern void sh7300se_outsl(unsigned long port, const void *addr, unsigned long count);
+
+#endif /* _ASM_SH_IO_7300SE_H */
diff --git a/include/asm-sh/se7300/se7300.h b/include/asm-sh/se7300/se7300.h
new file mode 100644
index 000000000000..3ec1ded86c97
--- /dev/null
+++ b/include/asm-sh/se7300/se7300.h
@@ -0,0 +1,61 @@
+#ifndef __ASM_SH_HITACHI_SE7300_H
+#define __ASM_SH_HITACHI_SE7300_H
+
+/*
+ * linux/include/asm-sh/se/se7300.h
+ *
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ *
+ * SH-Mobile SolutionEngine 7300 support
+ */
+
+/* Box specific addresses.  */
+
+/* Area 0 */
+#define PA_ROM		0x00000000	/* EPROM */
+#define PA_ROM_SIZE	0x00400000	/* EPROM size 4M byte(Actually 2MB) */
+#define PA_FROM		0x00400000	/* Flash ROM */
+#define PA_FROM_SIZE	0x00400000	/* Flash size 4M byte */
+#define PA_SRAM		0x00800000	/* SRAM */
+#define PA_FROM_SIZE	0x00400000	/* SRAM size 4M byte */
+/* Area 1 */
+#define PA_EXT1		0x04000000
+#define PA_EXT1_SIZE	0x04000000
+/* Area 2 */
+#define PA_EXT2		0x08000000
+#define PA_EXT2_SIZE	0x04000000
+/* Area 3 */
+#define PA_SDRAM	0x0c000000
+#define PA_SDRAM_SIZE	0x04000000
+/* Area 4 */
+#define PA_PCIC		0x10000000	/* MR-SHPC-01 PCMCIA */
+#define PA_MRSHPC       0xb03fffe0      /* MR-SHPC-01 PCMCIA controller */
+#define PA_MRSHPC_MW1   0xb0400000      /* MR-SHPC-01 memory window base */
+#define PA_MRSHPC_MW2   0xb0500000      /* MR-SHPC-01 attribute window base */
+#define PA_MRSHPC_IO    0xb0600000      /* MR-SHPC-01 I/O window base */
+#define MRSHPC_OPTION   (PA_MRSHPC + 6)
+#define MRSHPC_CSR      (PA_MRSHPC + 8)
+#define MRSHPC_ISR      (PA_MRSHPC + 10)
+#define MRSHPC_ICR      (PA_MRSHPC + 12)
+#define MRSHPC_CPWCR    (PA_MRSHPC + 14)
+#define MRSHPC_MW0CR1   (PA_MRSHPC + 16)
+#define MRSHPC_MW1CR1   (PA_MRSHPC + 18)
+#define MRSHPC_IOWCR1   (PA_MRSHPC + 20)
+#define MRSHPC_MW0CR2   (PA_MRSHPC + 22)
+#define MRSHPC_MW1CR2   (PA_MRSHPC + 24)
+#define MRSHPC_IOWCR2   (PA_MRSHPC + 26)
+#define MRSHPC_CDCR     (PA_MRSHPC + 28)
+#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
+#define PA_LED		0xb0800000	/* LED */
+#define PA_DIPSW	0xb0900000	/* Dip switch 31 */
+#define PA_EPLD_MODESET	0xb0a00000	/* FPGA Mode set register */
+#define PA_EPLD_ST1	0xb0a80000	/* FPGA Interrupt status register1 */
+#define PA_EPLD_ST2	0xb0ac0000	/* FPGA Interrupt status register2 */
+/* Area 5 */
+#define PA_EXT5		0x14000000
+#define PA_EXT5_SIZE	0x04000000
+/* Area 6 */
+#define PA_LCD1		0xb8000000
+#define PA_LCD2		0xb8800000
+
+#endif  /* __ASM_SH_HITACHI_SE7300_H */
diff --git a/include/asm-sh/serial.h b/include/asm-sh/serial.h
index 012649927fc5..5474dbdbaa86 100644
--- a/include/asm-sh/serial.h
+++ b/include/asm-sh/serial.h
@@ -44,8 +44,5 @@
 
 #define SERIAL_PORT_DFNS STD_SERIAL_PORT_DEFNS
 
-/* XXX: This should be moved ino irq.h */
-#define irq_canonicalize(x) (x)
-
 #endif
 #endif /* _ASM_SERIAL_H */
diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h
new file mode 100644
index 000000000000..d19de7c8df4e
--- /dev/null
+++ b/include/asm-sh/setup.h
@@ -0,0 +1,8 @@
+#ifdef __KERNEL__
+#ifndef _SH_SETUP_H
+#define _SH_SETUP_H
+
+#define COMMAND_LINE_SIZE 256
+
+#endif /* _SH_SETUP_H */
+#endif /* __KERNEL__ */
diff --git a/include/asm-sh/sigcontext.h b/include/asm-sh/sigcontext.h
index 46fbc6feddd4..eb8effba2e80 100644
--- a/include/asm-sh/sigcontext.h
+++ b/include/asm-sh/sigcontext.h
@@ -1,6 +1,26 @@
 #ifndef __ASM_SH_SIGCONTEXT_H
 #define __ASM_SH_SIGCONTEXT_H
 
-#include <asm/cpu/sigcontext.h>
+struct sigcontext {
+	unsigned long	oldmask;
+
+	/* CPU registers */
+	unsigned long sc_regs[16];
+	unsigned long sc_pc;
+	unsigned long sc_pr;
+	unsigned long sc_sr;
+	unsigned long sc_gbr;
+	unsigned long sc_mach;
+	unsigned long sc_macl;
+
+#if defined(__SH4__) || defined(CONFIG_CPU_SH4)
+	/* FPU registers */
+	unsigned long sc_fpregs[16];
+	unsigned long sc_xfpregs[16];
+	unsigned int sc_fpscr;
+	unsigned int sc_fpul;
+	unsigned int sc_ownedfp;
+#endif
+};
 
 #endif /* __ASM_SH_SIGCONTEXT_H */
diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h
index 412a6496ce95..a42dd7adfb4c 100644
--- a/include/asm-sh/ubc.h
+++ b/include/asm-sh/ubc.h
@@ -14,7 +14,8 @@
 #include <asm/cpu/ubc.h>
 
 /* User Break Controller */
-#if defined(CONFIG_CPU_SUBTYPE_SH7709)
+#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7300)
 #define UBC_TYPE_SH7729	(cpu_data->type == CPU_SH7729)
 #else
 #define UBC_TYPE_SH7729	0
diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h
index 26ad6dd928ec..a20677454ca9 100644
--- a/include/asm-sh/unistd.h
+++ b/include/asm-sh/unistd.h
@@ -281,8 +281,17 @@
 #define __NR_utimes		271
 #define __NR_fadvise64_64	272
 #define __NR_vserver		273
+#define __NR_mbind              274
+#define __NR_get_mempolicy      275
+#define __NR_set_mempolicy      276
+#define __NR_mq_open            277
+#define __NR_mq_unlink          (__NR_mq_open+1)
+#define __NR_mq_timedsend       (__NR_mq_open+2)
+#define __NR_mq_timedreceive    (__NR_mq_open+3)
+#define __NR_mq_notify          (__NR_mq_open+4)
+#define __NR_mq_getsetattr      (__NR_mq_open+5)
 
-#define NR_syscalls 274
+#define NR_syscalls 283
 
 /* user-visible error numbers are in the range -1 - -124: see <asm-sh/errno.h> */
 
@@ -429,6 +438,7 @@ __syscall_return(type,__sc0); \
 
 #include <linux/compiler.h>
 #include <linux/types.h>
+#include <linux/linkage.h>
 #include <asm/ptrace.h>
 
 /*
diff --git a/include/asm-sparc/cpumask.h b/include/asm-sparc/cpumask.h
deleted file mode 100644
index 272f31de7bc1..000000000000
--- a/include/asm-sparc/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_SPARC_CPUMASK_H
-#define _ASM_SPARC_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_SPARC_CPUMASK_H */
diff --git a/include/asm-sparc/setup.h b/include/asm-sparc/setup.h
index d8aaa7205345..b3af958a2ad2 100644
--- a/include/asm-sparc/setup.h
+++ b/include/asm-sparc/setup.h
@@ -5,5 +5,6 @@
 #ifndef _SPARC_SETUP_H
 #define _SPARC_SETUP_H
 
+#define COMMAND_LINE_SIZE	256
 
 #endif /* _SPARC_SETUP_H */
diff --git a/include/asm-sparc64/bitops.h b/include/asm-sparc64/bitops.h
index d32c138437c3..f13765454689 100644
--- a/include/asm-sparc64/bitops.h
+++ b/include/asm-sparc64/bitops.h
@@ -204,7 +204,8 @@ static __inline__ unsigned int hweight8(unsigned int w)
  * @offset: The bitnumber to start searching at
  * @size: The maximum size to search
  */
-extern unsigned long find_next_bit(unsigned long *, unsigned long, unsigned long);
+extern unsigned long find_next_bit(const unsigned long *, unsigned long,
+					unsigned long);
 
 /**
  * find_first_bit - find the first set bit in a memory region
diff --git a/include/asm-sparc64/bug.h b/include/asm-sparc64/bug.h
index bdaba5ccc11e..bfac1afa9983 100644
--- a/include/asm-sparc64/bug.h
+++ b/include/asm-sparc64/bug.h
@@ -3,6 +3,8 @@
 #ifndef _SPARC64_BUG_H
 #define _SPARC64_BUG_H
 
+#include <linux/compiler.h>
+
 #ifdef CONFIG_DEBUG_BUGVERBOSE
 extern void do_BUG(const char *file, int line);
 #define BUG() do {					\
diff --git a/include/asm-sparc64/byteorder.h b/include/asm-sparc64/byteorder.h
index f8c370d26b3a..c69b08af5fe0 100644
--- a/include/asm-sparc64/byteorder.h
+++ b/include/asm-sparc64/byteorder.h
@@ -7,7 +7,7 @@
 
 #ifdef __GNUC__
 
-static __inline__ __u16 ___arch__swab16p(__u16 *addr)
+static __inline__ __u16 ___arch__swab16p(const __u16 *addr)
 {
 	__u16 ret;
 
@@ -17,7 +17,7 @@ static __inline__ __u16 ___arch__swab16p(__u16 *addr)
 	return ret;
 }
 
-static __inline__ __u32 ___arch__swab32p(__u32 *addr)
+static __inline__ __u32 ___arch__swab32p(const __u32 *addr)
 {
 	__u32 ret;
 
@@ -27,7 +27,7 @@ static __inline__ __u32 ___arch__swab32p(__u32 *addr)
 	return ret;
 }
 
-static __inline__ __u64 ___arch__swab64p(__u64 *addr)
+static __inline__ __u64 ___arch__swab64p(const __u64 *addr)
 {
 	__u64 ret;
 
diff --git a/include/asm-sparc64/cpumask.h b/include/asm-sparc64/cpumask.h
deleted file mode 100644
index ee60cae3dcd1..000000000000
--- a/include/asm-sparc64/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_SPARC64_CPUMASK_H
-#define _ASM_SPARC64_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_SPARC64_CPUMASK_H */
diff --git a/include/asm-sparc64/setup.h b/include/asm-sparc64/setup.h
index 97ae5d456702..b356ee2cda92 100644
--- a/include/asm-sparc64/setup.h
+++ b/include/asm-sparc64/setup.h
@@ -5,5 +5,6 @@
 #ifndef _SPARC64_SETUP_H
 #define _SPARC64_SETUP_H
 
+#define COMMAND_LINE_SIZE	256
 
 #endif /* _SPARC64_SETUP_H */
diff --git a/include/asm-um/cpumask.h b/include/asm-um/cpumask.h
deleted file mode 100644
index 90f0d003d74e..000000000000
--- a/include/asm-um/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_UM_CPUMASK_H
-#define _ASM_UM_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_UM_CPUMASK_H */
diff --git a/include/asm-um/setup.h b/include/asm-um/setup.h
new file mode 100644
index 000000000000..e5787bb80e79
--- /dev/null
+++ b/include/asm-um/setup.h
@@ -0,0 +1,6 @@
+#ifndef SETUP_H_INCLUDED
+#define SETUP_H_INCLUDED
+
+#define COMMAND_LINE_SIZE 512
+
+#endif		/* SETUP_H_INCLUDED */
diff --git a/include/asm-v850/bitops.h b/include/asm-v850/bitops.h
index c837ea08c611..5ca65390186b 100644
--- a/include/asm-v850/bitops.h
+++ b/include/asm-v850/bitops.h
@@ -193,10 +193,86 @@ extern __inline__ int find_next_zero_bit (void *addr, int size, int offset)
 	return result + ffz (tmp);
 }
 
+
+/* This is the same as generic_ffs, but we can't use that because it's
+   inline and the #include order mucks things up.  */
+static inline int generic_ffs_for_find_next_bit(int x)
+{
+	int r = 1;
+
+	if (!x)
+		return 0;
+	if (!(x & 0xffff)) {
+		x >>= 16;
+		r += 16;
+	}
+	if (!(x & 0xff)) {
+		x >>= 8;
+		r += 8;
+	}
+	if (!(x & 0xf)) {
+		x >>= 4;
+		r += 4;
+	}
+	if (!(x & 3)) {
+		x >>= 2;
+		r += 2;
+	}
+	if (!(x & 1)) {
+		x >>= 1;
+		r += 1;
+	}
+	return r;
+}
+
+/*
+ * Find next one bit in a bitmap reasonably efficiently.
+ */
+static __inline__ unsigned long find_next_bit(const unsigned long *addr,
+	unsigned long size, unsigned long offset)
+{
+	unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
+	unsigned int result = offset & ~31UL;
+	unsigned int tmp;
+
+	if (offset >= size)
+		return size;
+	size -= result;
+	offset &= 31UL;
+	if (offset) {
+		tmp = *p++;
+		tmp &= ~0UL << offset;
+		if (size < 32)
+			goto found_first;
+		if (tmp)
+			goto found_middle;
+		size -= 32;
+		result += 32;
+	}
+	while (size >= 32) {
+		if ((tmp = *p++) != 0)
+			goto found_middle;
+		result += 32;
+		size -= 32;
+	}
+	if (!size)
+		return result;
+	tmp = *p;
+
+found_first:
+	tmp &= ~0UL >> (32 - size);
+	if (tmp == 0UL)        /* Are any bits set? */
+		return result + size; /* Nope. */
+found_middle:
+	return result + generic_ffs_for_find_next_bit(tmp);
+}
+
+
 #define ffs(x) generic_ffs (x)
 #define fls(x) generic_fls (x)
 #define __ffs(x) ffs(x)
 
+
 /*
  * This is just `generic_ffs' from <linux/bitops.h>, except that it assumes
  * that at least one bit is set, and returns the real index of the bit
diff --git a/include/asm-v850/cpumask.h b/include/asm-v850/cpumask.h
deleted file mode 100644
index 09aebd0c28d7..000000000000
--- a/include/asm-v850/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_V850_CPUMASK_H
-#define _ASM_V850_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_V850_CPUMASK_H */
diff --git a/include/asm-v850/irq.h b/include/asm-v850/irq.h
index 90c83aa053c8..44431152b36d 100644
--- a/include/asm-v850/irq.h
+++ b/include/asm-v850/irq.h
@@ -1,8 +1,8 @@
 /*
  * include/asm-v850/irq.h -- Machine interrupt handling
  *
- *  Copyright (C) 2001,02  NEC Corporation
- *  Copyright (C) 2001,02  Miles Bader <miles@gnu.org>
+ *  Copyright (C) 2001,02,04  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,04  Miles Bader <miles@gnu.org>
  *
  * This file is subject to the terms and conditions of the GNU General
  * Public License.  See the file COPYING in the main directory of this
@@ -62,11 +62,8 @@ extern void disable_irq (unsigned int irq);
 /* Disable an irq without waiting. */
 extern void disable_irq_nosync (unsigned int irq);
 
+extern int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
 
 #endif /* !__ASSEMBLY__ */
 
-struct irqaction;
-struct pt_regs;
-int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
-
 #endif /* __V850_IRQ_H__ */
diff --git a/include/asm-v850/setup.h b/include/asm-v850/setup.h
new file mode 100644
index 000000000000..c48a9b97d05b
--- /dev/null
+++ b/include/asm-v850/setup.h
@@ -0,0 +1,6 @@
+#ifndef _V850_SETUP_H
+#define _V850_SETUP_H
+
+#define COMMAND_LINE_SIZE	512
+
+#endif /* __SETUP_H */
diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h
index f8163e806b59..9517031d8fd1 100644
--- a/include/asm-v850/unistd.h
+++ b/include/asm-v850/unistd.h
@@ -1,8 +1,8 @@
 /*
  * include/asm-v850/unistd.h -- System call numbers and invocation mechanism
  *
- *  Copyright (C) 2001,02,03  NEC Electronics Corporation
- *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *  Copyright (C) 2001,02,03,04  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03,04  Miles Bader <miles@gnu.org>
  *
  * This file is subject to the terms and conditions of the GNU General
  * Public License.  See the file COPYING in the main directory of this
@@ -389,7 +389,6 @@ type name (atype a, btype b, ctype c, dtype d, etype e, ftype f)	      \
 #ifdef __KERNEL__
 #define __ARCH_WANT_IPC_PARSE_VERSION
 #define __ARCH_WANT_OLD_READDIR
-#define __ARCH_WANT_OLD_STAT
 #define __ARCH_WANT_STAT64
 #define __ARCH_WANT_SYS_ALARM
 #define __ARCH_WANT_SYS_GETHOSTNAME
@@ -404,7 +403,6 @@ type name (atype a, btype b, ctype c, dtype d, etype e, ftype f)	      \
 #define __ARCH_WANT_SYS_GETPGRP
 #define __ARCH_WANT_SYS_LLSEEK
 #define __ARCH_WANT_SYS_NICE
-#define __ARCH_WANT_SYS_OLD_GETRLIMIT
 #define __ARCH_WANT_SYS_OLDUMOUNT
 #define __ARCH_WANT_SYS_SIGPENDING
 #define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/include/asm-x86_64/bootsetup.h b/include/asm-x86_64/bootsetup.h
index ee1557748b0e..8fe68a93b798 100644
--- a/include/asm-x86_64/bootsetup.h
+++ b/include/asm-x86_64/bootsetup.h
@@ -30,7 +30,6 @@ extern char x86_boot_params[2048];
 #define EDD_NR     (*(unsigned char *) (PARAM+EDDNR))
 #define EDD_BUF     ((struct edd_info *) (PARAM+EDDBUF))
 #define COMMAND_LINE saved_command_line
-#define COMMAND_LINE_SIZE 256
 
 #define RAMDISK_IMAGE_START_MASK  	0x07FF
 #define RAMDISK_PROMPT_FLAG		0x8000
diff --git a/include/asm-x86_64/cpumask.h b/include/asm-x86_64/cpumask.h
deleted file mode 100644
index d9ea497140a1..000000000000
--- a/include/asm-x86_64/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_X86_64_CPUMASK_H
-#define _ASM_X86_64_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif /* _ASM_X86_64_CPUMASK_H */
diff --git a/include/asm-x86_64/hw_irq.h b/include/asm-x86_64/hw_irq.h
index 161edad6afdf..2df689dd6d77 100644
--- a/include/asm-x86_64/hw_irq.h
+++ b/include/asm-x86_64/hw_irq.h
@@ -78,6 +78,7 @@ struct hw_interrupt_type;
 #ifndef __ASSEMBLY__
 extern u8 irq_vector[NR_IRQ_VECTORS];
 #define IO_APIC_VECTOR(irq)	(irq_vector[irq])
+#define AUTO_ASSIGN		-1
 
 /*
  * Various low-level irq details needed by irq.c, process.c,
diff --git a/include/asm-x86_64/mpspec.h b/include/asm-x86_64/mpspec.h
index fd707a6a8bcd..219d40acd489 100644
--- a/include/asm-x86_64/mpspec.h
+++ b/include/asm-x86_64/mpspec.h
@@ -212,7 +212,7 @@ typedef struct physid_mask physid_mask_t;
 #define physids_and(dst, src1, src2)		bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
 #define physids_or(dst, src1, src2)		bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
 #define physids_clear(map)			bitmap_zero((map).mask, MAX_APICS)
-#define physids_complement(map)			bitmap_complement((map).mask, MAX_APICS)
+#define physids_complement(dst, src)		bitmap_complement((dst).mask, (src).mask, MAX_APICS)
 #define physids_empty(map)			bitmap_empty((map).mask, MAX_APICS)
 #define physids_equal(map1, map2)		bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
 #define physids_weight(map)			bitmap_weight((map).mask, MAX_APICS)
diff --git a/include/asm-x86_64/msi.h b/include/asm-x86_64/msi.h
index 727b911f29ca..e0e1e9b3bd87 100644
--- a/include/asm-x86_64/msi.h
+++ b/include/asm-x86_64/msi.h
@@ -11,11 +11,6 @@
 #define LAST_DEVICE_VECTOR		232
 #define MSI_DEST_MODE			MSI_LOGICAL_MODE
 #define MSI_TARGET_CPU_SHIFT		12
-
-#ifdef CONFIG_SMP
-#define MSI_TARGET_CPU		logical_smp_processor_id()
-#else
-#define MSI_TARGET_CPU		TARGET_CPUS
-#endif
+#define MSI_TARGET_CPU			TARGET_CPUS
 
 #endif /* ASM_MSI_H */
diff --git a/include/asm-x86_64/setup.h b/include/asm-x86_64/setup.h
index 7079a136ca8e..985d4e3c79da 100644
--- a/include/asm-x86_64/setup.h
+++ b/include/asm-x86_64/setup.h
@@ -1,10 +1,6 @@
-/*
- *	Just a place holder. We don't want to have to test x86 before
- *	we include stuff
- */
-
 #ifndef _x8664_SETUP_H
 #define _x8664_SETUP_H
 
+#define COMMAND_LINE_SIZE	256
 
 #endif
diff --git a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h
index 2878896de037..c210e398a649 100644
--- a/include/asm-x86_64/smp.h
+++ b/include/asm-x86_64/smp.h
@@ -60,7 +60,6 @@ extern char phys_proc_id[NR_CPUS];
 
 extern cpumask_t cpu_callout_map;
 #define cpu_possible_map cpu_callout_map
-#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map)
 
 static inline int num_booting_cpus(void)
 {
@@ -105,7 +104,6 @@ static inline int cpu_present_to_apicid(int mps_cpu)
 		return BAD_APICID;
 }
 
-#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map)
 #endif /* !ASSEMBLY */
 
 #define NO_PROC_ID		0xFF		/* No processor magic marker */
@@ -115,9 +113,9 @@ static inline int cpu_present_to_apicid(int mps_cpu)
 #define TARGET_CPUS 1
 
 #ifndef ASSEMBLY
-static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
+static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 {
-	return cpus_coerce_const(cpumask);
+	return cpus_addr(cpumask)[0];
 }
 #endif
 
diff --git a/include/asm-x86_64/topology.h b/include/asm-x86_64/topology.h
index bb9a99ba2065..9310f9a1c1c5 100644
--- a/include/asm-x86_64/topology.h
+++ b/include/asm-x86_64/topology.h
@@ -20,9 +20,11 @@ extern cpumask_t     node_to_cpumask[];
 #define node_to_first_cpu(node) 	(__ffs(node_to_cpumask[node]))
 #define node_to_cpumask(node)		(node_to_cpumask[node])
 
-static inline unsigned long pcibus_to_cpumask(int bus)
+static inline cpumask_t pcibus_to_cpumask(int bus)
 {
-	return mp_bus_to_cpumask[bus] & cpu_online_map; 
+	cpumask_t tmp;
+	cpus_and(tmp, mp_bus_to_cpumask[bus], cpu_online_map);
+	return tmp;
 }
 
 #define NODE_BALANCE_RATE 30	/* CHECKME */ 
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index c301d121c8d0..9dadd08e2b53 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -3,49 +3,249 @@
 
 #ifndef __ASSEMBLY__
 
-#include <linux/config.h>
-#include <linux/compiler.h>
 #include <linux/types.h>
-#include <linux/kernel.h>
 #include <linux/bitops.h>
 #include <linux/string.h>
 
-int bitmap_empty(const unsigned long *bitmap, int bits);
-int bitmap_full(const unsigned long *bitmap, int bits);
-int bitmap_equal(const unsigned long *bitmap1,
-			unsigned long *bitmap2, int bits);
-void bitmap_complement(unsigned long *bitmap, int bits);
+/*
+ * bitmaps provide bit arrays that consume one or more unsigned
+ * longs.  The bitmap interface and available operations are listed
+ * here, in bitmap.h
+ *
+ * Function implementations generic to all architectures are in
+ * lib/bitmap.c.  Functions implementations that are architecture
+ * specific are in various include/asm-<arch>/bitops.h headers
+ * and other arch/<arch> specific files.
+ *
+ * See lib/bitmap.c for more details.
+ */
 
-static inline void bitmap_zero(unsigned long *bitmap, int bits)
+/*
+ * The available bitmap operations and their rough meaning in the
+ * case that the bitmap is a single unsigned long are thus:
+ *
+ * bitmap_zero(dst, nbits)			*dst = 0UL
+ * bitmap_fill(dst, nbits)			*dst = ~0UL
+ * bitmap_copy(dst, src, nbits)			*dst = *src
+ * bitmap_and(dst, src1, src2, nbits)		*dst = *src1 & *src2
+ * bitmap_or(dst, src1, src2, nbits)		*dst = *src1 | *src2
+ * bitmap_xor(dst, src1, src2, nbits)		*dst = *src1 ^ *src2
+ * bitmap_andnot(dst, src1, src2, nbits)	*dst = *src1 & ~(*src2)
+ * bitmap_complement(dst, src, nbits)		*dst = ~(*src)
+ * bitmap_equal(src1, src2, nbits)		Are *src1 and *src2 equal?
+ * bitmap_intersects(src1, src2, nbits) 	Do *src1 and *src2 overlap?
+ * bitmap_subset(src1, src2, nbits)		Is *src1 a subset of *src2?
+ * bitmap_empty(src, nbits)			Are all bits zero in *src?
+ * bitmap_full(src, nbits)			Are all bits set in *src?
+ * bitmap_weight(src, nbits)			Hamming Weight: number set bits
+ * bitmap_shift_right(dst, src, n, nbits)	*dst = *src >> n
+ * bitmap_shift_left(dst, src, n, nbits)	*dst = *src << n
+ * bitmap_scnprintf(buf, len, src, nbits)	Print bitmap src to buf
+ * bitmap_parse(ubuf, ulen, dst, nbits)		Parse bitmap dst from buf
+ */
+
+/*
+ * Also the following operations in asm/bitops.h apply to bitmaps.
+ *
+ * set_bit(bit, addr)			*addr |= bit
+ * clear_bit(bit, addr)			*addr &= ~bit
+ * change_bit(bit, addr)		*addr ^= bit
+ * test_bit(bit, addr)			Is bit set in *addr?
+ * test_and_set_bit(bit, addr)		Set bit and return old value
+ * test_and_clear_bit(bit, addr)	Clear bit and return old value
+ * test_and_change_bit(bit, addr)	Change bit and return old value
+ * find_first_zero_bit(addr, nbits)	Position first zero bit in *addr
+ * find_first_bit(addr, nbits)		Position first set bit in *addr
+ * find_next_zero_bit(addr, nbits, bit)	Position next zero bit in *addr >= bit
+ * find_next_bit(addr, nbits, bit)	Position next set bit in *addr >= bit
+ */
+
+/*
+ * The DECLARE_BITMAP(name,bits) macro, in linux/types.h, can be used
+ * to declare an array named 'name' of just enough unsigned longs to
+ * contain all bit positions from 0 to 'bits' - 1.
+ */
+
+/*
+ * lib/bitmap.c provides these functions:
+ */
+
+extern int __bitmap_empty(const unsigned long *bitmap, int bits);
+extern int __bitmap_full(const unsigned long *bitmap, int bits);
+extern int __bitmap_equal(const unsigned long *bitmap1,
+                	const unsigned long *bitmap2, int bits);
+extern void __bitmap_complement(unsigned long *dst, const unsigned long *src,
+			int bits);
+extern void __bitmap_shift_right(unsigned long *dst,
+                        const unsigned long *src, int shift, int bits);
+extern void __bitmap_shift_left(unsigned long *dst,
+                        const unsigned long *src, int shift, int bits);
+extern void __bitmap_and(unsigned long *dst, const unsigned long *bitmap1,
+			const unsigned long *bitmap2, int bits);
+extern void __bitmap_or(unsigned long *dst, const unsigned long *bitmap1,
+			const unsigned long *bitmap2, int bits);
+extern void __bitmap_xor(unsigned long *dst, const unsigned long *bitmap1,
+			const unsigned long *bitmap2, int bits);
+extern void __bitmap_andnot(unsigned long *dst, const unsigned long *bitmap1,
+			const unsigned long *bitmap2, int bits);
+extern int __bitmap_intersects(const unsigned long *bitmap1,
+			const unsigned long *bitmap2, int bits);
+extern int __bitmap_subset(const unsigned long *bitmap1,
+			const unsigned long *bitmap2, int bits);
+extern int __bitmap_weight(const unsigned long *bitmap, int bits);
+
+extern int bitmap_scnprintf(char *buf, unsigned int len,
+			const unsigned long *src, int nbits);
+extern int bitmap_parse(const char __user *ubuf, unsigned int ulen,
+			unsigned long *dst, int nbits);
+
+#define BITMAP_LAST_WORD_MASK(nbits)					\
+(									\
+	((nbits) % BITS_PER_LONG) ?					\
+		(1UL<<((nbits) % BITS_PER_LONG))-1 : ~0UL		\
+)
+
+static inline void bitmap_zero(unsigned long *dst, int nbits)
 {
-	memset(bitmap, 0, BITS_TO_LONGS(bits)*sizeof(unsigned long));
+	if (nbits <= BITS_PER_LONG)
+		*dst = 0UL;
+	else {
+		int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long);
+		memset(dst, 0, len);
+	}
 }
 
-static inline void bitmap_fill(unsigned long *bitmap, int bits)
+static inline void bitmap_fill(unsigned long *dst, int nbits)
 {
-	memset(bitmap, 0xff, BITS_TO_LONGS(bits)*sizeof(unsigned long));
+	size_t nlongs = BITS_TO_LONGS(nbits);
+	if (nlongs > 1) {
+		int len = (nlongs - 1) * sizeof(unsigned long);
+		memset(dst, 0xff,  len);
+	}
+	dst[nlongs - 1] = BITMAP_LAST_WORD_MASK(nbits);
 }
 
-static inline void bitmap_copy(unsigned long *dst,
-			const unsigned long *src, int bits)
+static inline void bitmap_copy(unsigned long *dst, const unsigned long *src,
+			int nbits)
 {
-	int len = BITS_TO_LONGS(bits)*sizeof(unsigned long);
-	memcpy(dst, src, len);
+	if (nbits <= BITS_PER_LONG)
+		*dst = *src;
+	else {
+		int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long);
+		memcpy(dst, src, len);
+	}
 }
 
-void bitmap_shift_right(unsigned long *dst,
-			const unsigned long *src, int shift, int bits);
-void bitmap_shift_left(unsigned long *dst,
-			const unsigned long *src, int shift, int bits);
-void bitmap_and(unsigned long *dst, const unsigned long *bitmap1,
-			const unsigned long *bitmap2, int bits);
-void bitmap_or(unsigned long *dst, const unsigned long *bitmap1,
-			const unsigned long *bitmap2, int bits);
-int bitmap_weight(const unsigned long *bitmap, int bits);
-int bitmap_scnprintf(char *buf, unsigned int buflen,
-			const unsigned long *maskp, int bits);
-int bitmap_parse(const char __user *ubuf, unsigned int ubuflen,
-			unsigned long *maskp, int bits);
+static inline void bitmap_and(unsigned long *dst, const unsigned long *src1,
+			const unsigned long *src2, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		*dst = *src1 & *src2;
+	else
+		__bitmap_and(dst, src1, src2, nbits);
+}
+
+static inline void bitmap_or(unsigned long *dst, const unsigned long *src1,
+			const unsigned long *src2, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		*dst = *src1 | *src2;
+	else
+		__bitmap_or(dst, src1, src2, nbits);
+}
+
+static inline void bitmap_xor(unsigned long *dst, const unsigned long *src1,
+			const unsigned long *src2, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		*dst = *src1 ^ *src2;
+	else
+		__bitmap_xor(dst, src1, src2, nbits);
+}
+
+static inline void bitmap_andnot(unsigned long *dst, const unsigned long *src1,
+			const unsigned long *src2, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		*dst = *src1 & ~(*src2);
+	else
+		__bitmap_andnot(dst, src1, src2, nbits);
+}
+
+static inline void bitmap_complement(unsigned long *dst, const unsigned long *src,
+			int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		*dst = ~(*src) & BITMAP_LAST_WORD_MASK(nbits);
+	else
+		__bitmap_complement(dst, src, nbits);
+}
+
+static inline int bitmap_equal(const unsigned long *src1,
+			const unsigned long *src2, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		return ! ((*src1 ^ *src2) & BITMAP_LAST_WORD_MASK(nbits));
+	else
+		return __bitmap_equal(src1, src2, nbits);
+}
+
+static inline int bitmap_intersects(const unsigned long *src1,
+			const unsigned long *src2, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		return ((*src1 & *src2) & BITMAP_LAST_WORD_MASK(nbits)) != 0;
+	else
+		return __bitmap_intersects(src1, src2, nbits);
+}
+
+static inline int bitmap_subset(const unsigned long *src1,
+			const unsigned long *src2, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		return ! ((*src1 & ~(*src2)) & BITMAP_LAST_WORD_MASK(nbits));
+	else
+		return __bitmap_subset(src1, src2, nbits);
+}
+
+static inline int bitmap_empty(const unsigned long *src, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		return ! (*src & BITMAP_LAST_WORD_MASK(nbits));
+	else
+		return __bitmap_empty(src, nbits);
+}
+
+static inline int bitmap_full(const unsigned long *src, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		return ! (~(*src) & BITMAP_LAST_WORD_MASK(nbits));
+	else
+		return __bitmap_full(src, nbits);
+}
+
+static inline int bitmap_weight(const unsigned long *src, int nbits)
+{
+	return __bitmap_weight(src, nbits);
+}
+
+static inline void bitmap_shift_right(unsigned long *dst,
+			const unsigned long *src, int n, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		*dst = *src >> n;
+	else
+		__bitmap_shift_right(dst, src, n, nbits);
+}
+
+static inline void bitmap_shift_left(unsigned long *dst,
+			const unsigned long *src, int n, int nbits)
+{
+	if (nbits <= BITS_PER_LONG)
+		*dst = (*src << n) & BITMAP_LAST_WORD_MASK(nbits);
+	else
+		__bitmap_shift_left(dst, src, n, nbits);
+}
 
 #endif /* __ASSEMBLY__ */
 
diff --git a/include/linux/byteorder/swab.h b/include/linux/byteorder/swab.h
index 02ad0b5246e9..2f1cb775125a 100644
--- a/include/linux/byteorder/swab.h
+++ b/include/linux/byteorder/swab.h
@@ -134,7 +134,7 @@ static __inline__ __attribute_const__ __u16 __fswab16(__u16 x)
 {
 	return __arch__swab16(x);
 }
-static __inline__ __u16 __swab16p(__u16 *x)
+static __inline__ __u16 __swab16p(const __u16 *x)
 {
 	return __arch__swab16p(x);
 }
@@ -147,7 +147,7 @@ static __inline__ __attribute_const__ __u32 __fswab32(__u32 x)
 {
 	return __arch__swab32(x);
 }
-static __inline__ __u32 __swab32p(__u32 *x)
+static __inline__ __u32 __swab32p(const __u32 *x)
 {
 	return __arch__swab32p(x);
 }
@@ -167,7 +167,7 @@ static __inline__ __attribute_const__ __u64 __fswab64(__u64 x)
 	return __arch__swab64(x);
 #  endif
 }
-static __inline__ __u64 __swab64p(__u64 *x)
+static __inline__ __u64 __swab64p(const __u64 *x)
 {
 	return __arch__swab64p(x);
 }
diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h
index 4293a465d87b..ecca23548b64 100644
--- a/include/linux/cpumask.h
+++ b/include/linux/cpumask.h
@@ -1,56 +1,371 @@
 #ifndef __LINUX_CPUMASK_H
 #define __LINUX_CPUMASK_H
 
+/*
+ * Cpumasks provide a bitmap suitable for representing the
+ * set of CPU's in a system, one bit position per CPU number.
+ *
+ * See detailed comments in the file linux/bitmap.h describing the
+ * data type on which these cpumasks are based.
+ *
+ * For details of cpumask_scnprintf() and cpumask_parse(),
+ * see bitmap_scnprintf() and bitmap_parse() in lib/bitmap.c.
+ *
+ * The available cpumask operations are:
+ *
+ * void cpu_set(cpu, mask)		turn on bit 'cpu' in mask
+ * void cpu_clear(cpu, mask)		turn off bit 'cpu' in mask
+ * void cpus_setall(mask)		set all bits
+ * void cpus_clear(mask)		clear all bits
+ * int cpu_isset(cpu, mask)		true iff bit 'cpu' set in mask
+ * int cpu_test_and_set(cpu, mask)	test and set bit 'cpu' in mask
+ *
+ * void cpus_and(dst, src1, src2)	dst = src1 & src2  [intersection]
+ * void cpus_or(dst, src1, src2)	dst = src1 | src2  [union]
+ * void cpus_xor(dst, src1, src2)	dst = src1 ^ src2
+ * void cpus_andnot(dst, src1, src2)	dst = src1 & ~src2
+ * void cpus_complement(dst, src)	dst = ~src
+ *
+ * int cpus_equal(mask1, mask2)		Does mask1 == mask2?
+ * int cpus_intersects(mask1, mask2)	Do mask1 and mask2 intersect?
+ * int cpus_subset(mask1, mask2)	Is mask1 a subset of mask2?
+ * int cpus_empty(mask)			Is mask empty (no bits sets)?
+ * int cpus_full(mask)			Is mask full (all bits sets)?
+ * int cpus_weight(mask)		Hamming weigh - number of set bits
+ *
+ * void cpus_shift_right(dst, src, n)	Shift right
+ * void cpus_shift_left(dst, src, n)	Shift left
+ *
+ * int first_cpu(mask)			Number lowest set bit, or NR_CPUS
+ * int next_cpu(cpu, mask)		Next cpu past 'cpu', or NR_CPUS
+ *
+ * cpumask_t cpumask_of_cpu(cpu)	Return cpumask with bit 'cpu' set
+ * CPU_MASK_ALL				Initializer - all bits set
+ * CPU_MASK_NONE			Initializer - no bits set
+ * unsigned long *cpus_addr(mask)	Array of unsigned long's in mask
+ *
+ * int cpumask_scnprintf(buf, len, mask) Format cpumask for printing
+ * int cpumask_parse(ubuf, ulen, mask)	Parse ascii string as cpumask
+ *
+ * for_each_cpu_mask(cpu, mask)		for-loop cpu over mask
+ *
+ * int num_online_cpus()		Number of online CPUs
+ * int num_possible_cpus()		Number of all possible CPUs
+ * int num_present_cpus()		Number of present CPUs
+ *
+ * int cpu_online(cpu)			Is some cpu online?
+ * int cpu_possible(cpu)		Is some cpu possible?
+ * int cpu_present(cpu)			Is some cpu present (can schedule)?
+ *
+ * int any_online_cpu(mask)		First online cpu in mask
+ *
+ * for_each_cpu(cpu)			for-loop cpu over cpu_possible_map
+ * for_each_online_cpu(cpu)		for-loop cpu over cpu_online_map
+ * for_each_present_cpu(cpu)		for-loop cpu over cpu_present_map
+ *
+ * Subtlety:
+ * 1) The 'type-checked' form of cpu_isset() causes gcc (3.3.2, anyway)
+ *    to generate slightly worse code.  Note for example the additional
+ *    40 lines of assembly code compiling the "for each possible cpu"
+ *    loops buried in the disk_stat_read() macros calls when compiling
+ *    drivers/block/genhd.c (arch i386, CONFIG_SMP=y).  So use a simple
+ *    one-line #define for cpu_isset(), instead of wrapping an inline
+ *    inside a macro, the way we do the other calls.
+ */
+
 #include <linux/threads.h>
 #include <linux/bitmap.h>
-#include <asm/cpumask.h>
 #include <asm/bug.h>
 
-#ifdef CONFIG_SMP
+typedef struct { DECLARE_BITMAP(bits, NR_CPUS); } cpumask_t;
+extern cpumask_t _unused_cpumask_arg_;
 
-extern cpumask_t cpu_online_map;
-extern cpumask_t cpu_possible_map;
-extern cpumask_t cpu_present_map;
+#define cpu_set(cpu, dst) __cpu_set((cpu), &(dst))
+static inline void __cpu_set(int cpu, volatile cpumask_t *dstp)
+{
+	set_bit(cpu, dstp->bits);
+}
+
+#define cpu_clear(cpu, dst) __cpu_clear((cpu), &(dst))
+static inline void __cpu_clear(int cpu, volatile cpumask_t *dstp)
+{
+	clear_bit(cpu, dstp->bits);
+}
+
+#define cpus_setall(dst) __cpus_setall(&(dst), NR_CPUS)
+static inline void __cpus_setall(cpumask_t *dstp, int nbits)
+{
+	bitmap_fill(dstp->bits, nbits);
+}
+
+#define cpus_clear(dst) __cpus_clear(&(dst), NR_CPUS)
+static inline void __cpus_clear(cpumask_t *dstp, int nbits)
+{
+	bitmap_zero(dstp->bits, nbits);
+}
+
+/* No static inline type checking - see Subtlety (1) above. */
+#define cpu_isset(cpu, cpumask) test_bit((cpu), (cpumask).bits)
+
+#define cpu_test_and_set(cpu, cpumask) __cpu_test_and_set((cpu), &(cpumask))
+static inline int __cpu_test_and_set(int cpu, cpumask_t *addr)
+{
+	return test_and_set_bit(cpu, addr->bits);
+}
+
+#define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS)
+static inline void __cpus_and(cpumask_t *dstp, cpumask_t *src1p,
+					cpumask_t *src2p, int nbits)
+{
+	bitmap_and(dstp->bits, src1p->bits, src2p->bits, nbits);
+}
+
+#define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS)
+static inline void __cpus_or(cpumask_t *dstp, cpumask_t *src1p,
+					cpumask_t *src2p, int nbits)
+{
+	bitmap_or(dstp->bits, src1p->bits, src2p->bits, nbits);
+}
+
+#define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS)
+static inline void __cpus_xor(cpumask_t *dstp, cpumask_t *src1p,
+					cpumask_t *src2p, int nbits)
+{
+	bitmap_xor(dstp->bits, src1p->bits, src2p->bits, nbits);
+}
+
+#define cpus_andnot(dst, src1, src2) \
+				__cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS)
+static inline void __cpus_andnot(cpumask_t *dstp, cpumask_t *src1p,
+					cpumask_t *src2p, int nbits)
+{
+	bitmap_andnot(dstp->bits, src1p->bits, src2p->bits, nbits);
+}
+
+#define cpus_complement(dst, src) __cpus_complement(&(dst), &(src), NR_CPUS)
+static inline void __cpus_complement(cpumask_t *dstp,
+					cpumask_t *srcp, int nbits)
+{
+	bitmap_complement(dstp->bits, srcp->bits, nbits);
+}
+
+#define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS)
+static inline int __cpus_equal(cpumask_t *src1p,
+					cpumask_t *src2p, int nbits)
+{
+	return bitmap_equal(src1p->bits, src2p->bits, nbits);
+}
+
+#define cpus_intersects(src1, src2) __cpus_intersects(&(src1), &(src2), NR_CPUS)
+static inline int __cpus_intersects(cpumask_t *src1p,
+					cpumask_t *src2p, int nbits)
+{
+	return bitmap_intersects(src1p->bits, src2p->bits, nbits);
+}
+
+#define cpus_subset(src1, src2) __cpus_subset(&(src1), &(src2), NR_CPUS)
+static inline int __cpus_subset(cpumask_t *src1p,
+					cpumask_t *src2p, int nbits)
+{
+	return bitmap_subset(src1p->bits, src2p->bits, nbits);
+}
+
+#define cpus_empty(src) __cpus_empty(&(src), NR_CPUS)
+static inline int __cpus_empty(const cpumask_t *srcp, int nbits)
+{
+	return bitmap_empty(srcp->bits, nbits);
+}
+
+#define cpus_full(cpumask) __cpus_full(&(cpumask), NR_CPUS)
+static inline int __cpus_full(const cpumask_t *srcp, int nbits)
+{
+	return bitmap_full(srcp->bits, nbits);
+}
+
+#define cpus_weight(cpumask) __cpus_weight(&(cpumask), NR_CPUS)
+static inline int __cpus_weight(const cpumask_t *srcp, int nbits)
+{
+	return bitmap_weight(srcp->bits, nbits);
+}
 
-#define num_online_cpus()		cpus_weight(cpu_online_map)
-#define num_possible_cpus()		cpus_weight(cpu_possible_map)
-#define num_present_cpus()		cpus_weight(cpu_present_map)
+#define cpus_shift_right(dst, src, n) \
+			__cpus_shift_right(&(dst), &(src), (n), NR_CPUS)
+static inline void __cpus_shift_right(cpumask_t *dstp,
+					const cpumask_t *srcp, int n, int nbits)
+{
+	bitmap_shift_right(dstp->bits, srcp->bits, n, nbits);
+}
 
-#define cpu_online(cpu)			cpu_isset(cpu, cpu_online_map)
-#define cpu_possible(cpu)		cpu_isset(cpu, cpu_possible_map)
-#define cpu_present(cpu)		cpu_isset(cpu, cpu_present_map)
+#define cpus_shift_left(dst, src, n) \
+			__cpus_shift_left(&(dst), &(src), (n), NR_CPUS)
+static inline void __cpus_shift_left(cpumask_t *dstp,
+					const cpumask_t *srcp, int n, int nbits)
+{
+	bitmap_shift_left(dstp->bits, srcp->bits, n, nbits);
+}
 
-#define for_each_cpu_mask(cpu, mask)					\
-	for (cpu = first_cpu_const(mk_cpumask_const(mask));		\
-		cpu < NR_CPUS;						\
-		cpu = next_cpu_const(cpu, mk_cpumask_const(mask)))
+#define first_cpu(src) __first_cpu(&(src), NR_CPUS)
+static inline int __first_cpu(const cpumask_t *srcp, int nbits)
+{
+	return find_first_bit(srcp->bits, nbits);
+}
+
+#define next_cpu(n, src) __next_cpu((n), &(src), NR_CPUS)
+static inline int __next_cpu(int n, const cpumask_t *srcp, int nbits)
+{
+	return find_next_bit(srcp->bits, nbits, n+1);
+}
+
+#define cpumask_of_cpu(cpu)						\
+({									\
+	typeof(_unused_cpumask_arg_) m;					\
+	if (sizeof(m) == sizeof(unsigned long)) {			\
+		m.bits[0] = 1UL<<(cpu);					\
+	} else {							\
+		cpus_clear(m);						\
+		cpu_set((cpu), m);					\
+	}								\
+	m;								\
+})
+
+#define CPU_MASK_LAST_WORD BITMAP_LAST_WORD_MASK(NR_CPUS)
+
+#if NR_CPUS <= BITS_PER_LONG
+
+#define CPU_MASK_ALL							\
+((cpumask_t) { {							\
+	[BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD			\
+} })
+
+#else
+
+#define CPU_MASK_ALL							\
+((cpumask_t) { {							\
+	[0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL,			\
+	[BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD			\
+} })
+
+#endif
+
+#define CPU_MASK_NONE							\
+((cpumask_t) { {							\
+	[0 ... BITS_TO_LONGS(NR_CPUS)-1] =  0UL				\
+} })
+
+#define cpus_addr(src) ((src).bits)
+
+#define cpumask_scnprintf(buf, len, src) \
+			__cpumask_scnprintf((buf), (len), &(src), NR_CPUS)
+static inline int __cpumask_scnprintf(char *buf, int len,
+					cpumask_t *srcp, int nbits)
+{
+	return bitmap_scnprintf(buf, len, srcp->bits, nbits);
+}
+
+#define cpumask_parse(ubuf, ulen, src) \
+			__cpumask_parse((ubuf), (ulen), &(src), NR_CPUS)
+static inline int __cpumask_parse(const char __user *buf, int len,
+					cpumask_t *srcp, int nbits)
+{
+	return bitmap_parse(buf, len, srcp->bits, nbits);
+}
+
+#if NR_CPUS > 1
+#define for_each_cpu_mask(cpu, mask)		\
+	for ((cpu) = first_cpu(mask);		\
+		(cpu) < NR_CPUS;		\
+		(cpu) = next_cpu((cpu), (mask)))
+#else /* NR_CPUS == 1 */
+#define for_each_cpu_mask(cpu, mask) for ((cpu) = 0; (cpu) < 1; (cpu)++)
+#endif /* NR_CPUS */
+
+/*
+ * The following particular system cpumasks and operations manage
+ * possible, present and online cpus.  Each of them is a fixed size
+ * bitmap of size NR_CPUS.
+ *
+ *  #ifdef CONFIG_HOTPLUG_CPU
+ *     cpu_possible_map - all NR_CPUS bits set
+ *     cpu_present_map  - has bit 'cpu' set iff cpu is populated
+ *     cpu_online_map   - has bit 'cpu' set iff cpu available to scheduler
+ *  #else
+ *     cpu_possible_map - has bit 'cpu' set iff cpu is populated
+ *     cpu_present_map  - copy of cpu_possible_map
+ *     cpu_online_map   - has bit 'cpu' set iff cpu available to scheduler
+ *  #endif
+ *
+ *  In either case, NR_CPUS is fixed at compile time, as the static
+ *  size of these bitmaps.  The cpu_possible_map is fixed at boot
+ *  time, as the set of CPU id's that it is possible might ever
+ *  be plugged in at anytime during the life of that system boot.
+ *  The cpu_present_map is dynamic(*), representing which CPUs
+ *  are currently plugged in.  And cpu_online_map is the dynamic
+ *  subset of cpu_present_map, indicating those CPUs available
+ *  for scheduling.
+ *
+ *  If HOTPLUG is enabled, then cpu_possible_map is forced to have
+ *  all NR_CPUS bits set, otherwise it is just the set of CPUs that
+ *  ACPI reports present at boot.
+ *
+ *  If HOTPLUG is enabled, then cpu_present_map varies dynamically,
+ *  depending on what ACPI reports as currently plugged in, otherwise
+ *  cpu_present_map is just a copy of cpu_possible_map.
+ *
+ *  (*) Well, cpu_present_map is dynamic in the hotplug case.  If not
+ *      hotplug, it's a copy of cpu_possible_map, hence fixed at boot.
+ *
+ * Subtleties:
+ * 1) UP arch's (NR_CPUS == 1, CONFIG_SMP not defined) hardcode
+ *    assumption that their single CPU is online.  The UP
+ *    cpu_{online,possible,present}_maps are placebos.  Changing them
+ *    will have no useful affect on the following num_*_cpus()
+ *    and cpu_*() macros in the UP case.  This ugliness is a UP
+ *    optimization - don't waste any instructions or memory references
+ *    asking if you're online or how many CPUs there are if there is
+ *    only one CPU.
+ * 2) Most SMP arch's #define some of these maps to be some
+ *    other map specific to that arch.  Therefore, the following
+ *    must be #define macros, not inlines.  To see why, examine
+ *    the assembly code produced by the following.  Note that
+ *    set1() writes phys_x_map, but set2() writes x_map:
+ *        int x_map, phys_x_map;
+ *        #define set1(a) x_map = a
+ *        inline void set2(int a) { x_map = a; }
+ *        #define x_map phys_x_map
+ *        main(){ set1(3); set2(5); }
+ */
+
+extern cpumask_t cpu_possible_map;
+extern cpumask_t cpu_online_map;
+extern cpumask_t cpu_present_map;
 
-#define for_each_cpu(cpu) for_each_cpu_mask(cpu, cpu_possible_map)
-#define for_each_online_cpu(cpu) for_each_cpu_mask(cpu, cpu_online_map)
-#define for_each_present_cpu(cpu) for_each_cpu_mask(cpu, cpu_present_map)
+#if NR_CPUS > 1
+#define num_online_cpus()	cpus_weight(cpu_online_map)
+#define num_possible_cpus()	cpus_weight(cpu_possible_map)
+#define num_present_cpus()	cpus_weight(cpu_present_map)
+#define cpu_online(cpu)		cpu_isset((cpu), cpu_online_map)
+#define cpu_possible(cpu)	cpu_isset((cpu), cpu_possible_map)
+#define cpu_present(cpu)	cpu_isset((cpu), cpu_present_map)
 #else
-#define	cpu_online_map			cpumask_of_cpu(0)
-#define	cpu_possible_map		cpumask_of_cpu(0)
-#define	cpu_present_map			cpumask_of_cpu(0)
-
-#define num_online_cpus()		1
-#define num_possible_cpus()		1
-#define num_present_cpus()		1
-
-#define cpu_online(cpu)			({ BUG_ON((cpu) != 0); 1; })
-#define cpu_possible(cpu)		({ BUG_ON((cpu) != 0); 1; })
-#define cpu_present(cpu)		({ BUG_ON((cpu) != 0); 1; })
-
-#define for_each_cpu_mask(cpu, mask) for (cpu = 0; cpu < 1; cpu++)
-#define for_each_cpu(cpu) for (cpu = 0; cpu < 1; cpu++)
-#define for_each_online_cpu(cpu) for (cpu = 0; cpu < 1; cpu++)
-#define for_each_present_cpu(cpu) for (cpu = 0; cpu < 1; cpu++)
+#define num_online_cpus()	1
+#define num_possible_cpus()	1
+#define num_present_cpus()	1
+#define cpu_online(cpu)		((cpu) == 0)
+#define cpu_possible(cpu)	((cpu) == 0)
+#define cpu_present(cpu)	((cpu) == 0)
 #endif
 
-#define cpumask_scnprintf(buf, buflen, map)				\
-	bitmap_scnprintf(buf, buflen, cpus_addr(map), NR_CPUS)
+#define any_online_cpu(mask)			\
+({						\
+	int cpu;				\
+	for_each_cpu_mask(cpu, (mask))		\
+		if (cpu_online(cpu))		\
+			break;			\
+	cpu;					\
+})
 
-#define cpumask_parse(buf, buflen, map)					\
-	bitmap_parse(buf, buflen, cpus_addr(map), NR_CPUS)
+#define for_each_cpu(cpu)	  for_each_cpu_mask((cpu), cpu_possible_map)
+#define for_each_online_cpu(cpu)  for_each_cpu_mask((cpu), cpu_online_map)
+#define for_each_present_cpu(cpu) for_each_cpu_mask((cpu), cpu_present_map)
 
 #endif /* __LINUX_CPUMASK_H */
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 72f48658a7d7..66e27328434b 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -313,6 +313,8 @@ static inline int d_mountpoint(struct dentry *dentry)
 extern struct vfsmount *lookup_mnt(struct vfsmount *, struct dentry *);
 extern struct dentry *lookup_create(struct nameidata *nd, int is_dir);
 
+extern int sysctl_vfs_cache_pressure;
+
 #endif /* __KERNEL__ */
 
 #endif	/* __LINUX_DCACHE_H */
diff --git a/include/linux/fb.h b/include/linux/fb.h
index cc7f14febf7c..a25a0ae12656 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -530,6 +530,8 @@ struct fb_ops {
 #define FBINFO_HWACCEL_YPAN		0x2000 /* optional */
 #define FBINFO_HWACCEL_YWRAP		0x4000 /* optional */
 
+#define FBINFO_MISC_MODECHANGEUSER     0x10000 /* mode change request
+						  from userspace */
 
 struct fb_info {
 	int node;
@@ -539,6 +541,7 @@ struct fb_info {
 	struct fb_monspecs monspecs;	/* Current Monitor specs */
 	struct fb_cursor cursor;	/* Current cursor */	
 	struct work_struct queue;	/* Framebuffer event queue */
+	struct timer_list cursor_timer; /* Cursor timer */
 	struct fb_pixmap pixmap;	/* Image hardware mapper */
 	struct fb_pixmap sprite;	/* Cursor hardware mapper */
 	struct fb_cmap cmap;		/* Current cmap */
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 88337ed4f4f2..27dda18def71 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -902,6 +902,7 @@ struct inode_operations {
 			struct inode *, struct dentry *);
 	int (*readlink) (struct dentry *, char __user *,int);
 	int (*follow_link) (struct dentry *, struct nameidata *);
+	void (*put_link) (struct dentry *, struct nameidata *);
 	void (*truncate) (struct inode *);
 	int (*permission) (struct inode *, int, struct nameidata *);
 	int (*setattr) (struct dentry *, struct iattr *);
@@ -1467,8 +1468,11 @@ extern int vfs_readlink(struct dentry *, char __user *, int, const char *);
 extern int vfs_follow_link(struct nameidata *, const char *);
 extern int page_readlink(struct dentry *, char __user *, int);
 extern int page_follow_link(struct dentry *, struct nameidata *);
+extern int page_follow_link_light(struct dentry *, struct nameidata *);
+extern void page_put_link(struct dentry *, struct nameidata *);
 extern int page_symlink(struct inode *inode, const char *symname, int len);
 extern struct inode_operations page_symlink_inode_operations;
+extern int generic_readlink(struct dentry *, char __user *, int);
 extern void generic_fillattr(struct inode *, struct kstat *);
 extern int vfs_getattr(struct vfsmount *, struct dentry *, struct kstat *);
 void inode_add_bytes(struct inode *inode, loff_t bytes);
diff --git a/include/linux/i2o-dev.h b/include/linux/i2o-dev.h
index c79f39745b6d..9ef82bf1a45d 100644
--- a/include/linux/i2o-dev.h
+++ b/include/linux/i2o-dev.h
@@ -46,24 +46,24 @@
 struct i2o_cmd_passthru
 {
 	unsigned int iop;	/* IOP unit number */
-	void *msg;		/* message */
+	void __user *msg;	/* message */
 };
 
 struct i2o_cmd_hrtlct
 {
 	unsigned int iop;	/* IOP unit number */
-	void *resbuf;		/* Buffer for result */
-	unsigned int *reslen;	/* Buffer length in bytes */
+	void __user *resbuf;	/* Buffer for result */
+	unsigned int __user *reslen;	/* Buffer length in bytes */
 };
 
 struct i2o_cmd_psetget
 {
 	unsigned int iop;	/* IOP unit number */
 	unsigned int tid;	/* Target device TID */
-	void *opbuf;		/* Operation List buffer */
+	void __user *opbuf;	/* Operation List buffer */
 	unsigned int oplen;	/* Operation List buffer length in bytes */
-	void *resbuf;		/* Result List buffer */
-	unsigned int *reslen;	/* Result List buffer length in bytes */
+	void __user *resbuf;	/* Result List buffer */
+	unsigned int __user *reslen;	/* Result List buffer length in bytes */
 };
 
 struct i2o_sw_xfer
@@ -72,10 +72,10 @@ struct i2o_sw_xfer
 	unsigned char flags;	/* Flags field */
 	unsigned char sw_type;	/* Software type */
 	unsigned int sw_id;	/* Software ID */
-	void *buf;		/* Pointer to software buffer */
-	unsigned int *swlen;	/* Length of software data */
-	unsigned int *maxfrag;	/* Maximum fragment count */
-	unsigned int *curfrag;	/* Current fragment count */
+	void __user *buf;	/* Pointer to software buffer */
+	unsigned int __user *swlen;	/* Length of software data */
+	unsigned int __user *maxfrag;	/* Maximum fragment count */
+	unsigned int __user *curfrag;	/* Current fragment count */
 };
 
 struct i2o_html
@@ -83,9 +83,9 @@ struct i2o_html
 	unsigned int iop;	/* IOP unit number */
 	unsigned int tid;	/* Target device ID */
 	unsigned int page;	/* HTML page */
-	void *resbuf;		/* Buffer for reply HTML page */
-	unsigned int *reslen;	/* Length in bytes of reply buffer */
-	void *qbuf;		/* Pointer to HTTP query string */
+	void __user *resbuf;		/* Buffer for reply HTML page */
+	unsigned int __user *reslen;	/* Length in bytes of reply buffer */
+	void __user *qbuf;		/* Pointer to HTTP query string */
 	unsigned int qlen;	/* Length in bytes of query string buffer */
 };
 
diff --git a/include/linux/ide.h b/include/linux/ide.h
index 5ae165606a7c..fe54e41439c8 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -833,30 +833,14 @@ typedef struct ide_dma_ops_s {
 #define ide_rq_offset(rq) \
 	(((rq)->hard_cur_sectors - (rq)->current_nr_sectors) << 9)
 
-/*
- * taskfiles really should use hard_cur_sectors as well!
- */
-#define task_rq_offset(rq) \
-	(((rq)->nr_sectors - (rq)->current_nr_sectors) * SECTOR_SIZE)
-
 static inline void *ide_map_buffer(struct request *rq, unsigned long *flags)
 {
-	/*
-	 * fs request
-	 */
-	if (rq->bio)
-		return bio_kmap_irq(rq->bio, flags) + ide_rq_offset(rq);
-
-	/*
-	 * task request
-	 */
-	return rq->buffer + task_rq_offset(rq);
+	return bio_kmap_irq(rq->bio, flags) + ide_rq_offset(rq);
 }
 
 static inline void ide_unmap_buffer(struct request *rq, char *buffer, unsigned long *flags)
 {
-	if (rq->bio)
-		bio_kunmap_irq(buffer, flags);
+	bio_kunmap_irq(buffer, flags);
 }
 #endif /* !CONFIG_IDE_TASKFILE_IO */
 
@@ -1415,42 +1399,32 @@ extern void atapi_output_bytes(ide_drive_t *, void *, u32);
 extern void taskfile_input_data(ide_drive_t *, void *, u32);
 extern void taskfile_output_data(ide_drive_t *, void *, u32);
 
-#ifdef CONFIG_IDE_TASKFILE_IO
-
 #define IDE_PIO_IN	0
 #define IDE_PIO_OUT	1
 
-static inline void task_sectors(ide_drive_t *drive, struct request *rq,
-				unsigned nsect, int rw)
+static inline void __task_sectors(ide_drive_t *drive, char *buf,
+				  unsigned nsect, unsigned rw)
 {
-	unsigned long flags;
-	unsigned int bio_rq;
-	char *buf;
-
-	/*
-	 * bio_rq flag is needed because we can call
-	 * rq_unmap_buffer() with rq->cbio == NULL
-	 */
-	bio_rq = rq->cbio ? 1 : 0;
-
-	if (bio_rq)
-		buf = rq_map_buffer(rq, &flags);	/* fs request */
-	else
-		buf = rq->buffer + blk_rq_offset(rq);	/* task request */
-
 	/*
 	 * IRQ can happen instantly after reading/writing
 	 * last sector of the datablock.
 	 */
-	process_that_request_first(rq, nsect);
-
 	if (rw == IDE_PIO_OUT)
 		taskfile_output_data(drive, buf, nsect * SECTOR_WORDS);
 	else
 		taskfile_input_data(drive, buf, nsect * SECTOR_WORDS);
+}
+
+#ifdef CONFIG_IDE_TASKFILE_IO
+static inline void task_bio_sectors(ide_drive_t *drive, struct request *rq,
+				    unsigned nsect, unsigned rw)
+{
+	unsigned long flags;
+	char *buf = rq_map_buffer(rq, &flags);
 
-	if (bio_rq)
-		rq_unmap_buffer(buf, &flags);
+	process_that_request_first(rq, nsect);
+	__task_sectors(drive, buf, nsect, rw);
+	rq_unmap_buffer(buf, &flags);
 }
 #endif /* CONFIG_IDE_TASKFILE_IO */
 
diff --git a/include/linux/init.h b/include/linux/init.h
index 45069e275b3d..641657ebe067 100644
--- a/include/linux/init.h
+++ b/include/linux/init.h
@@ -3,6 +3,7 @@
 
 #include <linux/config.h>
 #include <linux/compiler.h>
+#include <asm/setup.h>
 
 /* These macros are used to mark some functions or 
  * initialized data (doesn't apply to uninitialized data)
@@ -66,6 +67,9 @@ typedef void (*exitcall_t)(void);
 
 extern initcall_t __con_initcall_start, __con_initcall_end;
 extern initcall_t __security_initcall_start, __security_initcall_end;
+
+/* Defined in init/main.c */
+extern char saved_command_line[COMMAND_LINE_SIZE];
 #endif
   
 #ifndef MODULE
@@ -107,25 +111,33 @@ extern initcall_t __security_initcall_start, __security_initcall_end;
 struct obs_kernel_param {
 	const char *str;
 	int (*setup_func)(char *);
+	int early;
 };
 
-/* OBSOLETE: see moduleparam.h for the right way. */
-#define __setup_param(str, unique_id, fn)			\
+/* Only for really core code.  See moduleparam.h for the normal way. */
+#define __setup_param(str, unique_id, fn, early)			\
 	static char __setup_str_##unique_id[] __initdata = str;	\
 	static struct obs_kernel_param __setup_##unique_id	\
 		 __attribute_used__				\
 		 __attribute__((__section__(".init.setup")))	\
-		= { __setup_str_##unique_id, fn }
+		= { __setup_str_##unique_id, fn, early }
 
 #define __setup_null_param(str, unique_id)			\
-	__setup_param(str, unique_id, NULL)
+	__setup_param(str, unique_id, NULL, 0)
 
 #define __setup(str, fn)					\
-	__setup_param(str, fn, fn)
+	__setup_param(str, fn, fn, 0)
 
 #define __obsolete_setup(str)					\
 	__setup_null_param(str, __LINE__)
 
+/* NOTE: fn is as per module_param, not __setup!  Emits warning if fn
+ * returns non-zero. */
+#define early_param(str, fn)					\
+	__setup_param(str, fn, fn, 1)
+
+/* Relies on saved_command_line being set */
+void __init parse_early_param(void);
 #endif /* __ASSEMBLY__ */
 
 /**
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 220f2a8602b4..565321b05213 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -7,6 +7,7 @@
 #include <linux/linkage.h>
 #include <linux/bitops.h>
 #include <linux/preempt.h>
+#include <linux/cpumask.h>
 #include <asm/atomic.h>
 #include <asm/hardirq.h>
 #include <asm/ptrace.h>
@@ -35,7 +36,7 @@ typedef int irqreturn_t;
 struct irqaction {
 	irqreturn_t (*handler)(int, void *, struct pt_regs *);
 	unsigned long flags;
-	unsigned long mask;
+	cpumask_t mask;
 	const char *name;
 	void *dev_id;
 	struct irqaction *next;
diff --git a/include/linux/ip.h b/include/linux/ip.h
index ab799b48b485..12d504ef8df0 100644
--- a/include/linux/ip.h
+++ b/include/linux/ip.h
@@ -129,8 +129,6 @@ struct inet_opt {
 	int			mc_index;	/* Multicast device index */
 	__u32			mc_addr;
 	struct ip_mc_socklist	*mc_list;	/* Group array */
-	struct page		*sndmsg_page;	/* Cached page for sendmsg */
-	u32			sndmsg_off;	/* Cached offset for sendmsg */
 	/*
 	 * Following members are used to retain the infomation to build
 	 * an ip header on each ip fragmentation while the socket is corked.
diff --git a/include/linux/iso_fs.h b/include/linux/iso_fs.h
index 15b07d37e2e5..23cdbf83cb16 100644
--- a/include/linux/iso_fs.h
+++ b/include/linux/iso_fs.h
@@ -190,28 +190,28 @@ static inline int isonum_712(char *p)
 {
 	return *(s8 *)p;
 }
-static inline int isonum_721(char *p)
+static inline unsigned int isonum_721(char *p)
 {
 	return le16_to_cpu(get_unaligned((u16 *)p));
 }
-static inline int isonum_722(char *p)
+static inline unsigned int isonum_722(char *p)
 {
 	return be16_to_cpu(get_unaligned((u16 *)p));
 }
-static inline int isonum_723(char *p)
+static inline unsigned int isonum_723(char *p)
 {
 	/* Ignore bigendian datum due to broken mastering programs */
 	return le16_to_cpu(get_unaligned((u16 *)p));
 }
-static inline int isonum_731(char *p)
+static inline unsigned int isonum_731(char *p)
 {
 	return le32_to_cpu(get_unaligned((u32 *)p));
 }
-static inline int isonum_732(char *p)
+static inline unsigned int isonum_732(char *p)
 {
 	return be32_to_cpu(get_unaligned((u32 *)p));
 }
-static inline int isonum_733(char *p)
+static inline unsigned int isonum_733(char *p)
 {
 	/* Ignore bigendian datum due to broken mastering programs */
 	return le32_to_cpu(get_unaligned((u32 *)p));
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 9eb023020b44..d6ed9b926c6f 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -54,6 +54,16 @@ void __might_sleep(char *file, int line);
 #define might_sleep_if(cond) do {} while (0)
 #endif
 
+#define abs(x) ({				\
+		int __x = (x);			\
+		(__x < 0) ? -__x : __x;		\
+	})
+
+#define labs(x) ({				\
+		long __x = (x);			\
+		(__x < 0) ? -__x : __x;		\
+	})
+
 extern struct notifier_block *panic_notifier_list;
 NORET_TYPE void panic(const char * fmt, ...)
 	__attribute__ ((NORET_AND format (printf, 1, 2)));
@@ -61,7 +71,6 @@ asmlinkage NORET_TYPE void do_exit(long error_code)
 	ATTRIB_NORET;
 NORET_TYPE void complete_and_exit(struct completion *, long)
 	ATTRIB_NORET;
-extern int abs(int);
 extern unsigned long simple_strtoul(const char *,char **,unsigned int);
 extern long simple_strtol(const char *,char **,unsigned int);
 extern unsigned long long simple_strtoull(const char *,char **,unsigned int);
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 787f3583729a..a40286d08e23 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -91,6 +91,7 @@ enum {
 	ATA_DFLAG_MASTER	= (1 << 2), /* is device 0? */
 	ATA_DFLAG_WCACHE	= (1 << 3), /* has write cache we can
 					     * (hopefully) flush? */
+	ATA_DFLAG_LOCK_SECTORS	= (1 << 4), /* don't adjust max_sectors */
 
 	ATA_DEV_UNKNOWN		= 0,	/* unknown device */
 	ATA_DEV_ATA		= 1,	/* ATA device */
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index 373a13ba6f3f..2f41b635580b 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -118,8 +118,8 @@ struct zone {
 	spinlock_t		lru_lock;	
 	struct list_head	active_list;
 	struct list_head	inactive_list;
-	atomic_t		nr_scan_active;
-	atomic_t		nr_scan_inactive;
+	unsigned long		nr_scan_active;
+	unsigned long		nr_scan_inactive;
 	unsigned long		nr_active;
 	unsigned long		nr_inactive;
 	int			all_unreclaimable; /* All pages pinned */
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index 9ac94aaabd3f..d186585b73a4 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -22,7 +22,7 @@ struct erase_info_user {
 struct mtd_oob_buf {
 	u_int32_t start;
 	u_int32_t length;
-	unsigned char *ptr;
+	unsigned char __user *ptr;
 };
 
 #define MTD_CHAR_MAJOR 90
diff --git a/include/linux/namei.h b/include/linux/namei.h
index 4117cd90a345..adcafdec8ee7 100644
--- a/include/linux/namei.h
+++ b/include/linux/namei.h
@@ -10,12 +10,16 @@ struct open_intent {
 	int	create_mode;
 };
 
+enum { MAX_NESTED_LINKS = 5 };
+
 struct nameidata {
 	struct dentry	*dentry;
 	struct vfsmount *mnt;
 	struct qstr	last;
 	unsigned int	flags;
 	int		last_type;
+	unsigned	depth;
+	char *saved_names[MAX_NESTED_LINKS + 1];
 
 	/* Intent data */
 	union {
@@ -67,4 +71,14 @@ extern int follow_up(struct vfsmount **, struct dentry **);
 extern struct dentry *lock_rename(struct dentry *, struct dentry *);
 extern void unlock_rename(struct dentry *, struct dentry *);
 
+static inline void nd_set_link(struct nameidata *nd, char *path)
+{
+	nd->saved_names[nd->depth] = path;
+}
+
+static inline char *nd_get_link(struct nameidata *nd)
+{
+	return nd->saved_names[nd->depth];
+}
+
 #endif /* _LINUX_NAMEI_H */
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 97758cd8f50e..9f380143cec0 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -366,6 +366,8 @@ struct net_device
 	struct Qdisc		*qdisc_ingress;
 	unsigned long		tx_queue_len;	/* Max frames per queue allowed */
 
+	/* ingress path synchronizer */
+	spinlock_t		ingress_lock;
 	/* hard_start_xmit synchronizer */
 	spinlock_t		xmit_lock;
 	/* cpu id of processor entered to hard_start_xmit or -1,
diff --git a/include/linux/netfilter_ipv4/ip_conntrack.h b/include/linux/netfilter_ipv4/ip_conntrack.h
index 26d7f3a11fd7..1974f162f5a0 100644
--- a/include/linux/netfilter_ipv4/ip_conntrack.h
+++ b/include/linux/netfilter_ipv4/ip_conntrack.h
@@ -103,7 +103,7 @@ union ip_conntrack_nat_help {
 #include <linux/types.h>
 #include <linux/skbuff.h>
 
-#ifdef CONFIG_NF_DEBUG
+#ifdef CONFIG_NETFILTER_DEBUG
 #define IP_NF_ASSERT(x)							\
 do {									\
 	if (!(x))							\
diff --git a/include/linux/netfilter_ipv4/ipt_addrtype.h b/include/linux/netfilter_ipv4/ipt_addrtype.h
new file mode 100644
index 000000000000..166ed01a8122
--- /dev/null
+++ b/include/linux/netfilter_ipv4/ipt_addrtype.h
@@ -0,0 +1,11 @@
+#ifndef _IPT_ADDRTYPE_H
+#define _IPT_ADDRTYPE_H
+
+struct ipt_addrtype_info {
+	u_int16_t	source;		/* source-type mask */
+	u_int16_t	dest;		/* dest-type mask */
+	u_int32_t	invert_source;
+	u_int32_t	invert_dest;
+};
+
+#endif
diff --git a/include/linux/netfilter_ipv4/ipt_realm.h b/include/linux/netfilter_ipv4/ipt_realm.h
new file mode 100644
index 000000000000..a4d6698723ac
--- /dev/null
+++ b/include/linux/netfilter_ipv4/ipt_realm.h
@@ -0,0 +1,10 @@
+#ifndef _IPT_REALM_H
+#define _IPT_REALM_H
+
+struct ipt_realm_info {
+	u_int32_t id;
+	u_int32_t mask;
+	u_int8_t invert;
+};
+
+#endif /* _IPT_REALM_H */
diff --git a/include/linux/oprofile.h b/include/linux/oprofile.h
index 80cfea0fa65f..f17c89c37c72 100644
--- a/include/linux/oprofile.h
+++ b/include/linux/oprofile.h
@@ -65,6 +65,9 @@ extern void oprofile_add_sample(unsigned long eip, unsigned int is_kernel,
  */
 int oprofilefs_create_file(struct super_block * sb, struct dentry * root,
 	char const * name, struct file_operations * fops);
+
+int oprofilefs_create_file_perm(struct super_block * sb, struct dentry * root,
+	char const * name, struct file_operations * fops, int perm);
  
 /** Create a file for read/write access to an unsigned long. */
 int oprofilefs_create_ulong(struct super_block * sb, struct dentry * root,
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 427b696f484b..4da205f3cb26 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -8,6 +8,7 @@
 #include <linux/fs.h>
 #include <linux/list.h>
 #include <linux/highmem.h>
+#include <linux/compiler.h>
 #include <asm/uaccess.h>
 #include <linux/gfp.h>
 
@@ -136,7 +137,10 @@ static inline void pagecache_acct(int count)
 
 static inline unsigned long get_page_cache_size(void)
 {
-        return atomic_read(&nr_pagecache);
+	int ret = atomic_read(&nr_pagecache);
+	if (unlikely(ret < 0))
+		ret = 0;
+	return ret;
 }
 
 static inline pgoff_t linear_page_index(struct vm_area_struct *vma,
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 45d805ddeb9e..2299b75b0518 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -967,12 +967,14 @@
 
 #define PCI_VENDOR_ID_3COM		0x10b7
 #define PCI_DEVICE_ID_3COM_3C985	0x0001
+#define PCI_DEVICE_ID_3COM_3C940	0x1700
 #define PCI_DEVICE_ID_3COM_3C339	0x3390
 #define PCI_DEVICE_ID_3COM_3C359	0x3590
 #define PCI_DEVICE_ID_3COM_3C590	0x5900
 #define PCI_DEVICE_ID_3COM_3C595TX	0x5950
 #define PCI_DEVICE_ID_3COM_3C595T4	0x5951
 #define PCI_DEVICE_ID_3COM_3C595MII	0x5952
+#define PCI_DEVICE_ID_3COM_3C940B	0x80eb
 #define PCI_DEVICE_ID_3COM_3C900TPO	0x9000
 #define PCI_DEVICE_ID_3COM_3C900COMBO	0x9001
 #define PCI_DEVICE_ID_3COM_3C905TX	0x9050
@@ -1420,6 +1422,9 @@
 #define PCI_DEVICE_ID_RICOH_RL5C476	0x0476
 #define PCI_DEVICE_ID_RICOH_RL5C478	0x0478
 
+#define PCI_VENDOR_ID_DLINK		0x1186
+#define PCI_DEVICE_ID_DLINK_DGE510T	0x4c00
+
 #define PCI_VENDOR_ID_ARTOP		0x1191
 #define PCI_DEVICE_ID_ARTOP_ATP8400	0x0004
 #define PCI_DEVICE_ID_ARTOP_ATP850UF	0x0005
@@ -1735,6 +1740,9 @@
 #define PCI_VENDOR_ID_KAWASAKI		0x136b
 #define PCI_DEVICE_ID_MCHIP_KL5A72002	0xff01
 
+#define PCI_VENDOR_ID_CNET		0x1371
+#define PCI_DEVICE_ID_CNET_GIGACARD	0x434e
+
 #define PCI_VENDOR_ID_LMC		0x1376
 #define PCI_DEVICE_ID_LMC_HSSI		0x0003
 #define PCI_DEVICE_ID_LMC_DS3		0x0004
@@ -1769,6 +1777,12 @@
 #define PCI_DEVICE_ID_CCD_B00C		0xb00c
 #define PCI_DEVICE_ID_CCD_B100		0xb100
 
+#define PCI_VENDOR_ID_MICROGATE		0x13c0
+#define PCI_DEVICE_ID_MICROGATE_USC	0x0010
+#define PCI_DEVICE_ID_MICROGATE_SCC	0x0020
+#define PCI_DEVICE_ID_MICROGATE_SCA	0x0030
+#define PCI_DEVICE_ID_MICROGATE_USC2	0x0210
+
 #define PCI_VENDOR_ID_3WARE		0x13C1
 #define PCI_DEVICE_ID_3WARE_1000	0x1000
 #define PCI_DEVICE_ID_3WARE_7000	0x1001
@@ -1913,6 +1927,10 @@
 #define PCI_DEVICE_ID_FARSITE_TE1       0x1610
 #define PCI_DEVICE_ID_FARSITE_TE1C      0x1612
 
+#define PCI_VENDOR_ID_LINKSYS		0x1737
+#define PCI_DEVICE_ID_LINKSYS_EG1032	0x1032
+#define PCI_DEVICE_ID_LINKSYS_EG1064	0x1064
+
 #define PCI_VENDOR_ID_ALTIMA		0x173b
 #define PCI_DEVICE_ID_ALTIMA_AC1000	0x03e8
 #define PCI_DEVICE_ID_ALTIMA_AC1001	0x03e9
@@ -2252,8 +2270,12 @@
 #define PCI_DEVICE_ID_HOLTEK_6565	0x6565
 
 #define PCI_VENDOR_ID_NETMOS		0x9710
+#define PCI_DEVICE_ID_NETMOS_9705	0x9705
 #define PCI_DEVICE_ID_NETMOS_9735	0x9735
+#define PCI_DEVICE_ID_NETMOS_9805	0x9805
+#define PCI_DEVICE_ID_NETMOS_9815	0x9815
 #define PCI_DEVICE_ID_NETMOS_9835	0x9835
+#define PCI_DEVICE_ID_NETMOS_9855	0x9855
 
 #define PCI_SUBVENDOR_ID_EXSYS		0xd84d
 #define PCI_SUBDEVICE_ID_EXSYS_4014	0x4014
@@ -2266,12 +2288,3 @@
 #define PCI_DEVICE_ID_ARK_STING		0xa091
 #define PCI_DEVICE_ID_ARK_STINGARK	0xa099
 #define PCI_DEVICE_ID_ARK_2000MT	0xa0a1
-
-#define PCI_VENDOR_ID_MICROGATE		0x13c0
-#define PCI_DEVICE_ID_MICROGATE_USC	0x0010
-#define PCI_DEVICE_ID_MICROGATE_SCC	0x0020
-#define PCI_DEVICE_ID_MICROGATE_SCA	0x0030
-#define PCI_DEVICE_ID_MICROGATE_USC2	0x0210
-
-#define PCI_VENDOR_ID_HINT		0x3388
-#define PCI_DEVICE_ID_HINT_VXPROII_IDE	0x8013
diff --git a/include/linux/pkt_cls.h b/include/linux/pkt_cls.h
index f54111f9d14c..06e4e728d4fc 100644
--- a/include/linux/pkt_cls.h
+++ b/include/linux/pkt_cls.h
@@ -1,14 +1,139 @@
 #ifndef __LINUX_PKT_CLS_H
 #define __LINUX_PKT_CLS_H
 
+/* I think i could have done better macros ; for now this is stolen from
+ * some arch/mips code - jhs
+*/
+#define _TC_MAKE32(x) ((x))
+
+#define _TC_MAKEMASK1(n) (_TC_MAKE32(1) << _TC_MAKE32(n))
+#define _TC_MAKEMASK(v,n) (_TC_MAKE32((_TC_MAKE32(1)<<(v))-1) << _TC_MAKE32(n))
+#define _TC_MAKEVALUE(v,n) (_TC_MAKE32(v) << _TC_MAKE32(n))
+#define _TC_GETVALUE(v,n,m) ((_TC_MAKE32(v) & _TC_MAKE32(m)) >> _TC_MAKE32(n))
+
+/* verdict bit breakdown 
+ *
+bit 0: when set -> this packet has been munged already
+
+bit 1: when set -> It is ok to munge this packet
+
+bit 2,3,4,5: Reclassify counter - sort of reverse TTL - if exceeded
+assume loop
+
+bit 6,7: Where this packet was last seen 
+0: Above the transmit example at the socket level
+1: on the Ingress
+2: on the Egress
+
+bit 8: when set --> Request not to classify on ingress. 
+
+bits 9,10,11: redirect counter -  redirect TTL. Loop avoidance
+
+ *
+ * */
+
+#define TC_MUNGED          _TC_MAKEMASK1(0)
+#define SET_TC_MUNGED(v)   ( TC_MUNGED | (v & ~TC_MUNGED))
+#define CLR_TC_MUNGED(v)   ( v & ~TC_MUNGED)
+
+#define TC_OK2MUNGE        _TC_MAKEMASK1(1)
+#define SET_TC_OK2MUNGE(v)   ( TC_OK2MUNGE | (v & ~TC_OK2MUNGE))
+#define CLR_TC_OK2MUNGE(v)   ( v & ~TC_OK2MUNGE)
+
+#define S_TC_VERD          _TC_MAKE32(2)
+#define M_TC_VERD          _TC_MAKEMASK(4,S_TC_VERD)
+#define G_TC_VERD(x)       _TC_GETVALUE(x,S_TC_VERD,M_TC_VERD)
+#define V_TC_VERD(x)       _TC_MAKEVALUE(x,S_TC_VERD)
+#define SET_TC_VERD(v,n)   ((V_TC_VERD(n)) | (v & ~M_TC_VERD))
+
+#define S_TC_FROM          _TC_MAKE32(6)
+#define M_TC_FROM          _TC_MAKEMASK(2,S_TC_FROM)
+#define G_TC_FROM(x)       _TC_GETVALUE(x,S_TC_FROM,M_TC_FROM)
+#define V_TC_FROM(x)       _TC_MAKEVALUE(x,S_TC_FROM)
+#define SET_TC_FROM(v,n)   ((V_TC_FROM(n)) | (v & ~M_TC_FROM))
+#define AT_STACK	0x0
+#define AT_INGRESS	0x1
+#define AT_EGRESS	0x2
+
+#define TC_NCLS          _TC_MAKEMASK1(8)
+#define SET_TC_NCLS(v)   ( TC_NCLS | (v & ~TC_NCLS))
+#define CLR_TC_NCLS(v)   ( v & ~TC_NCLS)
+
+#define S_TC_RTTL          _TC_MAKE32(9)
+#define M_TC_RTTL          _TC_MAKEMASK(3,S_TC_RTTL)
+#define G_TC_RTTL(x)       _TC_GETVALUE(x,S_TC_RTTL,M_TC_RTTL)
+#define V_TC_RTTL(x)       _TC_MAKEVALUE(x,S_TC_RTTL)
+#define SET_TC_RTTL(v,n)   ((V_TC_RTTL(n)) | (v & ~M_TC_RTTL))
+
+#define S_TC_AT          _TC_MAKE32(12)
+#define M_TC_AT          _TC_MAKEMASK(2,S_TC_AT)
+#define G_TC_AT(x)       _TC_GETVALUE(x,S_TC_AT,M_TC_AT)
+#define V_TC_AT(x)       _TC_MAKEVALUE(x,S_TC_AT)
+#define SET_TC_AT(v,n)   ((V_TC_AT(n)) | (v & ~M_TC_AT))
+
+/* Action attributes */
+enum
+{
+	TCA_ACT_UNSPEC,
+	TCA_ACT_KIND,
+	TCA_ACT_OPTIONS,
+	TCA_ACT_INDEX,
+	__TCA_ACT_MAX
+};
+
+#define TCA_ACT_MAX __TCA_ACT_MAX
+#define TCA_OLD_COMPAT (TCA_ACT_MAX+1)
+#define TCA_ACT_MAX_PRIO 32
+#define TCA_ACT_BIND	1
+#define TCA_ACT_NOBIND	0
+#define TCA_ACT_UNBIND	1
+#define TCA_ACT_NOUNBIND	0
+#define TCA_ACT_REPLACE		1
+#define TCA_ACT_NOREPLACE	0
+#define MAX_REC_LOOP 4
+#define MAX_RED_LOOP 4
+
+#define TC_ACT_UNSPEC	(-1)
+#define TC_ACT_OK		0
+#define TC_ACT_RECLASSIFY	1
+#define TC_ACT_SHOT		2
+#define TC_ACT_PIPE		3
+#define TC_ACT_STOLEN		4
+#define TC_ACT_QUEUED		5
+#define TC_ACT_REPEAT		6
+#define TC_ACT_JUMP		0x10000000
+
+/* Action type identifiers*/
+enum
+{
+	TCA_ID_UNSPEC=0,
+	TCA_ID_POLICE=1,
+	/* other actions go here */
+	__TCA_ID_MAX=255
+};
+
+#define TCA_ID_MAX __TCA_ID_MAX
+
 struct tc_police
 {
 	__u32			index;
+#ifdef CONFIG_NET_CLS_ACT
+	int 			refcnt;
+	int 			bindcnt;
+#endif
+/* Turned off because it requires new tc
+ * to work (for now maintain ABI)
+ *
+#ifdef CONFIG_NET_CLS_ACT
+	__u32			capab;
+#endif
+*/
 	int			action;
-#define TC_POLICE_UNSPEC	(-1)
-#define TC_POLICE_OK		0
-#define TC_POLICE_RECLASSIFY	1
-#define TC_POLICE_SHOT		2
+#define TC_POLICE_UNSPEC	TC_ACT_UNSPEC
+#define TC_POLICE_OK		TC_ACT_OK
+#define TC_POLICE_RECLASSIFY	TC_ACT_RECLASSIFY
+#define TC_POLICE_SHOT		TC_ACT_SHOT
+#define TC_POLICE_PIPE		TC_ACT_PIPE
 
 	__u32			limit;
 	__u32			burst;
@@ -17,6 +142,26 @@ struct tc_police
 	struct tc_ratespec	peakrate;
 };
 
+struct tcf_t
+{
+	__u32   install;
+	__u32   lastuse;
+	__u32   expires;
+};
+
+struct tc_cnt
+{
+	int                   refcnt; 
+	int                   bindcnt;
+};
+
+#define tc_gen \
+	__u32                 index; \
+	__u32                 capab; \
+	int                   action; \
+	int                   refcnt; \
+	int                   bindcnt
+
 enum
 {
 	TCA_POLICE_UNSPEC,
@@ -25,8 +170,8 @@ enum
 	TCA_POLICE_PEAKRATE,
 	TCA_POLICE_AVRATE,
 	TCA_POLICE_RESULT,
-#define TCA_POLICE_RESULT TCA_POLICE_RESULT
 	__TCA_POLICE_MAX
+#define TCA_POLICE_RESULT TCA_POLICE_RESULT
 };
 
 #define TCA_POLICE_MAX (__TCA_POLICE_MAX - 1)
@@ -50,6 +195,12 @@ enum
 	TCA_U32_DIVISOR,
 	TCA_U32_SEL,
 	TCA_U32_POLICE,
+#ifdef CONFIG_NET_CLS_ACT
+	TCA_U32_ACT,   
+#endif
+#ifdef CONFIG_NET_CLS_IND
+	TCA_U32_INDEV,
+#endif
 	__TCA_U32_MAX
 };
 
@@ -61,6 +212,9 @@ struct tc_u32_key
 	__u32		val;
 	int		off;
 	int		offmask;
+#ifdef CONFIG_CLS_U32_PERF
+	unsigned long	kcnt;
+#endif
 };
 
 struct tc_u32_sel
@@ -68,6 +222,9 @@ struct tc_u32_sel
 	unsigned char		flags;
 	unsigned char		offshift;
 	unsigned char		nkeys;
+#ifdef fix_u32_bug
+	unsigned char		fshift;  /* fold shift */
+#endif
 
 	__u16			offmask;
 	__u16			off;
@@ -75,7 +232,10 @@ struct tc_u32_sel
 
 	short			hoff;
 	__u32			hmask;
-
+#ifdef CONFIG_CLS_U32_PERF
+	unsigned long		rcnt;
+	unsigned long		rhit;
+#endif
 	struct tc_u32_key	keys[0];
 };
 
@@ -102,7 +262,7 @@ enum
 	__TCA_RSVP_MAX
 };
 
-#define TCA_RSVP_MAX (__TCA_RSVP_MAX - 1)
+#define TCA_RSVP_MAX (__TCA_RSVP_MAX - 1 )
 
 struct tc_rsvp_gpi
 {
@@ -143,6 +303,12 @@ enum
 	TCA_FW_UNSPEC,
 	TCA_FW_CLASSID,
 	TCA_FW_POLICE,
+#ifdef CONFIG_NET_CLS_IND
+	TCA_FW_INDEV,
+#endif
+#ifdef CONFIG_NET_CLS_ACT
+	TCA_FW_ACT,
+#endif
 	__TCA_FW_MAX
 };
 
@@ -162,6 +328,6 @@ enum
 	__TCA_TCINDEX_MAX
 };
 
-#define TCA_TCINDEX_MAX        (__TCA_TCINDEX_MAX - 1)
+#define TCA_TCINDEX_MAX     (__TCA_TCINDEX_MAX - 1)
 
 #endif
diff --git a/include/linux/pkt_sched.h b/include/linux/pkt_sched.h
index ef350df8e560..6b3f74154be6 100644
--- a/include/linux/pkt_sched.h
+++ b/include/linux/pkt_sched.h
@@ -37,6 +37,13 @@ struct tc_stats
 	__u32	bps;			/* Current flow byte rate */
 	__u32	pps;			/* Current flow packet rate */
 	__u32	qlen;
+#ifdef CONFIG_NET_CLS_ACT
+/* eventually remove the define here; adding this(useful) 
+field at least fixes the 8 byte layout problems we 
+have with MIPS and PPC because we have a u64
+*/
+	__u32	reqs;			/* number of requeues happened */
+#endif
 	__u32	backlog;
 #ifdef __KERNEL__
 	spinlock_t *lock;
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 58048abd7446..10c4b8f24f08 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -36,41 +36,37 @@
 #ifdef __KERNEL__
 
 #include <linux/cache.h>
-#include <linux/list.h>
 #include <linux/spinlock.h>
 #include <linux/threads.h>
 #include <linux/percpu.h>
 #include <linux/cpumask.h>
+#include <linux/seqlock.h>
 
 /**
  * struct rcu_head - callback structure for use with RCU
- * @list: list_head to queue the update requests
+ * @next: next update requests in a list
  * @func: actual update function to call after the grace period.
- * @arg: argument to be passed to the actual update function.
  */
 struct rcu_head {
-	struct list_head list;
-	void (*func)(void *obj);
-	void *arg;
+	struct rcu_head *next;
+	void (*func)(struct rcu_head *head);
 };
 
-#define RCU_HEAD_INIT(head) \
-		{ .list = LIST_HEAD_INIT(head.list), .func = NULL, .arg = NULL }
+#define RCU_HEAD_INIT(head) { .next = NULL, .func = NULL }
 #define RCU_HEAD(head) struct rcu_head head = RCU_HEAD_INIT(head)
 #define INIT_RCU_HEAD(ptr) do { \
-       INIT_LIST_HEAD(&(ptr)->list); (ptr)->func = NULL; (ptr)->arg = NULL; \
+       (ptr)->next = NULL; (ptr)->func = NULL; \
 } while (0)
 
 
 
-/* Control variables for rcupdate callback mechanism. */
+/* Global control variables for rcupdate callback mechanism. */
 struct rcu_ctrlblk {
-	spinlock_t	mutex;		/* Guard this struct                  */
-	long		curbatch;	/* Current batch number.	      */
-	long		maxbatch;	/* Max requested batch number.        */
-	cpumask_t	rcu_cpu_mask; 	/* CPUs that need to switch in order  */
-					/* for current batch to proceed.      */
-};
+	long	cur;		/* Current batch number.                      */
+	long	completed;	/* Number of the last completed batch         */
+	int	next_pending;	/* Is the next batch already waiting?         */
+	seqcount_t lock;	/* For atomic reads of cur and next_pending.  */
+} ____cacheline_maxaligned_in_smp;
 
 /* Is batch a before batch b ? */
 static inline int rcu_batch_before(long a, long b)
@@ -90,35 +86,51 @@ static inline int rcu_batch_after(long a, long b)
  * curlist - current batch for which quiescent cycle started if any
  */
 struct rcu_data {
+	/* 1) quiescent state handling : */
+        long		quiescbatch;     /* Batch # for grace period */
 	long		qsctr;		 /* User-mode/idle loop etc. */
         long            last_qsctr;	 /* value of qsctr at beginning */
                                          /* of rcu grace period */
+	int		qs_pending;	 /* core waits for quiesc state */
+
+	/* 2) batch handling */
         long  	       	batch;           /* Batch # for current RCU batch */
-        struct list_head  nxtlist;
-        struct list_head  curlist;
+        struct rcu_head *nxtlist;
+	struct rcu_head **nxttail;
+        struct rcu_head *curlist;
 };
 
 DECLARE_PER_CPU(struct rcu_data, rcu_data);
 extern struct rcu_ctrlblk rcu_ctrlblk;
 
+#define RCU_quiescbatch(cpu)	(per_cpu(rcu_data, (cpu)).quiescbatch)
 #define RCU_qsctr(cpu) 		(per_cpu(rcu_data, (cpu)).qsctr)
 #define RCU_last_qsctr(cpu) 	(per_cpu(rcu_data, (cpu)).last_qsctr)
+#define RCU_qs_pending(cpu)	(per_cpu(rcu_data, (cpu)).qs_pending)
 #define RCU_batch(cpu) 		(per_cpu(rcu_data, (cpu)).batch)
 #define RCU_nxtlist(cpu) 	(per_cpu(rcu_data, (cpu)).nxtlist)
 #define RCU_curlist(cpu) 	(per_cpu(rcu_data, (cpu)).curlist)
-
-#define RCU_QSCTR_INVALID	0
+#define RCU_nxttail(cpu) 	(per_cpu(rcu_data, (cpu)).nxttail)
 
 static inline int rcu_pending(int cpu) 
 {
-	if ((!list_empty(&RCU_curlist(cpu)) &&
-	     rcu_batch_before(RCU_batch(cpu), rcu_ctrlblk.curbatch)) ||
-	    (list_empty(&RCU_curlist(cpu)) &&
-			 !list_empty(&RCU_nxtlist(cpu))) ||
-	    cpu_isset(cpu, rcu_ctrlblk.rcu_cpu_mask))
+	/* This cpu has pending rcu entries and the grace period
+	 * for them has completed.
+	 */
+	if (RCU_curlist(cpu) &&
+		  !rcu_batch_before(rcu_ctrlblk.completed,RCU_batch(cpu)))
+		return 1;
+
+	/* This cpu has no pending entries, but there are new entries */
+	if (!RCU_curlist(cpu) && RCU_nxtlist(cpu))
+		return 1;
+
+	/* The rcu core waits for a quiescent state from the cpu */
+	if (RCU_quiescbatch(cpu) != rcu_ctrlblk.cur || RCU_qs_pending(cpu))
 		return 1;
-	else
-		return 0;
+
+	/* nothing to do */
+	return 0;
 }
 
 #define rcu_read_lock()		preempt_disable()
@@ -126,10 +138,11 @@ static inline int rcu_pending(int cpu)
 
 extern void rcu_init(void);
 extern void rcu_check_callbacks(int cpu, int user);
+extern void rcu_restart_cpu(int cpu);
 
 /* Exported interfaces */
 extern void FASTCALL(call_rcu(struct rcu_head *head, 
-                          void (*func)(void *arg), void *arg));
+				void (*func)(struct rcu_head *head)));
 extern void synchronize_kernel(void);
 
 #endif /* __KERNEL__ */
diff --git a/include/linux/route.h b/include/linux/route.h
index e670dbac51ea..f7ed35d5e653 100644
--- a/include/linux/route.h
+++ b/include/linux/route.h
@@ -24,7 +24,7 @@
 #define _LINUX_ROUTE_H
 
 #include <linux/if.h>
-
+#include <linux/compiler.h>
 
 /* This structure gets passed by the SIOCADDRT and SIOCDELRT calls. */
 struct rtentry 
@@ -38,7 +38,7 @@ struct rtentry
 	unsigned long	rt_pad3;
 	void		*rt_pad4;
 	short		rt_metric;	/* +1 for binary compatibility!	*/
-	char		*rt_dev;	/* forcing the device at add	*/
+	char __user	*rt_dev;	/* forcing the device at add	*/
 	unsigned long	rt_mtu;		/* per route MTU/Window 	*/
 #ifndef __KERNEL__
 #define rt_mss	rt_mtu			/* Compatibility :-(            */
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index 4b3a0b5d44b6..366eae3b4fc3 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -44,6 +44,10 @@
 #define	RTM_DELTFILTER	(RTM_BASE+29)
 #define	RTM_GETTFILTER	(RTM_BASE+30)
 
+#define RTM_NEWACTION   (RTM_BASE+32)
+#define RTM_DELACTION   (RTM_BASE+33)
+#define RTM_GETACTION   (RTM_BASE+34)
+
 #define RTM_NEWPREFIX	(RTM_BASE+36)
 #define RTM_GETPREFIX	(RTM_BASE+38)
 
@@ -639,6 +643,7 @@ enum
 	TCA_STATS,
 	TCA_XSTATS,
 	TCA_RATE,
+	TCA_FCNT,
 	__TCA_MAX
 };
 
@@ -673,6 +678,18 @@ enum
 
 #define RTMGRP_IPV6_PREFIX	0x20000
 
+/* TC action piece */
+struct tcamsg
+{
+	unsigned char	tca_family;
+	unsigned char	tca__pad1;
+	unsigned short	tca__pad2;
+};
+#define TA_RTA(r)  ((struct rtattr*)(((char*)(r)) + NLMSG_ALIGN(sizeof(struct tcamsg))))
+#define TA_PAYLOAD(n) NLMSG_PAYLOAD(n,sizeof(struct tcamsg))
+#define TCA_ACT_TAB 1 /* attr type must be >=1 */	
+#define TCAA_MAX 1
+
 /* End of information exported to user level */
 
 #ifdef __KERNEL__
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index 77094da85d6b..1ab6c1780230 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -80,8 +80,11 @@
 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
 #define PORT_IP22ZILOG	56
 
+/* Sharp LH7a40x -- an ARM9 SoC series */
+#define PORT_LH7A40X	57
+
 /* PPC CPM type number */
-#define PORT_CPM        57
+#define PORT_CPM        58
 
 #ifdef __KERNEL__
 
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 1b33d607f276..3d0ba45fa88d 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -156,6 +156,7 @@ struct skb_shared_info {
  *	@sk: Socket we are owned by
  *	@stamp: Time we arrived
  *	@dev: Device we arrived on/are leaving by
+ *	@input_dev: Device we arrived on
  *      @real_dev: The real device we are using
  *	@h: Transport layer header
  *	@nh: Network layer header
@@ -198,6 +199,7 @@ struct sk_buff {
 	struct sock		*sk;
 	struct timeval		stamp;
 	struct net_device	*dev;
+	struct net_device	*input_dev;
 	struct net_device	*real_dev;
 
 	union {
@@ -263,9 +265,15 @@ struct sk_buff {
 	} private;
 #endif
 #ifdef CONFIG_NET_SCHED
-       __u32			tc_index;               /* traffic control index */
+       __u32			tc_index;        /* traffic control index */
+#ifdef CONFIG_NET_CLS_ACT
+	__u32           tc_verd;               /* traffic control verdict */
+	__u32           tc_classid;            /* traffic control classid */
+ #endif
+
 #endif
 
+
 	/* These elements must be at the end, see alloc_skb() for details.  */
 	unsigned int		truesize;
 	atomic_t		users;
@@ -664,13 +672,15 @@ static inline int skb_pagelen(const struct sk_buff *skb)
 	return len + skb_headlen(skb);
 }
 
-static inline void skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, int off, int size)
+static inline void skb_fill_page_desc(struct sk_buff *skb, int i,
+				      struct page *page, int off, int size)
 {
 	skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
-	frag->page = page;
-	frag->page_offset = off;
-	frag->size = size;
-	skb_shinfo(skb)->nr_frags = i+1;
+
+	frag->page		  = page;
+	frag->page_offset	  = off;
+	frag->size		  = size;
+	skb_shinfo(skb)->nr_frags = i + 1;
 }
 
 #define SKB_PAGE_ASSERT(skb) 	BUG_ON(skb_shinfo(skb)->nr_frags)
@@ -1109,6 +1119,14 @@ static inline void nf_conntrack_get(struct nf_ct_info *nfct)
 	if (nfct)
 		atomic_inc(&nfct->master->use);
 }
+static inline void nf_reset(struct sk_buff *skb)
+{
+	nf_conntrack_put(skb->nfct);
+	skb->nfct = NULL;
+#ifdef CONFIG_NETFILTER_DEBUG
+	skb->nf_debug = 0;
+#endif
+}
 
 #ifdef CONFIG_BRIDGE_NETFILTER
 static inline void nf_bridge_put(struct nf_bridge_info *nf_bridge)
@@ -1121,9 +1139,10 @@ static inline void nf_bridge_get(struct nf_bridge_info *nf_bridge)
 	if (nf_bridge)
 		atomic_inc(&nf_bridge->use);
 }
-#endif
-
-#endif
+#endif /* CONFIG_BRIDGE_NETFILTER */
+#else /* CONFIG_NETFILTER */
+static inline void nf_reset(struct sk_buff *skb) {}
+#endif /* CONFIG_NETFILTER */
 
 #endif	/* __KERNEL__ */
 #endif	/* _LINUX_SKBUFF_H */
diff --git a/include/linux/swap.h b/include/linux/swap.h
index a748538f3a31..b9edc335a563 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -156,7 +156,7 @@ extern void swapin_readahead(swp_entry_t, unsigned long, struct vm_area_struct *
 /* linux/mm/page_alloc.c */
 extern unsigned long totalram_pages;
 extern unsigned long totalhigh_pages;
-extern int nr_swap_pages;	/* XXX: shouldn't this be ulong? --hch */
+extern long nr_swap_pages;
 extern unsigned int nr_free_pages(void);
 extern unsigned int nr_free_pages_pgdat(pg_data_t *pgdat);
 extern unsigned int nr_free_buffer_pages(void);
@@ -206,7 +206,7 @@ extern struct page * read_swap_cache_async(swp_entry_t, struct vm_area_struct *v
 					   unsigned long addr);
 
 /* linux/mm/swapfile.c */
-extern int total_swap_pages;
+extern long total_swap_pages;
 extern unsigned int nr_swapfiles;
 extern struct swap_info_struct swap_info[];
 extern void si_swapinfo(struct sysinfo *);
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index f70f7fc14498..38acd5d4b691 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -164,6 +164,7 @@ enum
 	VM_LAPTOP_MODE=23,	/* vm laptop mode */
 	VM_BLOCK_DUMP=24,	/* block dump mode */
 	VM_HUGETLB_GROUP=25,	/* permitted hugetlb group */
+	VM_VFS_CACHE_PRESSURE=26, /* dcache/icache reclaim pressure */
 };
 
 
diff --git a/include/linux/tcp.h b/include/linux/tcp.h
index 39e2d22619dc..d95f58a553b0 100644
--- a/include/linux/tcp.h
+++ b/include/linux/tcp.h
@@ -262,8 +262,8 @@ struct tcp_opt {
 	__u32	frto_highmark;	/* snd_nxt when RTO occurred */
 
 	__u8	unused_pad;
-	__u8	queue_shrunk;	/* Write queue has been shrunk recently.*/
 	__u8	defer_accept;	/* User waits for some data after accept() */
+	/* one byte hole, try to pack */
 
 /* RTT measurement */
 	__u8	backoff;	/* backoff				*/
@@ -297,7 +297,6 @@ struct tcp_opt {
 	struct sk_buff_head	out_of_order_queue; /* Out of order segments go here */
 
 	struct tcp_func		*af_specific;	/* Operations which are AF_INET{4,6} specific	*/
-	struct sk_buff		*send_head;	/* Front of stuff to transmit			*/
 
  	__u32	rcv_wnd;	/* Current receiver window		*/
 	__u32	rcv_wup;	/* rcv_nxt on last window update sent	*/
@@ -371,8 +370,6 @@ struct tcp_opt {
 	struct open_request	*accept_queue;
 	struct open_request	*accept_queue_tail;
 
-	int			write_pending;	/* A write to socket waits to start. */
-
 	unsigned int		keepalive_time;	  /* time before keep alive takes place */
 	unsigned int		keepalive_intvl;  /* time interval between keep alive probes */
 	int			linger2;
diff --git a/include/linux/wait.h b/include/linux/wait.h
index 4a9f996bb6cc..e0f2b2ffc16f 100644
--- a/include/linux/wait.h
+++ b/include/linux/wait.h
@@ -120,18 +120,15 @@ extern void FASTCALL(__wake_up_sync(wait_queue_head_t *q, unsigned int mode, int
 
 #define __wait_event(wq, condition) 					\
 do {									\
-	wait_queue_t __wait;						\
-	init_waitqueue_entry(&__wait, current);				\
+	DEFINE_WAIT(__wait);						\
 									\
-	add_wait_queue(&wq, &__wait);					\
 	for (;;) {							\
-		set_current_state(TASK_UNINTERRUPTIBLE);		\
+		prepare_to_wait(&wq, &__wait, TASK_UNINTERRUPTIBLE);	\
 		if (condition)						\
 			break;						\
 		schedule();						\
 	}								\
-	current->state = TASK_RUNNING;					\
-	remove_wait_queue(&wq, &__wait);				\
+	finish_wait(&wq, &__wait);					\
 } while (0)
 
 #define wait_event(wq, condition) 					\
@@ -143,12 +140,10 @@ do {									\
 
 #define __wait_event_interruptible(wq, condition, ret)			\
 do {									\
-	wait_queue_t __wait;						\
-	init_waitqueue_entry(&__wait, current);				\
+	DEFINE_WAIT(__wait);						\
 									\
-	add_wait_queue(&wq, &__wait);					\
 	for (;;) {							\
-		set_current_state(TASK_INTERRUPTIBLE);			\
+		prepare_to_wait(&wq, &__wait, TASK_INTERRUPTIBLE);	\
 		if (condition)						\
 			break;						\
 		if (!signal_pending(current)) {				\
@@ -158,8 +153,7 @@ do {									\
 		ret = -ERESTARTSYS;					\
 		break;							\
 	}								\
-	current->state = TASK_RUNNING;					\
-	remove_wait_queue(&wq, &__wait);				\
+	finish_wait(&wq, &__wait);					\
 } while (0)
 
 #define wait_event_interruptible(wq, condition)				\
@@ -172,12 +166,10 @@ do {									\
 
 #define __wait_event_interruptible_timeout(wq, condition, ret)		\
 do {									\
-	wait_queue_t __wait;						\
-	init_waitqueue_entry(&__wait, current);				\
+	DEFINE_WAIT(__wait);						\
 									\
-	add_wait_queue(&wq, &__wait);					\
 	for (;;) {							\
-		set_current_state(TASK_INTERRUPTIBLE);			\
+		prepare_to_wait(&wq, &__wait, TASK_INTERRUPTIBLE);	\
 		if (condition)						\
 			break;						\
 		if (!signal_pending(current)) {				\
@@ -189,8 +181,7 @@ do {									\
 		ret = -ERESTARTSYS;					\
 		break;							\
 	}								\
-	current->state = TASK_RUNNING;					\
-	remove_wait_queue(&wq, &__wait);				\
+	finish_wait(&wq, &__wait);					\
 } while (0)
 
 #define wait_event_interruptible_timeout(wq, condition, timeout)	\
@@ -203,12 +194,11 @@ do {									\
 
 #define __wait_event_interruptible_exclusive(wq, condition, ret)	\
 do {									\
-	wait_queue_t __wait;						\
-	init_waitqueue_entry(&__wait, current);				\
+	DEFINE_WAIT(__wait);						\
 									\
-	add_wait_queue_exclusive(&wq, &__wait);				\
 	for (;;) {							\
-		set_current_state(TASK_INTERRUPTIBLE);			\
+		prepare_to_wait_exclusive(&wq, &__wait,			\
+					TASK_INTERRUPTIBLE);		\
 		if (condition)						\
 			break;						\
 		if (!signal_pending(current)) {				\
@@ -218,8 +208,7 @@ do {									\
 		ret = -ERESTARTSYS;					\
 		break;							\
 	}								\
-	current->state = TASK_RUNNING;					\
-	remove_wait_queue(&wq, &__wait);				\
+	finish_wait(&wq, &__wait);					\
 } while (0)
 
 #define wait_event_interruptible_exclusive(wq, condition)		\
diff --git a/include/net/dst.h b/include/net/dst.h
index ed2504c6b4e9..543ff945bb2f 100644
--- a/include/net/dst.h
+++ b/include/net/dst.h
@@ -183,6 +183,12 @@ static inline void dst_free(struct dst_entry * dst)
 	__dst_free(dst);
 }
 
+static inline void dst_rcu_free(struct rcu_head *head)
+{
+	struct dst_entry *dst = container_of(head, struct dst_entry, rcu_head);
+	dst_free(dst);
+}
+
 static inline void dst_confirm(struct dst_entry *dst)
 {
 	if (dst)
diff --git a/include/net/esp.h b/include/net/esp.h
index a513d14522ee..90cd94fad7d9 100644
--- a/include/net/esp.h
+++ b/include/net/esp.h
@@ -2,9 +2,14 @@
 #define _NET_ESP_H
 
 #include <net/xfrm.h>
+#include <asm/scatterlist.h>
+
+#define ESP_NUM_FAST_SG		4
 
 struct esp_data
 {
+	struct scatterlist		sgbuf[ESP_NUM_FAST_SG];
+
 	/* Confidentiality */
 	struct {
 		u8			*key;		/* Key */
diff --git a/include/net/pkt_act.h b/include/net/pkt_act.h
new file mode 100644
index 000000000000..9f37ac40f1a0
--- /dev/null
+++ b/include/net/pkt_act.h
@@ -0,0 +1,286 @@
+#ifndef __NET_PKT_ACT_H
+#define __NET_PKT_ACT_H
+
+#include <asm/uaccess.h>
+#include <asm/system.h>
+#include <asm/bitops.h>
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/socket.h>
+#include <linux/sockios.h>
+#include <linux/in.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/netdevice.h>
+#include <linux/skbuff.h>
+#include <linux/rtnetlink.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <net/sock.h>
+#include <net/pkt_sched.h>
+
+#define tca_st(val) (struct tcf_##val *)
+#define PRIV(a,name) ( tca_st(name) (a)->priv)
+
+#if 0 /* control */
+#define DPRINTK(format,args...) printk(KERN_DEBUG format,##args)
+#else
+#define DPRINTK(format,args...)
+#endif
+
+#if 0 /* data */
+#define D2PRINTK(format,args...) printk(KERN_DEBUG format,##args)
+#else
+#define D2PRINTK(format,args...)
+#endif
+
+static __inline__ unsigned
+tcf_hash(u32 index)
+{
+	return index & MY_TAB_MASK;
+}
+
+/* probably move this from being inline
+ * and put into act_generic
+*/
+static inline void
+tcf_hash_destroy(struct tcf_st *p)
+{
+	unsigned h = tcf_hash(p->index);
+	struct tcf_st **p1p;
+
+	for (p1p = &tcf_ht[h]; *p1p; p1p = &(*p1p)->next) {
+		if (*p1p == p) {
+			write_lock_bh(&tcf_t_lock);
+			*p1p = p->next;
+			write_unlock_bh(&tcf_t_lock);
+#ifdef CONFIG_NET_ESTIMATOR
+			qdisc_kill_estimator(&p->stats);
+#endif
+			kfree(p);
+			return;
+		}
+	}
+	BUG_TRAP(0);
+}
+
+static inline int
+tcf_hash_release(struct tcf_st *p, int bind )
+{
+	int ret = 0;
+	if (p) {
+		if (bind) {
+			p->bindcnt--;
+		}
+		p->refcnt--;
+	       	if(p->bindcnt <=0 && p->refcnt <= 0) {
+			tcf_hash_destroy(p);
+			ret = 1;
+		}
+	}
+	return ret;
+}
+
+static __inline__ int
+tcf_dump_walker(struct sk_buff *skb, struct netlink_callback *cb,
+		struct tc_action *a)
+{
+	struct tcf_st *p;
+	int err =0, index =  -1,i= 0, s_i = 0, n_i = 0;
+	struct rtattr *r ;
+
+	read_lock(&tcf_t_lock);
+
+	s_i = cb->args[0];
+
+	for (i = 0; i < MY_TAB_SIZE; i++) {
+		p = tcf_ht[tcf_hash(i)];
+
+		for (; p; p = p->next) {
+			index++;
+			if (index < s_i)
+				continue;
+			a->priv = p;
+			a->order = n_i;
+			r = (struct rtattr*) skb->tail;
+			RTA_PUT(skb, a->order, 0, NULL);
+			err = tcf_action_dump_1(skb, a, 0, 0);
+			if (0 > err) {
+				index--;
+				skb_trim(skb, (u8*)r - skb->data);
+				goto done;
+			}
+			r->rta_len = skb->tail - (u8*)r;
+			n_i++;
+			if (n_i >= TCA_ACT_MAX_PRIO) {
+				goto done;
+			}
+		}
+	}
+done:
+	read_unlock(&tcf_t_lock);
+	if (n_i)
+		cb->args[0] += n_i;
+	return n_i;
+
+rtattr_failure:
+	skb_trim(skb, (u8*)r - skb->data);
+	goto done;
+}
+
+static __inline__ int
+tcf_del_walker(struct sk_buff *skb, struct tc_action *a)
+{
+	struct tcf_st *p, *s_p;
+	struct rtattr *r ;
+	int i= 0, n_i = 0;
+
+	r = (struct rtattr*) skb->tail;
+	RTA_PUT(skb, a->order, 0, NULL);
+	RTA_PUT(skb, TCA_KIND, IFNAMSIZ, a->ops->kind);
+	for (i = 0; i < MY_TAB_SIZE; i++) {
+		p = tcf_ht[tcf_hash(i)];
+
+		while (p != NULL) {
+			s_p = p->next;
+			if (ACT_P_DELETED == tcf_hash_release(p, 0)) {
+				 module_put(a->ops->owner);
+			}
+			n_i++;
+			p = s_p;
+		}
+	}
+	RTA_PUT(skb, TCA_FCNT, 4, &n_i);
+	r->rta_len = skb->tail - (u8*)r;
+
+	return n_i;
+rtattr_failure:
+	skb_trim(skb, (u8*)r - skb->data);
+	return -EINVAL;
+}
+
+static __inline__ int
+tcf_generic_walker(struct sk_buff *skb, struct netlink_callback *cb, int type,
+		struct tc_action *a)
+{
+		if (type == RTM_DELACTION) {
+			return tcf_del_walker(skb,a);
+		} else if (type == RTM_GETACTION) {
+			return tcf_dump_walker(skb,cb,a);
+		} else {
+			printk("tcf_generic_walker: unknown action %d\n",type);
+			return -EINVAL;
+		}
+}
+
+static __inline__ struct tcf_st *
+tcf_hash_lookup(u32 index)
+{
+	struct tcf_st *p;
+
+	read_lock(&tcf_t_lock);
+	for (p = tcf_ht[tcf_hash(index)]; p; p = p->next) {
+		if (p->index == index)
+			break;
+	}
+	read_unlock(&tcf_t_lock);
+	return p;
+}
+
+static __inline__ u32
+tcf_hash_new_index(void)
+{
+	do {
+		if (++idx_gen == 0)
+			idx_gen = 1;
+	} while (tcf_hash_lookup(idx_gen));
+
+	return idx_gen;
+}
+
+
+static inline int
+tcf_hash_search(struct tc_action *a, u32 index)
+{
+	struct tcf_st *p = tcf_hash_lookup(index);
+
+	if (p != NULL) {
+		a->priv = p;
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+#ifdef CONFIG_NET_ACT_INIT
+static inline struct tcf_st *
+tcf_hash_check(struct tc_st *parm, struct tc_action *a, int ovr, int bind)
+{
+	struct tcf_st *p = NULL;
+	if (parm->index && (p = tcf_hash_lookup(parm->index)) != NULL) {
+		spin_lock(&p->lock);
+		if (bind) {
+			p->bindcnt++;
+			p->refcnt++;
+		}
+		spin_unlock(&p->lock);
+		a->priv = (void *) p;
+	}
+	return p;
+}
+
+static inline struct tcf_st *
+tcf_hash_create(struct tc_st *parm, struct rtattr *est, struct tc_action *a, int size, int ovr, int bind)
+{
+	unsigned h;
+	struct tcf_st *p = NULL;
+
+	p = kmalloc(size, GFP_KERNEL);
+	if (p == NULL)
+		return p;
+
+	memset(p, 0, size);
+	p->refcnt = 1;
+
+	if (bind) {
+		p->bindcnt = 1;
+	}
+
+	spin_lock_init(&p->lock);
+	p->stats.lock = &p->lock;
+	p->index = parm->index ? : tcf_hash_new_index();
+	p->tm.install = jiffies;
+	p->tm.lastuse = jiffies;
+#ifdef CONFIG_NET_ESTIMATOR
+	if (est) {
+		qdisc_new_estimator(&p->stats, est);
+	}
+#endif
+	h = tcf_hash(p->index);
+	write_lock_bh(&tcf_t_lock);
+	p->next = tcf_ht[h];
+	tcf_ht[h] = p;
+	write_unlock_bh(&tcf_t_lock);
+
+	a->priv = (void *) p;
+	return p;
+}
+
+static inline struct tcf_st *
+tcf_hash_init(struct tc_st *parm, struct rtattr *est, struct tc_action *a, int size, int ovr, int bind)
+{
+	struct tcf_st *p;
+	p = tcf_hash_check (parm,a,ovr,bind);
+	if (NULL == p) {
+		return tcf_hash_create(parm, est, a, size, ovr, bind);
+	}
+}
+
+#endif
+
+#endif
diff --git a/include/net/pkt_cls.h b/include/net/pkt_cls.h
index ca07367721df..4de3ea73ca5d 100644
--- a/include/net/pkt_cls.h
+++ b/include/net/pkt_cls.h
@@ -71,12 +71,38 @@ static inline int tc_classify(struct sk_buff *skb, struct tcf_proto *tp, struct
 {
 	int err = 0;
 	u32 protocol = skb->protocol;
+#ifdef CONFIG_NET_CLS_ACT
+	struct tcf_proto *otp = tp;
+reclassify:
+#endif
+	protocol = skb->protocol;
 
 	for ( ; tp; tp = tp->next) {
 		if ((tp->protocol == protocol ||
-		     tp->protocol == __constant_htons(ETH_P_ALL)) &&
-		    (err = tp->classify(skb, tp, res)) >= 0)
+			tp->protocol == __constant_htons(ETH_P_ALL)) &&
+			(err = tp->classify(skb, tp, res)) >= 0) {
+#ifdef CONFIG_NET_CLS_ACT
+			if ( TC_ACT_RECLASSIFY == err) {
+				__u32 verd = (__u32) G_TC_VERD(skb->tc_verd);
+				tp = otp;
+
+				if (MAX_REC_LOOP < verd++) {
+					printk("rule prio %d protocol %02x reclassify is buggy packet dropped\n",tp->prio&0xffff, ntohs(tp->protocol));
+					return TC_ACT_SHOT;
+				}
+				skb->tc_verd = SET_TC_VERD(skb->tc_verd,verd);
+				goto reclassify;
+			} else {
+				if (skb->tc_verd) 
+					skb->tc_verd = SET_TC_VERD(skb->tc_verd,0);
+				return err;
+			}
+#else
+
 			return err;
+#endif
+            }
+
 	}
 	return -1;
 }
@@ -90,6 +116,8 @@ static inline void tcf_destroy(struct tcf_proto *tp)
 
 extern int register_tcf_proto_ops(struct tcf_proto_ops *ops);
 extern int unregister_tcf_proto_ops(struct tcf_proto_ops *ops);
+extern int ing_filter(struct sk_buff *skb);
+
 
 
 
diff --git a/include/net/pkt_sched.h b/include/net/pkt_sched.h
index d8960a01df42..221f1dac7853 100644
--- a/include/net/pkt_sched.h
+++ b/include/net/pkt_sched.h
@@ -13,11 +13,14 @@
 #include <linux/pkt_sched.h>
 #include <linux/rcupdate.h>
 #include <net/pkt_cls.h>
+#include <linux/module.h>
+#include <linux/rtnetlink.h>
 
 #ifdef CONFIG_X86_TSC
 #include <asm/msr.h>
 #endif
 
+
 struct rtattr;
 struct Qdisc;
 
@@ -392,14 +395,15 @@ struct tcf_police
 {
 	struct tcf_police *next;
 	int		refcnt;
+#ifdef CONFIG_NET_CLS_ACT
+	int		bindcnt;
+#endif
 	u32		index;
-
 	int		action;
 	int		result;
 	u32		ewma_rate;
 	u32		burst;
 	u32		mtu;
-
 	u32		toks;
 	u32		ptoks;
 	psched_time_t	t_c;
@@ -410,16 +414,89 @@ struct tcf_police
 	struct tc_stats	stats;
 };
 
+#ifdef CONFIG_NET_CLS_ACT
+
+#define ACT_P_CREATED 1
+#define ACT_P_DELETED 1
+#define tca_gen(name) \
+struct tcf_##name *next; \
+	u32 index; \
+	int refcnt; \
+	int bindcnt; \
+	u32 capab; \
+	int action; \
+	struct tcf_t tm; \
+	struct tc_stats stats; \
+	spinlock_t lock
+
+
+struct tc_action
+{
+	void *priv;
+	struct tc_action_ops *ops;
+	__u32   type;   /* for backward compat(TCA_OLD_COMPAT) */
+	__u32   order; 
+	struct tc_action *next;
+};
+
+#define TCA_CAP_NONE 0
+struct tc_action_ops
+{
+	struct tc_action_ops *next;
+	char    kind[IFNAMSIZ];
+	__u32   type; /* TBD to match kind */
+	__u32 	capab;  /* capabilities includes 4 bit version */
+	struct module		*owner;
+	int     (*act)(struct sk_buff **, struct tc_action *);
+	int     (*get_stats)(struct sk_buff *, struct tc_action *);
+	int     (*dump)(struct sk_buff *, struct tc_action *,int , int);
+	int     (*cleanup)(struct tc_action *, int bind);
+	int     (*lookup)(struct tc_action *, u32 );
+	int     (*init)(struct rtattr *,struct rtattr *,struct tc_action *, int , int );
+	int     (*walk)(struct sk_buff *, struct netlink_callback *, int , struct tc_action *);
+};
+
+extern int tcf_register_action(struct tc_action_ops *a);
+extern int tcf_unregister_action(struct tc_action_ops *a);
+extern void tcf_action_destroy(struct tc_action *a, int bind);
+extern int tcf_action_exec(struct sk_buff *skb, struct tc_action *a);
+extern int tcf_action_init(struct rtattr *rta, struct rtattr *est, struct tc_action *a,char *n, int ovr, int bind);
+extern int tcf_action_init_1(struct rtattr *rta, struct rtattr *est, struct tc_action *a,char *n, int ovr, int bind);
+extern int tcf_action_dump(struct sk_buff *skb, struct tc_action *a, int, int);
+extern int tcf_action_dump_old(struct sk_buff *skb, struct tc_action *a, int, int);
+extern int tcf_action_dump_1(struct sk_buff *skb, struct tc_action *a, int, int);
+extern int tcf_action_copy_stats (struct sk_buff *,struct tc_action *);
+extern int tcf_act_police_locate(struct rtattr *rta, struct rtattr *est,struct tc_action *,int , int );
+extern int tcf_act_police_dump(struct sk_buff *, struct tc_action *, int, int);
+extern int tcf_act_police(struct sk_buff **skb, struct tc_action *a);
+#endif
+
+extern int tcf_police(struct sk_buff *skb, struct tcf_police *p);
 extern int qdisc_copy_stats(struct sk_buff *skb, struct tc_stats *st);
 extern void tcf_police_destroy(struct tcf_police *p);
 extern struct tcf_police * tcf_police_locate(struct rtattr *rta, struct rtattr *est);
 extern int tcf_police_dump(struct sk_buff *skb, struct tcf_police *p);
-extern int tcf_police(struct sk_buff *skb, struct tcf_police *p);
 
-static inline void tcf_police_release(struct tcf_police *p)
+static inline int tcf_police_release(struct tcf_police *p, int bind)
 {
+	int ret = 0;
+#ifdef CONFIG_NET_CLS_ACT
+	if (p) {
+		if (bind) {
+			 p->bindcnt--;
+		}
+		p->refcnt--;
+		if (p->refcnt <= 0 && !p->bindcnt) {
+			tcf_police_destroy(p);
+			ret = 1;
+		}
+	}
+#else
 	if (p && --p->refcnt == 0)
 		tcf_police_destroy(p);
+
+#endif
+	return ret;
 }
 
 extern struct Qdisc noop_qdisc;
diff --git a/include/net/protocol.h b/include/net/protocol.h
index f67327486a9c..357691f6a45f 100644
--- a/include/net/protocol.h
+++ b/include/net/protocol.h
@@ -34,8 +34,7 @@
 
 
 /* This is used to register protocols. */
-struct inet_protocol 
-{
+struct net_protocol {
 	int			(*handler)(struct sk_buff *skb);
 	void			(*err_handler)(struct sk_buff *skb, u32 info);
 	int			no_policy;
@@ -78,15 +77,15 @@ struct inet_protosw {
 #define INET_PROTOSW_REUSE 0x01	     /* Are ports automatically reusable? */
 #define INET_PROTOSW_PERMANENT 0x02  /* Permanent protocols are unremovable. */
 
-extern struct inet_protocol *inet_protocol_base;
-extern struct inet_protocol *inet_protos[MAX_INET_PROTOS];
+extern struct net_protocol *inet_protocol_base;
+extern struct net_protocol *inet_protos[MAX_INET_PROTOS];
 
 #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE)
 extern struct inet6_protocol *inet6_protos[MAX_INET_PROTOS];
 #endif
 
-extern int	inet_add_protocol(struct inet_protocol *prot, unsigned char num);
-extern int	inet_del_protocol(struct inet_protocol *prot, unsigned char num);
+extern int	inet_add_protocol(struct net_protocol *prot, unsigned char num);
+extern int	inet_del_protocol(struct net_protocol *prot, unsigned char num);
 extern void	inet_register_protosw(struct inet_protosw *p);
 extern void	inet_unregister_protosw(struct inet_protosw *p);
 
diff --git a/include/net/route.h b/include/net/route.h
index 0e7210e6d194..a5e9c575ea3e 100644
--- a/include/net/route.h
+++ b/include/net/route.h
@@ -129,7 +129,7 @@ extern void		ip_rt_send_redirect(struct sk_buff *skb);
 
 extern unsigned		inet_addr_type(u32 addr);
 extern void		ip_rt_multicast_event(struct in_device *);
-extern int		ip_rt_ioctl(unsigned int cmd, void *arg);
+extern int		ip_rt_ioctl(unsigned int cmd, void __user *arg);
 extern void		ip_rt_get_source(u8 *src, struct rtable *rt);
 extern int		ip_rt_dump(struct sk_buff *skb,  struct netlink_callback *cb);
 
diff --git a/include/net/sock.h b/include/net/sock.h
index 0ee6ccddca40..9da91b9be903 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -167,6 +167,11 @@ struct sock_common {
   *	@sk_socket - Identd and reporting IO signals
   *	@sk_user_data - RPC layer private data
   *	@sk_owner - module that owns this socket
+  *	@sk_sndmsg_page - cached page for sendmsg
+  *	@sk_sndmsg_off - cached offset for sendmsg
+  *	@sk_send_head - front of stuff to transmit
+  *	@sk_write_pending - a write to stream socket waits to start
+  *	@sk_queue_shrunk - write queue has been shrunk recently
   *	@sk_state_change - callback to indicate change in the state of the sock
   *	@sk_data_ready - callback to indicate there is data to be processed
   *	@sk_write_space - callback to indicate there is bf sending space available
@@ -247,7 +252,13 @@ struct sock {
 	struct socket		*sk_socket;
 	void			*sk_user_data;
 	struct module		*sk_owner;
+	struct page		*sk_sndmsg_page;
+	__u32			sk_sndmsg_off;
+	struct sk_buff		*sk_send_head;
+	int			sk_write_pending;
 	void			*sk_security;
+	__u8			sk_queue_shrunk;
+	/* three bytes hole, try to pack */
 	void			(*sk_state_change)(struct sock *sk);
 	void			(*sk_data_ready)(struct sock *sk, int bytes);
 	void			(*sk_write_space)(struct sock *sk);
@@ -434,6 +445,24 @@ static inline int sk_stream_memory_free(struct sock *sk)
 	return sk->sk_wmem_queued < sk->sk_sndbuf;
 }
 
+extern void sk_stream_rfree(struct sk_buff *skb);
+
+static inline void sk_stream_set_owner_r(struct sk_buff *skb, struct sock *sk)
+{
+	skb->sk = sk;
+	skb->destructor = sk_stream_rfree;
+	atomic_add(skb->truesize, &sk->sk_rmem_alloc);
+	sk->sk_forward_alloc -= skb->truesize;
+}
+
+static inline void sk_stream_free_skb(struct sock *sk, struct sk_buff *skb)
+{
+	sk->sk_queue_shrunk   = 1;
+	sk->sk_wmem_queued   -= skb->truesize;
+	sk->sk_forward_alloc += skb->truesize;
+	__kfree_skb(skb);
+}
+
 /* The per-socket spinlock must be held here. */
 #define sk_add_backlog(__sk, __skb)				\
 do {	if (!(__sk)->sk_backlog.tail) {				\
@@ -458,9 +487,15 @@ do {	if (!(__sk)->sk_backlog.tail) {				\
 	rc;							\
 })
 
+extern int sk_stream_wait_connect(struct sock *sk, long *timeo_p);
+extern int sk_stream_wait_memory(struct sock *sk, long *timeo_p);
+extern void sk_stream_wait_close(struct sock *sk, long timeo_p);
+extern int sk_stream_error(struct sock *sk, int flags, int err);
+extern void sk_stream_kill_queues(struct sock *sk);
+
 extern int sk_wait_data(struct sock *sk, long *timeo);
 
-/* IP protocol blocks we attach to sockets.
+/* Networking protocol blocks we attach to sockets.
  * socket layer -> transport layer interface
  * transport -> network interface is defined by struct inet_proto
  */
@@ -504,6 +539,22 @@ struct proto {
 	void			(*unhash)(struct sock *sk);
 	int			(*get_port)(struct sock *sk, unsigned short snum);
 
+	/* Memory pressure */
+	void			(*enter_memory_pressure)(void);
+	atomic_t		*memory_allocated;	/* Current allocated memory. */
+	atomic_t		*sockets_allocated;	/* Current number of sockets. */
+	/*
+	 * Pressure flag: try to collapse.
+	 * Technical note: it is used by multiple contexts non atomically.
+	 * All the sk_stream_mem_schedule() is of this nature: accounting
+	 * is strict, actions are advisory and have some latency.
+	 */
+	int			*memory_pressure;
+	int			*sysctl_mem;
+	int			*sysctl_wmem;
+	int			*sysctl_rmem;
+	int			max_header;
+
 	char			name[32];
 
 	struct {
@@ -594,6 +645,37 @@ static inline struct inode *SOCK_INODE(struct socket *socket)
 	return &container_of(socket, struct socket_alloc, socket)->vfs_inode;
 }
 
+extern void __sk_stream_mem_reclaim(struct sock *sk);
+extern int sk_stream_mem_schedule(struct sock *sk, int size, int kind);
+
+#define SK_STREAM_MEM_QUANTUM ((int)PAGE_SIZE)
+
+static inline int sk_stream_pages(int amt)
+{
+	return (amt + SK_STREAM_MEM_QUANTUM - 1) / SK_STREAM_MEM_QUANTUM;
+}
+
+static inline void sk_stream_mem_reclaim(struct sock *sk)
+{
+	if (sk->sk_forward_alloc >= SK_STREAM_MEM_QUANTUM)
+		__sk_stream_mem_reclaim(sk);
+}
+
+static inline void sk_stream_writequeue_purge(struct sock *sk)
+{
+	struct sk_buff *skb;
+
+	while ((skb = __skb_dequeue(&sk->sk_write_queue)) != NULL)
+		sk_stream_free_skb(sk, skb);
+	sk_stream_mem_reclaim(sk);
+}
+
+static inline int sk_stream_rmem_schedule(struct sock *sk, struct sk_buff *skb)
+{
+	return (int)skb->truesize <= sk->sk_forward_alloc ||
+		sk_stream_mem_schedule(sk, skb->truesize, 1);
+}
+
 /* Used by processes to "lock" a socket state, so that
  * interrupts and bottom half handlers won't change it
  * from under us. It essentially blocks any incoming
@@ -1067,6 +1149,60 @@ static inline void sk_wake_async(struct sock *sk, int how, int band)
 #define SOCK_MIN_SNDBUF 2048
 #define SOCK_MIN_RCVBUF 256
 
+static inline void sk_stream_moderate_sndbuf(struct sock *sk)
+{
+	if (!(sk->sk_userlocks & SOCK_SNDBUF_LOCK)) {
+		sk->sk_sndbuf = min(sk->sk_sndbuf, sk->sk_wmem_queued / 2);
+		sk->sk_sndbuf = max(sk->sk_sndbuf, SOCK_MIN_SNDBUF);
+	}
+}
+
+static inline struct sk_buff *sk_stream_alloc_pskb(struct sock *sk,
+						   int size, int mem, int gfp)
+{
+	struct sk_buff *skb = alloc_skb(size + sk->sk_prot->max_header, gfp);
+
+	if (skb) {
+		skb->truesize += mem;
+		if (sk->sk_forward_alloc >= (int)skb->truesize ||
+		    sk_stream_mem_schedule(sk, skb->truesize, 0)) {
+			skb_reserve(skb, sk->sk_prot->max_header);
+			return skb;
+		}
+		__kfree_skb(skb);
+	} else {
+		sk->sk_prot->enter_memory_pressure();
+		sk_stream_moderate_sndbuf(sk);
+	}
+	return NULL;
+}
+
+static inline struct sk_buff *sk_stream_alloc_skb(struct sock *sk,
+						  int size, int gfp)
+{
+	return sk_stream_alloc_pskb(sk, size, 0, gfp);
+}
+
+static inline struct page *sk_stream_alloc_page(struct sock *sk)
+{
+	struct page *page = NULL;
+
+	if (sk->sk_forward_alloc >= (int)PAGE_SIZE ||
+	    sk_stream_mem_schedule(sk, PAGE_SIZE, 0))
+		page = alloc_pages(sk->sk_allocation, 0);
+	else {
+		sk->sk_prot->enter_memory_pressure();
+		sk_stream_moderate_sndbuf(sk);
+	}
+	return page;
+}
+
+#define sk_stream_for_retrans_queue(skb, sk)				\
+		for (skb = (sk)->sk_write_queue.next;			\
+		     (skb != (sk)->sk_send_head) &&			\
+		     (skb != (struct sk_buff *)&(sk)->sk_write_queue);	\
+		     skb = skb->next)
+
 /*
  *	Default write policy as shown to user space via poll/select/SIGIO
  */
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 3a323cd1e79f..3f4c524de3e2 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -1186,13 +1186,6 @@ struct tcp_skb_cb {
 
 #define TCP_SKB_CB(__skb)	((struct tcp_skb_cb *)&((__skb)->cb[0]))
 
-#define for_retrans_queue(skb, sk, tp) \
-		for (skb = (sk)->sk_write_queue.next;			\
-		     (skb != (tp)->send_head) &&			\
-		     (skb != (struct sk_buff *)&(sk)->sk_write_queue);	\
-		     skb=skb->next)
-
-
 #include <net/tcp_ecn.h>
 
 /* This determines how many packets are "in the network" to the best
@@ -1400,7 +1393,7 @@ tcp_nagle_check(struct tcp_opt *tp, struct sk_buff *skb, unsigned mss_now, int n
 		  tcp_minshall_check(tp))));
 }
 
-/* This checks if the data bearing packet SKB (usually tp->send_head)
+/* This checks if the data bearing packet SKB (usually sk->sk_send_head)
  * should be put on the wire right now.
  */
 static __inline__ int tcp_snd_test(struct tcp_opt *tp, struct sk_buff *skb,
@@ -1457,7 +1450,7 @@ static __inline__ void __tcp_push_pending_frames(struct sock *sk,
 						 unsigned cur_mss,
 						 int nonagle)
 {
-	struct sk_buff *skb = tp->send_head;
+	struct sk_buff *skb = sk->sk_send_head;
 
 	if (skb) {
 		if (!tcp_skb_is_last(sk, skb))
@@ -1477,7 +1470,7 @@ static __inline__ void tcp_push_pending_frames(struct sock *sk,
 
 static __inline__ int tcp_may_send_now(struct sock *sk, struct tcp_opt *tp)
 {
-	struct sk_buff *skb = tp->send_head;
+	struct sk_buff *skb = sk->sk_send_head;
 
 	return (skb &&
 		tcp_snd_test(tp, skb, tcp_current_mss(sk, 1),
@@ -1874,96 +1867,7 @@ static __inline__ void tcp_openreq_init(struct open_request *req,
 	req->rmt_port = skb->h.th->source;
 }
 
-#define TCP_MEM_QUANTUM	((int)PAGE_SIZE)
-
-static inline void tcp_free_skb(struct sock *sk, struct sk_buff *skb)
-{
-	tcp_sk(sk)->queue_shrunk = 1;
-	sk->sk_wmem_queued -= skb->truesize;
-	sk->sk_forward_alloc += skb->truesize;
-	__kfree_skb(skb);
-}
-
-extern void __tcp_mem_reclaim(struct sock *sk);
-extern int tcp_mem_schedule(struct sock *sk, int size, int kind);
-
-static inline void tcp_mem_reclaim(struct sock *sk)
-{
-	if (sk->sk_forward_alloc >= TCP_MEM_QUANTUM)
-		__tcp_mem_reclaim(sk);
-}
-
-static inline void tcp_enter_memory_pressure(void)
-{
-	if (!tcp_memory_pressure) {
-		NET_INC_STATS(TCPMemoryPressures);
-		tcp_memory_pressure = 1;
-	}
-}
-
-static inline void tcp_moderate_sndbuf(struct sock *sk)
-{
-	if (!(sk->sk_userlocks & SOCK_SNDBUF_LOCK)) {
-		sk->sk_sndbuf = min(sk->sk_sndbuf, sk->sk_wmem_queued / 2);
-		sk->sk_sndbuf = max(sk->sk_sndbuf, SOCK_MIN_SNDBUF);
-	}
-}
-
-static inline struct sk_buff *tcp_alloc_pskb(struct sock *sk, int size, int mem, int gfp)
-{
-	struct sk_buff *skb = alloc_skb(size+MAX_TCP_HEADER, gfp);
-
-	if (skb) {
-		skb->truesize += mem;
-		if (sk->sk_forward_alloc >= (int)skb->truesize ||
-		    tcp_mem_schedule(sk, skb->truesize, 0)) {
-			skb_reserve(skb, MAX_TCP_HEADER);
-			return skb;
-		}
-		__kfree_skb(skb);
-	} else {
-		tcp_enter_memory_pressure();
-		tcp_moderate_sndbuf(sk);
-	}
-	return NULL;
-}
-
-static inline struct sk_buff *tcp_alloc_skb(struct sock *sk, int size, int gfp)
-{
-	return tcp_alloc_pskb(sk, size, 0, gfp);
-}
-
-static inline struct page * tcp_alloc_page(struct sock *sk)
-{
-	if (sk->sk_forward_alloc >= (int)PAGE_SIZE ||
-	    tcp_mem_schedule(sk, PAGE_SIZE, 0)) {
-		struct page *page = alloc_pages(sk->sk_allocation, 0);
-		if (page)
-			return page;
-	}
-	tcp_enter_memory_pressure();
-	tcp_moderate_sndbuf(sk);
-	return NULL;
-}
-
-static inline void tcp_writequeue_purge(struct sock *sk)
-{
-	struct sk_buff *skb;
-
-	while ((skb = __skb_dequeue(&sk->sk_write_queue)) != NULL)
-		tcp_free_skb(sk, skb);
-	tcp_mem_reclaim(sk);
-}
-
-extern void tcp_rfree(struct sk_buff *skb);
-
-static inline void tcp_set_owner_r(struct sk_buff *skb, struct sock *sk)
-{
-	skb->sk = sk;
-	skb->destructor = tcp_rfree;
-	atomic_add(skb->truesize, &sk->sk_rmem_alloc);
-	sk->sk_forward_alloc -= skb->truesize;
-}
+extern void tcp_enter_memory_pressure(void);
 
 extern void tcp_listen_wlock(void);
 
@@ -2049,8 +1953,8 @@ static inline int tcp_use_frto(const struct sock *sk)
 	 * unsent new data, and the advertised window should allow
 	 * sending it.
 	 */
-	return (sysctl_tcp_frto && tp->send_head &&
-		!after(TCP_SKB_CB(tp->send_head)->end_seq,
+	return (sysctl_tcp_frto && sk->sk_send_head &&
+		!after(TCP_SKB_CB(sk->sk_send_head)->end_seq,
 		       tp->snd_una + tp->snd_wnd));
 }
 
diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h
index c45bed63166c..4df622f6da47 100644
--- a/include/pcmcia/ss.h
+++ b/include/pcmcia/ss.h
@@ -105,6 +105,7 @@ typedef struct pccard_mem_map {
     u_short	speed;
     u_long	sys_start, sys_stop;
     u_int	card_start;
+    struct resource *res;
 } pccard_mem_map;
 
 typedef struct cb_bridge_map {
@@ -154,8 +155,6 @@ typedef struct window_t {
 	u_short			index;
 	client_handle_t		handle;
 	struct pcmcia_socket 	*sock;
-	u_long			base;
-	u_long			size;
 	pccard_mem_map		ctl;
 } window_t;
 
diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h
index abba7b4194b7..21af949cfa58 100644
--- a/include/scsi/scsi_host.h
+++ b/include/scsi/scsi_host.h
@@ -64,7 +64,7 @@ struct scsi_host_template {
 	 *
 	 * Status: OPTIONAL
 	 */
-	int (* ioctl)(struct scsi_device *dev, int cmd, void *arg);
+	int (* ioctl)(struct scsi_device *dev, int cmd, void __user *arg);
 	
 	/*
 	 * The queuecommand function is used to queue up a scsi