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authorRomain Naour <romain.naour@gmail.com>2021-04-20 22:12:10 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-05-07 10:49:25 +0200
commit502adca1f04b4edee1c40d5c2e26867d35b33f5f (patch)
tree6c1a2d0e8000ee9ea47ca51f801c158d6bb9862d /kernel/bpf
parent36442e983ec04b7c13ef081e285c319a2a3fc832 (diff)
mips: Do not include hi and lo in clobber list for R6
commit 1d7ba0165d8206ac073f7ac3b14fc0836b66eae7 upstream >From [1] "GCC 10 (PR 91233) won't silently allow registers that are not architecturally available to be present in the clobber list anymore, resulting in build failure for mips*r6 targets in form of: ... .../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target 146 | __asm__ volatile ( \ | ^~~~~~~ This is because base R6 ISA doesn't define hi and lo registers w/o DSP extension. This patch provides the alternative clobber list for r6 targets that won't include those registers." Since kernel 5.4 and mips support for generic vDSO [2], the kernel fail to build for mips r6 cpus with gcc 10 for the same reason as glibc. [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=020b2a97bb15f807c0482f0faee2184ed05bcad8 [2] '24640f233b46 ("mips: Add support for generic vDSO")' Signed-off-by: Romain Naour <romain.naour@gmail.com> Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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