diff options
| author | Thor Thayer <tthayer@opensource.altera.com> | 2016-06-16 11:10:19 -0500 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2016-08-22 22:38:17 +0100 |
| commit | 2283ea0ed9d4be2b08e539c704ca35ba1dca6886 (patch) | |
| tree | 6287eede2c1eece3ebb27d01d6656b26efe3f829 /kernel/trace | |
| parent | f3ce5ab4904628fbe9d659b43db4bb6b609bb887 (diff) | |
can: c_can: Update D_CAN TX and RX functions to 32 bit - fix Altera Cyclone access
commit 427460c83cdf55069eee49799a0caef7dde8df69 upstream.
When testing CAN write floods on Altera's CycloneV, the first 2 bytes
are sometimes 0x00, 0x00 or corrupted instead of the values sent. Also
observed bytes 4 & 5 were corrupted in some cases.
The D_CAN Data registers are 32 bits and changing from 16 bit writes to
32 bit writes fixes the problem.
Testing performed on Altera CycloneV (D_CAN). Requesting tests on other
C_CAN & D_CAN platforms.
Reported-by: Richard Andrysek <richard.andrysek@gomtec.de>
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'kernel/trace')
0 files changed, 0 insertions, 0 deletions