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authorVenkata Ramana Nayana <venkata.ramana.nayana@intel.com>2025-11-07 14:01:41 +0530
committerLucas De Marchi <lucas.demarchi@intel.com>2025-11-18 10:05:03 -0800
commit5b38c22687d9287d85dd3bef2fa708bf62cf3895 (patch)
treec8a7484b4fcb8504bcf37937bd882119c2ca3295 /net/unix/af_unix.c
parent27c0a54e48c658eb12fa3bcbb2892a3fa17b72af (diff)
drm/xe/irq: Handle msix vector0 interrupt
Current gu2host handler registered as MSI-X vector 0 and as per bspec for a msix vector 0 interrupt, the driver must check the legacy registers 190008(TILE_INT_REG), 190060h (GT INTR Identity Reg 0) and other registers mentioned in "Interrupt Service Routine Pseudocode" otherwise it will block the next interrupts. To overcome this issue replacing guc2host handler with legacy xe_irq_handler. Fixes: da889070be7b2 ("drm/xe/irq: Separate MSI and MSI-X flows") Bspec: 62357 Signed-off-by: Venkata Ramana Nayana <venkata.ramana.nayana@intel.com> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com> Link: https://patch.msgid.link/20251107083141.2080189-1-venkata.ramana.nayana@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> (cherry picked from commit c34a14bce7090862ebe5a64abe8d85df75e62737) Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Diffstat (limited to 'net/unix/af_unix.c')
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