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author | Mark Brown <broonie@kernel.org> | 2025-09-19 15:11:53 +0100 |
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committer | Mark Brown <broonie@kernel.org> | 2025-09-19 15:11:53 +0100 |
commit | faef0c6ccef8a6d7709227654032427ba0bb3911 (patch) | |
tree | 5833aac9606b6e9f86132e00bd5eb5fd2af80278 /rust/helpers/helpers.c | |
parent | a24802b0a2a238eaa610b0b0e87a4500a35de64a (diff) | |
parent | 0f67557763accbdd56681f17ed5350735198c57b (diff) |
spi: spi-nxp-fspi: add DTR mode support
Merge series from Haibo Chen <haibo.chen@nxp.com>:
this patch set add DTR mode support for flexspi.
For DTR mode, flexspi only support 8D-8D-8D mode.
Patch 1~2 extract nxp_fspi_dll_override(), prepare for adding the DTR mode.
in nor suspend, it will disable DTR mode, and enable DTR mode back
in nor resume. this require the flexspi driver has the ability to
set back to dll override mode in STR mode when clock rate < 100MHz.
Patch 3 Add the DDR LUT command support. flexspi use LUT command to handle
the dtr/str mode.
Patch 4 add the logic of sample clock source selection for STR/DTR mode
STR use the default mode 0, sample based on the internal dummy pad.
DTR use the mode 3, sample based on the external DQS pad, so this
board and device connect the DQS pad.
adjust the clock rate for DTR mode, when detect the DDR LUT command,
flexspi will automatically div 2 of the root clock and output to device.
Patch 5 finally add the DTR support in default after the upper 4 patches's
prepareation. Since lx2160a do not implement DQS pad, so can't support
this DTR mode.
Diffstat (limited to 'rust/helpers/helpers.c')
0 files changed, 0 insertions, 0 deletions