kbuild: Split Rules.make

Rules.make is used in 4 phases, 
o generate modversions
o build
o install modules
o clean

split out the code specific to the phase and move it into 
scripts/Makefile.<phase>

1 files changed, 167 insertions, 0 deletions

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
new file mode 100644
index 000000000000..7b28a0fd6b83
--- /dev/null
+++ b/scripts/Makefile.build
@@ -0,0 +1,167 @@
+# ==========================================================================
+# Building
+# ==========================================================================
+
+# If a Makefile does not define a L_TARGET, link an object called "built-in.o"
+
+ifdef L_TARGET
+L_TARGET := $(obj)/$(L_TARGET)
+else
+O_TARGET := $(obj)/built-in.o
+endif
+
+first_rule: $(if $(KBUILD_BUILTIN),$(O_TARGET) $(L_TARGET) $(EXTRA_TARGETS)) \
+	    $(if $(KBUILD_MODULES),$(obj-m)) \
+	    $(subdir-ym)
+	@:
+
+# Compile C sources (.c)
+# ---------------------------------------------------------------------------
+
+# Default is built-in, unless we know otherwise
+modkern_cflags := $(CFLAGS_KERNEL)
+
+$(real-objs-m)        : modkern_cflags := $(CFLAGS_MODULE)
+$(real-objs-m:.o=.i)  : modkern_cflags := $(CFLAGS_MODULE)
+$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
+
+$(export-objs)        : export_flags   := $(EXPORT_FLAGS)
+$(export-objs:.o=.i)  : export_flags   := $(EXPORT_FLAGS)
+$(export-objs:.o=.s)  : export_flags   := $(EXPORT_FLAGS)
+$(export-objs:.o=.lst): export_flags   := $(EXPORT_FLAGS)
+
+c_flags = -Wp,-MD,$(depfile) $(CFLAGS) $(NOSTDINC_FLAGS) \
+	  $(modkern_cflags) $(EXTRA_CFLAGS) $(CFLAGS_$(*F).o) \
+	  -DKBUILD_BASENAME=$(subst $(comma),_,$(subst -,_,$(*F))) \
+	  $(export_flags) 
+
+quiet_cmd_cc_s_c = CC      $(echo_target)
+cmd_cc_s_c       = $(CC) $(c_flags) -S -o $@ $< 
+
+%.s: %.c FORCE
+	$(call if_changed_dep,cc_s_c)
+
+quiet_cmd_cc_i_c = CPP     $(echo_target)
+cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
+
+%.i: %.c FORCE
+	$(call if_changed_dep,cc_i_c)
+
+quiet_cmd_cc_o_c = CC      $(echo_target)
+cmd_cc_o_c       = $(CC) $(c_flags) -c -o $@ $<
+
+%.o: %.c FORCE
+	$(call if_changed_dep,cc_o_c)
+
+quiet_cmd_cc_lst_c = MKLST   $(echo_target)
+cmd_cc_lst_c       = $(CC) $(c_flags) -g -c -o $*.o $< && sh scripts/makelst $*.o System.map $(OBJDUMP) > $@
+
+%.lst: %.c FORCE
+	$(call if_changed_dep,cc_lst_c)
+
+# Compile assembler sources (.S)
+# ---------------------------------------------------------------------------
+
+modkern_aflags := $(AFLAGS_KERNEL)
+
+$(real-objs-m)      : modkern_aflags := $(AFLAGS_MODULE)
+$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
+
+a_flags = -Wp,-MD,$(depfile) $(AFLAGS) $(NOSTDINC_FLAGS) \
+	  $(modkern_aflags) $(EXTRA_AFLAGS) $(AFLAGS_$(*F).o)
+
+quiet_cmd_as_s_S = CPP     $(echo_target)
+cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $< 
+
+%.s: %.S FORCE
+	$(call if_changed_dep,as_s_S)
+
+quiet_cmd_as_o_S = AS      $(echo_target)
+cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
+
+%.o: %.S FORCE
+	$(call if_changed_dep,as_o_S)
+
+targets += $(real-objs-y) $(real-objs-m) $(EXTRA_TARGETS) $(MAKECMDGOALS)
+
+# Build the compiled-in targets
+# ---------------------------------------------------------------------------
+
+# To build objects in subdirs, we need to descend into the directories
+$(sort $(subdir-obj-y)): $(subdir-ym) ;
+
+#
+# Rule to compile a set of .o files into one .o file
+#
+ifdef O_TARGET
+quiet_cmd_link_o_target = LD      $(echo_target)
+# If the list of objects to link is empty, just create an empty O_TARGET
+cmd_link_o_target = $(if $(strip $(obj-y)),\
+		      $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -r -o $@ $(filter $(obj-y), $^),\
+		      rm -f $@; $(AR) rcs $@)
+
+$(O_TARGET): $(obj-y) FORCE
+	$(call if_changed,link_o_target)
+
+targets += $(O_TARGET)
+endif # O_TARGET
+
+#
+# Rule to compile a set of .o files into one .a file
+#
+ifdef L_TARGET
+quiet_cmd_link_l_target = AR      $(echo_target)
+cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(obj-y)
+
+$(L_TARGET): $(obj-y) FORCE
+	$(call if_changed,link_l_target)
+
+targets += $(L_TARGET)
+endif
+
+#
+# Rule to link composite objects
+#
+
+quiet_cmd_link_multi = LD      $(echo_target)
+cmd_link_multi = $(LD) $(LDFLAGS) $(EXTRA_LDFLAGS) -r -o $@ $(filter $(addprefix $(obj)/,$($(subst $(obj)/,,$(@:.o=-objs)))),$^)
+
+# We would rather have a list of rules like
+# 	foo.o: $(foo-objs)
+# but that's not so easy, so we rather make all composite objects depend
+# on the set of all their parts
+$(multi-used-y) : %.o: $(multi-objs-y) FORCE
+	$(call if_changed,link_multi)
+
+$(multi-used-m) : %.o: $(multi-objs-m) FORCE
+	$(call if_changed,link_multi)
+
+targets += $(multi-used-y) $(multi-used-m)
+
+# Compile programs on the host
+# ===========================================================================
+
+quiet_cmd_host_cc__c  = HOSTCC  $(echo_target)
+cmd_host_cc__c        = $(HOSTCC) -Wp,-MD,$(depfile) \
+			$(HOSTCFLAGS) $(HOST_EXTRACFLAGS) \
+			$(HOST_LOADLIBES) -o $@ $<
+
+$(host-progs-single): %: %.c FORCE
+	$(call if_changed_dep,host_cc__c)
+
+quiet_cmd_host_cc_o_c = HOSTCC  $(echo_target)
+cmd_host_cc_o_c       = $(HOSTCC) -Wp,-MD,$(depfile) \
+			$(HOSTCFLAGS) $(HOST_EXTRACFLAGS) -c -o $@ $<
+
+$(host-progs-multi-objs): %.o: %.c FORCE
+	$(call if_changed_dep,host_cc_o_c)
+
+quiet_cmd_host_cc__o  = HOSTLD  $(echo_target)
+cmd_host_cc__o        = $(HOSTCC) $(HOSTLDFLAGS) -o $@ $(addprefix $(obj)/,$($(subst $(obj)/,,$@)-objs)) \
+			$(HOST_LOADLIBES)
+
+$(host-progs-multi): %: $(host-progs-multi-objs) FORCE
+	$(call if_changed,host_cc__o)
+
+targets += $(host-progs-single) $(host-progs-multi-objs) $(host-progs-multi) 
+