diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2025-10-01 13:14:48 -0700 | 
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2025-10-01 13:14:48 -0700 | 
| commit | 5fb024931949f3475260c84a0e4b0997af9c5530 (patch) | |
| tree | 00e49ff8fbc554835c74e973c692c9d946f9b6ba /scripts/gdb/linux/mapletree.py | |
| parent | 524c4a5daf92982cf16d9e6c8cdf8721abe35a11 (diff) | |
| parent | da3a88e9656c17a34daf49c9acc6d85f73b4d3d9 (diff) | |
Merge tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
 "We have GPIO awareness in the pin control core and an interesting
  AAEON driver.
  Core changes:
   - Allow pins to be identified/marked as GPIO mode with a special
     callback.
     The pin controller core is now "aware" if a pin is in GPIO mode if
     the callback is implemented in the driver, and can thus be marked
     as "strict", i.e. disallowing simultaneous use of a line as GPIO
     and another function such as I2C.
     This is enabled in the Qualcomm TLMM driver and also implemeted
     from day 1 in the new Broadcom STB driver
   - Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL
     to better describe what the config is doing, as well as making it
     more intuitive what shall be returned when reading this property
  New drivers:
   - Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver
   - Qualcomm Glymur family pin controller driver
   - Broadcom STB family pin controller driver
   - Tegra186 pin controller driver
   - AAEON UP pin controller support.
     This is some special pin controller that works as an external
     advanced line MUX and amplifier for signals from an Intel SoC. A
     cooperative effort with the GPIO maintainer was needed to reach a
     solution where we reuse code from the GPIO aggregator/forwarder
     driver
   - Renesas RZ/T2H and RZ/N2H pin controller support
   - Axis ARTPEC-8 subdriver for the Samsung pin controller driver
  Improvements:
   - Output enable (OEN) support in the Renesas RZG2L driver
   - Properly support bias pull up/down in the pinctrl-single driver
   - Move over all GPIO portions using generic MMIO GPIO to the new
     generic GPIO chip management which has a nice and separate API
   - Proper DT bindings for some older Broadcom SoCs
   - External GPIO (EGPIO) support in the Qualcomm SM8250
  Deleted code:
   - Dropped the now unused Samsung S3C24xx drivers"
* tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
  pinctrl: use more common syntax for compound literals
  pinctrl: Simplify printks with pOF format
  pinctrl: qcom: Add SDM660 LPASS LPI TLMM
  dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl
  pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets
  pinctrl: qcom: Add glymur pinctrl driver
  dt-bindings: pinctrl: qcom: Add Glymur pinctrl
  pinctrl: qcom: sm8250: Add egpio support
  pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL
  pinctrl: keembay: fix double free in keembay_build_functions()
  pinctrl: spacemit: fix typo in PRI_TDI pin name
  pinctrl: eswin: Fix regulator error check and Kconfig dependency
  pinctrl: bcm: Add STB family pin controller driver
  dt-bindings: pinctrl: Add support for Broadcom STB pin controller
  pinctrl: qcom: make the pinmuxing strict
  pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions
  pinctrl: qcom: add infrastructure for marking pin functions as GPIOs
  pinctrl: allow to mark pin functions as requestable GPIOs
  pinctrl: qcom: use generic pin function helpers
  pinctrl: make struct pinfunction a pointer in struct function_desc
  ...
Diffstat (limited to 'scripts/gdb/linux/mapletree.py')
0 files changed, 0 insertions, 0 deletions
