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| author | Lizhi Hou <lizhi.hou@amd.com> | 2025-11-07 10:11:15 -0800 |
|---|---|---|
| committer | Lizhi Hou <lizhi.hou@amd.com> | 2025-11-13 08:36:08 -0800 |
| commit | 6ff9385c07aa311f01f87307e6256231be7d8675 (patch) | |
| tree | 78243429e0f8310ec7cb8ec5f742afc14da2de51 /scripts/generate_rust_analyzer.py | |
| parent | 0709abaf67345b3a8966198fc0957fcc361b065f (diff) | |
accel/amdxdna: Clear mailbox interrupt register during channel creation
The mailbox interrupt register is not always cleared when a mailbox channel
is created. This can leave stale interrupt states from previous operations.
Fix this by explicitly clearing the interrupt register in the mailbox
channel creation function.
Fixes: b87f920b9344 ("accel/amdxdna: Support hardware mailbox")
Reviewed-by: Maciej Falkowski <maciej.falkowski@linux.intel.com>
Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>
Link: https://patch.msgid.link/20251107181115.1293158-1-lizhi.hou@amd.com
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions