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| author | Aaron Kling <webgeek1234@gmail.com> | 2025-10-21 20:08:36 -0500 |
|---|---|---|
| committer | Viresh Kumar <viresh.kumar@linaro.org> | 2025-10-23 12:10:11 +0530 |
| commit | 85976d3774be8fe290eb0468c1b0a0c36f40cbfe (patch) | |
| tree | dd82ec15fd124d1505c94dc5c02429103707c744 /tools/docs/parse-headers.py | |
| parent | 6e7970cab51d01b8f7c56f120486c571c22e1b80 (diff) | |
cpufreq: tegra186: add OPP support and set bandwidth
Add support to use OPP table from DT in Tegra186 cpufreq driver.
Tegra SoC's receive the frequency lookup table (LUT) from BPMP-FW.
Cross check the OPP's present in DT against the LUT from BPMP-FW
and enable only those DT OPP's which are present in LUT also.
The OPP table in DT has CPU Frequency to bandwidth mapping where
the bandwidth value is per MC channel. DRAM bandwidth depends on the
number of MC channels which can vary as per the boot configuration.
This per channel bandwidth from OPP table will be later converted by
MC driver to final bandwidth value by multiplying with number of
channels before being handled in the EMC driver.
If OPP table is not present in DT, then use the LUT from BPMP-FW
directly as the CPU frequency table and not do the DRAM frequency
scaling which is same as the current behavior.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
[ Viresh: Fix _free() definitions ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'tools/docs/parse-headers.py')
0 files changed, 0 insertions, 0 deletions
