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| author | Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> | 2025-11-14 16:05:12 +0900 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2025-11-20 18:53:32 -0800 |
| commit | b65e179b986a4812ed38486050a438ce57a873b9 (patch) | |
| tree | 767506d7a5b8d1ffb71407a679ebc6d58a53d14a /tools/lib/python/abi/abi_parser.py | |
| parent | beeff790c5679b3eacc8ee7021f775f447f47603 (diff) | |
clk: visconti: Add VIIF clocks
Add the control sequence of register bits to handle the clocks and the
resets of Video Input Interface.
Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/lib/python/abi/abi_parser.py')
0 files changed, 0 insertions, 0 deletions