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| author | Arnd Bergmann <arnd@arndb.de> | 2025-11-21 21:04:31 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-11-21 21:04:31 +0100 |
| commit | 314bfe59ec2ac32b9ab263b555399ff286d7b3a2 (patch) | |
| tree | 8c98ab768fd6d4e03c30bfc9b2443f529f1d6932 /tools/lib/python/abi/helpers.py | |
| parent | f0218293eef7ef876ee0d82ad266f9f63fbee0d7 (diff) | |
| parent | af5eb17ff893bf6e52680a31059e1816749c2d20 (diff) | |
Merge tag 'riscv-sophgo-dt-for-v6.19' of https://github.com/sophgo/linux into soc/dt
RISC-V Devicetrees for v6.19
Sophgo:
For CV18xx serials:
Add top syscon device related DTS change, the top system
controller provides register access to configure some
misc modules, such as usb2 phy and a dma multiplexer.
For SG2042:
There are two changes. The first one is to add DTS
definition for PCIe controllers for SoC SG2042 and
boards such as Pioneerbox/EVB_V1/EVB_V2 uses SG2042.
The second one is to add DTS to support SPI-NOR flash
controllers for this SoC and the same for related boards.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* tag 'riscv-sophgo-dt-for-v6.19' of https://github.com/sophgo/linux:
riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2
riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1
riscv: dts: sophgo: Enable SPI NOR node for PioneerBox
riscv: dts: sophgo: Add SPI NOR node for SG2042
riscv: dts: sophgo: Add USB support for cv18xx
riscv: dts: sophgo: Add syscon node for cv18xx
dt-bindings: soc: sophgo: add TOP syscon for CV18XX/SG200X series SoC
riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0
riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X
riscv: sophgo: dts: enable PCIe for PioneerBox
riscv: sophgo: dts: add PCIe controllers for SG2042
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/lib/python/abi/helpers.py')
0 files changed, 0 insertions, 0 deletions
