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authorCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>2025-11-19 18:14:31 +0200
committerMark Brown <broonie@kernel.org>2025-11-24 14:10:47 +0000
commite93d7b2d8b349f659fa9456048ee86e10eb422f9 (patch)
tree707a175c2dca3bb95b3cba7d0d1099eaa8cabad6 /tools/lib/python/kdoc/kdoc_re.py
parentbc4f0b1e39035b9bb3d5d9692074702110f5e2b1 (diff)
spi: dt-bindings: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have four SPI peripherals. Compared to the previously supported RZ/V2H, these SoCs have a smaller FIFO, no resets, and only two clocks: PCLKSPIn and PCLK. PCLKSPIn, being the clock from which the SPI transfer clock is generated, is the equivalent of the TCLK from V2H. Document them, and use RZ/T2H as a fallback for RZ/N2H as the SPIs are entirely compatible. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251119161434.595677-11-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
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