diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2025-10-17 13:04:21 -1000 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2025-10-17 13:04:21 -1000 |
| commit | f406055cb18c6e299c4a783fc1effeb16be41803 (patch) | |
| tree | f3d5a0b434bdafdb6ef4dad7bc249e8c4398d95b /tools/perf/Documentation/perf.data-file-format.txt | |
| parent | fe69107ec7d8b946ab413cfe118984dac8f1a0d8 (diff) | |
| parent | ea0d55ae4b3207c33691a73da3443b1fd379f1d2 (diff) | |
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxHEADtorvalds/mastertorvalds/HEADmaster
Pull arm64 fixes from Catalin Marinas:
- Explicitly encode the XZR register if the value passed to
write_sysreg_s() is 0.
The GIC CDEOI instruction is encoded as a system register write with
XZR as the source register. However, clang does not honour the "Z"
register constraint, leading to incorrect code generation
- Ensure the interrupts (DAIF.IF) are unmasked when completing
single-step of a suspended breakpoint before calling
exit_to_user_mode().
With pseudo-NMIs, interrupts are (additionally) masked at the PMR_EL1
register, handled by local_irq_*()
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: debug: always unmask interrupts in el0_softstp()
arm64/sysreg: Fix GIC CDEOI instruction encoding
Diffstat (limited to 'tools/perf/Documentation/perf.data-file-format.txt')
0 files changed, 0 insertions, 0 deletions