diff options
| author | Christophe Leroy (CS GROUP) <chleroy@kernel.org> | 2025-12-19 13:23:52 +0100 |
|---|---|---|
| committer | Madhavan Srinivasan <maddy@linux.ibm.com> | 2025-12-22 18:25:07 +0530 |
| commit | 608328ba5b0619cbc28b409296b5e3840bcb97b6 (patch) | |
| tree | ee632f75fc6f71ee33aac86ab7108ed93bcdd5c0 /tools | |
| parent | fbe409d138b1d8a8b91cdad19cf95495e8ebe1ee (diff) | |
powerpc/32: Restore disabling of interrupts at interrupt/syscall exit
Commit 2997876c4a1a ("powerpc/32: Restore clearing of MSR[RI] at
interrupt/syscall exit") delayed clearing of MSR[RI], but missed that
both MSR[RI] and MSR[EE] are cleared at the same time, so the commit
also delayed the disabling of interrupts, leading to unexpected
behaviour.
To fix that, mostly revert the blamed commit and restore the clearing
of MSR[RI] in interrupt_exit_kernel_prepare() instead. For 8xx it
implies adding a synchronising instruction after the mtspr in order to
make sure no instruction counter interrupt (used for perf events) will
fire just after clearing MSR[RI].
Reported-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Closes: https://lore.kernel.org/all/4d0bd05d-6158-1323-3509-744d3fbe8fc7@xenosoft.de/
Reported-by: Guenter Roeck <linux@roeck-us.net>
Closes: https://lore.kernel.org/all/6b05eb1c-fdef-44e0-91a7-8286825e68f1@roeck-us.net/
Fixes: 2997876c4a1a ("powerpc/32: Restore clearing of MSR[RI] at interrupt/syscall exit")
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Link: https://patch.msgid.link/585ea521b2be99d293b539bbfae148366cfb3687.1766146895.git.chleroy@kernel.org
Diffstat (limited to 'tools')
0 files changed, 0 insertions, 0 deletions