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-rw-r--r--arch/ppc/lib/string.S39
-rw-r--r--arch/ppc/platforms/k2_pci.c7
-rw-r--r--arch/ppc/syslib/cpc710.h6
-rw-r--r--arch/ppc/syslib/mpc10x_common.c24
-rw-r--r--arch/ppc/syslib/todc_time.c4
-rw-r--r--include/asm-ppc/mpc10x.h1
-rw-r--r--include/asm-ppc/tlb.h8
7 files changed, 69 insertions, 20 deletions
diff --git a/arch/ppc/lib/string.S b/arch/ppc/lib/string.S
index f182856b2b5b..5557156770dd 100644
--- a/arch/ppc/lib/string.S
+++ b/arch/ppc/lib/string.S
@@ -507,18 +507,18 @@ _GLOBAL(__copy_tofrom_user)
blr
/* read fault, initial single-byte copy */
-100: li r4,0
+100: li r9,0
b 90f
/* write fault, initial single-byte copy */
-101: li r4,1
+101: li r9,1
90: subf r5,r8,r5
li r3,0
b 99f
/* read fault, initial word copy */
-102: li r4,0
+102: li r9,0
b 91f
/* write fault, initial word copy */
-103: li r4,1
+103: li r9,1
91: li r3,2
b 99f
@@ -542,38 +542,47 @@ _GLOBAL(__copy_tofrom_user)
#endif
/* read fault in cacheline loop */
-104: li r4,0
+104: li r9,0
b 92f
/* fault on dcbz (effectively a write fault) */
/* or write fault in cacheline loop */
-105: li r4,1
+105: li r9,1
92: li r3,LG_CACHELINE_BYTES
b 99f
/* read fault in final word loop */
-108: li r4,0
+108: li r9,0
b 93f
/* write fault in final word loop */
-109: li r4,1
+109: li r9,1
93: andi. r5,r5,3
li r3,2
b 99f
/* read fault in final byte loop */
-110: li r4,0
+110: li r9,0
b 94f
/* write fault in final byte loop */
-111: li r4,1
+111: li r9,1
94: li r5,0
li r3,0
/*
* At this stage the number of bytes not copied is
- * r5 + (ctr << r3), and r4 is 0 for read or 1 for write.
+ * r5 + (ctr << r3), and r9 is 0 for read or 1 for write.
*/
99: mfctr r0
slw r3,r0,r3
- add r3,r3,r5
- cmpwi 0,r4,0
+ add. r3,r3,r5
+ beq 120f /* shouldn't happen */
+ cmpwi 0,r9,0
bne 120f
-/* for read fault, clear out the destination: r3 bytes starting at 4(r6) */
+/* for a read fault, first try to continue the copy one byte at a time */
+ mtctr r3
+130: lbz r0,4(r4)
+131: stb r0,4(r6)
+ addi r4,r4,1
+ addi r6,r6,1
+ bdnz 130b
+/* then clear out the destination: r3 bytes starting at 4(r6) */
+132: mfctr r3
srwi. r0,r3,2
li r9,0
mtctr r0
@@ -594,6 +603,8 @@ _GLOBAL(__copy_tofrom_user)
.long 31b,109b
.long 40b,110b
.long 41b,111b
+ .long 130b,132b
+ .long 131b,120b
.long 112b,120b
.long 114b,120b
.text
diff --git a/arch/ppc/platforms/k2_pci.c b/arch/ppc/platforms/k2_pci.c
index f1cd920ec664..e6e70983999d 100644
--- a/arch/ppc/platforms/k2_pci.c
+++ b/arch/ppc/platforms/k2_pci.c
@@ -156,6 +156,13 @@ void k2_setup_hoses(void)
__raw_writel(0x00000080, K2_PCI32_BAR+PSBAR); /* Base@0x80 */
__raw_writel(0x00000000, K2_PCI32_BAR+PPBAR);
+ __raw_writel(0xc0000000, K2_PCI32_BAR+BPMDLK);
+ __raw_writel(0xd0000000, K2_PCI32_BAR+TPMDLK);
+ __raw_writel(0x80000000, K2_PCI32_BAR+BIODLK);
+ __raw_writel(0x80100000, K2_PCI32_BAR+TIODLK);
+ __raw_writel(0xe0008000, K2_PCI32_BAR+DLKCTRL);
+ __raw_writel(0xffffffff, K2_PCI32_BAR+DLKDEV);
+
/* PCI64 mappings */
__raw_writel(0x00100000, K2_PCI64_BAR+PIBAR); /* PCI I/O base */
__raw_writel(0x10000000, K2_PCI64_BAR+PMBAR); /* PCI Mem base */
diff --git a/arch/ppc/syslib/cpc710.h b/arch/ppc/syslib/cpc710.h
index ede184e36b5e..2dfacbb7580a 100644
--- a/arch/ppc/syslib/cpc710.h
+++ b/arch/ppc/syslib/cpc710.h
@@ -61,6 +61,12 @@
#define BARPP 0x000f8130
#define PSBAR 0x000f8140
#define PPBAR 0x000f8150
+#define BPMDLK 0x000f8200 /* Bottom of Peripheral Memory Space */
+#define TPMDLK 0x000f8210 /* Top of Peripheral Memory Space */
+#define BIODLK 0x000f8220 /* Bottom of Peripheral I/O Space */
+#define TIODLK 0x000f8230 /* Top of Perioheral I/O Space */
+#define DLKCTRL 0x000f8240 /* Deadlock control */
+#define DLKDEV 0x000f8250 /* Deadlock device */
/* System standard configuration registers space */
#define DCR 0xff200000
diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
index facbf56019d7..b972d466672b 100644
--- a/arch/ppc/syslib/mpc10x_common.c
+++ b/arch/ppc/syslib/mpc10x_common.c
@@ -243,6 +243,8 @@ mpc10x_bridge_init(struct pci_controller *hose,
#ifdef CONFIG_MPC10X_STORE_GATHERING
mpc10x_enable_store_gathering(hose);
+#else
+ mpc10x_disable_store_gathering(hose);
#endif
if (ppc_md.progress) ppc_md.progress("mpc10x:exit", 0x100);
@@ -376,3 +378,25 @@ mpc10x_enable_store_gathering(struct pci_controller *hose)
return 0;
}
+
+int __init
+mpc10x_disable_store_gathering(struct pci_controller *hose)
+{
+ uint picr1;
+
+ early_read_config_dword(hose,
+ 0,
+ PCI_DEVFN(0,0),
+ MPC10X_CFG_PICR1_REG,
+ &picr1);
+
+ picr1 &= ~MPC10X_CFG_PICR1_ST_GATH_EN;
+
+ early_write_config_dword(hose,
+ 0,
+ PCI_DEVFN(0,0),
+ MPC10X_CFG_PICR1_REG,
+ picr1);
+
+ return 0;
+}
diff --git a/arch/ppc/syslib/todc_time.c b/arch/ppc/syslib/todc_time.c
index 85ee80b4e581..40514058e44e 100644
--- a/arch/ppc/syslib/todc_time.c
+++ b/arch/ppc/syslib/todc_time.c
@@ -240,6 +240,7 @@ todc_get_rtc_time(void)
switch (todc_info->rtc_type) {
case TODC_TYPE_DS1557:
+ case TODC_TYPE_DS1743:
case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
case TODC_TYPE_DS1747:
break;
@@ -274,6 +275,7 @@ todc_get_rtc_time(void)
if (todc_info->rtc_type != TODC_TYPE_MC146818) {
switch (todc_info->rtc_type) {
case TODC_TYPE_DS1557:
+ case TODC_TYPE_DS1743:
case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
case TODC_TYPE_DS1747:
break;
@@ -367,6 +369,7 @@ static unsigned char __init todc_read_timereg(int addr)
switch (todc_info->rtc_type) {
case TODC_TYPE_DS1557:
+ case TODC_TYPE_DS1743:
case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
case TODC_TYPE_DS1747:
case TODC_TYPE_MC146818:
@@ -381,6 +384,7 @@ static unsigned char __init todc_read_timereg(int addr)
switch (todc_info->rtc_type) {
case TODC_TYPE_DS1557:
+ case TODC_TYPE_DS1743:
case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
case TODC_TYPE_DS1747:
case TODC_TYPE_MC146818:
diff --git a/include/asm-ppc/mpc10x.h b/include/asm-ppc/mpc10x.h
index 1d3a64f06d46..d2676d8f8088 100644
--- a/include/asm-ppc/mpc10x.h
+++ b/include/asm-ppc/mpc10x.h
@@ -164,5 +164,6 @@ int mpc10x_bridge_init(struct pci_controller *hose,
uint phys_eumb_base);
unsigned long mpc10x_get_mem_size(uint mem_map);
int mpc10x_enable_store_gathering(struct pci_controller *hose);
+int mpc10x_disable_store_gathering(struct pci_controller *hose);
#endif /* __PPC_KERNEL_MPC10X_H */
diff --git a/include/asm-ppc/tlb.h b/include/asm-ppc/tlb.h
index b4375599b610..2c142c5d8584 100644
--- a/include/asm-ppc/tlb.h
+++ b/include/asm-ppc/tlb.h
@@ -21,8 +21,8 @@
#ifdef CONFIG_PPC_STD_MMU
/* Classic PPC with hash-table based MMU... */
-struct free_pte_ctx;
-extern void tlb_flush(struct free_pte_ctx *tlb);
+struct mmu_gather;
+extern void tlb_flush(struct mmu_gather *tlb);
/* Get the generic bits... */
#include <asm-generic/tlb.h>
@@ -44,10 +44,6 @@ static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep,
#else
/* Embedded PPC with software-loaded TLB, very simple... */
-struct flush_tlb_arch { };
-
-#define tlb_init_arch(tlb, full_flush) do { } while (0)
-#define tlb_finish_arch(tlb) do { } while (0)
#define tlb_start_vma(tlb, vma) do { } while (0)
#define tlb_end_vma(tlb, vma) do { } while (0)
#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
generated by cgit v1.2.3 (git 2.46.0) at 2026-01-30 17:18:26 +0000