diff options
645 files changed, 19536 insertions, 11612 deletions
@@ -1060,6 +1060,12 @@ S: USA N: Jeff Garzik E: jgarzik@pobox.com +N: Kumar Gala +E: kumar.gala@freescale.com +D: Embedded PowerPC 6xx/7xx/74xx/82xx/85xx support +S: Austin, Texas 78729 +S: USA + N: Jacques Gelinas E: jacques@solucorp.qc.ca D: Author of the Umsdos file system diff --git a/Documentation/SubmittingDrivers b/Documentation/SubmittingDrivers index 293591a884fe..2630629d7ab5 100644 --- a/Documentation/SubmittingDrivers +++ b/Documentation/SubmittingDrivers @@ -3,7 +3,8 @@ Submitting Drivers For The Linux Kernel This document is intended to explain how to submit device drivers to the various kernel trees. Note that if you are interested in video card drivers -you should probably talk to XFree86 (http://www.xfree86.org) instead. +you should probably talk to XFree86 (http://www.xfree86.org/) and/or X.Org +(http://x.org/) instead. Also read the Documentation/SubmittingPatches document. diff --git a/Documentation/basic_profiling.txt b/Documentation/basic_profiling.txt index cd3b422cc501..65e3dc2d4437 100644 --- a/Documentation/basic_profiling.txt +++ b/Documentation/basic_profiling.txt @@ -5,16 +5,19 @@ Thanks to John Levon, Dave Hansen, et al. for help writing this. <test> is the thing you're trying to measure. Make sure you have the correct System.map / vmlinux referenced! -IMHO it's easier to use "make install" for linux and hack /sbin/installkernel -to copy config files, system.map, vmlinux to /boot. + +It is probably easiest to use "make install" for linux and hack +/sbin/installkernel to copy vmlinux to /boot, in addition to vmlinuz, +config, System.map, which are usually installed by default. Readprofile ----------- -You need a fixed readprofile command for 2.5 ... either get hold of -a current version from: +A recent readprofile command is needed for 2.6, such as found in util-linux +2.12a, which can be downloaded from: + http://www.kernel.org/pub/linux/utils/util-linux/ -or get readprofile binary fixed for 2.5 / akpm's 2.5 patch from -ftp://ftp.kernel.org/pub/linux/kernel/people/mbligh/tools/readprofile/ + +Most distributions will ship it already. Add "profile=2" to the kernel command line. @@ -24,25 +27,26 @@ dump output readprofile -m /boot/System.map > captured_profile Oprofile -------- -get source (I use 0.5) from http://oprofile.sourceforge.net/ -add "idle=poll" to the kernel command line +Get the source (I use 0.8) from http://oprofile.sourceforge.net/ +and add "idle=poll" to the kernel command line Configure with CONFIG_PROFILING=y and CONFIG_OPROFILE=y & reboot on new kernel ./configure --with-kernel-support make install -One time setup (pick appropriate one for your CPU): -P3 opcontrol --setup --vmlinux=/boot/vmlinux \ - --ctr0-event=CPU_CLK_UNHALTED --ctr0-count=100000 -Athlon/x86-64 opcontrol --setup --vmlinux=/boot/vmlinux \ - --ctr0-event=RETIRED_INSNS --ctr0-count=100000 -P4 opcontrol --setup --vmlinux=/boot/vmlinux \ - --ctr0-event=GLOBAL_POWER_EVENTS \ - --ctr0-unit-mask=1 --ctr0-count=100000 +For superior results, be sure to enable the local APIC. If opreport sees +a 0Hz CPU, APIC was not on. Be aware that idle=poll may mean a performance +penalty. + +One time setup: + opcontrol --setup --vmlinux=/boot/vmlinux -start daemon opcontrol --start-daemon clear opcontrol --reset start opcontrol --start <test> stop opcontrol --stop -dump output oprofpp -dl -i /boot/vmlinux > output_file +dump output opreport > output_file + +To only report on the kernel, run opreport /boot/vmlinux > output_file + +A reset is needed to clear old statistics, which survive a reboot. diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt index 995da97a2633..b84b7a7cc723 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.txt @@ -1115,6 +1115,18 @@ program to load modules on demand. The files in this directory can be used to tune the operation of the virtual memory (VM) subsystem of the Linux kernel. +vfs_cache_pressure +------------------ + +Controls the tendency of the kernel to reclaim the memory which is used for +caching of directory and inode objects. + +At the default value of vfs_cache_pressure=100 the kernel will attempt to +reclaim dentries and inodes at a "fair" rate with respect to pagecache and +swapcache reclaim. Decreasing vfs_cache_pressure causes the kernel to prefer +to retain dentry and inode caches. Increasing vfs_cache_pressure beyond 100 +causes the kernel to prefer to reclaim dentries and inodes. + dirty_background_ratio ---------------------- diff --git a/Documentation/power/swsusp.txt b/Documentation/power/swsusp.txt index 8bc308d0341e..d5ffa57a1b47 100644 --- a/Documentation/power/swsusp.txt +++ b/Documentation/power/swsusp.txt @@ -12,6 +12,9 @@ From kernel/suspend.c: * ...you'd better find out how to get along * without your data. * + * If you change kernel command line between suspend and resume... + * ...prepare for nasty fsck or worse. + * * (*) pm interface support is needed to make it safe. You need to append resume=/dev/your_swap_partition to kernel command diff --git a/Documentation/power/video.txt b/Documentation/power/video.txt index 652657307de0..cd9e2075b225 100644 --- a/Documentation/power/video.txt +++ b/Documentation/power/video.txt @@ -30,10 +30,6 @@ There are three types of systems where video works after S3 resume: patched X, and plain text console (no vesafb or radeonfb), see http://www.doesi.gmxhome.de/linux/tm800s3/s3.html. (Acer TM 800) -* radeon systems, where X can soft-boot your video card. You'll need - patched X, and plain text console (no vesafb or radeonfb), see - http://www.doesi.gmxhome.de/linux/tm800s3/s3.html. (Acer TM 800) - Now, if you pass acpi_sleep=something, and it does not work with your bios, you'll get hard crash during resume. Be carefull. diff --git a/Documentation/sh/new-machine.txt b/Documentation/sh/new-machine.txt index 8bc5f21f890b..eb2dd2e6993b 100644 --- a/Documentation/sh/new-machine.txt +++ b/Documentation/sh/new-machine.txt @@ -188,13 +188,7 @@ adding a machine called vapor): - add a new file include/asm-sh/vapor/io.h which contains prototypes for any machine specific IO functions prefixed with the machine name, for example vapor_inb. These will be needed when filling out the machine - vector. In addition, a section is required which defines what to do when - building a machine specific version. For example: - - #ifdef __WANT_IO_DEF - #define inb vapor_inb - ... - #endif + vector. This is the minimum that is required, however there are ample opportunities to optimise this. In particular, by making the prototypes diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm.txt index fc3e413c3721..c873ef92fbfa 100644 --- a/Documentation/sysctl/vm.txt +++ b/Documentation/sysctl/vm.txt @@ -28,7 +28,7 @@ Currently, these files are in /proc/sys/vm: ============================================================== dirty_ratio, dirty_background_ratio, dirty_expire_centisecs, -dirty_writeback_centisecs: +dirty_writeback_centisecs, vfs_cache_pressure: See Documentation/filesystems/proc.txt diff --git a/MAINTAINERS b/MAINTAINERS index 9d6c1955bd14..211ffa92b55b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1278,6 +1278,13 @@ W: http://www.penguinppc.org/ L: linuxppc-embedded@lists.linuxppc.org S: Maintained +LINUX FOR POWERPC EMBEDDED PPC85XX +P: Kumar Gala +M: kumar.gala@freescale.com +W: http://www.penguinppc.org/ +L: linuxppc-embedded@lists.linuxppc.org +S: Maintained + LLC (802.2) P: Arnaldo Carvalho de Melo M: acme@conectiva.com.br diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index 9e8eab6dcc0a..b52a52b7b918 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c @@ -227,7 +227,7 @@ static struct proc_dir_entry * irq_dir[NR_IRQS]; #ifdef CONFIG_SMP static struct proc_dir_entry * smp_affinity_entry[NR_IRQS]; static char irq_user_affinity[NR_IRQS]; -static unsigned long irq_affinity[NR_IRQS] = { [0 ... NR_IRQS-1] = ~0UL }; +static cpumask_t irq_affinity[NR_IRQS] = { [0 ... NR_IRQS-1] = CPU_MASK_ALL }; static void select_smp_affinity(int irq) @@ -238,16 +238,14 @@ select_smp_affinity(int irq) if (! irq_desc[irq].handler->set_affinity || irq_user_affinity[irq]) return; - while (((cpu_present_mask >> cpu) & 1) == 0) + while (!cpu_possible(cpu)) cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); last_cpu = cpu; - irq_affinity[irq] = 1UL << cpu; - irq_desc[irq].handler->set_affinity(irq, 1UL << cpu); + irq_affinity[irq] = cpumask_of_cpu(cpu); + irq_desc[irq].handler->set_affinity(irq, cpumask_of_cpu(cpu)); } -#define HEX_DIGITS 16 - static int irq_affinity_read_proc (char *page, char **start, off_t off, int count, int *eof, void *data) @@ -259,67 +257,28 @@ irq_affinity_read_proc (char *page, char **start, off_t off, return len; } -static unsigned int -parse_hex_value (const char __user *buffer, - unsigned long count, unsigned long *ret) -{ - unsigned char hexnum [HEX_DIGITS]; - unsigned long value; - unsigned long i; - - if (!count) - return -EINVAL; - if (count > HEX_DIGITS) - count = HEX_DIGITS; - if (copy_from_user(hexnum, buffer, count)) - return -EFAULT; - - /* - * Parse the first 8 characters as a hex string, any non-hex char - * is end-of-string. '00e1', 'e1', '00E1', 'E1' are all the same. - */ - value = 0; - - for (i = 0; i < count; i++) { - unsigned int c = hexnum[i]; - - switch (c) { - case '0' ... '9': c -= '0'; break; - case 'a' ... 'f': c -= 'a'-10; break; - case 'A' ... 'F': c -= 'A'-10; break; - default: - goto out; - } - value = (value << 4) | c; - } -out: - *ret = value; - return 0; -} - static int irq_affinity_write_proc(struct file *file, const char __user *buffer, unsigned long count, void *data) { int irq = (long) data, full_count = count, err; - unsigned long new_value; + cpumask_t new_value; if (!irq_desc[irq].handler->set_affinity) return -EIO; - err = parse_hex_value(buffer, count, &new_value); + err = cpumask_parse(buffer, count, new_value); /* The special value 0 means release control of the affinity to kernel. */ - if (new_value == 0) { + cpus_and(new_value, new_value, cpu_online_map); + if (cpus_empty(new_value)) { irq_user_affinity[irq] = 0; select_smp_affinity(irq); } /* Do not allow disabling IRQs completely - it's a too easy way to make the system unusable accidentally :-) At least one online CPU still has to be targeted. */ - else if (!(new_value & cpu_present_mask)) - return -EINVAL; else { irq_affinity[irq] = new_value; irq_user_affinity[irq] = 1; @@ -344,10 +303,10 @@ static int prof_cpu_mask_write_proc(struct file *file, const char __user *buffer, unsigned long count, void *data) { - unsigned long *mask = (unsigned long *) data, full_count = count, err; - unsigned long new_value; + unsigned long full_count = count, err; + cpumask_t new_value, *mask = (cpumask_t *)data; - err = parse_hex_value(buffer, count, &new_value); + err = cpumask_parse(buffer, count, new_value); if (err) return err; @@ -457,7 +416,7 @@ request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_regs action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c index f5c5969b7cae..c82286424aa2 100644 --- a/arch/alpha/kernel/process.c +++ b/arch/alpha/kernel/process.c @@ -119,8 +119,8 @@ common_shutdown_1(void *generic_ptr) #ifdef CONFIG_SMP /* Wait for the secondaries to halt. */ - clear_bit(boot_cpuid, &cpu_present_mask); - while (cpu_present_mask) + cpu_clear(boot_cpuid, cpu_possible_map); + while (cpus_weight(cpu_possible_map)) barrier(); #endif diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c index 1dff8e6c9881..c637c38d5b0e 100644 --- a/arch/alpha/kernel/setup.c +++ b/arch/alpha/kernel/setup.c @@ -122,7 +122,6 @@ static void get_sysnames(unsigned long, unsigned long, unsigned long, static void determine_cpu_caches (unsigned int); static char command_line[COMMAND_LINE_SIZE]; -char saved_command_line[COMMAND_LINE_SIZE]; /* * The format of "screen_info" is strange, and due to early @@ -1246,9 +1245,9 @@ show_cpuinfo(struct seq_file *f, void *slot) platform_string(), nr_processors); #ifdef CONFIG_SMP - seq_printf(f, "cpus active\t\t: %ld\n" + seq_printf(f, "cpus active\t\t: %d\n" "cpu active mask\t\t: %016lx\n", - num_online_cpus(), cpu_present_mask); + num_online_cpus(), cpus_addr(cpu_possible_map)[0]); #endif show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape); diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c index 9f4aed85950f..5e0dc627838c 100644 --- a/arch/alpha/kernel/smp.c +++ b/arch/alpha/kernel/smp.c @@ -68,7 +68,7 @@ enum ipi_message_type { static int smp_secondary_alive __initdata = 0; /* Which cpus ids came online. */ -unsigned long cpu_present_mask; +cpumask_t cpu_present_mask; cpumask_t cpu_online_map; EXPORT_SYMBOL(cpu_online_map); @@ -522,7 +522,7 @@ setup_smp(void) smp_num_probed = 1; hwrpb_cpu_present_mask = (1UL << boot_cpuid); } - cpu_present_mask = 1UL << boot_cpuid; + cpu_present_mask = cpumask_of_cpu(boot_cpuid); printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n", smp_num_probed, hwrpb_cpu_present_mask); @@ -547,7 +547,7 @@ smp_prepare_cpus(unsigned int max_cpus) /* Nothing to do on a UP box, or when told not to. */ if (smp_num_probed == 1 || max_cpus == 0) { - cpu_present_mask = 1UL << boot_cpuid; + cpu_present_mask = cpumask_of_cpu(boot_cpuid); printk(KERN_INFO "SMP mode deactivated.\n"); return; } @@ -562,7 +562,7 @@ smp_prepare_cpus(unsigned int max_cpus) if (((hwrpb_cpu_present_mask >> i) & 1) == 0) continue; - cpu_present_mask |= 1UL << i; + cpu_set(i, cpu_possible_map); cpu_count++; } @@ -597,7 +597,7 @@ smp_cpus_done(unsigned int max_cpus) if (cpu_online(cpu)) bogosum += cpu_data[cpu].loops_per_jiffy; - printk(KERN_INFO "SMP: Total of %ld processors activated " + printk(KERN_INFO "SMP: Total of %d processors activated " "(%lu.%02lu BogoMIPS).\n", num_online_cpus(), (bogosum + 2500) / (500000/HZ), @@ -638,23 +638,17 @@ setup_profiling_timer(unsigned int multiplier) static void -send_ipi_message(unsigned long to_whom, enum ipi_message_type operation) +send_ipi_message(cpumask_t to_whom, enum ipi_message_type operation) { - unsigned long i, set, n; + int i; mb(); - for (i = to_whom; i ; i &= ~set) { - set = i & -i; - n = __ffs(set); - set_bit(operation, &ipi_data[n].bits); - } + for_each_cpu_mask(i, to_whom) + set_bit(operation, &ipi_data[i].bits); mb(); - for (i = to_whom; i ; i &= ~set) { - set = i & -i; - n = __ffs(set); - wripir(n); - } + for_each_cpu_mask(i, to_whom) + wripir(i); } /* Structure and data for smp_call_function. This is designed to @@ -784,13 +778,14 @@ smp_send_reschedule(int cpu) printk(KERN_WARNING "smp_send_reschedule: Sending IPI to self.\n"); #endif - send_ipi_message(1UL << cpu, IPI_RESCHEDULE); + send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE); } void smp_send_stop(void) { - unsigned long to_whom = cpu_present_mask & ~(1UL << smp_processor_id()); + cpumask_t to_whom = cpu_possible_map; + cpu_clear(smp_processor_id(), to_whom); #ifdef DEBUG_IPI_MSG if (hard_smp_processor_id() != boot_cpu_id) printk(KERN_WARNING "smp_send_stop: Not on boot cpu.\n"); @@ -814,7 +809,7 @@ smp_send_stop(void) int smp_call_function_on_cpu (void (*func) (void *info), void *info, int retry, - int wait, unsigned long to_whom) + int wait, cpumask_t to_whom) { struct smp_call_struct data; unsigned long timeout; @@ -827,8 +822,8 @@ smp_call_function_on_cpu (void (*func) (void *info), void *info, int retry, data.info = info; data.wait = wait; - to_whom &= ~(1L << smp_processor_id()); - num_cpus_to_call = hweight64(to_whom); + cpu_clear(smp_processor_id(), to_whom); + num_cpus_to_call = cpus_weight(to_whom); atomic_set(&data.unstarted_count, num_cpus_to_call); atomic_set(&data.unfinished_count, num_cpus_to_call); diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index 307ce54aca38..119501849e95 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c @@ -53,7 +53,6 @@ tsunami_update_irq_hw(unsigned long mask) register int bcpu = boot_cpuid; #ifdef CONFIG_SMP - register unsigned long cpm = cpu_present_mask; volatile unsigned long *dim0, *dim1, *dim2, *dim3; unsigned long mask0, mask1, mask2, mask3, dummy; @@ -72,10 +71,10 @@ tsunami_update_irq_hw(unsigned long mask) dim1 = &cchip->dim1.csr; dim2 = &cchip->dim2.csr; dim3 = &cchip->dim3.csr; - if ((cpm & 1) == 0) dim0 = &dummy; - if ((cpm & 2) == 0) dim1 = &dummy; - if ((cpm & 4) == 0) dim2 = &dummy; - if ((cpm & 8) == 0) dim3 = &dummy; + if (cpu_possible(0)) dim0 = &dummy; + if (cpu_possible(1)) dim1 = &dummy; + if (cpu_possible(2)) dim2 = &dummy; + if (cpu_possible(3)) dim3 = &dummy; *dim0 = mask0; *dim1 = mask1; @@ -164,13 +163,13 @@ clipper_end_irq(unsigned int irq) } static void -cpu_set_irq_affinity(unsigned int irq, unsigned long affinity) +cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) { int cpu; for (cpu = 0; cpu < 4; cpu++) { unsigned long aff = cpu_irq_affinity[cpu]; - if (affinity & (1UL << cpu)) + if (cpu_isset(cpu, affinity)) aff |= 1UL << irq; else aff &= ~(1UL << irq); @@ -179,7 +178,7 @@ cpu_set_irq_affinity(unsigned int irq, unsigned long affinity) } static void -dp264_set_affinity(unsigned int irq, unsigned long affinity) +dp264_set_affinity(unsigned int irq, cpumask_t affinity) { spin_lock(&dp264_irq_lock); cpu_set_irq_affinity(irq, affinity); @@ -188,7 +187,7 @@ dp264_set_affinity(unsigned int irq, unsigned long affinity) } static void -clipper_set_affinity(unsigned int irq, unsigned long affinity) +clipper_set_affinity(unsigned int irq, cpumask_t affinity) { spin_lock(&dp264_irq_lock); cpu_set_irq_affinity(irq - 16, affinity); diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c index 0a5873f7e3fb..3ea81ca1c6d9 100644 --- a/arch/alpha/mm/init.c +++ b/arch/alpha/mm/init.c @@ -106,7 +106,7 @@ show_mem(void) printk("\nMem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); i = max_mapnr; while (i-- > 0) { total++; diff --git a/arch/alpha/mm/numa.c b/arch/alpha/mm/numa.c index 91f5f373f811..31a3f63433f3 100644 --- a/arch/alpha/mm/numa.c +++ b/arch/alpha/mm/numa.c @@ -371,7 +371,7 @@ show_mem(void) printk("\nMem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); for (nid = 0; nid < numnodes; nid++) { struct page * lmem_map = node_mem_map(nid); i = node_spanned_pages(nid); diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 5777a8c2faec..68636bd7c2be 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -674,7 +674,7 @@ int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_ action->handler = handler; action->flags = irq_flags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index d159659677b0..835010c55597 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -97,7 +97,6 @@ unsigned char aux_device_present; char elf_platform[ELF_PLATFORM_SIZE]; EXPORT_SYMBOL(elf_platform); -char saved_command_line[COMMAND_LINE_SIZE]; unsigned long phys_initrd_start __initdata = 0; unsigned long phys_initrd_size __initdata = 0; diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index ee1a3192ad7b..11fa530af3ba 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c @@ -188,7 +188,7 @@ static struct irqchip clps7500_no_chip = { .unmask = cl7500_no_action, }; -static struct irqaction irq_isa = { no_action, 0, 0, "isa", NULL, NULL }; +static struct irqaction irq_isa = { no_action, 0, CPU_MASK_NONE, "isa", NULL, NULL }; static void __init clps7500_init_irq(void) { diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 07ddce79808c..c183e6537114 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -58,7 +58,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); for (node = 0; node < numnodes; node++) { struct page *page, *end; diff --git a/arch/arm26/kernel/irq.c b/arch/arm26/kernel/irq.c index d627cedab805..7869d1b22621 100644 --- a/arch/arm26/kernel/irq.c +++ b/arch/arm26/kernel/irq.c @@ -549,7 +549,7 @@ int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_ action->handler = handler; action->flags = irq_flags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/arm26/kernel/setup.c b/arch/arm26/kernel/setup.c index afb7db526bd3..e02d41867a72 100644 --- a/arch/arm26/kernel/setup.c +++ b/arch/arm26/kernel/setup.c @@ -76,7 +76,6 @@ struct processor processor; unsigned char aux_device_present; char elf_platform[ELF_PLATFORM_SIZE]; -char saved_command_line[COMMAND_LINE_SIZE]; unsigned long phys_initrd_start __initdata = 0; unsigned long phys_initrd_size __initdata = 0; diff --git a/arch/arm26/mm/init.c b/arch/arm26/mm/init.c index a4f56b2b493b..ad41cebe207a 100644 --- a/arch/arm26/mm/init.c +++ b/arch/arm26/mm/init.c @@ -67,7 +67,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); page = NODE_MEM_MAP(0); diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c index c4d78d52f774..298e86a01c01 100644 --- a/arch/cris/arch-v10/kernel/time.c +++ b/arch/cris/arch-v10/kernel/time.c @@ -253,7 +253,7 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) */ static struct irqaction irq2 = { timer_interrupt, SA_SHIRQ | SA_INTERRUPT, - 0, "timer", NULL, NULL}; + CPU_MASK_NONE, "timer", NULL, NULL}; void __init time_init(void) diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c index a963dda74413..94d70279058e 100644 --- a/arch/cris/kernel/irq.c +++ b/arch/cris/kernel/irq.c @@ -240,7 +240,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/cris/kernel/setup.c b/arch/cris/kernel/setup.c index 95a9f4408075..f95b82503281 100644 --- a/arch/cris/kernel/setup.c +++ b/arch/cris/kernel/setup.c @@ -29,10 +29,7 @@ unsigned char aux_device_present; extern int root_mountflags; extern char _etext, _edata, _end; -#define COMMAND_LINE_SIZE 256 - static char command_line[COMMAND_LINE_SIZE] = { 0, }; - char saved_command_line[COMMAND_LINE_SIZE]; extern const unsigned long text_start, edata; /* set by the linker script */ extern unsigned long dram_start, dram_end; diff --git a/arch/cris/mm/init.c b/arch/cris/mm/init.c index d0bd0c957d28..31a0018b525a 100644 --- a/arch/cris/mm/init.c +++ b/arch/cris/mm/init.c @@ -138,7 +138,7 @@ show_mem(void) printk("\nMem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); i = max_mapnr; while (i-- > 0) { total++; diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c index bf5822c5659e..0d9e932372d3 100644 --- a/arch/h8300/kernel/setup.c +++ b/arch/h8300/kernel/setup.c @@ -30,6 +30,7 @@ #include <linux/major.h> #include <linux/bootmem.h> #include <linux/seq_file.h> +#include <linux/init.h> #include <asm/setup.h> #include <asm/irq.h> @@ -54,8 +55,7 @@ unsigned long rom_length; unsigned long memory_start; unsigned long memory_end; -char command_line[512]; -char saved_command_line[512]; +char command_line[COMMAND_LINE_SIZE]; extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end; extern int _ramstart, _ramend; diff --git a/arch/i386/boot/compressed/misc.c b/arch/i386/boot/compressed/misc.c index 200ac3efd01f..fa67045234a3 100644 --- a/arch/i386/boot/compressed/misc.c +++ b/arch/i386/boot/compressed/misc.c @@ -87,12 +87,11 @@ static void gzip_release(void **); */ static unsigned char *real_mode; /* Pointer to real-mode data */ -#define EXT_MEM_K (*(unsigned short *)(real_mode + 0x2)) +#define RM_EXT_MEM_K (*(unsigned short *)(real_mode + 0x2)) #ifndef STANDARD_MEMORY_BIOS_CALL -#define ALT_MEM_K (*(unsigned long *)(real_mode + 0x1e0)) +#define RM_ALT_MEM_K (*(unsigned long *)(real_mode + 0x1e0)) #endif -#define SCREEN_INFO (*(struct screen_info *)(real_mode+0)) -#define EDID_INFO (*(struct edid_info *)(real_mode+0x440)) +#define RM_SCREEN_INFO (*(struct screen_info *)(real_mode+0)) extern char input_data[]; extern int input_len; @@ -174,8 +173,8 @@ static void putstr(const char *s) int x,y,pos; char c; - x = SCREEN_INFO.orig_x; - y = SCREEN_INFO.orig_y; + x = RM_SCREEN_INFO.orig_x; + y = RM_SCREEN_INFO.orig_y; while ( ( c = *s++ ) != '\0' ) { if ( c == '\n' ) { @@ -196,8 +195,8 @@ static void putstr(const char *s) } } - SCREEN_INFO.orig_x = x; - SCREEN_INFO.orig_y = y; + RM_SCREEN_INFO.orig_x = x; + RM_SCREEN_INFO.orig_y = y; pos = (x + cols * y) * 2; /* Update cursor position */ outb_p(14, vidport); @@ -306,9 +305,9 @@ struct { static void setup_normal_output_buffer(void) { #ifdef STANDARD_MEMORY_BIOS_CALL - if (EXT_MEM_K < 1024) error("Less than 2MB of memory"); + if (RM_EXT_MEM_K < 1024) error("Less than 2MB of memory"); #else - if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < 1024) error("Less than 2MB of memory"); + if ((RM_ALT_MEM_K > RM_EXT_MEM_K ? RM_ALT_MEM_K : RM_EXT_MEM_K) < 1024) error("Less than 2MB of memory"); #endif output_data = (char *)0x100000; /* Points to 1M */ free_mem_end_ptr = (long)real_mode; @@ -323,9 +322,11 @@ static void setup_output_buffer_if_we_run_high(struct moveparams *mv) { high_buffer_start = (uch *)(((ulg)&end) + HEAP_SIZE); #ifdef STANDARD_MEMORY_BIOS_CALL - if (EXT_MEM_K < (3*1024)) error("Less than 4MB of memory"); + if (RM_EXT_MEM_K < (3*1024)) error("Less than 4MB of memory"); #else - if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < (3*1024)) error("Less than 4MB of memory"); + if ((RM_ALT_MEM_K > RM_EXT_MEM_K ? RM_ALT_MEM_K : RM_EXT_MEM_K) < + (3*1024)) + error("Less than 4MB of memory"); #endif mv->low_buffer_start = output_data = (char *)LOW_BUFFER_START; low_buffer_end = ((unsigned int)real_mode > LOW_BUFFER_MAX @@ -358,7 +359,7 @@ asmlinkage int decompress_kernel(struct moveparams *mv, void *rmode) { real_mode = rmode; - if (SCREEN_INFO.orig_video_mode == 7) { + if (RM_SCREEN_INFO.orig_video_mode == 7) { vidmem = (char *) 0xb0000; vidport = 0x3b4; } else { @@ -366,8 +367,8 @@ asmlinkage int decompress_kernel(struct moveparams *mv, void *rmode) vidport = 0x3d4; } - lines = SCREEN_INFO.orig_video_lines; - cols = SCREEN_INFO.orig_video_cols; + lines = RM_SCREEN_INFO.orig_video_lines; + cols = RM_SCREEN_INFO.orig_video_cols; if (free_mem_ptr < 0x100000) setup_normal_output_buffer(); else setup_output_buffer_if_we_run_high(mv); diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c index fbb6a591c234..ed44734ab6dd 100644 --- a/arch/i386/kernel/cpu/common.c +++ b/arch/i386/kernel/cpu/common.c @@ -473,7 +473,6 @@ void early_cpu_detect(void); void __init early_cpu_init(void) { - early_cpu_detect(); intel_cpu_init(); cyrix_init_cpu(); nsc_init_cpu(); @@ -483,6 +482,7 @@ void __init early_cpu_init(void) rise_init_cpu(); nexgen_init_cpu(); umc_init_cpu(); + early_cpu_detect(); #ifdef CONFIG_DEBUG_PAGEALLOC /* pse is not compatible with on-the-fly unmapping, diff --git a/arch/i386/kernel/i8259.c b/arch/i386/kernel/i8259.c index 92061fd4cc0b..fc991989284b 100644 --- a/arch/i386/kernel/i8259.c +++ b/arch/i386/kernel/i8259.c @@ -332,7 +332,7 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id, struct pt_regs *regs) * New motherboards sometimes make IRQ 13 be a PCI interrupt, * so allow interrupt sharing. */ -static struct irqaction fpu_irq = { math_error_irq, 0, 0, "fpu", NULL, NULL }; +static struct irqaction fpu_irq = { math_error_irq, 0, CPU_MASK_NONE, "fpu", NULL, NULL }; void __init init_ISA_irqs (void) { diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c index 70f329ed696f..77608646502c 100644 --- a/arch/i386/kernel/io_apic.c +++ b/arch/i386/kernel/io_apic.c @@ -224,7 +224,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask) struct irq_pin_list *entry = irq_2_pin + irq; unsigned int apicid_value; - apicid_value = cpu_mask_to_apicid(mk_cpumask_const(cpumask)); + apicid_value = cpu_mask_to_apicid(cpumask); /* Prepare to do the io_apic_write */ apicid_value = apicid_value << 24; spin_lock_irqsave(&ioapic_lock, flags); @@ -555,7 +555,7 @@ not_worth_the_effort: return; } -int balanced_irq(void *unused) +static int balanced_irq(void *unused) { int i; unsigned long prev_balance_time = jiffies; @@ -568,17 +568,17 @@ int balanced_irq(void *unused) pending_irq_balance_cpumask[i] = cpumask_of_cpu(0); } -repeat: - set_current_state(TASK_INTERRUPTIBLE); - time_remaining = schedule_timeout(time_remaining); - if (time_after(jiffies, prev_balance_time+balanced_irq_interval)) { - Dprintk("balanced_irq: calling do_irq_balance() %lu\n", - jiffies); - do_irq_balance(); - prev_balance_time = jiffies; - time_remaining = balanced_irq_interval; + for ( ; ; ) { + set_current_state(TASK_INTERRUPTIBLE); + time_remaining = schedule_timeout(time_remaining); + if (time_after(jiffies, + prev_balance_time+balanced_irq_interval)) { + do_irq_balance(); + prev_balance_time = jiffies; + time_remaining = balanced_irq_interval; + } } - goto repeat; + return 0; } static int __init balanced_irq_init(void) @@ -1411,12 +1411,17 @@ void __init print_IO_APIC(void) ); } } + if (use_pci_vector()) + printk(KERN_INFO "Using vector-based indexing\n"); printk(KERN_DEBUG "IRQ to pin mappings:\n"); for (i = 0; i < NR_IRQS; i++) { struct irq_pin_list *entry = irq_2_pin + i; if (entry->pin < 0) continue; - printk(KERN_DEBUG "IRQ%d ", i); + if (use_pci_vector() && !platform_legacy_irq(i)) + printk(KERN_DEBUG "IRQ%d ", IO_APIC_VECTOR(i)); + else + printk(KERN_DEBUG "IRQ%d ", i); for (;;) { printk("-> %d:%d", entry->apic, entry->pin); if (!entry->next) diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c index cd2ed69f8367..ba2055a3959b 100644 --- a/arch/i386/kernel/irq.c +++ b/arch/i386/kernel/irq.c @@ -652,7 +652,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c index fc466fb4488a..c077386a4568 100644 --- a/arch/i386/kernel/setup.c +++ b/arch/i386/kernel/setup.c @@ -127,7 +127,6 @@ unsigned long saved_videomode; #define RAMDISK_LOAD_FLAG 0x4000 static char command_line[COMMAND_LINE_SIZE]; - char saved_command_line[COMMAND_LINE_SIZE]; unsigned char __initdata boot_params[PARAM_SIZE]; diff --git a/arch/i386/kernel/smp.c b/arch/i386/kernel/smp.c index c4313dcfe63c..5e3ac93253d2 100644 --- a/arch/i386/kernel/smp.c +++ b/arch/i386/kernel/smp.c @@ -159,7 +159,7 @@ void fastcall send_IPI_self(int vector) */ inline void send_IPI_mask_bitmask(cpumask_t cpumask, int vector) { - unsigned long mask = cpus_coerce(cpumask); + unsigned long mask = cpus_addr(cpumask)[0]; unsigned long cfg; unsigned long flags; diff --git a/arch/i386/mach-default/setup.c b/arch/i386/mach-default/setup.c index 718f718d0d78..0aa08eaa8932 100644 --- a/arch/i386/mach-default/setup.c +++ b/arch/i386/mach-default/setup.c @@ -27,7 +27,7 @@ void __init pre_intr_init_hook(void) /* * IRQ2 is cascade interrupt to second interrupt controller */ -static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL}; +static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; /** * intr_init_hook - post gate setup interrupt initialisation @@ -71,7 +71,7 @@ void __init trap_init_hook(void) { } -static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; +static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; /** * time_init_hook - do any specific initialisations for the system timer. diff --git a/arch/i386/mach-voyager/setup.c b/arch/i386/mach-voyager/setup.c index 9bbf8953f833..df123fc487bb 100644 --- a/arch/i386/mach-voyager/setup.c +++ b/arch/i386/mach-voyager/setup.c @@ -17,7 +17,7 @@ void __init pre_intr_init_hook(void) /* * IRQ2 is cascade interrupt to second interrupt controller */ -static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL}; +static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; void __init intr_init_hook(void) { @@ -40,7 +40,7 @@ void __init trap_init_hook(void) { } -static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; +static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; void __init time_init_hook(void) { diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c index b99561d19839..90c918f11f0b 100644 --- a/arch/i386/mach-voyager/voyager_smp.c +++ b/arch/i386/mach-voyager/voyager_smp.c @@ -153,7 +153,7 @@ static inline void send_CPI_allbutself(__u8 cpi) { __u8 cpu = smp_processor_id(); - __u32 mask = cpus_coerce(cpu_online_map) & ~(1 << cpu); + __u32 mask = cpus_addr(cpu_online_map)[0] & ~(1 << cpu); send_CPI(mask, cpi); } @@ -402,11 +402,11 @@ find_smp_config(void) /* set up everything for just this CPU, we can alter * this as we start the other CPUs later */ /* now get the CPU disposition from the extended CMOS */ - phys_cpu_present_map = cpus_promote(voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK)); - cpus_coerce(phys_cpu_present_map) |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8; - cpus_coerce(phys_cpu_present_map) |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 2) << 16; - cpus_coerce(phys_cpu_present_map) |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 3) << 24; - printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n", cpus_coerce(phys_cpu_present_map)); + cpus_addr(phys_cpu_present_map)[0] = voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK); + cpus_addr(phys_cpu_present_map)[0] |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 1) << 8; + cpus_addr(phys_cpu_present_map)[0] |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 2) << 16; + cpus_addr(phys_cpu_present_map)[0] |= voyager_extended_cmos_read(VOYAGER_PROCESSOR_PRESENT_MASK + 3) << 24; + printk("VOYAGER SMP: phys_cpu_present_map = 0x%lx\n", cpus_addr(phys_cpu_present_map)[0]); /* Here we set up the VIC to enable SMP */ /* enable the CPIs by writing the base vector to their register */ outb(VIC_DEFAULT_CPI_BASE, VIC_CPI_BASE_REGISTER); @@ -706,12 +706,12 @@ smp_boot_cpus(void) /* now that the cat has probed the Voyager System Bus, sanity * check the cpu map */ if( ((voyager_quad_processors | voyager_extended_vic_processors) - & cpus_coerce(phys_cpu_present_map)) != cpus_coerce(phys_cpu_present_map)) { + & cpus_addr(phys_cpu_present_map)[0]) != cpus_addr(phys_cpu_present_map)[0]) { /* should panic */ printk("\n\n***WARNING*** Sanity check of CPU present map FAILED\n"); } } else if(voyager_level == 4) - voyager_extended_vic_processors = cpus_coerce(phys_cpu_present_map); + voyager_extended_vic_processors = cpus_addr(phys_cpu_present_map)[0]; /* this sets up the idle task to run on the current cpu */ voyager_extended_cpus = 1; @@ -909,7 +909,7 @@ flush_tlb_others (unsigned long cpumask, struct mm_struct *mm, if (!cpumask) BUG(); - if ((cpumask & cpus_coerce(cpu_online_map)) != cpumask) + if ((cpumask & cpus_addr(cpu_online_map)[0]) != cpumask) BUG(); if (cpumask & (1 << smp_processor_id())) BUG(); @@ -952,7 +952,7 @@ flush_tlb_current_task(void) preempt_disable(); - cpu_mask = cpus_coerce(mm->cpu_vm_mask) & ~(1 << smp_processor_id()); + cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id()); local_flush_tlb(); if (cpu_mask) flush_tlb_others(cpu_mask, mm, FLUSH_ALL); @@ -968,7 +968,7 @@ flush_tlb_mm (struct mm_struct * mm) preempt_disable(); - cpu_mask = cpus_coerce(mm->cpu_vm_mask) & ~(1 << smp_processor_id()); + cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id()); if (current->active_mm == mm) { if (current->mm) @@ -989,7 +989,7 @@ void flush_tlb_page(struct vm_area_struct * vma, unsigned long va) preempt_disable(); - cpu_mask = cpus_coerce(mm->cpu_vm_mask) & ~(1 << smp_processor_id()); + cpu_mask = cpus_addr(mm->cpu_vm_mask)[0] & ~(1 << smp_processor_id()); if (current->active_mm == mm) { if(current->mm) __flush_tlb_one(va); @@ -1098,7 +1098,7 @@ smp_call_function (void (*func) (void *info), void *info, int retry, int wait) { struct call_data_struct data; - __u32 mask = cpus_coerce(cpu_online_map); + __u32 mask = cpus_addr(cpu_online_map)[0]; mask &= ~(1<<smp_processor_id()); @@ -1789,9 +1789,9 @@ set_vic_irq_affinity(unsigned int irq, cpumask_t mask) unsigned long irq_mask = 1 << irq; int cpu; - real_mask = cpus_coerce(mask) & voyager_extended_vic_processors; + real_mask = cpus_addr(mask)[0] & voyager_extended_vic_processors; - if(cpus_coerce(mask) == 0) + if(cpus_addr(mask)[0] == 0) /* can't have no cpu's to accept the interrupt -- extremely * bad things will happen */ return; diff --git a/arch/i386/mm/discontig.c b/arch/i386/mm/discontig.c index c1de0903db02..ad04cfd73dc9 100644 --- a/arch/i386/mm/discontig.c +++ b/arch/i386/mm/discontig.c @@ -129,8 +129,11 @@ static void __init find_max_pfn_node(int nid) } /* - * Allocate memory for the pg_data_t via a crude pre-bootmem method - * We ought to relocate these onto their own node later on during boot. + * Allocate memory for the pg_data_t for this node via a crude pre-bootmem + * method. For node zero take this from the bottom of memory, for + * subsequent nodes place them at node_remap_start_vaddr which contains + * node local data in physically node local memory. See setup_memory() + * for details. */ static void __init allocate_pgdat(int nid) { diff --git a/arch/i386/mm/pgtable.c b/arch/i386/mm/pgtable.c index 49561339cbcc..137d18db72ff 100644 --- a/arch/i386/mm/pgtable.c +++ b/arch/i386/mm/pgtable.c @@ -33,7 +33,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); for_each_pgdat(pgdat) { for (i = 0; i < pgdat->node_spanned_pages; ++i) { page = pgdat->node_mem_map + i; diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c index 98bea6d85b03..d58d307778ca 100644 --- a/arch/i386/power/cpu.c +++ b/arch/i386/power/cpu.c @@ -27,7 +27,6 @@ #include <asm/tlbflush.h> static struct saved_context saved_context; -static void fix_processor_context(void); unsigned long saved_context_eax, saved_context_ebx; unsigned long saved_context_ecx, saved_context_edx; @@ -37,33 +36,38 @@ unsigned long saved_context_eflags; extern void enable_sep_cpu(void *); -void save_processor_state(void) +void __save_processor_state(struct saved_context *ctxt) { kernel_fpu_begin(); /* * descriptor tables */ - asm volatile ("sgdt %0" : "=m" (saved_context.gdt_limit)); - asm volatile ("sidt %0" : "=m" (saved_context.idt_limit)); - asm volatile ("sldt %0" : "=m" (saved_context.ldt)); - asm volatile ("str %0" : "=m" (saved_context.tr)); + asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit)); + asm volatile ("sidt %0" : "=m" (ctxt->idt_limit)); + asm volatile ("sldt %0" : "=m" (ctxt->ldt)); + asm volatile ("str %0" : "=m" (ctxt->tr)); /* * segment registers */ - asm volatile ("movw %%es, %0" : "=m" (saved_context.es)); - asm volatile ("movw %%fs, %0" : "=m" (saved_context.fs)); - asm volatile ("movw %%gs, %0" : "=m" (saved_context.gs)); - asm volatile ("movw %%ss, %0" : "=m" (saved_context.ss)); + asm volatile ("movw %%es, %0" : "=m" (ctxt->es)); + asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs)); + asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs)); + asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss)); /* * control registers */ - asm volatile ("movl %%cr0, %0" : "=r" (saved_context.cr0)); - asm volatile ("movl %%cr2, %0" : "=r" (saved_context.cr2)); - asm volatile ("movl %%cr3, %0" : "=r" (saved_context.cr3)); - asm volatile ("movl %%cr4, %0" : "=r" (saved_context.cr4)); + asm volatile ("movl %%cr0, %0" : "=r" (ctxt->cr0)); + asm volatile ("movl %%cr2, %0" : "=r" (ctxt->cr2)); + asm volatile ("movl %%cr3, %0" : "=r" (ctxt->cr3)); + asm volatile ("movl %%cr4, %0" : "=r" (ctxt->cr4)); +} + +void save_processor_state(void) +{ + __save_processor_state(&saved_context); } static void @@ -75,32 +79,59 @@ do_fpu_end(void) mxcsr_feature_mask_init(); } -void restore_processor_state(void) + +static void fix_processor_context(void) +{ + int cpu = smp_processor_id(); + struct tss_struct * t = init_tss + cpu; + + set_tss_desc(cpu,t); /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */ + cpu_gdt_table[cpu][GDT_ENTRY_TSS].b &= 0xfffffdff; + + load_TR_desc(); /* This does ltr */ + load_LDT(¤t->active_mm->context); /* This does lldt */ + + /* + * Now maybe reload the debug registers + */ + if (current->thread.debugreg[7]){ + loaddebug(¤t->thread, 0); + loaddebug(¤t->thread, 1); + loaddebug(¤t->thread, 2); + loaddebug(¤t->thread, 3); + /* no 4 and 5 */ + loaddebug(¤t->thread, 6); + loaddebug(¤t->thread, 7); + } + +} + +void __restore_processor_state(struct saved_context *ctxt) { /* * control registers */ - asm volatile ("movl %0, %%cr4" :: "r" (saved_context.cr4)); - asm volatile ("movl %0, %%cr3" :: "r" (saved_context.cr3)); - asm volatile ("movl %0, %%cr2" :: "r" (saved_context.cr2)); - asm volatile ("movl %0, %%cr0" :: "r" (saved_context.cr0)); + asm volatile ("movl %0, %%cr4" :: "r" (ctxt->cr4)); + asm volatile ("movl %0, %%cr3" :: "r" (ctxt->cr3)); + asm volatile ("movl %0, %%cr2" :: "r" (ctxt->cr2)); + asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0)); /* * segment registers */ - asm volatile ("movw %0, %%es" :: "r" (saved_context.es)); - asm volatile ("movw %0, %%fs" :: "r" (saved_context.fs)); - asm volatile ("movw %0, %%gs" :: "r" (saved_context.gs)); - asm volatile ("movw %0, %%ss" :: "r" (saved_context.ss)); + asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); + asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs)); + asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs)); + asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss)); /* * now restore the descriptor tables to their proper values * ltr is done i fix_processor_context(). */ - asm volatile ("lgdt %0" :: "m" (saved_context.gdt_limit)); - asm volatile ("lidt %0" :: "m" (saved_context.idt_limit)); - asm volatile ("lldt %0" :: "m" (saved_context.ldt)); + asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit)); + asm volatile ("lidt %0" :: "m" (ctxt->idt_limit)); + asm volatile ("lldt %0" :: "m" (ctxt->ldt)); /* * sysenter MSRs @@ -112,31 +143,11 @@ void restore_processor_state(void) do_fpu_end(); } -static void fix_processor_context(void) +void restore_processor_state(void) { - int cpu = smp_processor_id(); - struct tss_struct * t = init_tss + cpu; - - set_tss_desc(cpu,t); /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */ - cpu_gdt_table[cpu][GDT_ENTRY_TSS].b &= 0xfffffdff; - - load_TR_desc(); /* This does ltr */ - load_LDT(¤t->active_mm->context); /* This does lldt */ - - /* - * Now maybe reload the debug registers - */ - if (current->thread.debugreg[7]){ - loaddebug(¤t->thread, 0); - loaddebug(¤t->thread, 1); - loaddebug(¤t->thread, 2); - loaddebug(¤t->thread, 3); - /* no 4 and 5 */ - loaddebug(¤t->thread, 6); - loaddebug(¤t->thread, 7); - } - + __restore_processor_state(&saved_context); } + EXPORT_SYMBOL(save_processor_state); EXPORT_SYMBOL(restore_processor_state); diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c index 3087c13d08d7..8355dda0188c 100644 --- a/arch/ia64/kernel/irq.c +++ b/arch/ia64/kernel/irq.c @@ -607,7 +607,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index aa2cb4fc3e54..3f4dc188995b 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c @@ -88,10 +88,6 @@ unsigned char aux_device_present = 0xaa; /* XXX remove this when legacy I unsigned long ia64_max_iommu_merge_mask = ~0UL; EXPORT_SYMBOL(ia64_max_iommu_merge_mask); -#define COMMAND_LINE_SIZE 512 - -char saved_command_line[COMMAND_LINE_SIZE]; /* used in proc filesystem */ - /* * We use a special marker for the end of memory and it uses the extra (+1) slot */ diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c index 183533a62dbd..c0f8f4a3e019 100644 --- a/arch/ia64/mm/contig.c +++ b/arch/ia64/mm/contig.c @@ -43,7 +43,7 @@ show_mem (void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); i = max_mapnr; while (i-- > 0) { if (!pfn_valid(i)) diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c index b8472d960191..788aa84e3420 100644 --- a/arch/ia64/mm/discontig.c +++ b/arch/ia64/mm/discontig.c @@ -498,7 +498,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); for_each_pgdat(pgdat) { printk("Node ID: %d\n", pgdat->node_id); for(i = 0; i < pgdat->node_spanned_pages; i++) { diff --git a/arch/m68k/atari/stram.c b/arch/m68k/atari/stram.c index b03d03163496..f7cfaa6db534 100644 --- a/arch/m68k/atari/stram.c +++ b/arch/m68k/atari/stram.c @@ -743,7 +743,7 @@ static int unswap_by_read(unsigned short *map, unsigned long max, if (map[i]) { entry = swp_entry(stram_swap_type, i); - DPRINTK("unswap: map[i=%lu]=%u nr_swap=%u\n", + DPRINTK("unswap: map[i=%lu]=%u nr_swap=%ld\n", i, map[i], nr_swap_pages); swap_device_lock(stram_swap_info); @@ -772,7 +772,7 @@ static int unswap_by_read(unsigned short *map, unsigned long max, #endif } - DPRINTK( "unswap: map[i=%lu]=%u nr_swap=%u\n", + DPRINTK( "unswap: map[i=%lu]=%u nr_swap=%ld\n", i, map[i], nr_swap_pages ); swap_list_lock(); swap_device_lock(stram_swap_info); diff --git a/arch/m68k/kernel/setup.c b/arch/m68k/kernel/setup.c index 2ede4125bd13..7680eabc3337 100644 --- a/arch/m68k/kernel/setup.c +++ b/arch/m68k/kernel/setup.c @@ -62,7 +62,6 @@ struct mem_info m68k_memory[NUM_MEMINFO]; static struct mem_info m68k_ramdisk; static char m68k_command_line[CL_SIZE]; -char saved_command_line[CL_SIZE]; char m68k_debug_device[6] = ""; diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c index d79dbfae6b21..c45beb955943 100644 --- a/arch/m68k/mm/init.c +++ b/arch/m68k/mm/init.c @@ -47,7 +47,7 @@ void show_mem(void) printk("\nMem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); i = max_mapnr; while (i-- > 0) { total++; diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c index 1f8977e7948e..90d82d961abe 100644 --- a/arch/m68k/q40/config.c +++ b/arch/m68k/q40/config.c @@ -64,7 +64,6 @@ void q40_set_vectors (void); extern void q40_mksound(unsigned int /*freq*/, unsigned int /*ticks*/ ); -extern char *saved_command_line; extern char m68k_debug_device[]; static void q40_mem_console_write(struct console *co, const char *b, unsigned int count); diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c index bd6a4a89f65f..bb680024f1d7 100644 --- a/arch/m68knommu/kernel/setup.c +++ b/arch/m68knommu/kernel/setup.c @@ -31,6 +31,7 @@ #include <linux/bootmem.h> #include <linux/seq_file.h> #include <linux/root_dev.h> +#include <linux/init.h> #include <asm/setup.h> #include <asm/irq.h> @@ -44,8 +45,7 @@ unsigned long rom_length; unsigned long memory_start; unsigned long memory_end; -char command_line[512]; -char saved_command_line[512]; +char command_line[COMMAND_LINE_SIZE]; /* setup some dummy routines */ static void dummy_waitbut(void) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 080eb3c37aba..ebfd35e5544d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -96,11 +96,13 @@ config NEC_EAGLE select DMA_NONCOHERENT select IRQ_CPU depends on MACH_VR41XX + select HW_HAS_PCI config TANBAC_TB0226 bool "Support for TANBAC TB0226 (Mbase)" depends on MACH_VR41XX select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU help The TANBAC TB0226 (Mbase) is a MIPS-based platform manufactured by TANBAC. @@ -110,6 +112,7 @@ config TANBAC_TB0229 bool "Support for TANBAC TB0229 (VR4131DIMM)" depends on MACH_VR41XX select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU help The TANBAC TB0229 (VR4131DIMM) is a MIPS-based platform manufactured by TANBAC. @@ -118,6 +121,7 @@ config TANBAC_TB0229 config VICTOR_MPC30X bool "Support for Victor MP-C303/304" select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU depends on MACH_VR41XX @@ -125,17 +129,22 @@ config ZAO_CAPCELLA bool "Support for ZAO Networks Capcella" depends on MACH_VR41XX select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU +config PCI_VR41XX + bool "Add PCI control unit support of NEC VR4100 series" + depends on MACH_VR41XX && PCI + config VRC4171 - tristate "add NEC VRC4171 companion chip support" + tristate "Add NEC VRC4171 companion chip support" depends on MACH_VR41XX && ISA ---help--- The NEC VRC4171/4171A is a companion chip for NEC VR4111/VR4121. config VRC4173 - tristate "add NEC VRC4173 companion chip support" - depends on MACH_VR41XX && PCI + tristate "Add NEC VRC4173 companion chip support" + depends on MACH_VR41XX && PCI_VR41XX ---help--- The NEC VRC4173 is a companion chip for NEC VR4122/VR4131. @@ -143,11 +152,13 @@ config TOSHIBA_JMR3927 bool "Support for Toshiba JMR-TX3927 board" depends on MIPS32 select DMA_NONCOHERENT + select HW_HAS_PCI config MIPS_COBALT bool "Support for Cobalt Server (EXPERIMENTAL)" depends on EXPERIMENTAL select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU config MACH_DECSTATION @@ -174,6 +185,7 @@ config MIPS_EV64120 bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)" depends on EXPERIMENTAL select DMA_NONCOHERENT + select HW_HAS_PCI help This is an evaluation board based on the Galileo GT-64120 single-chip system controller that contains a MIPS R5000 compatible @@ -189,6 +201,7 @@ config MIPS_EV96100 bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)" depends on EXPERIMENTAL select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU select MIPS_GT96100 select RM7000_CPU_SCACHE @@ -201,6 +214,7 @@ config MIPS_EV96100 config MIPS_IVR bool "Support for Globespan IVR board" select DMA_NONCOHERENT + select HW_HAS_PCI help This is an evaluation board built by Globespan to showcase thir iVR (Internet Video Recorder) design. It utilizes a QED RM5231 @@ -211,6 +225,7 @@ config MIPS_IVR config LASAT bool "Support for LASAT Networks platforms" select DMA_NONCOHERENT + select HW_HAS_PCI select R5000_CPU_SCACHE config PICVUE @@ -233,11 +248,13 @@ config HP_LASERJET bool "Support for Hewlett Packard LaserJet board" depends on BROKEN select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU config MIPS_ITE8172 bool "Support for ITE 8172G board" select DMA_NONCOHERENT + select HW_HAS_PCI help Ths is an evaluation board made by ITE <http://www.ite.com.tw/> with ATX form factor that utilizes a MIPS R5000 to work with its @@ -257,6 +274,7 @@ config IT8172_REVC config MIPS_ATLAS bool "Support for MIPS Atlas board" select DMA_NONCOHERENT + select HW_HAS_PCI help This enables support for the QED R5231-based MIPS Atlas evaluation board. @@ -265,6 +283,7 @@ config MIPS_MALTA bool "Support for MIPS Malta board" select HAVE_STD_PC_SERIAL_PORT select DMA_NONCOHERENT + select HW_HAS_PCI help This enables support for the VR5000-based MIPS Malta evaluation board. @@ -278,6 +297,7 @@ config MIPS_SEAD config MOMENCO_OCELOT bool "Support for Momentum Ocelot board" select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU select IRQ_CPU_RM7K select RM7000_CPU_SCACHE @@ -288,6 +308,7 @@ config MOMENCO_OCELOT config MOMENCO_OCELOT_G bool "Support for Momentum Ocelot-G board" select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU select IRQ_CPU_RM7K select RM7000_CPU_SCACHE @@ -298,6 +319,7 @@ config MOMENCO_OCELOT_G config MOMENCO_OCELOT_C bool "Support for Momentum Ocelot-C board" select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU select RM7000_CPU_SCACHE help @@ -307,6 +329,7 @@ config MOMENCO_OCELOT_C config MOMENCO_JAGUAR_ATX bool "Support for Momentum Jaguar board" select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU select IRQ_CPU_RM7K select LIMITED_DMA @@ -324,7 +347,10 @@ config JAGUAR_DMALOW config PMC_YOSEMITE bool "Support for PMC-Sierra Yosemite eval board" - select DMA_NONCOHERENT + select DMA_COHERENT + select HW_HAS_PCI + select IRQ_CPU + select IRQ_CPU_RM7K help Yosemite is an evaluation board for the RM9000x2 processor manufactured by PMC-Sierra @@ -338,6 +364,7 @@ config DDB5074 depends on EXPERIMENTAL select DMA_NONCOHERENT select HAVE_STD_PC_SERIAL_PORT + select HW_HAS_PCI select IRQ_CPU select ISA help @@ -348,6 +375,7 @@ config DDB5476 bool "Support for NEC DDB Vrc-5476" select DMA_NONCOHERENT select HAVE_STD_PC_SERIAL_PORT + select HW_HAS_PCI select IRQ_CPU select ISA help @@ -361,6 +389,7 @@ config DDB5476 config DDB5477 bool "Support for NEC DDB Vrc-5477" select DMA_NONCOHERENT + select HW_HAS_PCI select IRQ_CPU help This enables support for the R5432-based NEC DDB Vrc-5477, @@ -393,6 +422,7 @@ config SGI_IP27 bool "Support for SGI IP27 (Origin200/2000)" depends on MIPS64 select DMA_IP27 + select HW_HAS_PCI help This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics workstations. To compile a Linux kernel that runs on these, say Y @@ -457,6 +487,7 @@ config SGI_IP32 bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" depends on EXPERIMENTAL select DMA_NONCOHERENT + select HW_HAS_PCI select R5000_CPU_SCACHE select RM7000_CPU_SCACHE help @@ -499,26 +530,31 @@ config MIPS_PB1000 bool "PB1000 board" depends on SOC_AU1000 select DMA_NONCOHERENT + select HW_HAS_PCI config MIPS_PB1100 bool "PB1100 board" depends on SOC_AU1100 select DMA_NONCOHERENT + select HW_HAS_PCI config MIPS_PB1500 bool "PB1500 board" depends on SOC_AU1500 select DMA_NONCOHERENT + select HW_HAS_PCI config MIPS_PB1550 bool "PB1550 board" depends on SOC_AU1550 select DMA_NONCOHERENT + select HW_HAS_PCI config MIPS_DB1000 bool "DB1000 board" depends on SOC_AU1000 select DMA_NONCOHERENT + select HW_HAS_PCI config MIPS_DB1100 bool "DB1100 board" @@ -529,10 +565,12 @@ config MIPS_DB1500 bool "DB1500 board" depends on SOC_AU1500 select DMA_NONCOHERENT + select HW_HAS_PCI config MIPS_DB1550 bool "DB1550 board" depends on SOC_AU1550 + select HW_HAS_PCI config MIPS_BOSPORUS bool "Bosporus board" @@ -642,6 +680,7 @@ endchoice config SIBYTE_SB1250 bool + select HW_HAS_PCI config SIBYTE_BCM1120 bool @@ -649,10 +688,12 @@ config SIBYTE_BCM1120 config SIBYTE_BCM1125 bool + select HW_HAS_PCI select SIBYTE_BCM112X config SIBYTE_BCM1125H bool + select HW_HAS_PCI select SIBYTE_BCM112X config SIBYTE_BCM112X @@ -699,11 +740,6 @@ endchoice config CPU_SB1_PASS_2 bool -config SIBYTE_HAS_PCI - bool - depends on SIBYTE_SB1250 || SIBYTE_BCM1125 || SIBYTE_BCM1125H - default y - config SIBYTE_HAS_LDT bool depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H) @@ -770,6 +806,7 @@ config SNI_RM200_PCI bool "Support for SNI RM200 PCI" select DMA_NONCOHERENT select HAVE_STD_PC_SERIAL_PORT + select HW_HAS_PCI select ISA help The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens @@ -781,6 +818,7 @@ config TOSHIBA_RBTX4927 bool "Support for Toshiba TBTX49[23]7 board" depends on MIPS32 select DMA_NONCOHERENT + select HW_HAS_PCI select ISA config RWSEM_GENERIC_SPINLOCK @@ -860,11 +898,6 @@ config IRQ_CPU config IRQ_CPU_RM7K bool -config DUMMY_KEYB - bool - depends on ZAO_CAPCELLA || VICTOR_MPC30X || SIBYTE_SB1xxx_SOC || NEC_EAGLE || NEC_OSPREY || DDB5477 || CASIO_E55 || TANBAC_TB0226 || TANBAC_TB0229 - default y - config DDB5XXX_COMMON bool depends on DDB5074 || DDB5476 || DDB5477 @@ -1164,6 +1197,16 @@ config PAGE_SIZE_4KB 4kB page size will minimize memory consumption and is therefore recommended for low memory systems. +config PAGE_SIZE_8KB + bool "8kB" + depends on EXPERIMENTAL && CPU_R8000 + help + Using 8kB page size will result in higher performance kernel at + the price of higher memory consumption. This option is available + only on the R8000 processor. Not that at the time of this writing + this option is still high experimental; there are also issues with + compatibility of user applications. + config PAGE_SIZE_16KB bool "16kB" depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX @@ -1377,9 +1420,12 @@ endmenu menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" +config HW_HAS_PCI + bool + config PCI bool "Support for PCI controller" - depends on MIPS_DB1000 || DDB5074 || DDB5476 || DDB5477 || HP_LASERJET || LASAT || MIPS_IVR || MIPS_ATLAS || MIPS_COBALT || MIPS_EV64120 || MIPS_EV96100 || MIPS_ITE8172 || MIPS_MALTA || MOMENCO_OCELOT || MOMENCO_OCELOT_C || MOMENCO_OCELOT_G || MOMENCO_JAGUAR_ATX || MIPS_PB1000 || MIPS_PB1100 || SOC_AU1500 || SOC_AU1550 || NEC_EAGLE || SGI_IP27 || SGI_IP32 || SIBYTE_HAS_PCI || SNI_RM200_PCI || TANBAC_TB0226 || TANBAC_TB0229 || TOSHIBA_JMR3927 || TOSHIBA_RBTX4927 || VICTOR_MPC30X || ZAO_CAPCELLA + depends on HW_HAS_PCI help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside @@ -1559,7 +1605,7 @@ config DEBUG_STACK_USAGE config DEBUG_SLAB bool "Debug memory allocations" - depends on DEBUG_KERNEL && !CPU_HAS_LLDSCD + depends on DEBUG_KERNEL help Say Y here to have the kernel do limited verification on memory allocation as well as poisoning memory on free to catch use of freed diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 8c4fb4b1d33f..c1aabc835f62 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -406,6 +406,13 @@ core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/ load-$(CONFIG_MOMENCO_OCELOT_C) += 0x80100000 # +# PMC-Sierra Yosemite +# +core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/ +cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite +load-$(CONFIG_PMC_YOSEMITE) += 0x80100000 + +# # Momentum Jaguar ATX # core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/ @@ -659,8 +666,6 @@ libs-$(CONFIG_MIPS32) += arch/mips/lib-32/ libs-$(CONFIG_MIPS64) += arch/mips/lib-64/ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ -core-$(CONFIG_MIPS32) += arch/mips/mm-32/ -core-$(CONFIG_MIPS64) += arch/mips/mm-64/ ifdef CONFIG_BAGET_MIPS diff --git a/arch/mips/baget/irq.c b/arch/mips/baget/irq.c index fe158acf8921..d2067c037c35 100644 --- a/arch/mips/baget/irq.c +++ b/arch/mips/baget/irq.c @@ -325,7 +325,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; @@ -389,7 +389,7 @@ static void write_err_interrupt(int irq, void *dev_id, struct pt_regs * regs) } static struct irqaction irq0 = -{ write_err_interrupt, SA_INTERRUPT, 0, "bus write error", NULL, NULL}; +{ write_err_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "bus write error", NULL, NULL}; void __init init_IRQ(void) { diff --git a/arch/mips/baget/time.c b/arch/mips/baget/time.c index 205bde31215e..ed82c62df3d6 100644 --- a/arch/mips/baget/time.c +++ b/arch/mips/baget/time.c @@ -67,7 +67,7 @@ static void __init timer_enable(void) } static struct irqaction timer_irq = -{ timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; +{ timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; void __init time_init(void) { diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile index a6e88d3180cb..c010290e55a6 100644 --- a/arch/mips/boot/Makefile +++ b/arch/mips/boot/Makefile @@ -39,7 +39,7 @@ $(obj)/addinitrd: $(obj)/addinitrd.c archhelp: @echo '* vmlinux.ecoff - ECOFF boot image' -CLEAN_FILES += addinitrd \ +clean-files += addinitrd \ elf2ecoff \ vmlinux.ecoff \ vmlinux.srec \ diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig index 9814c8e6dc79..cd4da1fb9f85 100644 --- a/arch/mips/configs/atlas_defconfig +++ b/arch/mips/configs/atlas_defconfig @@ -107,6 +107,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -121,6 +122,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -197,7 +199,6 @@ CONFIG_BLK_DEV_SD=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # # CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set @@ -216,11 +217,11 @@ CONFIG_BLK_DEV_SD=y # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_DPT_I2O is not set # CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_SATA is not set # CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_EATA is not set # CONFIG_SCSI_EATA_PIO is not set @@ -229,6 +230,7 @@ CONFIG_BLK_DEV_SD=y # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set # CONFIG_SCSI_QLOGIC_ISP is not set # CONFIG_SCSI_QLOGIC_FC is not set # CONFIG_SCSI_QLOGIC_1280 is not set @@ -395,7 +397,6 @@ CONFIG_NET_ETHERNET=y # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -616,7 +617,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -651,3 +651,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/bosporus_defconfig b/arch/mips/configs/bosporus_defconfig index edf9ced7a727..2b71a0410b4e 100644 --- a/arch/mips/configs/bosporus_defconfig +++ b/arch/mips/configs/bosporus_defconfig @@ -105,6 +105,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -496,6 +497,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -567,7 +571,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -652,11 +655,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig index 910a796dfb0f..44799daa96b6 100644 --- a/arch/mips/configs/capcella_defconfig +++ b/arch/mips/configs/capcella_defconfig @@ -59,7 +59,8 @@ CONFIG_MACH_VR41XX=y # CONFIG_TANBAC_TB0229 is not set # CONFIG_VICTOR_MPC30X is not set CONFIG_ZAO_CAPCELLA=y -# CONFIG_VRC4173 is not set +CONFIG_PCI_VR41XX=y +CONFIG_VRC4173=y # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set @@ -91,7 +92,6 @@ CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_DUMMY_KEYB=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_FB is not set @@ -116,6 +116,7 @@ CONFIG_CPU_VR41XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -126,6 +127,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -185,7 +187,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -197,6 +198,7 @@ CONFIG_IDE_TASKFILE_IO=y # CONFIG_IDE_GENERIC=y # CONFIG_BLK_DEV_IDEPCI is not set +# CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -214,7 +216,6 @@ CONFIG_IDE_GENERIC=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -357,7 +358,6 @@ CONFIG_NET_ETHERNET=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -591,7 +591,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -626,3 +625,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig index fb148427e050..c3fda0f4e154 100644 --- a/arch/mips/configs/cobalt_defconfig +++ b/arch/mips/configs/cobalt_defconfig @@ -104,6 +104,7 @@ CONFIG_CPU_NEVADA=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -116,6 +117,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -176,7 +178,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -188,6 +189,7 @@ CONFIG_IDE_TASKFILE_IO=y # CONFIG_IDE_GENERIC=y # CONFIG_BLK_DEV_IDEPCI is not set +# CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -205,7 +207,6 @@ CONFIG_IDE_GENERIC=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -344,7 +345,6 @@ CONFIG_NET_ETHERNET=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -567,7 +567,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -602,3 +601,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig index fbb3ecda03ca..3ec36c06285c 100644 --- a/arch/mips/configs/db1000_defconfig +++ b/arch/mips/configs/db1000_defconfig @@ -122,6 +122,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -136,6 +137,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y # CONFIG_PCI is not set CONFIG_MMU=y @@ -522,6 +524,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -593,7 +598,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -678,11 +682,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig index 088b3a1069c8..f649a7cafc04 100644 --- a/arch/mips/configs/db1100_defconfig +++ b/arch/mips/configs/db1100_defconfig @@ -122,6 +122,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -518,6 +519,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -589,7 +593,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -674,11 +677,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig index 86ecbe185aa3..ff5ec324a67e 100644 --- a/arch/mips/configs/db1500_defconfig +++ b/arch/mips/configs/db1500_defconfig @@ -122,6 +122,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -136,6 +137,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y # CONFIG_PCI is not set CONFIG_MMU=y @@ -259,7 +261,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=m # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set @@ -271,6 +272,7 @@ CONFIG_BLK_DEV_IDECS=m # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y +# CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -592,6 +594,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -665,7 +670,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -750,11 +754,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig index 5f74857ae904..2385348b99a7 100644 --- a/arch/mips/configs/ddb5476_defconfig +++ b/arch/mips/configs/ddb5476_defconfig @@ -105,6 +105,7 @@ CONFIG_CPU_R5432=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -117,6 +118,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -179,7 +181,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -191,6 +192,7 @@ CONFIG_IDE_TASKFILE_IO=y # CONFIG_IDE_GENERIC=y # CONFIG_BLK_DEV_IDEPCI is not set +# CONFIG_IDE_ARM is not set # CONFIG_IDE_CHIPSETS is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set @@ -214,7 +216,6 @@ CONFIG_IDE_GENERIC=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -363,7 +364,6 @@ CONFIG_NET_ETHERNET=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -487,6 +487,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_MATROX is not set @@ -606,7 +607,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -641,3 +641,4 @@ CONFIG_CMDLINE="ip=any" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig index 13222c363ccf..3a2e7ca35066 100644 --- a/arch/mips/configs/ddb5477_defconfig +++ b/arch/mips/configs/ddb5477_defconfig @@ -80,7 +80,6 @@ CONFIG_DMA_NONCOHERENT=y CONFIG_I8259=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_DUMMY_KEYB=y CONFIG_DDB5XXX_COMMON=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_FB is not set @@ -106,6 +105,7 @@ CONFIG_CPU_R5432=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -118,6 +118,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -184,7 +185,6 @@ CONFIG_TRAD_SIGNALS=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -345,7 +345,6 @@ CONFIG_PCNET32=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -567,7 +566,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -602,3 +600,4 @@ CONFIG_CMDLINE="ip=any" # Library routines # CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig index 9f41a3d0f6e4..c2bf43ff126b 100644 --- a/arch/mips/configs/decstation_defconfig +++ b/arch/mips/configs/decstation_defconfig @@ -109,6 +109,7 @@ CONFIG_CPU_R3000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -184,7 +185,6 @@ CONFIG_BLK_DEV_SD=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # # CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set @@ -537,7 +537,6 @@ CONFIG_RAMFS=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -587,3 +586,4 @@ CONFIG_CMDLINE="" # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig index b0154fa605f7..cda052941dbb 100644 --- a/arch/mips/configs/e55_defconfig +++ b/arch/mips/configs/e55_defconfig @@ -91,7 +91,6 @@ CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_DUMMY_KEYB=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_FB is not set @@ -116,6 +115,7 @@ CONFIG_CPU_VR41XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -180,7 +180,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -191,6 +190,7 @@ CONFIG_IDE_TASKFILE_IO=y # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y +# CONFIG_IDE_ARM is not set # CONFIG_IDE_CHIPSETS is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set @@ -570,7 +570,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -605,3 +604,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/eagle_defconfig b/arch/mips/configs/eagle_defconfig index 9a4517f6afbd..78feb1ac0945 100644 --- a/arch/mips/configs/eagle_defconfig +++ b/arch/mips/configs/eagle_defconfig @@ -59,6 +59,7 @@ CONFIG_NEC_EAGLE=y # CONFIG_TANBAC_TB0229 is not set # CONFIG_VICTOR_MPC30X is not set # CONFIG_ZAO_CAPCELLA is not set +CONFIG_PCI_VR41XX=y CONFIG_VRC4173=y # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_MIPS_COBALT is not set @@ -91,7 +92,6 @@ CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_DUMMY_KEYB=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_FB is not set @@ -116,6 +116,7 @@ CONFIG_CPU_VR41XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -126,6 +127,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -261,7 +263,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y CONFIG_IDEDISK_MULTI_MODE=y -# CONFIG_IDEDISK_STROKE is not set CONFIG_BLK_DEV_IDECS=y # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set @@ -274,6 +275,7 @@ CONFIG_IDE_TASKFILE_IO=y # CONFIG_IDE_GENERIC=y # CONFIG_BLK_DEV_IDEPCI is not set +# CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -291,7 +293,6 @@ CONFIG_IDE_GENERIC=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -447,7 +448,6 @@ CONFIG_PCMCIA_PCNET=m # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -692,7 +692,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -739,11 +738,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig index 2cbeb69b967a..f1c310de72cc 100644 --- a/arch/mips/configs/ev64120_defconfig +++ b/arch/mips/configs/ev64120_defconfig @@ -111,6 +111,7 @@ CONFIG_CPU_R5000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_64BIT_PHYS_ADDR is not set @@ -124,6 +125,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -191,7 +193,6 @@ CONFIG_TRAD_SIGNALS=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -339,7 +340,6 @@ CONFIG_PPP_ASYNC=y # CONFIG_PPP_BSDCOMP is not set # CONFIG_PPPOE is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -559,7 +559,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -594,3 +593,4 @@ CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/nfs rw nfsroot=192.168.1.1:/mnt/d # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig index 4d6bd5352903..506214b4bbeb 100644 --- a/arch/mips/configs/ev96100_defconfig +++ b/arch/mips/configs/ev96100_defconfig @@ -110,6 +110,7 @@ CONFIG_CPU_RM7000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_BOARD_SCACHE=y @@ -126,6 +127,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y # CONFIG_PCI is not set CONFIG_MMU=y @@ -514,7 +516,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -549,3 +550,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 912beee0c66c..83d850031444 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig @@ -114,6 +114,7 @@ CONFIG_CPU_R5000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_BOARD_SCACHE=y @@ -196,7 +197,6 @@ CONFIG_BLK_DEV_SR=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # # CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set @@ -750,7 +750,6 @@ CONFIG_RPCSEC_GSS_KRB5=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -850,11 +849,13 @@ CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index c7cff248c5c7..a75dfcdd4bf4 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -113,6 +113,7 @@ CONFIG_CPU_R10000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -128,6 +129,7 @@ CONFIG_NR_CPUS=64 # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -203,7 +205,6 @@ CONFIG_CHR_DEV_ST=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # # CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y @@ -226,7 +227,6 @@ CONFIG_SCSI_SPI_ATTRS=y # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_SATA is not set # CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_EATA is not set # CONFIG_SCSI_EATA_PIO is not set @@ -235,6 +235,7 @@ CONFIG_SCSI_SPI_ATTRS=y # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set CONFIG_SCSI_QLOGIC_ISP=y # CONFIG_SCSI_QLOGIC_FC is not set # CONFIG_SCSI_QLOGIC_1280 is not set @@ -267,6 +268,7 @@ CONFIG_SCSI_QLA2XXX=y # # I2O device support # +# CONFIG_I2O is not set # # Networking support @@ -638,7 +640,6 @@ CONFIG_RPCSEC_GSS_KRB5=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -700,11 +701,13 @@ CONFIG_CRYPTO_CAST6=y CONFIG_CRYPTO_ARC4=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index 7dcbf62c9219..f6e3592da18b 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig @@ -102,6 +102,7 @@ CONFIG_CPU_R5000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_BOARD_SCACHE=y @@ -116,6 +117,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -193,7 +195,6 @@ CONFIG_CHR_DEV_SG=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_REPORT_LUNS is not set CONFIG_SCSI_CONSTANTS=y CONFIG_SCSI_LOGGING=y @@ -222,7 +223,6 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_SATA is not set # CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_EATA is not set # CONFIG_SCSI_EATA_PIO is not set @@ -231,6 +231,7 @@ CONFIG_AIC7XXX_REG_PRETTY_PRINT=y # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set # CONFIG_SCSI_QLOGIC_ISP is not set # CONFIG_SCSI_QLOGIC_FC is not set # CONFIG_SCSI_QLOGIC_1280 is not set @@ -263,6 +264,7 @@ CONFIG_SCSI_QLA2XXX=y # # I2O device support # +# CONFIG_I2O is not set # # Networking support @@ -617,7 +619,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -663,3 +664,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig index d7f83618a35a..3460da6ad76a 100644 --- a/arch/mips/configs/it8172_defconfig +++ b/arch/mips/configs/it8172_defconfig @@ -110,6 +110,7 @@ CONFIG_CPU_NEVADA=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -122,6 +123,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y # CONFIG_PCI is not set CONFIG_MMU=y @@ -231,7 +233,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -242,6 +243,7 @@ CONFIG_IDE_TASKFILE_IO=y # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y +# CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -615,7 +617,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -650,3 +651,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig index 58a83eece110..4f3e01b3b8cc 100644 --- a/arch/mips/configs/ivr_defconfig +++ b/arch/mips/configs/ivr_defconfig @@ -108,6 +108,7 @@ CONFIG_CPU_NEVADA=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -120,6 +121,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -179,7 +181,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -191,6 +192,7 @@ CONFIG_IDE_TASKFILE_IO=y # CONFIG_IDE_GENERIC=y # CONFIG_BLK_DEV_IDEPCI is not set +# CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -208,7 +210,6 @@ CONFIG_IDE_GENERIC=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -350,7 +351,6 @@ CONFIG_NET_ETHERNET=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -571,7 +571,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -606,3 +605,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig index 99cda767b71c..f28e0657e6a7 100644 --- a/arch/mips/configs/jaguar-atx_defconfig +++ b/arch/mips/configs/jaguar-atx_defconfig @@ -100,6 +100,7 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_CPU_RM9000=y # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_BOARD_SCACHE=y @@ -118,6 +119,7 @@ CONFIG_HIGHMEM=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -184,7 +186,6 @@ CONFIG_TRAD_SIGNALS=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -538,3 +539,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index 95e463724cda..17b715a04735 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig @@ -104,6 +104,7 @@ CONFIG_CPU_TX39XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -115,6 +116,7 @@ CONFIG_RTC_DS1742=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -182,7 +184,6 @@ CONFIG_TRAD_SIGNALS=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -324,7 +325,6 @@ CONFIG_NET_ETHERNET=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -462,6 +462,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_MATROX is not set @@ -578,7 +579,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -613,3 +613,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig index f7208748c51f..d5874a83fbf4 100644 --- a/arch/mips/configs/lasat200_defconfig +++ b/arch/mips/configs/lasat200_defconfig @@ -112,6 +112,7 @@ CONFIG_CPU_R5000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_BOARD_SCACHE=y @@ -127,6 +128,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y # CONFIG_PCI_NAMES is not set @@ -242,7 +244,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y CONFIG_IDEDISK_MULTI_MODE=y -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -283,6 +284,7 @@ CONFIG_BLK_DEV_CMD64X=y # CONFIG_BLK_DEV_SLC90E66 is not set # CONFIG_BLK_DEV_TRM290 is not set # CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_IDE_ARM is not set CONFIG_BLK_DEV_IDEDMA=y # CONFIG_IDEDMA_IVB is not set CONFIG_IDEDMA_AUTO=y @@ -301,7 +303,6 @@ CONFIG_IDEDMA_AUTO=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -438,7 +439,6 @@ CONFIG_NET_ETHERNET=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -665,7 +665,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -700,3 +699,4 @@ CONFIG_CMDLINE="" # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index 67a995528818..87e171b5f008 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig @@ -115,6 +115,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -129,6 +130,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -197,7 +199,6 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -357,7 +358,6 @@ CONFIG_PCNET32=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -580,7 +580,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -615,3 +614,4 @@ CONFIG_CMDLINE="" # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/mirage_defconfig b/arch/mips/configs/mirage_defconfig index edf9ced7a727..2b71a0410b4e 100644 --- a/arch/mips/configs/mirage_defconfig +++ b/arch/mips/configs/mirage_defconfig @@ -105,6 +105,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -496,6 +497,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -567,7 +571,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -652,11 +655,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig index 3ccf5a617072..a78627cddd1d 100644 --- a/arch/mips/configs/mpc30x_defconfig +++ b/arch/mips/configs/mpc30x_defconfig @@ -59,6 +59,7 @@ CONFIG_MACH_VR41XX=y # CONFIG_TANBAC_TB0229 is not set CONFIG_VICTOR_MPC30X=y # CONFIG_ZAO_CAPCELLA is not set +CONFIG_PCI_VR41XX=y CONFIG_VRC4173=y # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_MIPS_COBALT is not set @@ -91,7 +92,6 @@ CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_DUMMY_KEYB=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_FB is not set @@ -116,6 +116,7 @@ CONFIG_CPU_VR41XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -126,6 +127,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -192,7 +194,6 @@ CONFIG_TRAD_SIGNALS=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -335,7 +336,6 @@ CONFIG_NET_ETHERNET=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -555,7 +555,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -602,11 +601,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig index edf9ced7a727..2b71a0410b4e 100644 --- a/arch/mips/configs/mtx1_defconfig +++ b/arch/mips/configs/mtx1_defconfig @@ -105,6 +105,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -496,6 +497,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -567,7 +571,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -652,11 +655,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig index f33d867cc300..704bd7e7845d 100644 --- a/arch/mips/configs/ocelot_c_defconfig +++ b/arch/mips/configs/ocelot_c_defconfig @@ -100,6 +100,7 @@ CONFIG_CPU_RM7000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_BOARD_SCACHE=y @@ -114,7 +115,10 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # -# CONFIG_PCI is not set +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +CONFIG_PCI_LEGACY_PROC=y +CONFIG_PCI_NAMES=y CONFIG_MMU=y # @@ -154,8 +158,13 @@ CONFIG_BINFMT_ELF32=y # Block devices # # CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_CARMEL is not set # CONFIG_BLK_DEV_RAM is not set # @@ -185,6 +194,7 @@ CONFIG_BINFMT_ELF32=y # # I2O device support # +# CONFIG_I2O is not set # # Networking support @@ -258,26 +268,50 @@ CONFIG_NETDEVICES=y # CONFIG_ETHERTAP is not set # +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y # CONFIG_MII is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_NET_PCI is not set # # Ethernet (1000 Mbit) # -CONFIG_MV64340_ETH=y -CONFIG_MV64340_ETH_0=y -# CONFIG_MV64340_ETH_1 is not set -# CONFIG_MV64340_ETH_2 is not set +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_MV64340_ETH is not set # # Ethernet (10000 Mbit) # +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set # # Token Ring devices # +# CONFIG_TR is not set # # Wireless LAN (non-hamradio) @@ -288,6 +322,8 @@ CONFIG_MV64340_ETH_0=y # Wan interfaces # # CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_SHAPER is not set @@ -329,6 +365,7 @@ CONFIG_SERIO=y # CONFIG_SERIO_I8042 is not set CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_PCIPS2 is not set # # Input Device Drivers @@ -426,6 +463,7 @@ CONFIG_DUMMY_CONSOLE=y # # USB support # +# CONFIG_USB is not set # # USB Gadget Support @@ -509,7 +547,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -544,3 +581,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig index c3d713ac4ebd..e83e3f965082 100644 --- a/arch/mips/configs/ocelot_defconfig +++ b/arch/mips/configs/ocelot_defconfig @@ -108,6 +108,7 @@ CONFIG_CPU_RM7000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_BOARD_SCACHE=y @@ -124,6 +125,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y # CONFIG_PCI is not set CONFIG_MMU=y @@ -513,7 +515,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -548,3 +549,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig new file mode 100644 index 000000000000..d8e4d007a8c5 --- /dev/null +++ b/arch/mips/configs/ocelot_g_defconfig @@ -0,0 +1,587 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_MIPS=y +CONFIG_MIPS64=y +CONFIG_64BIT=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_STANDALONE=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_HOTPLUG is not set +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set + +# +# Loadable module support +# +# CONFIG_MODULES is not set + +# +# Machine selection +# +# CONFIG_MACH_JAZZ is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MIPS_EV96100 is not set +# CONFIG_MIPS_IVR is not set +# CONFIG_LASAT is not set +# CONFIG_MIPS_ITE8172 is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_MOMENCO_OCELOT is not set +CONFIG_MOMENCO_OCELOT_G=y +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_DDB5074 is not set +# CONFIG_DDB5476 is not set +# CONFIG_DDB5477 is not set +# CONFIG_NEC_OSPREY is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_SB1xxx_SOC is not set +# CONFIG_SNI_RM200_PCI is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_HAVE_DEC_LOCK=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_CPU_LITTLE_ENDIAN is not set +CONFIG_IRQ_CPU=y +CONFIG_IRQ_CPU_RM7K=y +CONFIG_SWAP_IO_SPACE=y +# CONFIG_SYSCLK_75 is not set +# CONFIG_SYSCLK_83 is not set +CONFIG_SYSCLK_100=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_FB is not set + +# +# CPU selection +# +# CONFIG_CPU_MIPS32 is not set +# CONFIG_CPU_MIPS64 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +CONFIG_CPU_RM7000=y +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_BOARD_SCACHE=y +CONFIG_RM7000_CPU_SCACHE=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_LLDSCD=y +CONFIG_CPU_HAS_SYNC=y +# CONFIG_PREEMPT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +CONFIG_PCI_LEGACY_PROC=y +CONFIG_PCI_NAMES=y +CONFIG_MMU=y + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_MIPS32_COMPAT=y +CONFIG_COMPAT=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS32_N32=y +CONFIG_BINFMT_ELF32=y + +# +# Device Drivers +# + +# +# Generic Driver Options +# + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_CARMEL is not set +# CONFIG_BLK_DEV_RAM is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_PACKET is not set +CONFIG_NETLINK_DEV=y +CONFIG_UNIX=y +CONFIG_NET_KEY=y +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_ETHERTAP is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_GALILEO_64240_ETH=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_NET_PCI is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO_PCIPS2 is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_QIC02_TAPE is not set + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +# CONFIG_USB is not set + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_FAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_SYSFS=y +# CONFIG_DEVFS_FS is not set +CONFIG_DEVPTS_FS_XATTR=y +CONFIG_DEVPTS_FS_SECURITY=y +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=y +# CONFIG_NFSD_V3 is not set +# CONFIG_NFSD_TCP is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_EXPORTFS=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Kernel hacking +# +CONFIG_CROSSCOMPILE=y +CONFIG_CMDLINE="" +# CONFIG_DEBUG_KERNEL is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +# CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/osprey_defconfig b/arch/mips/configs/osprey_defconfig index 6d6e26201134..c7a3bbd48560 100644 --- a/arch/mips/configs/osprey_defconfig +++ b/arch/mips/configs/osprey_defconfig @@ -83,7 +83,6 @@ CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_DUMMY_KEYB=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_FB is not set CONFIG_VR4181=y @@ -109,6 +108,7 @@ CONFIG_CPU_VR41XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -507,7 +507,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -542,3 +541,4 @@ CONFIG_CMDLINE="ip=bootp ether=46,0x03fe0300,eth0" # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m diff --git a/arch/mips/configs/pb1000_defconfig b/arch/mips/configs/pb1000_defconfig index edf9ced7a727..2b71a0410b4e 100644 --- a/arch/mips/configs/pb1000_defconfig +++ b/arch/mips/configs/pb1000_defconfig @@ -105,6 +105,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -496,6 +497,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -567,7 +571,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -652,11 +655,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig index edf9ced7a727..2b71a0410b4e 100644 --- a/arch/mips/configs/pb1100_defconfig +++ b/arch/mips/configs/pb1100_defconfig @@ -105,6 +105,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -496,6 +497,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -567,7 +571,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -652,11 +655,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig index 533dc53ae283..fbf01a172524 100644 --- a/arch/mips/configs/pb1500_defconfig +++ b/arch/mips/configs/pb1500_defconfig @@ -123,6 +123,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -137,6 +138,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -213,7 +215,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set @@ -254,6 +255,7 @@ CONFIG_BLK_DEV_HPT366=y # CONFIG_BLK_DEV_SLC90E66 is not set # CONFIG_BLK_DEV_TRM290 is not set # CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_IDE_ARM is not set CONFIG_BLK_DEV_IDEDMA=y # CONFIG_IDEDMA_IVB is not set # CONFIG_IDEDMA_AUTO is not set @@ -272,7 +274,6 @@ CONFIG_BLK_DEV_IDEDMA=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -452,7 +453,6 @@ CONFIG_PPP_DEFLATE=m # CONFIG_PPP_BSDCOMP is not set CONFIG_PPPOE=m # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -611,6 +611,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -682,7 +685,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -767,11 +769,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig index ad953c3a9630..382b9f126477 100644 --- a/arch/mips/configs/pb1550_defconfig +++ b/arch/mips/configs/pb1550_defconfig @@ -122,6 +122,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -136,6 +137,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -212,7 +214,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECS is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set @@ -253,6 +254,7 @@ CONFIG_BLK_DEV_HPT366=y # CONFIG_BLK_DEV_SLC90E66 is not set # CONFIG_BLK_DEV_TRM290 is not set # CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_IDE_ARM is not set CONFIG_BLK_DEV_IDEDMA=y # CONFIG_IDEDMA_IVB is not set # CONFIG_IDEDMA_AUTO is not set @@ -271,7 +273,6 @@ CONFIG_BLK_DEV_IDEDMA=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -451,7 +452,6 @@ CONFIG_PPP_DEFLATE=m # CONFIG_PPP_BSDCOMP is not set CONFIG_PPPOE=m # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -610,6 +610,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -681,7 +684,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -766,11 +768,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index 2317b23ed6e1..68d9ef86ac1c 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig @@ -116,6 +116,7 @@ CONFIG_CPU_R4X00=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_64BIT_PHYS_ADDR is not set @@ -129,6 +130,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y # CONFIG_PCI_NAMES is not set @@ -246,7 +248,6 @@ CONFIG_BLK_DEV_SR_VENDOR=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # # CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set @@ -268,12 +269,12 @@ CONFIG_SCSI_SPI_ATTRS=y # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_DPT_I2O is not set # CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_IN2000 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_SATA is not set # CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set # CONFIG_SCSI_EATA is not set @@ -294,6 +295,7 @@ CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 # CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set +# CONFIG_SCSI_IPR is not set # CONFIG_SCSI_PAS16 is not set # CONFIG_SCSI_PSI240I is not set # CONFIG_SCSI_QLOGIC_FAS is not set @@ -695,7 +697,6 @@ CONFIG_PLIP=m # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -908,6 +909,7 @@ CONFIG_USB_WACOM=m CONFIG_USB_KBTAB=m CONFIG_USB_POWERMATE=m # CONFIG_USB_MTOUCH is not set +CONFIG_USB_EGALAX=m CONFIG_USB_XPAD=m # CONFIG_USB_ATI_REMOTE is not set @@ -1016,6 +1018,7 @@ CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m CONFIG_USB_LED=m CONFIG_USB_CYTHERM=m +CONFIG_USB_PHIDGETSERVO=m CONFIG_USB_TEST=m # @@ -1051,10 +1054,14 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y CONFIG_JFS_FS=m # CONFIG_JFS_POSIX_ACL is not set # CONFIG_JFS_DEBUG is not set # CONFIG_JFS_STATISTICS is not set +CONFIG_FS_POSIX_ACL=y CONFIG_XFS_FS=m # CONFIG_XFS_RT is not set CONFIG_XFS_QUOTA=y @@ -1140,6 +1147,7 @@ CONFIG_RPCSEC_GSS_KRB5=m CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set CONFIG_NCP_FS=m CONFIG_NCPFS_PACKET_SIGNING=y CONFIG_NCPFS_IOCTL_LOCKING=y @@ -1151,7 +1159,6 @@ CONFIG_NCPFS_NLS=y CONFIG_NCPFS_EXTRAS=y CONFIG_CODA_FS=m CONFIG_CODA_FS_OLD_API=y -CONFIG_INTERMEZZO_FS=m CONFIG_AFS_FS=m CONFIG_RXRPC=m @@ -1252,11 +1259,13 @@ CONFIG_CRYPTO_CAST6=m # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=m CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_CRC32C is not set CONFIG_CRYPTO_TEST=m # # Library routines # CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=m CONFIG_ZLIB_DEFLATE=m diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 593f119b4b76..7d3c4df26207 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig @@ -93,7 +93,6 @@ CONFIG_CPU_SB1_PASS_1=y # CONFIG_CPU_SB1_PASS_4 is not set # CONFIG_CPU_SB1_PASS_2_112x is not set # CONFIG_CPU_SB1_PASS_3 is not set -CONFIG_SIBYTE_HAS_PCI=y CONFIG_SIBYTE_HAS_LDT=y # CONFIG_SIMULATION is not set CONFIG_SIBYTE_CFE=y @@ -107,7 +106,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_COHERENT=y # CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_DUMMY_KEYB=y CONFIG_SWAP_IO_SPACE=y CONFIG_BOOT_ELF32=y CONFIG_MIPS_L1_CACHE_SHIFT=5 @@ -134,6 +132,7 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_CPU_RM9000 is not set CONFIG_CPU_SB1=y CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_SIBYTE_DMA_PAGEOPS is not set @@ -154,6 +153,7 @@ CONFIG_NR_CPUS=2 # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -213,7 +213,30 @@ CONFIG_BLK_DEV_INITRD=y # # ATA/ATAPI/MFM/RLL support # -# CONFIG_IDE is not set +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +CONFIG_BLK_DEV_IDECD=y +CONFIG_BLK_DEV_IDETAPE=y +CONFIG_BLK_DEV_IDEFLOPPY=y +# CONFIG_IDE_TASK_IOCTL is not set +# CONFIG_IDE_TASKFILE_IO is not set + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +# CONFIG_BLK_DEV_IDEPCI is not set +CONFIG_BLK_DEV_IDE_SWARM=y +# CONFIG_IDE_ARM is not set +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set # # SCSI device support @@ -228,7 +251,6 @@ CONFIG_BLK_DEV_INITRD=y # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -371,7 +393,6 @@ CONFIG_NET_SB1250_MAC=y # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -575,7 +596,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -623,11 +643,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig index ba93024bf7ad..d9b6532c23c4 100644 --- a/arch/mips/configs/sead_defconfig +++ b/arch/mips/configs/sead_defconfig @@ -19,7 +19,6 @@ CONFIG_BROKEN_ON_SMP=y # CONFIG_SWAP=y # CONFIG_SYSVIPC is not set -# CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set @@ -103,6 +102,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -429,3 +429,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig index f32841b8023d..818bf63b72ea 100644 --- a/arch/mips/configs/tb0226_defconfig +++ b/arch/mips/configs/tb0226_defconfig @@ -90,7 +90,6 @@ CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_DUMMY_KEYB=y CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_FB=y @@ -115,6 +114,7 @@ CONFIG_CPU_VR41XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -125,6 +125,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y # CONFIG_PCI is not set CONFIG_MMU=y @@ -179,7 +180,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y CONFIG_IDEDISK_MULTI_MODE=y -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -191,6 +191,7 @@ CONFIG_IDE_TASKFILE_IO=y # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y +# CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set @@ -215,7 +216,6 @@ CONFIG_CHR_DEV_SG=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # CONFIG_SCSI_MULTI_LUN=y -# CONFIG_SCSI_REPORT_LUNS is not set CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set @@ -608,7 +608,6 @@ CONFIG_SMB_NLS_REMOTE="cp932" # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -681,5 +680,6 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig index 730a994abc2c..146c70cd6944 100644 --- a/arch/mips/configs/tb0229_defconfig +++ b/arch/mips/configs/tb0229_defconfig @@ -59,7 +59,8 @@ CONFIG_MACH_VR41XX=y CONFIG_TANBAC_TB0229=y # CONFIG_VICTOR_MPC30X is not set # CONFIG_ZAO_CAPCELLA is not set -# CONFIG_VRC4173 is not set +CONFIG_PCI_VR41XX=y +CONFIG_VRC4173=y # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set @@ -91,7 +92,6 @@ CONFIG_HAVE_DEC_LOCK=y CONFIG_DMA_NONCOHERENT=y CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_IRQ_CPU=y -CONFIG_DUMMY_KEYB=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_FB is not set CONFIG_TANBAC_TB0219=y @@ -117,6 +117,7 @@ CONFIG_CPU_VR41XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -127,6 +128,7 @@ CONFIG_CPU_HAS_SYNC=y # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y CONFIG_PCI=y CONFIG_PCI_LEGACY_PROC=y CONFIG_PCI_NAMES=y @@ -196,7 +198,6 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # Fusion MPT device support # -# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support @@ -355,7 +356,6 @@ CONFIG_SLIP=m CONFIG_SLIP_COMPRESSED=y CONFIG_SLIP_SMART=y CONFIG_SLIP_MODE_SLIP6=y -# CONFIG_RCPCI is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set @@ -599,7 +599,6 @@ CONFIG_SMB_NLS_REMOTE="cp932" # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -672,5 +671,6 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=m diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig index cfe12d1c4a7f..e1923900c710 100644 --- a/arch/mips/configs/workpad_defconfig +++ b/arch/mips/configs/workpad_defconfig @@ -115,6 +115,7 @@ CONFIG_CPU_VR41XX=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set # CONFIG_CPU_ADVANCED is not set @@ -179,7 +180,6 @@ CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set # CONFIG_BLK_DEV_IDECD is not set # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set @@ -190,6 +190,7 @@ CONFIG_IDE_TASKFILE_IO=y # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y +# CONFIG_IDE_ARM is not set # CONFIG_IDE_CHIPSETS is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set @@ -573,7 +574,6 @@ CONFIG_SUNRPC=y # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -608,3 +608,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/configs/xxs1500_defconfig b/arch/mips/configs/xxs1500_defconfig index edf9ced7a727..188176e34b83 100644 --- a/arch/mips/configs/xxs1500_defconfig +++ b/arch/mips/configs/xxs1500_defconfig @@ -105,6 +105,7 @@ CONFIG_CPU_MIPS32=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -496,6 +497,9 @@ CONFIG_FS_MBCACHE=y CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set @@ -567,7 +571,6 @@ CONFIG_SMB_FS=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -652,11 +655,13 @@ CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_ARC4 is not set CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_TEST is not set # # Library routines # CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig index fc1eddbbd1d2..37d39a6677b5 100644 --- a/arch/mips/configs/yosemite_defconfig +++ b/arch/mips/configs/yosemite_defconfig @@ -9,20 +9,20 @@ CONFIG_MIPS32=y # # Code maturity level options # -CONFIG_EXPERIMENTAL=y +# CONFIG_EXPERIMENTAL is not set CONFIG_CLEAN_COMPILE=y CONFIG_STANDALONE=y +CONFIG_BROKEN_ON_SMP=y # # General setup # CONFIG_SWAP=y CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=15 +CONFIG_LOG_BUF_SHIFT=14 # CONFIG_HOTPLUG is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y @@ -41,47 +41,40 @@ CONFIG_IOSCHED_CFQ=y # CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set CONFIG_OBSOLETE_MODPARM=y -CONFIG_MODVERSIONS=y CONFIG_KMOD=y -CONFIG_STOP_MACHINE=y # # Machine selection # # CONFIG_MACH_JAZZ is not set -# CONFIG_BAGET_MIPS is not set # CONFIG_MACH_VR41XX is not set # CONFIG_TOSHIBA_JMR3927 is not set -# CONFIG_MIPS_COBALT is not set # CONFIG_MACH_DECSTATION is not set -# CONFIG_MIPS_EV64120 is not set -# CONFIG_MIPS_EV96100 is not set # CONFIG_MIPS_IVR is not set # CONFIG_LASAT is not set # CONFIG_MIPS_ITE8172 is not set # CONFIG_MIPS_ATLAS is not set # CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SEAD is not set # CONFIG_MOMENCO_OCELOT is not set # CONFIG_MOMENCO_OCELOT_G is not set # CONFIG_MOMENCO_OCELOT_C is not set # CONFIG_MOMENCO_JAGUAR_ATX is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_DDB5074 is not set +CONFIG_PMC_YOSEMITE=y +# CONFIG_HYPERTRANSPORT is not set # CONFIG_DDB5476 is not set # CONFIG_DDB5477 is not set # CONFIG_NEC_OSPREY is not set # CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP32 is not set # CONFIG_SOC_AU1X00 is not set -# CONFIG_SIBYTE_SB1xxx_SOC is not set # CONFIG_SNI_RM200_PCI is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_HAVE_DEC_LOCK=y +CONFIG_DMA_COHERENT=y # CONFIG_CPU_LITTLE_ENDIAN is not set +CONFIG_IRQ_CPU=y +CONFIG_IRQ_CPU_RM7K=y CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_FB is not set @@ -106,6 +99,7 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_CPU_RM9000=y # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_CPU_HAS_PREFETCH=y @@ -114,15 +108,18 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_LLSC=y CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y -# CONFIG_HIGHMEM is not set -CONFIG_SMP=y -CONFIG_NR_CPUS=2 +CONFIG_HIGHMEM=y +# CONFIG_SMP is not set # CONFIG_PREEMPT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # # Bus options (PCI, PCMCIA, EISA, ISA, TC) # +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +CONFIG_PCI_LEGACY_PROC=y +CONFIG_PCI_NAMES=y CONFIG_MMU=y # @@ -159,11 +156,14 @@ CONFIG_TRAD_SIGNALS=y # Block devices # # CONFIG_BLK_DEV_FD is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_CARMEL is not set # CONFIG_BLK_DEV_RAM is not set -CONFIG_LBD=y +# CONFIG_LBD is not set # # ATA/ATAPI/MFM/RLL support @@ -173,40 +173,7 @@ CONFIG_LBD=y # # SCSI device support # -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_CHR_DEV_SG=y - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -CONFIG_SCSI_REPORT_LUNS=y -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI Transport Attributes -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set - -# -# SCSI low-level drivers -# -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI is not set # # Multi-device support (RAID and LVM) @@ -225,6 +192,7 @@ CONFIG_SCSI_REPORT_LUNS=y # # I2O device support # +# CONFIG_I2O is not set # # Networking support @@ -234,46 +202,31 @@ CONFIG_NET=y # # Networking options # -CONFIG_PACKET=y +CONFIG_PACKET=m CONFIG_PACKET_MMAP=y -# CONFIG_NETLINK_DEV is not set +CONFIG_NETLINK_DEV=m CONFIG_UNIX=y # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set # CONFIG_SYN_COOKIES is not set # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set # CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set # CONFIG_BRIDGE is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_FASTROUTE is not set -# CONFIG_NET_HW_FLOWCONTROL is not set # # QoS and/or fair queueing @@ -296,22 +249,49 @@ CONFIG_NETDEVICES=y # CONFIG_TUN is not set # +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y -# CONFIG_MII is not set +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_NET_PCI is not set # # Ethernet (1000 Mbit) # +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_R8169 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +CONFIG_TITAN_GE=y # # Ethernet (10000 Mbit) # +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set # # Token Ring devices # +# CONFIG_TR is not set # # Wireless LAN (non-hamradio) @@ -322,10 +302,9 @@ CONFIG_NET_ETHERNET=y # Wan interfaces # # CONFIG_WAN is not set +# CONFIG_FDDI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set # # ISDN subsystem @@ -351,10 +330,8 @@ CONFIG_NET_ETHERNET=y # # CONFIG_GAMEPORT is not set CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set +# CONFIG_SERIO is not set +# CONFIG_SERIO_I8042 is not set # # Input Device Drivers @@ -364,22 +341,21 @@ CONFIG_SERIO_SERPORT=y # Character devices # # CONFIG_VT is not set -CONFIG_SERIAL_NONSTANDARD=y -# CONFIG_ROCKETPORT is not set -# CONFIG_CYCLADES is not set -# CONFIG_SYNCLINK is not set -# CONFIG_SYNCLINKMP is not set -# CONFIG_N_HDLC is not set -# CONFIG_STALDRV is not set +# CONFIG_SERIAL_NONSTANDARD is not set # # Serial drivers # -# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set # # Non-8250 serial port support # +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 @@ -403,6 +379,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # # Ftape, the floppy tape device driver # +# CONFIG_FTAPE is not set # CONFIG_AGP is not set # CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set @@ -438,6 +415,7 @@ CONFIG_LEGACY_PTY_COUNT=256 # # USB support # +# CONFIG_USB is not set # # USB Gadget Support @@ -448,13 +426,8 @@ CONFIG_LEGACY_PTY_COUNT=256 # File systems # # CONFIG_EXT2_FS is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_XFS_FS is not set @@ -482,7 +455,6 @@ CONFIG_FS_MBCACHE=y CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set # CONFIG_DEVPTS_FS_XATTR is not set CONFIG_TMPFS=y # CONFIG_HUGETLB_PAGE is not set @@ -491,13 +463,7 @@ CONFIG_RAMFS=y # # Miscellaneous filesystems # -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set # CONFIG_HPFS_FS is not set @@ -509,22 +475,16 @@ CONFIG_RAMFS=y # Network File Systems # CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFS_V3 is not set # CONFIG_NFSD is not set CONFIG_ROOT_NFS=y CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y # CONFIG_EXPORTFS is not set CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set -# CONFIG_AFS_FS is not set # # Partition Types @@ -558,3 +518,4 @@ CONFIG_CMDLINE="" # Library routines # # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/mips/ddb5xxx/ddb5074/irq.c b/arch/mips/ddb5xxx/ddb5074/irq.c index dc4e643496b2..547386de484a 100644 --- a/arch/mips/ddb5xxx/ddb5074/irq.c +++ b/arch/mips/ddb5xxx/ddb5074/irq.c @@ -24,7 +24,7 @@ extern asmlinkage void ddbIRQ(void); -static struct irqaction irq_cascade = { no_action, 0, 0, "cascade", NULL, NULL }; +static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; #define M1543_PNP_CONFIG 0x03f0 /* PnP Config Port */ #define M1543_PNP_INDEX 0x03f0 /* PnP Index Port */ diff --git a/arch/mips/ddb5xxx/ddb5476/irq.c b/arch/mips/ddb5xxx/ddb5476/irq.c index 58e794f01ed5..6a1202aec98f 100644 --- a/arch/mips/ddb5xxx/ddb5476/irq.c +++ b/arch/mips/ddb5xxx/ddb5476/irq.c @@ -107,8 +107,8 @@ static void nile4_irq_setup(void) /* memory resource acquire in ddb_setup */ } -static struct irqaction irq_cascade = { no_action, 0, 0, "cascade", NULL, NULL }; -static struct irqaction irq_error = { no_action, 0, 0, "error", NULL, NULL }; +static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; +static struct irqaction irq_error = { no_action, 0, CPU_MASK_NONE, "error", NULL, NULL }; extern asmlinkage void ddb5476_handle_int(void); extern int setup_irq(unsigned int irq, struct irqaction *irqaction); diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c index 0ae83365fe75..dfc2559aaace 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq.c +++ b/arch/mips/ddb5xxx/ddb5477/irq.c @@ -77,7 +77,7 @@ extern void vrc5477_irq_init(u32 base); extern void mips_cpu_irq_init(u32 base); extern asmlinkage void ddb5477_handle_int(void); extern int setup_irq(unsigned int irq, struct irqaction *irqaction); -static struct irqaction irq_cascade = { no_action, 0, 0, "cascade", NULL, NULL }; +static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; void ddb5477_irq_setup(void) diff --git a/arch/mips/defconfig b/arch/mips/defconfig index 912beee0c66c..83d850031444 100644 --- a/arch/mips/defconfig +++ b/arch/mips/defconfig @@ -114,6 +114,7 @@ CONFIG_CPU_R5000=y # CONFIG_CPU_RM9000 is not set # CONFIG_CPU_SB1 is not set CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_BOARD_SCACHE=y @@ -196,7 +197,6 @@ CONFIG_BLK_DEV_SR=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # # CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set @@ -750,7 +750,6 @@ CONFIG_RPCSEC_GSS_KRB5=m # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -850,11 +849,13 @@ CONFIG_CRYPTO_CAST6=m CONFIG_CRYPTO_ARC4=m CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_CRC32C=m # CONFIG_CRYPTO_TEST is not set # # Library routines # # CONFIG_CRC32 is not set +CONFIG_LIBCRC32C=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y diff --git a/arch/mips/gt64120/common/time.c b/arch/mips/gt64120/common/time.c index 86a2100db00d..44f33caf298e 100644 --- a/arch/mips/gt64120/common/time.c +++ b/arch/mips/gt64120/common/time.c @@ -80,7 +80,7 @@ void gt64120_time_init(void) timer.name = "timer"; timer.dev_id = NULL; timer.next = NULL; - timer.mask = 0; + timer.mask = CPU_MASK_NONE; irq_desc[GT_TIMER].action = &timer; enable_irq(GT_TIMER); diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index 442dc6df4b6b..4ab85b5b2b4d 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c @@ -301,7 +301,7 @@ static void jmr3927_ioc_interrupt(int irq, void *dev_id, struct pt_regs *regs) } static struct irqaction ioc_action = { - jmr3927_ioc_interrupt, 0, 0, "IOC", NULL, NULL, + jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, }; static void jmr3927_isac_interrupt(int irq, void *dev_id, struct pt_regs *regs) @@ -318,7 +318,7 @@ static void jmr3927_isac_interrupt(int irq, void *dev_id, struct pt_regs *regs) } static struct irqaction isac_action = { - jmr3927_isac_interrupt, 0, 0, "ISAC", NULL, NULL, + jmr3927_isac_interrupt, 0, CPU_MASK_NONE, "ISAC", NULL, NULL, }; @@ -327,7 +327,7 @@ static void jmr3927_isaerr_interrupt(int irq, void * dev_id, struct pt_regs * re printk(KERN_WARNING "ISA error interrupt (irq 0x%x).\n", irq); } static struct irqaction isaerr_action = { - jmr3927_isaerr_interrupt, 0, 0, "ISA error", NULL, NULL, + jmr3927_isaerr_interrupt, 0, CPU_MASK_NONE, "ISA error", NULL, NULL, }; static void jmr3927_pcierr_interrupt(int irq, void * dev_id, struct pt_regs * regs) @@ -337,7 +337,7 @@ static void jmr3927_pcierr_interrupt(int irq, void * dev_id, struct pt_regs * re tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat); } static struct irqaction pcierr_action = { - jmr3927_pcierr_interrupt, 0, 0, "PCI error", NULL, NULL, + jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL, }; int jmr3927_ether1_irq = 0; diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 9ce8090eff68..3a7f766fd961 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -9,7 +9,7 @@ obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ time.o traps.o unaligned.o ifdef CONFIG_MODULES -obj-y += mips_ksyms.o +obj-y += mips_ksyms.o module.o obj-$(CONFIG_MIPS32) += module-elf32.o obj-$(CONFIG_MIPS64) += module-elf64.o endif @@ -23,6 +23,7 @@ obj-$(CONFIG_CPU_R4300) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R4X00) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R5000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_R5432) += r4k_fpu.o r4k_switch.o +obj-$(CONFIG_CPU_R8000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_RM7000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_NEVADA) += r4k_fpu.o r4k_switch.o diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index 31c17ced894e..1375d448308b 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c @@ -177,7 +177,7 @@ static inline void check_daddi(void) extern asmlinkage void handle_daddi_ov(void); unsigned long flags; void *handler; - long v; + long v, tmp; printk("Checking for the daddi bug... "); @@ -197,13 +197,15 @@ static inline void check_daddi(void) ".set noat\n\t" ".set noreorder\n\t" ".set nomacro\n\t" + "addiu %1, $0, %2\n\t" + "dsrl %1, %1, 1\n\t" #ifdef HAVE_AS_SET_DADDI ".set daddi\n\t" #endif - "daddi %0, %1, %2\n\t" + "daddi %0, %1, %3\n\t" ".set pop" - : "=r" (v) - : "r" (0x7fffffffffffedcd), "I" (0x1234)); + : "=r" (v), "=&r" (tmp) + : "I" (0xffffffffffffdb9a), "I" (0x1234)); set_except_vector(12, handler); local_irq_restore(flags); @@ -217,9 +219,11 @@ static inline void check_daddi(void) local_irq_save(flags); handler = set_except_vector(12, handle_daddi_ov); asm volatile( - "daddi %0, %1, %2" - : "=r" (v) - : "r" (0x7fffffffffffedcd), "I" (0x1234)); + "addiu %1, $0, %2\n\t" + "dsrl %1, %1, 1\n\t" + "daddi %0, %1, %3" + : "=r" (v), "=&r" (tmp) + : "I" (0xffffffffffffdb9a), "I" (0x1234)); set_except_vector(12, handler); local_irq_restore(flags); @@ -240,7 +244,7 @@ static inline void check_daddi(void) static inline void check_daddiu(void) { - long v, w; + long v, w, tmp; printk("Checking for the daddiu bug... "); @@ -265,15 +269,17 @@ static inline void check_daddiu(void) ".set noat\n\t" ".set noreorder\n\t" ".set nomacro\n\t" + "addiu %2, $0, %3\n\t" + "dsrl %2, %2, 1\n\t" #ifdef HAVE_AS_SET_DADDI ".set daddi\n\t" #endif - "daddiu %0, %2, %3\n\t" - "addiu %1, $0, %3\n\t" + "daddiu %0, %2, %4\n\t" + "addiu %1, $0, %4\n\t" "daddu %1, %2\n\t" ".set pop" - : "=&r" (v), "=&r" (w) - : "r" (0x7fffffffffffedcd), "I" (0x1234)); + : "=&r" (v), "=&r" (w), "=&r" (tmp) + : "I" (0xffffffffffffdb9a), "I" (0x1234)); if (v == w) { printk("no.\n"); @@ -283,11 +289,13 @@ static inline void check_daddiu(void) printk("yes, workaround... "); asm volatile( - "daddiu %0, %2, %3\n\t" - "addiu %1, $0, %3\n\t" + "addiu %2, $0, %3\n\t" + "dsrl %2, %2, 1\n\t" + "daddiu %0, %2, %4\n\t" + "addiu %1, $0, %4\n\t" "daddu %1, %2" - : "=&r" (v), "=&r" (w) - : "r" (0x7fffffffffffedcd), "I" (0x1234)); + : "=&r" (v), "=&r" (w), "=&r" (tmp) + : "I" (0xffffffffffffdb9a), "I" (0x1234)); if (v == w) { printk("yes.\n"); diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5013599347e3..36777476dae1 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1,6 +1,8 @@ /* * Processor capabilities determination functions. * + * Copyright (C) xxxx the Anonymous + * Copyright (C) 2003 Maciej W. Rozycki * Copyright (C) 1994 - 2003 Ralf Baechle * Copyright (C) 2001 MIPS Inc. * @@ -49,6 +51,14 @@ static void r4k_wait(void) ".set\tmips0"); } +/* + * The Au1xxx wait is available only if we run CONFIG_PM and + * the timer setup found we had a 32KHz counter available. + * There are still problems with functions that may call au1k_wait + * directly, but that will be discovered pretty quickly. + */ +extern void (*au1k_wait_ptr)(void); + void au1k_wait(void) { #ifdef CONFIG_PM @@ -90,7 +100,6 @@ static inline void check_wait(void) case CPU_R5000: case CPU_NEVADA: case CPU_RM7000: -/* case CPU_RM9000: */ case CPU_TX49XX: case CPU_4KC: case CPU_4KEC: @@ -102,12 +111,19 @@ static inline void check_wait(void) cpu_wait = r4k_wait; printk(" available.\n"); break; +#ifdef CONFIG_PM case CPU_AU1000: case CPU_AU1100: case CPU_AU1500: - cpu_wait = au1k_wait; - printk(" available.\n"); + if (au1k_wait_ptr != NULL) { + cpu_wait = au1k_wait_ptr; + printk(" available.\n"); + } + else { + printk(" unavailable.\n"); + } break; +#endif default: printk(" unavailable.\n"); break; @@ -238,8 +254,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) break; default: printk(KERN_INFO "Unexpected CPU of NEC VR4100 series\n"); - c->cputype = CPU_VR41XX; - break; + c->cputype = CPU_VR41XX; + break; } c->isa_level = MIPS_CPU_ISA_III; c->options = R4K_OPTS; @@ -371,7 +387,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) c->cputype = CPU_RM9000; c->isa_level = MIPS_CPU_ISA_IV; c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | - MIPS_CPU_LLSC; + MIPS_CPU_LLSC; /* * Bit 29 in the info register of the RM9000 * indicates if the TLB has 48 or 64 entries. @@ -407,9 +423,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) MIPS_CPU_LLSC; c->tlbsize = 64; break; - default: - c->cputype = CPU_UNKNOWN; - break; } } @@ -475,9 +488,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) /* Probe for L2 cache */ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; break; - default: - c->cputype = CPU_UNKNOWN; - break; } } @@ -505,9 +515,6 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c) break; } c->isa_level = MIPS_CPU_ISA_M32; - break; - default: - c->cputype = CPU_UNKNOWN; break; } } @@ -528,9 +535,6 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c) c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR; #endif break; - default: - c->cputype = CPU_UNKNOWN; - break; } } @@ -542,14 +546,11 @@ static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c) c->cputype = CPU_SR71000; c->isa_level = MIPS_CPU_ISA_M64; c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX | - MIPS_CPU_4KTLB | MIPS_CPU_FPU | + MIPS_CPU_4KTLB | MIPS_CPU_FPU | MIPS_CPU_COUNTER | MIPS_CPU_MCHECK; c->scache.ways = 8; c->tlbsize = 64; break; - default: - c->cputype = CPU_UNKNOWN; - break; } } @@ -563,7 +564,6 @@ __init void cpu_probe(void) c->processor_id = read_c0_prid(); switch (c->processor_id & 0xff0000) { - case PRID_COMP_LEGACY: cpu_probe_legacy(c); break; diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 845e0914ffe5..13acf876b46f 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -487,7 +487,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/mips/kernel/module-elf32.c b/arch/mips/kernel/module-elf32.c index 35818bb1a359..ffd216d6d6dc 100644 --- a/arch/mips/kernel/module-elf32.c +++ b/arch/mips/kernel/module-elf32.c @@ -248,14 +248,3 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, me->name); return -ENOEXEC; } - -int module_finalize(const Elf_Ehdr *hdr, - const Elf_Shdr *sechdrs, - struct module *me) -{ - return 0; -} - -void module_arch_cleanup(struct module *mod) -{ -} diff --git a/arch/mips/kernel/module-elf64.c b/arch/mips/kernel/module-elf64.c index da7295d53113..e804792ee1ee 100644 --- a/arch/mips/kernel/module-elf64.c +++ b/arch/mips/kernel/module-elf64.c @@ -272,14 +272,3 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, return 0; } - -int module_finalize(const Elf_Ehdr *hdr, - const Elf_Shdr *sechdrs, - struct module *me) -{ - return 0; -} - -void module_arch_cleanup(struct module *mod) -{ -} diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c new file mode 100644 index 000000000000..581687080082 --- /dev/null +++ b/arch/mips/kernel/module.c @@ -0,0 +1,53 @@ +#include <linux/module.h> +#include <linux/spinlock.h> + +static LIST_HEAD(dbe_list); +static spinlock_t dbe_lock = SPIN_LOCK_UNLOCKED; + +/* Given an address, look for it in the module exception tables. */ +const struct exception_table_entry *search_module_dbetables(unsigned long addr) +{ + unsigned long flags; + const struct exception_table_entry *e = NULL; + struct mod_arch_specific *dbe; + + spin_lock_irqsave(&dbe_lock, flags); + list_for_each_entry(dbe, &dbe_list, dbe_list) { + e = search_extable(dbe->dbe_start, dbe->dbe_end - 1, addr); + if (e) + break; + } + spin_unlock_irqrestore(&dbe_lock, flags); + + /* Now, if we found one, we are running inside it now, hence + we cannot unload the module, hence no refcnt needed. */ + return e; +} + +/* Put in dbe list if neccessary. */ +int module_finalize(const Elf_Ehdr *hdr, + const Elf_Shdr *sechdrs, + struct module *me) +{ + const Elf_Shdr *s; + char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; + + INIT_LIST_HEAD(&me->arch.dbe_list); + for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) { + if (strcmp("__dbe_table", secstrings + s->sh_name) != 0) + continue; + me->arch.dbe_start = (void *)s->sh_addr; + me->arch.dbe_end = (void *)s->sh_addr + s->sh_size; + spin_lock_irq(&dbe_lock); + list_add(&me->arch.dbe_list, &dbe_list); + spin_unlock_irq(&dbe_lock); + } + return 0; +} + +void module_arch_cleanup(struct module *mod) +{ + spin_lock_irq(&dbe_lock); + list_del(&mod->arch.dbe_list); + spin_unlock_irq(&dbe_lock); +} diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 09477c1e3e7b..24eab2f9d7dd 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -627,6 +627,7 @@ out: jr ra sys sys_mq_timedreceive 5 sys sys_mq_notify 2 /* 4275 */ sys sys_mq_getsetattr 3 + sys sys_ni_syscall 0 /* sys_vserver */ .endm diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 19e430d62c47..3125b634faec 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S @@ -447,3 +447,4 @@ sys_call_table: PTR sys_mq_timedreceive PTR sys_mq_notify PTR sys_mq_getsetattr /* 5235 */ + PTR sys_ni_syscall /* sys_vserver */ diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 9993a8a15397..c00459f8f59d 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -357,3 +357,4 @@ EXPORT(sysn32_call_table) PTR compat_sys_mq_timedreceive PTR compat_sys_mq_notify PTR compat_sys_mq_getsetattr /* 6239 */ + PTR sys_ni_syscall /* sys_vserver */ diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index b351656863af..3a89bf425bf6 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -535,6 +535,7 @@ out: jr ra sys compat_sys_mq_timedreceive 5 sys compat_sys_mq_notify 2 /* 4275 */ sys compat_sys_mq_getsetattr 3 + sys sys_ni_syscall 0 /* sys_vserver */ .endm diff --git a/arch/mips/kernel/semaphore.c b/arch/mips/kernel/semaphore.c index 51c3e772c029..4197b4109dc3 100644 --- a/arch/mips/kernel/semaphore.c +++ b/arch/mips/kernel/semaphore.c @@ -1,273 +1,165 @@ /* - * Copyright (C) 1999, 2001, 02, 03 Ralf Baechle + * MIPS-specific semaphore code. * - * Heavily inspired by the Alpha implementation + * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> + * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * April 2001 - Reworked by Paul Mackerras <paulus@samba.org> + * to eliminate the SMP races in the old version between the updates + * of `count' and `waking'. Now we use negative `count' values to + * indicate that some process(es) are waiting for the semaphore. */ + #include <linux/config.h> -#include <linux/errno.h> #include <linux/module.h> -#include <linux/init.h> #include <linux/sched.h> +#include <linux/init.h> +#include <asm/atomic.h> +#include <asm/semaphore.h> +#include <asm/errno.h> -#ifdef CONFIG_CPU_HAS_LLDSCD -/* - * On machines without lld/scd we need a spinlock to make the manipulation of - * sem->count and sem->waking atomic. Scalability isn't an issue because - * this lock is used on UP only so it's just an empty variable. - */ -spinlock_t semaphore_lock = SPIN_LOCK_UNLOCKED; - -EXPORT_SYMBOL(semaphore_lock); -#endif +#ifdef CONFIG_CPU_HAS_LLSC /* - * Semaphores are implemented using a two-way counter: The "count" variable is - * decremented for each process that tries to sleep, while the "waking" variable - * is incremented when the "up()" code goes to wake up waiting processes. - * - * Notably, the inline "up()" and "down()" functions can efficiently test if - * they need to do any extra work (up needs to do something only if count was - * negative before the increment operation. - * - * waking_non_zero() must execute atomically. + * Atomically update sem->count. + * This does the equivalent of the following: * - * When __up() is called, the count was negative before incrementing it, and we - * need to wake up somebody. - * - * This routine adds one to the count of processes that need to wake up and - * exit. ALL waiting processes actually wake up but only the one that gets to - * the "waking" field first will gate through and acquire the semaphore. The - * others will go back to sleep. - * - * Note that these functions are only called when there is contention on the - * lock, and as such all this is the "non-critical" part of the whole semaphore - * business. The critical part is the inline stuff in <asm/semaphore.h> where - * we want to avoid any extra jumps and calls. + * old_count = sem->count; + * tmp = MAX(old_count, 0) + incr; + * sem->count = tmp; + * return old_count; */ -void __up_wakeup(struct semaphore *sem) +static inline int __sem_update_count(struct semaphore *sem, int incr) { - wake_up(&sem->wait); -} - -EXPORT_SYMBOL(__up_wakeup); - -#ifdef CONFIG_CPU_HAS_LLSC - -static inline int waking_non_zero(struct semaphore *sem) -{ - int ret, tmp; + int old_count, tmp; __asm__ __volatile__( - "1: ll %1, %2 # waking_non_zero \n" - " blez %1, 2f \n" - " subu %0, %1, 1 \n" - " sc %0, %2 \n" - " beqz %0, 1b \n" - "2: \n" - : "=r" (ret), "=r" (tmp), "+m" (sem->waking) - : "0" (0)); - - return ret; + "1: ll %0, %2 \n" + " sra %1, %0, 31 \n" + " not %1 \n" + " and %1, %0, %1 \n" + " add %1, %1, %3 \n" + " sc %1, %2 \n" + " beqz %1, 1b \n" + : "=&r" (old_count), "=&r" (tmp), "=m" (sem->count) + : "r" (incr), "m" (sem->count)); + + return old_count; } -#else /* !CONFIG_CPU_HAS_LLSC */ +#else -static inline int waking_non_zero(struct semaphore *sem) +/* + * On machines without lld/scd we need a spinlock to make the manipulation of + * sem->count and sem->waking atomic. Scalability isn't an issue because + * this lock is used on UP only so it's just an empty variable. + */ +static spinlock_t semaphore_lock = SPIN_LOCK_UNLOCKED; + +static inline int __sem_update_count(struct semaphore *sem, int incr) { unsigned long flags; - int waking, ret = 0; + int old_count, tmp; spin_lock_irqsave(&semaphore_lock, flags); - waking = atomic_read(&sem->waking); - if (waking > 0) { - atomic_set(&sem->waking, waking - 1); - ret = 1; - } + old_count = atomic_read(&sem->count); + tmp = max_t(int, old_count, 0) + incr; + atomic_set(&sem->count, tmp); spin_unlock_irqrestore(&semaphore_lock, flags); - return ret; + return old_count; } -#endif /* !CONFIG_CPU_HAS_LLSC */ - -/* - * Perform the "down" function. Return zero for semaphore acquired, return - * negative for signalled out of the function. - * - * If called from down, the return is ignored and the wait loop is not - * interruptible. This means that a task waiting on a semaphore using "down()" - * cannot be killed until someone does an "up()" on the semaphore. - * - * If called from down_interruptible, the return value gets checked upon return. - * If the return value is negative then the task continues with the negative - * value in the return register (it can be tested by the caller). - * - * Either form may be used in conjunction with "up()". - */ +#endif -void __sched __down_failed(struct semaphore * sem) +void __up(struct semaphore *sem) { - struct task_struct *tsk = current; - wait_queue_t wait; - - init_waitqueue_entry(&wait, tsk); - __set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue_exclusive(&sem->wait, &wait); - /* - * Ok, we're set up. sem->count is known to be less than zero - * so we must wait. - * - * We can let go the lock for purposes of waiting. - * We re-acquire it after awaking so as to protect - * all semaphore operations. - * - * If "up()" is called before we call waking_non_zero() then - * we will catch it right away. If it is called later then - * we will have to go through a wakeup cycle to catch it. - * - * Multiple waiters contend for the semaphore lock to see - * who gets to gate through and who has to wait some more. + * Note that we incremented count in up() before we came here, + * but that was ineffective since the result was <= 0, and + * any negative value of count is equivalent to 0. + * This ends up setting count to 1, unless count is now > 0 + * (i.e. because some other cpu has called up() in the meantime), + * in which case we just increment count. */ - for (;;) { - if (waking_non_zero(sem)) - break; - schedule(); - __set_current_state(TASK_UNINTERRUPTIBLE); - } - __set_current_state(TASK_RUNNING); - remove_wait_queue(&sem->wait, &wait); + __sem_update_count(sem, 1); + wake_up(&sem->wait); } -EXPORT_SYMBOL(__down_failed); - -#ifdef CONFIG_CPU_HAS_LLDSCD +EXPORT_SYMBOL(__up); /* - * waking_non_zero_interruptible: - * 1 got the lock - * 0 go to sleep - * -EINTR interrupted - * - * We must undo the sem->count down_interruptible decrement - * simultaneously and atomically with the sem->waking adjustment, - * otherwise we can race with wake_one_more. - * - * This is accomplished by doing a 64-bit lld/scd on the 2 32-bit words. - * - * This is crazy. Normally it's strictly forbidden to use 64-bit operations - * in the 32-bit MIPS kernel. In this case it's however ok because if an - * interrupt has destroyed the upper half of registers sc will fail. - * Note also that this will not work for MIPS32 CPUs! - * - * Pseudocode: - * - * If(sem->waking > 0) { - * Decrement(sem->waking) - * Return(SUCCESS) - * } else If(signal_pending(tsk)) { - * Increment(sem->count) - * Return(-EINTR) - * } else { - * Return(SLEEP) - * } + * Note that when we come in to __down or __down_interruptible, + * we have already decremented count, but that decrement was + * ineffective since the result was < 0, and any negative value + * of count is equivalent to 0. + * Thus it is only when we decrement count from some value > 0 + * that we have actually got the semaphore. */ - -static inline int -waking_non_zero_interruptible(struct semaphore *sem, struct task_struct *tsk) -{ - long ret, tmp; - - __asm__ __volatile__( - " .set push # waking_non_zero_interruptible \n" - " .set mips3 \n" - " .set noat \n" - "0: lld %1, %2 \n" - " li %0, 0 \n" - " sll $1, %1, 0 \n" - " blez $1, 1f \n" - " daddiu %1, %1, -1 \n" - " li %0, 1 \n" - " b 2f \n" - "1: beqz %3, 2f \n" - " li %0, %4 \n" - " dli $1, 0x0000000100000000 \n" - " daddu %1, %1, $1 \n" - "2: scd %1, %2 \n" - " beqz %1, 0b \n" - " .set pop \n" - : "=&r" (ret), "=&r" (tmp), "=m" (*sem) - : "r" (signal_pending(tsk)), "i" (-EINTR)); - - return ret; -} - -#else /* !CONFIG_CPU_HAS_LLDSCD */ - -static inline int waking_non_zero_interruptible(struct semaphore *sem, - struct task_struct *tsk) +void __sched __down(struct semaphore *sem) { - int waking, pending, ret = 0; - unsigned long flags; + struct task_struct *tsk = current; + DECLARE_WAITQUEUE(wait, tsk); - pending = signal_pending(tsk); + __set_task_state(tsk, TASK_UNINTERRUPTIBLE); + add_wait_queue_exclusive(&sem->wait, &wait); - spin_lock_irqsave(&semaphore_lock, flags); - waking = atomic_read(&sem->waking); - if (waking > 0) { - atomic_set(&sem->waking, waking - 1); - ret = 1; - } else if (pending) { - atomic_set(&sem->count, atomic_read(&sem->count) + 1); - ret = -EINTR; + /* + * Try to get the semaphore. If the count is > 0, then we've + * got the semaphore; we decrement count and exit the loop. + * If the count is 0 or negative, we set it to -1, indicating + * that we are asleep, and then sleep. + */ + while (__sem_update_count(sem, -1) <= 0) { + schedule(); + set_task_state(tsk, TASK_UNINTERRUPTIBLE); } - spin_unlock_irqrestore(&semaphore_lock, flags); + remove_wait_queue(&sem->wait, &wait); + __set_task_state(tsk, TASK_RUNNING); - return ret; + /* + * If there are any more sleepers, wake one of them up so + * that it can either get the semaphore, or set count to -1 + * indicating that there are still processes sleeping. + */ + wake_up(&sem->wait); } -#endif /* !CONFIG_CPU_HAS_LLDSCD */ +EXPORT_SYMBOL(__down); -int __sched __down_failed_interruptible(struct semaphore * sem) +int __sched __down_interruptible(struct semaphore * sem) { + int retval = 0; struct task_struct *tsk = current; - wait_queue_t wait; - int ret = 0; + DECLARE_WAITQUEUE(wait, tsk); - init_waitqueue_entry(&wait, tsk); - __set_current_state(TASK_INTERRUPTIBLE); + __set_task_state(tsk, TASK_INTERRUPTIBLE); add_wait_queue_exclusive(&sem->wait, &wait); - /* - * Ok, we're set up. sem->count is known to be less than zero - * so we must wait. - * - * We can let go the lock for purposes of waiting. - * We re-acquire it after awaking so as to protect - * all semaphore operations. - * - * If "up()" is called before we call waking_non_zero() then - * we will catch it right away. If it is called later then - * we will have to go through a wakeup cycle to catch it. - * - * Multiple waiters contend for the semaphore lock to see - * who gets to gate through and who has to wait some more. - */ - for (;;) { - ret = waking_non_zero_interruptible(sem, tsk); - if (ret) { - if (ret == 1) - /* ret != 0 only if we get interrupted -arca */ - ret = 0; + while (__sem_update_count(sem, -1) <= 0) { + if (signal_pending(current)) { + /* + * A signal is pending - give up trying. + * Set sem->count to 0 if it is negative, + * since we are no longer sleeping. + */ + __sem_update_count(sem, 0); + retval = -EINTR; break; } schedule(); - __set_current_state(TASK_INTERRUPTIBLE); + set_task_state(tsk, TASK_INTERRUPTIBLE); } - __set_current_state(TASK_RUNNING); remove_wait_queue(&sem->wait, &wait); + __set_task_state(tsk, TASK_RUNNING); - return ret; + wake_up(&sem->wait); + return retval; } -EXPORT_SYMBOL(__down_failed_interruptible); +EXPORT_SYMBOL(__down_interruptible); diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index a1336d16c57e..c7d1d76c9c8b 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -71,7 +71,6 @@ EXPORT_SYMBOL(mips_machgroup); struct boot_mem_map boot_mem_map; static char command_line[CL_SIZE]; - char saved_command_line[CL_SIZE]; char arcs_cmdline[CL_SIZE]=CONFIG_CMDLINE; /* @@ -453,14 +452,18 @@ static void __init do_earlyinitcalls(void) void __init setup_arch(char **cmdline_p) { + unsigned int status; + cpu_probe(); prom_init(); cpu_report(); #ifdef CONFIG_MIPS32 /* Disable coprocessors and set FPU for 16/32 FPR register model */ - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR); - set_c0_status(ST0_CU0); + status = read_c0_status(); + status &= ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR); + status |= ST0_CU0; + write_c0_status(status); #endif #ifdef CONFIG_MIPS64 /* @@ -468,8 +471,10 @@ void __init setup_arch(char **cmdline_p) * Maybe because the kernel is in ckseg0 and not xkphys? Clear it * anyway ... */ - clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3); - set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR); + status = read_c0_status(); + status &= ~(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3); + status |= (ST0_CU0|ST0_KX|ST0_SX|ST0_FR); + write_c0_status(status); #endif #if defined(CONFIG_VT) diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 7e1eca9736b1..16519f7e8c3b 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c @@ -36,7 +36,7 @@ #include <asm/sysmips.h> #include <asm/uaccess.h> -asmlinkage int sys_pipe(nabi_no_regargs struct pt_regs regs) +asmlinkage int sys_pipe(nabi_no_regargs volatile struct pt_regs regs) { int fd[2]; int error, res; diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c index 25d7e97edfca..494d1872df32 100644 --- a/arch/mips/kernel/sysirix.c +++ b/arch/mips/kernel/sysirix.c @@ -1639,7 +1639,7 @@ asmlinkage int irix_statvfs64(char *fname, struct irix_statvfs64 *buf) printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n", current->comm, current->pid, fname, buf); - error = verify_area(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)); + error = verify_area(VERIFY_WRITE, buf, sizeof(struct irix_statvfs64)); if(error) goto out; error = user_path_walk(fname, &nd); diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index d0c980a9b859..0199485a4a8f 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -789,3 +789,8 @@ EXPORT_SYMBOL(rtc_lock); EXPORT_SYMBOL(to_tm); EXPORT_SYMBOL(rtc_set_time); EXPORT_SYMBOL(rtc_get_time); + +unsigned long long sched_clock(void) +{ + return (unsigned long long)jiffies*(1000000000/HZ); +} diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 752dbd3e93fb..362c1fd66b12 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -234,6 +234,7 @@ void show_regs(struct pt_regs *regs) void show_registers(struct pt_regs *regs) { show_regs(regs); + print_modules(); printk("Process %s (pid: %d, threadinfo=%p, task=%p)\n", current->comm, current->pid, current_thread_info(), current); show_stack(current, (long *) regs->regs[29]); @@ -278,47 +279,8 @@ void __declare_dbe_table(void) ); } -#ifdef CONFIG_MDULES - -/* Given an address, look for it in the module exception tables. */ -const struct exception_table_entry *search_module_dbetables(unsigned long addr) -{ - unsigned long flags; - const struct exception_table_entry *e = NULL; - struct module *mod; - - spin_lock_irqsave(&modlist_lock, flags); - list_for_each_entry(mod, &modules, list) { - if (mod->arch.num_dbeentries == 0) - continue; - - e = search_extable(mod->arch.dbe_table_start, - mod->arch.dbe_table_end + - mod->arch.num_dbeentries - 1, - addr); - if (e) - break; - } - spin_unlock_irqrestore(&modlist_lock, flags); - - /* Now, if we found one, we are running inside it now, hence - we cannot unload the module, hence no refcnt needed. */ - return e; -} - -#else - /* Given an address, look for it in the exception tables. */ -static inline const struct exception_table_entry * -search_module_dbetables(unsigned long addr) -{ - return NULL; -} - -#endif - -/* Given an address, look for it in the exception tables. */ -const struct exception_table_entry *search_dbe_tables(unsigned long addr) +static const struct exception_table_entry *search_dbe_tables(unsigned long addr) { const struct exception_table_entry *e; @@ -745,12 +707,25 @@ asmlinkage void do_reserved(struct pt_regs *regs) static inline void parity_protection_init(void) { switch (current_cpu_data.cputype) { + case CPU_24K: + /* 24K cache parity not currently implemented in FPGA */ + printk(KERN_INFO "Disable cache parity protection for " + "MIPS 24K CPU.\n"); + write_c0_ecc(read_c0_ecc() & ~0x80000000); + break; case CPU_5KC: /* Set the PE bit (bit 31) in the c0_ecc register. */ - printk(KERN_INFO "Enable the cache parity protection for " - "MIPS 5KC CPUs.\n"); + printk(KERN_INFO "Enable cache parity protection for " + "MIPS 5KC/24K CPUs.\n"); write_c0_ecc(read_c0_ecc() | 0x80000000); break; + case CPU_20KC: + case CPU_25KF: + /* Clear the DE bit (bit 16) in the c0_status register. */ + printk(KERN_INFO "Enable cache parity protection for " + "MIPS 20KC/25KF CPUs.\n"); + clear_c0_status(ST0_DE); + break; default: break; } diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile index 1bde2a003249..fd6a2bafdfcf 100644 --- a/arch/mips/lib-32/Makefile +++ b/arch/mips/lib-32/Makefile @@ -4,10 +4,22 @@ lib-y += csum_partial.o memset.o watch.o -ifeq ($(CONFIG_CPU_R3000)$(CONFIG_CPU_TX39XX),y) - lib-y += r3k_dump_tlb.o -else - lib-y += dump_tlb.o -endif +obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o +obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o +obj-$(CONFIG_CPU_R10000) += dump_tlb.o +obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o +obj-$(CONFIG_CPU_R4300) += dump_tlb.o +obj-$(CONFIG_CPU_R4X00) += dump_tlb.o +obj-$(CONFIG_CPU_R5000) += dump_tlb.o +obj-$(CONFIG_CPU_R5432) += dump_tlb.o +obj-$(CONFIG_CPU_R6000) += +obj-$(CONFIG_CPU_R8000) += +obj-$(CONFIG_CPU_RM7000) += dump_tlb.o +obj-$(CONFIG_CPU_RM9000) += dump_tlb.o +obj-$(CONFIG_CPU_SB1) += dump_tlb.o +obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o +obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o +obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile index 1bde2a003249..fd6a2bafdfcf 100644 --- a/arch/mips/lib-64/Makefile +++ b/arch/mips/lib-64/Makefile @@ -4,10 +4,22 @@ lib-y += csum_partial.o memset.o watch.o -ifeq ($(CONFIG_CPU_R3000)$(CONFIG_CPU_TX39XX),y) - lib-y += r3k_dump_tlb.o -else - lib-y += dump_tlb.o -endif +obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o +obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o +obj-$(CONFIG_CPU_NEVADA) += dump_tlb.o +obj-$(CONFIG_CPU_R10000) += dump_tlb.o +obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o +obj-$(CONFIG_CPU_R4300) += dump_tlb.o +obj-$(CONFIG_CPU_R4X00) += dump_tlb.o +obj-$(CONFIG_CPU_R5000) += dump_tlb.o +obj-$(CONFIG_CPU_R5432) += dump_tlb.o +obj-$(CONFIG_CPU_R6000) += +obj-$(CONFIG_CPU_R8000) += +obj-$(CONFIG_CPU_RM7000) += dump_tlb.o +obj-$(CONFIG_CPU_RM9000) += dump_tlb.o +obj-$(CONFIG_CPU_SB1) += dump_tlb.o +obj-$(CONFIG_CPU_TX39XX) += r3k_dump_tlb.o +obj-$(CONFIG_CPU_TX49XX) += dump_tlb.o +obj-$(CONFIG_CPU_VR41XX) += dump_tlb.o EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/mips-boards/generic/cmdline.c b/arch/mips/mips-boards/generic/cmdline.c index c1b46edc6ed9..1871c30ed2eb 100644 --- a/arch/mips/mips-boards/generic/cmdline.c +++ b/arch/mips/mips-boards/generic/cmdline.c @@ -51,7 +51,9 @@ void __init prom_init_cmdline(void) *cp++ = ' '; actr++; } - if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */ + if (cp != &(arcs_cmdline[0])) { + /* get rid of trailing space */ --cp; - *cp = '\0'; + *cp = '\0'; + } } diff --git a/arch/mips/mips-boards/generic/printf.c b/arch/mips/mips-boards/generic/printf.c index b1edd90b9805..2c1ab1f19fdc 100644 --- a/arch/mips/mips-boards/generic/printf.c +++ b/arch/mips/mips-boards/generic/printf.c @@ -59,7 +59,7 @@ static inline void serial_out(int offset, int value) outb(value, PORT(offset)); } -int putPromChar(char c) +int prom_putchar(char c) { while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0) ; @@ -69,7 +69,7 @@ int putPromChar(char c) return 1; } -char getPromChar(void) +char prom_getchar(void) { while (!(serial_in(UART_LSR) & UART_LSR_DR)) ; @@ -77,33 +77,3 @@ char getPromChar(void) return serial_in(UART_RX); } -static spinlock_t con_lock = SPIN_LOCK_UNLOCKED; - -static char buf[1024]; - -void __init prom_printf(char *fmt, ...) -{ - va_list args; - int l; - char *p, *buf_end; - long flags; - - spin_lock_irqsave(con_lock, flags); - - va_start(args, fmt); - l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */ - va_end(args); - - buf_end = buf + l; - - for (p = buf; p < buf_end; p++) { - /* Crude cr/nl handling is better than none */ - if (*p == '\n') - putPromChar('\r'); - putPromChar(*p); - } - /* wait for output to drain */ - while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0) - ; - spin_unlock_irqrestore(con_lock, flags); -} diff --git a/arch/mips/mm-32/Makefile b/arch/mips/mm-32/Makefile deleted file mode 100644 index 956f4bb8a29d..000000000000 --- a/arch/mips/mm-32/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -# -# Makefile for the Linux/MIPS-specific parts of the memory manager. -# - -obj-$(CONFIG_CPU_TX49XX) += tlbex-r4k.o -obj-$(CONFIG_CPU_R4300) += tlbex-r4k.o -obj-$(CONFIG_CPU_R4X00) += tlbex-r4k.o -obj-$(CONFIG_CPU_VR41XX) += tlbex-r4k.o -obj-$(CONFIG_CPU_R5000) += tlbex-r4k.o -obj-$(CONFIG_CPU_NEVADA) += tlbex-r4k.o -obj-$(CONFIG_CPU_R5432) += tlbex-r4k.o -obj-$(CONFIG_CPU_RM7000) += tlbex-r4k.o -obj-$(CONFIG_CPU_RM9000) += tlbex-r4k.o -obj-$(CONFIG_CPU_R10000) += tlbex-r4k.o -obj-$(CONFIG_CPU_MIPS32) += tlbex-r4k.o -obj-$(CONFIG_CPU_MIPS64) += tlbex-r4k.o -obj-$(CONFIG_CPU_SB1) += tlbex-r4k.o - -EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/mm-64/Makefile b/arch/mips/mm-64/Makefile deleted file mode 100644 index 30b4d332e7ec..000000000000 --- a/arch/mips/mm-64/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -# -# Makefile for the Linux/MIPS-specific parts of the memory manager. -# - -obj-y := tlbex-r4k.o - -obj-$(CONFIG_CPU_R4300) += tlb-glue-r4k.o -obj-$(CONFIG_CPU_R4X00) += tlb-glue-r4k.o -obj-$(CONFIG_CPU_R5000) += tlb-glue-r4k.o -obj-$(CONFIG_CPU_NEVADA) += tlb-glue-r4k.o -obj-$(CONFIG_CPU_R5432) += tlb-glue-r4k.o -obj-$(CONFIG_CPU_RM7000) += tlb-glue-r4k.o -obj-$(CONFIG_CPU_RM9000) += tlb-glue-r4k.o -obj-$(CONFIG_CPU_R10000) += tlb-glue-r4k.o -obj-$(CONFIG_CPU_SB1) += tlb-glue-sb1.o -obj-$(CONFIG_CPU_MIPS64) += tlb-glue-r4k.o - -# -# Debug TLB exception handler, currently unused -# -#obj-y += tlb-dbg-r4k.o - -AFLAGS_tlb-glue-r4k.o := -P - -EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/mm-64/tlb-dbg-r4k.c b/arch/mips/mm-64/tlb-dbg-r4k.c deleted file mode 100644 index 44e64f7ca420..000000000000 --- a/arch/mips/mm-64/tlb-dbg-r4k.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1999 Ralf Baechle - * Copyright (C) 1999 Silicon Graphics, Inc. - * - * TLB debugging routines. These perform horribly slow but can easily be - * modified for debugging purposes. - */ -#include <linux/linkage.h> -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/mm.h> -#include <asm/page.h> -#include <asm/pgtable.h> -#include <asm/ptrace.h> -#include <asm/system.h> - -asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long write, - unsigned long address); - -asmlinkage void tlb_refill_debug(struct pt_regs regs) -{ - show_regs(®s); - panic("%s called. This Does Not Happen (TM).", __FUNCTION__); -} - -asmlinkage void xtlb_refill_debug(struct pt_regs *regs) -{ - unsigned long addr; - pgd_t *pgd; - pmd_t *pmd; - pte_t *pte; - - addr = regs->cp0_badvaddr & ~((PAGE_SIZE << 1) - 1); - pgd = pgd_offset(current->active_mm, addr); - pmd = pmd_offset(pgd, addr); - pte = pte_offset(pmd, addr); - - write_c0_entrylo0(pte_val(pte[0]) >> 6); - write_c0_entrylo1(pte_val(pte[1]) >> 6); - __asm__ __volatile__("nop;nop;nop"); - - tlb_write_random(); -} - -asmlinkage void xtlb_mod_debug(struct pt_regs *regs) -{ - unsigned long addr; - - addr = regs->cp0_badvaddr; - do_page_fault(regs, 1, addr); -} - -asmlinkage void xtlb_tlbl_debug(struct pt_regs *regs) -{ - unsigned long addr; - - addr = regs->cp0_badvaddr; - do_page_fault(regs, 0, addr); -} - -asmlinkage void xtlb_tlbs_debug(struct pt_regs *regs) -{ - unsigned long addr; - - addr = regs->cp0_badvaddr; - do_page_fault(regs, 1, addr); -} diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 2fdae0a8739f..04c393f26228 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -12,19 +12,54 @@ obj-$(CONFIG_CPU_MIPS32) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_MIPS64) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_NEVADA) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R10000) += c-r4k.o cex-gen.o pg-r4k.o tlb-andes.o -obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o pg-r4k.o tlbex-r3k.o +obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o pg-r4k.o obj-$(CONFIG_CPU_R4300) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R4X00) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R5000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r8k.o obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_SB1) += c-sb1.o cerr-sb1.o cex-sb1.o pg-sb1.o \ tlb-sb1.o -obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o tlbex-r3k.o +obj-$(CONFIG_CPU_TX39XX) += c-tx39.o pg-r4k.o tlb-r3k.o obj-$(CONFIG_CPU_TX49XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o +# +# TLB exception handling code differs between 32-bit and 64-bit kernels. +# +ifdef CONFIG_MIPS32 +obj-$(CONFIG_CPU_R3000) += tlbex32-r3k.o +obj-$(CONFIG_CPU_TX49XX) += tlbex32-r4k.o +obj-$(CONFIG_CPU_R4300) += tlbex32-r4k.o +obj-$(CONFIG_CPU_R4X00) += tlbex32-r4k.o +obj-$(CONFIG_CPU_VR41XX) += tlbex32-r4k.o +obj-$(CONFIG_CPU_R5000) += tlbex32-r4k.o +obj-$(CONFIG_CPU_NEVADA) += tlbex32-r4k.o +obj-$(CONFIG_CPU_R5432) += tlbex32-r4k.o +obj-$(CONFIG_CPU_RM7000) += tlbex32-r4k.o +obj-$(CONFIG_CPU_RM9000) += tlbex32-r4k.o +obj-$(CONFIG_CPU_R10000) += tlbex32-r4k.o +obj-$(CONFIG_CPU_MIPS32) += tlbex32-r4k.o +obj-$(CONFIG_CPU_MIPS64) += tlbex32-r4k.o +obj-$(CONFIG_CPU_SB1) += tlbex32-r4k.o +obj-$(CONFIG_CPU_TX39XX) += tlbex32-r3k.o +endif +ifdef CONFIG_MIPS64 +obj-$(CONFIG_CPU_R4300) += tlb64-glue-r4k.o tlbex64-r4k.o +obj-$(CONFIG_CPU_R4X00) += tlb64-glue-r4k.o tlbex64-r4k.o +obj-$(CONFIG_CPU_R5000) += tlb64-glue-r4k.o tlbex64-r4k.o +obj-$(CONFIG_CPU_NEVADA) += tlb64-glue-r4k.o tlbex64-r4k.o +obj-$(CONFIG_CPU_R5432) += tlb64-glue-r4k.o tlbex64-r4k.o +obj-$(CONFIG_CPU_RM7000) += tlb64-glue-r4k.o tlbex64-r4k.o +obj-$(CONFIG_CPU_RM9000) += tlb64-glue-r4k.o tlbex64-r4k.o +obj-$(CONFIG_CPU_R10000) += tlb64-glue-r4k.o tlbex64-r4k.o +obj-$(CONFIG_CPU_SB1) += tlb64-glue-sb1.o tlbex64-r4k.o +obj-$(CONFIG_CPU_MIPS64) += tlb64-glue-r4k.o tlbex64-r4k.o +endif + + obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c index b1722b8f6e5e..8c30f32a66e8 100644 --- a/arch/mips/mm/pgtable.c +++ b/arch/mips/mm/pgtable.c @@ -12,7 +12,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); pfn = max_mapnr; while (pfn-- > 0) { page = pfn_to_page(pfn); diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c new file mode 100644 index 000000000000..daac80ea3c0a --- /dev/null +++ b/arch/mips/mm/tlb-r8k.c @@ -0,0 +1,253 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com) + * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org + * Carsten Langgaard, carstenl@mips.com + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved. + */ +#include <linux/config.h> +#include <linux/init.h> +#include <linux/sched.h> +#include <linux/mm.h> + +#include <asm/cpu.h> +#include <asm/bootinfo.h> +#include <asm/mmu_context.h> +#include <asm/pgtable.h> +#include <asm/system.h> + +extern void except_vec0_generic(void); +extern void except_vec1_r8k(void); + +#define TFP_TLB_SIZE 384 +#define TFP_TLB_SET_SHIFT 7 + +/* CP0 hazard avoidance. */ +#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \ + "nop; nop; nop; nop; nop; nop;\n\t" \ + ".set reorder\n\t") + +void local_flush_tlb_all(void) +{ + unsigned long flags; + unsigned long old_ctx; + int entry; + + local_irq_save(flags); + /* Save old context and create impossible VPN2 value */ + old_ctx = read_c0_entryhi(); + write_c0_entrylo(0); + + for (entry = 0; entry < TFP_TLB_SIZE; entry++) { + write_c0_tlbset(entry >> TFP_TLB_SET_SHIFT); + write_c0_vaddr(entry << PAGE_SHIFT); + write_c0_entryhi(CKSEG0 + (entry << (PAGE_SHIFT + 1))); + mtc0_tlbw_hazard(); + tlb_write(); + } + tlbw_use_hazard(); + write_c0_entryhi(old_ctx); + local_irq_restore(flags); +} + +void local_flush_tlb_mm(struct mm_struct *mm) +{ + int cpu = smp_processor_id(); + + if (cpu_context(cpu, mm) != 0) + drop_mmu_context(mm,cpu); +} + +void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end) +{ + struct mm_struct *mm = vma->vm_mm; + int cpu = smp_processor_id(); + unsigned long flags; + int oldpid, newpid, size; + + if (!cpu_context(cpu, mm)) + return; + + size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; + size = (size + 1) >> 1; + + local_irq_save(flags); + + if (size > TFP_TLB_SIZE / 2) { + drop_mmu_context(mm, cpu); + goto out_restore; + } + + oldpid = read_c0_entryhi(); + newpid = cpu_asid(cpu, mm); + + write_c0_entrylo(0); + + start &= PAGE_MASK; + end += (PAGE_SIZE - 1); + end &= PAGE_MASK; + while (start < end) { + signed long idx; + + write_c0_vaddr(start); + write_c0_entryhi(start); + start += PAGE_SIZE; + tlb_probe(); + idx = read_c0_tlbset(); + if (idx < 0) + continue; + + write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1))); + tlb_write(); + } + write_c0_entryhi(oldpid); + +out_restore: + local_irq_restore(flags); +} + +/* Usable for KV1 addresses only! */ +void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) +{ + unsigned long flags; + int size; + + size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; + size = (size + 1) >> 1; + + if (size > TFP_TLB_SIZE / 2) { + local_flush_tlb_all(); + return; + } + + local_irq_save(flags); + + write_c0_entrylo(0); + + start &= PAGE_MASK; + end += (PAGE_SIZE - 1); + end &= PAGE_MASK; + while (start < end) { + signed long idx; + + write_c0_vaddr(start); + write_c0_entryhi(start); + start += PAGE_SIZE; + tlb_probe(); + idx = read_c0_tlbset(); + if (idx < 0) + continue; + + write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1))); + tlb_write(); + } + + local_irq_restore(flags); +} + +void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page) +{ + int cpu = smp_processor_id(); + unsigned long flags; + int oldpid, newpid; + signed long idx; + + if (!cpu_context(cpu, vma->vm_mm)) + return; + + newpid = cpu_asid(cpu, vma->vm_mm); + page &= PAGE_MASK; + local_irq_save(flags); + oldpid = read_c0_entryhi(); + write_c0_vaddr(page); + write_c0_entryhi(newpid); + tlb_probe(); + idx = read_c0_tlbset(); + if (idx < 0) + goto finish; + + write_c0_entrylo(0); + write_c0_entryhi(CKSEG0 + (idx << (PAGE_SHIFT + 1))); + tlb_write(); + +finish: + write_c0_entryhi(oldpid); + local_irq_restore(flags); +} + +/* + * We will need multiple versions of update_mmu_cache(), one that just + * updates the TLB with the new pte(s), and another which also checks + * for the R4k "end of page" hardware bug and does the needy. + */ +void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte) +{ + unsigned long flags; + pgd_t *pgdp; + pmd_t *pmdp; + pte_t *ptep; + int pid; + + /* + * Handle debugger faulting in for debugee. + */ + if (current->active_mm != vma->vm_mm) + return; + + pid = read_c0_entryhi() & ASID_MASK; + + local_irq_save(flags); + address &= PAGE_MASK; + write_c0_vaddr(address); + write_c0_entryhi(pid); + pgdp = pgd_offset(vma->vm_mm, address); + pmdp = pmd_offset(pgdp, address); + ptep = pte_offset_map(pmdp, address); + tlb_probe(); + + write_c0_entrylo(pte_val(*ptep++) >> 6); + tlb_write(); + + write_c0_entryhi(pid); + local_irq_restore(flags); +} + +static void __init probe_tlb(unsigned long config) +{ + struct cpuinfo_mips *c = ¤t_cpu_data; + + c->tlbsize = 3 * 128; /* 3 sets each 128 entries */ +} + +void __init tlb_init(void) +{ + unsigned int config = read_c0_config(); + unsigned long status; + + probe_tlb(config); + + status = read_c0_status(); + status &= ~(ST0_UPS | ST0_KPS); +#ifdef CONFIG_PAGE_SIZE_4KB + status |= (TFP_PAGESIZE_4K << 32) | (TFP_PAGESIZE_4K << 36); +#elif defined(CONFIG_PAGE_SIZE_8KB) + status |= (TFP_PAGESIZE_8K << 32) | (TFP_PAGESIZE_8K << 36); +#elif defined(CONFIG_PAGE_SIZE_16KB) + status |= (TFP_PAGESIZE_16K << 32) | (TFP_PAGESIZE_16K << 36); +#elif defined(CONFIG_PAGE_SIZE_64KB) + status |= (TFP_PAGESIZE_64K << 32) | (TFP_PAGESIZE_64K << 36); +#endif + write_c0_status(status); + + write_c0_wired(0); + + local_flush_tlb_all(); + + memcpy((void *)(CKSEG0 + 0x00), &except_vec0_generic, 0x80); + memcpy((void *)(CKSEG0 + 0x80), except_vec1_r8k, 0x80); + flush_icache_range(CKSEG0 + 0x80, CKSEG0 + 0x100); +} diff --git a/arch/mips/mm/tlb-sb1.c b/arch/mips/mm/tlb-sb1.c index e2096dc21ac0..33c177e65908 100644 --- a/arch/mips/mm/tlb-sb1.c +++ b/arch/mips/mm/tlb-sb1.c @@ -125,7 +125,7 @@ void local_flush_tlb_all(void) * with the firmware, go back and give all the entries invalid addresses with * the normal flush routine. Wired entries will be killed as well! */ -void sb1_sanitize_tlb(void) +static void __init sb1_sanitize_tlb(void) { int entry; long addr = 0; diff --git a/arch/mips/mm-64/tlb-glue-r4k.S b/arch/mips/mm/tlb64-glue-r4k.S index 4e0194aa58f1..4e0194aa58f1 100644 --- a/arch/mips/mm-64/tlb-glue-r4k.S +++ b/arch/mips/mm/tlb64-glue-r4k.S diff --git a/arch/mips/mm-64/tlb-glue-sb1.S b/arch/mips/mm/tlb64-glue-sb1.S index 3c236539f423..3c236539f423 100644 --- a/arch/mips/mm-64/tlb-glue-sb1.S +++ b/arch/mips/mm/tlb64-glue-sb1.S diff --git a/arch/mips/mm/tlbex-r3k.S b/arch/mips/mm/tlbex32-r3k.S index cc4a4642e28c..cc4a4642e28c 100644 --- a/arch/mips/mm/tlbex-r3k.S +++ b/arch/mips/mm/tlbex32-r3k.S diff --git a/arch/mips/mm-32/tlbex-r4k.S b/arch/mips/mm/tlbex32-r4k.S index 49742718da0a..49742718da0a 100644 --- a/arch/mips/mm-32/tlbex-r4k.S +++ b/arch/mips/mm/tlbex32-r4k.S diff --git a/arch/mips/mm-64/tlbex-r4k.S b/arch/mips/mm/tlbex64-r4k.S index 728d18f004d2..728d18f004d2 100644 --- a/arch/mips/mm-64/tlbex-r4k.S +++ b/arch/mips/mm/tlbex64-r4k.S diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c index f13f856067e7..cc25cbcb4bb2 100644 --- a/arch/mips/momentum/jaguar_atx/irq.c +++ b/arch/mips/momentum/jaguar_atx/irq.c @@ -42,7 +42,7 @@ extern asmlinkage void jaguar_handle_int(void); static struct irqaction cascade_mv64340 = { - no_action, SA_INTERRUPT, 0, "MV64340-Cascade", NULL, NULL + no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL }; void __init init_IRQ(void) diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c index 10acbe9b0cb6..0ec82a10df5c 100644 --- a/arch/mips/momentum/jaguar_atx/prom.c +++ b/arch/mips/momentum/jaguar_atx/prom.c @@ -245,20 +245,6 @@ void __init prom_fixup_mem_map(unsigned long start, unsigned long end) { } -/* - * SMP support - */ -int prom_setup_smp(void) -{ - int num_cpus = 2; - - /* - * We know that the RM9000 on the Jaguar ATX board has 2 cores. - * Hence, this can be hardcoded for now. - */ - return num_cpus; -} - int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp) { /* Clear the semaphore */ diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index 7c2f25ffc6df..261250737528 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c @@ -46,6 +46,7 @@ #include <linux/types.h> #include <linux/mm.h> #include <linux/bootmem.h> +#include <linux/pci.h> #include <linux/swap.h> #include <linux/ioport.h> #include <linux/sched.h> @@ -57,7 +58,6 @@ #include <asm/page.h> #include <asm/io.h> #include <asm/irq.h> -#include <asm/pci.h> #include <asm/pci_channel.h> #include <asm/processor.h> #include <asm/ptrace.h> diff --git a/arch/mips/momentum/ocelot_c/Makefile b/arch/mips/momentum/ocelot_c/Makefile index 6efdd145e7d7..91240777f978 100644 --- a/arch/mips/momentum/ocelot_c/Makefile +++ b/arch/mips/momentum/ocelot_c/Makefile @@ -2,7 +2,7 @@ # Makefile for Momentum Computer's Ocelot-C and -CS boards. # -obj-y += cpci-irq.o uart-irq.o int-handler.o irq.o pci-irq.o \ - prom.o reset.o setup.o +obj-y += cpci-irq.o int-handler.o irq.o prom.o reset.o \ + setup.o uart-irq.o obj-$(CONFIG_KGDB) += dbg_io.o diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c index d12f5befdf6f..13dd8bd74041 100644 --- a/arch/mips/momentum/ocelot_c/irq.c +++ b/arch/mips/momentum/ocelot_c/irq.c @@ -44,8 +44,9 @@ #include <asm/bitops.h> #include <asm/bootinfo.h> #include <asm/io.h> -#include <asm/irq.h> +#include <asm/irq_cpu.h> #include <asm/mipsregs.h> +#include <asm/mv64340.h> #include <asm/system.h> extern asmlinkage void ocelot_handle_int(void); @@ -53,11 +54,11 @@ extern void uart_irq_init(void); extern void cpci_irq_init(void); static struct irqaction cascade_fpga = { - no_action, SA_INTERRUPT, 0, "cascade via FPGA", NULL, NULL + no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL }; static struct irqaction cascade_mv64340 = { - no_action, SA_INTERRUPT, 0, "cascade via MV64340", NULL, NULL + no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL }; void __init init_IRQ(void) diff --git a/arch/mips/momentum/ocelot_c/pci-irq.c b/arch/mips/momentum/ocelot_c/pci-irq.c deleted file mode 100644 index c14b6d99577e..000000000000 --- a/arch/mips/momentum/ocelot_c/pci-irq.c +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Copyright 2002 Momentum Computer Inc. - * Author: Matthew Dharm <mdharm@momenco.com> - * - * Based on work for the Linux port to the Ocelot board, which is - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * - * arch/mips/momentum/ocelot_g/pci.c - * Board-specific PCI routines for mv64340 controller. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include <linux/types.h> -#include <linux/pci.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <asm/pci.h> - - -void __init mv64340_board_pcibios_fixup_bus(struct pci_bus *bus) -{ - struct pci_bus *current_bus = bus; - struct pci_dev *devices; - struct list_head *devices_link; - u16 cmd; - - /* loop over all known devices on this bus */ - list_for_each(devices_link, &(current_bus->devices)) { - - devices = pci_dev_b(devices_link); - if (devices == NULL) - continue; - - if ((current_bus->number == 0) && - (PCI_SLOT(devices->devfn) == 1) && - (PCI_FUNC(devices->devfn) == 0)) { - /* LSI 53C10101R SCSI (A) */ - devices->irq = 2; - } else if ((current_bus->number == 0) && - (PCI_SLOT(devices->devfn) == 1) && - (PCI_FUNC(devices->devfn) == 1)) { - /* LSI 53C10101R SCSI (B) */ - devices->irq = 2; - } else if ((current_bus->number == 1) && - (PCI_SLOT(devices->devfn) == 1)) { - /* Intel 21555 bridge */ - devices->irq = 12; - } else if ((current_bus->number == 1) && - (PCI_SLOT(devices->devfn) == 2)) { - /* PMC Slot */ - devices->irq = 4; - } else { - /* We don't have assign interrupts for other devices. */ - devices->irq = 0xff; - } - - /* Assign an interrupt number for the device */ - bus->ops->write_byte(devices, PCI_INTERRUPT_LINE, devices->irq); - - /* enable master for everything but the MV-64340 */ - if (((current_bus->number != 0) && (current_bus->number != 1)) - || (PCI_SLOT(devices->devfn) != 0)) { - bus->ops->read_word(devices, PCI_COMMAND, &cmd); - cmd |= PCI_COMMAND_MASTER; - bus->ops->write_word(devices, PCI_COMMAND, cmd); - } - } -} diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c index 0387b562b6a8..a01bedb4485c 100644 --- a/arch/mips/momentum/ocelot_c/prom.c +++ b/arch/mips/momentum/ocelot_c/prom.c @@ -147,13 +147,14 @@ char *arg64(unsigned long addrin, int arg_index) #endif /* CONFIG_MIPS64 */ -/* [jsun@junsun.net] PMON passes arguments in C main() style */ void __init prom_init(void) { int argc = fw_arg0; char **arg = (char **) fw_arg1; char **env = (char **) fw_arg2; + struct callvectors *cv = (struct callvectors *) fw_arg3; int i; + #ifdef CONFIG_MIPS64 char *ptr; diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c index 1079858bff79..1bd2ba659bfd 100644 --- a/arch/mips/momentum/ocelot_c/setup.c +++ b/arch/mips/momentum/ocelot_c/setup.c @@ -193,7 +193,7 @@ int m48t37y_set_time(unsigned long sec) rtc_base[0x7ff9] = BIN2BCD(tm.tm_sec); /* day of week -- not really used, but let's keep it up-to-date */ - rtc_base[0x7ffc] = CONV_BIN2BCD(tm.tm_wday + 1); + rtc_base[0x7ffc] = BIN2BCD(tm.tm_wday + 1); /* disable writing */ rtc_base[0x7ff8] = 0x00; diff --git a/arch/mips/momentum/ocelot_g/Makefile b/arch/mips/momentum/ocelot_g/Makefile index bdd8d3292d7b..e5f1cb086973 100644 --- a/arch/mips/momentum/ocelot_g/Makefile +++ b/arch/mips/momentum/ocelot_g/Makefile @@ -2,8 +2,7 @@ # Makefile for Momentum Computer's Ocelot-G board. # -obj-y += gt-irq.o pci-irq.o int-handler.o irq.o prom.o \ - reset.o setup.o +obj-y += int-handler.o irq.o gt-irq.o prom.o reset.o setup.o obj-$(CONFIG_KGDB) += dbg_io.o EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c index 3afe3273921c..4ec4aefd6952 100644 --- a/arch/mips/momentum/ocelot_g/gt-irq.c +++ b/arch/mips/momentum/ocelot_g/gt-irq.c @@ -17,8 +17,8 @@ #include <asm/ptrace.h> #include <linux/sched.h> #include <linux/kernel_stat.h> +#include <asm/gt64240.h> #include <asm/io.h> -#include "gt64240.h" unsigned long bus_clock; @@ -108,25 +108,25 @@ int disable_galileo_irq(int int_cause, int bit_num) * we keep this particular structure in the function. */ -static void gt64240_p0int_irq(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t gt64240_p0int_irq(int irq, void *dev, struct pt_regs *regs) { uint32_t irq_src, irq_src_mask; int handled; /* get the low interrupt cause register */ - GT_READ(LOW_INTERRUPT_CAUSE_REGISTER, &irq_src); + irq_src = GT_READ(LOW_INTERRUPT_CAUSE_REGISTER); /* get the mask register for this pin */ - GT_READ(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW, &irq_src_mask); + irq_src_mask = GT_READ(PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW); /* mask off only the interrupts we're interested in */ irq_src = irq_src & irq_src_mask; - handled = 0; + handled = IRQ_NONE; /* Check for timer interrupt */ if (irq_src & 0x00000100) { - handled = 1; + handled = IRQ_HANDLED; irq_src &= ~0x00000100; /* Clear any pending cause bits */ @@ -141,90 +141,8 @@ static void gt64240_p0int_irq(int irq, void *dev_id, struct pt_regs *regs) "UNKNOWN P0_INT# interrupt received, irq_src=0x%x\n", irq_src); } -} - -/* - * Interrupt handler for interrupts coming from the Galileo chip. - * It could be built in ethernet ports etc... - */ -static void gt64240_irq(int irq, void *dev_id, struct pt_regs *regs) -{ - unsigned int irq_src, int_high_src, irq_src_mask, - int_high_src_mask; - int handled; - -#if 0 - GT_READ(GT_INTRCAUSE_OFS, &irq_src); - GT_READ(GT_INTRMASK_OFS, &irq_src_mask); - GT_READ(GT_HINTRCAUSE_OFS, &int_high_src); - GT_READ(GT_HINTRMASK_OFS, &int_high_src_mask); -#endif - irq_src = irq_src & irq_src_mask; - int_high_src = int_high_src & int_high_src_mask; - - handled = 0; - - /* Execute all interrupt handlers */ - /* Check for timer interrupt */ - if (irq_src & 0x00000800) { - handled = 1; - irq_src &= ~0x00000800; - // RESET_REG_BITS (INTERRUPT_CAUSE_REGISTER,BIT8); - do_timer(regs); - } - - if (irq_src) { - printk(KERN_INFO - "Other Galileo interrupt received irq_src %x\n", - irq_src); -#if CURRENTLY_UNUSED - for (count = 0; count < MAX_CAUSE_REG_WIDTH; count++) { - if (irq_src & (1 << count)) { - if (irq_handlers[INT_CAUSE_MAIN][count]. - routine) { - queue_task(&irq_handlers - [INT_CAUSE_MAIN][count], - &tq_immediate); - mark_bh(IMMEDIATE_BH); - handled = 1; - } - } - } -#endif /* UNUSED */ - } -#if 0 - GT_WRITE(GT_INTRCAUSE_OFS, 0); - GT_WRITE(GT_HINTRCAUSE_OFS, 0); -#endif -#undef GALILEO_I2O -#ifdef GALILEO_I2O - /* - * Future I2O support. We currently attach I2O interrupt handlers to - * the Galileo interrupt (int 4) and handle them in do_IRQ. - */ - if (isInBoundDoorBellInterruptSet()) { - printk(KERN_INFO "I2O doorbell interrupt received.\n"); - handled = 1; - } - - if (isInBoundPostQueueInterruptSet()) { - printk(KERN_INFO "I2O Queue interrupt received.\n"); - handled = 1; - } - - /* - * This normally would be outside of the ifdef, but since we're - * handling I2O outside of this handler, this printk shows up every - * time we get a valid I2O interrupt. So turn this off for now. - */ - if (handled == 0) { - if (counter < 50) { - printk("Spurious Galileo interrupt...\n"); - counter++; - } - } -#endif + return handled; } /* diff --git a/arch/mips/momentum/ocelot_g/gt64240.h b/arch/mips/momentum/ocelot_g/gt64240.h deleted file mode 100644 index c6cfc0b06e26..000000000000 --- a/arch/mips/momentum/ocelot_g/gt64240.h +++ /dev/null @@ -1,1238 +0,0 @@ -/* gt64240r.h - GT-64240 Internal registers definition file */ - -/* Copyright - Galileo technology. */ - -#ifndef __INCgt64240rh -#define __INCgt64240rh - -#define GTREG(v) (((v) & 0xff) << 24) | (((v) & 0xff00) << 8) | \ - (((v) >> 24) & 0xff) | (((v) >> 8) & 0xff00) - -#if 0 -#define GTREG_SHORT(X) (((X) << 8) | ((X) >> 8)) - -#define LONG_GTREG(X) ((l64) \ - (((X)&0x00000000000000ffULL) << 56) | \ - (((X)&0x000000000000ff00ULL) << 40) | \ - (((X)&0x0000000000ff0000ULL) << 24) | \ - (((X)&0x00000000ff000000ULL) << 8) | \ - (((X)&0x000000ff00000000ULL) >> 8) | \ - (((X)&0x0000ff0000000000ULL) >> 24) | \ - (((X)&0x00ff000000000000ULL) >> 40) | \ - (((X)&0xff00000000000000ULL) >> 56)) -#endif - -#include "gt64240_dep.h" - -/****************************************/ -/* CPU Control Registers */ -/****************************************/ - -#define CPU_CONFIGURATION 0x000 -#define CPU_MODE 0x120 -#define CPU_READ_RESPONSE_CROSSBAR_LOW 0x170 -#define CPU_READ_RESPONSE_CROSSBAR_HIGH 0x178 - -/****************************************/ -/* Processor Address Space */ -/****************************************/ - -/* Sdram's BAR'S */ -#define SCS_0_LOW_DECODE_ADDRESS 0x008 -#define SCS_0_HIGH_DECODE_ADDRESS 0x010 -#define SCS_1_LOW_DECODE_ADDRESS 0x208 -#define SCS_1_HIGH_DECODE_ADDRESS 0x210 -#define SCS_2_LOW_DECODE_ADDRESS 0x018 -#define SCS_2_HIGH_DECODE_ADDRESS 0x020 -#define SCS_3_LOW_DECODE_ADDRESS 0x218 -#define SCS_3_HIGH_DECODE_ADDRESS 0x220 -/* Devices BAR'S */ -#define CS_0_LOW_DECODE_ADDRESS 0x028 -#define CS_0_HIGH_DECODE_ADDRESS 0x030 -#define CS_1_LOW_DECODE_ADDRESS 0x228 -#define CS_1_HIGH_DECODE_ADDRESS 0x230 -#define CS_2_LOW_DECODE_ADDRESS 0x248 -#define CS_2_HIGH_DECODE_ADDRESS 0x250 -#define CS_3_LOW_DECODE_ADDRESS 0x038 -#define CS_3_HIGH_DECODE_ADDRESS 0x040 -#define BOOTCS_LOW_DECODE_ADDRESS 0x238 -#define BOOTCS_HIGH_DECODE_ADDRESS 0x240 - -#define PCI_0I_O_LOW_DECODE_ADDRESS 0x048 -#define PCI_0I_O_HIGH_DECODE_ADDRESS 0x050 -#define PCI_0MEMORY0_LOW_DECODE_ADDRESS 0x058 -#define PCI_0MEMORY0_HIGH_DECODE_ADDRESS 0x060 -#define PCI_0MEMORY1_LOW_DECODE_ADDRESS 0x080 -#define PCI_0MEMORY1_HIGH_DECODE_ADDRESS 0x088 -#define PCI_0MEMORY2_LOW_DECODE_ADDRESS 0x258 -#define PCI_0MEMORY2_HIGH_DECODE_ADDRESS 0x260 -#define PCI_0MEMORY3_LOW_DECODE_ADDRESS 0x280 -#define PCI_0MEMORY3_HIGH_DECODE_ADDRESS 0x288 - -#define PCI_1I_O_LOW_DECODE_ADDRESS 0x090 -#define PCI_1I_O_HIGH_DECODE_ADDRESS 0x098 -#define PCI_1MEMORY0_LOW_DECODE_ADDRESS 0x0a0 -#define PCI_1MEMORY0_HIGH_DECODE_ADDRESS 0x0a8 -#define PCI_1MEMORY1_LOW_DECODE_ADDRESS 0x0b0 -#define PCI_1MEMORY1_HIGH_DECODE_ADDRESS 0x0b8 -#define PCI_1MEMORY2_LOW_DECODE_ADDRESS 0x2a0 -#define PCI_1MEMORY2_HIGH_DECODE_ADDRESS 0x2a8 -#define PCI_1MEMORY3_LOW_DECODE_ADDRESS 0x2b0 -#define PCI_1MEMORY3_HIGH_DECODE_ADDRESS 0x2b8 - -#define INTERNAL_SPACE_DECODE 0x068 - -#define CPU_0_LOW_DECODE_ADDRESS 0x290 -#define CPU_0_HIGH_DECODE_ADDRESS 0x298 -#define CPU_1_LOW_DECODE_ADDRESS 0x2c0 -#define CPU_1_HIGH_DECODE_ADDRESS 0x2c8 - -#define PCI_0I_O_ADDRESS_REMAP 0x0f0 -#define PCI_0MEMORY0_ADDRESS_REMAP 0x0f8 -#define PCI_0MEMORY0_HIGH_ADDRESS_REMAP 0x320 -#define PCI_0MEMORY1_ADDRESS_REMAP 0x100 -#define PCI_0MEMORY1_HIGH_ADDRESS_REMAP 0x328 -#define PCI_0MEMORY2_ADDRESS_REMAP 0x2f8 -#define PCI_0MEMORY2_HIGH_ADDRESS_REMAP 0x330 -#define PCI_0MEMORY3_ADDRESS_REMAP 0x300 -#define PCI_0MEMORY3_HIGH_ADDRESS_REMAP 0x338 - -#define PCI_1I_O_ADDRESS_REMAP 0x108 -#define PCI_1MEMORY0_ADDRESS_REMAP 0x110 -#define PCI_1MEMORY0_HIGH_ADDRESS_REMAP 0x340 -#define PCI_1MEMORY1_ADDRESS_REMAP 0x118 -#define PCI_1MEMORY1_HIGH_ADDRESS_REMAP 0x348 -#define PCI_1MEMORY2_ADDRESS_REMAP 0x310 -#define PCI_1MEMORY2_HIGH_ADDRESS_REMAP 0x350 -#define PCI_1MEMORY3_ADDRESS_REMAP 0x318 -#define PCI_1MEMORY3_HIGH_ADDRESS_REMAP 0x358 - -/****************************************/ -/* CPU Sync Barrier */ -/****************************************/ - -#define PCI_0SYNC_BARIER_VIRTUAL_REGISTER 0x0c0 -#define PCI_1SYNC_BARIER_VIRTUAL_REGISTER 0x0c8 - - -/****************************************/ -/* CPU Access Protect */ -/****************************************/ - -#define CPU_LOW_PROTECT_ADDRESS_0 0X180 -#define CPU_HIGH_PROTECT_ADDRESS_0 0X188 -#define CPU_LOW_PROTECT_ADDRESS_1 0X190 -#define CPU_HIGH_PROTECT_ADDRESS_1 0X198 -#define CPU_LOW_PROTECT_ADDRESS_2 0X1a0 -#define CPU_HIGH_PROTECT_ADDRESS_2 0X1a8 -#define CPU_LOW_PROTECT_ADDRESS_3 0X1b0 -#define CPU_HIGH_PROTECT_ADDRESS_3 0X1b8 -#define CPU_LOW_PROTECT_ADDRESS_4 0X1c0 -#define CPU_HIGH_PROTECT_ADDRESS_4 0X1c8 -#define CPU_LOW_PROTECT_ADDRESS_5 0X1d0 -#define CPU_HIGH_PROTECT_ADDRESS_5 0X1d8 -#define CPU_LOW_PROTECT_ADDRESS_6 0X1e0 -#define CPU_HIGH_PROTECT_ADDRESS_6 0X1e8 -#define CPU_LOW_PROTECT_ADDRESS_7 0X1f0 -#define CPU_HIGH_PROTECT_ADDRESS_7 0X1f8 - - -/****************************************/ -/* Snoop Control */ -/****************************************/ - -#define SNOOP_BASE_ADDRESS_0 0x380 -#define SNOOP_TOP_ADDRESS_0 0x388 -#define SNOOP_BASE_ADDRESS_1 0x390 -#define SNOOP_TOP_ADDRESS_1 0x398 -#define SNOOP_BASE_ADDRESS_2 0x3a0 -#define SNOOP_TOP_ADDRESS_2 0x3a8 -#define SNOOP_BASE_ADDRESS_3 0x3b0 -#define SNOOP_TOP_ADDRESS_3 0x3b8 - -/****************************************/ -/* CPU Error Report */ -/****************************************/ - -#define CPU_ERROR_ADDRESS_LOW 0x070 -#define CPU_ERROR_ADDRESS_HIGH 0x078 -#define CPU_ERROR_DATA_LOW 0x128 -#define CPU_ERROR_DATA_HIGH 0x130 -#define CPU_ERROR_PARITY 0x138 -#define CPU_ERROR_CAUSE 0x140 -#define CPU_ERROR_MASK 0x148 - -/****************************************/ -/* Pslave Debug */ -/****************************************/ - -#define X_0_ADDRESS 0x360 -#define X_0_COMMAND_ID 0x368 -#define X_1_ADDRESS 0x370 -#define X_1_COMMAND_ID 0x378 -#define WRITE_DATA_LOW 0x3c0 -#define WRITE_DATA_HIGH 0x3c8 -#define WRITE_BYTE_ENABLE 0X3e0 -#define READ_DATA_LOW 0x3d0 -#define READ_DATA_HIGH 0x3d8 -#define READ_ID 0x3e8 - - -/****************************************/ -/* SDRAM and Device Address Space */ -/****************************************/ - - -/****************************************/ -/* SDRAM Configuration */ -/****************************************/ - -#define SDRAM_CONFIGURATION 0x448 -#define SDRAM_OPERATION_MODE 0x474 -#define SDRAM_ADDRESS_DECODE 0x47C -#define SDRAM_TIMING_PARAMETERS 0x4b4 -#define SDRAM_UMA_CONTROL 0x4a4 -#define SDRAM_CROSS_BAR_CONTROL_LOW 0x4a8 -#define SDRAM_CROSS_BAR_CONTROL_HIGH 0x4ac -#define SDRAM_CROSS_BAR_TIMEOUT 0x4b0 - - -/****************************************/ -/* SDRAM Parameters */ -/****************************************/ - -#define SDRAM_BANK0PARAMETERS 0x44C -#define SDRAM_BANK1PARAMETERS 0x450 -#define SDRAM_BANK2PARAMETERS 0x454 -#define SDRAM_BANK3PARAMETERS 0x458 - - -/****************************************/ -/* SDRAM Error Report */ -/****************************************/ - -#define SDRAM_ERROR_DATA_LOW 0x484 -#define SDRAM_ERROR_DATA_HIGH 0x480 -#define SDRAM_AND_DEVICE_ERROR_ADDRESS 0x490 -#define SDRAM_RECEIVED_ECC 0x488 -#define SDRAM_CALCULATED_ECC 0x48c -#define SDRAM_ECC_CONTROL 0x494 -#define SDRAM_ECC_ERROR_COUNTER 0x498 - - -/****************************************/ -/* SDunit Debug (for internal use) */ -/****************************************/ - -#define X0_ADDRESS 0x500 -#define X0_COMMAND_AND_ID 0x504 -#define X0_WRITE_DATA_LOW 0x508 -#define X0_WRITE_DATA_HIGH 0x50c -#define X0_WRITE_BYTE_ENABLE 0x518 -#define X0_READ_DATA_LOW 0x510 -#define X0_READ_DATA_HIGH 0x514 -#define X0_READ_ID 0x51c -#define X1_ADDRESS 0x520 -#define X1_COMMAND_AND_ID 0x524 -#define X1_WRITE_DATA_LOW 0x528 -#define X1_WRITE_DATA_HIGH 0x52c -#define X1_WRITE_BYTE_ENABLE 0x538 -#define X1_READ_DATA_LOW 0x530 -#define X1_READ_DATA_HIGH 0x534 -#define X1_READ_ID 0x53c -#define X0_SNOOP_ADDRESS 0x540 -#define X0_SNOOP_COMMAND 0x544 -#define X1_SNOOP_ADDRESS 0x548 -#define X1_SNOOP_COMMAND 0x54c - - -/****************************************/ -/* Device Parameters */ -/****************************************/ - -#define DEVICE_BANK0PARAMETERS 0x45c -#define DEVICE_BANK1PARAMETERS 0x460 -#define DEVICE_BANK2PARAMETERS 0x464 -#define DEVICE_BANK3PARAMETERS 0x468 -#define DEVICE_BOOT_BANK_PARAMETERS 0x46c -#define DEVICE_CONTROL 0x4c0 -#define DEVICE_CROSS_BAR_CONTROL_LOW 0x4c8 -#define DEVICE_CROSS_BAR_CONTROL_HIGH 0x4cc -#define DEVICE_CROSS_BAR_TIMEOUT 0x4c4 - - -/****************************************/ -/* Device Interrupt */ -/****************************************/ - -#define DEVICE_INTERRUPT_CAUSE 0x4d0 -#define DEVICE_INTERRUPT_MASK 0x4d4 -#define DEVICE_ERROR_ADDRESS 0x4d8 - -/****************************************/ -/* DMA Record */ -/****************************************/ - -#define CHANNEL0_DMA_BYTE_COUNT 0x800 -#define CHANNEL1_DMA_BYTE_COUNT 0x804 -#define CHANNEL2_DMA_BYTE_COUNT 0x808 -#define CHANNEL3_DMA_BYTE_COUNT 0x80C -#define CHANNEL4_DMA_BYTE_COUNT 0x900 -#define CHANNEL5_DMA_BYTE_COUNT 0x904 -#define CHANNEL6_DMA_BYTE_COUNT 0x908 -#define CHANNEL7_DMA_BYTE_COUNT 0x90C -#define CHANNEL0_DMA_SOURCE_ADDRESS 0x810 -#define CHANNEL1_DMA_SOURCE_ADDRESS 0x814 -#define CHANNEL2_DMA_SOURCE_ADDRESS 0x818 -#define CHANNEL3_DMA_SOURCE_ADDRESS 0x81C -#define CHANNEL4_DMA_SOURCE_ADDRESS 0x910 -#define CHANNEL5_DMA_SOURCE_ADDRESS 0x914 -#define CHANNEL6_DMA_SOURCE_ADDRESS 0x918 -#define CHANNEL7_DMA_SOURCE_ADDRESS 0x91C -#define CHANNEL0_DMA_DESTINATION_ADDRESS 0x820 -#define CHANNEL1_DMA_DESTINATION_ADDRESS 0x824 -#define CHANNEL2_DMA_DESTINATION_ADDRESS 0x828 -#define CHANNEL3_DMA_DESTINATION_ADDRESS 0x82C -#define CHANNEL4_DMA_DESTINATION_ADDRESS 0x920 -#define CHANNEL5_DMA_DESTINATION_ADDRESS 0x924 -#define CHANNEL6_DMA_DESTINATION_ADDRESS 0x928 -#define CHANNEL7_DMA_DESTINATION_ADDRESS 0x92C -#define CHANNEL0NEXT_RECORD_POINTER 0x830 -#define CHANNEL1NEXT_RECORD_POINTER 0x834 -#define CHANNEL2NEXT_RECORD_POINTER 0x838 -#define CHANNEL3NEXT_RECORD_POINTER 0x83C -#define CHANNEL4NEXT_RECORD_POINTER 0x930 -#define CHANNEL5NEXT_RECORD_POINTER 0x934 -#define CHANNEL6NEXT_RECORD_POINTER 0x938 -#define CHANNEL7NEXT_RECORD_POINTER 0x93C -#define CHANNEL0CURRENT_DESCRIPTOR_POINTER 0x870 -#define CHANNEL1CURRENT_DESCRIPTOR_POINTER 0x874 -#define CHANNEL2CURRENT_DESCRIPTOR_POINTER 0x878 -#define CHANNEL3CURRENT_DESCRIPTOR_POINTER 0x87C -#define CHANNEL4CURRENT_DESCRIPTOR_POINTER 0x970 -#define CHANNEL5CURRENT_DESCRIPTOR_POINTER 0x974 -#define CHANNEL6CURRENT_DESCRIPTOR_POINTER 0x978 -#define CHANNEL7CURRENT_DESCRIPTOR_POINTER 0x97C -#define CHANNEL0_DMA_SOURCE_HIGH_PCI_ADDRESS 0x890 -#define CHANNEL1_DMA_SOURCE_HIGH_PCI_ADDRESS 0x894 -#define CHANNEL2_DMA_SOURCE_HIGH_PCI_ADDRESS 0x898 -#define CHANNEL3_DMA_SOURCE_HIGH_PCI_ADDRESS 0x89c -#define CHANNEL4_DMA_SOURCE_HIGH_PCI_ADDRESS 0x990 -#define CHANNEL5_DMA_SOURCE_HIGH_PCI_ADDRESS 0x994 -#define CHANNEL6_DMA_SOURCE_HIGH_PCI_ADDRESS 0x998 -#define CHANNEL7_DMA_SOURCE_HIGH_PCI_ADDRESS 0x99c -#define CHANNEL0_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a0 -#define CHANNEL1_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a4 -#define CHANNEL2_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a8 -#define CHANNEL3_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8ac -#define CHANNEL4_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a0 -#define CHANNEL5_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a4 -#define CHANNEL6_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a8 -#define CHANNEL7_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9ac -#define CHANNEL0_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b0 -#define CHANNEL1_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b4 -#define CHANNEL2_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b8 -#define CHANNEL3_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8bc -#define CHANNEL4_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b0 -#define CHANNEL5_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b4 -#define CHANNEL6_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b8 -#define CHANNEL7_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9bc - -/****************************************/ -/* DMA Channel Control */ -/****************************************/ - -#define CHANNEL0CONTROL 0x840 -#define CHANNEL0CONTROL_HIGH 0x880 - -#define CHANNEL1CONTROL 0x844 -#define CHANNEL1CONTROL_HIGH 0x884 - -#define CHANNEL2CONTROL 0x848 -#define CHANNEL2CONTROL_HIGH 0x888 - -#define CHANNEL3CONTROL 0x84C -#define CHANNEL3CONTROL_HIGH 0x88C - -#define CHANNEL4CONTROL 0x940 -#define CHANNEL4CONTROL_HIGH 0x980 - -#define CHANNEL5CONTROL 0x944 -#define CHANNEL5CONTROL_HIGH 0x984 - -#define CHANNEL6CONTROL 0x948 -#define CHANNEL6CONTROL_HIGH 0x988 - -#define CHANNEL7CONTROL 0x94C -#define CHANNEL7CONTROL_HIGH 0x98C - - -/****************************************/ -/* DMA Arbiter */ -/****************************************/ - -#define ARBITER_CONTROL_0_3 0x860 -#define ARBITER_CONTROL_4_7 0x960 - - -/****************************************/ -/* DMA Interrupt */ -/****************************************/ - -#define CHANELS0_3_INTERRUPT_CAUSE 0x8c0 -#define CHANELS0_3_INTERRUPT_MASK 0x8c4 -#define CHANELS0_3_ERROR_ADDRESS 0x8c8 -#define CHANELS0_3_ERROR_SELECT 0x8cc -#define CHANELS4_7_INTERRUPT_CAUSE 0x9c0 -#define CHANELS4_7_INTERRUPT_MASK 0x9c4 -#define CHANELS4_7_ERROR_ADDRESS 0x9c8 -#define CHANELS4_7_ERROR_SELECT 0x9cc - - -/****************************************/ -/* DMA Debug (for internal use) */ -/****************************************/ - -#define DMA_X0_ADDRESS 0x8e0 -#define DMA_X0_COMMAND_AND_ID 0x8e4 -#define DMA_X0_WRITE_DATA_LOW 0x8e8 -#define DMA_X0_WRITE_DATA_HIGH 0x8ec -#define DMA_X0_WRITE_BYTE_ENABLE 0x8f8 -#define DMA_X0_READ_DATA_LOW 0x8f0 -#define DMA_X0_READ_DATA_HIGH 0x8f4 -#define DMA_X0_READ_ID 0x8fc -#define DMA_X1_ADDRESS 0x9e0 -#define DMA_X1_COMMAND_AND_ID 0x9e4 -#define DMA_X1_WRITE_DATA_LOW 0x9e8 -#define DMA_X1_WRITE_DATA_HIGH 0x9ec -#define DMA_X1_WRITE_BYTE_ENABLE 0x9f8 -#define DMA_X1_READ_DATA_LOW 0x9f0 -#define DMA_X1_READ_DATA_HIGH 0x9f4 -#define DMA_X1_READ_ID 0x9fc - -/****************************************/ -/* Timer_Counter */ -/****************************************/ - -#define TIMER_COUNTER0 0x850 -#define TIMER_COUNTER1 0x854 -#define TIMER_COUNTER2 0x858 -#define TIMER_COUNTER3 0x85C -#define TIMER_COUNTER_0_3_CONTROL 0x864 -#define TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868 -#define TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c -#define TIMER_COUNTER4 0x950 -#define TIMER_COUNTER5 0x954 -#define TIMER_COUNTER6 0x958 -#define TIMER_COUNTER7 0x95C -#define TIMER_COUNTER_4_7_CONTROL 0x964 -#define TIMER_COUNTER_4_7_INTERRUPT_CAUSE 0x968 -#define TIMER_COUNTER_4_7_INTERRUPT_MASK 0x96c - -/****************************************/ -/* PCI Slave Address Decoding */ -/****************************************/ - -#define PCI_0SCS_0_BANK_SIZE 0xc08 -#define PCI_1SCS_0_BANK_SIZE 0xc88 -#define PCI_0SCS_1_BANK_SIZE 0xd08 -#define PCI_1SCS_1_BANK_SIZE 0xd88 -#define PCI_0SCS_2_BANK_SIZE 0xc0c -#define PCI_1SCS_2_BANK_SIZE 0xc8c -#define PCI_0SCS_3_BANK_SIZE 0xd0c -#define PCI_1SCS_3_BANK_SIZE 0xd8c -#define PCI_0CS_0_BANK_SIZE 0xc10 -#define PCI_1CS_0_BANK_SIZE 0xc90 -#define PCI_0CS_1_BANK_SIZE 0xd10 -#define PCI_1CS_1_BANK_SIZE 0xd90 -#define PCI_0CS_2_BANK_SIZE 0xd18 -#define PCI_1CS_2_BANK_SIZE 0xd98 -#define PCI_0CS_3_BANK_SIZE 0xc14 -#define PCI_1CS_3_BANK_SIZE 0xc94 -#define PCI_0CS_BOOT_BANK_SIZE 0xd14 -#define PCI_1CS_BOOT_BANK_SIZE 0xd94 -#define PCI_0P2P_MEM0_BAR_SIZE 0xd1c -#define PCI_1P2P_MEM0_BAR_SIZE 0xd9c -#define PCI_0P2P_MEM1_BAR_SIZE 0xd20 -#define PCI_1P2P_MEM1_BAR_SIZE 0xda0 -#define PCI_0P2P_I_O_BAR_SIZE 0xd24 -#define PCI_1P2P_I_O_BAR_SIZE 0xda4 -#define PCI_0CPU_BAR_SIZE 0xd28 -#define PCI_1CPU_BAR_SIZE 0xda8 -#define PCI_0DAC_SCS_0_BANK_SIZE 0xe00 -#define PCI_1DAC_SCS_0_BANK_SIZE 0xe80 -#define PCI_0DAC_SCS_1_BANK_SIZE 0xe04 -#define PCI_1DAC_SCS_1_BANK_SIZE 0xe84 -#define PCI_0DAC_SCS_2_BANK_SIZE 0xe08 -#define PCI_1DAC_SCS_2_BANK_SIZE 0xe88 -#define PCI_0DAC_SCS_3_BANK_SIZE 0xe0c -#define PCI_1DAC_SCS_3_BANK_SIZE 0xe8c -#define PCI_0DAC_CS_0_BANK_SIZE 0xe10 -#define PCI_1DAC_CS_0_BANK_SIZE 0xe90 -#define PCI_0DAC_CS_1_BANK_SIZE 0xe14 -#define PCI_1DAC_CS_1_BANK_SIZE 0xe94 -#define PCI_0DAC_CS_2_BANK_SIZE 0xe18 -#define PCI_1DAC_CS_2_BANK_SIZE 0xe98 -#define PCI_0DAC_CS_3_BANK_SIZE 0xe1c -#define PCI_1DAC_CS_3_BANK_SIZE 0xe9c -#define PCI_0DAC_BOOTCS_BANK_SIZE 0xe20 -#define PCI_1DAC_BOOTCS_BANK_SIZE 0xea0 -#define PCI_0DAC_P2P_MEM0_BAR_SIZE 0xe24 -#define PCI_1DAC_P2P_MEM0_BAR_SIZE 0xea4 -#define PCI_0DAC_P2P_MEM1_BAR_SIZE 0xe28 -#define PCI_1DAC_P2P_MEM1_BAR_SIZE 0xea8 -#define PCI_0DAC_CPU_BAR_SIZE 0xe2c -#define PCI_1DAC_CPU_BAR_SIZE 0xeac -#define PCI_0EXPANSION_ROM_BAR_SIZE 0xd2c -#define PCI_1EXPANSION_ROM_BAR_SIZE 0xdac -#define PCI_0BASE_ADDRESS_REGISTERS_ENABLE 0xc3c -#define PCI_1BASE_ADDRESS_REGISTERS_ENABLE 0xcbc -#define PCI_0SCS_0_BASE_ADDRESS_REMAP 0xc48 -#define PCI_1SCS_0_BASE_ADDRESS_REMAP 0xcc8 -#define PCI_0SCS_1_BASE_ADDRESS_REMAP 0xd48 -#define PCI_1SCS_1_BASE_ADDRESS_REMAP 0xdc8 -#define PCI_0SCS_2_BASE_ADDRESS_REMAP 0xc4c -#define PCI_1SCS_2_BASE_ADDRESS_REMAP 0xccc -#define PCI_0SCS_3_BASE_ADDRESS_REMAP 0xd4c -#define PCI_1SCS_3_BASE_ADDRESS_REMAP 0xdcc -#define PCI_0CS_0_BASE_ADDRESS_REMAP 0xc50 -#define PCI_1CS_0_BASE_ADDRESS_REMAP 0xcd0 -#define PCI_0CS_1_BASE_ADDRESS_REMAP 0xd50 -#define PCI_1CS_1_BASE_ADDRESS_REMAP 0xdd0 -#define PCI_0CS_2_BASE_ADDRESS_REMAP 0xd58 -#define PCI_1CS_2_BASE_ADDRESS_REMAP 0xdd8 -#define PCI_0CS_3_BASE_ADDRESS_REMAP 0xc54 -#define PCI_1CS_3_BASE_ADDRESS_REMAP 0xcd4 -#define PCI_0CS_BOOTCS_BASE_ADDRESS_REMAP 0xd54 -#define PCI_1CS_BOOTCS_BASE_ADDRESS_REMAP 0xdd4 -#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xd5c -#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xddc -#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xd60 -#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xde0 -#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xd64 -#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xde4 -#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xd68 -#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xde8 -#define PCI_0P2P_I_O_BASE_ADDRESS_REMAP 0xd6c -#define PCI_1P2P_I_O_BASE_ADDRESS_REMAP 0xdec -#define PCI_0CPU_BASE_ADDRESS_REMAP 0xd70 -#define PCI_1CPU_BASE_ADDRESS_REMAP 0xdf0 -#define PCI_0DAC_SCS_0_BASE_ADDRESS_REMAP 0xf00 -#define PCI_1DAC_SCS_0_BASE_ADDRESS_REMAP 0xff0 -#define PCI_0DAC_SCS_1_BASE_ADDRESS_REMAP 0xf04 -#define PCI_1DAC_SCS_1_BASE_ADDRESS_REMAP 0xf84 -#define PCI_0DAC_SCS_2_BASE_ADDRESS_REMAP 0xf08 -#define PCI_1DAC_SCS_2_BASE_ADDRESS_REMAP 0xf88 -#define PCI_0DAC_SCS_3_BASE_ADDRESS_REMAP 0xf0c -#define PCI_1DAC_SCS_3_BASE_ADDRESS_REMAP 0xf8c -#define PCI_0DAC_CS_0_BASE_ADDRESS_REMAP 0xf10 -#define PCI_1DAC_CS_0_BASE_ADDRESS_REMAP 0xf90 -#define PCI_0DAC_CS_1_BASE_ADDRESS_REMAP 0xf14 -#define PCI_1DAC_CS_1_BASE_ADDRESS_REMAP 0xf94 -#define PCI_0DAC_CS_2_BASE_ADDRESS_REMAP 0xf18 -#define PCI_1DAC_CS_2_BASE_ADDRESS_REMAP 0xf98 -#define PCI_0DAC_CS_3_BASE_ADDRESS_REMAP 0xf1c -#define PCI_1DAC_CS_3_BASE_ADDRESS_REMAP 0xf9c -#define PCI_0DAC_BOOTCS_BASE_ADDRESS_REMAP 0xf20 -#define PCI_1DAC_BOOTCS_BASE_ADDRESS_REMAP 0xfa0 -#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xf24 -#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xfa4 -#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xf28 -#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xfa8 -#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xf2c -#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xfac -#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xf30 -#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xfb0 -#define PCI_0DAC_CPU_BASE_ADDRESS_REMAP 0xf34 -#define PCI_1DAC_CPU_BASE_ADDRESS_REMAP 0xfb4 -#define PCI_0EXPANSION_ROM_BASE_ADDRESS_REMAP 0xf38 -#define PCI_1EXPANSION_ROM_BASE_ADDRESS_REMAP 0xfb8 -#define PCI_0ADDRESS_DECODE_CONTROL 0xd3c -#define PCI_1ADDRESS_DECODE_CONTROL 0xdbc - -/****************************************/ -/* PCI Control */ -/****************************************/ - -#define PCI_0COMMAND 0xc00 -#define PCI_1COMMAND 0xc80 -#define PCI_0MODE 0xd00 -#define PCI_1MODE 0xd80 -#define PCI_0TIMEOUT_RETRY 0xc04 -#define PCI_1TIMEOUT_RETRY 0xc84 -#define PCI_0READ_BUFFER_DISCARD_TIMER 0xd04 -#define PCI_1READ_BUFFER_DISCARD_TIMER 0xd84 -#define MSI_0TRIGGER_TIMER 0xc38 -#define MSI_1TRIGGER_TIMER 0xcb8 -#define PCI_0ARBITER_CONTROL 0x1d00 -#define PCI_1ARBITER_CONTROL 0x1d80 -/* changing untill here */ -#define PCI_0CROSS_BAR_CONTROL_LOW 0x1d08 -#define PCI_0CROSS_BAR_CONTROL_HIGH 0x1d0c -#define PCI_0CROSS_BAR_TIMEOUT 0x1d04 -#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d18 -#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d1c -#define PCI_0SYNC_BARRIER_VIRTUAL_REGISTER 0x1d10 -#define PCI_0P2P_CONFIGURATION 0x1d14 -#define PCI_0ACCESS_CONTROL_BASE_0_LOW 0x1e00 -#define PCI_0ACCESS_CONTROL_BASE_0_HIGH 0x1e04 -#define PCI_0ACCESS_CONTROL_TOP_0 0x1e08 -#define PCI_0ACCESS_CONTROL_BASE_1_LOW 0c1e10 -#define PCI_0ACCESS_CONTROL_BASE_1_HIGH 0x1e14 -#define PCI_0ACCESS_CONTROL_TOP_1 0x1e18 -#define PCI_0ACCESS_CONTROL_BASE_2_LOW 0c1e20 -#define PCI_0ACCESS_CONTROL_BASE_2_HIGH 0x1e24 -#define PCI_0ACCESS_CONTROL_TOP_2 0x1e28 -#define PCI_0ACCESS_CONTROL_BASE_3_LOW 0c1e30 -#define PCI_0ACCESS_CONTROL_BASE_3_HIGH 0x1e34 -#define PCI_0ACCESS_CONTROL_TOP_3 0x1e38 -#define PCI_0ACCESS_CONTROL_BASE_4_LOW 0c1e40 -#define PCI_0ACCESS_CONTROL_BASE_4_HIGH 0x1e44 -#define PCI_0ACCESS_CONTROL_TOP_4 0x1e48 -#define PCI_0ACCESS_CONTROL_BASE_5_LOW 0c1e50 -#define PCI_0ACCESS_CONTROL_BASE_5_HIGH 0x1e54 -#define PCI_0ACCESS_CONTROL_TOP_5 0x1e58 -#define PCI_0ACCESS_CONTROL_BASE_6_LOW 0c1e60 -#define PCI_0ACCESS_CONTROL_BASE_6_HIGH 0x1e64 -#define PCI_0ACCESS_CONTROL_TOP_6 0x1e68 -#define PCI_0ACCESS_CONTROL_BASE_7_LOW 0c1e70 -#define PCI_0ACCESS_CONTROL_BASE_7_HIGH 0x1e74 -#define PCI_0ACCESS_CONTROL_TOP_7 0x1e78 -#define PCI_1CROSS_BAR_CONTROL_LOW 0x1d88 -#define PCI_1CROSS_BAR_CONTROL_HIGH 0x1d8c -#define PCI_1CROSS_BAR_TIMEOUT 0x1d84 -#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d98 -#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d9c -#define PCI_1SYNC_BARRIER_VIRTUAL_REGISTER 0x1d90 -#define PCI_1P2P_CONFIGURATION 0x1d94 -#define PCI_1ACCESS_CONTROL_BASE_0_LOW 0x1e80 -#define PCI_1ACCESS_CONTROL_BASE_0_HIGH 0x1e84 -#define PCI_1ACCESS_CONTROL_TOP_0 0x1e88 -#define PCI_1ACCESS_CONTROL_BASE_1_LOW 0c1e90 -#define PCI_1ACCESS_CONTROL_BASE_1_HIGH 0x1e94 -#define PCI_1ACCESS_CONTROL_TOP_1 0x1e98 -#define PCI_1ACCESS_CONTROL_BASE_2_LOW 0c1ea0 -#define PCI_1ACCESS_CONTROL_BASE_2_HIGH 0x1ea4 -#define PCI_1ACCESS_CONTROL_TOP_2 0x1ea8 -#define PCI_1ACCESS_CONTROL_BASE_3_LOW 0c1eb0 -#define PCI_1ACCESS_CONTROL_BASE_3_HIGH 0x1eb4 -#define PCI_1ACCESS_CONTROL_TOP_3 0x1eb8 -#define PCI_1ACCESS_CONTROL_BASE_4_LOW 0c1ec0 -#define PCI_1ACCESS_CONTROL_BASE_4_HIGH 0x1ec4 -#define PCI_1ACCESS_CONTROL_TOP_4 0x1ec8 -#define PCI_1ACCESS_CONTROL_BASE_5_LOW 0c1ed0 -#define PCI_1ACCESS_CONTROL_BASE_5_HIGH 0x1ed4 -#define PCI_1ACCESS_CONTROL_TOP_5 0x1ed8 -#define PCI_1ACCESS_CONTROL_BASE_6_LOW 0c1ee0 -#define PCI_1ACCESS_CONTROL_BASE_6_HIGH 0x1ee4 -#define PCI_1ACCESS_CONTROL_TOP_6 0x1ee8 -#define PCI_1ACCESS_CONTROL_BASE_7_LOW 0c1ef0 -#define PCI_1ACCESS_CONTROL_BASE_7_HIGH 0x1ef4 -#define PCI_1ACCESS_CONTROL_TOP_7 0x1ef8 - -/****************************************/ -/* PCI Snoop Control */ -/****************************************/ - -#define PCI_0SNOOP_CONTROL_BASE_0_LOW 0x1f00 -#define PCI_0SNOOP_CONTROL_BASE_0_HIGH 0x1f04 -#define PCI_0SNOOP_CONTROL_TOP_0 0x1f08 -#define PCI_0SNOOP_CONTROL_BASE_1_0_LOW 0x1f10 -#define PCI_0SNOOP_CONTROL_BASE_1_0_HIGH 0x1f14 -#define PCI_0SNOOP_CONTROL_TOP_1 0x1f18 -#define PCI_0SNOOP_CONTROL_BASE_2_0_LOW 0x1f20 -#define PCI_0SNOOP_CONTROL_BASE_2_0_HIGH 0x1f24 -#define PCI_0SNOOP_CONTROL_TOP_2 0x1f28 -#define PCI_0SNOOP_CONTROL_BASE_3_0_LOW 0x1f30 -#define PCI_0SNOOP_CONTROL_BASE_3_0_HIGH 0x1f34 -#define PCI_0SNOOP_CONTROL_TOP_3 0x1f38 -#define PCI_1SNOOP_CONTROL_BASE_0_LOW 0x1f80 -#define PCI_1SNOOP_CONTROL_BASE_0_HIGH 0x1f84 -#define PCI_1SNOOP_CONTROL_TOP_0 0x1f88 -#define PCI_1SNOOP_CONTROL_BASE_1_0_LOW 0x1f90 -#define PCI_1SNOOP_CONTROL_BASE_1_0_HIGH 0x1f94 -#define PCI_1SNOOP_CONTROL_TOP_1 0x1f98 -#define PCI_1SNOOP_CONTROL_BASE_2_0_LOW 0x1fa0 -#define PCI_1SNOOP_CONTROL_BASE_2_0_HIGH 0x1fa4 -#define PCI_1SNOOP_CONTROL_TOP_2 0x1fa8 -#define PCI_1SNOOP_CONTROL_BASE_3_0_LOW 0x1fb0 -#define PCI_1SNOOP_CONTROL_BASE_3_0_HIGH 0x1fb4 -#define PCI_1SNOOP_CONTROL_TOP_3 0x1fb8 - -/****************************************/ -/* PCI Configuration Address */ -/****************************************/ - -#define PCI_0CONFIGURATION_ADDRESS 0xcf8 -#define PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER 0xcfc -#define PCI_1CONFIGURATION_ADDRESS 0xc78 -#define PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER 0xc7c -#define PCI_0INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xc34 -#define PCI_1INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xcb4 - -/****************************************/ -/* PCI Error Report */ -/****************************************/ - -#define PCI_0SERR_MASK 0xc28 -#define PCI_0ERROR_ADDRESS_LOW 0x1d40 -#define PCI_0ERROR_ADDRESS_HIGH 0x1d44 -#define PCI_0ERROR_DATA_LOW 0x1d48 -#define PCI_0ERROR_DATA_HIGH 0x1d4c -#define PCI_0ERROR_COMMAND 0x1d50 -#define PCI_0ERROR_CAUSE 0x1d58 -#define PCI_0ERROR_MASK 0x1d5c - -#define PCI_1SERR_MASK 0xca8 -#define PCI_1ERROR_ADDRESS_LOW 0x1dc0 -#define PCI_1ERROR_ADDRESS_HIGH 0x1dc4 -#define PCI_1ERROR_DATA_LOW 0x1dc8 -#define PCI_1ERROR_DATA_HIGH 0x1dcc -#define PCI_1ERROR_COMMAND 0x1dd0 -#define PCI_1ERROR_CAUSE 0x1dd8 -#define PCI_1ERROR_MASK 0x1ddc - - -/****************************************/ -/* Lslave Debug (for internal use) */ -/****************************************/ - -#define L_SLAVE_X0_ADDRESS 0x1d20 -#define L_SLAVE_X0_COMMAND_AND_ID 0x1d24 -#define L_SLAVE_X1_ADDRESS 0x1d28 -#define L_SLAVE_X1_COMMAND_AND_ID 0x1d2c -#define L_SLAVE_WRITE_DATA_LOW 0x1d30 -#define L_SLAVE_WRITE_DATA_HIGH 0x1d34 -#define L_SLAVE_WRITE_BYTE_ENABLE 0x1d60 -#define L_SLAVE_READ_DATA_LOW 0x1d38 -#define L_SLAVE_READ_DATA_HIGH 0x1d3c -#define L_SLAVE_READ_ID 0x1d64 - -/****************************************/ -/* PCI Configuration Function 0 */ -/****************************************/ - -#define PCI_DEVICE_AND_VENDOR_ID 0x000 -#define PCI_STATUS_AND_COMMAND 0x004 -#define PCI_CLASS_CODE_AND_REVISION_ID 0x008 -#define PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C -#define PCI_SCS_0_BASE_ADDRESS 0x010 -#define PCI_SCS_1_BASE_ADDRESS 0x014 -#define PCI_SCS_2_BASE_ADDRESS 0x018 -#define PCI_SCS_3_BASE_ADDRESS 0x01C -#define PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS 0x020 -#define PCI_INTERNAL_REGISTERS_I_OMAPPED_BASE_ADDRESS 0x024 -#define PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02C -#define PCI_EXPANSION_ROM_BASE_ADDRESS_REGISTER 0x030 -#define PCI_CAPABILTY_LIST_POINTER 0x034 -#define PCI_INTERRUPT_PIN_AND_LINE 0x03C -#define PCI_POWER_MANAGEMENT_CAPABILITY 0x040 -#define PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044 -#define PCI_VPD_ADDRESS 0x048 -#define PCI_VPD_DATA 0X04c -#define PCI_MSI_MESSAGE_CONTROL 0x050 -#define PCI_MSI_MESSAGE_ADDRESS 0x054 -#define PCI_MSI_MESSAGE_UPPER_ADDRESS 0x058 -#define PCI_MSI_MESSAGE_DATA 0x05c -#define PCI_COMPACT_PCI_HOT_SWAP_CAPABILITY 0x058 - -/****************************************/ -/* PCI Configuration Function 1 */ -/****************************************/ - -#define PCI_CS_0_BASE_ADDRESS 0x110 -#define PCI_CS_1_BASE_ADDRESS 0x114 -#define PCI_CS_2_BASE_ADDRESS 0x118 -#define PCI_CS_3_BASE_ADDRESS 0x11c -#define PCI_BOOTCS_BASE_ADDRESS 0x120 - -/****************************************/ -/* PCI Configuration Function 2 */ -/****************************************/ - -#define PCI_P2P_MEM0_BASE_ADDRESS 0x210 -#define PCI_P2P_MEM1_BASE_ADDRESS 0x214 -#define PCI_P2P_I_O_BASE_ADDRESS 0x218 -#define PCI_CPU_BASE_ADDRESS 0x21c - -/****************************************/ -/* PCI Configuration Function 4 */ -/****************************************/ - -#define PCI_DAC_SCS_0_BASE_ADDRESS_LOW 0x410 -#define PCI_DAC_SCS_0_BASE_ADDRESS_HIGH 0x414 -#define PCI_DAC_SCS_1_BASE_ADDRESS_LOW 0x418 -#define PCI_DAC_SCS_1_BASE_ADDRESS_HIGH 0x41c -#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_LOW 0x420 -#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_HIGH 0x424 - - -/****************************************/ -/* PCI Configuration Function 5 */ -/****************************************/ - -#define PCI_DAC_SCS_2_BASE_ADDRESS_LOW 0x510 -#define PCI_DAC_SCS_2_BASE_ADDRESS_HIGH 0x514 -#define PCI_DAC_SCS_3_BASE_ADDRESS_LOW 0x518 -#define PCI_DAC_SCS_3_BASE_ADDRESS_HIGH 0x51c -#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_LOW 0x520 -#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_HIGH 0x524 - - -/****************************************/ -/* PCI Configuration Function 6 */ -/****************************************/ - -#define PCI_DAC_CS_0_BASE_ADDRESS_LOW 0x610 -#define PCI_DAC_CS_0_BASE_ADDRESS_HIGH 0x614 -#define PCI_DAC_CS_1_BASE_ADDRESS_LOW 0x618 -#define PCI_DAC_CS_1_BASE_ADDRESS_HIGH 0x61c -#define PCI_DAC_CS_2_BASE_ADDRESS_LOW 0x620 -#define PCI_DAC_CS_2_BASE_ADDRESS_HIGH 0x624 - -/****************************************/ -/* PCI Configuration Function 7 */ -/****************************************/ - -#define PCI_DAC_CS_3_BASE_ADDRESS_LOW 0x710 -#define PCI_DAC_CS_3_BASE_ADDRESS_HIGH 0x714 -#define PCI_DAC_BOOTCS_BASE_ADDRESS_LOW 0x718 -#define PCI_DAC_BOOTCS_BASE_ADDRESS_HIGH 0x71c -#define PCI_DAC_CPU_BASE_ADDRESS_LOW 0x720 -#define PCI_DAC_CPU_BASE_ADDRESS_HIGH 0x724 - -/****************************************/ -/* Interrupts */ -/****************************************/ - -#define LOW_INTERRUPT_CAUSE_REGISTER 0xc18 -#define HIGH_INTERRUPT_CAUSE_REGISTER 0xc68 -#define CPU_INTERRUPT_MASK_REGISTER_LOW 0xc1c -#define CPU_INTERRUPT_MASK_REGISTER_HIGH 0xc6c -#define CPU_SELECT_CAUSE_REGISTER 0xc70 -#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW 0xc24 -#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0xc64 -#define PCI_0SELECT_CAUSE 0xc74 -#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW 0xca4 -#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0xce4 -#define PCI_1SELECT_CAUSE 0xcf4 -#define CPU_INT_0_MASK 0xe60 -#define CPU_INT_1_MASK 0xe64 -#define CPU_INT_2_MASK 0xe68 -#define CPU_INT_3_MASK 0xe6c - -/****************************************/ -/* I20 Support registers */ -/****************************************/ - -#define INBOUND_MESSAGE_REGISTER0_PCI0_SIDE 0x010 -#define INBOUND_MESSAGE_REGISTER1_PCI0_SIDE 0x014 -#define OUTBOUND_MESSAGE_REGISTER0_PCI0_SIDE 0x018 -#define OUTBOUND_MESSAGE_REGISTER1_PCI0_SIDE 0x01C -#define INBOUND_DOORBELL_REGISTER_PCI0_SIDE 0x020 -#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE 0x024 -#define INBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE 0x028 -#define OUTBOUND_DOORBELL_REGISTER_PCI0_SIDE 0x02C -#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE 0x030 -#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE 0x034 -#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE 0x040 -#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE 0x044 -#define QUEUE_CONTROL_REGISTER_PCI0_SIDE 0x050 -#define QUEUE_BASE_ADDRESS_REGISTER_PCI0_SIDE 0x054 -#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE 0x060 -#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE 0x064 -#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE 0x068 -#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE 0x06C -#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE 0x070 -#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE 0x074 -#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE 0x0F8 -#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE 0x0FC - -#define INBOUND_MESSAGE_REGISTER0_PCI1_SIDE 0x090 -#define INBOUND_MESSAGE_REGISTER1_PCI1_SIDE 0x094 -#define OUTBOUND_MESSAGE_REGISTER0_PCI1_SIDE 0x098 -#define OUTBOUND_MESSAGE_REGISTER1_PCI1_SIDE 0x09C -#define INBOUND_DOORBELL_REGISTER_PCI1_SIDE 0x0A0 -#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE 0x0A4 -#define INBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE 0x0A8 -#define OUTBOUND_DOORBELL_REGISTER_PCI1_SIDE 0x0AC -#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE 0x0B0 -#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE 0x0B4 -#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE 0x0C0 -#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE 0x0C4 -#define QUEUE_CONTROL_REGISTER_PCI1_SIDE 0x0D0 -#define QUEUE_BASE_ADDRESS_REGISTER_PCI1_SIDE 0x0D4 -#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0E0 -#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0E4 -#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0E8 -#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0EC -#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0F0 -#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0F4 -#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE 0x078 -#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE 0x07C - -#define INBOUND_MESSAGE_REGISTER0_CPU0_SIDE 0X1C10 -#define INBOUND_MESSAGE_REGISTER1_CPU0_SIDE 0X1C14 -#define OUTBOUND_MESSAGE_REGISTER0_CPU0_SIDE 0X1C18 -#define OUTBOUND_MESSAGE_REGISTER1_CPU0_SIDE 0X1C1C -#define INBOUND_DOORBELL_REGISTER_CPU0_SIDE 0X1C20 -#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE 0X1C24 -#define INBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE 0X1C28 -#define OUTBOUND_DOORBELL_REGISTER_CPU0_SIDE 0X1C2C -#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE 0X1C30 -#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE 0X1C34 -#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE 0X1C40 -#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE 0X1C44 -#define QUEUE_CONTROL_REGISTER_CPU0_SIDE 0X1C50 -#define QUEUE_BASE_ADDRESS_REGISTER_CPU0_SIDE 0X1C54 -#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C60 -#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C64 -#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C68 -#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C6C -#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C70 -#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C74 -#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1CF8 -#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1CFC - -#define INBOUND_MESSAGE_REGISTER0_CPU1_SIDE 0X1C90 -#define INBOUND_MESSAGE_REGISTER1_CPU1_SIDE 0X1C94 -#define OUTBOUND_MESSAGE_REGISTER0_CPU1_SIDE 0X1C98 -#define OUTBOUND_MESSAGE_REGISTER1_CPU1_SIDE 0X1C9C -#define INBOUND_DOORBELL_REGISTER_CPU1_SIDE 0X1CA0 -#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE 0X1CA4 -#define INBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE 0X1CA8 -#define OUTBOUND_DOORBELL_REGISTER_CPU1_SIDE 0X1CAC -#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE 0X1CB0 -#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE 0X1CB4 -#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE 0X1CC0 -#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE 0X1CC4 -#define QUEUE_CONTROL_REGISTER_CPU1_SIDE 0X1CD0 -#define QUEUE_BASE_ADDRESS_REGISTER_CPU1_SIDE 0X1CD4 -#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CE0 -#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CE4 -#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CE8 -#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CEC -#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CF0 -#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CF4 -#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1C78 -#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1C7C - -/****************************************/ -/* Communication Unit Registers */ -/****************************************/ - -#define ETHERNET_0_ADDRESS_CONTROL_LOW -#define ETHERNET_0_ADDRESS_CONTROL_HIGH 0xf204 -#define ETHERNET_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf208 -#define ETHERNET_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf20c -#define ETHERNET_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf210 -#define ETHERNET_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf214 -#define ETHERNET_0_HASH_TABLE_PCI_HIGH_ADDRESS 0xf218 -#define ETHERNET_1_ADDRESS_CONTROL_LOW 0xf220 -#define ETHERNET_1_ADDRESS_CONTROL_HIGH 0xf224 -#define ETHERNET_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf228 -#define ETHERNET_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf22c -#define ETHERNET_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf230 -#define ETHERNET_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf234 -#define ETHERNET_1_HASH_TABLE_PCI_HIGH_ADDRESS 0xf238 -#define ETHERNET_2_ADDRESS_CONTROL_LOW 0xf240 -#define ETHERNET_2_ADDRESS_CONTROL_HIGH 0xf244 -#define ETHERNET_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf248 -#define ETHERNET_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf24c -#define ETHERNET_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf250 -#define ETHERNET_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf254 -#define ETHERNET_2_HASH_TABLE_PCI_HIGH_ADDRESS 0xf258 -#define MPSC_0_ADDRESS_CONTROL_LOW 0xf280 -#define MPSC_0_ADDRESS_CONTROL_HIGH 0xf284 -#define MPSC_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf288 -#define MPSC_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf28c -#define MPSC_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf290 -#define MPSC_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf294 -#define MPSC_1_ADDRESS_CONTROL_LOW 0xf2a0 -#define MPSC_1_ADDRESS_CONTROL_HIGH 0xf2a4 -#define MPSC_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2a8 -#define MPSC_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2ac -#define MPSC_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2b0 -#define MPSC_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2b4 -#define MPSC_2_ADDRESS_CONTROL_LOW 0xf2c0 -#define MPSC_2_ADDRESS_CONTROL_HIGH 0xf2c4 -#define MPSC_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2c8 -#define MPSC_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2cc -#define MPSC_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d0 -#define MPSC_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d4 -#define SERIAL_INIT_PCI_HIGH_ADDRESS 0xf320 -#define SERIAL_INIT_LAST_DATA 0xf324 -#define SERIAL_INIT_STATUS_AND_CONTROL 0xf328 -#define COMM_UNIT_ARBITER_CONTROL 0xf300 -#define COMM_UNIT_CROSS_BAR_TIMEOUT 0xf304 -#define COMM_UNIT_INTERRUPT_CAUSE 0xf310 -#define COMM_UNIT_INTERRUPT_MASK 0xf314 -#define COMM_UNIT_ERROR_ADDRESS 0xf314 - -/****************************************/ -/* Cunit Debug (for internal use) */ -/****************************************/ - -#define CUNIT_ADDRESS 0xf340 -#define CUNIT_COMMAND_AND_ID 0xf344 -#define CUNIT_WRITE_DATA_LOW 0xf348 -#define CUNIT_WRITE_DATA_HIGH 0xf34c -#define CUNIT_WRITE_BYTE_ENABLE 0xf358 -#define CUNIT_READ_DATA_LOW 0xf350 -#define CUNIT_READ_DATA_HIGH 0xf354 -#define CUNIT_READ_ID 0xf35c - -/****************************************/ -/* Fast Ethernet Unit Registers */ -/****************************************/ - -/* Ethernet */ - -#define ETHERNET_PHY_ADDRESS_REGISTER 0x2000 -#define ETHERNET_SMI_REGISTER 0x2010 - -/* Ethernet 0 */ - -#define ETHERNET0_PORT_CONFIGURATION_REGISTER 0x2400 -#define ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER 0x2408 -#define ETHERNET0_PORT_COMMAND_REGISTER 0x2410 -#define ETHERNET0_PORT_STATUS_REGISTER 0x2418 -#define ETHERNET0_SERIAL_PARAMETRS_REGISTER 0x2420 -#define ETHERNET0_HASH_TABLE_POINTER_REGISTER 0x2428 -#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2430 -#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2438 -#define ETHERNET0_SDMA_CONFIGURATION_REGISTER 0x2440 -#define ETHERNET0_SDMA_COMMAND_REGISTER 0x2448 -#define ETHERNET0_INTERRUPT_CAUSE_REGISTER 0x2450 -#define ETHERNET0_INTERRUPT_MASK_REGISTER 0x2458 -#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 0x2480 -#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER1 0x2484 -#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER2 0x2488 -#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER3 0x248c -#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 0x24a0 -#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER1 0x24a4 -#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER2 0x24a8 -#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER3 0x24ac -#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0 0x24e0 -#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER1 0x24e4 -#define ETHERNET0_MIB_COUNTER_BASE 0x2500 - -/* Ethernet 1 */ - -#define ETHERNET1_PORT_CONFIGURATION_REGISTER 0x2800 -#define ETHERNET1_PORT_CONFIGURATION_EXTEND_REGISTER 0x2808 -#define ETHERNET1_PORT_COMMAND_REGISTER 0x2810 -#define ETHERNET1_PORT_STATUS_REGISTER 0x2818 -#define ETHERNET1_SERIAL_PARAMETRS_REGISTER 0x2820 -#define ETHERNET1_HASH_TABLE_POINTER_REGISTER 0x2828 -#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2830 -#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2838 -#define ETHERNET1_SDMA_CONFIGURATION_REGISTER 0x2840 -#define ETHERNET1_SDMA_COMMAND_REGISTER 0x2848 -#define ETHERNET1_INTERRUPT_CAUSE_REGISTER 0x2850 -#define ETHERNET1_INTERRUPT_MASK_REGISTER 0x2858 -#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER0 0x2880 -#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER1 0x2884 -#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER2 0x2888 -#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER3 0x288c -#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER0 0x28a0 -#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER1 0x28a4 -#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER2 0x28a8 -#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER3 0x28ac -#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER0 0x28e0 -#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER1 0x28e4 -#define ETHERNET1_MIB_COUNTER_BASE 0x2900 - -/* Ethernet 2 */ - -#define ETHERNET2_PORT_CONFIGURATION_REGISTER 0x2c00 -#define ETHERNET2_PORT_CONFIGURATION_EXTEND_REGISTER 0x2c08 -#define ETHERNET2_PORT_COMMAND_REGISTER 0x2c10 -#define ETHERNET2_PORT_STATUS_REGISTER 0x2c18 -#define ETHERNET2_SERIAL_PARAMETRS_REGISTER 0x2c20 -#define ETHERNET2_HASH_TABLE_POINTER_REGISTER 0x2c28 -#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2c30 -#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2c38 -#define ETHERNET2_SDMA_CONFIGURATION_REGISTER 0x2c40 -#define ETHERNET2_SDMA_COMMAND_REGISTER 0x2c48 -#define ETHERNET2_INTERRUPT_CAUSE_REGISTER 0x2c50 -#define ETHERNET2_INTERRUPT_MASK_REGISTER 0x2c58 -#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER0 0x2c80 -#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER1 0x2c84 -#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER2 0x2c88 -#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER3 0x2c8c -#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER0 0x2ca0 -#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER1 0x2ca4 -#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER2 0x2ca8 -#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER3 0x2cac -#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER0 0x2ce0 -#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER1 0x2ce4 -#define ETHERNET2_MIB_COUNTER_BASE 0x2d00 - -/****************************************/ -/* SDMA Registers */ -/****************************************/ - -#define SDMA_GROUP_CONFIGURATION_REGISTER 0xb1f0 -#define CHANNEL0_CONFIGURATION_REGISTER 0x4000 -#define CHANNEL0_COMMAND_REGISTER 0x4008 -#define CHANNEL0_RX_CMD_STATUS 0x4800 -#define CHANNEL0_RX_PACKET_AND_BUFFER_SIZES 0x4804 -#define CHANNEL0_RX_BUFFER_POINTER 0x4808 -#define CHANNEL0_RX_NEXT_POINTER 0x480c -#define CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER 0x4810 -#define CHANNEL0_TX_CMD_STATUS 0x4C00 -#define CHANNEL0_TX_PACKET_SIZE 0x4C04 -#define CHANNEL0_TX_BUFFER_POINTER 0x4C08 -#define CHANNEL0_TX_NEXT_POINTER 0x4C0c -#define CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER 0x4c10 -#define CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER 0x4c14 -#define CHANNEL1_CONFIGURATION_REGISTER 0x6000 -#define CHANNEL1_COMMAND_REGISTER 0x6008 -#define CHANNEL1_RX_CMD_STATUS 0x6800 -#define CHANNEL1_RX_PACKET_AND_BUFFER_SIZES 0x6804 -#define CHANNEL1_RX_BUFFER_POINTER 0x6808 -#define CHANNEL1_RX_NEXT_POINTER 0x680c -#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x6810 -#define CHANNEL1_TX_CMD_STATUS 0x6C00 -#define CHANNEL1_TX_PACKET_SIZE 0x6C04 -#define CHANNEL1_TX_BUFFER_POINTER 0x6C08 -#define CHANNEL1_TX_NEXT_POINTER 0x6C0c -#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x6810 -#define CHANNEL1_CURRENT_TX_DESCRIPTOR_POINTER 0x6c10 -#define CHANNEL1_FIRST_TX_DESCRIPTOR_POINTER 0x6c14 - -/* SDMA Interrupt */ - -#define SDMA_CAUSE 0xb820 -#define SDMA_MASK 0xb8a0 - - -/****************************************/ -/* Baude Rate Generators Registers */ -/****************************************/ - -/* BRG 0 */ - -#define BRG0_CONFIGURATION_REGISTER 0xb200 -#define BRG0_BAUDE_TUNING_REGISTER 0xb204 - -/* BRG 1 */ - -#define BRG1_CONFIGURATION_REGISTER 0xb208 -#define BRG1_BAUDE_TUNING_REGISTER 0xb20c - -/* BRG 2 */ - -#define BRG2_CONFIGURATION_REGISTER 0xb210 -#define BRG2_BAUDE_TUNING_REGISTER 0xb214 - -/* BRG Interrupts */ - -#define BRG_CAUSE_REGISTER 0xb834 -#define BRG_MASK_REGISTER 0xb8b4 - -/* MISC */ - -#define MAIN_ROUTING_REGISTER 0xb400 -#define RECEIVE_CLOCK_ROUTING_REGISTER 0xb404 -#define TRANSMIT_CLOCK_ROUTING_REGISTER 0xb408 -#define COMM_UNIT_ARBITER_CONFIGURATION_REGISTER 0xb40c -#define WATCHDOG_CONFIGURATION_REGISTER 0xb410 -#define WATCHDOG_VALUE_REGISTER 0xb414 - - -/****************************************/ -/* Flex TDM Registers */ -/****************************************/ - -/* FTDM Port */ - -#define FLEXTDM_TRANSMIT_READ_POINTER 0xa800 -#define FLEXTDM_RECEIVE_READ_POINTER 0xa804 -#define FLEXTDM_CONFIGURATION_REGISTER 0xa808 -#define FLEXTDM_AUX_CHANNELA_TX_REGISTER 0xa80c -#define FLEXTDM_AUX_CHANNELA_RX_REGISTER 0xa810 -#define FLEXTDM_AUX_CHANNELB_TX_REGISTER 0xa814 -#define FLEXTDM_AUX_CHANNELB_RX_REGISTER 0xa818 - -/* FTDM Interrupts */ - -#define FTDM_CAUSE_REGISTER 0xb830 -#define FTDM_MASK_REGISTER 0xb8b0 - - -/****************************************/ -/* GPP Interface Registers */ -/****************************************/ - -#define GPP_IO_CONTROL 0xf100 -#define GPP_LEVEL_CONTROL 0xf110 -#define GPP_VALUE 0xf104 -#define GPP_INTERRUPT_CAUSE 0xf108 -#define GPP_INTERRUPT_MASK 0xf10c - -#define MPP_CONTROL0 0xf000 -#define MPP_CONTROL1 0xf004 -#define MPP_CONTROL2 0xf008 -#define MPP_CONTROL3 0xf00c -#define DEBUG_PORT_MULTIPLEX 0xf014 -#define SERIAL_PORT_MULTIPLEX 0xf010 - -/****************************************/ -/* I2C Registers */ -/****************************************/ - -#define I2C_SLAVE_ADDRESS 0xc000 -#define I2C_EXTENDED_SLAVE_ADDRESS 0xc040 -#define I2C_DATA 0xc004 -#define I2C_CONTROL 0xc008 -#define I2C_STATUS_BAUDE_RATE 0xc00C -#define I2C_SOFT_RESET 0xc01c - -/****************************************/ -/* MPSC Registers */ -/****************************************/ - -/* MPSC0 */ - -#define MPSC0_MAIN_CONFIGURATION_LOW 0x8000 -#define MPSC0_MAIN_CONFIGURATION_HIGH 0x8004 -#define MPSC0_PROTOCOL_CONFIGURATION 0x8008 -#define CHANNEL0_REGISTER1 0x800c -#define CHANNEL0_REGISTER2 0x8010 -#define CHANNEL0_REGISTER3 0x8014 -#define CHANNEL0_REGISTER4 0x8018 -#define CHANNEL0_REGISTER5 0x801c -#define CHANNEL0_REGISTER6 0x8020 -#define CHANNEL0_REGISTER7 0x8024 -#define CHANNEL0_REGISTER8 0x8028 -#define CHANNEL0_REGISTER9 0x802c -#define CHANNEL0_REGISTER10 0x8030 -#define CHANNEL0_REGISTER11 0x8034 - -/* MPSC1 */ - -#define MPSC1_MAIN_CONFIGURATION_LOW 0x9000 -#define MPSC1_MAIN_CONFIGURATION_HIGH 0x9004 -#define MPSC1_PROTOCOL_CONFIGURATION 0x9008 -#define CHANNEL1_REGISTER1 0x900c -#define CHANNEL1_REGISTER2 0x9010 -#define CHANNEL1_REGISTER3 0x9014 -#define CHANNEL1_REGISTER4 0x9018 -#define CHANNEL1_REGISTER5 0x901c -#define CHANNEL1_REGISTER6 0x9020 -#define CHANNEL1_REGISTER7 0x9024 -#define CHANNEL1_REGISTER8 0x9028 -#define CHANNEL1_REGISTER9 0x902c -#define CHANNEL1_REGISTER10 0x9030 -#define CHANNEL1_REGISTER11 0x9034 - -/* MPSCs Interupts */ - -#define MPSC0_CAUSE 0xb804 -#define MPSC0_MASK 0xb884 -#define MPSC1_CAUSE 0xb80c -#define MPSC1_MASK 0xb88c - -#endif /* __INCgt64240rh */ diff --git a/arch/mips/momentum/ocelot_g/gt64240_dep.h b/arch/mips/momentum/ocelot_g/gt64240_dep.h deleted file mode 100644 index f51bf0d6e1fb..000000000000 --- a/arch/mips/momentum/ocelot_g/gt64240_dep.h +++ /dev/null @@ -1,57 +0,0 @@ -/*********************************************************************** - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * - * arch/mips/gt64240/gt64240-dep.h - * Board-dependent definitions for GT-64120 chip. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - *********************************************************************** - */ - -#ifndef _ASM_GT64240_DEP_H -#define _ASM_GT64240_DEP_H - -#include <asm/addrspace.h> /* for KSEG1ADDR() */ -#include <asm/byteorder.h> /* for cpu_to_le32() */ - -/* - * PCI address allocation - */ -#if 0 -#define GT_PCI_MEM_BASE (0x22000000) -#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE -#define GT_PCI_IO_BASE (0x20000000) -#define GT_PCI_IO_SIZE GT_DEF_PCI0_IO_SIZE -#endif - -extern unsigned long gt64240_base; - -#define GT64240_BASE (gt64240_base) - -/* - * Because of an error/peculiarity in the Galileo chip, we need to swap the - * bytes when running bigendian. - */ - -#define GT_WRITE(ofs, data) \ - *(volatile u32 *)(GT64240_BASE+(ofs)) = cpu_to_le32(data) -#define GT_READ(ofs, data) \ - *(data) = le32_to_cpu(*(volatile u32 *)(GT64240_BASE+(ofs))) -#define GT_READ_DATA(ofs) \ - le32_to_cpu(*(volatile u32 *)(GT64240_BASE+(ofs))) - -#define GT_WRITE_16(ofs, data) \ - *(volatile u16 *)(GT64240_BASE+(ofs)) = cpu_to_le16(data) -#define GT_READ_16(ofs, data) \ - *(data) = le16_to_cpu(*(volatile u16 *)(GT64240_BASE+(ofs))) - -#define GT_WRITE_8(ofs, data) \ - *(volatile u8 *)(GT64240_BASE+(ofs)) = data -#define GT_READ_8(ofs, data) \ - *(data) = *(volatile u8 *)(GT64240_BASE+(ofs)) - -#endif /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */ diff --git a/arch/mips/momentum/ocelot_g/pci-irq.c b/arch/mips/momentum/ocelot_g/pci-irq.c deleted file mode 100644 index e300e151ff85..000000000000 --- a/arch/mips/momentum/ocelot_g/pci-irq.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright 2002 Momentum Computer Inc. - * Author: Matthew Dharm <mdharm@momenco.com> - * - * Based on work for the Linux port to the Ocelot board, which is - * Copyright 2001 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * - * arch/mips/momentum/ocelot_g/pci.c - * Board-specific PCI routines for gt64240 controller. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include <linux/types.h> -#include <linux/pci.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <asm/pci.h> - - -void __devinit gt64240_board_pcibios_fixup_bus(struct pci_bus *bus) -{ - struct pci_bus *current_bus = bus; - struct pci_dev *devices; - struct list_head *devices_link; - u16 cmd; - - /* loop over all known devices on this bus */ - list_for_each(devices_link, &(current_bus->devices)) { - - devices = pci_dev_b(devices_link); - if (devices == NULL) - continue; - - if ((current_bus->number == 0) && - PCI_SLOT(devices->devfn) == 1) { - /* Intel 82543 Gigabit MAC */ - devices->irq = 2; /* irq_nr is 2 for INT0 */ - } else if ((current_bus->number == 0) && - PCI_SLOT(devices->devfn) == 2) { - /* Intel 82543 Gigabit MAC */ - devices->irq = 3; /* irq_nr is 3 for INT1 */ - } else if ((current_bus->number == 1) && - PCI_SLOT(devices->devfn) == 3) { - /* Intel 21555 bridge */ - devices->irq = 5; /* irq_nr is 8 for INT6 */ - } else if ((current_bus->number == 1) && - PCI_SLOT(devices->devfn) == 4) { - /* PMC Slot */ - devices->irq = 9; /* irq_nr is 9 for INT7 */ - } else { - /* We don't have assign interrupts for other devices. */ - devices->irq = 0xff; - } - - /* Assign an interrupt number for the device */ - bus->ops->write(current_bus, devices, - PCI_INTERRUPT_LINE, 1, devices->irq); - - /* enable master for everything but the GT-64240 */ - if (((current_bus->number != 0) && (current_bus->number != 1)) - || (PCI_SLOT(devices->devfn) != 0)) { - bus->ops->read(current_bus, devices, - PCI_COMMAND, 2, &cmd); - cmd |= PCI_COMMAND_MASTER; - bus->ops->write(current_bus, devices, - PCI_COMMAND, 2, cmd); - } - } -} diff --git a/arch/mips/momentum/ocelot_g/prom.c b/arch/mips/momentum/ocelot_g/prom.c index 2b480b2ef03b..82bebaeb0087 100644 --- a/arch/mips/momentum/ocelot_g/prom.c +++ b/arch/mips/momentum/ocelot_g/prom.c @@ -20,8 +20,8 @@ #include <asm/addrspace.h> #include <asm/bootinfo.h> #include <asm/pmon.h> +#include <asm/gt64240.h> -#include "gt64240.h" #include "ocelot_pld.h" struct callvectors* debug_vectors; @@ -38,10 +38,8 @@ const char *get_system_type(void) return "Momentum Ocelot"; } -/* [jsun@junsun.net] PMON passes arguments in C main() style */ void __init prom_init(void) { - uint32_t tmp; int argc = fw_arg0; char **arg = (char **) fw_arg1; char **env = (char **) fw_arg2; @@ -78,10 +76,8 @@ void __init prom_init(void) bus_clock = simple_strtol(*env + strlen("busclock="), NULL, 10); } - *env++; + env++; } - - debug_vectors->printf("Booting Linux kernel...\n"); } unsigned long __init prom_free_prom_memory(void) diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c index 9a3010dae023..1d313eb56059 100644 --- a/arch/mips/momentum/ocelot_g/setup.c +++ b/arch/mips/momentum/ocelot_g/setup.c @@ -1,6 +1,4 @@ /* - * setup.c - * * BRIEF MODULE DESCRIPTION * Momentum Computer Ocelot-G (CP7000G) - board dependent boot routines * @@ -55,14 +53,14 @@ #include <asm/bootinfo.h> #include <asm/page.h> #include <asm/io.h> +#include <asm/gt64240.h> #include <asm/irq.h> #include <asm/pci.h> #include <asm/processor.h> #include <asm/ptrace.h> #include <asm/reboot.h> #include <linux/bootmem.h> -#include <linux/blkdev.h> -#include "gt64240.h" + #include "ocelot_pld.h" #ifdef CONFIG_GALILLEO_GT64240_ETH @@ -88,8 +86,6 @@ static unsigned long ENTRYLO(unsigned long paddr) _CACHE_UNCACHED)) >> 6; } -static void __init setup_l3cache(unsigned long size); - /* setup code for a handoff from a version 2 PMON 2000 PROM */ void PMON_v2_setup(void) { @@ -104,8 +100,10 @@ void PMON_v2_setup(void) GT64240 Internal Regs 0xf4000000 0xe0000000 UARTs (CS2) 0xfd000000 0xe0001000 */ - add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), 0xf4000000, PM_64K); - add_wired_entry(ENTRYLO(0xfd000000), ENTRYLO(0xfd001000), 0xfd000000, PM_4K); + add_wired_entry(ENTRYLO(0xf4000000), ENTRYLO(0xf4010000), + 0xf4000000, PM_64K); + add_wired_entry(ENTRYLO(0xfd000000), ENTRYLO(0xfd001000), + 0xfd000000, PM_4K); /* Also a temporary entry to let us talk to the Ocelot PLD and NVRAM in the CS[012] region. We can't use ioremap() yet. The NVRAM @@ -114,15 +112,57 @@ void PMON_v2_setup(void) Ocelot PLD (CS0) 0xfc000000 0xe0020000 NVRAM (CS1) 0xfc800000 0xe0030000 */ - add_temporary_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfc010000), 0xfc000000, PM_64K); - add_temporary_entry(ENTRYLO(0xfc800000), ENTRYLO(0xfc810000), 0xfc800000, PM_64K); + add_temporary_entry(ENTRYLO(0xfc000000), ENTRYLO(0xfc010000), + 0xfc000000, PM_64K); + add_temporary_entry(ENTRYLO(0xfc800000), ENTRYLO(0xfc810000), + 0xfc800000, PM_64K); gt64240_base = 0xf4000000; } -static void __init momenco_ocelot_g_setup(void) +extern int rm7k_tcache_enabled; + +/* + * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache() + */ +#define Page_Invalidate_T 0x16 +static void __init setup_l3cache(unsigned long size) { - void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache); + int register i; + + printk("Enabling L3 cache..."); + + /* Enable the L3 cache in the GT64120A's CPU Configuration register */ + GT_WRITE(0, GT_READ(0) | (1<<14)); + + /* Enable the L3 cache in the CPU */ + set_c0_config(1<<12 /* CONF_TE */); + + /* Clear the cache */ + write_c0_taglo(0); + write_c0_taghi(0); + + for (i=0; i < size; i+= 4096) { + __asm__ __volatile__ ( + ".set noreorder\n\t" + ".set mips3\n\t" + "cache %1, (%0)\n\t" + ".set mips0\n\t" + ".set reorder" + : + : "r" (KSEG0ADDR(i)), + "i" (Page_Invalidate_T)); + } + + /* Let the RM7000 MM code know that the tertiary cache is enabled */ + rm7k_tcache_enabled = 1; + + printk("Done\n"); +} + +static int __init momenco_ocelot_g_setup(void) +{ + void (*l3func)(unsigned long) = (void *) KSEG1ADDR(setup_l3cache); unsigned int tmpword; board_time_init = gt64240_time_init; @@ -200,51 +240,11 @@ static void __init momenco_ocelot_g_setup(void) /* FIXME: Fix up the DiskOnChip mapping */ GT_WRITE(0x468, 0xfef73); -} -early_initcall(momenco_ocelot_g_setup); - -extern int rm7k_tcache_enabled; -/* - * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache() - */ -#define Page_Invalidate_T 0x16 -static void __init setup_l3cache(unsigned long size) -{ - int register i; - unsigned long tmp; - - printk("Enabling L3 cache..."); - - /* Enable the L3 cache in the GT64120A's CPU Configuration register */ - GT_READ(0, &tmp); - GT_WRITE(0, tmp | (1<<14)); - - /* Enable the L3 cache in the CPU */ - set_c0_config(1<<12 /* CONF_TE */); - - /* Clear the cache */ - write_c0_taglo(0); - write_c0_taghi(0); - - for (i=0; i < size; i+= 4096) { - __asm__ __volatile__ ( - ".set noreorder\n\t" - ".set mips3\n\t" - "cache %1, (%0)\n\t" - ".set mips0\n\t" - ".set reorder" - : - : "r" (KSEG0ADDR(i)), - "i" (Page_Invalidate_T)); - } - - /* Let the RM7000 MM code know that the tertiary cache is enabled */ - rm7k_tcache_enabled = 1; - - printk("Done\n"); + return 0; } +early_initcall(momenco_ocelot_g_setup); /* This needs to be one of the first initcalls, because no I/O port access can work before this */ @@ -252,12 +252,12 @@ static void __init setup_l3cache(unsigned long size) static int io_base_ioremap(void) { /* we're mapping PCI accesses from 0xc0000000 to 0xf0000000 */ - void *io_remap_range = ioremap(0xc0000000, 0x30000000); + unsigned long io_remap_range; - if (!io_remap_range) { + io_remap_range = (unsigned long) ioremap(0xc0000000, 0x30000000); + if (!io_remap_range) panic("Could not ioremap I/O port range"); - } - printk("io_remap_range set at 0x%08x\n", (uint32_t)io_remap_range); + set_io_port_base(io_remap_range - 0xc0000000); return 0; diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index a380308eff83..9cdb8b8ba00a 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_MIPS_MV64340) += ops-mv64340.o obj-$(CONFIG_MIPS_MSC) += ops-msc.o obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o obj-$(CONFIG_MIPS_TX3927) += ops-jmr3927.o +obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o # # These are still pretty much in the old state, watch, go blind. @@ -34,20 +35,20 @@ obj-$(CONFIG_MIPS_IVR) += fixup-ivr.o obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o -obj-$(CONFIG_MIPS_MV64340) += fixup-mv64340.o +obj-$(CONFIG_MOMENCO_JAGUAR_ATX)+= fixup-jaguar.o obj-$(CONFIG_MOMENCO_OCELOT) += fixup-ocelot.o pci-ocelot.o -obj-$(CONFIG_MOMENCO_OCELOT_C) += pci-ocelot-c.o -obj-$(CONFIG_MOMENCO_OCELOT_G) += pci-ocelot-g.o +obj-$(CONFIG_MOMENCO_OCELOT_C) += fixup-ocelot-c.o pci-ocelot-c.o +obj-$(CONFIG_MOMENCO_OCELOT_G) += fixup-ocelot-g.o ops-gt64240.o pci-ocelot-g.o obj-$(CONFIG_NEC_EAGLE) += fixup-eagle.o ops-vrc4173.o -obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o +obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \ + pci-yosemite.o obj-$(CONFIG_SGI_IP27) += pci-ip27.o obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o obj-$(CONFIG_SIBYTE_SB1250) += pci-sb1250.o obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o +obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o -obj-$(CONFIG_TANBAC_TB0229) += fixup-tb0229.o obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o pci-jmr3927.o obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o -obj-$(CONFIG_VICTOR_MPC30X) += fixup-capcella.o -obj-$(CONFIG_MACH_VR41XX) += pci-vr41xx.o -obj-$(CONFIG_ZAO_CAPCELLA) += fixup-victor-mpc30x.o +obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o +obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c index 167ed4367cdb..9a0d68ed69d5 100644 --- a/arch/mips/pci/fixup-capcella.c +++ b/arch/mips/pci/fixup-capcella.c @@ -1,17 +1,21 @@ /* - * FILE NAME - * arch/mips/vr41xx/zao-capcella/pci_fixup.c + * fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups. * - * BRIEF MODULE DESCRIPTION - * The ZAO Networks Capcella specific PCI fixups. + * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Copyright 2002 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/init.h> #include <linux/pci.h> @@ -38,3 +42,7 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { return irq_tab_capcella[slot][pin]; } + +struct pci_fixup pcibios_fixups[] __initdata = { + { .pass = 0, }, +}; diff --git a/arch/mips/pci/fixup-mv64340.c b/arch/mips/pci/fixup-jaguar.c index fa78b9b1f435..fa78b9b1f435 100644 --- a/arch/mips/pci/fixup-mv64340.c +++ b/arch/mips/pci/fixup-jaguar.c diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c new file mode 100644 index 000000000000..1320c42af570 --- /dev/null +++ b/arch/mips/pci/fixup-mpc30x.c @@ -0,0 +1,48 @@ +/* + * fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups. + * + * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> +#include <linux/pci.h> + +#include <asm/vr41xx/mpc30x.h> +#include <asm/vr41xx/vrc4173.h> + +static const int internal_func_irqs[] __initdata = { + VRC4173_CASCADE_IRQ, + VRC4173_AC97_IRQ, + VRC4173_USB_IRQ, +}; + +static char irq_tab_mpc30x[] __initdata = { + [12] = VRC4173_PCMCIA1_IRQ, + [13] = VRC4173_PCMCIA2_IRQ, + [29] = MQ200_IRQ, +}; + +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + if (slot == 30) + return internal_func_irqs[PCI_FUNC(dev->devfn)]; + + return irq_tab_mpc30x[slot]; +} + +struct pci_fixup pcibios_fixups[] __initdata = { + { .pass = 0, }, +}; diff --git a/arch/mips/pci/fixup-ocelot-c.c b/arch/mips/pci/fixup-ocelot-c.c new file mode 100644 index 000000000000..0cc86ecebff8 --- /dev/null +++ b/arch/mips/pci/fixup-ocelot-c.c @@ -0,0 +1,39 @@ +/* + * Copyright 2002 Momentum Computer Inc. + * Author: Matthew Dharm <mdharm@momenco.com> + * + * Based on work for the Linux port to the Ocelot board, which is + * Copyright 2001 MontaVista Software Inc. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net + * + * arch/mips/momentum/ocelot_g/pci.c + * Board-specific PCI routines for mv64340 controller. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include <linux/types.h> +#include <linux/pci.h> +#include <linux/kernel.h> +#include <linux/init.h> + +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + int bus = dev->bus->number; + + if (bus == 0 && slot == 1) + return 2; /* PCI-X A */ + if (bus == 1 && slot == 1) + return 12; /* PCI-X B */ + if (bus == 1 && slot == 2) + return 4; /* PCI B */ + +return 0; + panic("Whooops in pcibios_map_irq"); +} + +struct pci_fixup pcibios_fixups[] = { + {0} +}; diff --git a/arch/mips/pci/fixup-ocelot-g.c b/arch/mips/pci/fixup-ocelot-g.c new file mode 100644 index 000000000000..9a2cc8505db8 --- /dev/null +++ b/arch/mips/pci/fixup-ocelot-g.c @@ -0,0 +1,35 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Copyright (C) 2004 Ralf Baechle (ralf@linux-mips.org) + */ +#include <linux/types.h> +#include <linux/pci.h> +#include <linux/kernel.h> +#include <linux/init.h> + +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + int bus = dev->bus->number; + + if (bus == 0 && slot == 1) /* Intel 82543 Gigabit MAC */ + return 2; /* irq_nr is 2 for INT0 */ + + if (bus == 0 && slot == 2) /* Intel 82543 Gigabit MAC */ + return 3; /* irq_nr is 3 for INT1 */ + + if (bus == 1 && slot == 3) /* Intel 21555 bridge */ + return 5; /* irq_nr is 8 for INT6 */ + + if (bus == 1 && slot == 4) /* PMC Slot */ + return 9; /* irq_nr is 9 for INT7 */ + + return -1; +} + +struct pci_fixup pcibios_fixups[] = { + {0} +}; diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c new file mode 100644 index 000000000000..ca4d99fbe123 --- /dev/null +++ b/arch/mips/pci/fixup-tb0219.c @@ -0,0 +1,64 @@ +/* + * fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups. + * + * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> + * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> +#include <linux/pci.h> + +#include <asm/vr41xx/tb0219.h> + +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + int irq = -1; + + switch (slot) { + case 12: + vr41xx_set_irq_trigger(TB0219_PCI_SLOT1_PIN, + TRIGGER_LEVEL, + SIGNAL_THROUGH); + vr41xx_set_irq_level(TB0219_PCI_SLOT1_PIN, + LEVEL_LOW); + irq = TB0219_PCI_SLOT1_IRQ; + break; + case 13: + vr41xx_set_irq_trigger(TB0219_PCI_SLOT2_PIN, + TRIGGER_LEVEL, + SIGNAL_THROUGH); + vr41xx_set_irq_level(TB0219_PCI_SLOT2_PIN, + LEVEL_LOW); + irq = TB0219_PCI_SLOT2_IRQ; + break; + case 14: + vr41xx_set_irq_trigger(TB0219_PCI_SLOT3_PIN, + TRIGGER_LEVEL, + SIGNAL_THROUGH); + vr41xx_set_irq_level(TB0219_PCI_SLOT3_PIN, + LEVEL_LOW); + irq = TB0219_PCI_SLOT3_IRQ; + break; + default: + break; + } + + return irq; +} + +struct pci_fixup pcibios_fixups[] __initdata = { + { .pass = 0, }, +}; diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c index 17c300c8ae34..50e639e04a4a 100644 --- a/arch/mips/pci/fixup-tb0226.c +++ b/arch/mips/pci/fixup-tb0226.c @@ -1,78 +1,83 @@ /* - * FILE NAME - * arch/mips/vr41xx/tanbac-tb0226/pci_fixup.c + * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. * - * BRIEF MODULE DESCRIPTION - * The TANBAC TB0226 specific PCI fixups. + * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Copyright 2002,2003 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/init.h> #include <linux/pci.h> #include <asm/vr41xx/tb0226.h> -void __init pcibios_fixup_irqs(void) +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { - struct pci_dev *dev = NULL; - u8 slot, pin; - - while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { - slot = PCI_SLOT(dev->devfn); - dev->irq = 0; + int irq = -1; - switch (slot) { - case 12: - vr41xx_set_irq_trigger(GD82559_1_PIN, + switch (slot) { + case 12: + vr41xx_set_irq_trigger(GD82559_1_PIN, + TRIGGER_LEVEL, + SIGNAL_THROUGH); + vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW); + irq = GD82559_1_IRQ; + break; + case 13: + vr41xx_set_irq_trigger(GD82559_2_PIN, + TRIGGER_LEVEL, + SIGNAL_THROUGH); + vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW); + irq = GD82559_2_IRQ; + break; + case 14: + switch (pin) { + case 1: + vr41xx_set_irq_trigger(UPD720100_INTA_PIN, + TRIGGER_LEVEL, + SIGNAL_THROUGH); + vr41xx_set_irq_level(UPD720100_INTA_PIN, + LEVEL_LOW); + irq = UPD720100_INTA_IRQ; + break; + case 2: + vr41xx_set_irq_trigger(UPD720100_INTB_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH); - vr41xx_set_irq_level(GD82559_1_PIN, LEVEL_LOW); - dev->irq = GD82559_1_IRQ; + vr41xx_set_irq_level(UPD720100_INTB_PIN, + LEVEL_LOW); + irq = UPD720100_INTB_IRQ; break; - case 13: - vr41xx_set_irq_trigger(GD82559_2_PIN, + case 3: + vr41xx_set_irq_trigger(UPD720100_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH); - vr41xx_set_irq_level(GD82559_2_PIN, LEVEL_LOW); - dev->irq = GD82559_2_IRQ; + vr41xx_set_irq_level(UPD720100_INTC_PIN, + LEVEL_LOW); + irq = UPD720100_INTC_IRQ; break; - case 14: - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); - switch (pin) { - case 1: - vr41xx_set_irq_trigger(UPD720100_INTA_PIN, - TRIGGER_LEVEL, - SIGNAL_THROUGH); - vr41xx_set_irq_level(UPD720100_INTA_PIN, - LEVEL_LOW); - dev->irq = UPD720100_INTA_IRQ; - break; - case 2: - vr41xx_set_irq_trigger(UPD720100_INTB_PIN, - TRIGGER_LEVEL, - SIGNAL_THROUGH); - vr41xx_set_irq_level(UPD720100_INTB_PIN, - LEVEL_LOW); - dev->irq = UPD720100_INTB_IRQ; - break; - case 3: - vr41xx_set_irq_trigger(UPD720100_INTC_PIN, - TRIGGER_LEVEL, - SIGNAL_THROUGH); - vr41xx_set_irq_level(UPD720100_INTC_PIN, - LEVEL_LOW); - dev->irq = UPD720100_INTC_IRQ; - break; - } + default: break; } - - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); + break; + default: + break; } + + return irq; } + +struct pci_fixup pcibios_fixups[] __initdata = { + { .pass = 0, }, +}; diff --git a/arch/mips/pci/fixup-tb0229.c b/arch/mips/pci/fixup-tb0229.c deleted file mode 100644 index 8109c05c5832..000000000000 --- a/arch/mips/pci/fixup-tb0229.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * FILE NAME - * arch/mips/vr41xx/tanbac-tb0229/pci_fixup.c - * - * BRIEF MODULE DESCRIPTION - * The TANBAC TB0229(VR4131DIMM) specific PCI fixups. - * - * Copyright 2003 Megasolution Inc. - * matsu@megasolution.jp - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include <linux/config.h> -#include <linux/init.h> -#include <linux/pci.h> - -#include <asm/vr41xx/tb0229.h> - -void __init pcibios_fixup_irqs(void) -{ -#ifdef CONFIG_TANBAC_TB0219 - struct pci_dev *dev = NULL; - u8 slot; - - while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { - slot = PCI_SLOT(dev->devfn); - dev->irq = 0; - - switch (slot) { - case 12: - vr41xx_set_irq_trigger(TB0219_PCI_SLOT1_PIN, - TRIGGER_LEVEL, - SIGNAL_THROUGH); - vr41xx_set_irq_level(TB0219_PCI_SLOT1_PIN, - LEVEL_LOW); - dev->irq = TB0219_PCI_SLOT1_IRQ; - break; - case 13: - vr41xx_set_irq_trigger(TB0219_PCI_SLOT2_PIN, - TRIGGER_LEVEL, - SIGNAL_THROUGH); - vr41xx_set_irq_level(TB0219_PCI_SLOT2_PIN, - LEVEL_LOW); - dev->irq = TB0219_PCI_SLOT2_IRQ; - break; - case 14: - vr41xx_set_irq_trigger(TB0219_PCI_SLOT3_PIN, - TRIGGER_LEVEL, - SIGNAL_THROUGH); - vr41xx_set_irq_level(TB0219_PCI_SLOT3_PIN, - LEVEL_LOW); - dev->irq = TB0219_PCI_SLOT3_IRQ; - break; - default: - break; - } - - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); - } -#endif -} diff --git a/arch/mips/pci/fixup-victor-mpc30x.c b/arch/mips/pci/fixup-victor-mpc30x.c deleted file mode 100644 index 3ec5951feab2..000000000000 --- a/arch/mips/pci/fixup-victor-mpc30x.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * FILE NAME - * arch/mips/vr41xx/victor-mpc30x/pci_fixup.c - * - * BRIEF MODULE DESCRIPTION - * The Victor MP-C303/304 specific PCI fixups. - * - * Copyright 2002 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include <linux/init.h> -#include <linux/pci.h> - -#include <asm/vr41xx/vrc4173.h> -#include <asm/vr41xx/mpc30x.h> - -/* - * Shortcuts - */ -#define PCMCIA1 VRC4173_PCMCIA1_IRQ -#define PCMCIA2 VRC4173_PCMCIA2_IRQ -#define MQ MQ200_IRQ - -static const int internal_func_irqs[8] __initdata = { - VRC4173_CASCADE_IRQ, - VRC4173_AC97_IRQ, - VRC4173_USB_IRQ, - -}; - -static char irq_tab_mpc30x[][5] __initdata = { - [12] = { PCMCIA1, PCMCIA1, 0, 0 }, - [13] = { PCMCIA2, PCMCIA2, 0, 0 }, - [29] = { MQ, MQ, 0, 0 }, /* mediaQ MQ-200 */ -}; - -int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) -{ - if (slot == 30) - return internal_func_irqs[PCI_FUNC(dev->devfn)]; - - return irq_tab_mpc30x[slot][pin]; -} diff --git a/arch/mips/pci/fixup-yosemite.c b/arch/mips/pci/fixup-yosemite.c index 72b809685bdf..92e40b091643 100644 --- a/arch/mips/pci/fixup-yosemite.c +++ b/arch/mips/pci/fixup-yosemite.c @@ -26,21 +26,12 @@ #include <linux/init.h> #include <linux/pci.h> -static char irq_tab_yosemite[8][5] __initdata = { - /* INTA INTB INTC INTD */ - { -1, -1, -1, -1, -1 }, - { -1, 3, 3, 3, 3 }, - { -1, 4, 4, 4, 4 }, - { -1, -1, -1, -1, -1 }, - { -1, -1, -1, -1, -1 }, - { -1, -1, -1, -1, -1 }, - { -1, -1, -1, -1, -1 }, - { -1, -1, -1, -1, -1 }, -}; - int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { - return irq_tab_yosemite[slot][pin]; + if (pin == 0) + return -1; + + return 3; /* Everything goes to one irq bit */ } struct pci_fixup pcibios_fixups[] = { diff --git a/arch/mips/pci/ops-gt64240.c b/arch/mips/pci/ops-gt64240.c new file mode 100644 index 000000000000..6929faa65490 --- /dev/null +++ b/arch/mips/pci/ops-gt64240.c @@ -0,0 +1,149 @@ +/* + * Copyright 2002 Momentum Computer + * Author: Matthew Dharm <mdharm@momenco.com> + * Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/types.h> +#include <linux/pci.h> +#include <asm/io.h> +#include <asm/gt64240.h> + + +#define MASTER_ABORT_BIT 0x100 + +/* + * galileo_pcibios_(read/write)_config_(dword/word/byte) - + * + * reads/write a dword/word/byte register from the configuration space + * of a device. + * + * Note that bus 0 and bus 1 are local, and we assume all other busses are + * bridged from bus 1. This is a safe assumption, since any other + * configuration will require major modifications to the CP7000G + * + * Inputs : + * bus - bus number + * dev - device number + * offset - register offset in the configuration space + * val - value to be written / read + * + * Outputs : + * PCIBIOS_SUCCESSFUL when operation was succesfull + * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous + * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned + */ + + +static int gt_read_config(struct pci_bus *bus, unsigned int devfn, int offset, + int size, u32 *val, u32 address_reg, u32 data_reg) +{ + uint32_t address; + int dev, busno; + + busno = bus->number; + dev = PCI_SLOT(devfn); + + /* verify the range */ + if (dev == 31) + return PCIBIOS_DEVICE_NOT_FOUND; + + address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000; + + /* start the configuration cycle */ + GT_WRITE(address_reg, address); + + switch (size) { + case 1: + GT_READ_8(data_reg + (offset & 0x3), val); + break; + case 2: + GT_READ_16(data_reg + (offset & 0x3), val); + break; + case 4: + *val = GT_READ(data_reg); + break; + } + + return PCIBIOS_SUCCESSFUL; +} + +static int gt_write_config(struct pci_bus *bus, unsigned int devfn, int offset, + int size, u32 val, u32 address_reg, u32 data_reg) +{ + unsigned int address; + int dev, busno; + + busno = bus->number; + dev = PCI_SLOT(devfn); + + /* verify the range */ + if (dev == 31) + return PCIBIOS_DEVICE_NOT_FOUND; + + address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000; + + /* start the configuration cycle */ + GT_WRITE(address_reg, address); + + switch (size) { + case 1: + GT_WRITE_8(data_reg + (offset & 0x3), val); + break; + case 2: + GT_WRITE_16(data_reg + (offset & 0x3), val); + break; + case 4: + GT_WRITE(data_reg, val); + break; + } + + return PCIBIOS_SUCCESSFUL; +} + +#define BUILD_PCI_OPS(host) \ + \ +static int gt_bus ## host ## _read_config(struct pci_bus *bus, \ + unsigned int devfn, int reg, int size, u32 * val) \ +{ \ + return gt_read_config(bus, devfn, reg, size, val, \ + PCI_ ## host ## CONFIGURATION_ADDRESS, \ + PCI_ ## host ## CONFIGURATION_DATA_VIRTUAL_REGISTER); \ +} \ + \ +static int gt_bus ## host ## _write_config(struct pci_bus *bus, \ + unsigned int devfn, int reg, int size, u32 val) \ +{ \ + return gt_write_config(bus, devfn, reg, size, val, \ + PCI_ ## host ## CONFIGURATION_ADDRESS, \ + PCI_ ## host ## CONFIGURATION_DATA_VIRTUAL_REGISTER); \ +} \ + \ +struct pci_ops gt_bus ## host ## _pci_ops = { \ + .read = gt_bus ## host ## _read_config, \ + .write = gt_bus ## host ## _write_config \ +}; + +BUILD_PCI_OPS(0) +BUILD_PCI_OPS(1) diff --git a/arch/mips/pci/ops-msc.c b/arch/mips/pci/ops-msc.c index 51b16d48d031..11184fa64443 100644 --- a/arch/mips/pci/ops-msc.c +++ b/arch/mips/pci/ops-msc.c @@ -48,8 +48,12 @@ static int msc_pcibios_config_access(unsigned char access_type, unsigned char type; u32 intr; - if ((busnum == 0) && (PCI_SLOT(devfn) == 0)) +#ifdef CONFIG_MIPS_BOARDS_GEN + if ((busnum == 0) && (PCI_SLOT(devfn) == 17)) { + /* MIPS Core boards have SOCit connected as device 17 */ return -1; + } +#endif /* Clear status register bits. */ MSC_WRITE(MSC01_PCI_INTSTAT, diff --git a/arch/mips/pci/ops-titan-ht.c b/arch/mips/pci/ops-titan-ht.c new file mode 100644 index 000000000000..46c636c27e06 --- /dev/null +++ b/arch/mips/pci/ops-titan-ht.c @@ -0,0 +1,125 @@ +/* + * Copyright 2003 PMC-Sierra + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <linux/types.h> +#include <linux/pci.h> +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/delay.h> +#include <asm/io.h> + +#include <asm/titan_dep.h> + +static int titan_ht_config_read_dword(struct pci_bus *bus, unsigned int devfn, + int offset, u32 * val) +{ + volatile uint32_t address; + int busno; + + busno = bus->number; + + address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000; + if (busno != 0) + address |= 1; + + /* + * RM9000 HT Errata: Issue back to back HT config + * transcations. Issue a BIU sync before and + * after the HT cycle + */ + + *(volatile int32_t *) 0xfb0000f0 |= 0x2; + + udelay(30); + + *(volatile int32_t *) 0xfb0006f8 = address; + *(val) = *(volatile int32_t *) 0xfb0006fc; + + udelay(30); + + * (volatile int32_t *) 0xfb0000f0 |= 0x2; + + return PCIBIOS_SUCCESSFUL; +} + +static int titan_ht_config_read(struct pci_bus *bus, unsigned int devfn, + int offset, int size, u32 * val) +{ + uint32_t dword; + + titan_ht_config_read_dword(bus, devfn, offset, &dword); + + dword >>= ((offset & 3) << 3); + dword &= (0xffffffffU >> ((4 - size) << 8)); + + return PCIBIOS_SUCCESSFUL; +} + +static inline int titan_ht_config_write_dword(struct pci_bus *bus, + unsigned int devfn, int offset, u32 val) +{ + volatile uint32_t address; + int busno; + + busno = bus->number; + + address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000; + if (busno != 0) + address |= 1; + + *(volatile int32_t *) 0xfb0000f0 |= 0x2; + + udelay(30); + + *(volatile int32_t *) 0xfb0006f8 = address; + *(volatile int32_t *) 0xfb0006fc = val; + + udelay(30); + + *(volatile int32_t *) 0xfb0000f0 |= 0x2; + + return PCIBIOS_SUCCESSFUL; +} + +static int titan_ht_config_write(struct pci_bus *bus, unsigned int devfn, + int offset, int size, u32 val) +{ + uint32_t val1, val2, mask; + + titan_ht_config_read_dword(bus, devfn, offset, &val2); + + val1 = val << ((offset & 3) << 3); + mask = ~(0xffffffffU >> ((4 - size) << 8)); + val2 &= ~(mask << ((offset & 3) << 8)); + + titan_ht_config_write_dword(bus, devfn, offset, val1 | val2); + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops titan_ht_pci_ops = { + .read = titan_ht_config_read, + .write = titan_ht_config_write, +}; diff --git a/arch/mips/pci/ops-titan.c b/arch/mips/pci/ops-titan.c index 12e79346fa58..1ac7880dd2a0 100644 --- a/arch/mips/pci/ops-titan.c +++ b/arch/mips/pci/ops-titan.c @@ -39,30 +39,30 @@ static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 * val) { - int dev, bus, func; + int dev, busno, func; uint32_t address_reg, data_reg; uint32_t address; - bus = device->bus->number; - dev = PCI_SLOT(device->devfn); - func = PCI_FUNC(device->devfn); + busno = bus->number; + dev = PCI_SLOT(devfn); + func = PCI_FUNC(devfn); address_reg = TITAN_PCI_0_CONFIG_ADDRESS; data_reg = TITAN_PCI_0_CONFIG_DATA; - address = (bus << 16) | (dev << 11) | (func << 8) | - (offset & 0xfc) | 0x80000000; + address = (busno << 16) | (dev << 11) | (func << 8) | + (reg & 0xfc) | 0x80000000; /* start the configuration cycle */ TITAN_WRITE(address_reg, address); switch (size) { case 1: - TITAN_READ_8(data_reg + (offset & 0x3), val); + TITAN_READ_8(data_reg + (reg & 0x3), val); break; case 2: - TITAN_READ_16(data_reg + (offset & 0x2), val); + TITAN_READ_16(data_reg + (reg & 0x2), val); break; case 4: @@ -80,17 +80,17 @@ static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) { uint32_t address_reg, data_reg, address; - int dev, bus, func; + int dev, busno, func; - bus = device->bus->number; - dev = PCI_SLOT(device->devfn); - func = PCI_FUNC(device->devfn); + busno = bus->number; + dev = PCI_SLOT(devfn); + func = PCI_FUNC(devfn); address_reg = TITAN_PCI_0_CONFIG_ADDRESS; data_reg = TITAN_PCI_0_CONFIG_DATA; - address = (bus << 16) | (dev << 11) | (func << 8) | - (offset & 0xfc) | 0x80000000; + address = (busno << 16) | (dev << 11) | (func << 8) | + (reg & 0xfc) | 0x80000000; /* start the configuration cycle */ TITAN_WRITE(address_reg, address); @@ -98,11 +98,11 @@ static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg, /* write the data */ switch (size) { case 1: - TITAN_WRITE_8(data_reg + (offset & 0x3), val); + TITAN_WRITE_8(data_reg + (reg & 0x3), val); break; case 2: - TITAN_WRITE_16(data_reg + (offset & 0x2), val); + TITAN_WRITE_16(data_reg + (reg & 0x2), val); break; case 4: diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c new file mode 100644 index 000000000000..44654605e461 --- /dev/null +++ b/arch/mips/pci/ops-vr41xx.c @@ -0,0 +1,126 @@ +/* + * ops-vr41xx.c, PCI configuration routines for the PCIU of NEC VR4100 series. + * + * Copyright (C) 2001-2003 MontaVista Software Inc. + * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> + * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +/* + * Changes: + * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> + * - New creation, NEC VR4122 and VR4131 are supported. + */ +#include <linux/pci.h> +#include <linux/types.h> + +#include <asm/io.h> + +#define PCICONFDREG KSEG1ADDR(0x0f000c14) +#define PCICONFAREG KSEG1ADDR(0x0f000c18) + +static inline int set_pci_configuration_address(unsigned char number, + unsigned int devfn, int where) +{ + if (number == 0) { + /* + * Type 0 configuration + */ + if (PCI_SLOT(devfn) < 11 || where > 0xff) + return -EINVAL; + + writel((1U << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) | + (where & 0xfc), PCICONFAREG); + } else { + /* + * Type 1 configuration + */ + if (where > 0xff) + return -EINVAL; + + writel(((uint32_t)number << 16) | ((devfn & 0xff) << 8) | + (where & 0xfc) | 1U, PCICONFAREG); + } + + return 0; +} + +static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, + int size, uint32_t *val) +{ + uint32_t data; + + *val = 0xffffffffU; + if (set_pci_configuration_address(bus->number, devfn, where) < 0) + return PCIBIOS_DEVICE_NOT_FOUND; + + data = readl(PCICONFDREG); + + switch (size) { + case 1: + *val = (data >> ((where & 3) << 3)) & 0xffU; + break; + case 2: + *val = (data >> ((where & 2) << 3)) & 0xffffU; + break; + case 4: + *val = data; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + return PCIBIOS_SUCCESSFUL; +} + +static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, + int size, uint32_t val) +{ + uint32_t data; + int shift; + + if (set_pci_configuration_address(bus->number, devfn, where) < 0) + return PCIBIOS_DEVICE_NOT_FOUND; + + data = readl(PCICONFDREG); + + switch (size) { + case 1: + shift = (where & 3) << 3; + data &= ~(0xffU << shift); + data |= ((val & 0xffU) << shift); + break; + case 2: + shift = (where & 2) << 3; + data &= ~(0xffffU << shift); + data |= ((val & 0xffffU) << shift); + break; + case 4: + data = val; + break; + default: + return PCIBIOS_FUNC_NOT_SUPPORTED; + } + + writel(data, PCICONFDREG); + + return PCIBIOS_SUCCESSFUL; +} + +struct pci_ops vr41xx_pci_ops = { + .read = pci_config_read, + .write = pci_config_write, +}; diff --git a/arch/mips/pci/pci-ocelot-c.c b/arch/mips/pci/pci-ocelot-c.c index 29b52757a337..dec6d3754fde 100644 --- a/arch/mips/pci/pci-ocelot-c.c +++ b/arch/mips/pci/pci-ocelot-c.c @@ -1,61 +1,140 @@ /* - * Copyright 2002 Momentum Computer - * Author: Matthew Dharm <mdharm@momenco.com> + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * Copyright (C) 2004 by Ralf Baechle */ + #include <linux/types.h> #include <linux/pci.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <asm/pci.h> -#include <asm/io.h> #include <asm/mv64340.h> +#include <asm/pci_channel.h> #include <linux/init.h> /* - * These functions and structures provide the BIOS scan and mapping of the PCI - * devices. + * We assume the address ranges have already been setup appropriately by + * the firmware. PMON in case of the Ocelot C does that. */ +static struct resource mv_pci_io_mem0_resource = { + .name = "MV64340 PCI0 IO MEM", + .flags = IORESOURCE_IO +}; + +static struct resource mv_pci_mem0_resource = { + .name = "MV64340 PCI0 MEM", + .flags = IORESOURCE_MEM +}; + +extern struct pci_ops mv64340_bus0_pci_ops; + +static struct pci_controller mv_bus0_controller = { + .pci_ops = &mv64340_bus0_pci_ops, + .mem_resource = &mv_pci_mem0_resource, + .io_resource = &mv_pci_io_mem0_resource, +}; + +static uint32_t mv_io_base, mv_io_size; + +static void mv64340_pci0_init(void) +{ + uint32_t mem0_base, mem0_size; + uint32_t io_base, io_size; + + io_base = MV_READ(MV64340_PCI_0_IO_BASE_ADDR) << 16; + io_size = (MV_READ(MV64340_PCI_0_IO_SIZE) + 1) << 16; + mem0_base = MV_READ(MV64340_PCI_0_MEMORY0_BASE_ADDR) << 16; + mem0_size = (MV_READ(MV64340_PCI_0_MEMORY0_SIZE) + 1) << 16; + + mv_pci_io_mem0_resource.start = 0; + mv_pci_io_mem0_resource.end = io_size - 1; + mv_pci_mem0_resource.start = mem0_base; + mv_pci_mem0_resource.end = mem0_base + mem0_size - 1; + mv_bus0_controller.mem_offset = mem0_base; + mv_bus0_controller.io_offset = 0; + + ioport_resource.end = io_size - 1; + + register_pci_controller(&mv_bus0_controller); + + mv_io_base = io_base; + mv_io_size = io_size; +} + +static struct resource mv_pci_io_mem1_resource = { + .name = "MV64340 PCI1 IO MEM", + .flags = IORESOURCE_IO +}; + +static struct resource mv_pci_mem1_resource = { + .name = "MV64340 PCI1 MEM", + .flags = IORESOURCE_MEM +}; -void mv64340_board_pcibios_fixup_bus(struct pci_bus *c); +extern struct pci_ops mv64340_bus1_pci_ops; -struct pci_fixup pcibios_fixups[] = { - {0} +static struct pci_controller mv_bus1_controller = { + .pci_ops = &mv64340_bus1_pci_ops, + .mem_resource = &mv_pci_mem1_resource, + .io_resource = &mv_pci_io_mem1_resource, }; -void __init pcibios_fixup_bus(struct pci_bus *c) +static __init void mv64340_pci1_init(void) { - mv64340_board_pcibios_fixup_bus(c); + uint32_t mem0_base, mem0_size; + uint32_t io_base, io_size; + + io_base = MV_READ(MV64340_PCI_1_IO_BASE_ADDR) << 16; + io_size = (MV_READ(MV64340_PCI_1_IO_SIZE) + 1) << 16; + mem0_base = MV_READ(MV64340_PCI_1_MEMORY0_BASE_ADDR) << 16; + mem0_size = (MV_READ(MV64340_PCI_1_MEMORY0_SIZE) + 1) << 16; + + /* + * Here we assume the I/O window of second bus to be contiguous with + * the first. A gap is no problem but would waste address space for + * remapping the port space. + */ + mv_pci_io_mem1_resource.start = mv_io_size; + mv_pci_io_mem1_resource.end = mv_io_size + io_size - 1; + mv_pci_mem1_resource.start = mem0_base; + mv_pci_mem1_resource.end = mem0_base + mem0_size - 1; + mv_bus1_controller.mem_offset = mem0_base; + mv_bus1_controller.io_offset = 0; + + ioport_resource.end = io_base + io_size -mv_io_base - 1; + + register_pci_controller(&mv_bus1_controller); + + mv_io_size = io_base + io_size - mv_io_base; } -void __init pcibios_init(void) +static __init int __init ocelot_c_pci_init(void) { - /* Reset PCI I/O and PCI MEM values */ - ioport_resource.start = 0xe0000000; - ioport_resource.end = 0xe0000000 + 0x20000000 - 1; - iomem_resource.start = 0xc0000000; - iomem_resource.end = 0xc0000000 + 0x20000000 - 1; - - pci_scan_bus(0, &mv64340_bus0_pci_ops, NULL); - pci_scan_bus(1, &mv64340_bus1_pci_ops, NULL); + unsigned long io_v_base; + uint32_t enable; + + enable = ~MV_READ(MV64340_BASE_ADDR_ENABLE); + + /* + * We require at least one enabled I/O or PCI memory window or we + * will ignore this PCI bus. We ignore PCI windows 1, 2 and 3. + */ + if (enable & (0x01 << 9) || enable & (0x01 << 10)) + mv64340_pci0_init(); + + if (enable & (0x01 << 14) || enable & (0x01 << 15)) + mv64340_pci1_init(); + + if (mv_io_size) { + io_v_base = (unsigned long) ioremap(mv_io_base, mv_io_size); + if (!io_v_base) + panic("Could not ioremap I/O port range"); + + set_io_port_base(io_v_base); + } + + return 0; } + +arch_initcall(ocelot_c_pci_init); diff --git a/arch/mips/pci/pci-ocelot-g.c b/arch/mips/pci/pci-ocelot-g.c index 34c3ec8d1645..11b05c7e6751 100644 --- a/arch/mips/pci/pci-ocelot-g.c +++ b/arch/mips/pci/pci-ocelot-g.c @@ -1,460 +1,90 @@ /* - * Copyright 2002 Momentum Computer - * Author: Matthew Dharm <mdharm@momenco.com> + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * Copyright (C) 2004 by Ralf Baechle * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * This doesn't really fly - but I don't have a GT64240 system for testing. */ +#include <linux/init.h> +#include <linux/kernel.h> #include <linux/types.h> #include <linux/pci.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <asm/pci.h> -#include <asm/io.h> -#include "gt64240.h" - -#include <linux/init.h> - -#define SELF 0 -#define MASTER_ABORT_BIT 0x100 +#include <asm/gt64240.h> +#include <asm/pci_channel.h> /* - * These functions and structures provide the BIOS scan and mapping of the PCI - * devices. - */ - -void gt64240_board_pcibios_fixup_bus(struct pci_bus *c); - -/* Functions to implement "pci ops" */ -static int galileo_pcibios_read_config_word(int bus, int devfn, - int offset, u16 * val); -static int galileo_pcibios_read_config_byte(int bus, int devfn, - int offset, u8 * val); -static int galileo_pcibios_read_config_dword(int bus, int devfn, - int offset, u32 * val); -static int galileo_pcibios_write_config_byte(int bus, int devfn, - int offset, u8 val); -static int galileo_pcibios_write_config_word(int bus, int devfn, - int offset, u16 val); -static int galileo_pcibios_write_config_dword(int bus, int devfn, - int offset, u32 val); - -static int pci_read(struct pci_bus *bus, unsigned int devfs, int where, - int size, u32 * val); -static int pci_write(struct pci_bus *bus, unsigned int devfs, int where, - int size, u32 val); - -/* - * General-purpose PCI functions. - */ - - -/* - * pci_range_ck - - * - * Check if the pci device that are trying to access does really exists - * on the evaluation board. - * - * Inputs : - * bus - bus number (0 for PCI 0 ; 1 for PCI 1) - * dev - number of device on the specific pci bus - * - * Outpus : - * 0 - if OK , 1 - if failure - */ -static __inline__ int pci_range_ck(unsigned char bus, unsigned char dev) -{ - /* Accessing device 31 crashes the GT-64240. */ - if (dev < 5) - return 0; - return -1; -} - -/* - * galileo_pcibios_(read/write)_config_(dword/word/byte) - - * - * reads/write a dword/word/byte register from the configuration space - * of a device. - * - * Note that bus 0 and bus 1 are local, and we assume all other busses are - * bridged from bus 1. This is a safe assumption, since any other - * configuration will require major modifications to the CP7000G - * - * Inputs : - * bus - bus number - * dev - device number - * offset - register offset in the configuration space - * val - value to be written / read - * - * Outputs : - * PCIBIOS_SUCCESSFUL when operation was succesfull - * PCIBIOS_DEVICE_NOT_FOUND when the bus or dev is errorneous - * PCIBIOS_BAD_REGISTER_NUMBER when accessing non aligned + * We assume these address ranges have been programmed into the GT-64240 by + * the firmware. PMON in case of the Ocelot G does that. Note the size of + * the I/O range is completly stupid; I/O mappings are limited to at most + * 256 bytes by the PCI spec and deprecated; and just to make things worse + * apparently many devices don't decode more than 64k of I/O space. */ -static int galileo_pcibios_read_config_dword(int bus, int devfn, - int offset, u32 * val) -{ - int dev, func; - uint32_t address_reg, data_reg; - uint32_t address; - - dev = PCI_SLOT(devfn); - func = PCI_FUNC(devfn); - - /* verify the range */ - if (pci_range_ck(bus, dev)) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* select the GT-64240 registers to communicate with the PCI bus */ - if (bus == 0) { - address_reg = PCI_0CONFIGURATION_ADDRESS; - data_reg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER; - GT_WRITE(PCI_0ERROR_CAUSE, ~MASTER_ABORT_BIT); - } else { - address_reg = PCI_1CONFIGURATION_ADDRESS; - data_reg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER; - GT_WRITE(PCI_1ERROR_CAUSE, ~MASTER_ABORT_BIT); - if (bus == 1) - bus = 0; - } - - address = (bus << 16) | (dev << 11) | (func << 8) | - (offset & 0xfc) | 0x80000000; - - /* start the configuration cycle */ - GT_WRITE(address_reg, address); - - /* read the data */ - GT_READ(data_reg, val); - - return PCIBIOS_SUCCESSFUL; -} - - -static int galileo_pcibios_read_config_word(int bus, int devfn, - int offset, u16 * val) -{ - int dev, func; - uint32_t address_reg, data_reg; - uint32_t address; - - dev = PCI_SLOT(devfn); - func = PCI_FUNC(devfn); - - /* verify the range */ - if (pci_range_ck(bus, dev)) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* select the GT-64240 registers to communicate with the PCI bus */ - if (bus == 0) { - address_reg = PCI_0CONFIGURATION_ADDRESS; - data_reg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER; - GT_WRITE(PCI_0ERROR_CAUSE, ~MASTER_ABORT_BIT); - } else { - address_reg = PCI_1CONFIGURATION_ADDRESS; - data_reg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER; - GT_WRITE(PCI_1ERROR_CAUSE, ~MASTER_ABORT_BIT); - if (bus == 1) - bus = 0; - } - - address = (bus << 16) | (dev << 11) | (func << 8) | - (offset & 0xfc) | 0x80000000; - - /* start the configuration cycle */ - GT_WRITE(address_reg, address); - - /* read the data */ - GT_READ_16(data_reg + (offset & 0x3), val); - - return PCIBIOS_SUCCESSFUL; -} - -static int galileo_pcibios_read_config_byte(int bus, int devfn, - int offset, u8 * val) -{ - int dev, func; - uint32_t address_reg, data_reg; - uint32_t address; - - dev = PCI_SLOT(devfn); - func = PCI_FUNC(devfn); - - /* verify the range */ - if (pci_range_ck(bus, dev)) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* select the GT-64240 registers to communicate with the PCI bus */ - if (bus == 0) { - address_reg = PCI_0CONFIGURATION_ADDRESS; - data_reg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER; - } else { - address_reg = PCI_1CONFIGURATION_ADDRESS; - data_reg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER; - if (bus == 1) - bus = 0; - } - - address = (bus << 16) | (dev << 11) | (func << 8) | - (offset & 0xfc) | 0x80000000; +#define gt_io_size 0x20000000UL +#define gt_io_base 0xe0000000UL - /* start the configuration cycle */ - GT_WRITE(address_reg, address); - - /* write the data */ - GT_READ_8(data_reg + (offset & 0x3), val); - - return PCIBIOS_SUCCESSFUL; -} - -static int galileo_pcibios_write_config_dword(int bus, int devfn, - int offset, u32 val) -{ - int dev, func; - uint32_t address_reg, data_reg; - uint32_t address; - - dev = PCI_SLOT(devfn); - func = PCI_FUNC(devfn); - - /* verify the range */ - if (pci_range_ck(bus, dev)) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* select the GT-64240 registers to communicate with the PCI bus */ - if (bus == 0) { - address_reg = PCI_0CONFIGURATION_ADDRESS; - data_reg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER; - } else { - address_reg = PCI_1CONFIGURATION_ADDRESS; - data_reg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER; - if (bus == 1) - bus = 0; - } - - address = (bus << 16) | (dev << 11) | (func << 8) | - (offset & 0xfc) | 0x80000000; - - /* start the configuration cycle */ - GT_WRITE(address_reg, address); - - /* write the data */ - GT_WRITE(data_reg, val); - - return PCIBIOS_SUCCESSFUL; -} - - -static int galileo_pcibios_write_config_word(int bus, int devfn, - int offset, u16 val) -{ - int dev, func; - uint32_t address_reg, data_reg; - uint32_t address; - - dev = PCI_SLOT(devfn); - func = PCI_FUNC(devfn); - - /* verify the range */ - if (pci_range_ck(bus, dev)) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* select the GT-64240 registers to communicate with the PCI bus */ - if (bus == 0) { - address_reg = PCI_0CONFIGURATION_ADDRESS; - data_reg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER; - } else { - address_reg = PCI_1CONFIGURATION_ADDRESS; - data_reg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER; - if (bus == 1) - bus = 0; - } - - address = (bus << 16) | (dev << 11) | (func << 8) | - (offset & 0xfc) | 0x80000000; - - /* start the configuration cycle */ - GT_WRITE(address_reg, address); - - /* write the data */ - GT_WRITE_16(data_reg + (offset & 0x3), val); - - return PCIBIOS_SUCCESSFUL; -} - -static int galileo_pcibios_write_config_byte(int bus, int devfn, - int offset, u8 val) -{ - int dev, func; - uint32_t address_reg, data_reg; - uint32_t address; - - dev = PCI_SLOT(devfn); - func = PCI_FUNC(devfn); - - /* verify the range */ - if (pci_range_ck(bus, dev)) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* select the GT-64240 registers to communicate with the PCI bus */ - if (bus == 0) { - address_reg = PCI_0CONFIGURATION_ADDRESS; - data_reg = PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER; - } else { - address_reg = PCI_1CONFIGURATION_ADDRESS; - data_reg = PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER; - if (bus == 1) - bus = 0; - } - - address = (bus << 16) | (dev << 11) | (func << 8) | - (offset & 0xfc) | 0x80000000; - - /* start the configuration cycle */ - GT_WRITE(address_reg, address); - - /* write the data */ - GT_WRITE_8(data_reg + (offset & 0x3), val); - - return PCIBIOS_SUCCESSFUL; -} - -struct pci_ops galileo_pci_ops = { - .read = pci_read, - .write = pci_write +static struct resource gt_pci_mem0_resource = { + .name = "MV64240 PCI0 MEM", + .start = 0xc0000000UL, + .end = 0xcfffffffUL, + .flags = IORESOURCE_MEM }; -static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 * val) -{ - switch (size) { - case 1: - return galileo_pcibios_read_config_byte(bus->number, - devfn, where, - (u8 *) val); - case 2: - return galileo_pcibios_read_config_word(bus->number, - devfn, where, - (u16 *) val); - case 4: - return galileo_pcibios_read_config_dword(bus->number, - devfn, where, - (u32 *) val); - } - return PCIBIOS_FUNC_NOT_SUPPORTED; -} - -static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, - int size, u32 val) -{ - switch (size) { - case 1: - return galileo_pcibios_write_config_byte(bus->number, - devfn, where, - val); - case 2: - return galileo_pcibios_write_config_word(bus->number, - devfn, where, - val); - case 4: - return galileo_pcibios_write_config_dword(bus->number, - devfn, where, - val); - } - return PCIBIOS_FUNC_NOT_SUPPORTED; -} - -struct pci_fixup pcibios_fixups[] = { - {0} +static struct resource gt_pci_io_mem0_resource = { + .name = "MV64240 PCI0 IO MEM", + .start = 0xe0000000UL, + .end = 0xefffffffUL, + .flags = IORESOURCE_IO }; -void __devinit pcibios_fixup_bus(struct pci_bus *c) -{ - gt64240_board_pcibios_fixup_bus(c); -} +static struct pci_controller gt_bus0_controller = { + .pci_ops = >_bus0_pci_ops, + .mem_resource = >_pci_mem0_resource, + .mem_offset = 0xc0000000UL, + .io_resource = >_pci_io_mem0_resource, + .io_offset = 0x00000000UL +}; +static struct resource gt_pci_mem1_resource = { + .name = "MV64240 PCI1 MEM", + .start = 0xd0000000UL, + .end = 0xdfffffffUL, + .flags = IORESOURCE_MEM +}; -/******************************************************************** -* pci0P2PConfig - This function set the PCI_0 P2P configurate. -* For more information on the P2P read PCI spec. -* -* Inputs: unsigned int SecondBusLow - Secondery PCI interface Bus Range Lower -* Boundry. -* unsigned int SecondBusHigh - Secondry PCI interface Bus Range upper -* Boundry. -* unsigned int busNum - The CPI bus number to which the PCI interface -* is connected. -* unsigned int devNum - The PCI interface's device number. -* -* Returns: true. -*/ -void pci0P2PConfig(unsigned int SecondBusLow, unsigned int SecondBusHigh, - unsigned int busNum, unsigned int devNum) -{ - uint32_t regData; +static struct resource gt_pci_io_mem1_resource = { + .name = "MV64240 PCI1 IO MEM", + .start = 0xf0000000UL, + .end = 0xffffffffUL, + .flags = IORESOURCE_IO +}; - regData = (SecondBusLow & 0xff) | ((SecondBusHigh & 0xff) << 8) | - ((busNum & 0xff) << 16) | ((devNum & 0x1f) << 24); - GT_WRITE(PCI_0P2P_CONFIGURATION, regData); -} +static struct pci_controller gt_bus1_controller = { + .pci_ops = >_bus1_pci_ops, + .mem_resource = >_pci_mem1_resource, + .mem_offset = 0xd0000000UL, + .io_resource = >_pci_io_mem1_resource, + .io_offset = 0x10000000UL +}; -/******************************************************************** -* pci1P2PConfig - This function set the PCI_1 P2P configurate. -* For more information on the P2P read PCI spec. -* -* Inputs: unsigned int SecondBusLow - Secondery PCI interface Bus Range Lower -* Boundry. -* unsigned int SecondBusHigh - Secondry PCI interface Bus Range upper -* Boundry. -* unsigned int busNum - The CPI bus number to which the PCI interface -* is connected. -* unsigned int devNum - The PCI interface's device number. -* -* Returns: true. -*/ -void pci1P2PConfig(unsigned int SecondBusLow, unsigned int SecondBusHigh, - unsigned int busNum, unsigned int devNum) +static __init int __init ocelot_g_pci_init(void) { - uint32_t regData; + unsigned long io_v_base; - regData = (SecondBusLow & 0xff) | ((SecondBusHigh & 0xff) << 8) | - ((busNum & 0xff) << 16) | ((devNum & 0x1f) << 24); - GT_WRITE(PCI_1P2P_CONFIGURATION, regData); -} + if (gt_io_size) { + io_v_base = (unsigned long) ioremap(gt_io_base, gt_io_size); + if (!io_v_base) + panic("Could not ioremap I/O port range"); -#define PCI0_STATUS_COMMAND_REG 0x4 -#define PCI1_STATUS_COMMAND_REG 0x84 - -static int __init pcibios_init(void) -{ - /* Reset PCI I/O and PCI MEM values */ - ioport_resource.start = 0xe0000000; - ioport_resource.end = 0xe0000000 + 0x20000000 - 1; - iomem_resource.start = 0xc0000000; - iomem_resource.end = 0xc0000000 + 0x20000000 - 1; + set_io_port_base(io_v_base); + } - pci_scan_bus(0, &galileo_pci_ops, NULL); - pci_scan_bus(1, &galileo_pci_ops, NULL); + register_pci_controller(>_bus0_controller); + register_pci_controller(>_bus1_controller); return 0; } -subsys_initcall(pcibios_init); +arch_initcall(ocelot_g_pci_init); diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c index 8068b0171f0c..a6db6f028574 100644 --- a/arch/mips/pci/pci-vr41xx.c +++ b/arch/mips/pci/pci-vr41xx.c @@ -1,48 +1,32 @@ /* - * FILE NAME - * arch/mips/vr41xx/common/pciu.c + * pci-vr41xx.c, PCI Control Unit routines for the NEC VR4100 series. * - * BRIEF MODULE DESCRIPTION - * PCI Control Unit routines for the NEC VR4100 series. + * Copyright (C) 2001-2003 MontaVista Software Inc. + * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> + * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Copyright 2001-2003 MontaVista Software Inc. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ /* * Changes: - * Paul Mundt <lethal@chaoticdreams.org> - * - Fix deadlock-causing PCIU access race for VR4131. - * * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> * - New creation, NEC VR4122 and VR4131 are supported. */ -#include <linux/config.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/types.h> -#include <linux/delay.h> #include <asm/cpu.h> #include <asm/io.h> @@ -51,183 +35,257 @@ #include "pci-vr41xx.h" -static inline int vr41xx_pci_config_access(unsigned char bus, - unsigned int devfn, int where) -{ - if (bus == 0) { - /* - * Type 0 configuration - */ - if (PCI_SLOT(devfn) < 11 || where > 255) - return -1; - - writel((1UL << PCI_SLOT(devfn)) | - (PCI_FUNC(devfn) << 8) | - (where & 0xfc), PCICONFAREG); - } else { - /* - * Type 1 configuration - */ - if (where > 255) - return -1; - - writel((bus << 16) | - (devfn << 8) | (where & 0xfc) | 1UL, PCICONFAREG); - } - - return 0; -} +extern struct pci_ops vr41xx_pci_ops; -static int vr41xx_pci_config_read(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 * val) -{ - u32 data; - - *val = 0xffffffffUL; - if (vr41xx_pci_config_access(bus->number, devfn, where) < 0) - return PCIBIOS_DEVICE_NOT_FOUND; +static struct pci_master_address_conversion pci_master_memory1 = { + .bus_base_address = PCI_MASTER_MEM1_BUS_BASE_ADDRESS, + .address_mask = PCI_MASTER_MEM1_ADDRESS_MASK, + .pci_base_address = PCI_MASTER_MEM1_PCI_BASE_ADDRESS, +}; - data = readl(PCICONFDREG); +static struct pci_target_address_conversion pci_target_memory1 = { + .address_mask = PCI_TARGET_MEM1_ADDRESS_MASK, + .bus_base_address = PCI_TARGET_MEM1_BUS_BASE_ADDRESS, +}; - switch (size) { - case 1: - *val = (data >> ((where & 3) << 3)) & 0xffUL; - break; - case 2: - *val = (data >> ((where & 2) << 3)) & 0xffffUL; - break; - case 4: - *val = data; - break; - default: - return PCIBIOS_FUNC_NOT_SUPPORTED; - } +static struct pci_master_address_conversion pci_master_io = { + .bus_base_address = PCI_MASTER_IO_BUS_BASE_ADDRESS, + .address_mask = PCI_MASTER_IO_ADDRESS_MASK, + .pci_base_address = PCI_MASTER_IO_PCI_BASE_ADDRESS, +}; - return PCIBIOS_SUCCESSFUL; -} +static struct pci_mailbox_address pci_mailbox = { + .base_address = PCI_MAILBOX_BASE_ADDRESS, +}; -static int vr41xx_pci_config_write(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 val) -{ - u32 data; - int shift; +static struct pci_target_address_window pci_target_window1 = { + .base_address = PCI_TARGET_WINDOW1_BASE_ADDRESS, +}; - if (vr41xx_pci_config_access(bus->number, devfn, where) < 0) - return PCIBIOS_DEVICE_NOT_FOUND; +static struct resource pci_mem_resource = { + .name = "PCI Memory resources", + .start = PCI_MEM_RESOURCE_START, + .end = PCI_MEM_RESOURCE_END, + .flags = IORESOURCE_MEM, +}; - data = readl(PCICONFDREG); +static struct resource pci_io_resource = { + .name = "PCI I/O resources", + .start = PCI_IO_RESOURCE_START, + .end = PCI_IO_RESOURCE_END, + .flags = IORESOURCE_IO, +}; - switch (size) { - case 1: - shift = (where & 3) << 3; - data &= ~(0xff << shift); - data |= ((val & 0xff) << shift); - break; - case 2: - shift = (where & 2) << 3; - data &= ~(0xffff << shift); - data |= ((val & 0xffff) << shift); - break; - case 4: - data = val; - break; - default: - return PCIBIOS_FUNC_NOT_SUPPORTED; - } +static struct pci_controller_unit_setup vr41xx_pci_controller_unit_setup = { + .master_memory1 = &pci_master_memory1, + .target_memory1 = &pci_target_memory1, + .master_io = &pci_master_io, + .exclusive_access = CANNOT_LOCK_FROM_DEVICE, + .wait_time_limit_from_irdy_to_trdy = 0, + .mailbox = &pci_mailbox, + .target_window1 = &pci_target_window1, + .master_latency_timer = 0x80, + .retry_limit = 0, + .arbiter_priority_control = PCI_ARBITRATION_MODE_FAIR, + .take_away_gnt_mode = PCI_TAKE_AWAY_GNT_DISABLE, +}; - writel(data, PCICONFDREG); +static struct pci_controller vr41xx_pci_controller = { + .pci_ops = &vr41xx_pci_ops, + .mem_resource = &pci_mem_resource, + .io_resource = &pci_io_resource, +}; - return PCIBIOS_SUCCESSFUL; +void __init vr41xx_pciu_setup(struct pci_controller_unit_setup *setup) +{ + vr41xx_pci_controller_unit_setup = *setup; } -struct pci_ops vr41xx_pci_ops = { - .read = vr41xx_pci_config_read, - .write = vr41xx_pci_config_write, -}; - -void __init vr41xx_pciu_init(struct vr41xx_pci_address_map *map) +static int __init vr41xx_pciu_init(void) { - struct vr41xx_pci_address_space *s; - unsigned long vtclock; - u32 config; - int n; + struct pci_controller_unit_setup *setup; + struct pci_master_address_conversion *master; + struct pci_target_address_conversion *target; + struct pci_mailbox_address *mailbox; + struct pci_target_address_window *window; + unsigned long vtclock, pci_clock_max; + uint32_t val; - if (!map) - return; + setup = &vr41xx_pci_controller_unit_setup; /* Disable PCI interrupt */ - writew(0, MPCIINTREG); + vr41xx_disable_pciint(); /* Supply VTClock to PCIU */ vr41xx_supply_clock(PCIU_CLOCK); - /* - * Sleep for 1us after setting MSKPPCIU bit in CMUCLKMSK - * before doing any PCIU access to avoid deadlock on VR4131. - */ - udelay(1); + /* Dummy write, waiting for supply of VTClock. */ + vr41xx_disable_pciint(); /* Select PCI clock */ + if (setup->pci_clock_max != 0) + pci_clock_max = setup->pci_clock_max; + else + pci_clock_max = PCI_CLOCK_MAX; vtclock = vr41xx_get_vtclock_frequency(); - if (vtclock < MAX_PCI_CLOCK) + if (vtclock < pci_clock_max) writel(EQUAL_VTCLOCK, PCICLKSELREG); - else if ((vtclock / 2) < MAX_PCI_CLOCK) + else if ((vtclock / 2) < pci_clock_max) writel(HALF_VTCLOCK, PCICLKSELREG); - else if ((vtclock / 4) < MAX_PCI_CLOCK) + else if (current_cpu_data.processor_id >= PRID_VR4131_REV2_1 && + (vtclock / 3) < pci_clock_max) + writel(ONE_THIRD_VTCLOCK, PCICLKSELREG); + else if ((vtclock / 4) < pci_clock_max) writel(QUARTER_VTCLOCK, PCICLKSELREG); - else - printk(KERN_INFO "Warning: PCI Clock is over 33MHz.\n"); + else { + printk(KERN_ERR "PCI Clock is over 33MHz.\n"); + return -EINVAL; + } /* Supply PCI clock by PCI bus */ vr41xx_supply_clock(PCI_CLOCK); - /* - * Set PCI memory & I/O space address conversion registers - * for master transaction. - */ - if (map->mem1 != NULL) { - s = map->mem1; - config = (s->internal_base & 0xff000000) | - ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) | - ((s->pci_base & 0xff000000) >> 24); - writel(config, PCIMMAW1REG); + if (setup->master_memory1 != NULL) { + master = setup->master_memory1; + val = IBA(master->bus_base_address) | + MASTER_MSK(master->address_mask) | + WINEN | + PCIA(master->pci_base_address); + writel(val, PCIMMAW1REG); + } else { + val = readl(PCIMMAW1REG); + val &= ~WINEN; + writel(val, PCIMMAW1REG); + } + + if (setup->master_memory2 != NULL) { + master = setup->master_memory2; + val = IBA(master->bus_base_address) | + MASTER_MSK(master->address_mask) | + WINEN | + PCIA(master->pci_base_address); + writel(val, PCIMMAW2REG); + } else { + val = readl(PCIMMAW2REG); + val &= ~WINEN; + writel(val, PCIMMAW2REG); + } + + if (setup->target_memory1 != NULL) { + target = setup->target_memory1; + val = TARGET_MSK(target->address_mask) | + WINEN | + ITA(target->bus_base_address); + writel(val, PCITAW1REG); + } else { + val = readl(PCITAW1REG); + val &= ~WINEN; + writel(val, PCITAW1REG); + } + + if (setup->target_memory2 != NULL) { + target = setup->target_memory2; + val = TARGET_MSK(target->address_mask) | + WINEN | + ITA(target->bus_base_address); + writel(val, PCITAW2REG); + } else { + val = readl(PCITAW2REG); + val &= ~WINEN; + writel(val, PCITAW2REG); + } + + if (setup->master_io != NULL) { + master = setup->master_io; + val = IBA(master->bus_base_address) | + MASTER_MSK(master->address_mask) | + WINEN | + PCIIA(master->pci_base_address); + writel(val, PCIMIOAWREG); + } else { + val = readl(PCIMIOAWREG); + val &= ~WINEN; + writel(val, PCIMIOAWREG); + } + + if (setup->exclusive_access == CANNOT_LOCK_FROM_DEVICE) + writel(UNLOCK, PCIEXACCREG); + else + writel(0, PCIEXACCREG); + + if (current_cpu_data.cputype == CPU_VR4122) + writel(TRDYV(setup->wait_time_limit_from_irdy_to_trdy), PCITRDYVREG); + + writel(MLTIM(setup->master_latency_timer), LATTIMEREG); + + if (setup->mailbox != NULL) { + mailbox = setup->mailbox; + val = MBADD(mailbox->base_address) | TYPE_32BITSPACE | + MSI_MEMORY | PREF_APPROVAL; + writel(val, MAILBAREG); } - if (map->mem2 != NULL) { - s = map->mem2; - config = (s->internal_base & 0xff000000) | - ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) | - ((s->pci_base & 0xff000000) >> 24); - writel(config, PCIMMAW2REG); + + if (setup->target_window1) { + window = setup->target_window1; + val = PMBA(window->base_address) | TYPE_32BITSPACE | + MSI_MEMORY | PREF_APPROVAL; + writel(val, PCIMBA1REG); + } + + if (setup->target_window2) { + window = setup->target_window2; + val = PMBA(window->base_address) | TYPE_32BITSPACE | + MSI_MEMORY | PREF_APPROVAL; + writel(val, PCIMBA2REG); } - if (map->io != NULL) { - s = map->io; - config = (s->internal_base & 0xff000000) | - ((s->address_mask & 0x7f000000) >> 11) | (1UL << 12) | - ((s->pci_base & 0xff000000) >> 24); - writel(config, PCIMIOAWREG); + + val = readl(RETVALREG); + val &= ~RTYVAL_MASK; + val |= RTYVAL(setup->retry_limit); + writel(val, RETVALREG); + + val = readl(PCIAPCNTREG); + val &= ~(TKYGNT | PAPC); + + switch (setup->arbiter_priority_control) { + case PCI_ARBITRATION_MODE_ALTERNATE_0: + val |= PAPC_ALTERNATE_0; + break; + case PCI_ARBITRATION_MODE_ALTERNATE_B: + val |= PAPC_ALTERNATE_B; + break; + default: + val |= PAPC_FAIR; + break; } - /* Set target memory windows */ - writel(0x00081000, PCITAW1REG); - writel(0UL, PCITAW2REG); - pciu_write_config_dword(PCI_BASE_ADDRESS_0, 0UL); - pciu_write_config_dword(PCI_BASE_ADDRESS_1, 0UL); + if (setup->take_away_gnt_mode == PCI_TAKE_AWAY_GNT_ENABLE) + val |= TKYGNT_ENABLE; + + writel(val, PCIAPCNTREG); + + writel(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | + PCI_COMMAND_PARITY | PCI_COMMAND_SERR, COMMANDREG); /* Clear bus error */ - n = readl(BUSERRADREG); + readl(BUSERRADREG); + + writel(CONFIG_DONE, PCIENREG); + + if (setup->mem_resource != NULL) + vr41xx_pci_controller.mem_resource = setup->mem_resource; - if (current_cpu_data.cputype == CPU_VR4122) { - writel(0UL, PCITRDYVREG); - pciu_write_config_dword(PCI_CACHE_LINE_SIZE, 0x0000f804); + if (setup->io_resource != NULL) { + vr41xx_pci_controller.io_resource = setup->io_resource; } else { - writel(100UL, PCITRDYVREG); - pciu_write_config_dword(PCI_CACHE_LINE_SIZE, 0x00008004); + set_io_port_base(IO_PORT_BASE); + ioport_resource.start = IO_PORT_RESOURCE_START; + ioport_resource.end = IO_PORT_RESOURCE_END; } - writel(CONFIG_DONE, PCIENREG); - pciu_write_config_dword(PCI_COMMAND, - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER | - PCI_COMMAND_PARITY | PCI_COMMAND_SERR); + register_pci_controller(&vr41xx_pci_controller); + + return 0; } + +early_initcall(vr41xx_pciu_init); diff --git a/arch/mips/pci/pci-vr41xx.h b/arch/mips/pci/pci-vr41xx.h index f0fca0c786a8..3a5f69bfb998 100644 --- a/arch/mips/pci/pci-vr41xx.h +++ b/arch/mips/pci/pci-vr41xx.h @@ -1,164 +1,151 @@ /* - * FILE NAME - * arch/mips/vr41xx/common/pciu.h + * pci-vr41xx.h, Include file for PCI Control Unit of the NEC VR4100 series. * - * BRIEF MODULE DESCRIPTION - * Include file for PCI Control Unit of the NEC VR4100 series. + * Copyright (C) 2002 MontaVista Software Inc. + * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> + * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Copyright 2002 MontaVista Software Inc. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#ifndef __PCI_VR41XX_H +#define __PCI_VR41XX_H + +#define PCIMMAW1REG KSEG1ADDR(0x0f000c00) +#define PCIMMAW2REG KSEG1ADDR(0x0f000c04) +#define PCITAW1REG KSEG1ADDR(0x0f000c08) +#define PCITAW2REG KSEG1ADDR(0x0f000c0c) +#define PCIMIOAWREG KSEG1ADDR(0x0f000c10) + #define IBA(addr) ((addr) & 0xff000000U) + #define MASTER_MSK(mask) (((mask) >> 11) & 0x000fe000U) + #define PCIA(addr) (((addr) >> 24) & 0x000000ffU) + #define TARGET_MSK(mask) (((mask) >> 8) & 0x000fe000U) + #define ITA(addr) (((addr) >> 24) & 0x000000ffU) + #define PCIIA(addr) (((addr) >> 24) & 0x000000ffU) + #define WINEN 0x1000U +#define PCICONFDREG KSEG1ADDR(0x0f000c14) +#define PCICONFAREG KSEG1ADDR(0x0f000c18) +#define PCIMAILREG KSEG1ADDR(0x0f000c1c) +#define BUSERRADREG KSEG1ADDR(0x0f000c24) + #define EA(reg) ((reg) &0xfffffffc) + +#define INTCNTSTAREG KSEG1ADDR(0x0f000c28) + #define MABTCLR 0x80000000U + #define TRDYCLR 0x40000000U + #define PARCLR 0x20000000U + #define MBCLR 0x10000000U + #define SERRCLR 0x08000000U + #define RTYCLR 0x04000000U + #define MABCLR 0x02000000U + #define TABCLR 0x01000000U + /* RFU */ + #define MABTMSK 0x00008000U + #define TRDYMSK 0x00004000U + #define PARMSK 0x00002000U + #define MBMSK 0x00001000U + #define SERRMSK 0x00000800U + #define RTYMSK 0x00000400U + #define MABMSK 0x00000200U + #define TABMSK 0x00000100U + #define IBAMABT 0x00000080U + #define TRDYRCH 0x00000040U + #define PAR 0x00000020U + #define MB 0x00000010U + #define PCISERR 0x00000008U + #define RTYRCH 0x00000004U + #define MABORT 0x00000002U + #define TABORT 0x00000001U + +#define PCIEXACCREG KSEG1ADDR(0x0f000c2c) + #define UNLOCK 0x2U + #define EAREQ 0x1U +#define PCIRECONTREG KSEG1ADDR(0x0f000c30) + #define RTRYCNT(reg) ((reg) & 0x000000ffU) +#define PCIENREG KSEG1ADDR(0x0f000c34) + #define CONFIG_DONE 0x4U +#define PCICLKSELREG KSEG1ADDR(0x0f000c38) + #define EQUAL_VTCLOCK 0x2U + #define HALF_VTCLOCK 0x0U + #define ONE_THIRD_VTCLOCK 0x3U + #define QUARTER_VTCLOCK 0x1U +#define PCITRDYVREG KSEG1ADDR(0x0f000c3c) + #define TRDYV(val) ((uint32_t)(val) & 0xffU) +#define PCICLKRUNREG KSEG1ADDR(0x0f000c60) + +#define VENDORIDREG KSEG1ADDR(0x0f000d00) +#define DEVICEIDREG KSEG1ADDR(0x0f000d00) +#define COMMANDREG KSEG1ADDR(0x0f000d04) +#define STATUSREG KSEG1ADDR(0x0f000d04) +#define REVIDREG KSEG1ADDR(0x0f000d08) +#define CLASSREG KSEG1ADDR(0x0f000d08) +#define CACHELSREG KSEG1ADDR(0x0f000d0c) +#define LATTIMEREG KSEG1ADDR(0x0f000d0c) + #define MLTIM(val) (((uint32_t)(val) << 7) & 0xff00U) +#define MAILBAREG KSEG1ADDR(0x0f000d10) +#define PCIMBA1REG KSEG1ADDR(0x0f000d14) +#define PCIMBA2REG KSEG1ADDR(0x0f000d18) + #define MBADD(base) ((base) & 0xfffff800U) + #define PMBA(base) ((base) & 0xffe00000U) + #define PREF 0x8U + #define PREF_APPROVAL 0x8U + #define PREF_DISAPPROVAL 0x0U + #define TYPE 0x6U + #define TYPE_32BITSPACE 0x0U + #define MSI 0x1U + #define MSI_MEMORY 0x0U +#define INTLINEREG KSEG1ADDR(0x0f000d3c) +#define INTPINREG KSEG1ADDR(0x0f000d3c) +#define RETVALREG KSEG1ADDR(0x0f000d40) +#define PCIAPCNTREG KSEG1ADDR(0x0f000d40) + #define TKYGNT 0x04000000U + #define TKYGNT_ENABLE 0x04000000U + #define TKYGNT_DISABLE 0x00000000U + #define PAPC 0x03000000U + #define PAPC_ALTERNATE_B 0x02000000U + #define PAPC_ALTERNATE_0 0x01000000U + #define PAPC_FAIR 0x00000000U + #define RTYVAL(val) (((uint32_t)(val) << 7) & 0xff00U) + #define RTYVAL_MASK 0xff00U + +#define PCI_CLOCK_MAX 33333333U + /* - * Changes: - * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> - * - New creation, NEC VR4122 and VR4131 are supported. + * Default setup */ -#ifndef __VR41XX_PCIU_H -#define __VR41XX_PCIU_H - -#include <linux/config.h> -#include <asm/addrspace.h> - -#define BIT(x) (1 << (x)) - -#define PCIMMAW1REG KSEG1ADDR(0x0f000c00) -#define PCIMMAW2REG KSEG1ADDR(0x0f000c04) -#define PCITAW1REG KSEG1ADDR(0x0f000c08) -#define PCITAW2REG KSEG1ADDR(0x0f000c0c) -#define PCIMIOAWREG KSEG1ADDR(0x0f000c10) -#define INTERNAL_BUS_BASE_ADDRESS 0xff000000 -#define ADDRESS_MASK 0x000fe000 -#define PCI_ACCESS_ENABLE BIT(12) -#define PCI_ADDRESS_SETTING 0x000000ff - -#define PCICONFDREG KSEG1ADDR(0x0f000c14) -#define PCICONFAREG KSEG1ADDR(0x0f000c18) -#define PCIMAILREG KSEG1ADDR(0x0f000c1c) - -#define BUSERRADREG KSEG1ADDR(0x0f000c24) -#define ERROR_ADDRESS 0xfffffffc - -#define INTCNTSTAREG KSEG1ADDR(0x0f000c28) -#define MABTCLR BIT(31) -#define TRDYCLR BIT(30) -#define PARCLR BIT(29) -#define MBCLR BIT(28) -#define SERRCLR BIT(27) - -#define PCIEXACCREG KSEG1ADDR(0x0f000c2c) -#define UNLOCK BIT(1) -#define EAREQ BIT(0) - -#define PCIRECONTREG KSEG1ADDR(0x0f000c30) -#define RTRYCNT 0x000000ff - -#define PCIENREG KSEG1ADDR(0x0f000c34) -#define CONFIG_DONE BIT(2) - -#define PCICLKSELREG KSEG1ADDR(0x0f000c38) -#define EQUAL_VTCLOCK 0x00000002 -#define HALF_VTCLOCK 0x00000000 -#define QUARTER_VTCLOCK 0x00000001 - -#define PCITRDYVREG KSEG1ADDR(0x0f000c3c) - -#define PCICLKRUNREG KSEG1ADDR(0x0f000c60) - -#define PCIU_CONFIGREGS_BASE KSEG1ADDR(0x0f000d00) -#define VENDORIDREG KSEG1ADDR(0x0f000d00) -#define DEVICEIDREG KSEG1ADDR(0x0f000d00) -#define COMMANDREG KSEG1ADDR(0x0f000d04) -#define STATUSREG KSEG1ADDR(0x0f000d04) -#define REVIDREG KSEG1ADDR(0x0f000d08) -#define CLASSREG KSEG1ADDR(0x0f000d08) -#define CACHELSREG KSEG1ADDR(0x0f000d0c) -#define LATTIMEREG KSEG1ADDR(0x0f000d0c) -#define MAILBAREG KSEG1ADDR(0x0f000d10) -#define PCIMBA1REG KSEG1ADDR(0x0f000d14) -#define PCIMBA2REG KSEG1ADDR(0x0f000d18) -#define INTLINEREG KSEG1ADDR(0x0f000d3c) -#define INTPINREG KSEG1ADDR(0x0f000d3c) -#define RETVALREG KSEG1ADDR(0x0f000d40) -#define PCIAPCNTREG KSEG1ADDR(0x0f000d40) - -#define MPCIINTREG KSEG1ADDR(0x0f0000b2) - -#define MAX_PCI_CLOCK 33333333 - -static inline int pciu_read_config_byte(int where, u8 * val) -{ - u32 data; - - data = readl(PCIU_CONFIGREGS_BASE + where); - *val = (u8) (data >> ((where & 3) << 3)); - - return PCIBIOS_SUCCESSFUL; -} - -static inline int pciu_read_config_word(int where, u16 * val) -{ - u32 data; - - if (where & 1) - return PCIBIOS_BAD_REGISTER_NUMBER; - - data = readl(PCIU_CONFIGREGS_BASE + where); - *val = (u16) (data >> ((where & 2) << 3)); - - return PCIBIOS_SUCCESSFUL; -} - -static inline int pciu_read_config_dword(int where, u32 * val) -{ - if (where & 3) - return PCIBIOS_BAD_REGISTER_NUMBER; - - *val = readl(PCIU_CONFIGREGS_BASE + where); +#define PCI_MASTER_MEM1_BUS_BASE_ADDRESS 0x10000000U +#define PCI_MASTER_MEM1_ADDRESS_MASK 0x7c000000U +#define PCI_MASTER_MEM1_PCI_BASE_ADDRESS 0x10000000U - return PCIBIOS_SUCCESSFUL; -} +#define PCI_TARGET_MEM1_ADDRESS_MASK 0x08000000U +#define PCI_TARGET_MEM1_BUS_BASE_ADDRESS 0x00000000U -static inline int pciu_write_config_byte(int where, u8 val) -{ - writel(val, PCIU_CONFIGREGS_BASE + where); +#define PCI_MASTER_IO_BUS_BASE_ADDRESS 0x16000000U +#define PCI_MASTER_IO_ADDRESS_MASK 0x7e000000U +#define PCI_MASTER_IO_PCI_BASE_ADDRESS 0x00000000U - return 0; -} +#define PCI_MAILBOX_BASE_ADDRESS 0x00000000U -static inline int pciu_write_config_word(int where, u16 val) -{ - writel(val, PCIU_CONFIGREGS_BASE + where); +#define PCI_TARGET_WINDOW1_BASE_ADDRESS 0x00000000U - return 0; -} +#define IO_PORT_BASE KSEG1ADDR(PCI_MASTER_IO_BUS_BASE_ADDRESS) +#define IO_PORT_RESOURCE_START PCI_MASTER_IO_PCI_BASE_ADDRESS +#define IO_PORT_RESOURCE_END (~PCI_MASTER_IO_ADDRESS_MASK & PCI_MASTER_ADDRESS_MASK) -static inline int pciu_write_config_dword(int where, u32 val) -{ - writel(val, PCIU_CONFIGREGS_BASE + where); +#define PCI_IO_RESOURCE_START 0x01000000UL +#define PCI_IO_RESOURCE_END 0x01ffffffUL - return 0; -} +#define PCI_MEM_RESOURCE_START 0x11000000UL +#define PCI_MEM_RESOURCE_END 0x13ffffffUL -#endif /* __VR41XX_PCIU_H */ +#endif /* __PCI_VR41XX_H */ diff --git a/arch/mips/pci/pci-yosemite.c b/arch/mips/pci/pci-yosemite.c new file mode 100644 index 000000000000..c1151f43c9af --- /dev/null +++ b/arch/mips/pci/pci-yosemite.c @@ -0,0 +1,37 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2004 by Ralf Baechle + * + */ +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/pci.h> +#include <asm/gt64240.h> +#include <asm/pci_channel.h> + +extern struct pci_ops titan_pci_ops; + +static struct resource py_mem_resource = { + "Titan PCI MEM", 0xe0000000UL, 0xe3ffffffUL, IORESOURCE_MEM +}; + +static struct resource py_io_resource = { + "Titan IO MEM", 0x00000000UL, 0x00ffffffUL, IORESOURCE_IO, +}; + +static struct pci_controller py_controller = { + .pci_ops = &titan_pci_ops, + .mem_resource = &py_mem_resource, + .mem_offset = 0x10000000UL, + .io_resource = &py_io_resource, + .io_offset = 0x00000000UL +}; + +static int __init pmc_yosemite_setup(void) +{ + register_pci_controller(&py_controller); +} diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index eacfcda3d282..9bee1e937ae6 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c @@ -231,7 +231,7 @@ static void __init pcibios_fixup_device_resources(struct pci_dev *dev, { /* Update device resources. */ struct pci_controller *hose = (struct pci_controller *)bus->sysdata; - unsigned long offset; + unsigned long offset = 0; int i; for (i = 0; i < PCI_NUM_RESOURCES; i++) { diff --git a/arch/mips/pmc-sierra/yosemite/Makefile b/arch/mips/pmc-sierra/yosemite/Makefile index 1537b6d36617..bc17586235a3 100644 --- a/arch/mips/pmc-sierra/yosemite/Makefile +++ b/arch/mips/pmc-sierra/yosemite/Makefile @@ -1,8 +1,7 @@ # -# Makefile for the PMC-Sierra Titan +# Makefile for the PMC-Sierra Titan # -obj-y += irq-handler.o irq.o prom.o setup.o +obj-y += irq-handler.o irq.o i2c-yosemite.o prom.o py-console.o setup.o -obj-$(CONFIG_SMP) += smp.o -obj-$(CONFIG_HYPERTRANSPORT) += ht-irq.o ht.o +obj-$(CONFIG_KGDB) += dbg_io.o diff --git a/arch/mips/pmc-sierra/yosemite/dbg_io.c b/arch/mips/pmc-sierra/yosemite/dbg_io.c new file mode 100644 index 000000000000..1ff8d95d0970 --- /dev/null +++ b/arch/mips/pmc-sierra/yosemite/dbg_io.c @@ -0,0 +1,184 @@ +/* + * Copyright 2003 PMC-Sierra + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * Support for KGDB for the Yosemite board. We make use of single serial + * port to be used for KGDB as well as console. The second serial port + * seems to be having a problem. Single IRQ is allocated for both the + * ports. Hence, the interrupt routing code needs to figure out whether + * the interrupt came from channel A or B. + */ + +#include <linux/config.h> + +#if defined(CONFIG_KGDB) +#include <asm/serial.h> + +/* + * Baud rate, Parity, Data and Stop bit settings for the + * serial port on the Yosemite. Note that the Early printk + * patch has been added. So, we should be all set to go + */ +#define YOSEMITE_BAUD_2400 2400 +#define YOSEMITE_BAUD_4800 4800 +#define YOSEMITE_BAUD_9600 9600 +#define YOSEMITE_BAUD_19200 19200 +#define YOSEMITE_BAUD_38400 38400 +#define YOSEMITE_BAUD_57600 57600 +#define YOSEMITE_BAUD_115200 115200 + +#define YOSEMITE_PARITY_NONE 0 +#define YOSEMITE_PARITY_ODD 0x08 +#define YOSEMITE_PARITY_EVEN 0x18 +#define YOSEMITE_PARITY_MARK 0x28 +#define YOSEMITE_PARITY_SPACE 0x38 + +#define YOSEMITE_DATA_5BIT 0x0 +#define YOSEMITE_DATA_6BIT 0x1 +#define YOSEMITE_DATA_7BIT 0x2 +#define YOSEMITE_DATA_8BIT 0x3 + +#define YOSEMITE_STOP_1BIT 0x0 +#define YOSEMITE_STOP_2BIT 0x4 + +/* This is crucial */ +#define SERIAL_REG_OFS 0x1 + +#define SERIAL_RCV_BUFFER 0x0 +#define SERIAL_TRANS_HOLD 0x0 +#define SERIAL_SEND_BUFFER 0x0 +#define SERIAL_INTR_ENABLE (1 * SERIAL_REG_OFS) +#define SERIAL_INTR_ID (2 * SERIAL_REG_OFS) +#define SERIAL_DATA_FORMAT (3 * SERIAL_REG_OFS) +#define SERIAL_LINE_CONTROL (3 * SERIAL_REG_OFS) +#define SERIAL_MODEM_CONTROL (4 * SERIAL_REG_OFS) +#define SERIAL_RS232_OUTPUT (4 * SERIAL_REG_OFS) +#define SERIAL_LINE_STATUS (5 * SERIAL_REG_OFS) +#define SERIAL_MODEM_STATUS (6 * SERIAL_REG_OFS) +#define SERIAL_RS232_INPUT (6 * SERIAL_REG_OFS) +#define SERIAL_SCRATCH_PAD (7 * SERIAL_REG_OFS) + +#define SERIAL_DIVISOR_LSB (0 * SERIAL_REG_OFS) +#define SERIAL_DIVISOR_MSB (1 * SERIAL_REG_OFS) + +/* + * Functions to READ and WRITE to serial port 0 + */ +#define SERIAL_READ(ofs) (*((volatile unsigned char*) \ + (TITAN_SERIAL_BASE + ofs))) + +#define SERIAL_WRITE(ofs, val) ((*((volatile unsigned char*) \ + (TITAN_SERIAL_BASE + ofs))) = val) + +/* + * Functions to READ and WRITE to serial port 1 + */ +#define SERIAL_READ_1(ofs) (*((volatile unsigned char*) \ + (TITAN_SERIAL_BASE_1 + ofs) + +#define SERIAL_WRITE_1(ofs, val) ((*((volatile unsigned char*) \ + (TITAN_SERIAL_BASE_1 + ofs))) = val) + +/* + * Second serial port initialization + */ +void init_second_port(void) +{ + /* Disable Interrupts */ + SERIAL_WRITE_1(SERIAL_LINE_CONTROL, 0x0); + SERIAL_WRITE_1(SERIAL_INTR_ENABLE, 0x0); + + { + unsigned int divisor; + + SERIAL_WRITE_1(SERIAL_LINE_CONTROL, 0x80); + divisor = TITAN_SERIAL_BASE_BAUD / YOSEMITE_BAUD_115200; + SERIAL_WRITE_1(SERIAL_DIVISOR_LSB, divisor & 0xff); + + SERIAL_WRITE_1(SERIAL_DIVISOR_MSB, + (divisor & 0xff00) >> 8); + SERIAL_WRITE_1(SERIAL_LINE_CONTROL, 0x0); + } + + SERIAL_WRITE_1(SERIAL_DATA_FORMAT, YOSEMITE_DATA_8BIT | + YOSEMITE_PARITY_NONE | YOSEMITE_STOP_1BIT); + + /* Enable Interrupts */ + SERIAL_WRITE_1(SERIAL_INTR_ENABLE, 0xf); +} + +/* Initialize the serial port for KGDB debugging */ +void debugInit(unsigned int baud, unsigned char data, unsigned char parity, + unsigned char stop) +{ + /* Disable Interrupts */ + SERIAL_WRITE(SERIAL_LINE_CONTROL, 0x0); + SERIAL_WRITE(SERIAL_INTR_ENABLE, 0x0); + + { + unsigned int divisor; + + SERIAL_WRITE(SERIAL_LINE_CONTROL, 0x80); + + divisor = TITAN_SERIAL_BASE_BAUD / baud; + SERIAL_WRITE(SERIAL_DIVISOR_LSB, divisor & 0xff); + + SERIAL_WRITE(SERIAL_DIVISOR_MSB, (divisor & 0xff00) >> 8); + SERIAL_WRITE(SERIAL_LINE_CONTROL, 0x0); + } + + SERIAL_WRITE(SERIAL_DATA_FORMAT, data | parity | stop); +} + +static int remoteDebugInitialized = 0; + +unsigned char getDebugChar(void) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + debugInit(YOSEMITE_BAUD_115200, + YOSEMITE_DATA_8BIT, + YOSEMITE_PARITY_NONE, YOSEMITE_STOP_1BIT); + } + + while ((SERIAL_READ(SERIAL_LINE_STATUS) & 0x1) == 0); + return SERIAL_READ(SERIAL_RCV_BUFFER); +} + +int putDebugChar(unsigned char byte) +{ + if (!remoteDebugInitialized) { + remoteDebugInitialized = 1; + debugInit(YOSEMITE_BAUD_115200, + YOSEMITE_DATA_8BIT, + YOSEMITE_PARITY_NONE, YOSEMITE_STOP_1BIT); + } + + while ((SERIAL_READ(SERIAL_LINE_STATUS) & 0x20) == 0); + SERIAL_WRITE(SERIAL_SEND_BUFFER, byte); + + return 1; +} +#endif diff --git a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.c b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.c new file mode 100644 index 000000000000..416da22b3bf4 --- /dev/null +++ b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.c @@ -0,0 +1,188 @@ +/* + * Copyright (C) 2003 PMC-Sierra Inc. + * Author: Manish Lachwani (lachwani@pmc-sierra.com) + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * Detailed Description: + * + * This block implements the I2C interface to the slave devices like the + * Atmel 24C32 EEPROM and the MAX 1619 Sensors device. The I2C Master interface + * can be controlled by the SCMB block. And the SCMB block kicks in only when + * using the Ethernet Mode of operation and __not__ the SysAD mode + * + * The SCMB controls the two modes: MDIO and the I2C. The MDIO mode is used to + * communicate with the Quad-PHY from Marvel. The I2C is used to communicate + * with the I2C slave devices. It seems that the driver does not explicitly + * deal with the control of SDA and SCL serial lines. So, the driver will set + * the slave address, drive the command and then the data. The SCMB will then + * control the two serial lines as required. + * + * It seems the documents are very unclear abt this. Hence, I took some time + * out to write the desciption to have an idea of how the I2C can actually + * work. Currently, this Linux driver wont be integrated into the generic Linux + * I2C framework. And finally, the I2C interface is also known as the 2BI + * interface. 2BI means 2-bit interface referring to SDA and SCL serial lines + * respectively. + * + * - Manish Lachwani (12/09/2003) + */ + +#include "i2c-yosemite.h" + +/* + * Poll the I2C interface for the BUSY bit. + */ +static int titan_i2c_poll(void) +{ + int i = 0; + unsigned long val = 0; + + for (i = 0; i < TITAN_I2C_MAX_POLL; i++) { + val = TITAN_I2C_READ(TITAN_I2C_COMMAND); + + if (!(val & 0x8000)) + return 0; + } + + return TITAN_I2C_ERR_TIMEOUT; +} + +/* + * Execute the I2C command + */ +int titan_i2c_xfer(unsigned int slave_addr, titan_i2c_command * cmd, + int size, unsigned int *addr) +{ + int loop = 0, bytes, i; + unsigned int *write_data, data, *read_data; + unsigned long reg_val, val; + + write_data = cmd->data; + read_data = addr; + + TITAN_I2C_WRITE(TITAN_I2C_SLAVE_ADDRESS, slave_addr); + + if (cmd->type == TITAN_I2C_CMD_WRITE) + loop = cmd->write_size; + else + loop = size; + + while (loop > 0) { + if ((cmd->type == TITAN_I2C_CMD_WRITE) || + (cmd->type == TITAN_I2C_CMD_READ_WRITE)) { + + reg_val = TITAN_I2C_DATA; + for (i = 0; i < TITAN_I2C_MAX_WORDS_PER_RW; + ++i, write_data += 2, reg_val += 4) { + if (bytes < cmd->write_size) { + data = write_data[0]; + ++data; + } + + if (bytes < cmd->write_size) { + data = write_data[1]; + ++data; + } + + TITAN_I2C_WRITE(reg_val, data); + } + } + + TITAN_I2C_WRITE(TITAN_I2C_COMMAND, + (unsigned int) (cmd->type << 13)); + if (titan_i2c_poll() != TITAN_I2C_ERR_OK) + return TITAN_I2C_ERR_TIMEOUT; + + if ((cmd->type == TITAN_I2C_CMD_READ) || + (cmd->type == TITAN_I2C_CMD_READ_WRITE)) { + + reg_val = TITAN_I2C_DATA; + for (i = 0; i < TITAN_I2C_MAX_WORDS_PER_RW; + ++i, read_data += 2, reg_val += 4) { + data = TITAN_I2C_READ(reg_val); + + if (bytes < size) { + read_data[0] = data & 0xff; + ++bytes; + } + + if (bytes < size) { + read_data[1] = + ((data >> 8) & 0xff); + ++bytes; + } + } + } + + loop -= (TITAN_I2C_MAX_WORDS_PER_RW * 2); + } + + /* + * Read the Interrupt status and then return the appropriate error code + */ + + val = TITAN_I2C_READ(TITAN_I2C_INTERRUPTS); + if (val & 0x0020) + return TITAN_I2C_ERR_ARB_LOST; + + if (val & 0x0040) + return TITAN_I2C_ERR_NO_RESP; + + if (val & 0x0080) + return TITAN_I2C_ERR_DATA_COLLISION; + + return TITAN_I2C_ERR_OK; +} + +/* + * Init the I2C subsystem of the PMC-Sierra Yosemite board + */ +int titan_i2c_init(titan_i2c_config * config) +{ + unsigned int val; + + /* + * Reset the SCMB and program into the I2C mode + */ + TITAN_I2C_WRITE(TITAN_I2C_SCMB_CONTROL, 0xA000); + TITAN_I2C_WRITE(TITAN_I2C_SCMB_CONTROL, 0x2000); + + /* + * Configure the filtera and clka values + */ + val = TITAN_I2C_READ(TITAN_I2C_SCMB_CLOCK_A); + val |= ((val & ~(0xF000)) | ((config->filtera << 12) & 0xF000)); + val |= ((val & ~(0x03FF)) | (config->clka & 0x03FF)); + TITAN_I2C_WRITE(TITAN_I2C_SCMB_CLOCK_A, val); + + /* + * Configure the filterb and clkb values + */ + val = TITAN_I2C_READ(TITAN_I2C_SCMB_CLOCK_B); + val |= ((val & ~(0xF000)) | ((config->filterb << 12) & 0xF000)); + val |= ((val & ~(0x03FF)) | (config->clkb & 0x03FF)); + TITAN_I2C_WRITE(TITAN_I2C_SCMB_CLOCK_B, val); + + return TITAN_I2C_ERR_OK; +} diff --git a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h index 8b6e49c638d7..31c5523276fa 100644 --- a/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h +++ b/arch/mips/pmc-sierra/yosemite/i2c-yosemite.h @@ -31,7 +31,7 @@ /* Read and Write operations to the chip */ #define TITAN_I2C_BASE 0xbb000000 /* XXX Needs to change */ - + #define TITAN_I2C_WRITE(offset, data) \ *(volatile unsigned long *)(TITAN_I2C_BASE + offset) = data @@ -48,14 +48,14 @@ #define TITAN_I2C_MAX_POLL 100 /* Registers used for I2C work */ -#define TITAN_I2C_SCMB_CONTROL 0x0180 /* SCMB Control */ -#define TITAN_I2C_SCMB_CLOCK_A 0x0184 /* SCMB Clock A */ -#define TITAN_I2C_SCMB_CLOCK_B 0x0188 /* SCMB Clock B */ -#define TITAN_I2C_CONFIG 0x01A0 /* I2C Config */ -#define TITAN_I2C_COMMAND 0x01A4 /* I2C Command */ +#define TITAN_I2C_SCMB_CONTROL 0x0180 /* SCMB Control */ +#define TITAN_I2C_SCMB_CLOCK_A 0x0184 /* SCMB Clock A */ +#define TITAN_I2C_SCMB_CLOCK_B 0x0188 /* SCMB Clock B */ +#define TITAN_I2C_CONFIG 0x01A0 /* I2C Config */ +#define TITAN_I2C_COMMAND 0x01A4 /* I2C Command */ #define TITAN_I2C_SLAVE_ADDRESS 0x01A8 /* I2C Slave Address */ -#define TITAN_I2C_DATA 0x01AC /* I2C Data [15:0] */ -#define TITAN_I2C_INTERRUPTS 0x01BC /* I2C Interrupts */ +#define TITAN_I2C_DATA 0x01AC /* I2C Data [15:0] */ +#define TITAN_I2C_INTERRUPTS 0x01BC /* I2C Interrupts */ /* Error */ #define TITAN_I2C_ERR_ARB_LOST (-9220) @@ -66,31 +66,31 @@ /* I2C Command Type */ typedef enum { - TITAN_I2C_CMD_WRITE = 0, - TITAN_I2C_CMD_READ = 1, - TITAN_I2C_CMD_READ_WRITE = 2 + TITAN_I2C_CMD_WRITE = 0, + TITAN_I2C_CMD_READ = 1, + TITAN_I2C_CMD_READ_WRITE = 2 } titan_i2c_cmd_type; /* I2C structures */ typedef struct { - int filtera; /* Register 0x0184, bits 15 - 12*/ - int clka; /* Register 0x0184, bits 9 - 0 */ - int filterb; /* Register 0x0188, bits 15 - 12 */ - int clkb; /* Register 0x0188, bits 9 - 0 */ + int filtera; /* Register 0x0184, bits 15 - 12 */ + int clka; /* Register 0x0184, bits 9 - 0 */ + int filterb; /* Register 0x0188, bits 15 - 12 */ + int clkb; /* Register 0x0188, bits 9 - 0 */ } titan_i2c_config; /* I2C command type */ typedef struct { - titan_i2c_cmd_type type; /* Type of command */ - int num_arb; /* Register 0x01a0, bits 15 - 12 */ - int num_nak; /* Register 0x01a0, bits 11 - 8 */ - int addr_size; /* Register 0x01a0, bit 7 */ - int mst_code; /* Register 0x01a0, bits 6 - 4 */ - int arb_en; /* Register 0x01a0, bit 1 */ - int speed; /* Register 0x01a0, bit 0 */ - int slave_addr; /* Register 0x01a8 */ - int write_size; /* Register 0x01a4, bits 10 - 8 */ - unsigned int *data; /* Register 0x01ac */ + titan_i2c_cmd_type type; /* Type of command */ + int num_arb; /* Register 0x01a0, bits 15 - 12 */ + int num_nak; /* Register 0x01a0, bits 11 - 8 */ + int addr_size; /* Register 0x01a0, bit 7 */ + int mst_code; /* Register 0x01a0, bits 6 - 4 */ + int arb_en; /* Register 0x01a0, bit 1 */ + int speed; /* Register 0x01a0, bit 0 */ + int slave_addr; /* Register 0x01a8 */ + int write_size; /* Register 0x01a4, bits 10 - 8 */ + unsigned int *data; /* Register 0x01ac */ } titan_i2c_command; -#endif /* __I2C_YOSEMITE_H */ +#endif /* __I2C_YOSEMITE_H */ diff --git a/arch/mips/pmc-sierra/yosemite/irq-handler.S b/arch/mips/pmc-sierra/yosemite/irq-handler.S index a7caeec63be2..ebe2e64e275b 100644 --- a/arch/mips/pmc-sierra/yosemite/irq-handler.S +++ b/arch/mips/pmc-sierra/yosemite/irq-handler.S @@ -8,6 +8,10 @@ * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. + * + * Titan supports Hypertransport or PCI but not both. Hence, one interrupt + * line is shared between the PCI slot A and Hypertransport. This is the + * Processor INTB #0. */ #include <linux/config.h> @@ -17,109 +21,90 @@ #include <asm/regdef.h> #include <asm/stackframe.h> -/* - * IRQ router for the Titan board - */ - .align 5 NESTED(titan_handle_int, PT_SIZE, sp) SAVE_ALL CLI .set at + .set noreorder mfc0 t0, CP0_CAUSE mfc0 t2, CP0_STATUS and t0, t2 - - andi t1, t0, STATUSF_IP0 /* INTB0 hardware line */ + + andi t1, t0, STATUSF_IP2 /* INTB0 hardware line */ bnez t1, ll_pcia_irq /* 64-bit PCI */ - andi t1, t0, STATUSF_IP1 /* INTB1 hardware line */ + andi t1, t0, STATUSF_IP3 /* INTB1 hardware line */ bnez t1, ll_pcib_irq /* second 64-bit PCI slot */ - andi t1, t0, STATUSF_IP2 /* INTB2 hardware line */ + andi t1, t0, STATUSF_IP4 /* INTB2 hardware line */ bnez t1, ll_duart_irq /* UART */ - andi t1, t0, STATUSF_IP3 /* INTB3 hardware line*/ - bnez t1, ll_ht_smp_irq /* Hypertransport */ - andi t1, t0, STATUSF_IP5 /* INTB5 hardware line */ + andi t1, t0, STATUSF_IP5 /* SMP inter-core interrupts */ + bnez t1, ll_smp_irq + andi t1, t0, STATUSF_IP6 + bnez t1, ll_ht_irq /* Hypertransport */ + andi t1, t0, STATUSF_IP7 /* INTB5 hardware line */ bnez t1, ll_timer_irq /* Timer */ nop nop /* Extended interrupts */ - mfc0 t0, CPU_CAUSE - cfc0 t1, CP0_S1_INTCONTROL + mfc0 t0, CP0_CAUSE + cfc0 t1, CP0_S1_INTCONTROL - sll t2, t1, 8 - - and t0, t2 - srl t0, t0, 16 + sll t2, t1, 8 - - andi t1, t0, STATUSF_IP6 /* INTB6 hardware line */ - bnez t1, ll_phy0_irq /* Ethernet port 0 */ - andi t1, t0, STATUSF_IP7 /* INTB7 hardware line */ - bnez t1, ll_phy1_irq /* Ethernet port 1 */ - andi t1, t0, STATUSF_IP8 /* INTB8 hardware line */ - bnez t1, ll_phy2_irq /* Ethernet Port 2 */ - - nop - nop + and t0, t2 + srl t0, t0, 16 .set reorder - /* No handler */ j spurious_interrupt nop END(titan_handle_int) .align 5 -/* Individual Handlers */ - ll_pcia_irq: - li a0, 1 - move a2, sp + li a0, 2 + move a1, sp +#ifdef CONFIG_HYPERTRANSPORT + jal ll_ht_smp_irq_handler +#else jal do_IRQ +#endif j ret_from_irq ll_pcib_irq: - li a0, 2 - move a1, sp - jal do_IRQ - j ret_from_irq - -ll_duart_irq: li a0, 3 move a1, sp jal do_IRQ j ret_from_irq -ll_ht_irq: +ll_duart_irq: li a0, 4 move a1, sp - jal ll_ht_smp_irq_handler /* Detailed HT & SMP IRQ handling */ + jal do_IRQ j ret_from_irq -ll_timer_irq: +ll_smp_irq: li a0, 5 move a1, sp +#ifdef CONFIG_SMP + jal jaguar_mailbox_irq +#else jal do_IRQ +#endif j ret_from_irq -ll_phy0_irq: +ll_ht_irq: li a0, 6 move a1, sp - jal do_IRQ - j ret_from_irq - -ll_phy1_irq: - li a0, 7 - move a1, sp - jal do_IRQ + jal ll_ht_smp_irq_handler j ret_from_irq -ll_phy2_irq: - li a0, 8 +ll_timer_irq: + li a0, 7 move a1, sp jal do_IRQ j ret_from_irq diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c index 294290f8ae4c..e8b7ed63eaa0 100644 --- a/arch/mips/pmc-sierra/yosemite/irq.c +++ b/arch/mips/pmc-sierra/yosemite/irq.c @@ -41,207 +41,116 @@ #include <asm/bootinfo.h> #include <asm/io.h> #include <asm/irq.h> +#include <asm/irq_cpu.h> #include <asm/mipsregs.h> #include <asm/system.h> +#include <asm/titan_dep.h> /* Hypertransport specific */ -#define IRQ_STATUS_REG_CPU0 0xbb001b30 /* INT# 3 status register on CPU 0*/ -#define IRQ_STATUS_REG_CPU1 0xbb002b30 /* INT# 3 status register on CPU 1*/ -#define IRQ_ACK_BITS 0x00000000 /* Ack bits */ -#define IRQ_CLEAR_REG_CPU0 0xbb002b3c /* IRQ clear register on CPU 0*/ -#define IRQ_CLEAR_REG_CPU0 0xbb002b3c /* IRQ clear register on CPU 1*/ +#define IRQ_ACK_BITS 0x00000000 /* Ack bits */ -#define HYPERTRANSPORT_EOI 0xbb0006E0 /* End of Interrupt */ -#define HYPERTRANSPORT_INTA 0x78 /* INTA# */ -#define HYPERTRANSPORT_INTB 0x79 /* INTB# */ -#define HYPERTRANSPORT_INTC 0x7a /* INTC# */ -#define HYPERTRANSPORT_INTD 0x7b /* INTD# */ - -#define read_32bit_cp0_set1_register(source) \ -({ int __res; \ - __asm__ __volatile__( \ - ".set\tpush\n\t" \ - ".set\treorder\n\t" \ - "cfc0\t%0,"STR(source)"\n\t" \ - ".set\tpop" \ - : "=r" (__res)); \ - __res;}) - -#define write_32bit_cp0_set1_register(register,value) \ - __asm__ __volatile__( \ - "ctc0\t%0,"STR(register)"\n\t" \ - "nop" \ - : : "r" (value)); - -static spinlock_t irq_lock = SPIN_LOCK_UNLOCKED; - -/* Function for careful CP0 interrupt mask access */ -static inline void modify_cp0_intmask(unsigned clr_mask_in, unsigned set_mask_in) -{ - unsigned long status; - unsigned clr_mask; - unsigned set_mask; - - /* do the low 8 bits first */ - clr_mask = 0xff & clr_mask_in; - set_mask = 0xff & set_mask_in; - status = read_c0_status(); - status &= ~((clr_mask & 0xFF) << 8); - status |= (set_mask & 0xFF) << 8 | 0x0000FF00; - write_c0_status(status); - - /* do the high 8 bits */ - clr_mask = 0xff & (clr_mask_in >> 8); - set_mask = 0xff & (set_mask_in >> 8); - status = read_32bit_cp0_set1_register(CP0_S1_INTCONTROL); - status &= ~((clr_mask & 0xFF) << 8); - status |= (set_mask & 0xFF) << 8; - write_32bit_cp0_set1_register(CP0_S1_INTCONTROL, status); -} - -static inline void mask_irq(unsigned int irq) -{ - modify_cp0_intmask(irq, 0); -} - -static inline void unmask_irq(unsigned int irq) -{ - modify_cp0_intmask(0, irq); -} - -static void enable_rm9000_irq(unsigned int irq) -{ - unsigned long flags; - - spin_lock_irqsave(&irq_lock, flags); - unmask_irq(1 << (irq-1)); - spin_unlock_irqrestore(&irq_lock, flags); -} - -static unsigned int startup_rm9000_irq(unsigned int irq) -{ - enable_rm9000_irq(irq); - - return 0; /* never anything pending */ -} - -static void disable_rm9000_irq(unsigned int irq) -{ - unsigned long flags; - - spin_lock_irqsave(&irq_lock, flags); - mask_irq(1 << (irq-1)); - spin_unlock_irqrestore(&irq_lock, flags); -} - -#define shutdown_rm9000_irq disable_rm9000_irq - -static void mask_and_ack_rm9000_irq(unsigned int irq) -{ - mask_irq(1 << (irq-1)); -} - -static void end_rm9000_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - unmask_irq(1 << (irq-1)); -} - -static struct hw_interrupt_type rm9000_hpcdma_irq_type = { - "RM9000", - startup_rm9000_irq, - shutdown_rm9000_irq, - enable_rm9000_irq, - disable_rm9000_irq, - mask_and_ack_rm9000_irq, - end_rm9000_irq, - NULL -}; +#define HYPERTRANSPORT_INTA 0x78 /* INTA# */ +#define HYPERTRANSPORT_INTB 0x79 /* INTB# */ +#define HYPERTRANSPORT_INTC 0x7a /* INTC# */ +#define HYPERTRANSPORT_INTD 0x7b /* INTD# */ extern asmlinkage void titan_handle_int(void); extern void jaguar_mailbox_irq(struct pt_regs *); /* - * Handle hypertransport & SMP interrupts. The interrupt lines are scarce. For interprocessor - * interrupts, the best thing to do is to use the INTMSG register. We use the same external - * interrupt line, i.e. INTB3 and monitor another status bit + * Handle hypertransport & SMP interrupts. The interrupt lines are scarce. + * For interprocessor interrupts, the best thing to do is to use the INTMSG + * register. We use the same external interrupt line, i.e. INTB3 and monitor + * another status bit */ asmlinkage void ll_ht_smp_irq_handler(int irq, struct pt_regs *regs) { - u32 status; - status = *(volatile uint32_t *)(IRQ_STATUS_REG_CPU0); + u32 status = OCD_READ(RM9000x2_OCD_INTP0STATUS4); /* Ack all the bits that correspond to the interrupt sources */ if (status != 0) - *(volatile uint32_t *)(IRQ_STATUS_REG_CPU0) = IRQ_ACK_BITS; + OCD_WRITE(RM9000x2_OCD_INTP0STATUS4, IRQ_ACK_BITS); - status = *(volatile uint32_t *)(IRQ_STATUS_REG_CPU1); + status = OCD_READ(RM9000x2_OCD_INTP1STATUS4); if (status != 0) - *(volatile uint32_t *)(IRQ_STATUS_REG_CPU1) = IRQ_ACK_BITS; + OCD_WRITE(RM9000x2_OCD_INTP1STATUS4, IRQ_ACK_BITS); -#ifdef CONFIG_SMP - if (status == 0x2) { - /* This is an SMP IPI sent from one core to another */ - jaguar_mailbox_irq(regs); - goto done; - } -#endif - #ifdef CONFIG_HT_LEVEL_TRIGGER - /* - * Level Trigger Mode only. Send the HT EOI message back to the source. - */ - switch (status) { - case 0x1000000: - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTA; - break; - case 0x2000000: - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTB; - break; - case 0x4000000: - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTC; - break; - case 0x8000000: - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTD; - break; - case 0x0000001: - /* PLX */ - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = 0x20; - *(volatile uint32_t *)(IRQ_CLEAR_REG) = IRQ_ACK_BITS; - break; - case 0xf000000: - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTA; - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTB; - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTC; - *(volatile uint32_t *)(HYPERTRANSPORT_EOI) = HYPERTRANSPORT_INTD; - break; - } + /* + * Level Trigger Mode only. Send the HT EOI message back to the source. + */ + switch (status) { + case 0x1000000: + OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTA); + break; + case 0x2000000: + OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTB); + break; + case 0x4000000: + OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTC); + break; + case 0x8000000: + OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTD); + break; + case 0x0000001: + /* PLX */ + OCD_WRITE(RM9000x2_OCD_HTEOI, 0x20); + OCD_WRITE(IRQ_CLEAR_REG, IRQ_ACK_BITS); + break; + case 0xf000000: + OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTA); + OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTB); + OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTC); + OCD_WRITE(RM9000x2_OCD_HTEOI, HYPERTRANSPORT_INTD); + break; + } #endif /* CONFIG_HT_LEVEL_TRIGGER */ -done: - if (status != 0x2) - /* Not for SMP */ - do_IRQ(irq, regs); + do_IRQ(irq, regs); } +#ifdef CONFIG_KGDB +extern void init_second_port(void); +extern void breakpoint(void); +extern void set_debug_traps(void); +#endif + /* * Initialize the next level interrupt handler */ void __init init_IRQ(void) { - int i; - - clear_c0_status(ST0_IM | ST0_BEV); - __cli(); + clear_c0_status(ST0_IM); set_except_vector(0, titan_handle_int); init_generic_irq(); + mips_cpu_irq_init(0); + rm7k_cpu_irq_init(8); + +#ifdef CONFIG_KGDB + /* At this point, initialize the second serial port */ + init_second_port(); + printk("Start kgdb ... \n"); + set_debug_traps(); + breakpoint(); +#endif - for (i = 0; i < 13; i++) { - irq_desc[i].status = IRQ_DISABLED; - irq_desc[i].action = 0; - irq_desc[i].depth = 1; - irq_desc[i].handler = &rm9000_hpcdma_irq_type; - } +#ifdef CONFIG_GDB_CONSOLE + register_gdb_console(); +#endif } +#ifdef CONFIG_KGDB +/* + * The 16550 DUART has two ports, but is allocated one IRQ + * for the serial console. Hence, a generic framework for + * serial IRQ routing in place. Currently, just calls the + * do_IRQ fuction. But, going in the future, need to check + * DUART registers for channel A and B, then decide the + * appropriate action + */ +asmlinkage void yosemite_kgdb_irq(int irq, struct pt_regs *regs) +{ + do_IRQ(irq, regs); +} +#endif diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c index 70f68b7c0552..5b4ef33acf22 100644 --- a/arch/mips/pmc-sierra/yosemite/prom.c +++ b/arch/mips/pmc-sierra/yosemite/prom.c @@ -7,55 +7,44 @@ * Copyright (C) 2003 PMC-Sierra Inc. * Author: Manish Lachwani (lachwani@pmc-sierra.com) */ - +#include <linux/init.h> #include <linux/sched.h> #include <linux/mm.h> +#include <linux/delay.h> +#include <linux/smp.h> + #include <asm/io.h> #include <asm/pgtable.h> #include <asm/processor.h> #include <asm/reboot.h> #include <asm/system.h> -#include <linux/delay.h> -#include <linux/smp.h> #include <asm/bootinfo.h> +#include <asm/pmon.h> #include "setup.h" -/* Call Vectors */ -struct callvectors { - int (*open) (char*, int, int); - int (*close) (int); - int (*read) (int, void*, int); - int (*write) (int, void*, int); - off_t (*lseek) (int, off_t, int); - int (*printf) (const char*, ...); - void (*cacheflush) (void); - char* (*gets) (char*); -}; - -struct callvectors* debug_vectors; +struct callvectors *debug_vectors; extern unsigned long yosemite_base; extern unsigned long cpu_clock; -unsigned char titan_ge_mac_addr_base[6]; const char *get_system_type(void) { - return "PMC-Sierra Yosemite"; + return "PMC-Sierra Yosemite"; } -static void prom_cpu0_exit(void) +static void prom_cpu0_exit(void *arg) { - void *nvram = YOSEMITE_NVRAM_BASE_ADDR; - + void *nvram = (void *) YOSEMITE_NVRAM_BASE_ADDR; + /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ - writeb(0x84, nvram + 0xff7); + writeb(0x84, nvram + 0xff7); - /* wait for the watchdog to go off */ - mdelay(100+(1000/16)); + /* wait for the watchdog to go off */ + mdelay(100 + (1000 / 16)); - /* if the watchdog fails for some reason, let people know */ - printk(KERN_NOTICE "Watchdog reset failed\n"); + /* if the watchdog fails for some reason, let people know */ + printk(KERN_NOTICE "Watchdog reset failed\n"); } /* @@ -68,78 +57,73 @@ static void prom_exit(void) /* CPU 1 */ smp_call_function(prom_cpu0_exit, NULL, 1, 1); #endif - prom_cpu0_exit; -} - -/* - * Get the MAC address from the EEPROM using the I2C protocol - */ -void get_mac_address(char dest[6]) -{ - /* Use the I2C command code in the i2c-yosemite */ + prom_cpu0_exit(NULL); } /* - * Halt the system + * Halt the system */ static void prom_halt(void) { printk(KERN_NOTICE "\n** You can safely turn off the power\n"); while (1) - __asm__(".set\tmips3\n\t" - "wait\n\t" - ".set\tmips0"); + __asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0"); } /* * Init routine which accepts the variables from PMON */ -__init prom_init(int argc, char **arg, char **env, struct callvectors *cv) +void __init prom_init(void) { - int i = 0; + int argc = fw_arg0; + char **arg = (char **) fw_arg1; + char **env = (char **) fw_arg2; + struct callvectors *cv = (struct callvectors *) fw_arg3; + int i = 0; /* Callbacks for halt, restart */ - _machine_restart = (void (*)(char *))prom_exit; + _machine_restart = (void (*)(char *)) prom_exit; _machine_halt = prom_halt; _machine_power_off = prom_halt; -#ifdef CONFIG_MIPS64 - - /* Do nothing for the 64-bit for now. Just implement for the 32-bit */ - -#else /* CONFIG_MIPS64 */ +#ifdef CONFIG_MIPS32 debug_vectors = cv; arcs_cmdline[0] = '\0'; /* Get the boot parameters */ for (i = 1; i < argc; i++) { - if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >= sizeof(arcs_cmdline)) - break; + if (strlen(arcs_cmdline) + strlen(arg[i] + 1) >= + sizeof(arcs_cmdline)) + break; strcat(arcs_cmdline, arg[i]); strcat(arcs_cmdline, " "); } while (*env) { - if (strncmp("ocd_base", *env, strlen("ocd_base")) == 0) - yosemite_base = simple_strtol(*env + strlen("ocd_base="), - NULL, 16); - - if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) - cpu_clock = simple_strtol(*env + strlen("cpuclock="), - NULL, 10); - + if (strncmp("ocd_base", *env, strlen("ocd_base")) == 0) + yosemite_base = + simple_strtol(*env + strlen("ocd_base="), NULL, + 16); + + if (strncmp("cpuclock", *env, strlen("cpuclock")) == 0) + cpu_clock = + simple_strtol(*env + strlen("cpuclock="), NULL, + 10); + env++; } +#endif /* CONFIG_MIPS32 */ + +#ifdef CONFIG_MIPS64 + + /* Do nothing for the 64-bit for now. Just implement for the 32-bit */ + #endif /* CONFIG_MIPS64 */ mips_machgroup = MACH_GROUP_TITAN; mips_machtype = MACH_TITAN_YOSEMITE; - - get_mac_address(titan_ge_mac_addr_base); - - debug_vectors->printf("Booting Linux kernel...\n"); } void __init prom_free_prom_memory(void) @@ -149,41 +133,3 @@ void __init prom_free_prom_memory(void) void __init prom_fixup_mem_map(unsigned long start, unsigned long end) { } - -extern void asmlinkage smp_bootstrap(void); - -/* - * SMP support - */ -int prom_setup_smp(void) -{ - int num_cpus = 2; - - /* - * We know that the RM9000 on the Jaguar ATX board has 2 cores. Hence, this - * can be hardcoded for now. - */ - return num_cpus; -} - -int prom_boot_secondary(int cpu, unsigned long sp, unsigned long gp) -{ - /* Clear the semaphore */ - *(volatile uint32_t *)(0xbb000a68) = 0x80000000; - - return 1; -} - -void prom_init_secondary(void) -{ - clear_c0_config(CONF_CM_CMASK); - set_c0_config(0x2); - - clear_c0_status(ST0_IM); - set_c0_status(0x1ffff); -} - -void prom_smp_finish(void) -{ -} - diff --git a/arch/mips/pmc-sierra/yosemite/py-console.c b/arch/mips/pmc-sierra/yosemite/py-console.c new file mode 100644 index 000000000000..22c336f9a596 --- /dev/null +++ b/arch/mips/pmc-sierra/yosemite/py-console.c @@ -0,0 +1,130 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2001, 2002, 2004 Ralf Baechle + */ +#include <linux/init.h> +#include <linux/console.h> +#include <linux/kdev_t.h> +#include <linux/major.h> +#include <linux/termios.h> +#include <linux/sched.h> +#include <linux/tty.h> + +#include <linux/serial.h> +#include <linux/serial_core.h> +#include <asm/serial.h> +#include <asm/io.h> + +/* SUPERIO uart register map */ +struct yo_uartregs { + union { + volatile u8 rbr; /* read only, DLAB == 0 */ + volatile u8 thr; /* write only, DLAB == 0 */ + volatile u8 dll; /* DLAB == 1 */ + } u1; + union { + volatile u8 ier; /* DLAB == 0 */ + volatile u8 dlm; /* DLAB == 1 */ + } u2; + union { + volatile u8 iir; /* read only */ + volatile u8 fcr; /* write only */ + } u3; + volatile u8 iu_lcr; + volatile u8 iu_mcr; + volatile u8 iu_lsr; + volatile u8 iu_msr; + volatile u8 iu_scr; +} yo_uregs_t; + +#define iu_rbr u1.rbr +#define iu_thr u1.thr +#define iu_dll u1.dll +#define iu_ier u2.ier +#define iu_dlm u2.dlm +#define iu_iir u3.iir +#define iu_fcr u3.fcr + +extern unsigned long uart_base; + +#define IO_BASE_64 0x9000000000000000ULL + +static unsigned char readb_outer_space(unsigned long phys) +{ + unsigned long long vaddr = IO_BASE_64 | phys; + unsigned char res; + unsigned int sr; + + sr = read_c0_status(); + write_c0_status((sr | ST0_KX) & ~ ST0_IE); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + + __asm__ __volatile__ ( + " .set mips3 \n" + " ld %0, (%0) \n" + " lbu %0, (%0) \n" + " .set mips0 \n" + : "=r" (res) + : "0" (&vaddr)); + + write_c0_status(sr); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + + return res; +} + +static void writeb_outer_space(unsigned long phys, unsigned char c) +{ + unsigned long long vaddr = IO_BASE_64 | phys; + unsigned long tmp; + unsigned int sr; + + sr = read_c0_status(); + write_c0_status((sr | ST0_KX) & ~ ST0_IE); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + + __asm__ __volatile__ ( + " .set mips3 \n" + " ld %0, (%1) \n" + " sb %2, (%0) \n" + " .set mips0 \n" + : "=r" (tmp) + : "r" (&vaddr), "r" (c)); + + write_c0_status(sr); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); + __asm__("sll $0, $0, 2\n"); +} + +static inline struct yo_uartregs *console_uart(void) +{ + return (struct yo_uartregs *) (uart_base + 8); +} + +void prom_putchar(char c) +{ + unsigned long lsr = 0xfd000008UL + offsetof(struct yo_uartregs, iu_lsr); + unsigned long thr = 0xfd000008UL + offsetof(struct yo_uartregs, iu_thr); + + while ((readb_outer_space(lsr) & 0x20) == 0); + writeb_outer_space(thr, c); +} + +char __init prom_getchar(void) +{ + return 0; +} diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c index 43795a8415df..dfa9cd0ed557 100644 --- a/arch/mips/pmc-sierra/yosemite/setup.c +++ b/arch/mips/pmc-sierra/yosemite/setup.c @@ -1,6 +1,4 @@ /* - * arch/mips/pmc-sierra/yosemite/setup.c - * * Copyright (C) 2003 PMC-Sierra Inc. * Author: Manish Lachwani (lachwani@pmc-sierra.com) * @@ -24,19 +22,18 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ - +#include <linux/bcd.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/types.h> -#include <linux/mc146818rtc.h> #include <linux/mm.h> +#include <linux/bootmem.h> #include <linux/swap.h> #include <linux/ioport.h> #include <linux/sched.h> #include <linux/interrupt.h> -#include <linux/pci.h> #include <linux/timex.h> -#include <linux/vmalloc.h> + #include <asm/time.h> #include <asm/bootinfo.h> #include <asm/page.h> @@ -46,36 +43,46 @@ #include <asm/processor.h> #include <asm/ptrace.h> #include <asm/reboot.h> -#include <linux/version.h> -#include <linux/bootmem.h> -#include <linux/blk.h> +#include <asm/pci_channel.h> +#include <asm/serial.h> +#include <linux/termios.h> +#include <linux/tty.h> +#include <linux/serial.h> +#include <linux/serial_core.h> +#include <asm/titan_dep.h> #include "setup.h" +unsigned char titan_ge_mac_addr_base[6] = { + 0x00, 0x03, 0xcc, 0x1d, 0x22, 0x00 +}; + unsigned long cpu_clock; unsigned long yosemite_base; -void __init bus_error_init(void) -{ - /* Do nothing */ +void __init bus_error_init(void) +{ + /* Do nothing */ } unsigned long m48t37y_get_time(void) { - unsigned char *rtc_base = YOSEMITE_RTC_BASE; - unsigned int year, month, day, hour, min, sec; + //unsigned char *rtc_base = (unsigned char *) YOSEMITE_RTC_BASE; + unsigned char *rtc_base = (unsigned char *) 0xfc000000UL; + unsigned int year, month, day, hour, min, sec; +return; /* Stop the update to the time */ rtc_base[0x7ff8] = 0x40; - year = CONV_BCD_TO_BIN(rtc_base[0x7fff]); - year += CONV_BCD_TO_BIN(rtc_base[0x7fff1]) * 100; + year = BCD2BIN(rtc_base[0x7fff]); + year += BCD2BIN(rtc_base[0x7fff1]) * 100; - month = CONV_BCD_TO_BIN(rtc_base[0x7ffe]); - day = CONV_BCD_TO_BIN(rtc_base[0x7ffd]); - hour = CONV_BCD_TO_BIN(rtc_base[0x7ffb]); - min = CONV_BCD_TO_BIN(rtc_base[0x7ffa]); - sec = CONV_BCD_TO_BIN(rtc_base[0x7ff9]); + month = BCD2BIN(rtc_base[0x7ffe]); + day = BCD2BIN(rtc_base[0x7ffd]); + hour = BCD2BIN(rtc_base[0x7ffb]); + min = BCD2BIN(rtc_base[0x7ffa]); + sec = BCD2BIN(rtc_base[0x7ff9]); /* Start the update to the time again */ rtc_base[0x7ff8] = 0x00; @@ -85,83 +92,119 @@ unsigned long m48t37y_get_time(void) int m48t37y_set_time(unsigned long sec) { - unsigned char *rtc_base = YOSEMITE_RTC_BASE; - unsigned int year, month, day, hour, min, sec; - - struct rtc_time tm; + unsigned char *rtc_base = (unsigned char *) YOSEMITE_RTC_BASE; + struct rtc_time tm; +return; - /* convert to a more useful format -- note months count from 0 */ - to_tm(sec, &tm); - tm.tm_mon += 1; + /* convert to a more useful format -- note months count from 0 */ + to_tm(sec, &tm); + tm.tm_mon += 1; - /* enable writing */ - rtc_base[0x7ff8] = 0x80; + /* enable writing */ + rtc_base[0x7ff8] = 0x80; - /* year */ - rtc_base[0x7fff] = CONV_BIN_TO_BCD(tm.tm_year % 100); - rtc_base[0x7ff1] = CONV_BIN_TO_BCD(tm.tm_year / 100); + /* year */ + rtc_base[0x7fff] = BIN2BCD(tm.tm_year % 100); + rtc_base[0x7ff1] = BIN2BCD(tm.tm_year / 100); - /* month */ - rtc_base[0x7ffe] = CONV_BIN_TO_BCD(tm.tm_mon); + /* month */ + rtc_base[0x7ffe] = BIN2BCD(tm.tm_mon); - /* day */ - rtc_base[0x7ffd] = CONV_BIN_TO_BCD(tm.tm_mday); + /* day */ + rtc_base[0x7ffd] = BIN2BCD(tm.tm_mday); - /* hour/min/sec */ - rtc_base[0x7ffb] = CONV_BIN_TO_BCD(tm.tm_hour); - rtc_base[0x7ffa] = CONV_BIN_TO_BCD(tm.tm_min); - rtc_base[0x7ff9] = CONV_BIN_TO_BCD(tm.tm_sec); + /* hour/min/sec */ + rtc_base[0x7ffb] = BIN2BCD(tm.tm_hour); + rtc_base[0x7ffa] = BIN2BCD(tm.tm_min); + rtc_base[0x7ff9] = BIN2BCD(tm.tm_sec); - /* day of week -- not really used, but let's keep it up-to-date */ - rtc_base[0x7ffc] = CONV_BIN_TO_BCD(tm.tm_wday + 1); + /* day of week -- not really used, but let's keep it up-to-date */ + rtc_base[0x7ffc] = BIN2BCD(tm.tm_wday + 1); - /* disable writing */ - rtc_base[0x7ff8] = 0x00; + /* disable writing */ + rtc_base[0x7ff8] = 0x00; - return 0; + return 0; } void yosemite_timer_setup(struct irqaction *irq) { - setup_irq(6, irq); + setup_irq(7, irq); } void yosemite_time_init(void) { - mips_counter_frequency = cpu_clock / 2; board_timer_setup = yosemite_timer_setup; + mips_hpt_frequency = cpu_clock / 2; rtc_get_time = m48t37y_get_time; rtc_set_time = m48t37y_set_time; } +unsigned long uart_base = 0xfd000000L; + +/* No other usable initialization hook than this ... */ +extern void (*late_time_init)(void); + +unsigned long ocd_base; + +EXPORT_SYMBOL(ocd_base); + +/* + * Common setup before any secondaries are started + */ + +#define TITAN_UART_CLK 3686400 +#define TITAN_SERIAL_BASE_BAUD (TITAN_UART_CLK / 16) +#define TITAN_SERIAL_IRQ 4 +#define TITAN_SERIAL_BASE 0xfd000008UL + +static void __init py_map_ocd(void) +{ + struct uart_port up; + + /* + * Not specifically interrupt stuff but in case of SMP core_send_ipi + * needs this first so I'm mapping it here ... + */ + ocd_base = (unsigned long) ioremap(OCD_BASE, OCD_SIZE); + if (!ocd_base) + panic("Mapping OCD failed - game over. Your score is 0."); + + /* + * Register to interrupt zero because we share the interrupt with + * the serial driver which we don't properly support yet. + */ + memset(&up, 0, sizeof(up)); + up.membase = (unsigned char *) ioremap(TITAN_SERIAL_BASE, 8); + up.irq = TITAN_SERIAL_IRQ; + up.uartclk = TITAN_UART_CLK; + up.regshift = 0; + up.iotype = UPIO_MEM; + up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; + up.line = 0; + + if (early_serial_setup(&up)) + printk(KERN_ERR "Early serial init of port 0 failed\n"); +} + static int __init pmc_yosemite_setup(void) { - unsigned long val = 0; + extern void pmon_smp_bootstrap(void); - printk("PMC-Sierra Yosemite Board Setup \n"); board_time_init = yosemite_time_init; + late_time_init = py_map_ocd; /* Add memory regions */ add_memory_region(0x00000000, 0x10000000, BOOT_MEM_RAM); - add_memory_region(0x10000000, 0x10000000, BOOT_MEM_RAM); - - /* Setup the HT controller */ - val = *(volatile uint32_t *)(HYPERTRANSPORT_CONFIG_REG); - val |= HYPERTRANSPORT_ENABLE; - *(volatile uint32_t *)(HYPERTRANSPORT_CONFIG_REG) = val; - - /* Set the BAR. Shifted mode */ - *(volatile uint32_t *)(HYPERTRANSPORT_BAR0_REG) = HYPERTRANSPORT_BAR0_ADDR; - *(volatile uint32_t *)(HYPERTRANSPORT_SIZE0_REG) = HYPERTRANSPORT_SIZE0; -#ifdef CONFIG_PCI - ioport_resource.start = 0xe0000000; - ioport_resource.end = 0xe0000000 + 0x20000000 - 1; - iomem_resource.start = 0xc0000000; - iomem_resource.end = 0xc0000000 + 0x20000000 - 1; +#if 0 /* XXX Crash ... */ + OCD_WRITE(RM9000x2_OCD_HTSC, + OCD_READ(RM9000x2_OCD_HTSC) | HYPERTRANSPORT_ENABLE); - pci_scan_bus(0, &titan_pci_ops, NULL); + /* Set the BAR. Shifted mode */ + OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR); + OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0); #endif return 0; diff --git a/arch/mips/pmc-sierra/yosemite/setup.h b/arch/mips/pmc-sierra/yosemite/setup.h index d8193e11b69f..b3e24b4e6c12 100644 --- a/arch/mips/pmc-sierra/yosemite/setup.h +++ b/arch/mips/pmc-sierra/yosemite/setup.h @@ -9,27 +9,13 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ - #ifndef __SETUP_H__ #define __SETUP_H__ -/* Real Time Clock base */ -#define YOSEMITE_RTC_BASE -#define CONV_BCD_TO_BIN(val) (((val) & 0xf) + (((val) >> 4) * 10)) -#define CONV_BIN_TO_BCD(val) (((val) % 10) + (((val) / 10) << 4)) - /* NVRAM Base */ #define YOSEMITE_NVRAM_BASE_ADDR 0xbb000678 /* XXX Need change */ #define YOSEMITE_RTC_BASE 0xbb000679 /* XXX Need change */ -/* - * Hypertransport Specific - */ -#define HYPERTRANSPORT_CONFIG_REG 0xbb000604 -#define HYPERTRANSPORT_BAR0_REG 0xbb000610 -#define HYPERTRANSPORT_SIZE0_REG 0xbb000688 -#define HYPERTRANSPORT_BAR0_ATTR_REG 0xbb000680 - #define HYPERTRANSPORT_BAR0_ADDR 0x00000006 #define HYPERTRANSPORT_SIZE0 0x0fffffff #define HYPERTRANSPORT_BAR0_ATTR 0x00002000 @@ -37,11 +23,9 @@ #define HYPERTRANSPORT_ENABLE 0x6 /* - * EEPROM Size + * EEPROM Size */ #define TITAN_ATMEL_24C32_SIZE 32768 #define TITAN_ATMEL_24C64_SIZE 65536 - #endif /* __SETUP_H__ */ - diff --git a/arch/mips/ramdisk/Makefile b/arch/mips/ramdisk/Makefile index 5c75968273f2..66cce75c5845 100644 --- a/arch/mips/ramdisk/Makefile +++ b/arch/mips/ramdisk/Makefile @@ -12,7 +12,7 @@ img := $(subst $(src)//,/,$(src)/$(img)) quiet_cmd_ramdisk = LD $@ define cmd_ramdisk - $(LD) -T $(src)/ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img) + $(LD) $(LDFLAGS) -T $(src)/ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img) endef $(obj)/ramdisk.o: $(img) $(src)/ld.script diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c index 352a8495cc23..fe7f546d3283 100644 --- a/arch/mips/sgi-ip22/ip22-setup.c +++ b/arch/mips/sgi-ip22/ip22-setup.c @@ -10,6 +10,7 @@ #include <linux/kernel.h> #include <linux/kdev_t.h> #include <linux/types.h> +#include <linux/module.h> #include <linux/console.h> #include <linux/sched.h> #include <linux/tty.h> @@ -54,6 +55,8 @@ void ip22_do_break(void) ArcEnterInteractiveMode(); } +EXPORT_SYMBOL(ip22_do_break); + extern void ip22_be_init(void) __init; extern void ip22_time_init(void) __init; diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 5091454ca197..75846d6e8154 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -123,9 +123,9 @@ extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id, struct pt_regs *regs); struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT, - 0, "CRIME memory error", NULL, NULL }; + CPU_MASK_NONE, "CRIME memory error", NULL, NULL }; struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT, - 0, "CRIME CPU error", NULL, NULL }; + CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; extern void ip32_handle_int(void); diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index e2216ee9ba49..ddbe64b2d371 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -279,7 +279,7 @@ static irqreturn_t sb1250_dummy_handler(int irq, void *dev_id, static struct irqaction sb1250_dummy_action = { .handler = sb1250_dummy_handler, .flags = 0, - .mask = 0, + .mask = CPU_MASK_NONE, .name = "sb1250-private", .next = NULL, .dev_id = 0 diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index 14591d16e41a..bf59409eea36 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c @@ -172,7 +172,7 @@ static struct hw_interrupt_type tx4927_irq_pic_type = { .set_affinity = NULL }; -#define TX4927_PIC_ACTION(s) { no_action, 0, 0, s, NULL, NULL } +#define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } static struct irqaction tx4927_irq_pic_action = TX4927_PIC_ACTION(TX4927_PIC_NAME); diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index f4fe81eb7a28..930304585443 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c @@ -337,8 +337,8 @@ int toshiba_rbtx4927_irq_nested(int sw_irq) return (sw_irq); } -//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, 0, s, NULL, NULL } -#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, SA_SHIRQ, 0, s, NULL, NULL } +//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } +#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, SA_SHIRQ, CPU_MASK_NONE, s, NULL, NULL } static struct irqaction toshiba_rbtx4927_irq_ioc_action = TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME); #ifdef CONFIG_TOSHIBA_FPCIB0 diff --git a/arch/mips/vr4181/common/irq.c b/arch/mips/vr4181/common/irq.c index 7b5a1a4f313c..4a2458f8bc8b 100644 --- a/arch/mips/vr4181/common/irq.c +++ b/arch/mips/vr4181/common/irq.c @@ -180,9 +180,9 @@ extern int setup_irq(unsigned int irq, struct irqaction *irqaction); extern void mips_cpu_irq_init(u32 irq_base); static struct irqaction cascade = - { no_action, SA_INTERRUPT, 0, "cascade", NULL, NULL }; + { no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade", NULL, NULL }; static struct irqaction reserved = - { no_action, SA_INTERRUPT, 0, "cascade", NULL, NULL }; + { no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade", NULL, NULL }; void __init init_IRQ(void) { diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c index 2601296e2773..3613999a189a 100644 --- a/arch/mips/vr41xx/common/bcu.c +++ b/arch/mips/vr41xx/common/bcu.c @@ -1,34 +1,23 @@ /* - * FILE NAME - * arch/mips/vr41xx/common/bcu.c + * bcu.c, Bus Control Unit routines for the NEC VR4100 series. * - * BRIEF MODULE DESCRIPTION - * Bus Control Unit routines for the NEC VR4100 series. + * Copyright (C) 2002 MontaVista Software Inc. + * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> + * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Copyright 2002 MontaVista Software Inc. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ /* * Changes: @@ -40,12 +29,16 @@ * - Added support for NEC VR4133. */ #include <linux/init.h> +#include <linux/ioport.h> #include <linux/smp.h> #include <linux/types.h> #include <asm/cpu.h> #include <asm/io.h> +#define IO_MEM_RESOURCE_START 0UL +#define IO_MEM_RESOURCE_END 0x1fffffffUL + #define CLKSPEEDREG_TYPE1 KSEG1ADDR(0x0b000014) #define CLKSPEEDREG_TYPE2 KSEG1ADDR(0x0f000014) #define CLKSP(x) ((x) & 0x001f) @@ -213,7 +206,7 @@ static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pc return tclock; } -void __init vr41xx_bcu_init(void) +static int __init vr41xx_bcu_init(void) { unsigned long pclock; uint16_t clkspeed; @@ -223,4 +216,11 @@ void __init vr41xx_bcu_init(void) pclock = calculate_pclock(clkspeed); vr41xx_vtclock = calculate_vtclock(clkspeed, pclock); vr41xx_tclock = calculate_tclock(clkspeed, pclock, vr41xx_vtclock); + + iomem_resource.start = IO_MEM_RESOURCE_START; + iomem_resource.end = IO_MEM_RESOURCE_END; + + return 0; } + +early_initcall(vr41xx_bcu_init); diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c index f3665b404aed..fd33d005f463 100644 --- a/arch/mips/vr41xx/common/cmu.c +++ b/arch/mips/vr41xx/common/cmu.c @@ -200,7 +200,7 @@ void vr41xx_mask_clock(vr41xx_clock_t clock) spin_unlock_irq(&cmu_lock); } -void __init vr41xx_cmu_init(void) +static int __init vr41xx_cmu_init(void) { switch (current_cpu_data.cputype) { case CPU_VR4111: @@ -223,4 +223,8 @@ void __init vr41xx_cmu_init(void) cmuclkmsk = read_cmuclkmsk(); spin_lock_init(&cmu_lock); + + return 0; } + +early_initcall(vr41xx_cmu_init); diff --git a/arch/mips/vr41xx/common/giu.c b/arch/mips/vr41xx/common/giu.c index 6fe6a73ff99b..bd2978fd510b 100644 --- a/arch/mips/vr41xx/common/giu.c +++ b/arch/mips/vr41xx/common/giu.c @@ -28,10 +28,12 @@ * - Added support for NEC VR4133. * - Removed board_irq_init. */ +#include <linux/config.h> #include <linux/errno.h> #include <linux/init.h> #include <linux/irq.h> #include <linux/kernel.h> +#include <linux/module.h> #include <linux/smp.h> #include <linux/types.h> @@ -64,6 +66,8 @@ static uint32_t giu_base; #define read_giuint(offset) readw(giu_base + (offset)) #define write_giuint(val, offset) writew((val), giu_base + (offset)) +#define GIUINT_HIGH_OFFSET 16 + static inline uint16_t set_giuint(uint8_t offset, uint16_t set) { uint16_t res; @@ -86,35 +90,121 @@ static inline uint16_t clear_giuint(uint8_t offset, uint16_t clear) return res; } -void vr41xx_enable_giuint(int pin) +static unsigned int startup_giuint_low_irq(unsigned int irq) { - if (pin < 16) - set_giuint(GIUINTENL, (uint16_t)1 << pin); - else - set_giuint(GIUINTENH, (uint16_t)1 << (pin - 16)); + unsigned int pin; + + pin = GIU_IRQ_TO_PIN(irq); + write_giuint((uint16_t)1 << pin, GIUINTSTATL); + set_giuint(GIUINTENL, (uint16_t)1 << pin); + + return 0; } -void vr41xx_disable_giuint(int pin) +static void shutdown_giuint_low_irq(unsigned int irq) { - if (pin < 16) - clear_giuint(GIUINTENL, (uint16_t)1 << pin); - else - clear_giuint(GIUINTENH, (uint16_t)1 << (pin - 16)); + clear_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); } -void vr41xx_clear_giuint(int pin) +static void enable_giuint_low_irq(unsigned int irq) { - if (pin < 16) - write_giuint((uint16_t)1 << pin, GIUINTSTATL); - else - write_giuint((uint16_t)1 << (pin - 16), GIUINTSTATH); + set_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); +} + +#define disable_giuint_low_irq shutdown_giuint_low_irq + +static void ack_giuint_low_irq(unsigned int irq) +{ + unsigned int pin; + + pin = GIU_IRQ_TO_PIN(irq); + clear_giuint(GIUINTENL, (uint16_t)1 << pin); + write_giuint((uint16_t)1 << pin, GIUINTSTATL); +} + +static void end_giuint_low_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + set_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); +} + +static struct hw_interrupt_type giuint_low_irq_type = { + .typename = "GIUINTL", + .startup = startup_giuint_low_irq, + .shutdown = shutdown_giuint_low_irq, + .enable = enable_giuint_low_irq, + .disable = disable_giuint_low_irq, + .ack = ack_giuint_low_irq, + .end = end_giuint_low_irq, +}; + +static unsigned int startup_giuint_high_irq(unsigned int irq) +{ + unsigned int pin; + + pin = GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET); + write_giuint((uint16_t)1 << pin, GIUINTSTATH); + set_giuint(GIUINTENH, (uint16_t)1 << pin); + + return 0; +} + +static void shutdown_giuint_high_irq(unsigned int irq) +{ + clear_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); +} + +static void enable_giuint_high_irq(unsigned int irq) +{ + set_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); +} + +#define disable_giuint_high_irq shutdown_giuint_high_irq + +static void ack_giuint_high_irq(unsigned int irq) +{ + unsigned int pin; + + pin = GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET); + clear_giuint(GIUINTENH, (uint16_t)1 << pin); + write_giuint((uint16_t)1 << pin, GIUINTSTATH); +} + +static void end_giuint_high_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + set_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); +} + +static struct hw_interrupt_type giuint_high_irq_type = { + .typename = "GIUINTH", + .startup = startup_giuint_high_irq, + .shutdown = shutdown_giuint_high_irq, + .enable = enable_giuint_high_irq, + .disable = disable_giuint_high_irq, + .ack = ack_giuint_high_irq, + .end = end_giuint_high_irq, +}; + +void __init init_vr41xx_giuint_irq(void) +{ + int i; + + for (i = GIU_IRQ_BASE; i <= GIU_IRQ_LAST; i++) { + if (i < (GIU_IRQ_BASE + GIUINT_HIGH_OFFSET)) + irq_desc[i].handler = &giuint_low_irq_type; + else + irq_desc[i].handler = &giuint_high_irq_type; + } + + setup_irq(GIUINT_CASCADE_IRQ, &giu_cascade); } void vr41xx_set_irq_trigger(int pin, int trigger, int hold) { uint16_t mask; - if (pin < 16) { + if (pin < GIUINT_HIGH_OFFSET) { mask = (uint16_t)1 << pin; if (trigger != TRIGGER_LEVEL) { set_giuint(GIUINTTYPL, mask); @@ -142,8 +232,9 @@ void vr41xx_set_irq_trigger(int pin, int trigger, int hold) clear_giuint(GIUINTTYPL, mask); clear_giuint(GIUINTHTSELL, mask); } + write_giuint(mask, GIUINTSTATL); } else { - mask = (uint16_t)1 << (pin - 16); + mask = (uint16_t)1 << (pin - GIUINT_HIGH_OFFSET); if (trigger != TRIGGER_LEVEL) { set_giuint(GIUINTTYPH, mask); if (hold == SIGNAL_HOLD) @@ -170,32 +261,35 @@ void vr41xx_set_irq_trigger(int pin, int trigger, int hold) clear_giuint(GIUINTTYPH, mask); clear_giuint(GIUINTHTSELH, mask); } + write_giuint(mask, GIUINTSTATH); } - - vr41xx_clear_giuint(pin); } +EXPORT_SYMBOL(vr41xx_set_irq_trigger); + void vr41xx_set_irq_level(int pin, int level) { uint16_t mask; - if (pin < 16) { + if (pin < GIUINT_HIGH_OFFSET) { mask = (uint16_t)1 << pin; if (level == LEVEL_HIGH) set_giuint(GIUINTALSELL, mask); else clear_giuint(GIUINTALSELL, mask); + write_giuint(mask, GIUINTSTATL); } else { - mask = (uint16_t)1 << (pin - 16); + mask = (uint16_t)1 << (pin - GIUINT_HIGH_OFFSET); if (level == LEVEL_HIGH) set_giuint(GIUINTALSELH, mask); else clear_giuint(GIUINTALSELH, mask); + write_giuint(mask, GIUINTSTATH); } - - vr41xx_clear_giuint(pin); } +EXPORT_SYMBOL(vr41xx_set_irq_level); + #define GIUINT_NR_IRQS 32 enum { @@ -209,7 +303,7 @@ struct vr41xx_giuint_cascade { }; static struct vr41xx_giuint_cascade giuint_cascade[GIUINT_NR_IRQS]; -static struct irqaction giu_cascade = {no_action, 0, 0, "cascade", NULL, NULL}; +static struct irqaction giu_cascade = {no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; static int no_irq_number(int irq) { @@ -232,7 +326,7 @@ int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)) giuint_cascade[pin].get_irq_number = get_irq_number; retval = setup_irq(irq, &giu_cascade); - if (retval) { + if (retval != 0) { giuint_cascade[pin].flag = GIUINT_NO_CASCADE; giuint_cascade[pin].get_irq_number = no_irq_number; } @@ -240,29 +334,89 @@ int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)) return retval; } -unsigned int giuint_do_IRQ(int pin, struct pt_regs *regs) +EXPORT_SYMBOL(vr41xx_cascade_irq); + +static inline int get_irq_pin_number(void) +{ + uint16_t pendl, pendh, maskl, maskh; + int i; + + pendl = read_giuint(GIUINTSTATL); + pendh = read_giuint(GIUINTSTATH); + maskl = read_giuint(GIUINTENL); + maskh = read_giuint(GIUINTENH); + + maskl &= pendl; + maskh &= pendh; + + if (maskl) { + for (i = 0; i < 16; i++) { + if (maskl & ((uint16_t)1 << i)) + return i; + } + } else if (maskh) { + for (i = 0; i < 16; i++) { + if (maskh & ((uint16_t)1 << i)) + return i + GIUINT_HIGH_OFFSET; + } + } + + printk(KERN_ERR "spurious GIU interrupt: %04x(%04x),%04x(%04x)\n", + maskl, pendl, maskh, pendh); + + atomic_inc(&irq_err_count); + + return -1; +} + +static inline void ack_giuint_irq(int pin) +{ + if (pin < GIUINT_HIGH_OFFSET) { + clear_giuint(GIUINTENL, (uint16_t)1 << pin); + write_giuint((uint16_t)1 << pin, GIUINTSTATL); + } else { + pin -= GIUINT_HIGH_OFFSET; + clear_giuint(GIUINTENH, (uint16_t)1 << pin); + write_giuint((uint16_t)1 << pin, GIUINTSTATH); + } +} + +static inline void end_giuint_irq(int pin) +{ + if (pin < GIUINT_HIGH_OFFSET) + set_giuint(GIUINTENL, (uint16_t)1 << pin); + else + set_giuint(GIUINTENH, (uint16_t)1 << (pin - GIUINT_HIGH_OFFSET)); +} + +void giuint_irq_dispatch(struct pt_regs *regs) { struct vr41xx_giuint_cascade *cascade; - unsigned int retval = 0; - int giuint_irq, cascade_irq; + unsigned int giuint_irq; + int pin; + + pin = get_irq_pin_number(); + if (pin < 0) + return; disable_irq(GIUINT_CASCADE_IRQ); + cascade = &giuint_cascade[pin]; giuint_irq = GIU_IRQ(pin); if (cascade->flag == GIUINT_CASCADE) { - cascade_irq = cascade->get_irq_number(giuint_irq); - disable_irq(giuint_irq); - if (cascade_irq > 0) - retval = do_IRQ(cascade_irq, regs); - enable_irq(giuint_irq); - } else - retval = do_IRQ(giuint_irq, regs); - enable_irq(GIUINT_CASCADE_IRQ); + int irq = cascade->get_irq_number(giuint_irq); + ack_giuint_irq(pin); + if (irq >= 0) + do_IRQ(irq, regs); + end_giuint_irq(pin); + } else { + do_IRQ(giuint_irq, regs); + } - return retval; + enable_irq(GIUINT_CASCADE_IRQ); } -void __init vr41xx_giuint_init(void) +static int __init vr41xx_giu_init(void) { int i; @@ -277,16 +431,20 @@ void __init vr41xx_giuint_init(void) giu_base = GIUIOSELL_TYPE2; break; default: - panic("GIU: Unexpected CPU of NEC VR4100 series"); - break; + printk(KERN_ERR "GIU: Unexpected CPU of NEC VR4100 series\n"); + return -EINVAL; } for (i = 0; i < GIUINT_NR_IRQS; i++) { - vr41xx_disable_giuint(i); + if (i < GIUINT_HIGH_OFFSET) + clear_giuint(GIUINTENL, (uint16_t)1 << i); + else + clear_giuint(GIUINTENH, (uint16_t)1 << (i - GIUINT_HIGH_OFFSET)); giuint_cascade[i].flag = GIUINT_NO_CASCADE; giuint_cascade[i].get_irq_number = no_irq_number; } - if (setup_irq(GIUINT_CASCADE_IRQ, &giu_cascade)) - printk("GIUINT: Can not cascade IRQ %d.\n", GIUINT_CASCADE_IRQ); + return 0; } + +early_initcall(vr41xx_giu_init); diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index bd67058e4743..4fd195bc9ad2 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -28,10 +28,12 @@ * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - Coped with INTASSIGN of NEC VR4133. */ +#include <linux/config.h> #include <linux/errno.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/module.h> #include <linux/smp.h> #include <linux/types.h> @@ -43,11 +45,8 @@ extern asmlinkage void vr41xx_handle_interrupt(void); -extern void vr41xx_giuint_init(void); -extern void vr41xx_enable_giuint(int pin); -extern void vr41xx_disable_giuint(int pin); -extern void vr41xx_clear_giuint(int pin); -extern unsigned int giuint_do_IRQ(int pin, struct pt_regs *regs); +extern void init_vr41xx_giuint_irq(void); +extern void giuint_irq_dispatch(struct pt_regs *regs); static uint32_t icu1_base; static uint32_t icu2_base; @@ -64,11 +63,17 @@ static unsigned char sysint2_assign[16] = { #define SYSINT2REG_TYPE2 KSEG1ADDR(0x0f0000a0) #define SYSINT1REG 0x00 +#define PIUINTREG 0x02 #define INTASSIGN0 0x04 #define INTASSIGN1 0x06 #define GIUINTLREG 0x08 +#define DSIUINTREG 0x0a #define MSYSINT1REG 0x0c +#define MPIUINTREG 0x0e +#define MAIUINTREG 0x10 +#define MKIUINTREG 0x12 #define MGIUINTLREG 0x14 +#define MDSIUINTREG 0x16 #define NMIREG 0x18 #define SOFTREG 0x1a #define INTASSIGN2 0x1c @@ -76,11 +81,21 @@ static unsigned char sysint2_assign[16] = { #define SYSINT2REG 0x00 #define GIUINTHREG 0x02 +#define FIRINTREG 0x04 #define MSYSINT2REG 0x06 #define MGIUINTHREG 0x08 - -#define MDSIUINTREG KSEG1ADDR(0x0f000096) - #define INTDSIU 0x0800 +#define MFIRINTREG 0x0a +#define PCIINTREG 0x0c + #define PCIINT0 0x0001 +#define SCUINTREG 0x0e + #define SCUINT0 0x0001 +#define CSIINTREG 0x10 +#define MPCIINTREG 0x12 +#define MSCUINTREG 0x14 +#define MCSIINTREG 0x16 +#define BCUINTREG 0x18 + #define BCUINTR 0x0001 +#define MBCUINTREG 0x1a #define SYSINT1_IRQ_TO_PIN(x) ((x) - SYSINT1_IRQ_BASE) /* Pin 0-15 */ #define SYSINT2_IRQ_TO_PIN(x) ((x) - SYSINT2_IRQ_BASE) /* Pin 0-15 */ @@ -140,212 +155,298 @@ static inline uint16_t clear_icu2(uint8_t offset, uint16_t clear) /*=======================================================================*/ -void vr41xx_enable_dsiuint(void) +void vr41xx_enable_piuint(uint16_t mask) { - writew(INTDSIU, MDSIUINTREG); + irq_desc_t *desc = irq_desc + PIU_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu1(MPIUINTREG); + val |= mask; + write_icu1(val, MPIUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -void vr41xx_disable_dsiuint(void) +void vr41xx_disable_piuint(uint16_t mask) { - writew(0, MDSIUINTREG); + irq_desc_t *desc = irq_desc + PIU_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu1(MPIUINTREG); + val &= ~mask; + write_icu1(val, MPIUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -/*=======================================================================*/ - -static void enable_sysint1_irq(unsigned int irq) +void vr41xx_enable_aiuint(uint16_t mask) { - set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); + irq_desc_t *desc = irq_desc + AIU_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu1(MAIUINTREG); + val |= mask; + write_icu1(val, MAIUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -static void disable_sysint1_irq(unsigned int irq) +void vr41xx_disable_aiuint(uint16_t mask) { - clear_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); + irq_desc_t *desc = irq_desc + AIU_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu1(MAIUINTREG); + val &= ~mask; + write_icu1(val, MAIUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -static unsigned int startup_sysint1_irq(unsigned int irq) +void vr41xx_enable_kiuint(uint16_t mask) { - set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); - - return 0; /* never anything pending */ + irq_desc_t *desc = irq_desc + KIU_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu1(MKIUINTREG); + val |= mask; + write_icu1(val, MKIUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -#define shutdown_sysint1_irq disable_sysint1_irq -#define ack_sysint1_irq disable_sysint1_irq - -static void end_sysint1_irq(unsigned int irq) +void vr41xx_disable_kiuint(uint16_t mask) { - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); + irq_desc_t *desc = irq_desc + KIU_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu1(MKIUINTREG); + val &= ~mask; + write_icu1(val, MKIUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -static struct hw_interrupt_type sysint1_irq_type = { - .typename = "SYSINT1", - .startup = startup_sysint1_irq, - .shutdown = shutdown_sysint1_irq, - .enable = enable_sysint1_irq, - .disable = disable_sysint1_irq, - .ack = ack_sysint1_irq, - .end = end_sysint1_irq, -}; +void vr41xx_enable_dsiuint(uint16_t mask) +{ + irq_desc_t *desc = irq_desc + DSIU_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu1(MDSIUINTREG); + val |= mask; + write_icu1(val, MDSIUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); +} -/*=======================================================================*/ +void vr41xx_disable_dsiuint(uint16_t mask) +{ + irq_desc_t *desc = irq_desc + DSIU_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu1(MDSIUINTREG); + val &= ~mask; + write_icu1(val, MDSIUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); +} -static void enable_sysint2_irq(unsigned int irq) +void vr41xx_enable_firint(uint16_t mask) { - set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); + irq_desc_t *desc = irq_desc + FIR_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu2(MFIRINTREG); + val |= mask; + write_icu2(val, MFIRINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -static void disable_sysint2_irq(unsigned int irq) +void vr41xx_disable_firint(uint16_t mask) { - clear_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); + irq_desc_t *desc = irq_desc + FIR_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu2(MFIRINTREG); + val &= ~mask; + write_icu2(val, MFIRINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -static unsigned int startup_sysint2_irq(unsigned int irq) +void vr41xx_enable_pciint(void) { - set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); + irq_desc_t *desc = irq_desc + PCI_IRQ; + unsigned long flags; - return 0; /* never anything pending */ + spin_lock_irqsave(&desc->lock, flags); + write_icu2(PCIINT0, MPCIINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -#define shutdown_sysint2_irq disable_sysint2_irq -#define ack_sysint2_irq disable_sysint2_irq +void vr41xx_disable_pciint(void) +{ + irq_desc_t *desc = irq_desc + PCI_IRQ; + unsigned long flags; -static void end_sysint2_irq(unsigned int irq) + spin_lock_irqsave(&desc->lock, flags); + write_icu2(0, MPCIINTREG); + spin_unlock_irqrestore(&desc->lock, flags); +} + +void vr41xx_enable_scuint(void) { - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); + irq_desc_t *desc = irq_desc + SCU_IRQ; + unsigned long flags; + + spin_lock_irqsave(&desc->lock, flags); + write_icu2(SCUINT0, MSCUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -static struct hw_interrupt_type sysint2_irq_type = { - .typename = "SYSINT2", - .startup = startup_sysint2_irq, - .shutdown = shutdown_sysint2_irq, - .enable = enable_sysint2_irq, - .disable = disable_sysint2_irq, - .ack = ack_sysint2_irq, - .end = end_sysint2_irq, -}; +void vr41xx_disable_scuint(void) +{ + irq_desc_t *desc = irq_desc + SCU_IRQ; + unsigned long flags; -/*=======================================================================*/ + spin_lock_irqsave(&desc->lock, flags); + write_icu2(0, MSCUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); +} -static void enable_giuint_irq(unsigned int irq) +void vr41xx_enable_csiint(uint16_t mask) { - int pin; + irq_desc_t *desc = irq_desc + CSI_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu2(MCSIINTREG); + val |= mask; + write_icu2(val, MCSIINTREG); + spin_unlock_irqrestore(&desc->lock, flags); +} - pin = GIU_IRQ_TO_PIN(irq); - if (pin < 16) - set_icu1(MGIUINTLREG, (uint16_t)1 << pin); - else - set_icu2(MGIUINTHREG, (uint16_t)1 << (pin - 16)); - vr41xx_enable_giuint(pin); +void vr41xx_disable_csiint(uint16_t mask) +{ + irq_desc_t *desc = irq_desc + CSI_IRQ; + unsigned long flags; + uint16_t val; + + spin_lock_irqsave(&desc->lock, flags); + val = read_icu2(MCSIINTREG); + val &= ~mask; + write_icu2(val, MCSIINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -static void disable_giuint_irq(unsigned int irq) +void vr41xx_enable_bcuint(void) { - int pin; + irq_desc_t *desc = irq_desc + BCU_IRQ; + unsigned long flags; - pin = GIU_IRQ_TO_PIN(irq); - vr41xx_disable_giuint(pin); - if (pin < 16) - clear_icu1(MGIUINTLREG, (uint16_t)1 << pin); - else - clear_icu2(MGIUINTHREG, (uint16_t)1 << (pin - 16)); + spin_lock_irqsave(&desc->lock, flags); + write_icu2(BCUINTR, MBCUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); } -static unsigned int startup_giuint_irq(unsigned int irq) +void vr41xx_disable_bcuint(void) { - vr41xx_clear_giuint(GIU_IRQ_TO_PIN(irq)); + irq_desc_t *desc = irq_desc + BCU_IRQ; + unsigned long flags; - enable_giuint_irq(irq); + spin_lock_irqsave(&desc->lock, flags); + write_icu2(0, MBCUINTREG); + spin_unlock_irqrestore(&desc->lock, flags); +} + +/*=======================================================================*/ + +static unsigned int startup_sysint1_irq(unsigned int irq) +{ + set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); return 0; /* never anything pending */ } -#define shutdown_giuint_irq disable_giuint_irq - -static void ack_giuint_irq(unsigned int irq) +static void shutdown_sysint1_irq(unsigned int irq) { - disable_giuint_irq(irq); + clear_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); +} - vr41xx_clear_giuint(GIU_IRQ_TO_PIN(irq)); +static void enable_sysint1_irq(unsigned int irq) +{ + set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); } -static void end_giuint_irq(unsigned int irq) +#define disable_sysint1_irq shutdown_sysint1_irq +#define ack_sysint1_irq shutdown_sysint1_irq + +static void end_sysint1_irq(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - enable_giuint_irq(irq); + set_icu1(MSYSINT1REG, (uint16_t)1 << SYSINT1_IRQ_TO_PIN(irq)); } -static struct hw_interrupt_type giuint_irq_type = { - .typename = "GIUINT", - .startup = startup_giuint_irq, - .shutdown = shutdown_giuint_irq, - .enable = enable_giuint_irq, - .disable = disable_giuint_irq, - .ack = ack_giuint_irq, - .end = end_giuint_irq, +static struct hw_interrupt_type sysint1_irq_type = { + .typename = "SYSINT1", + .startup = startup_sysint1_irq, + .shutdown = shutdown_sysint1_irq, + .enable = enable_sysint1_irq, + .disable = disable_sysint1_irq, + .ack = ack_sysint1_irq, + .end = end_sysint1_irq, }; /*=======================================================================*/ -static struct irqaction icu_cascade = {no_action, 0, 0, "cascade", NULL, NULL}; - -static void __init vr41xx_icu_init(void) +static unsigned int startup_sysint2_irq(unsigned int irq) { - int i; - - switch (current_cpu_data.cputype) { - case CPU_VR4111: - case CPU_VR4121: - icu1_base = SYSINT1REG_TYPE1; - icu2_base = SYSINT2REG_TYPE1; - break; - case CPU_VR4122: - case CPU_VR4131: - case CPU_VR4133: - icu1_base = SYSINT1REG_TYPE2; - icu2_base = SYSINT2REG_TYPE2; - break; - default: - panic("Unexpected CPU of NEC VR4100 series"); - break; - } - - write_icu1(0, MSYSINT1REG); - write_icu1(0, MGIUINTLREG); - - write_icu2(0, MSYSINT2REG); - write_icu2(0, MGIUINTHREG); - - for (i = SYSINT1_IRQ_BASE; i <= GIU_IRQ_LAST; i++) { - if (i >= SYSINT1_IRQ_BASE && i <= SYSINT1_IRQ_LAST) - irq_desc[i].handler = &sysint1_irq_type; - else if (i >= SYSINT2_IRQ_BASE && i <= SYSINT2_IRQ_LAST) - irq_desc[i].handler = &sysint2_irq_type; - else if (i >= GIU_IRQ_BASE && i <= GIU_IRQ_LAST) - irq_desc[i].handler = &giuint_irq_type; - } + set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); - setup_irq(INT0_CASCADE_IRQ, &icu_cascade); - setup_irq(INT1_CASCADE_IRQ, &icu_cascade); - setup_irq(INT2_CASCADE_IRQ, &icu_cascade); - setup_irq(INT3_CASCADE_IRQ, &icu_cascade); - setup_irq(INT4_CASCADE_IRQ, &icu_cascade); + return 0; /* never anything pending */ } -void __init init_IRQ(void) +static void shutdown_sysint2_irq(unsigned int irq) { - memset(irq_desc, 0, sizeof(irq_desc)); + clear_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); +} - init_generic_irq(); - mips_cpu_irq_init(MIPS_CPU_IRQ_BASE); - vr41xx_icu_init(); +static void enable_sysint2_irq(unsigned int irq) +{ + set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); +} - vr41xx_giuint_init(); +#define disable_sysint2_irq shutdown_sysint2_irq +#define ack_sysint2_irq shutdown_sysint2_irq - set_except_vector(0, vr41xx_handle_interrupt); +static void end_sysint2_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) + set_icu2(MSYSINT2REG, (uint16_t)1 << SYSINT2_IRQ_TO_PIN(irq)); } +static struct hw_interrupt_type sysint2_irq_type = { + .typename = "SYSINT2", + .startup = startup_sysint2_irq, + .shutdown = shutdown_sysint2_irq, + .enable = enable_sysint2_irq, + .disable = disable_sysint2_irq, + .ack = ack_sysint2_irq, + .end = end_sysint2_irq, +}; + /*=======================================================================*/ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) @@ -492,34 +593,14 @@ int vr41xx_set_intassign(unsigned int irq, unsigned char intassign) return retval; } -/*=======================================================================*/ +EXPORT_SYMBOL(vr41xx_set_intassign); -static inline void giuint_irq_dispatch(uint16_t pendl, uint16_t pendh, - struct pt_regs *regs) -{ - int i; - - if (pendl) { - for (i = 0; i < 16; i++) { - if (pendl & ((uint16_t)1 << i)) { - giuint_do_IRQ(i, regs); - return; - } - } - } else { - for (i = 0; i < 16; i++) { - if (pendh & ((uint16_t)1 << i)) { - giuint_do_IRQ(i + 16, regs); - return; - } - } - } -} +/*=======================================================================*/ asmlinkage void irq_dispatch(unsigned char intnum, struct pt_regs *regs) { - uint16_t pend1, pend2, pendl, pendh; - uint16_t mask1, mask2, maskl, maskh; + uint16_t pend1, pend2; + uint16_t mask1, mask2; int i; pend1 = read_icu1(SYSINT1REG); @@ -528,28 +609,18 @@ asmlinkage void irq_dispatch(unsigned char intnum, struct pt_regs *regs) pend2 = read_icu2(SYSINT2REG); mask2 = read_icu2(MSYSINT2REG); - pendl = read_icu1(GIUINTLREG); - maskl = read_icu1(MGIUINTLREG); - - pendh = read_icu2(GIUINTHREG); - maskh = read_icu2(MGIUINTHREG); - mask1 &= pend1; mask2 &= pend2; - maskl &= pendl; - maskh &= pendh; if (mask1) { for (i = 0; i < 16; i++) { if (intnum == sysint1_assign[i] && (mask1 & ((uint16_t)1 << i))) { - if (i == 8 && (maskl | maskh)) { - giuint_irq_dispatch(maskl, maskh, regs); - return; - } else { + if (i == 8) + giuint_irq_dispatch(regs); + else do_IRQ(SYSINT1_IRQ(i), regs); - return; - } + return; } } } @@ -564,6 +635,72 @@ asmlinkage void irq_dispatch(unsigned char intnum, struct pt_regs *regs) } } - printk(KERN_ERR "spurious interrupt: %04x,%04x,%04x,%04x\n", pend1, pend2, pendl, pendh); + printk(KERN_ERR "spurious ICU interrupt: %04x,%04x\n", pend1, pend2); + atomic_inc(&irq_err_count); } + +/*=======================================================================*/ + +static int __init vr41xx_icu_init(void) +{ + switch (current_cpu_data.cputype) { + case CPU_VR4111: + case CPU_VR4121: + icu1_base = SYSINT1REG_TYPE1; + icu2_base = SYSINT2REG_TYPE1; + break; + case CPU_VR4122: + case CPU_VR4131: + case CPU_VR4133: + icu1_base = SYSINT1REG_TYPE2; + icu2_base = SYSINT2REG_TYPE2; + break; + default: + printk(KERN_ERR "ICU: Unexpected CPU of NEC VR4100 series\n"); + return -EINVAL; + } + + write_icu1(0, MSYSINT1REG); + write_icu1(0xffff, MGIUINTLREG); + + write_icu2(0, MSYSINT2REG); + write_icu2(0xffff, MGIUINTHREG); + + return 0; +} + +early_initcall(vr41xx_icu_init); + +/*=======================================================================*/ + +static struct irqaction icu_cascade = {no_action, 0, 0, "cascade", NULL, NULL}; + +static inline void init_vr41xx_icu_irq(void) +{ + int i; + + for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++) + irq_desc[i].handler = &sysint1_irq_type; + + for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++) + irq_desc[i].handler = &sysint2_irq_type; + + setup_irq(INT0_CASCADE_IRQ, &icu_cascade); + setup_irq(INT1_CASCADE_IRQ, &icu_cascade); + setup_irq(INT2_CASCADE_IRQ, &icu_cascade); + setup_irq(INT3_CASCADE_IRQ, &icu_cascade); + setup_irq(INT4_CASCADE_IRQ, &icu_cascade); +} + +void __init init_IRQ(void) +{ + memset(irq_desc, 0, sizeof(irq_desc)); + + init_generic_irq(); + mips_cpu_irq_init(MIPS_CPU_IRQ_BASE); + init_vr41xx_icu_irq(); + init_vr41xx_giuint_irq(); + + set_except_vector(0, vr41xx_handle_interrupt); +} diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index 6590850b312f..ffc8e1c36b67 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c @@ -18,16 +18,9 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/init.h> -#include <linux/ioport.h> #include <linux/string.h> #include <asm/bootinfo.h> -#include <asm/vr41xx/vr41xx.h> - -extern void vr41xx_bcu_init(void); -extern void vr41xx_cmu_init(void); -extern void vr41xx_pmu_init(void); -extern void vr41xx_rtc_init(void); void __init prom_init(void) { @@ -42,14 +35,6 @@ void __init prom_init(void) if (i < (argc - 1)) strcat(arcs_cmdline, " "); } - - iomem_resource.start = IO_MEM_RESOURCE_START; - iomem_resource.end = IO_MEM_RESOURCE_END; - - vr41xx_bcu_init(); - vr41xx_cmu_init(); - vr41xx_pmu_init(); - vr41xx_rtc_init(); } unsigned long __init prom_free_prom_memory (void) diff --git a/arch/mips/vr41xx/common/ksyms.c b/arch/mips/vr41xx/common/ksyms.c index ea5231de0916..cfaa0ecd1786 100644 --- a/arch/mips/vr41xx/common/ksyms.c +++ b/arch/mips/vr41xx/common/ksyms.c @@ -25,8 +25,6 @@ EXPORT_SYMBOL(vr41xx_get_vtclock_frequency); EXPORT_SYMBOL(vr41xx_get_tclock_frequency); -EXPORT_SYMBOL(vr41xx_set_intassign); - EXPORT_SYMBOL(vr41xx_set_rtclong1_cycle); EXPORT_SYMBOL(vr41xx_read_rtclong1_counter); EXPORT_SYMBOL(vr41xx_set_rtclong2_cycle); diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c index 9b5a82e63442..3e1079dfb6c1 100644 --- a/arch/mips/vr41xx/common/pmu.c +++ b/arch/mips/vr41xx/common/pmu.c @@ -1,7 +1,7 @@ /* * pmu.c, Power Management Unit routines for NEC VR4100 series. * - * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> + * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -68,9 +68,13 @@ static void vr41xx_power_off(void) while (1) ; } -void __init vr41xx_pmu_init(void) +static int __init vr41xx_pmu_init(void) { _machine_restart = vr41xx_restart; _machine_halt = vr41xx_halt; _machine_power_off = vr41xx_power_off; + + return 0; } + +early_initcall(vr41xx_pmu_init); diff --git a/arch/mips/vr41xx/common/rtc.c b/arch/mips/vr41xx/common/rtc.c index 6fa5fdc28f4b..07173afe1faf 100644 --- a/arch/mips/vr41xx/common/rtc.c +++ b/arch/mips/vr41xx/common/rtc.c @@ -1,7 +1,7 @@ /* * rtc.c, RTC(has only timer function) routines for NEC VR4100 series. * - * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> + * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -310,8 +310,12 @@ static void __init vr41xx_timer_setup(struct irqaction *irq) setup_irq(ELAPSEDTIME_IRQ, irq); } -void __init vr41xx_rtc_init(void) +static int __init vr41xx_rtc_init(void) { board_time_init = vr41xx_time_init; board_timer_setup = vr41xx_timer_setup; + + return 0; } + +early_initcall(vr41xx_rtc_init); diff --git a/arch/mips/vr41xx/common/serial.c b/arch/mips/vr41xx/common/serial.c index b052a9548f39..cc445eeff22e 100644 --- a/arch/mips/vr41xx/common/serial.c +++ b/arch/mips/vr41xx/common/serial.c @@ -168,7 +168,7 @@ void __init vr41xx_dsiu_init(void) if (port.membase != NULL) { if (early_serial_setup(&port) == 0) { vr41xx_supply_clock(DSIU_CLOCK); - vr41xx_enable_dsiuint(); + vr41xx_enable_dsiuint(DSIUINT_ALL); vr41xx_serial_ports++; return; } diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c index cce22c1594cf..3b006358c5c1 100644 --- a/arch/mips/vr41xx/common/vrc4173.c +++ b/arch/mips/vr41xx/common/vrc4173.c @@ -1,143 +1,336 @@ /* - * FILE NAME - * drivers/char/vrc4173.c - * - * BRIEF MODULE DESCRIPTION - * NEC VRC4173 driver for NEC VR4122/VR4131. + * vrc4173.c, NEC VRC4173 base driver for NEC VR4122/VR4131. * - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * Copyright (C) 2001-2003 MontaVista Software Inc. + * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> + * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Copyright 2001,2002 MontaVista Software Inc. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include <linux/config.h> #include <linux/init.h> #include <linux/module.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/pci.h> +#include <linux/spinlock.h> #include <linux/types.h> #include <asm/vr41xx/vr41xx.h> #include <asm/vr41xx/vrc4173.h> -MODULE_DESCRIPTION("NEC VRC4173 driver for NEC VR4122/4131"); +MODULE_DESCRIPTION("NEC VRC4173 base driver for NEC VR4122/4131"); MODULE_AUTHOR("Yoichi Yuasa <yyuasa@mvista.com>"); MODULE_LICENSE("GPL"); #define VRC4173_CMUCLKMSK 0x040 + #define MSKPIU 0x0001 + #define MSKKIU 0x0002 + #define MSKAIU 0x0004 + #define MSKPS2CH1 0x0008 + #define MSKPS2CH2 0x0010 + #define MSKUSB 0x0020 + #define MSKCARD1 0x0040 + #define MSKCARD2 0x0080 + #define MSKAC97 0x0100 + #define MSK48MUSB 0x0400 + #define MSK48MPIN 0x0800 + #define MSK48MOSC 0x1000 #define VRC4173_CMUSRST 0x042 - -#define VRC4173_SELECTREG 0x09e + #define USBRST 0x0001 + #define CARD1RST 0x0002 + #define CARD2RST 0x0004 + #define AC97RST 0x0008 #define VRC4173_SYSINT1REG 0x060 #define VRC4173_MSYSINT1REG 0x06c -static struct pci_device_id vrc4173_table[] = { - {PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_VRC4173, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - {0, } +#define VRC4173_SELECTREG 0x09e + #define SEL3 0x0008 + #define SEL2 0x0004 + #define SEL1 0x0002 + #define SEL0 0x0001 + +static struct pci_device_id vrc4173_id_table[] __devinitdata = { + { .vendor = PCI_VENDOR_ID_NEC, + .device = PCI_DEVICE_ID_NEC_VRC4173, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, }, + { .vendor = 0, }, }; unsigned long vrc4173_io_offset = 0; EXPORT_SYMBOL(vrc4173_io_offset); -static u16 vrc4173_cmuclkmsk; static int vrc4173_initialized; +static uint16_t vrc4173_cmuclkmsk; +static uint16_t vrc4173_selectreg; +static spinlock_t vrc4173_cmu_lock; +static spinlock_t vrc4173_giu_lock; -void vrc4173_clock_supply(u16 mask) +static inline void set_cmusrst(uint16_t val) +{ + uint16_t cmusrst; + + cmusrst = vrc4173_inw(VRC4173_CMUSRST); + cmusrst |= val; + vrc4173_outw(cmusrst, VRC4173_CMUSRST); +} + +static inline void clear_cmusrst(uint16_t val) +{ + uint16_t cmusrst; + + cmusrst = vrc4173_inw(VRC4173_CMUSRST); + cmusrst &= ~val; + vrc4173_outw(cmusrst, VRC4173_CMUSRST); +} + +void vrc4173_supply_clock(vrc4173_clock_t clock) { if (vrc4173_initialized) { - vrc4173_cmuclkmsk |= mask; + spin_lock_irq(&vrc4173_cmu_lock); + + switch (clock) { + case VRC4173_PIU_CLOCK: + vrc4173_cmuclkmsk |= MSKPIU; + break; + case VRC4173_KIU_CLOCK: + vrc4173_cmuclkmsk |= MSKKIU; + break; + case VRC4173_AIU_CLOCK: + vrc4173_cmuclkmsk |= MSKAIU; + break; + case VRC4173_PS2_CH1_CLOCK: + vrc4173_cmuclkmsk |= MSKPS2CH1; + break; + case VRC4173_PS2_CH2_CLOCK: + vrc4173_cmuclkmsk |= MSKPS2CH2; + break; + case VRC4173_USBU_PCI_CLOCK: + set_cmusrst(USBRST); + vrc4173_cmuclkmsk |= MSKUSB; + break; + case VRC4173_CARDU1_PCI_CLOCK: + set_cmusrst(CARD1RST); + vrc4173_cmuclkmsk |= MSKCARD1; + break; + case VRC4173_CARDU2_PCI_CLOCK: + set_cmusrst(CARD2RST); + vrc4173_cmuclkmsk |= MSKCARD2; + break; + case VRC4173_AC97U_PCI_CLOCK: + set_cmusrst(AC97RST); + vrc4173_cmuclkmsk |= MSKAC97; + break; + case VRC4173_USBU_48MHz_CLOCK: + set_cmusrst(USBRST); + vrc4173_cmuclkmsk |= MSK48MUSB; + break; + case VRC4173_EXT_48MHz_CLOCK: + if (vrc4173_cmuclkmsk & MSK48MOSC) + vrc4173_cmuclkmsk |= MSK48MPIN; + else + printk(KERN_WARNING + "vrc4173_supply_clock: " + "Please supply VRC4173_48MHz_CLOCK first " + "rather than VRC4173_EXT_48MHz_CLOCK.\n"); + break; + case VRC4173_48MHz_CLOCK: + vrc4173_cmuclkmsk |= MSK48MOSC; + break; + default: + printk(KERN_WARNING + "vrc4173_supply_clock: Invalid CLOCK value %u\n", clock); + break; + } + vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); + + switch (clock) { + case VRC4173_USBU_PCI_CLOCK: + case VRC4173_USBU_48MHz_CLOCK: + clear_cmusrst(USBRST); + break; + case VRC4173_CARDU1_PCI_CLOCK: + clear_cmusrst(CARD1RST); + break; + case VRC4173_CARDU2_PCI_CLOCK: + clear_cmusrst(CARD2RST); + break; + case VRC4173_AC97U_PCI_CLOCK: + clear_cmusrst(AC97RST); + break; + default: + break; + } + + spin_unlock_irq(&vrc4173_cmu_lock); } } -void vrc4173_clock_mask(u16 mask) +EXPORT_SYMBOL(vrc4173_supply_clock); + +void vrc4173_mask_clock(vrc4173_clock_t clock) { if (vrc4173_initialized) { - vrc4173_cmuclkmsk &= ~mask; + spin_lock_irq(&vrc4173_cmu_lock); + + switch (clock) { + case VRC4173_PIU_CLOCK: + vrc4173_cmuclkmsk &= ~MSKPIU; + break; + case VRC4173_KIU_CLOCK: + vrc4173_cmuclkmsk &= ~MSKKIU; + break; + case VRC4173_AIU_CLOCK: + vrc4173_cmuclkmsk &= ~MSKAIU; + break; + case VRC4173_PS2_CH1_CLOCK: + vrc4173_cmuclkmsk &= ~MSKPS2CH1; + break; + case VRC4173_PS2_CH2_CLOCK: + vrc4173_cmuclkmsk &= ~MSKPS2CH2; + break; + case VRC4173_USBU_PCI_CLOCK: + set_cmusrst(USBRST); + vrc4173_cmuclkmsk &= ~MSKUSB; + break; + case VRC4173_CARDU1_PCI_CLOCK: + set_cmusrst(CARD1RST); + vrc4173_cmuclkmsk &= ~MSKCARD1; + break; + case VRC4173_CARDU2_PCI_CLOCK: + set_cmusrst(CARD2RST); + vrc4173_cmuclkmsk &= ~MSKCARD2; + break; + case VRC4173_AC97U_PCI_CLOCK: + set_cmusrst(AC97RST); + vrc4173_cmuclkmsk &= ~MSKAC97; + break; + case VRC4173_USBU_48MHz_CLOCK: + set_cmusrst(USBRST); + vrc4173_cmuclkmsk &= ~MSK48MUSB; + break; + case VRC4173_EXT_48MHz_CLOCK: + vrc4173_cmuclkmsk &= ~MSK48MPIN; + break; + case VRC4173_48MHz_CLOCK: + vrc4173_cmuclkmsk &= ~MSK48MOSC; + break; + default: + printk(KERN_WARNING "vrc4173_mask_clock: Invalid CLOCK value %u\n", clock); + break; + } + vrc4173_outw(vrc4173_cmuclkmsk, VRC4173_CMUCLKMSK); + + switch (clock) { + case VRC4173_USBU_PCI_CLOCK: + case VRC4173_USBU_48MHz_CLOCK: + clear_cmusrst(USBRST); + break; + case VRC4173_CARDU1_PCI_CLOCK: + clear_cmusrst(CARD1RST); + break; + case VRC4173_CARDU2_PCI_CLOCK: + clear_cmusrst(CARD2RST); + break; + case VRC4173_AC97U_PCI_CLOCK: + clear_cmusrst(AC97RST); + break; + default: + break; + } + + spin_unlock_irq(&vrc4173_cmu_lock); } } +EXPORT_SYMBOL(vrc4173_mask_clock); + static inline void vrc4173_cmu_init(void) { vrc4173_cmuclkmsk = vrc4173_inw(VRC4173_CMUCLKMSK); -} -EXPORT_SYMBOL(vrc4173_clock_supply); -EXPORT_SYMBOL(vrc4173_clock_mask); + spin_lock_init(&vrc4173_cmu_lock); +} -void vrc4173_select_function(int func) +void vrc4173_select_function(vrc4173_function_t function) { - u16 val; - if (vrc4173_initialized) { - val = vrc4173_inw(VRC4173_SELECTREG); - switch(func) { - case PS2CH1_SELECT: - val |= 0x0004; + spin_lock_irq(&vrc4173_giu_lock); + + switch(function) { + case PS2_CHANNEL1: + vrc4173_selectreg |= SEL2; break; - case PS2CH2_SELECT: - val |= 0x0002; + case PS2_CHANNEL2: + vrc4173_selectreg |= SEL1; break; - case TOUCHPANEL_SELECT: - val &= 0x0007; + case TOUCHPANEL: + vrc4173_selectreg &= SEL2 | SEL1 | SEL0; break; - case KIU8_SELECT: - val &= 0x000e; + case KEYBOARD_8SCANLINES: + vrc4173_selectreg &= SEL3 | SEL2 | SEL1; break; - case KIU10_SELECT: - val &= 0x000c; + case KEYBOARD_10SCANLINES: + vrc4173_selectreg &= SEL3 | SEL2; break; - case KIU12_SELECT: - val &= 0x0008; + case KEYBOARD_12SCANLINES: + vrc4173_selectreg &= SEL3; break; - case GPIO_SELECT: - val |= 0x0008; + case GPIO_0_15PINS: + vrc4173_selectreg |= SEL0; + break; + case GPIO_16_20PINS: + vrc4173_selectreg |= SEL3; break; } - vrc4173_outw(val, VRC4173_SELECTREG); + + vrc4173_outw(vrc4173_selectreg, VRC4173_SELECTREG); + + spin_unlock_irq(&vrc4173_giu_lock); } } EXPORT_SYMBOL(vrc4173_select_function); +static inline void vrc4173_giu_init(void) +{ + vrc4173_selectreg = vrc4173_inw(VRC4173_SELECTREG); + + spin_lock_init(&vrc4173_giu_lock); +} + static void enable_vrc4173_irq(unsigned int irq) { - u16 val; + uint16_t val; val = vrc4173_inw(VRC4173_MSYSINT1REG); - val |= (u16)1 << (irq - VRC4173_IRQ_BASE); + val |= (uint16_t)1 << (irq - VRC4173_IRQ_BASE); vrc4173_outw(val, VRC4173_MSYSINT1REG); } static void disable_vrc4173_irq(unsigned int irq) { - u16 val; + uint16_t val; val = vrc4173_inw(VRC4173_MSYSINT1REG); - val &= ~((u16)1 << (irq - VRC4173_IRQ_BASE)); + val &= ~((uint16_t)1 << (irq - VRC4173_IRQ_BASE)); vrc4173_outw(val, VRC4173_MSYSINT1REG); } @@ -157,19 +350,18 @@ static void end_vrc4173_irq(unsigned int irq) } static struct hw_interrupt_type vrc4173_irq_type = { - "VRC4173", - startup_vrc4173_irq, - shutdown_vrc4173_irq, - enable_vrc4173_irq, - disable_vrc4173_irq, - ack_vrc4173_irq, - end_vrc4173_irq, - NULL + .typename = "VRC4173", + .startup = startup_vrc4173_irq, + .shutdown = shutdown_vrc4173_irq, + .enable = enable_vrc4173_irq, + .disable = disable_vrc4173_irq, + .ack = ack_vrc4173_irq, + .end = end_vrc4173_irq, }; static int vrc4173_get_irq_number(int irq) { - u16 status, mask; + uint16_t status, mask; int i; status = vrc4173_inw(VRC4173_SYSINT1REG); @@ -179,18 +371,18 @@ static int vrc4173_get_irq_number(int irq) if (status) { for (i = 0; i < 16; i++) if (status & (0x0001 << i)) - return VRC4173_IRQ_BASE + i; + return VRC4173_IRQ(i); } return -EINVAL; } -static inline void vrc4173_icu_init(int cascade_irq) +static inline int vrc4173_icu_init(int cascade_irq) { int i; if (cascade_irq < GIU_IRQ(0) || cascade_irq > GIU_IRQ(15)) - return; + return -EINVAL; vrc4173_outw(0, VRC4173_MSYSINT1REG); @@ -199,33 +391,38 @@ static inline void vrc4173_icu_init(int cascade_irq) for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++) irq_desc[i].handler = &vrc4173_irq_type; + + return 0; } -static int __devinit vrc4173_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) +static int __devinit vrc4173_probe(struct pci_dev *dev, + const struct pci_device_id *id) { unsigned long start, flags; int err; - if ((err = pci_enable_device(pdev)) < 0) { - printk(KERN_ERR "vrc4173: failed to enable device -- err=%d\n", err); + err = pci_enable_device(dev); + if (err < 0) { + printk(KERN_ERR "vrc4173: Failed to enable PCI device, aborting\n"); return err; } - pci_set_master(pdev); + pci_set_master(dev); - start = pci_resource_start(pdev, 0); - if (!start) { - printk(KERN_ERR "vrc4173:No PCI I/O resources, aborting\n"); - return -ENODEV; + start = pci_resource_start(dev, 0); + if (start == 0) { + printk(KERN_ERR "vrc4173:No such PCI I/O resource, aborting\n"); + return -ENXIO; } - if (!start || (((flags = pci_resource_flags(pdev, 0)) & IORESOURCE_IO) == 0)) { - printk(KERN_ERR "vrc4173: No PCI I/O resources, aborting\n"); - return -ENODEV; + flags = pci_resource_flags(dev, 0); + if ((flags & IORESOURCE_IO) == 0) { + printk(KERN_ERR "vrc4173: No such PCI I/O resource, aborting\n"); + return -ENXIO; } - if ((err = pci_request_regions(pdev, "NEC VRC4173")) < 0) { + err = pci_request_regions(dev, "NEC VRC4173"); + if (err < 0) { printk(KERN_ERR "vrc4173: PCI resources are busy, aborting\n"); return err; } @@ -233,33 +430,46 @@ static int __devinit vrc4173_probe(struct pci_dev *pdev, set_vrc4173_io_offset(start); vrc4173_cmu_init(); + vrc4173_giu_init(); - vrc4173_icu_init(pdev->irq); + err = vrc4173_icu_init(dev->irq); + if (err < 0) { + printk(KERN_ERR "vrc4173: Invalid IRQ %d, aborting\n", dev->irq); + return err; + } - if ((err = vr41xx_cascade_irq(pdev->irq, vrc4173_get_irq_number)) < 0) { - printk(KERN_ERR - "vrc4173: IRQ resource %d is busy, aborting\n", pdev->irq); + err = vr41xx_cascade_irq(dev->irq, vrc4173_get_irq_number); + if (err < 0) { + printk(KERN_ERR "vrc4173: IRQ resource %d is busy, aborting\n", dev->irq); return err; } printk(KERN_INFO - "NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, pdev->irq); + "NEC VRC4173 at 0x%#08lx, IRQ is cascaded to %d\n", start, dev->irq); return 0; } +static void vrc4173_remove(struct pci_dev *dev) +{ + free_irq(dev->irq, NULL); + + pci_release_regions(dev); +} + static struct pci_driver vrc4173_driver = { .name = "NEC VRC4173", .probe = vrc4173_probe, - .remove = NULL, - .id_table = vrc4173_table, + .remove = vrc4173_remove, + .id_table = vrc4173_id_table, }; static int __devinit vrc4173_init(void) { int err; - if ((err = pci_module_init(&vrc4173_driver)) < 0) + err = pci_module_init(&vrc4173_driver); + if (err < 0) return err; vrc4173_initialized = 1; diff --git a/arch/mips/vr41xx/tanbac-tb0226/setup.c b/arch/mips/vr41xx/tanbac-tb0226/setup.c index 995a578e25f6..752c0e736920 100644 --- a/arch/mips/vr41xx/tanbac-tb0226/setup.c +++ b/arch/mips/vr41xx/tanbac-tb0226/setup.c @@ -18,59 +18,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/config.h> -#include <linux/ioport.h> -#include <asm/io.h> -#include <asm/pci_channel.h> -#include <asm/vr41xx/tb0226.h> - -#ifdef CONFIG_PCI -static struct resource vr41xx_pci_io_resource = { - .name = "PCI I/O space", - .start = VR41XX_PCI_IO_START, - .end = VR41XX_PCI_IO_END, - .flags = IORESOURCE_IO, -}; - -static struct resource vr41xx_pci_mem_resource = { - .name = "PCI memory space", - .start = VR41XX_PCI_MEM_START, - .end = VR41XX_PCI_MEM_END, - .flags = IORESOURCE_MEM, -}; - -extern struct pci_ops vr41xx_pci_ops; - -struct pci_controller vr41xx_controller[] = { - .pci_ops = &vr41xx_pci_ops, - .io_resource = &vr41xx_pci_io_resource, - .mem_resource = &vr41xx_pci_mem_resource, -}; - -struct vr41xx_pci_address_space vr41xx_pci_mem1 = { - .internal_base = VR41XX_PCI_MEM1_BASE, - .address_mask = VR41XX_PCI_MEM1_MASK, - .pci_base = IO_MEM1_RESOURCE_START, -}; - -struct vr41xx_pci_address_space vr41xx_pci_mem2 = { - .internal_base = VR41XX_PCI_MEM2_BASE, - .address_mask = VR41XX_PCI_MEM2_MASK, - .pci_base = IO_MEM2_RESOURCE_START, -}; - -struct vr41xx_pci_address_space vr41xx_pci_io = { - .internal_base = VR41XX_PCI_IO_BASE, - .address_mask = VR41XX_PCI_IO_MASK, - .pci_base = IO_PORT_RESOURCE_START, -}; - -static struct vr41xx_pci_address_map pci_address_map = { - .mem1 = &vr41xx_pci_mem1, - .mem2 = &vr41xx_pci_mem2, - .io = &vr41xx_pci_io, -}; -#endif +#include <asm/vr41xx/vr41xx.h> const char *get_system_type(void) { @@ -79,19 +28,11 @@ const char *get_system_type(void) static int tanbac_tb0226_setup(void) { - set_io_port_base(IO_PORT_BASE); - ioport_resource.start = IO_PORT_RESOURCE_START; - ioport_resource.end = IO_PORT_RESOURCE_END; - #ifdef CONFIG_SERIAL_8250 vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE); vr41xx_siu_init(); #endif -#ifdef CONFIG_PCI - vr41xx_pciu_init(&pci_address_map); -#endif - return 0; } diff --git a/arch/mips/vr41xx/tanbac-tb0229/Makefile b/arch/mips/vr41xx/tanbac-tb0229/Makefile index ff7429e8174a..dd085394a876 100644 --- a/arch/mips/vr41xx/tanbac-tb0229/Makefile +++ b/arch/mips/vr41xx/tanbac-tb0229/Makefile @@ -4,4 +4,4 @@ obj-y := setup.o -obj-$(CONFIG_TANBAC_TB0219) += reboot.o +obj-$(CONFIG_TANBAC_TB0219) += tb0219.o diff --git a/arch/mips/vr41xx/tanbac-tb0229/reboot.c b/arch/mips/vr41xx/tanbac-tb0229/reboot.c deleted file mode 100644 index 02e837879b1c..000000000000 --- a/arch/mips/vr41xx/tanbac-tb0229/reboot.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * FILE NAME - * arch/mips/vr41xx/tanbac-tb0229/reboot.c - * - * BRIEF MODULE DESCRIPTION - * Depending on TANBAC TB0229(VR4131DIMM) of reboot system call. - * - * Copyright 2003 Megasolution Inc. - * matsu@megasolution.jp - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include <linux/config.h> -#include <asm/io.h> -#include <asm/vr41xx/tb0229.h> - -#define tb0229_hard_reset() writew(0, TB0219_RESET_REGS) - -void tanbac_tb0229_restart(char *command) -{ - local_irq_disable(); - tb0229_hard_reset(); - while (1); -} diff --git a/arch/mips/vr41xx/tanbac-tb0229/setup.c b/arch/mips/vr41xx/tanbac-tb0229/setup.c index 971473e617a8..9209e3dc6db6 100644 --- a/arch/mips/vr41xx/tanbac-tb0229/setup.c +++ b/arch/mips/vr41xx/tanbac-tb0229/setup.c @@ -21,60 +21,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/config.h> -#include <linux/ioport.h> -#include <asm/io.h> -#include <asm/pci_channel.h> -#include <asm/reboot.h> -#include <asm/vr41xx/tb0229.h> - -#ifdef CONFIG_PCI -static struct resource vr41xx_pci_io_resource = { - .name = "PCI I/O space", - .start = VR41XX_PCI_IO_START, - .end = VR41XX_PCI_IO_END, - .flags = IORESOURCE_IO, -}; - -static struct resource vr41xx_pci_mem_resource = { - .name = "PCI memory space", - .start = VR41XX_PCI_MEM_START, - .end = VR41XX_PCI_MEM_END, - .flags = IORESOURCE_MEM, -}; - -extern struct pci_ops vr41xx_pci_ops; - -struct pci_controller vr41xx_controller = { - .pci_ops = &vr41xx_pci_ops, - .io_resource = &vr41xx_pci_io_resource, - .mem_resource = &vr41xx_pci_mem_resource, -}; - -struct vr41xx_pci_address_space vr41xx_pci_mem1 = { - .internal_base = VR41XX_PCI_MEM1_BASE, - .address_mask = VR41XX_PCI_MEM1_MASK, - .pci_base = IO_MEM1_RESOURCE_START, -}; - -struct vr41xx_pci_address_space vr41xx_pci_mem2 = { - .internal_base = VR41XX_PCI_MEM2_BASE, - .address_mask = VR41XX_PCI_MEM2_MASK, - .pci_base = IO_MEM2_RESOURCE_START, -}; - -struct vr41xx_pci_address_space vr41xx_pci_io = { - .internal_base = VR41XX_PCI_IO_BASE, - .address_mask = VR41XX_PCI_IO_MASK, - .pci_base = IO_PORT_RESOURCE_START -}; - -static struct vr41xx_pci_address_map pci_address_map = { - .mem1 = &vr41xx_pci_mem1, - .mem2 = &vr41xx_pci_mem2, - .io = &vr41xx_pci_io, -}; -#endif +#include <asm/vr41xx/vr41xx.h> const char *get_system_type(void) { @@ -83,24 +31,12 @@ const char *get_system_type(void) static int tanbac_tb0229_setup(void) { - set_io_port_base(IO_PORT_BASE); - ioport_resource.start = IO_PORT_RESOURCE_START; - ioport_resource.end = IO_PORT_RESOURCE_END; - #ifdef CONFIG_SERIAL_8250 vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE); vr41xx_siu_init(); vr41xx_dsiu_init(); #endif -#ifdef CONFIG_PCI - vr41xx_pciu_init(&pci_address_map); -#endif - -#ifdef CONFIG_TANBAC_TB0219 - _machine_restart = tanbac_tb0229_restart; -#endif - return 0; } diff --git a/arch/mips/vr41xx/tanbac-tb0229/tb0219.c b/arch/mips/vr41xx/tanbac-tb0229/tb0219.c new file mode 100644 index 000000000000..a07d9fa454ab --- /dev/null +++ b/arch/mips/vr41xx/tanbac-tb0229/tb0219.c @@ -0,0 +1,44 @@ +/* + * tb0219.c, Setup for the TANBAC TB0219 + * + * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> + * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#include <linux/init.h> + +#include <asm/io.h> +#include <asm/reboot.h> + +#define TB0219_RESET_REGS KSEG1ADDR(0x0a00000e) + +#define tb0219_hard_reset() writew(0, TB0219_RESET_REGS) + +static void tanbac_tb0219_restart(char *command) +{ + local_irq_disable(); + tb0219_hard_reset(); + while (1); +} + +static int __init tanbac_tb0219_setup(void) +{ + _machine_restart = tanbac_tb0219_restart; + + return 0; +} + +early_initcall(tanbac_tb0219_setup); diff --git a/arch/mips/vr41xx/victor-mpc30x/setup.c b/arch/mips/vr41xx/victor-mpc30x/setup.c index 5fc2084962c4..169ac00a1531 100644 --- a/arch/mips/vr41xx/victor-mpc30x/setup.c +++ b/arch/mips/vr41xx/victor-mpc30x/setup.c @@ -18,59 +18,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/config.h> -#include <linux/ioport.h> -#include <asm/io.h> -#include <asm/pci_channel.h> -#include <asm/vr41xx/mpc30x.h> - -#ifdef CONFIG_PCI -static struct resource vr41xx_pci_io_resource = { - "PCI I/O space", - VR41XX_PCI_IO_START, - VR41XX_PCI_IO_END, - IORESOURCE_IO -}; - -static struct resource vr41xx_pci_mem_resource = { - "PCI memory space", - VR41XX_PCI_MEM_START, - VR41XX_PCI_MEM_END, - IORESOURCE_MEM -}; - -extern struct pci_ops vr41xx_pci_ops; - -struct pci_controller vr41xx_controller[] = { - .pci_ops = &vr41xx_pci_ops, - .io_resource = &vr41xx_pci_io_resource, - .mem_resource = &vr41xx_pci_mem_resource, -}; - -struct vr41xx_pci_address_space vr41xx_pci_mem1 = { - VR41XX_PCI_MEM1_BASE, - VR41XX_PCI_MEM1_MASK, - IO_MEM1_RESOURCE_START -}; - -struct vr41xx_pci_address_space vr41xx_pci_mem2 = { - VR41XX_PCI_MEM2_BASE, - VR41XX_PCI_MEM2_MASK, - IO_MEM2_RESOURCE_START -}; - -struct vr41xx_pci_address_space vr41xx_pci_io = { - VR41XX_PCI_IO_BASE, - VR41XX_PCI_IO_MASK, - IO_PORT_RESOURCE_START -}; - -static struct vr41xx_pci_address_map pci_address_map = { - &vr41xx_pci_mem1, - &vr41xx_pci_mem2, - &vr41xx_pci_io -}; -#endif +#include <asm/vr41xx/vr41xx.h> const char *get_system_type(void) { @@ -79,19 +28,11 @@ const char *get_system_type(void) static int victor_mpc30x_setup(void) { - set_io_port_base(IO_PORT_BASE); - ioport_resource.start = IO_PORT_RESOURCE_START; - ioport_resource.end = IO_PORT_RESOURCE_END; - #ifdef CONFIG_SERIAL_8250 vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE); vr41xx_siu_init(); #endif -#ifdef CONFIG_PCI - vr41xx_pciu_init(&pci_address_map); -#endif - return 0; } diff --git a/arch/mips/vr41xx/zao-capcella/setup.c b/arch/mips/vr41xx/zao-capcella/setup.c index 8b1e178ae9df..35b3a0a92f3d 100644 --- a/arch/mips/vr41xx/zao-capcella/setup.c +++ b/arch/mips/vr41xx/zao-capcella/setup.c @@ -18,59 +18,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/config.h> -#include <linux/ioport.h> -#include <asm/io.h> -#include <asm/pci_channel.h> -#include <asm/vr41xx/capcella.h> - -#ifdef CONFIG_PCI -static struct resource vr41xx_pci_io_resource = { - "PCI I/O space", - VR41XX_PCI_IO_START, - VR41XX_PCI_IO_END, - IORESOURCE_IO -}; - -static struct resource vr41xx_pci_mem_resource = { - "PCI memory space", - VR41XX_PCI_MEM_START, - VR41XX_PCI_MEM_END, - IORESOURCE_MEM -}; - -extern struct pci_ops vr41xx_pci_ops; - -struct pci_controller vr41xx_controller = { - .pci_ops = &vr41xx_pci_ops, - .io_resource = &vr41xx_pci_io_resource, - .mem_resource = &vr41xx_pci_mem_resource, -}; - -struct vr41xx_pci_address_space vr41xx_pci_mem1 = { - VR41XX_PCI_MEM1_BASE, - VR41XX_PCI_MEM1_MASK, - IO_MEM1_RESOURCE_START -}; - -struct vr41xx_pci_address_space vr41xx_pci_mem2 = { - VR41XX_PCI_MEM2_BASE, - VR41XX_PCI_MEM2_MASK, - IO_MEM2_RESOURCE_START -}; - -struct vr41xx_pci_address_space vr41xx_pci_io = { - VR41XX_PCI_IO_BASE, - VR41XX_PCI_IO_MASK, - IO_PORT_RESOURCE_START -}; - -static struct vr41xx_pci_address_map pci_address_map = { - &vr41xx_pci_mem1, - &vr41xx_pci_mem2, - &vr41xx_pci_io -}; -#endif +#include <asm/vr41xx/vr41xx.h> const char *get_system_type(void) { @@ -79,20 +28,12 @@ const char *get_system_type(void) static int zao_capcella_setup(void) { - set_io_port_base(IO_PORT_BASE); - ioport_resource.start = IO_PORT_RESOURCE_START; - ioport_resource.end = IO_PORT_RESOURCE_END; - #ifdef CONFIG_SERIAL_8250 vr41xx_select_siu_interface(SIU_RS232C, IRDA_NONE); vr41xx_siu_init(); vr41xx_dsiu_init(); #endif -#ifdef CONFIG_PCI - vr41xx_pciu_init(&pci_address_map); -#endif - return 0; } diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 72f748905f18..ca1acad13e09 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -644,7 +644,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c index 820adb178f70..98b6f4c2cf6f 100644 --- a/arch/parisc/kernel/setup.c +++ b/arch/parisc/kernel/setup.c @@ -45,8 +45,6 @@ #include <asm/pdc_chassis.h> #include <asm/io.h> -#define COMMAND_LINE_SIZE 1024 -char saved_command_line[COMMAND_LINE_SIZE]; char command_line[COMMAND_LINE_SIZE]; /* Intended for ccio/sba/cpu statistics under /proc/bus/{runway|gsc} */ diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c index e7a8b1bc9ae4..94f5d4e60920 100644 --- a/arch/parisc/mm/init.c +++ b/arch/parisc/mm/init.c @@ -484,7 +484,8 @@ void show_mem(void) printk(KERN_INFO "Mem-info:\n"); show_free_areas(); - printk(KERN_INFO "Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk(KERN_INFO "Free swap: %6ldkB\n", + nr_swap_pages<<(PAGE_SHIFT-10)); i = max_mapnr; while (i-- > 0) { total++; diff --git a/arch/ppc/kernel/irq.c b/arch/ppc/kernel/irq.c index f3c0d2cc2205..6da092941c73 100644 --- a/arch/ppc/kernel/irq.c +++ b/arch/ppc/kernel/irq.c @@ -241,7 +241,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->dev_id = dev_id; action->next = NULL; diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c index 18a2f147d412..a46602e33b80 100644 --- a/arch/ppc/kernel/setup.c +++ b/arch/ppc/kernel/setup.c @@ -54,7 +54,6 @@ extern void ppc6xx_idle(void); extern void power4_idle(void); extern boot_infos_t *boot_infos; -char saved_command_line[COMMAND_LINE_SIZE]; unsigned char aux_device_present; struct ide_machdep_calls ppc_ide_md; char *sysmap; diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c index b53c0f0f3347..448e80c11518 100644 --- a/arch/ppc/mm/init.c +++ b/arch/ppc/mm/init.c @@ -118,7 +118,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); i = max_mapnr; while (i-- > 0) { total++; diff --git a/arch/ppc/platforms/lopec_setup.c b/arch/ppc/platforms/lopec_setup.c index c231f67d73c6..d675b76a9838 100644 --- a/arch/ppc/platforms/lopec_setup.c +++ b/arch/ppc/platforms/lopec_setup.c @@ -33,7 +33,6 @@ #include <asm/hw_irq.h> #include <asm/prep_nvram.h> -extern char saved_command_line[]; extern void lopec_find_bridges(void); /* diff --git a/arch/ppc/platforms/pmac_setup.c b/arch/ppc/platforms/pmac_setup.c index d89cfe2ae765..b05cee1f7216 100644 --- a/arch/ppc/platforms/pmac_setup.c +++ b/arch/ppc/platforms/pmac_setup.c @@ -103,8 +103,6 @@ int has_l2cache = 0; static int current_root_goodness = -1; -extern char saved_command_line[]; - extern int pmac_newworld; #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */ diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c index 6fc3ca978728..673641ff4bf5 100644 --- a/arch/ppc/platforms/pplus.c +++ b/arch/ppc/platforms/pplus.c @@ -48,8 +48,6 @@ TODC_ALLOC(); -extern char saved_command_line[]; - extern void pplus_setup_hose(void); extern void pplus_set_VIA_IDE_native(void); diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c index 7c3623bcce39..4362597e191e 100644 --- a/arch/ppc/platforms/prep_setup.c +++ b/arch/ppc/platforms/prep_setup.c @@ -76,7 +76,6 @@ extern void rs_nvram_write_val(int addr, extern void ibm_prep_init(void); extern void prep_find_bridges(void); -extern char saved_command_line[]; int _prep_type; diff --git a/arch/ppc64/kernel/eeh.c b/arch/ppc64/kernel/eeh.c index dc83803db216..6f2d189d44c9 100644 --- a/arch/ppc64/kernel/eeh.c +++ b/arch/ppc64/kernel/eeh.c @@ -365,7 +365,8 @@ unsigned long eeh_check_failure(void *token, unsigned long val) unsigned long addr; struct pci_dev *dev; struct device_node *dn; - unsigned long ret, rets[2]; + unsigned long ret; + int rets[2]; static spinlock_t lock = SPIN_LOCK_UNLOCKED; /* dont want this on the stack */ static unsigned char slot_err_buf[RTAS_ERROR_LOG_MAX]; @@ -444,11 +445,11 @@ unsigned long eeh_check_failure(void *token, unsigned long val) * can use it here. */ if (panic_on_oops) { - panic("EEH: MMIO failure (%ld) on device:%s %s\n", + panic("EEH: MMIO failure (%d) on device:%s %s\n", rets[0], pci_name(dev), pci_pretty_name(dev)); } else { __get_cpu_var(ignored_failures)++; - printk(KERN_INFO "EEH: MMIO failure (%ld) on device:%s %s\n", + printk(KERN_INFO "EEH: MMIO failure (%d) on device:%s %s\n", rets[0], pci_name(dev), pci_pretty_name(dev)); } } else { diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S index 83601a8b05f4..48dd1829e7c4 100644 --- a/arch/ppc64/kernel/head.S +++ b/arch/ppc64/kernel/head.S @@ -35,6 +35,7 @@ #include <asm/offsets.h> #include <asm/bug.h> #include <asm/cputable.h> +#include <asm/setup.h> #ifdef CONFIG_PPC_ISERIES #define DO_SOFT_DISABLE @@ -43,8 +44,8 @@ /* * hcall interface to pSeries LPAR */ -#define HVSC .long 0x44000022 -#define H_SET_ASR 0x30 +#define HVSC .long 0x44000022 +#define H_SET_ASR 0x30 /* * We layout physical memory as follows: @@ -53,19 +54,19 @@ * 0x3000 - 0x3fff : Interrupt support * 0x4000 - 0x4fff : NACA * 0x5000 - 0x5fff : SystemCfg - * 0x6000 : iSeries and common interrupt prologs + * 0x6000 : iSeries and common interrupt prologs * 0x9000 - 0x9fff : Initial segment table */ /* * SPRG Usage * - * Register Definition + * Register Definition * - * SPRG0 reserved for hypervisor - * SPRG1 temp - used to save gpr - * SPRG2 temp - used to save gpr - * SPRG3 virt addr of paca + * SPRG0 reserved for hypervisor + * SPRG1 temp - used to save gpr + * SPRG2 temp - used to save gpr + * SPRG3 virt addr of paca */ /* @@ -106,7 +107,7 @@ END_FTR_SECTION(0, 1) * to the pidhash table (also used by the debugger) */ .llong msChunks-KERNELBASE - .llong 0 /* pidhash-KERNELBASE SFRXXX */ + .llong 0 /* pidhash-KERNELBASE SFRXXX */ /* Offset 0x38 - Pointer to start of embedded System.map */ .globl embedded_sysmap_start @@ -121,13 +122,13 @@ embedded_sysmap_end: /* Secondary processors spin on this value until it goes to 1. */ .globl __secondary_hold_spinloop __secondary_hold_spinloop: - .llong 0x0 + .llong 0x0 /* Secondary processors write this value with their cpu # */ - /* after they enter the spin loop immediately below. */ - .globl __secondary_hold_acknowledge + /* after they enter the spin loop immediately below. */ + .globl __secondary_hold_acknowledge __secondary_hold_acknowledge: - .llong 0x0 + .llong 0x0 . = 0x60 /* @@ -143,25 +144,25 @@ _GLOBAL(__secondary_hold) mtmsrd r24 /* RI on */ /* Grab our linux cpu number */ - mr r24,r3 + mr r24,r3 /* Tell the master cpu we're here */ /* Relocation is off & we are located at an address less */ /* than 0x100, so only need to grab low order offset. */ - std r24,__secondary_hold_acknowledge@l(0) + std r24,__secondary_hold_acknowledge@l(0) sync /* All secondary cpu's wait here until told to start. */ -100: ld r4,__secondary_hold_spinloop@l(0) - cmpdi 0,r4,1 - bne 100b +100: ld r4,__secondary_hold_spinloop@l(0) + cmpdi 0,r4,1 + bne 100b #ifdef CONFIG_HMT b .hmt_init #else #ifdef CONFIG_SMP - mr r3,r24 - b .pseries_secondary_smp_init + mr r3,r24 + b .pseries_secondary_smp_init #else BUG_OPCODE #endif @@ -200,7 +201,7 @@ exception_marker: #define EX_SRR0 40 #define EX_DAR 48 #define EX_DSISR 56 -#define EX_CCR 60 +#define EX_CCR 60 #define EXCEPTION_PROLOG_PSERIES(area, label) \ mfspr r13,SPRG3; /* get paca address into r13 */ \ @@ -255,10 +256,10 @@ exception_marker: #define EXCEPTION_PROLOG_COMMON(n, area) \ andi. r10,r12,MSR_PR; /* See if coming from user */ \ mr r10,r1; /* Save r1 */ \ - subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ - beq- 1f; \ + subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ + beq- 1f; \ ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ -1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ +1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ bge- cr1,bad_stack; /* abort if it is */ \ std r9,_CCR(r1); /* save CR in stackframe */ \ std r11,_NIP(r1); /* save SRR0 in stackframe */ \ @@ -296,7 +297,7 @@ exception_marker: /* * Exception vectors. */ -#define STD_EXCEPTION_PSERIES(n, label ) \ +#define STD_EXCEPTION_PSERIES(n, label) \ . = n; \ .globl label##_Pseries; \ label##_Pseries: \ @@ -311,7 +312,7 @@ label##_Iseries: \ EXCEPTION_PROLOG_ISERIES_2; \ b label##_common -#define MASKABLE_EXCEPTION_ISERIES( n, label ) \ +#define MASKABLE_EXCEPTION_ISERIES(n, label) \ .globl label##_Iseries; \ label##_Iseries: \ mtspr SPRG1,r13; /* save r13 */ \ @@ -375,7 +376,7 @@ label##_Iseries_profile: \ #endif -#define STD_EXCEPTION_COMMON( trap, label, hdlr ) \ +#define STD_EXCEPTION_COMMON(trap, label, hdlr) \ .align 7; \ .globl label##_common; \ label##_common: \ @@ -383,8 +384,8 @@ label##_common: \ DISABLE_INTS; \ bl .save_nvgprs; \ addi r3,r1,STACK_FRAME_OVERHEAD; \ - bl hdlr; \ - b .ret_from_except + bl hdlr; \ + b .ret_from_except #define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \ .align 7; \ @@ -403,7 +404,7 @@ label##_common: \ .globl __start_interrupts __start_interrupts: - STD_EXCEPTION_PSERIES( 0x100, SystemReset ) + STD_EXCEPTION_PSERIES(0x100, SystemReset) . = 0x200 .globl MachineCheck_Pseries @@ -443,15 +444,15 @@ DataAccessSLB_Pseries: mfspr r12,SPRG2 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, DataAccessSLB_common) - STD_EXCEPTION_PSERIES( 0x400, InstructionAccess ) - STD_EXCEPTION_PSERIES( 0x480, InstructionAccessSLB ) - STD_EXCEPTION_PSERIES( 0x500, HardwareInterrupt ) - STD_EXCEPTION_PSERIES( 0x600, Alignment ) - STD_EXCEPTION_PSERIES( 0x700, ProgramCheck ) - STD_EXCEPTION_PSERIES( 0x800, FPUnavailable ) - STD_EXCEPTION_PSERIES( 0x900, Decrementer ) - STD_EXCEPTION_PSERIES( 0xa00, Trap_0a ) - STD_EXCEPTION_PSERIES( 0xb00, Trap_0b ) + STD_EXCEPTION_PSERIES(0x400, InstructionAccess) + STD_EXCEPTION_PSERIES(0x480, InstructionAccessSLB) + STD_EXCEPTION_PSERIES(0x500, HardwareInterrupt) + STD_EXCEPTION_PSERIES(0x600, Alignment) + STD_EXCEPTION_PSERIES(0x700, ProgramCheck) + STD_EXCEPTION_PSERIES(0x800, FPUnavailable) + STD_EXCEPTION_PSERIES(0x900, Decrementer) + STD_EXCEPTION_PSERIES(0xa00, Trap_0a) + STD_EXCEPTION_PSERIES(0xb00, Trap_0b) . = 0xc00 .globl SystemCall_Pseries @@ -469,8 +470,8 @@ SystemCall_Pseries: mtspr SRR1,r10 rfid - STD_EXCEPTION_PSERIES( 0xd00, SingleStep ) - STD_EXCEPTION_PSERIES( 0xe00, Trap_0e ) + STD_EXCEPTION_PSERIES(0xd00, SingleStep) + STD_EXCEPTION_PSERIES(0xe00, Trap_0e) /* We need to deal with the Altivec unavailable exception * here which is at 0xf20, thus in the middle of the @@ -482,12 +483,12 @@ SystemCall_Pseries: STD_EXCEPTION_PSERIES(0xf20, AltivecUnavailable) - STD_EXCEPTION_PSERIES( 0x1300, InstructionBreakpoint ) - STD_EXCEPTION_PSERIES( 0x1700, AltivecAssist ) + STD_EXCEPTION_PSERIES(0x1300, InstructionBreakpoint) + STD_EXCEPTION_PSERIES(0x1700, AltivecAssist) /* moved from 0xf00 */ STD_EXCEPTION_PSERIES(0x3000, PerformanceMonitor) - + . = 0x3100 _GLOBAL(do_stab_bolted_Pseries) mtcrf 0x80,r12 @@ -498,8 +499,8 @@ _GLOBAL(do_slb_bolted_Pseries) mtcrf 0x80,r12 mfspr r12,SPRG2 EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_slb_bolted) + - /* Space for the naca. Architected to be located at real address * NACA_PHYS_ADDR. Various tools rely on this location being fixed. * The first dword of the naca is required by iSeries LPAR to @@ -538,16 +539,16 @@ __end_systemcfg: * VSID generation algorithm. See include/asm/mmu_context.h. */ - .llong 1 /* # ESIDs to be mapped by hypervisor */ + .llong 1 /* # ESIDs to be mapped by hypervisor */ .llong 1 /* # memory ranges to be mapped by hypervisor */ - .llong STAB0_PAGE /* Page # of segment table within load area */ + .llong STAB0_PAGE /* Page # of segment table within load area */ + .llong 0 /* Reserved */ + .llong 0 /* Reserved */ .llong 0 /* Reserved */ - .llong 0 /* Reserved */ - .llong 0 /* Reserved */ .llong 0 /* Reserved */ .llong 0 /* Reserved */ .llong 0x0c00000000 /* ESID to map (Kernel at EA = 0xC000000000000000) */ - .llong 0x06a99b4b14 /* VSID to map (Kernel at VA = 0x6a99b4b140000000) */ + .llong 0x06a99b4b14 /* VSID to map (Kernel at VA = 0x6a99b4b140000000) */ .llong 8192 /* # pages to map (32 MB) */ .llong 0 /* Offset from start of loadarea to start of map */ .llong 0x0006a99b4b140000 /* VPN of first page to map */ @@ -662,7 +663,7 @@ iseries_secondary_smp_loop: rldicr r3,r3,32,15 /* r0 = (r3 << 32) & 0xffff000000000000 */ #else /* CONFIG_SMP */ /* Yield the processor. This is required for non-SMP kernels - which are running on multi-threaded machines. */ + which are running on multi-threaded machines. */ lis r3,0x8000 rldicr r3,r3,32,15 /* r3 = (r3 << 32) & 0xffff000000000000 */ addi r3,r3,18 /* r3 = 0x8000000000000012 which is "yield" */ @@ -701,7 +702,7 @@ HardwareInterrupt_Iseries_masked: /* * Data area reserved for FWNMI option. */ - .= 0x7000 + .= 0x7000 .globl fwnmi_data_area fwnmi_data_area: @@ -734,7 +735,7 @@ __end_stab: /*** Common interrupt handlers ***/ - STD_EXCEPTION_COMMON( 0x100, SystemReset, .SystemResetException ) + STD_EXCEPTION_COMMON(0x100, SystemReset, .SystemResetException) /* * Machine check is different because we use a different @@ -751,16 +752,16 @@ MachineCheck_common: b .ret_from_except STD_EXCEPTION_COMMON_LITE(0x900, Decrementer, .timer_interrupt) - STD_EXCEPTION_COMMON( 0xa00, Trap_0a, .UnknownException ) - STD_EXCEPTION_COMMON( 0xb00, Trap_0b, .UnknownException ) - STD_EXCEPTION_COMMON( 0xd00, SingleStep, .SingleStepException ) - STD_EXCEPTION_COMMON( 0xe00, Trap_0e, .UnknownException ) - STD_EXCEPTION_COMMON( 0xf00, PerformanceMonitor, .PerformanceMonitorException ) - STD_EXCEPTION_COMMON(0x1300, InstructionBreakpoint, .InstructionBreakpointException ) + STD_EXCEPTION_COMMON(0xa00, Trap_0a, .UnknownException) + STD_EXCEPTION_COMMON(0xb00, Trap_0b, .UnknownException) + STD_EXCEPTION_COMMON(0xd00, SingleStep, .SingleStepException) + STD_EXCEPTION_COMMON(0xe00, Trap_0e, .UnknownException) + STD_EXCEPTION_COMMON(0xf00, PerformanceMonitor, .PerformanceMonitorException) + STD_EXCEPTION_COMMON(0x1300, InstructionBreakpoint, .InstructionBreakpointException) #ifdef CONFIG_ALTIVEC - STD_EXCEPTION_COMMON(0x1700, AltivecAssist, .AltivecAssistException ) + STD_EXCEPTION_COMMON(0x1700, AltivecAssist, .AltivecAssistException) #else - STD_EXCEPTION_COMMON(0x1700, AltivecAssist, .UnknownException ) + STD_EXCEPTION_COMMON(0x1700, AltivecAssist, .UnknownException) #endif /* @@ -787,7 +788,7 @@ bad_stack: std r10,_LINK(r1) std r11,_CTR(r1) std r12,_XER(r1) - SAVE_GPR(0, r1) + SAVE_GPR(0,r1) SAVE_GPR(2,r1) SAVE_4GPRS(3,r1) SAVE_2GPRS(7,r1) @@ -815,13 +816,13 @@ fast_exception_return: ld r11,_NIP(r1) andi. r3,r12,MSR_RI /* check if RI is set */ beq- unrecov_fer - ld r3,_CCR(r1) - ld r4,_LINK(r1) - ld r5,_CTR(r1) - ld r6,_XER(r1) - mtcr r3 - mtlr r4 - mtctr r5 + ld r3,_CCR(r1) + ld r4,_LINK(r1) + ld r5,_CTR(r1) + ld r6,_XER(r1) + mtcr r3 + mtlr r4 + mtctr r5 mtxer r6 REST_GPR(0, r1) REST_8GPRS(2, r1) @@ -833,7 +834,7 @@ fast_exception_return: mtspr SRR1,r12 mtspr SRR0,r11 REST_4GPRS(10, r1) - ld r1,GPR1(r1) + ld r1,GPR1(r1) rfid unrecov_fer: @@ -870,7 +871,7 @@ DataAccessSLB_common: std r3,_DAR(r1) bl .slb_allocate cmpdi r3,0 /* Check return code */ - beq fast_exception_return /* Return if we succeeded */ + beq fast_exception_return /* Return if we succeeded */ li r5,0 std r5,_DSISR(r1) b .handle_page_fault @@ -891,7 +892,7 @@ InstructionAccessSLB_common: ld r3,_NIP(r1) /* SRR0 = NIA */ bl .slb_allocate or. r3,r3,r3 /* Check return code */ - beq+ fast_exception_return /* Return if we succeeded */ + beq+ fast_exception_return /* Return if we succeeded */ ld r4,_NIP(r1) li r5,0 @@ -907,7 +908,7 @@ HardwareInterrupt_common: HardwareInterrupt_entry: DISABLE_INTS addi r3,r1,STACK_FRAME_OVERHEAD - bl .do_IRQ + bl .do_IRQ b .ret_from_except_lite .align 7 @@ -925,8 +926,8 @@ Alignment_common: bl .save_nvgprs addi r3,r1,STACK_FRAME_OVERHEAD ENABLE_INTS - bl .AlignmentException - b .ret_from_except + bl .AlignmentException + b .ret_from_except .align 7 .globl ProgramCheck_common @@ -935,8 +936,8 @@ ProgramCheck_common: bl .save_nvgprs addi r3,r1,STACK_FRAME_OVERHEAD ENABLE_INTS - bl .ProgramCheckException - b .ret_from_except + bl .ProgramCheckException + b .ret_from_except .align 7 .globl FPUnavailable_common @@ -946,7 +947,7 @@ FPUnavailable_common: bl .save_nvgprs addi r3,r1,STACK_FRAME_OVERHEAD ENABLE_INTS - bl .KernelFPUnavailableException + bl .KernelFPUnavailableException BUG_OPCODE .align 7 @@ -961,7 +962,7 @@ AltivecUnavailable_common: ENABLE_INTS bl .AltivecUnavailableException b .ret_from_except - + /* * Hash table stuff */ @@ -1091,19 +1092,19 @@ _GLOBAL(do_stab_bolted) andi. r11,r10,0x70 bne 1b - /* Stick for only searching the primary group for now. */ + /* Stick for only searching the primary group for now. */ /* At least for now, we use a very simple random castout scheme */ - /* Use the TB as a random number ; OR in 1 to avoid entry 0 */ + /* Use the TB as a random number ; OR in 1 to avoid entry 0 */ mftb r11 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */ ori r11,r11,0x10 /* r10 currently points to an ste one past the group of interest */ - /* make it point to the randomly selected entry */ + /* make it point to the randomly selected entry */ subi r10,r10,128 or r10,r10,r11 /* r10 is the entry to invalidate */ - isync /* mark the entry invalid */ + isync /* mark the entry invalid */ ld r11,0(r10) rldicl r11,r11,56,1 /* clear the valid bit */ rotldi r11,r11,8 @@ -1301,24 +1302,24 @@ _GLOBAL(pseries_secondary_smp_init) isync /* Set up a paca value for this processor. */ - LOADADDR(r24, paca) /* Get base vaddr of paca array */ - mulli r13,r3,PACA_SIZE /* Calculate vaddr of right paca */ - add r13,r13,r24 /* for this processor. */ + LOADADDR(r24, paca) /* Get base vaddr of paca array */ + mulli r13,r3,PACA_SIZE /* Calculate vaddr of right paca */ + add r13,r13,r24 /* for this processor. */ - mtspr SPRG3,r13 /* Save vaddr of paca in SPRG3 */ - mr r24,r3 /* __secondary_start needs cpu# */ + mtspr SPRG3,r13 /* Save vaddr of paca in SPRG3 */ + mr r24,r3 /* __secondary_start needs cpu# */ 1: HMT_LOW - lbz r23,PACAPROCSTART(r13) /* Test if this processor should */ - /* start. */ + lbz r23,PACAPROCSTART(r13) /* Test if this processor should */ + /* start. */ sync - /* Create a temp kernel stack for use before relocation is on. */ - mr r1,r13 - addi r1,r1,PACAGUARD - addi r1,r1,0x1000 - subi r1,r1,STACK_FRAME_OVERHEAD + /* Create a temp kernel stack for use before relocation is on. */ + mr r1,r13 + addi r1,r1,PACAGUARD + addi r1,r1,0x1000 + subi r1,r1,STACK_FRAME_OVERHEAD cmpwi 0,r23,0 #ifdef CONFIG_SMP @@ -1326,7 +1327,7 @@ _GLOBAL(pseries_secondary_smp_init) bne .__secondary_start #endif #endif - b 1b /* Loop until told to go */ + b 1b /* Loop until told to go */ #ifdef CONFIG_PPC_ISERIES _GLOBAL(__start_initialization_iSeries) /* Clear out the BSS */ @@ -1334,13 +1335,13 @@ _GLOBAL(__start_initialization_iSeries) LOADADDR(r8,__bss_start) - sub r11,r11,r8 /* bss size */ - addi r11,r11,7 /* round up to an even double word */ - rldicl. r11,r11,61,3 /* shift right by 3 */ + sub r11,r11,r8 /* bss size */ + addi r11,r11,7 /* round up to an even double word */ + rldicl. r11,r11,61,3 /* shift right by 3 */ beq 4f addi r8,r8,-8 li r0,0 - mtctr r11 /* zero this many doublewords */ + mtctr r11 /* zero this many doublewords */ 3: stdu r0,8(r8) bdnz 3b 4: @@ -1367,10 +1368,10 @@ _GLOBAL(__start_initialization_iSeries) std r4,0(r9) /* set the naca pointer */ /* Get the pointer to the segment table */ - ld r6,PACA(r4) /* Get the base paca pointer */ + ld r6,PACA(r4) /* Get the base paca pointer */ ld r4,PACASTABVIRT(r6) - bl .iSeries_fixup_klimit + bl .iSeries_fixup_klimit /* relocation is on at this point */ @@ -1401,8 +1402,8 @@ _GLOBAL(__start_initialization_pSeries) bl .reloc_offset LOADADDR(r2,__toc_start) - addi r2,r2,0x4000 - addi r2,r2,0x4000 + addi r2,r2,0x4000 + addi r2,r2,0x4000 /* Relocate the TOC from a virt addr to a real addr */ sub r2,r2,r3 @@ -1443,33 +1444,33 @@ _STATIC(__after_prom_start) * unknown exception placeholders. * * Note: This process overwrites the OF exception vectors. - * r26 == relocation offset - * r27 == KERNELBASE + * r26 == relocation offset + * r27 == KERNELBASE */ bl .reloc_offset mr r26,r3 SET_REG_TO_CONST(r27,KERNELBASE) - li r3,0 /* target addr */ + li r3,0 /* target addr */ // XXX FIXME: Use phys returned by OF (r23) - sub r4,r27,r26 /* source addr */ - /* current address of _start */ - /* i.e. where we are running */ - /* the source addr */ + sub r4,r27,r26 /* source addr */ + /* current address of _start */ + /* i.e. where we are running */ + /* the source addr */ - LOADADDR(r5,copy_to_here) /* # bytes of memory to copy */ + LOADADDR(r5,copy_to_here) /* # bytes of memory to copy */ sub r5,r5,r27 - li r6,0x100 /* Start offset, the first 0x100 */ - /* bytes were copied earlier. */ + li r6,0x100 /* Start offset, the first 0x100 */ + /* bytes were copied earlier. */ - bl .copy_and_flush /* copy the first n bytes */ - /* this includes the code being */ - /* executed here. */ + bl .copy_and_flush /* copy the first n bytes */ + /* this includes the code being */ + /* executed here. */ - LOADADDR(r0, 4f) /* Jump to the copy of this code */ - mtctr r0 /* that we just made/relocated */ + LOADADDR(r0, 4f) /* Jump to the copy of this code */ + mtctr r0 /* that we just made/relocated */ bctr 4: LOADADDR(r5,klimit) @@ -1491,23 +1492,23 @@ _STATIC(__after_prom_start) _GLOBAL(copy_and_flush) addi r5,r5,-8 addi r6,r6,-8 -4: li r0,16 /* Use the least common */ - /* denominator cache line */ - /* size. This results in */ - /* extra cache line flushes */ - /* but operation is correct. */ - /* Can't get cache line size */ - /* from NACA as it is being */ - /* moved too. */ - - mtctr r0 /* put # words/line in ctr */ -3: addi r6,r6,8 /* copy a cache line */ +4: li r0,16 /* Use the least common */ + /* denominator cache line */ + /* size. This results in */ + /* extra cache line flushes */ + /* but operation is correct. */ + /* Can't get cache line size */ + /* from NACA as it is being */ + /* moved too. */ + + mtctr r0 /* put # words/line in ctr */ +3: addi r6,r6,8 /* copy a cache line */ ldx r0,r6,r4 stdx r0,r6,r3 bdnz 3b - dcbst r6,r3 /* write it to memory */ + dcbst r6,r3 /* write it to memory */ sync - icbi r6,r3 /* flush the icache line */ + icbi r6,r3 /* flush the icache line */ cmpld 0,r6,r5 blt 4b sync @@ -1528,9 +1529,9 @@ copy_to_here: * On entry: r13 == 'current' && last_task_used_math != 'current' */ _STATIC(load_up_fpu) - mfmsr r5 /* grab the current MSR */ + mfmsr r5 /* grab the current MSR */ ori r5,r5,MSR_FP - mtmsrd r5 /* enable use of fpu now */ + mtmsrd r5 /* enable use of fpu now */ isync /* * For SMP, we don't do lazy FPU switching because it just gets too @@ -1579,10 +1580,10 @@ _STATIC(load_up_fpu) * Disable the FPU. */ _GLOBAL(disable_kernel_fp) - mfmsr r3 - rldicl r0,r3,(63-MSR_FP_LG),1 - rldicl r3,r0,(MSR_FP_LG+1),0 - mtmsrd r3 /* disable use of fpu now */ + mfmsr r3 + rldicl r0,r3,(63-MSR_FP_LG),1 + rldicl r3,r0,(MSR_FP_LG+1),0 + mtmsrd r3 /* disable use of fpu now */ isync blr @@ -1631,9 +1632,9 @@ _GLOBAL(giveup_fpu) * On entry: r13 == 'current' && last_task_used_altivec != 'current' */ _STATIC(load_up_altivec) - mfmsr r5 /* grab the current MSR */ + mfmsr r5 /* grab the current MSR */ oris r5,r5,MSR_VEC@h - mtmsrd r5 /* enable use of VMX now */ + mtmsrd r5 /* enable use of VMX now */ isync /* @@ -1697,10 +1698,10 @@ _STATIC(load_up_altivec) * Disable the VMX. */ _GLOBAL(disable_kernel_altivec) - mfmsr r3 - rldicl r0,r3,(63-MSR_VEC_LG),1 - rldicl r3,r0,(MSR_VEC_LG+1),0 - mtmsrd r3 /* disable use of VMX now */ + mfmsr r3 + rldicl r0,r3,(63-MSR_VEC_LG),1 + rldicl r3,r0,(MSR_VEC_LG+1),0 + mtmsrd r3 /* disable use of VMX now */ isync blr @@ -1777,16 +1778,16 @@ _GLOBAL(pmac_secondary_start) mtmsrd r3 /* RI on */ /* Set up a paca value for this processor. */ - LOADADDR(r4, paca) /* Get base vaddr of paca array */ + LOADADDR(r4, paca) /* Get base vaddr of paca array */ mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */ - add r13,r13,r4 /* for this processor. */ - mtspr SPRG3,r13 /* Save vaddr of paca in SPRG3 */ + add r13,r13,r4 /* for this processor. */ + mtspr SPRG3,r13 /* Save vaddr of paca in SPRG3 */ - /* Create a temp kernel stack for use before relocation is on. */ - mr r1,r13 - addi r1,r1,PACAGUARD - addi r1,r1,0x1000 - subi r1,r1,STACK_FRAME_OVERHEAD + /* Create a temp kernel stack for use before relocation is on. */ + mr r1,r13 + addi r1,r1,PACAGUARD + addi r1,r1,0x1000 + subi r1,r1,STACK_FRAME_OVERHEAD b .__secondary_start @@ -1800,7 +1801,7 @@ _GLOBAL(pmac_secondary_start) * 1. Processor number * 2. Segment table pointer (virtual address) * On entry the following are set: - * r1 = stack pointer. vaddr for iSeries, raddr (temp stack) for pSeries + * r1 = stack pointer. vaddr for iSeries, raddr (temp stack) for pSeries * r24 = cpu# (in Linux terms) * r13 = paca virtual address * SPRG3 = paca virtual address @@ -1811,8 +1812,8 @@ _GLOBAL(__secondary_start) /* set up the TOC (virtual address) */ LOADADDR(r2,__toc_start) - addi r2,r2,0x4000 - addi r2,r2,0x4000 + addi r2,r2,0x4000 + addi r2,r2,0x4000 std r2,PACATOC(r13) li r6,0 @@ -1821,24 +1822,22 @@ _GLOBAL(__secondary_start) #ifndef CONFIG_PPC_ISERIES /* Initialize the page table pointer register. */ LOADADDR(r6,_SDR1) - ld r6,0(r6) /* get the value of _SDR1 */ - mtspr SDR1,r6 /* set the htab location */ + ld r6,0(r6) /* get the value of _SDR1 */ + mtspr SDR1,r6 /* set the htab location */ #endif - /* Initialize the first segment table (or SLB) entry */ - ld r3,PACASTABVIRT(r13) /* get addr of segment table */ + /* Initialize the first segment table (or SLB) entry */ + ld r3,PACASTABVIRT(r13) /* get addr of segment table */ bl .stab_initialize - /* Initialize the kernel stack. Just a repeat for iSeries. */ + /* Initialize the kernel stack. Just a repeat for iSeries. */ LOADADDR(r3,current_set) - sldi r28,r24,3 /* get current_set[cpu#] */ + sldi r28,r24,3 /* get current_set[cpu#] */ ldx r1,r3,r28 addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD - li r0,0 - std r0,0(r1) std r1,PACAKSAVE(r13) - ld r3,PACASTABREAL(r13) /* get raddr of segment table */ - ori r4,r3,1 /* turn on valid bit */ + ld r3,PACASTABREAL(r13) /* get raddr of segment table */ + ori r4,r3,1 /* turn on valid bit */ #ifdef CONFIG_PPC_ISERIES li r0,-1 /* hypervisor call */ @@ -1848,23 +1847,23 @@ _GLOBAL(__secondary_start) sc /* HvCall_setASR */ #else /* set the ASR */ - li r3,SYSTEMCFG_PHYS_ADDR /* r3 = ptr to systemcfg */ - lwz r3,PLATFORM(r3) /* r3 = platform flags */ + li r3,SYSTEMCFG_PHYS_ADDR /* r3 = ptr to systemcfg */ + lwz r3,PLATFORM(r3) /* r3 = platform flags */ cmpldi r3,PLATFORM_PSERIES_LPAR - bne 98f + bne 98f mfspr r3,PVR srwi r3,r3,16 - cmpwi r3,0x37 /* SStar */ + cmpwi r3,0x37 /* SStar */ beq 97f - cmpwi r3,0x36 /* IStar */ + cmpwi r3,0x36 /* IStar */ beq 97f - cmpwi r3,0x34 /* Pulsar */ + cmpwi r3,0x34 /* Pulsar */ bne 98f -97: li r3,H_SET_ASR /* hcall = H_SET_ASR */ - HVSC /* Invoking hcall */ +97: li r3,H_SET_ASR /* hcall = H_SET_ASR */ + HVSC /* Invoking hcall */ b 99f -98: /* !(rpa hypervisor) || !(star) */ - mtasr r4 /* set the stab location */ +98: /* !(rpa hypervisor) || !(star) */ + mtasr r4 /* set the stab location */ 99: #endif li r7,0 @@ -1886,7 +1885,7 @@ _GLOBAL(__secondary_start) */ _GLOBAL(start_secondary_prolog) li r3,0 - std r3,0(r1) /* Zero the stack frame pointer */ + std r3,0(r1) /* Zero the stack frame pointer */ bl .start_secondary #endif @@ -1894,14 +1893,14 @@ _GLOBAL(start_secondary_prolog) * This subroutine clobbers r11 and r12 */ _GLOBAL(enable_64b_mode) - mfmsr r11 /* grab the current MSR */ - li r12,1 - rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG) - or r11,r11,r12 - li r12,1 - rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG) - or r11,r11,r12 - mtmsrd r11 + mfmsr r11 /* grab the current MSR */ + li r12,1 + rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG) + or r11,r11,r12 + li r12,1 + rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG) + or r11,r11,r12 + mtmsrd r11 isync blr @@ -1918,30 +1917,30 @@ _STATIC(start_here_pSeries) ori r6,r6,MSR_RI mtmsrd r6 /* RI on */ - /* setup the systemcfg pointer which is needed by *tab_initialize */ + /* setup the systemcfg pointer which is needed by *tab_initialize */ LOADADDR(r6,systemcfg) - sub r6,r6,r26 /* addr of the variable systemcfg */ + sub r6,r6,r26 /* addr of the variable systemcfg */ li r27,SYSTEMCFG_PHYS_ADDR - std r27,0(r6) /* set the value of systemcfg */ + std r27,0(r6) /* set the value of systemcfg */ - /* setup the naca pointer which is needed by *tab_initialize */ + /* setup the naca pointer which is needed by *tab_initialize */ LOADADDR(r6,naca) - sub r6,r6,r26 /* addr of the variable naca */ + sub r6,r6,r26 /* addr of the variable naca */ li r27,NACA_PHYS_ADDR - std r27,0(r6) /* set the value of naca */ + std r27,0(r6) /* set the value of naca */ #ifdef CONFIG_HMT /* Start up the second thread on cpu 0 */ mfspr r3,PVR srwi r3,r3,16 - cmpwi r3,0x34 /* Pulsar */ + cmpwi r3,0x34 /* Pulsar */ beq 90f - cmpwi r3,0x36 /* Icestar */ + cmpwi r3,0x36 /* Icestar */ beq 90f - cmpwi r3,0x37 /* SStar */ + cmpwi r3,0x37 /* SStar */ beq 90f - b 91f /* HMT not supported */ -90: li r3,0 + b 91f /* HMT not supported */ +90: li r3,0 bl .hmt_start_secondary 91: #endif @@ -1956,7 +1955,7 @@ _STATIC(start_here_pSeries) li r3,1 LOADADDR(r5,__secondary_hold_spinloop) tophys(r4,r5) - std r3,0(r4) + std r3,0(r4) #endif /* The following gets the stack and TOC set up with the regs */ @@ -1975,8 +1974,8 @@ _STATIC(start_here_pSeries) /* set up the TOC (physical address) */ LOADADDR(r2,__toc_start) - addi r2,r2,0x4000 - addi r2,r2,0x4000 + addi r2,r2,0x4000 + addi r2,r2,0x4000 sub r2,r2,r26 LOADADDR(r3,cpu_specs) @@ -1986,44 +1985,44 @@ _STATIC(start_here_pSeries) mr r5,r26 bl .identify_cpu - /* Get the pointer to the segment table which is used by */ - /* stab_initialize */ + /* Get the pointer to the segment table which is used by */ + /* stab_initialize */ LOADADDR(r27, boot_cpuid) sub r27,r27,r26 lwz r27,0(r27) - LOADADDR(r24, paca) /* Get base vaddr of paca array */ - mulli r13,r27,PACA_SIZE /* Calculate vaddr of right paca */ - add r13,r13,r24 /* for this processor. */ - sub r13,r13,r26 /* convert to physical addr */ + LOADADDR(r24, paca) /* Get base vaddr of paca array */ + mulli r13,r27,PACA_SIZE /* Calculate vaddr of right paca */ + add r13,r13,r24 /* for this processor. */ + sub r13,r13,r26 /* convert to physical addr */ mtspr SPRG3,r13 /* PPPBBB: Temp... -Peter */ ld r3,PACASTABREAL(r13) - ori r4,r3,1 /* turn on valid bit */ + ori r4,r3,1 /* turn on valid bit */ /* set the ASR */ li r3,SYSTEMCFG_PHYS_ADDR /* r3 = ptr to systemcfg */ - lwz r3,PLATFORM(r3) /* r3 = platform flags */ + lwz r3,PLATFORM(r3) /* r3 = platform flags */ cmpldi r3,PLATFORM_PSERIES_LPAR - bne 98f + bne 98f mfspr r3,PVR srwi r3,r3,16 - cmpwi r3,0x37 /* SStar */ + cmpwi r3,0x37 /* SStar */ beq 97f - cmpwi r3,0x36 /* IStar */ + cmpwi r3,0x36 /* IStar */ beq 97f - cmpwi r3,0x34 /* Pulsar */ + cmpwi r3,0x34 /* Pulsar */ bne 98f -97: li r3,H_SET_ASR /* hcall = H_SET_ASR */ - HVSC /* Invoking hcall */ - b 99f -98: /* !(rpa hypervisor) || !(star) */ - mtasr r4 /* set the stab location */ +97: li r3,H_SET_ASR /* hcall = H_SET_ASR */ + HVSC /* Invoking hcall */ + b 99f +98: /* !(rpa hypervisor) || !(star) */ + mtasr r4 /* set the stab location */ 99: mfspr r6,SPRG3 - ld r3,PACASTABREAL(r6) /* restore r3 for stab_initialize */ + ld r3,PACASTABREAL(r6) /* restore r3 for stab_initialize */ - /* Initialize an initial memory mapping and turn on relocation. */ + /* Initialize an initial memory mapping and turn on relocation. */ bl .stab_initialize bl .htab_initialize @@ -2031,7 +2030,7 @@ _STATIC(start_here_pSeries) lwz r3,PLATFORM(r3) /* r3 = platform flags */ /* Test if bit 0 is set (LPAR bit) */ andi. r3,r3,0x1 - bne 98f + bne 98f LOADADDR(r6,_SDR1) /* Only if NOT LPAR */ sub r6,r6,r26 ld r6,0(r6) /* get the value of _SDR1 */ @@ -2060,8 +2059,8 @@ _STATIC(start_here_common) /* set up the TOC */ LOADADDR(r2,__toc_start) - addi r2,r2,0x4000 - addi r2,r2,0x4000 + addi r2,r2,0x4000 + addi r2,r2,0x4000 /* Apply the CPUs-specific fixups (nop out sections not relevant * to this CPU @@ -2077,14 +2076,14 @@ _STATIC(start_here_common) /* setup the naca pointer */ LOADADDR(r9,naca) SET_REG_TO_CONST(r8, NACA_VIRT_ADDR) - std r8,0(r9) /* set the value of the naca ptr */ + std r8,0(r9) /* set the value of the naca ptr */ LOADADDR(r26, boot_cpuid) lwz r26,0(r26) - LOADADDR(r24, paca) /* Get base vaddr of paca array */ - mulli r13,r26,PACA_SIZE /* Calculate vaddr of right paca */ - add r13,r13,r24 /* for this processor. */ + LOADADDR(r24, paca) /* Get base vaddr of paca array */ + mulli r13,r26,PACA_SIZE /* Calculate vaddr of right paca */ + add r13,r13,r24 /* for this processor. */ mtspr SPRG3,r13 /* ptr to current */ @@ -2123,11 +2122,11 @@ _GLOBAL(hmt_init) LOADADDR(r5, hmt_thread_data) mfspr r7,PVR srwi r7,r7,16 - cmpwi r7,0x34 /* Pulsar */ + cmpwi r7,0x34 /* Pulsar */ beq 90f - cmpwi r7,0x36 /* Icestar */ + cmpwi r7,0x36 /* Icestar */ beq 91f - cmpwi r7,0x37 /* SStar */ + cmpwi r7,0x37 /* SStar */ beq 91f b 101f 90: mfspr r6,PIR @@ -2161,32 +2160,32 @@ __hmt_secondary_hold: 104: addi r7,r7,4 lwzx r9,r5,r7 - mr r24,r9 + mr r24,r9 101: #endif - mr r3,r24 - b .pseries_secondary_smp_init + mr r3,r24 + b .pseries_secondary_smp_init #ifdef CONFIG_HMT _GLOBAL(hmt_start_secondary) LOADADDR(r4,__hmt_secondary_hold) clrldi r4,r4,4 - mtspr NIADORM, r4 - mfspr r4, MSRDORM - li r5, -65 - and r4, r4, r5 - mtspr MSRDORM, r4 + mtspr NIADORM, r4 + mfspr r4, MSRDORM + li r5, -65 + and r4, r4, r5 + mtspr MSRDORM, r4 lis r4,0xffef ori r4,r4,0x7403 mtspr TSC, r4 li r4,0x1f4 mtspr TST, r4 - mfspr r4, HID0 - ori r4, r4, 0x1 - mtspr HID0, r4 - mfspr r4, CTRLF - oris r4, r4, 0x40 - mtspr CTRLT, r4 + mfspr r4, HID0 + ori r4, r4, 0x1 + mtspr HID0, r4 + mfspr r4, CTRLF + oris r4, r4, 0x40 + mtspr CTRLT, r4 blr #endif @@ -2196,7 +2195,7 @@ _GLOBAL(hmt_start_secondary) * which is page-aligned. */ .data - .align 12 + .align 12 .globl sdata sdata: .globl empty_zero_page @@ -2214,7 +2213,7 @@ ioremap_dir: /* 1 page segment table per cpu (max 48, cpu0 allocated at STAB0_PHYS_ADDR) */ .globl stab_array stab_array: - .space 4096 * 48 + .space 4096 * 48 /* * This space gets a copy of optional info passed to us by the bootstrap @@ -2222,4 +2221,4 @@ stab_array: */ .globl cmd_line cmd_line: - .space 512 /* COMMAND_LINE_SIZE */ + .space COMMAND_LINE_SIZE diff --git a/arch/ppc64/kernel/irq.c b/arch/ppc64/kernel/irq.c index 7335442e4178..6971f8a0cba0 100644 --- a/arch/ppc64/kernel/irq.c +++ b/arch/ppc64/kernel/irq.c @@ -206,7 +206,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->dev_id = dev_id; action->next = NULL; @@ -738,7 +738,6 @@ static int irq_affinity_write_proc (struct file *file, const char __user *buffer irq_desc_t *desc = get_irq_desc(irq); int ret; cpumask_t new_value, tmp; - cpumask_t allcpus = CPU_MASK_ALL; if (!desc->handler->set_affinity) return -EIO; @@ -753,7 +752,7 @@ static int irq_affinity_write_proc (struct file *file, const char __user *buffer * NR_CPUS == 32 and cpumask is a long), so we mask it here to * be consistent. */ - cpus_and(new_value, new_value, allcpus); + cpus_and(new_value, new_value, CPU_MASK_ALL); /* * Grab lock here so cpu_online_map can't change, and also diff --git a/arch/ppc64/kernel/open_pic.c b/arch/ppc64/kernel/open_pic.c index 0eed791f3eb6..874afcb5f1a4 100644 --- a/arch/ppc64/kernel/open_pic.c +++ b/arch/ppc64/kernel/open_pic.c @@ -591,7 +591,7 @@ static inline u32 physmask(u32 cpumask) void openpic_init_processor(u_int cpumask) { openpic_write(&OpenPIC->Global.Processor_Initialization, - physmask(cpumask & cpus_coerce(cpu_online_map))); + physmask(cpumask & cpus_addr(cpu_online_map)[0])); } #ifdef CONFIG_SMP @@ -625,7 +625,7 @@ void openpic_cause_IPI(u_int ipi, u_int cpumask) CHECK_THIS_CPU; check_arg_ipi(ipi); openpic_write(&OpenPIC->THIS_CPU.IPI_Dispatch(ipi), - physmask(cpumask & cpus_coerce(cpu_online_map))); + physmask(cpumask & cpus_addr(cpu_online_map)[0])); } void openpic_request_IPIs(void) @@ -711,7 +711,7 @@ static void __init openpic_maptimer(u_int timer, u_int cpumask) { check_arg_timer(timer); openpic_write(&OpenPIC->Global.Timer[timer].Destination, - physmask(cpumask & cpus_coerce(cpu_online_map))); + physmask(cpumask & cpus_addr(cpu_online_map)[0])); } @@ -844,7 +844,7 @@ static void openpic_set_affinity(unsigned int irq_nr, cpumask_t cpumask) cpumask_t tmp; cpus_and(tmp, cpumask, cpu_online_map); - openpic_mapirq(irq_nr - open_pic_irq_offset, physmask(cpus_coerce(tmp))); + openpic_mapirq(irq_nr - open_pic_irq_offset, physmask(cpus_addr(tmp)[0])); } #ifdef CONFIG_SMP diff --git a/arch/ppc64/kernel/pSeries_nvram.c b/arch/ppc64/kernel/pSeries_nvram.c index ebccb1663381..5d74028d512f 100644 --- a/arch/ppc64/kernel/pSeries_nvram.c +++ b/arch/ppc64/kernel/pSeries_nvram.c @@ -37,7 +37,8 @@ static spinlock_t nvram_lock = SPIN_LOCK_UNLOCKED; static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index) { unsigned int i; - unsigned long len, done; + unsigned long len; + int done; unsigned long flags; char *p = buf; @@ -80,7 +81,8 @@ static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index) static ssize_t pSeries_nvram_write(char *buf, size_t count, loff_t *index) { unsigned int i; - unsigned long len, done; + unsigned long len; + int done; unsigned long flags; const char *p = buf; diff --git a/arch/ppc64/kernel/pSeries_pci.c b/arch/ppc64/kernel/pSeries_pci.c index 4014ccd9fb60..3a88ae49a2a7 100644 --- a/arch/ppc64/kernel/pSeries_pci.c +++ b/arch/ppc64/kernel/pSeries_pci.c @@ -62,7 +62,7 @@ extern unsigned long pci_probe_only; static int rtas_read_config(struct device_node *dn, int where, int size, u32 *val) { - unsigned long returnval = ~0L; + int returnval = -1; unsigned long buid, addr; int ret; @@ -72,7 +72,8 @@ static int rtas_read_config(struct device_node *dn, int where, int size, u32 *va addr = (dn->busno << 16) | (dn->devfn << 8) | where; buid = dn->phb->buid; if (buid) { - ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, addr, buid >> 32, buid & 0xffffffff, size); + ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval, + addr, buid >> 32, buid & 0xffffffff, size); } else { ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size); } diff --git a/arch/ppc64/kernel/ppc_ksyms.c b/arch/ppc64/kernel/ppc_ksyms.c index 1a8e1bf630c6..836cf2a43eab 100644 --- a/arch/ppc64/kernel/ppc_ksyms.c +++ b/arch/ppc64/kernel/ppc_ksyms.c @@ -47,8 +47,6 @@ extern int do_signal(sigset_t *, struct pt_regs *); -int abs(int); - EXPORT_SYMBOL(do_signal); EXPORT_SYMBOL(isa_io_base); @@ -157,8 +155,6 @@ EXPORT_SYMBOL_NOVERS(memscan); EXPORT_SYMBOL_NOVERS(memcmp); EXPORT_SYMBOL_NOVERS(memchr); -EXPORT_SYMBOL(abs); - EXPORT_SYMBOL(timer_interrupt); EXPORT_SYMBOL(irq_desc); EXPORT_SYMBOL(get_wchan); diff --git a/arch/ppc64/kernel/prom.c b/arch/ppc64/kernel/prom.c index a5f8f241895a..d9c8703572ba 100644 --- a/arch/ppc64/kernel/prom.c +++ b/arch/ppc64/kernel/prom.c @@ -15,9 +15,7 @@ * 2 of the License, or (at your option) any later version. */ -#if 0 -#define DEBUG_PROM -#endif +#undef DEBUG_PROM #include <stdarg.h> #include <linux/config.h> @@ -91,15 +89,17 @@ extern const struct linux_logo logo_linux_clut224; */ -#define PROM_BUG() do { \ - prom_print(RELOC("kernel BUG at ")); \ - prom_print(RELOC(__FILE__)); \ - prom_print(RELOC(":")); \ - prom_print_hex(__LINE__); \ - prom_print(RELOC("!\n")); \ - __asm__ __volatile__(".long " BUG_ILLEGAL_INSTR); \ +#define PROM_BUG() do { \ + prom_printf("kernel BUG at %s line 0x%x!\n", \ + RELOC(__FILE__), __LINE__); \ + __asm__ __volatile__(".long " BUG_ILLEGAL_INSTR); \ } while (0) +#ifdef DEBUG_PROM +#define prom_debug(x...) prom_printf(x) +#else +#define prom_debug(x...) +#endif struct pci_reg_property { @@ -178,29 +178,36 @@ struct { char testString[] = "LINUX\n"; +/* + * This are used in calls to call_prom. The 4th and following + * arguments to call_prom should be 32-bit values. 64 bit values + * are truncated to 32 bits (and fortunately don't get interpreted + * as two arguments). + */ +#define ADDR(x) (u32) ((unsigned long)(x) - offset) /* This is the one and *ONLY* place where we actually call open * firmware from, since we need to make sure we're running in 32b * mode when we do. We switch back to 64b mode upon return. */ -#define PROM_ERROR (0x00000000fffffffful) +#define PROM_ERROR (-1) -static unsigned long __init call_prom(const char *service, int nargs, int nret, ...) +static int __init call_prom(const char *service, int nargs, int nret, ...) { int i; unsigned long offset = reloc_offset(); struct prom_t *_prom = PTRRELOC(&prom); va_list list; - _prom->args.service = (u32)LONG_LSW(service); + _prom->args.service = ADDR(service); _prom->args.nargs = nargs; _prom->args.nret = nret; _prom->args.rets = (prom_arg_t *)&(_prom->args.args[nargs]); va_start(list, nret); - for (i=0; i < nargs ;i++) - _prom->args.args[i] = (prom_arg_t)LONG_LSW(va_arg(list, unsigned long)); + for (i=0; i < nargs; i++) + _prom->args.args[i] = va_arg(list, prom_arg_t); va_end(list); for (i=0; i < nret ;i++) @@ -208,7 +215,7 @@ static unsigned long __init call_prom(const char *service, int nargs, int nret, enter_prom(&_prom->args); - return (unsigned long)((nret > 0) ? _prom->args.rets[0] : 0); + return (nret > 0)? _prom->args.rets[0]: 0; } @@ -225,21 +232,21 @@ static void __init prom_print(const char *msg) for (q = p; *q != 0 && *q != '\n'; ++q) ; if (q > p) - call_prom(RELOC("write"), 3, 1, _prom->stdout, - p, q - p); - if (*q != 0) { - ++q; - call_prom(RELOC("write"), 3, 1, _prom->stdout, - RELOC("\r\n"), 2); - } + call_prom("write", 3, 1, _prom->stdout, p, q - p); + if (*q == 0) + break; + ++q; + call_prom("write", 3, 1, _prom->stdout, ADDR("\r\n"), 2); } } static void __init prom_print_hex(unsigned long val) { + unsigned long offset = reloc_offset(); int i, nibbles = sizeof(val)*2; char buf[sizeof(val)*2+1]; + struct prom_t *_prom = PTRRELOC(&prom); for (i = nibbles-1; i >= 0; i--) { buf[i] = (val & 0xf) + '0'; @@ -248,24 +255,58 @@ static void __init prom_print_hex(unsigned long val) val >>= 4; } buf[nibbles] = '\0'; - prom_print(buf); + call_prom("write", 3, 1, _prom->stdout, buf, nibbles); } -static void __init prom_print_nl(void) +static void __init prom_printf(const char *format, ...) { unsigned long offset = reloc_offset(); - prom_print(RELOC("\n")); + const char *p, *q, *s; + va_list args; + unsigned long v; + struct prom_t *_prom = PTRRELOC(&prom); + + va_start(args, format); + for (p = PTRRELOC(format); *p != 0; p = q) { + for (q = p; *q != 0 && *q != '\n' && *q != '%'; ++q) + ; + if (q > p) + call_prom("write", 3, 1, _prom->stdout, p, q - p); + if (*q == 0) + break; + if (*q == '\n') { + ++q; + call_prom("write", 3, 1, _prom->stdout, + ADDR("\r\n"), 2); + continue; + } + ++q; + if (*q == 0) + break; + switch (*q) { + case 's': + ++q; + s = va_arg(args, const char *); + prom_print(s); + break; + case 'x': + ++q; + v = va_arg(args, unsigned long); + prom_print_hex(v); + break; + } + } } -static void __init prom_panic(const char *reason) +static void __init __attribute__((noreturn)) prom_panic(const char *reason) { unsigned long offset = reloc_offset(); - prom_print(reason); + prom_print(PTRRELOC(reason)); /* ToDo: should put up an SRC here */ - call_prom(RELOC("exit"), 0, 0); + call_prom("exit", 0, 0); for (;;) /* should never get here */ ; @@ -275,21 +316,28 @@ static void __init prom_panic(const char *reason) static int __init prom_next_node(phandle *nodep) { phandle node; - unsigned long offset = reloc_offset(); if ((node = *nodep) != 0 - && (*nodep = call_prom(RELOC("child"), 1, 1, node)) != 0) + && (*nodep = call_prom("child", 1, 1, node)) != 0) return 1; - if ((*nodep = call_prom(RELOC("peer"), 1, 1, node)) != 0) + if ((*nodep = call_prom("peer", 1, 1, node)) != 0) return 1; for (;;) { - if ((node = call_prom(RELOC("parent"), 1, 1, node)) == 0) + if ((node = call_prom("parent", 1, 1, node)) == 0) return 0; - if ((*nodep = call_prom(RELOC("peer"), 1, 1, node)) != 0) + if ((*nodep = call_prom("peer", 1, 1, node)) != 0) return 1; } } +static int __init prom_getprop(phandle node, const char *pname, + void *value, size_t valuelen) +{ + unsigned long offset = reloc_offset(); + + return call_prom("getprop", 4, 1, node, ADDR(pname), + (u32)(unsigned long) value, (u32) valuelen); +} static void __init prom_initialize_naca(void) { @@ -302,16 +350,13 @@ static void __init prom_initialize_naca(void) struct systemcfg *_systemcfg = RELOC(systemcfg); /* NOTE: _naca->debug_switch is already initialized. */ -#ifdef DEBUG_PROM - prom_print(RELOC("prom_initialize_naca: start...\n")); -#endif + prom_debug("prom_initialize_naca: start...\n"); _naca->pftSize = 0; /* ilog2 of htab size. computed below. */ for (node = 0; prom_next_node(&node); ) { type[0] = 0; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("device_type"), - type, sizeof(type)); + prom_getprop(node, "device_type", type, sizeof(type)); if (!strcmp(type, RELOC("cpu"))) { num_cpus += 1; @@ -321,37 +366,30 @@ static void __init prom_initialize_naca(void) */ if ( num_cpus == 1 ) { u32 size, lsize; + const char *dc, *ic; + + if (_systemcfg->platform == PLATFORM_POWERMAC){ + dc = "d-cache-block-size"; + ic = "i-cache-block-size"; + } else { + dc = "d-cache-line-size"; + ic = "i-cache-line-size"; + } - call_prom(RELOC("getprop"), 4, 1, node, - RELOC("d-cache-size"), - &size, sizeof(size)); + prom_getprop(node, "d-cache-size", + &size, sizeof(size)); - if (_systemcfg->platform == PLATFORM_POWERMAC) - call_prom(RELOC("getprop"), 4, 1, node, - RELOC("d-cache-block-size"), - &lsize, sizeof(lsize)); - else - call_prom(RELOC("getprop"), 4, 1, node, - RELOC("d-cache-line-size"), - &lsize, sizeof(lsize)); + prom_getprop(node, dc, &lsize, sizeof(lsize)); _systemcfg->dCacheL1Size = size; _systemcfg->dCacheL1LineSize = lsize; _naca->dCacheL1LogLineSize = __ilog2(lsize); _naca->dCacheL1LinesPerPage = PAGE_SIZE/lsize; - call_prom(RELOC("getprop"), 4, 1, node, - RELOC("i-cache-size"), - &size, sizeof(size)); + prom_getprop(node, "i-cache-size", + &size, sizeof(size)); - if (_systemcfg->platform == PLATFORM_POWERMAC) - call_prom(RELOC("getprop"), 4, 1, node, - RELOC("i-cache-block-size"), - &lsize, sizeof(lsize)); - else - call_prom(RELOC("getprop"), 4, 1, node, - RELOC("i-cache-line-size"), - &lsize, sizeof(lsize)); + prom_getprop(node, ic, &lsize, sizeof(lsize)); _systemcfg->iCacheL1Size = size; _systemcfg->iCacheL1LineSize = lsize; @@ -360,9 +398,8 @@ static void __init prom_initialize_naca(void) if (_systemcfg->platform == PLATFORM_PSERIES_LPAR) { u32 pft_size[2]; - call_prom(RELOC("getprop"), 4, 1, node, - RELOC("ibm,pft-size"), - &pft_size, sizeof(pft_size)); + prom_getprop(node, "ibm,pft-size", + &pft_size, sizeof(pft_size)); /* pft_size[0] is the NUMA CEC cookie */ _naca->pftSize = pft_size[1]; } @@ -375,24 +412,21 @@ static void __init prom_initialize_naca(void) if (_systemcfg->platform == PLATFORM_POWERMAC) continue; type[0] = 0; - call_prom(RELOC("getprop"), 4, 1, node, - RELOC("ibm,aix-loc"), type, sizeof(type)); + prom_getprop(node, "ibm,aix-loc", type, sizeof(type)); if (strcmp(type, RELOC("S1"))) continue; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("reg"), - ®, sizeof(reg)); + prom_getprop(node, "reg", ®, sizeof(reg)); - isa = call_prom(RELOC("parent"), 1, 1, node); + isa = call_prom("parent", 1, 1, node); if (!isa) PROM_BUG(); - pci = call_prom(RELOC("parent"), 1, 1, isa); + pci = call_prom("parent", 1, 1, isa); if (!pci) PROM_BUG(); - call_prom(RELOC("getprop"), 4, 1, pci, RELOC("ranges"), - &ranges, sizeof(ranges)); + prom_getprop(pci, "ranges", &ranges, sizeof(ranges)); if ( _prom->encode_phys_size == 32 ) _naca->serialPortAddr = ranges.pci32.phys+reg.address; @@ -410,25 +444,23 @@ static void __init prom_initialize_naca(void) _naca->interrupt_controller = IC_INVALID; for (node = 0; prom_next_node(&node); ) { type[0] = 0; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("name"), - type, sizeof(type)); + prom_getprop(node, "name", type, sizeof(type)); if (strcmp(type, RELOC("interrupt-controller"))) continue; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("compatible"), - type, sizeof(type)); + prom_getprop(node, "compatible", type, sizeof(type)); if (strstr(type, RELOC("open-pic"))) _naca->interrupt_controller = IC_OPEN_PIC; else if (strstr(type, RELOC("ppc-xicp"))) _naca->interrupt_controller = IC_PPC_XIC; else - prom_print(RELOC("prom: failed to recognize" - " interrupt-controller\n")); + prom_printf("prom: failed to recognize" + " interrupt-controller\n"); break; } } if (_naca->interrupt_controller == IC_INVALID) { - prom_print(RELOC("prom: failed to find interrupt-controller\n")); + prom_printf("prom: failed to find interrupt-controller\n"); PROM_BUG(); } @@ -454,7 +486,7 @@ static void __init prom_initialize_naca(void) } if (_naca->pftSize == 0) { - prom_print(RELOC("prom: failed to compute pftSize!\n")); + prom_printf("prom: failed to compute pftSize!\n"); PROM_BUG(); } @@ -464,41 +496,23 @@ static void __init prom_initialize_naca(void) _systemcfg->version.minor = SYSTEMCFG_MINOR; _systemcfg->processor = _get_PVR(); -#ifdef DEBUG_PROM - prom_print(RELOC("systemcfg->processorCount = 0x")); - prom_print_hex(_systemcfg->processorCount); - prom_print_nl(); - - prom_print(RELOC("systemcfg->physicalMemorySize = 0x")); - prom_print_hex(_systemcfg->physicalMemorySize); - prom_print_nl(); - - prom_print(RELOC("naca->pftSize = 0x")); - prom_print_hex(_naca->pftSize); - prom_print_nl(); - - prom_print(RELOC("systemcfg->dCacheL1LineSize = 0x")); - prom_print_hex(_systemcfg->dCacheL1LineSize); - prom_print_nl(); - - prom_print(RELOC("systemcfg->iCacheL1LineSize = 0x")); - prom_print_hex(_systemcfg->iCacheL1LineSize); - prom_print_nl(); - - prom_print(RELOC("naca->serialPortAddr = 0x")); - prom_print_hex(_naca->serialPortAddr); - prom_print_nl(); - - prom_print(RELOC("naca->interrupt_controller = 0x")); - prom_print_hex(_naca->interrupt_controller); - prom_print_nl(); - - prom_print(RELOC("systemcfg->platform = 0x")); - prom_print_hex(_systemcfg->platform); - prom_print_nl(); - - prom_print(RELOC("prom_initialize_naca: end...\n")); -#endif + prom_debug("systemcfg->processorCount = 0x%x\n", + _systemcfg->processorCount); + prom_debug("systemcfg->physicalMemorySize = 0x%x\n", + _systemcfg->physicalMemorySize); + prom_debug("naca->pftSize = 0x%x\n", + _naca->pftSize); + prom_debug("systemcfg->dCacheL1LineSize = 0x%x\n", + _systemcfg->dCacheL1LineSize); + prom_debug("systemcfg->iCacheL1LineSize = 0x%x\n", + _systemcfg->iCacheL1LineSize); + prom_debug("naca->serialPortAddr = 0x%x\n", + _naca->serialPortAddr); + prom_debug("naca->interrupt_controller = 0x%x\n", + _naca->interrupt_controller); + prom_debug("systemcfg->platform = 0x%x\n", + _systemcfg->platform); + prom_debug("prom_initialize_naca: end...\n"); } @@ -512,9 +526,7 @@ static void __init early_cmdline_parse(void) opt = strstr(RELOC(cmd_line), RELOC("iommu=")); if (opt) { - prom_print(RELOC("opt is:")); - prom_print(opt); - prom_print(RELOC("\n")); + prom_printf("opt is:%s\n", opt); opt += 6; while (*opt && *opt == ' ') opt++; @@ -527,7 +539,7 @@ static void __init early_cmdline_parse(void) #ifndef CONFIG_PMAC_DART if (_systemcfg->platform == PLATFORM_POWERMAC) { RELOC(ppc64_iommu_off) = 1; - prom_print(RELOC("DART disabled on PowerMac !\n")); + prom_printf("DART disabled on PowerMac !\n"); } #endif } @@ -539,46 +551,31 @@ void prom_dump_lmb(void) unsigned long offset = reloc_offset(); struct lmb *_lmb = PTRRELOC(&lmb); - prom_print(RELOC("\nprom_dump_lmb:\n")); - prom_print(RELOC(" memory.cnt = 0x")); - prom_print_hex(_lmb->memory.cnt); - prom_print_nl(); - prom_print(RELOC(" memory.size = 0x")); - prom_print_hex(_lmb->memory.size); - prom_print_nl(); + prom_printf("\nprom_dump_lmb:\n"); + prom_printf(" memory.cnt = 0x%x\n", + _lmb->memory.cnt); + prom_printf(" memory.size = 0x%x\n", + _lmb->memory.size); for (i=0; i < _lmb->memory.cnt ;i++) { - prom_print(RELOC(" memory.region[0x")); - prom_print_hex(i); - prom_print(RELOC("].base = 0x")); - prom_print_hex(_lmb->memory.region[i].base); - prom_print_nl(); - prom_print(RELOC(" .physbase = 0x")); - prom_print_hex(_lmb->memory.region[i].physbase); - prom_print_nl(); - prom_print(RELOC(" .size = 0x")); - prom_print_hex(_lmb->memory.region[i].size); - prom_print_nl(); + prom_printf(" memory.region[0x%x].base = 0x%x\n", + i, _lmb->memory.region[i].base); + prom_printf(" .physbase = 0x%x\n", + _lmb->memory.region[i].physbase); + prom_printf(" .size = 0x%x\n", + _lmb->memory.region[i].size); } - prom_print_nl(); - prom_print(RELOC(" reserved.cnt = 0x")); - prom_print_hex(_lmb->reserved.cnt); - prom_print_nl(); - prom_print(RELOC(" reserved.size = 0x")); - prom_print_hex(_lmb->reserved.size); - prom_print_nl(); + prom_printf("\n reserved.cnt = 0x%x\n", + _lmb->reserved.cnt); + prom_printf(" reserved.size = 0x%x\n", + _lmb->reserved.size); for (i=0; i < _lmb->reserved.cnt ;i++) { - prom_print(RELOC(" reserved.region[0x")); - prom_print_hex(i); - prom_print(RELOC("].base = 0x")); - prom_print_hex(_lmb->reserved.region[i].base); - prom_print_nl(); - prom_print(RELOC(" .physbase = 0x")); - prom_print_hex(_lmb->reserved.region[i].physbase); - prom_print_nl(); - prom_print(RELOC(" .size = 0x")); - prom_print_hex(_lmb->reserved.region[i].size); - prom_print_nl(); + prom_printf(" reserved.region[0x%x\n].base = 0x%x\n", + i, _lmb->reserved.region[i].base); + prom_printf(" .physbase = 0x%x\n", + _lmb->reserved.region[i].physbase); + prom_printf(" .size = 0x%x\n", + _lmb->reserved.region[i].size); } } #endif /* DEBUG_PROM */ @@ -604,14 +601,13 @@ static void __init prom_initialize_lmb(void) for (node = 0; prom_next_node(&node); ) { type[0] = 0; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("device_type"), - type, sizeof(type)); + prom_getprop(node, "device_type", type, sizeof(type)); if (strcmp(type, RELOC("memory"))) continue; - num_regs = call_prom(RELOC("getprop"), 4, 1, node, RELOC("reg"), - ®, sizeof(reg)) / bytes_per_reg; + num_regs = prom_getprop(node, "reg", ®, sizeof(reg)) + / bytes_per_reg; for (i=0; i < num_regs ;i++) { if (_systemcfg->platform == PLATFORM_POWERMAC) { @@ -636,7 +632,7 @@ static void __init prom_initialize_lmb(void) } if (lmb_add(lmb_base, lmb_size) < 0) - prom_print(RELOC("Too many LMB's, discarding this one...\n")); + prom_printf("Too many LMB's, discarding this one...\n"); } } @@ -658,30 +654,23 @@ prom_instantiate_rtas(void) u32 getprop_rval; char hypertas_funcs[4]; -#ifdef DEBUG_PROM - prom_print(RELOC("prom_instantiate_rtas: start...\n")); -#endif - prom_rtas = (ihandle)call_prom(RELOC("finddevice"), 1, 1, RELOC("/rtas")); + prom_debug("prom_instantiate_rtas: start...\n"); + + prom_rtas = call_prom("finddevice", 1, 1, ADDR("/rtas")); if (prom_rtas != (ihandle) -1) { unsigned long x; - x = call_prom(RELOC("getprop"), - 4, 1, prom_rtas, - RELOC("ibm,hypertas-functions"), - hypertas_funcs, - sizeof(hypertas_funcs)); + x = prom_getprop(prom_rtas, "ibm,hypertas-functions", + hypertas_funcs, sizeof(hypertas_funcs)); if (x != PROM_ERROR) { - prom_print(RELOC("Hypertas detected, assuming LPAR !\n")); + prom_printf("Hypertas detected, assuming LPAR !\n"); _systemcfg->platform = PLATFORM_PSERIES_LPAR; } - call_prom(RELOC("getprop"), - 4, 1, prom_rtas, - RELOC("rtas-size"), - &getprop_rval, - sizeof(getprop_rval)); + prom_getprop(prom_rtas, "rtas-size", + &getprop_rval, sizeof(getprop_rval)); _rtas->size = getprop_rval; - prom_print(RELOC("instantiating rtas")); + prom_printf("instantiating rtas"); if (_rtas->size != 0) { unsigned long rtas_region = RTAS_INSTANTIATE_MAX; @@ -696,17 +685,15 @@ prom_instantiate_rtas(void) _rtas->base = lmb_alloc_base(_rtas->size, PAGE_SIZE, rtas_region); - prom_print(RELOC(" at 0x")); - prom_print_hex(_rtas->base); + prom_printf(" at 0x%x", _rtas->base); - prom_rtas = (ihandle)call_prom(RELOC("open"), - 1, 1, RELOC("/rtas")); - prom_print(RELOC("...")); + prom_rtas = call_prom("open", 1, 1, ADDR("/rtas")); + prom_printf("..."); - if (call_prom(RELOC("call-method"), 3, 2, - RELOC("instantiate-rtas"), - prom_rtas, - _rtas->base) != PROM_ERROR) { + if (call_prom("call-method", 3, 2, + ADDR("instantiate-rtas"), + prom_rtas, + _rtas->base) != PROM_ERROR) { _rtas->entry = (long)_prom->args.rets[1]; } RELOC(rtas_rmo_buf) @@ -715,26 +702,16 @@ prom_instantiate_rtas(void) } if (_rtas->entry <= 0) { - prom_print(RELOC(" failed\n")); + prom_printf(" failed\n"); } else { - prom_print(RELOC(" done\n")); + prom_printf(" done\n"); } -#ifdef DEBUG_PROM - prom_print(RELOC("rtas->base = 0x")); - prom_print_hex(_rtas->base); - prom_print_nl(); - prom_print(RELOC("rtas->entry = 0x")); - prom_print_hex(_rtas->entry); - prom_print_nl(); - prom_print(RELOC("rtas->size = 0x")); - prom_print_hex(_rtas->size); - prom_print_nl(); -#endif + prom_debug("rtas->base = 0x%x\n", _rtas->base); + prom_debug("rtas->entry = 0x%x\n", _rtas->entry); + prom_debug("rtas->size = 0x%x\n", _rtas->size); } -#ifdef DEBUG_PROM - prom_print(RELOC("prom_instantiate_rtas: end...\n")); -#endif + prom_debug("prom_instantiate_rtas: end...\n"); } @@ -759,9 +736,7 @@ static void __init prom_initialize_dart_table(void) RELOC(dart_tablebase) = (unsigned long) abs_to_virt(lmb_alloc_base(1UL<<24, 1UL<<24, 0x80000000L)); - prom_print(RELOC("Dart at: ")); - prom_print_hex(RELOC(dart_tablebase)); - prom_print(RELOC("\n")); + prom_printf("Dart at: %x\n", RELOC(dart_tablebase)); } #endif /* CONFIG_PMAC_DART */ @@ -780,27 +755,23 @@ static void __init prom_initialize_tce_table(void) if (RELOC(ppc64_iommu_off)) return; -#ifdef DEBUG_PROM - prom_print(RELOC("starting prom_initialize_tce_table\n")); -#endif + prom_debug("starting prom_initialize_tce_table\n"); /* Search all nodes looking for PHBs. */ for (node = 0; prom_next_node(&node); ) { if (table == MAX_PHB) { - prom_print(RELOC("WARNING: PCI host bridge ignored, " - "need to increase MAX_PHB\n")); + prom_printf("WARNING: PCI host bridge ignored, " + "need to increase MAX_PHB\n"); continue; } compatible[0] = 0; type[0] = 0; model[0] = 0; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("compatible"), - compatible, sizeof(compatible)); - call_prom(RELOC("getprop"), 4, 1, node, RELOC("device_type"), - type, sizeof(type)); - call_prom(RELOC("getprop"), 4, 1, node, RELOC("model"), - model, sizeof(model)); + prom_getprop(node, "compatible", + compatible, sizeof(compatible)); + prom_getprop(node, "device_type", type, sizeof(type)); + prom_getprop(node, "model", model, sizeof(model)); /* Keep the old logic in tack to avoid regression. */ if (compatible[0] != 0) { @@ -819,15 +790,13 @@ static void __init prom_initialize_tce_table(void) continue; } - if (call_prom(RELOC("getprop"), 4, 1, node, - RELOC("tce-table-minalign"), &minalign, - sizeof(minalign)) == PROM_ERROR) { + if (prom_getprop(node, "tce-table-minalign", &minalign, + sizeof(minalign)) == PROM_ERROR) { minalign = 0; } - if (call_prom(RELOC("getprop"), 4, 1, node, - RELOC("tce-table-minsize"), &minsize, - sizeof(minsize)) == PROM_ERROR) { + if (prom_getprop(node, "tce-table-minsize", &minsize, + sizeof(minsize)) == PROM_ERROR) { minsize = 4UL << 20; } @@ -854,7 +823,7 @@ static void __init prom_initialize_tce_table(void) base = lmb_alloc(minsize, align); if ( !base ) { - prom_panic(RELOC("ERROR, cannot find space for TCE table.\n")); + prom_panic("ERROR, cannot find space for TCE table.\n"); } vbase = (unsigned long)abs_to_virt(base); @@ -864,23 +833,10 @@ static void __init prom_initialize_tce_table(void) prom_tce_table[table].base = vbase; prom_tce_table[table].size = minsize; -#ifdef DEBUG_PROM - prom_print(RELOC("TCE table: 0x")); - prom_print_hex(table); - prom_print_nl(); - - prom_print(RELOC("\tnode = 0x")); - prom_print_hex(node); - prom_print_nl(); - - prom_print(RELOC("\tbase = 0x")); - prom_print_hex(vbase); - prom_print_nl(); - - prom_print(RELOC("\tsize = 0x")); - prom_print_hex(minsize); - prom_print_nl(); -#endif + prom_debug("TCE table: 0x%x\n", table); + prom_debug("\tnode = 0x%x\n", node); + prom_debug("\tbase = 0x%x\n", vbase); + prom_debug("\tsize = 0x%x\n", minsize); /* Initialize the table to have a one-to-one mapping * over the allocated size. @@ -895,37 +851,30 @@ static void __init prom_initialize_tce_table(void) /* It seems OF doesn't null-terminate the path :-( */ memset(path, 0, sizeof(path)); /* Call OF to setup the TCE hardware */ - if (call_prom(RELOC("package-to-path"), 3, 1, node, - path, sizeof(path)-1) == PROM_ERROR) { - prom_print(RELOC("package-to-path failed\n")); + if (call_prom("package-to-path", 3, 1, node, + path, sizeof(path)-1) == PROM_ERROR) { + prom_printf("package-to-path failed\n"); } else { - prom_print(RELOC("opening PHB ")); - prom_print(path); + prom_printf("opening PHB %s", path); } - phb_node = (ihandle)call_prom(RELOC("open"), 1, 1, path); + phb_node = call_prom("open", 1, 1, path); if ( (long)phb_node <= 0) { - prom_print(RELOC("... failed\n")); + prom_printf("... failed\n"); } else { - prom_print(RELOC("... done\n")); + prom_printf("... done\n"); } - call_prom(RELOC("call-method"), 6, 0, - RELOC("set-64-bit-addressing"), - phb_node, - -1, - minsize, - base & 0xffffffff, - (base >> 32) & 0xffffffff); - call_prom(RELOC("close"), 1, 0, phb_node); + call_prom("call-method", 6, 0, ADDR("set-64-bit-addressing"), + phb_node, -1, minsize, + (u32) base, (u32) (base >> 32)); + call_prom("close", 1, 0, phb_node); table++; } /* Flag the first invalid entry */ prom_tce_table[table].node = 0; -#ifdef DEBUG_PROM - prom_print(RELOC("ending prom_initialize_tce_table\n")); -#endif + prom_debug("ending prom_initialize_tce_table\n"); } /* @@ -983,13 +932,11 @@ static void __init prom_hold_cpus(unsigned long mem) if (_systemcfg->platform == PLATFORM_POWERMAC) { for (node = 0; prom_next_node(&node); ) { type[0] = 0; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("device_type"), - type, sizeof(type)); + prom_getprop(node, "device_type", type, sizeof(type)); if (strcmp(type, RELOC("cpu")) != 0) continue; reg = -1; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("reg"), - ®, sizeof(reg)); + prom_getprop(node, "reg", ®, sizeof(reg)); _xPaca[cpuid].xHwProcNum = reg; #ifdef CONFIG_SMP @@ -1007,24 +954,13 @@ static void __init prom_hold_cpus(unsigned long mem) /* Initially, we must have one active CPU. */ _systemcfg->processorCount = 1; -#ifdef DEBUG_PROM - prom_print(RELOC("prom_hold_cpus: start...\n")); - prom_print(RELOC(" 1) spinloop = 0x")); - prom_print_hex((unsigned long)spinloop); - prom_print_nl(); - prom_print(RELOC(" 1) *spinloop = 0x")); - prom_print_hex(*spinloop); - prom_print_nl(); - prom_print(RELOC(" 1) acknowledge = 0x")); - prom_print_hex((unsigned long)acknowledge); - prom_print_nl(); - prom_print(RELOC(" 1) *acknowledge = 0x")); - prom_print_hex(*acknowledge); - prom_print_nl(); - prom_print(RELOC(" 1) secondary_hold = 0x")); - prom_print_hex(secondary_hold); - prom_print_nl(); -#endif + prom_debug("prom_hold_cpus: start...\n"); + prom_debug(" 1) spinloop = 0x%x\n", (unsigned long)spinloop); + prom_debug(" 1) *spinloop = 0x%x\n", *spinloop); + prom_debug(" 1) acknowledge = 0x%x\n", + (unsigned long)acknowledge); + prom_debug(" 1) *acknowledge = 0x%x\n", *acknowledge); + prom_debug(" 1) secondary_hold = 0x%x\n", secondary_hold); /* Set the common spinloop variable, so all of the secondary cpus * will block when they are awakened from their OF spinloop. @@ -1041,36 +977,26 @@ static void __init prom_hold_cpus(unsigned long mem) /* look for cpus */ for (node = 0; prom_next_node(&node); ) { type[0] = 0; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("device_type"), - type, sizeof(type)); + prom_getprop(node, "device_type", type, sizeof(type)); if (strcmp(type, RELOC("cpu")) != 0) continue; /* Skip non-configured cpus. */ - call_prom(RELOC("getprop"), 4, 1, node, RELOC("status"), - type, sizeof(type)); + prom_getprop(node, "status", type, sizeof(type)); if (strcmp(type, RELOC("okay")) != 0) continue; reg = -1; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("reg"), - ®, sizeof(reg)); + prom_getprop(node, "reg", ®, sizeof(reg)); path = (char *) mem; memset(path, 0, 256); - if ((long) call_prom(RELOC("package-to-path"), 3, 1, - node, path, 255) == PROM_ERROR) + if (call_prom("package-to-path", 3, 1, + node, path, 255) == PROM_ERROR) continue; -#ifdef DEBUG_PROM - prom_print_nl(); - prom_print(RELOC("cpuid = 0x")); - prom_print_hex(cpuid); - prom_print_nl(); - prom_print(RELOC("cpu hw idx = 0x")); - prom_print_hex(reg); - prom_print_nl(); -#endif + prom_debug("\ncpuid = 0x%x\n", cpuid); + prom_debug("cpu hw idx = 0x%x\n", reg); _xPaca[cpuid].xHwProcNum = reg; /* Init the acknowledge var which will be reset by @@ -1079,10 +1005,9 @@ static void __init prom_hold_cpus(unsigned long mem) */ *acknowledge = (unsigned long)-1; - propsize = call_prom(RELOC("getprop"), 4, 1, node, - RELOC("ibm,ppc-interrupt-server#s"), - &interrupt_server, - sizeof(interrupt_server)); + propsize = prom_getprop(node, "ibm,ppc-interrupt-server#s", + &interrupt_server, + sizeof(interrupt_server)); if (propsize < 0) { /* no property. old hardware has no SMT */ cpu_threads = 1; @@ -1091,11 +1016,9 @@ static void __init prom_hold_cpus(unsigned long mem) /* We have a threaded processor */ cpu_threads = propsize / sizeof(u32); if (cpu_threads > MAX_CPU_THREADS) { - prom_print(RELOC("SMT: too many threads!\nSMT: found ")); - prom_print_hex(cpu_threads); - prom_print(RELOC(", max is ")); - prom_print_hex(MAX_CPU_THREADS); - prom_print_nl(); + prom_printf("SMT: too many threads!\n" + "SMT: found %x, max is %x\n", + cpu_threads, MAX_CPU_THREADS); cpu_threads = 1; /* ToDo: panic? */ } } @@ -1103,18 +1026,15 @@ static void __init prom_hold_cpus(unsigned long mem) hw_cpu_num = interrupt_server[0]; if (hw_cpu_num != _prom->cpu) { /* Primary Thread of non-boot cpu */ - prom_print_hex(cpuid); - prom_print(RELOC(" : starting cpu ")); - prom_print(path); - prom_print(RELOC("... ")); - call_prom(RELOC("start-cpu"), 3, 0, node, + prom_printf("%x : starting cpu %s... ", cpuid, path); + call_prom("start-cpu", 3, 0, node, secondary_hold, cpuid); for ( i = 0 ; (i < 100000000) && (*acknowledge == ((unsigned long)-1)); i++ ) ; if (*acknowledge == cpuid) { - prom_print(RELOC("... done\n")); + prom_printf("... done\n"); /* We have to get every CPU out of OF, * even if we never start it. */ if (cpuid >= NR_CPUS) @@ -1127,17 +1047,12 @@ static void __init prom_hold_cpus(unsigned long mem) cpu_set(cpuid, RELOC(cpu_present_at_boot)); #endif } else { - prom_print(RELOC("... failed: ")); - prom_print_hex(*acknowledge); - prom_print_nl(); + prom_printf("... failed: %x\n", *acknowledge); } } #ifdef CONFIG_SMP else { - prom_print_hex(cpuid); - prom_print(RELOC(" : booting cpu ")); - prom_print(path); - prom_print_nl(); + prom_printf("%x : booting cpu %s\n", cpuid, path); cpu_set(cpuid, RELOC(cpu_available_map)); cpu_set(cpuid, RELOC(cpu_possible_map)); cpu_set(cpuid, RELOC(cpu_online_map)); @@ -1152,16 +1067,15 @@ next: if (cpuid >= NR_CPUS) continue; _xPaca[cpuid].xHwProcNum = interrupt_server[i]; - prom_print_hex(interrupt_server[i]); - prom_print(RELOC(" : preparing thread ... ")); + prom_printf("%x : preparing thread ... ", + interrupt_server[i]); if (_naca->smt_state) { cpu_set(cpuid, RELOC(cpu_available_map)); cpu_set(cpuid, RELOC(cpu_present_at_boot)); - prom_print(RELOC("available")); + prom_printf("available\n"); } else { - prom_print(RELOC("not available")); + prom_printf("not available\n"); } - prom_print_nl(); } #endif cpuid++; @@ -1171,7 +1085,7 @@ next: if (__is_processor(PV_PULSAR) || __is_processor(PV_ICESTAR) || __is_processor(PV_SSTAR)) { - prom_print(RELOC(" starting secondary threads\n")); + prom_printf(" starting secondary threads\n"); for (i = 0; i < NR_CPUS; i += 2) { if (!cpu_online(i)) @@ -1192,24 +1106,22 @@ next: } _systemcfg->processorCount *= 2; } else { - prom_print(RELOC("Processor is not HMT capable\n")); + prom_printf("Processor is not HMT capable\n"); } #endif - if (cpuid >= NR_CPUS) - prom_print(RELOC("WARNING: maximum CPUs (" __stringify(NR_CPUS) - ") exceeded: ignoring extras\n")); + if (cpuid > NR_CPUS) + prom_printf("WARNING: maximum CPUs (" __stringify(NR_CPUS) + ") exceeded: ignoring extras\n"); -#ifdef DEBUG_PROM - prom_print(RELOC("prom_hold_cpus: end...\n")); -#endif + prom_debug("prom_hold_cpus: end...\n"); } static void __init smt_setup(void) { char *p, *q; char my_smt_enabled = SMT_DYNAMIC; - ihandle prom_options = NULL; + ihandle prom_options = 0; char option[9]; unsigned long offset = reloc_offset(); struct naca_struct *_naca = RELOC(naca); @@ -1233,13 +1145,10 @@ static void __init smt_setup(void) } } if (!found) { - prom_options = (ihandle)call_prom(RELOC("finddevice"), 1, 1, RELOC("/options")); + prom_options = call_prom("finddevice", 1, 1, ADDR("/options")); if (prom_options != (ihandle) -1) { - call_prom(RELOC("getprop"), - 4, 1, prom_options, - RELOC("ibm,smt-enabled"), - option, - sizeof(option)); + prom_getprop(prom_options, "ibm,smt-enabled", + option, sizeof(option)); if (option[0] != 0) { found = 1; if (!strcmp(option, RELOC("off"))) @@ -1272,43 +1181,29 @@ static void __init setup_disp_fake_bi(ihandle dp) int i, naddrs; char name[64]; unsigned long offset = reloc_offset(); - char *getprop = RELOC("getprop"); - - prom_print(RELOC("Initializing fake screen: ")); memset(name, 0, sizeof(name)); - call_prom(getprop, 4, 1, dp, RELOC("name"), name, sizeof(name)); + prom_getprop(dp, "name", name, sizeof(name)); name[sizeof(name)-1] = 0; - prom_print(name); - prom_print(RELOC("\n")); - call_prom(getprop, 4, 1, dp, RELOC("width"), &width, sizeof(width)); - call_prom(getprop, 4, 1, dp, RELOC("height"), &height, sizeof(height)); - call_prom(getprop, 4, 1, dp, RELOC("depth"), &depth, sizeof(depth)); + prom_printf("Initializing fake screen: %s\n", name); + + prom_getprop(dp, "width", &width, sizeof(width)); + prom_getprop(dp, "height", &height, sizeof(height)); + prom_getprop(dp, "depth", &depth, sizeof(depth)); pitch = width * ((depth + 7) / 8); - call_prom(getprop, 4, 1, dp, RELOC("linebytes"), - &pitch, sizeof(pitch)); + prom_getprop(dp, "linebytes", &pitch, sizeof(pitch)); if (pitch == 1) pitch = 0x1000; /* for strange IBM display */ address = 0; - prom_print(RELOC("width ")); - prom_print_hex(width); - prom_print(RELOC(" height ")); - prom_print_hex(height); - prom_print(RELOC(" depth ")); - prom_print_hex(depth); - prom_print(RELOC(" linebytes ")); - prom_print_hex(pitch); - prom_print(RELOC("\n")); - + prom_printf("width %x height %x depth %x linebytes %x\n", + width, height, depth, depth); - call_prom(getprop, 4, 1, dp, RELOC("address"), - &address, sizeof(address)); + prom_getprop(dp, "address", &address, sizeof(address)); if (address == 0) { /* look for an assigned address with a size of >= 1MB */ - naddrs = (int) call_prom(getprop, 4, 1, dp, - RELOC("assigned-addresses"), - addrs, sizeof(addrs)); + naddrs = prom_getprop(dp, "assigned-addresses", + addrs, sizeof(addrs)); naddrs /= sizeof(struct pci_reg_property); for (i = 0; i < naddrs; ++i) { if (addrs[i].size_lo >= (1 << 20)) { @@ -1320,14 +1215,12 @@ static void __init setup_disp_fake_bi(ihandle dp) } } if (address == 0) { - prom_print(RELOC("Failed to get address of frame buffer\n")); + prom_printf("Failed to get address of frame buffer\n"); return; } } btext_setup_display(width, height, depth, pitch, address); - prom_print(RELOC("Addr of fb: ")); - prom_print_hex(address); - prom_print_nl(); + prom_printf("Addr of fb: %x\n", address); RELOC(boot_text_mapped) = 0; } #endif /* CONFIG_BOOTX_TEXT */ @@ -1344,15 +1237,14 @@ static void __init prom_init_client_services(unsigned long pp) _prom->encode_phys_size = 32; /* get a handle for the stdout device */ - _prom->chosen = (ihandle)call_prom(RELOC("finddevice"), 1, 1, - RELOC("/chosen")); + _prom->chosen = call_prom("finddevice", 1, 1, ADDR("/chosen")); if ((long)_prom->chosen <= 0) - prom_panic(RELOC("cannot find chosen")); /* msg won't be printed :( */ + prom_panic("cannot find chosen"); /* msg won't be printed :( */ /* get device tree root */ - _prom->root = (ihandle)call_prom(RELOC("finddevice"), 1, 1, RELOC("/")); + _prom->root = call_prom("finddevice", 1, 1, ADDR("/")); if ((long)_prom->root <= 0) - prom_panic(RELOC("cannot find device tree root")); /* msg won't be printed :( */ + prom_panic("cannot find device tree root"); /* msg won't be printed :( */ } static void __init prom_init_stdout(void) @@ -1361,12 +1253,10 @@ static void __init prom_init_stdout(void) struct prom_t *_prom = PTRRELOC(&prom); u32 val; - if ((long)call_prom(RELOC("getprop"), 4, 1, _prom->chosen, - RELOC("stdout"), &val, - sizeof(val)) <= 0) - prom_panic(RELOC("cannot find stdout")); + if (prom_getprop(_prom->chosen, "stdout", &val, sizeof(val)) <= 0) + prom_panic("cannot find stdout"); - _prom->stdout = (ihandle)(unsigned long)val; + _prom->stdout = val; } static int __init prom_find_machine_type(void) @@ -1376,9 +1266,8 @@ static int __init prom_find_machine_type(void) char compat[256]; int len, i = 0; - len = (int)(long)call_prom(RELOC("getprop"), 4, 1, _prom->root, - RELOC("compatible"), - compat, sizeof(compat)-1); + len = prom_getprop(_prom->root, "compatible", + compat, sizeof(compat)-1); if (len > 0) { compat[len] = 0; while (i < len) { @@ -1400,13 +1289,7 @@ static int __init prom_set_color(ihandle ih, int i, int r, int g, int b) { unsigned long offset = reloc_offset(); - return (int)(long)call_prom(RELOC("call-method"), 6, 1, - RELOC("color!"), - ih, - (void *)(long) i, - (void *)(long) b, - (void *)(long) g, - (void *)(long) r ); + return call_prom("call-method", 6, 1, ADDR("color!"), ih, i, b, g, r); } /* @@ -1447,16 +1330,13 @@ static unsigned long __init check_display(unsigned long mem) _prom->disp_node = 0; - prom_print(RELOC("Looking for displays\n")); - if (RELOC(of_stdout_device) != 0) { - prom_print(RELOC("OF stdout is : ")); - prom_print(PTRRELOC(RELOC(of_stdout_device))); - prom_print(RELOC("\n")); - } + prom_printf("Looking for displays\n"); + if (RELOC(of_stdout_device) != 0) + prom_printf("OF stdout is : %s\n", + PTRRELOC(RELOC(of_stdout_device))); for (node = 0; prom_next_node(&node); ) { type[0] = 0; - call_prom(RELOC("getprop"), 4, 1, node, RELOC("device_type"), - type, sizeof(type)); + prom_getprop(node, "device_type", type, sizeof(type)); if (strcmp(type, RELOC("display")) != 0) continue; /* It seems OF doesn't null-terminate the path :-( */ @@ -1467,12 +1347,9 @@ static unsigned long __init check_display(unsigned long mem) * leave some room at the end of the path for appending extra * arguments */ - if ((long) call_prom(RELOC("package-to-path"), 3, 1, - node, path, 250) < 0) + if (call_prom("package-to-path", 3, 1, node, path, 250) < 0) continue; - prom_print(RELOC("found display : ")); - prom_print(path); - prom_print(RELOC("\n")); + prom_printf("found display : %s\n", path); /* * If this display is the device that OF is using for stdout, @@ -1489,27 +1366,26 @@ static unsigned long __init check_display(unsigned long mem) RELOC(prom_display_nodes[i]) = RELOC(prom_display_nodes[i-1]); } - _prom->disp_node = (ihandle)(unsigned long)node; + _prom->disp_node = node; } RELOC(prom_display_paths[i]) = PTRUNRELOC(path); RELOC(prom_display_nodes[i]) = node; if (_prom->disp_node == 0) - _prom->disp_node = (ihandle)(unsigned long)node; + _prom->disp_node = node; if (RELOC(prom_num_displays) >= FB_MAX) break; } - prom_print(RELOC("Opening displays...\n")); + prom_printf("Opening displays...\n"); for (j = RELOC(prom_num_displays) - 1; j >= 0; j--) { path = PTRRELOC(RELOC(prom_display_paths[j])); - prom_print(RELOC("opening display : ")); - prom_print(path); - ih = (ihandle)call_prom(RELOC("open"), 1, 1, path); + prom_printf("opening display : %s", path); + ih = call_prom("open", 1, 1, path); if (ih == (ihandle)0 || ih == (ihandle)-1) { - prom_print(RELOC("... failed\n")); + prom_printf("... failed\n"); continue; } - prom_print(RELOC("... done\n")); + prom_printf("... done\n"); /* Setup a useable color table when the appropriate * method is available. Should update this to set-colors */ @@ -1546,9 +1422,9 @@ static void __init *__make_room(unsigned long *mem_start, unsigned long *mem_end unsigned long initrd_len; if (*mem_end != RELOC(initrd_start)) - prom_panic(RELOC("No memory for copy_device_tree")); + prom_panic("No memory for copy_device_tree"); - prom_print(RELOC("Huge device_tree: moving initrd\n")); + prom_printf("Huge device_tree: moving initrd\n"); /* Move by 4M. */ initrd_len = RELOC(initrd_end) - RELOC(initrd_start); *mem_end = RELOC(initrd_start) + 4 * 1024 * 1024; @@ -1557,7 +1433,7 @@ static void __init *__make_room(unsigned long *mem_start, unsigned long *mem_end RELOC(initrd_start) = *mem_end; RELOC(initrd_end) = RELOC(initrd_start) + initrd_len; #else - prom_panic(RELOC("No memory for copy_device_tree")); + prom_panic("No memory for copy_device_tree"); #endif } @@ -1606,8 +1482,7 @@ inspect_node(phandle node, struct device_node *dad, for (;;) { /* 32 is max len of name including nul. */ namep = make_room(mem_start, mem_end, char[32]); - if ((long) call_prom(RELOC("nextprop"), 3, 1, node, prev_name, - namep) <= 0) { + if (call_prom("nextprop", 3, 1, node, prev_name, namep) <= 0) { /* No more nodes: unwind alloc */ *mem_start = (unsigned long)namep; break; @@ -1619,28 +1494,24 @@ inspect_node(phandle node, struct device_node *dad, pp->name = PTRUNRELOC(namep); prev_name = namep; - pp->length = call_prom(RELOC("getproplen"), 2, 1, node, namep); + pp->length = call_prom("getproplen", 2, 1, node, namep); if (pp->length < 0) continue; if (pp->length > MAX_PROPERTY_LENGTH) { char path[128]; - prom_print(RELOC("WARNING: ignoring large property ")); + prom_printf("WARNING: ignoring large property "); /* It seems OF doesn't null-terminate the path :-( */ memset(path, 0, sizeof(path)); - if (call_prom(RELOC("package-to-path"), 3, 1, node, - path, sizeof(path)-1) > 0) - prom_print(path); - prom_print(namep); - prom_print(RELOC(" length 0x")); - prom_print_hex(pp->length); - prom_print_nl(); - + if (call_prom("package-to-path", 3, 1, node, + path, sizeof(path)-1) > 0) + prom_printf("[%s] ", path); + prom_printf("%s length 0x%x\n", namep, pp->length); continue; } valp = __make_room(mem_start, mem_end, pp->length, 1); pp->value = PTRUNRELOC(valp); - call_prom(RELOC("getprop"), 4, 1, node, namep,valp,pp->length); + call_prom("getprop", 4, 1, node, namep, valp, pp->length); *prev_propp = PTRUNRELOC(pp); prev_propp = &pp->next; } @@ -1660,19 +1531,19 @@ inspect_node(phandle node, struct device_node *dad, /* Set np->linux_phandle to the value of the ibm,phandle property if it exists, otherwise to the phandle for this node. */ np->linux_phandle = node; - if ((int)call_prom(RELOC("getprop"), 4, 1, node, RELOC("ibm,phandle"), - &ibm_phandle, sizeof(ibm_phandle)) > 0) + if (prom_getprop(node, "ibm,phandle", + &ibm_phandle, sizeof(ibm_phandle)) > 0) np->linux_phandle = ibm_phandle; /* get the node's full name */ namep = (char *)*mem_start; - l = (long) call_prom(RELOC("package-to-path"), 3, 1, node, - namep, *mem_end - *mem_start); + l = call_prom("package-to-path", 3, 1, node, + namep, *mem_end - *mem_start); if (l >= 0) { /* Didn't fit? Get more room. */ if (l+1 > *mem_end - *mem_start) { namep = __make_room(mem_start, mem_end, l+1, 1); - call_prom(RELOC("package-to-path"),3,1,node,namep,l); + call_prom("package-to-path", 3, 1, node, namep, l); } np->full_name = PTRUNRELOC(namep); namep[l] = '\0'; @@ -1680,11 +1551,11 @@ inspect_node(phandle node, struct device_node *dad, } /* do all our children */ - child = call_prom(RELOC("child"), 1, 1, node); + child = call_prom("child", 1, 1, node); while (child != (phandle)0) { inspect_node(child, np, mem_start, mem_end, allnextpp); - child = call_prom(RELOC("peer"), 1, 1, child); + child = call_prom("peer", 1, 1, child); } } @@ -1706,9 +1577,9 @@ copy_device_tree(unsigned long mem_start) mem_end = RELOC(initrd_start); #endif /* CONFIG_BLK_DEV_INITRD */ - root = call_prom(RELOC("peer"), 1, 1, (phandle)0); + root = call_prom("peer", 1, 1, (phandle)0); if (root == (phandle)0) { - prom_panic(RELOC("couldn't get device tree root\n")); + prom_panic("couldn't get device tree root\n"); } allnextp = &RELOC(allnodes); inspect_node(root, 0, &mem_start, &mem_end, &allnextp); @@ -1720,44 +1591,25 @@ copy_device_tree(unsigned long mem_start) static struct bi_record * __init prom_bi_rec_verify(struct bi_record *bi_recs) { struct bi_record *first, *last; -#ifdef DEBUG_PROM - unsigned long offset = reloc_offset(); - prom_print(RELOC("birec_verify: r6=0x")); - prom_print_hex((unsigned long)bi_recs); - prom_print_nl(); - if (bi_recs != NULL) { - prom_print(RELOC(" tag=0x")); - prom_print_hex(bi_recs->tag); - prom_print_nl(); - } -#endif /* DEBUG_PROM */ + prom_debug("birec_verify: r6=0x%x\n", (unsigned long)bi_recs); + if (bi_recs != NULL) + prom_debug(" tag=0x%x\n", bi_recs->tag); if ( bi_recs == NULL || bi_recs->tag != BI_FIRST ) return NULL; last = (struct bi_record *)(long)bi_recs->data[0]; -#ifdef DEBUG_PROM - prom_print(RELOC(" last=0x")); - prom_print_hex((unsigned long)last); - prom_print_nl(); - if (last != NULL) { - prom_print(RELOC(" last_tag=0x")); - prom_print_hex(last->tag); - prom_print_nl(); - } -#endif /* DEBUG_PROM */ + prom_debug(" last=0x%x\n", (unsigned long)last); + if (last != NULL) + prom_debug(" last_tag=0x%x\n", last->tag); if ( last == NULL || last->tag != BI_LAST ) return NULL; first = (struct bi_record *)(long)last->data[0]; -#ifdef DEBUG_PROM - prom_print(RELOC(" first=0x")); - prom_print_hex((unsigned long)first); - prom_print_nl(); -#endif /* DEBUG_PROM */ + prom_debug(" first=0x%x\n", (unsigned long)first); if ( first == NULL || first != bi_recs ) return NULL; @@ -1776,11 +1628,7 @@ static void __init prom_bi_rec_reserve(void) for ( rec=_prom->bi_recs; rec->tag != BI_LAST; rec=bi_rec_next(rec) ) { -#ifdef DEBUG_PROM - prom_print(RELOC("bi: 0x")); - prom_print_hex(rec->tag); - prom_print_nl(); -#endif /* DEBUG_PROM */ + prom_debug("bi: 0x%x\n", rec->tag); switch (rec->tag) { #ifdef CONFIG_BLK_DEV_INITRD case BI_INITRD: @@ -1833,31 +1681,17 @@ prom_init(unsigned long r3, unsigned long r4, unsigned long pp, /* Init prom stdout device */ prom_init_stdout(); -#ifdef DEBUG_PROM - prom_print(RELOC("klimit=0x")); - prom_print_hex(RELOC(klimit)); - prom_print_nl(); - prom_print(RELOC("offset=0x")); - prom_print_hex(offset); - prom_print_nl(); - prom_print(RELOC("->mem=0x")); - prom_print_hex(RELOC(klimit) - offset); - prom_print_nl(); -#endif /* DEBUG_PROM */ + prom_debug("klimit=0x%x\n", RELOC(klimit)); + prom_debug("offset=0x%x\n", offset); + prom_debug("->mem=0x%x\n", RELOC(klimit) - offset); /* check out if we have bi_recs */ _prom->bi_recs = prom_bi_rec_verify((struct bi_record *)r6); if ( _prom->bi_recs != NULL ) { RELOC(klimit) = PTRUNRELOC((unsigned long)_prom->bi_recs + _prom->bi_recs->data[1]); -#ifdef DEBUG_PROM - prom_print(RELOC("bi_recs=0x")); - prom_print_hex((unsigned long)_prom->bi_recs); - prom_print_nl(); - prom_print(RELOC("new mem=0x")); - prom_print_hex(RELOC(klimit) - offset); - prom_print_nl(); -#endif /* DEBUG_PROM */ + prom_debug("bi_recs=0x%x\n", (unsigned long)_prom->bi_recs); + prom_debug("new mem=0x%x\n", RELOC(klimit) - offset); } /* If we don't have birec's or didn't find them, check for an initrd @@ -1884,57 +1718,46 @@ prom_init(unsigned long r3, unsigned long r4, unsigned long pp, /* Get the full OF pathname of the stdout device */ p = (char *) mem; memset(p, 0, 256); - call_prom(RELOC("instance-to-path"), 3, 1, _prom->stdout, p, 255); + call_prom("instance-to-path", 3, 1, _prom->stdout, p, 255); RELOC(of_stdout_device) = PTRUNRELOC(p); mem += strlen(p) + 1; getprop_rval = 1; - call_prom(RELOC("getprop"), 4, 1, - _prom->root, RELOC("#size-cells"), - &getprop_rval, sizeof(getprop_rval)); + prom_getprop(_prom->root, "#size-cells", + &getprop_rval, sizeof(getprop_rval)); _prom->encode_phys_size = (getprop_rval == 1) ? 32 : 64; /* Determine which cpu is actually running right _now_ */ - if ((long)call_prom(RELOC("getprop"), 4, 1, _prom->chosen, - RELOC("cpu"), &getprop_rval, - sizeof(getprop_rval)) <= 0) - prom_panic(RELOC("cannot find boot cpu")); - - prom_cpu = (ihandle)(unsigned long)getprop_rval; - cpu_pkg = call_prom(RELOC("instance-to-package"), 1, 1, prom_cpu); - call_prom(RELOC("getprop"), 4, 1, - cpu_pkg, RELOC("reg"), - &getprop_rval, sizeof(getprop_rval)); - _prom->cpu = (int)(unsigned long)getprop_rval; + if (prom_getprop(_prom->chosen, "cpu", + &prom_cpu, sizeof(prom_cpu)) <= 0) + prom_panic("cannot find boot cpu"); + + cpu_pkg = call_prom("instance-to-package", 1, 1, prom_cpu); + prom_getprop(cpu_pkg, "reg", &getprop_rval, sizeof(getprop_rval)); + _prom->cpu = getprop_rval; _xPaca[0].xHwProcNum = _prom->cpu; RELOC(boot_cpuid) = 0; -#ifdef DEBUG_PROM - prom_print(RELOC("Booting CPU hw index = 0x")); - prom_print_hex(_prom->cpu); - prom_print_nl(); -#endif + prom_debug("Booting CPU hw index = 0x%x\n", _prom->cpu); /* Get the boot device and translate it to a full OF pathname. */ p = (char *) mem; - l = (long) call_prom(RELOC("getprop"), 4, 1, _prom->chosen, - RELOC("bootpath"), p, 1<<20); + l = prom_getprop(_prom->chosen, "bootpath", p, 1<<20); if (l > 0) { p[l] = 0; /* should already be null-terminated */ RELOC(bootpath) = PTRUNRELOC(p); mem += l + 1; d = (char *) mem; *d = 0; - call_prom(RELOC("canon"), 3, 1, p, d, 1<<20); + call_prom("canon", 3, 1, p, d, 1<<20); RELOC(bootdevice) = PTRUNRELOC(d); mem = DOUBLEWORD_ALIGN(mem + strlen(d) + 1); } RELOC(cmd_line[0]) = 0; if ((long)_prom->chosen > 0) { - call_prom(RELOC("getprop"), 4, 1, _prom->chosen, - RELOC("bootargs"), p, sizeof(cmd_line)); + prom_getprop(_prom->chosen, "bootargs", p, sizeof(cmd_line)); if (p != NULL && p[0] != 0) strlcpy(RELOC(cmd_line), p, sizeof(cmd_line)); } @@ -1961,33 +1784,20 @@ prom_init(unsigned long r3, unsigned long r4, unsigned long pp, */ prom_hold_cpus(mem); -#ifdef DEBUG_PROM - prom_print(RELOC("after basic inits, mem=0x")); - prom_print_hex(mem); - prom_print_nl(); + prom_debug("after basic inits, mem=0x%x\n", mem); #ifdef CONFIG_BLK_DEV_INITRD - prom_print(RELOC("initrd_start=0x")); - prom_print_hex(RELOC(initrd_start)); - prom_print_nl(); - prom_print(RELOC("initrd_end=0x")); - prom_print_hex(RELOC(initrd_end)); - prom_print_nl(); + prom_debug("initrd_start=0x%x\n", RELOC(initrd_start)); + prom_debug("initrd_end=0x%x\n", RELOC(initrd_end)); #endif /* CONFIG_BLK_DEV_INITRD */ - prom_print(RELOC("copying OF device tree...\n")); -#endif /* DEBUG_PROM */ + prom_debug("copying OF device tree...\n"); + mem = copy_device_tree(mem); RELOC(klimit) = mem + offset; -#ifdef DEBUG_PROM - prom_print(RELOC("new klimit is\n")); - prom_print(RELOC("klimit=0x")); - prom_print_hex(RELOC(klimit)); - prom_print(RELOC(" ->mem=0x\n")); - prom_print(RELOC("klimit=0x")); - prom_print_hex(mem); - prom_print_nl(); -#endif /* DEBUG_PROM */ + prom_debug("new klimit is\n"); + prom_debug("klimit=0x%x\n", RELOC(klimit)); + prom_debug(" ->mem=0x%x\n", mem); lmb_reserve(0, __pa(RELOC(klimit))); @@ -2017,14 +1827,14 @@ prom_init(unsigned long r3, unsigned long r4, unsigned long pp, #endif #ifdef CONFIG_BOOTX_TEXT - if(_prom->disp_node) { - prom_print(RELOC("Setting up bi display...\n")); + if (_prom->disp_node) { + prom_printf("Setting up bi display...\n"); setup_disp_fake_bi(_prom->disp_node); } #endif /* CONFIG_BOOTX_TEXT */ - prom_print(RELOC("Calling quiesce ...\n")); - call_prom(RELOC("quiesce"), 0, 0); + prom_printf("Calling quiesce ...\n"); + call_prom("quiesce", 0, 0); phys = KERNELBASE - offset; #ifdef CONFIG_BLK_DEV_INITRD @@ -2035,7 +1845,7 @@ prom_init(unsigned long r3, unsigned long r4, unsigned long pp, } #endif /* CONFIG_BLK_DEV_INITRD */ - prom_print(RELOC("returning from prom_init\n")); + prom_printf("returning from prom_init\n"); return phys; } diff --git a/arch/ppc64/kernel/rtas-proc.c b/arch/ppc64/kernel/rtas-proc.c index 338f6608444a..b7d1c940cd5a 100644 --- a/arch/ppc64/kernel/rtas-proc.c +++ b/arch/ppc64/kernel/rtas-proc.c @@ -394,7 +394,7 @@ static ssize_t ppc_rtas_clock_read(struct file * file, char * buf, size_t count, loff_t *ppos) { unsigned int year, mon, day, hour, min, sec; - unsigned long *ret = kmalloc(4*8, GFP_KERNEL); + int ret[8]; int n, sn, error; char stkbuf[40]; /* its small, its on stack */ @@ -411,7 +411,6 @@ static ssize_t ppc_rtas_clock_read(struct file * file, char * buf, n = scnprintf (stkbuf, sizeof(stkbuf), "%lu\n", mktime(year, mon, day, hour, min, sec)); } - kfree(ret); sn = strlen (stkbuf) +1; if (*ppos >= sn) @@ -434,7 +433,6 @@ static int ppc_rtas_sensor_read(char * buf, char ** start, off_t off, int count, int *eof, void *data) { int i,j,n; - unsigned long ret; int state, error; char *buffer; int get_sensor_state = rtas_token("get-sensor-state"); @@ -464,11 +462,10 @@ static int ppc_rtas_sensor_read(char * buf, char ** start, off_t off, /* A sensor may have multiple instances */ while (j >= 0) { - error = rtas_call(get_sensor_state, 2, 2, &ret, + error = rtas_call(get_sensor_state, 2, 2, &state, sensors.sensor[i].token, sensors.sensor[i].quant - j); - state = (int) ret; n += ppc_rtas_process_sensor(sensors.sensor[i], state, error, buffer+n ); n += sprintf (buffer+n, "\n"); diff --git a/arch/ppc64/kernel/rtas.c b/arch/ppc64/kernel/rtas.c index efc1f75797a4..5199c0261b73 100644 --- a/arch/ppc64/kernel/rtas.c +++ b/arch/ppc64/kernel/rtas.c @@ -139,15 +139,13 @@ log_rtas_error(struct rtas_args *rtas_args) log_error(rtas_err_buf, ERR_TYPE_RTAS_LOG, 0); } -long -rtas_call(int token, int nargs, int nret, - unsigned long *outputs, ...) +int rtas_call(int token, int nargs, int nret, int *outputs, ...) { va_list list; int i, logit = 0; unsigned long s; struct rtas_args *rtas_args; - long ret; + int ret; PPCDBG(PPCDBG_RTAS, "Entering rtas_call\n"); PPCDBG(PPCDBG_RTAS, "\ttoken = 0x%x\n", token); @@ -167,8 +165,8 @@ rtas_call(int token, int nargs, int nret, rtas_args->rets = (rtas_arg_t *)&(rtas_args->args[nargs]); va_start(list, outputs); for (i = 0; i < nargs; ++i) { - rtas_args->args[i] = (rtas_arg_t)LONG_LSW(va_arg(list, ulong)); - PPCDBG(PPCDBG_RTAS, "\tnarg[%d] = 0x%lx\n", i, rtas_args->args[i]); + rtas_args->args[i] = va_arg(list, rtas_arg_t); + PPCDBG(PPCDBG_RTAS, "\tnarg[%d] = 0x%x\n", i, rtas_args->args[i]); } va_end(list); @@ -191,7 +189,7 @@ rtas_call(int token, int nargs, int nret, if (nret > 1 && outputs != NULL) for (i = 0; i < nret-1; ++i) outputs[i] = rtas_args->rets[i+1]; - ret = (ulong)((nret > 0) ? rtas_args->rets[0] : 0); + ret = (nret > 0)? rtas_args->rets[0]: 0; /* Gotta do something different here, use global lock for now... */ spin_unlock_irqrestore(&rtas.lock, s); @@ -227,20 +225,13 @@ int rtas_get_power_level(int powerdomain, int *level) { int token = rtas_token("get-power-level"); - long powerlevel; int rc; if (token == RTAS_UNKNOWN_SERVICE) return RTAS_UNKNOWN_OP; - while(1) { - rc = (int) rtas_call(token, 1, 2, &powerlevel, powerdomain); - if (rc == RTAS_BUSY) - udelay(1); - else - break; - } - *level = (int) powerlevel; + while ((rc = rtas_call(token, 1, 2, level, powerdomain)) == RTAS_BUSY) + udelay(1); return rc; } @@ -249,25 +240,21 @@ rtas_set_power_level(int powerdomain, int level, int *setlevel) { int token = rtas_token("set-power-level"); unsigned int wait_time; - long returned_level; int rc; if (token == RTAS_UNKNOWN_SERVICE) return RTAS_UNKNOWN_OP; while (1) { - rc = (int) rtas_call(token, 2, 2, &returned_level, powerdomain, - level); + rc = rtas_call(token, 2, 2, setlevel, powerdomain, level); if (rc == RTAS_BUSY) udelay(1); else if (rtas_is_extended_busy(rc)) { wait_time = rtas_extended_busy_delay_time(rc); udelay(wait_time * 1000); - } - else + } else break; } - *setlevel = (int) returned_level; return rc; } @@ -276,25 +263,21 @@ rtas_get_sensor(int sensor, int index, int *state) { int token = rtas_token("get-sensor-state"); unsigned int wait_time; - long returned_state; int rc; if (token == RTAS_UNKNOWN_SERVICE) return RTAS_UNKNOWN_OP; while (1) { - rc = (int) rtas_call(token, 2, 2, &returned_state, sensor, - index); + rc = rtas_call(token, 2, 2, state, sensor, index); if (rc == RTAS_BUSY) udelay(1); else if (rtas_is_extended_busy(rc)) { wait_time = rtas_extended_busy_delay_time(rc); udelay(wait_time * 1000); - } - else + } else break; } - *state = (int) returned_state; return rc; } @@ -309,8 +292,7 @@ rtas_set_indicator(int indicator, int index, int new_value) return RTAS_UNKNOWN_OP; while (1) { - rc = (int) rtas_call(token, 3, 1, NULL, indicator, index, - new_value); + rc = rtas_call(token, 3, 1, NULL, indicator, index, new_value); if (rc == RTAS_BUSY) udelay(1); else if (rtas_is_extended_busy(rc)) { @@ -409,7 +391,7 @@ rtas_restart(char *cmd) if (rtas_firmware_flash_list.next) rtas_flash_firmware(); - printk("RTAS system-reboot returned %ld\n", + printk("RTAS system-reboot returned %d\n", rtas_call(rtas_token("system-reboot"), 0, 1, NULL)); for (;;); } @@ -420,8 +402,8 @@ rtas_power_off(void) if (rtas_firmware_flash_list.next) rtas_flash_bypass_warning(); /* allow power on only with power button press */ - printk("RTAS power-off returned %ld\n", - rtas_call(rtas_token("power-off"), 2, 1, NULL,0xffffffff,0xffffffff)); + printk("RTAS power-off returned %d\n", + rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1)); for (;;); } @@ -438,7 +420,7 @@ static char rtas_os_term_buf[2048]; void rtas_os_term(char *str) { - long status; + int status; snprintf(rtas_os_term_buf, 2048, "OS panic: %s", str); @@ -449,7 +431,7 @@ void rtas_os_term(char *str) if (status == RTAS_BUSY) udelay(1); else if (status != 0) - printk(KERN_EMERG "ibm,os-term call failed %ld\n", + printk(KERN_EMERG "ibm,os-term call failed %d\n", status); } while (status == RTAS_BUSY); } diff --git a/arch/ppc64/kernel/rtas_flash.c b/arch/ppc64/kernel/rtas_flash.c index e9d21eb4edd3..aac9e96096f6 100644 --- a/arch/ppc64/kernel/rtas_flash.c +++ b/arch/ppc64/kernel/rtas_flash.c @@ -344,8 +344,8 @@ static void manage_flash(struct rtas_manage_flash_t *args_buf) s32 rc; while (1) { - rc = (s32) rtas_call(rtas_token("ibm,manage-flash-image"), 1, - 1, NULL, (long) args_buf->op); + rc = rtas_call(rtas_token("ibm,manage-flash-image"), 1, + 1, NULL, args_buf->op); if (rc == RTAS_RC_BUSY) udelay(1); else if (rtas_is_extended_busy(rc)) { @@ -429,15 +429,15 @@ static void validate_flash(struct rtas_validate_flash_t *args_buf) { int token = rtas_token("ibm,validate-flash-image"); unsigned int wait_time; - long update_results; + int update_results; s32 rc; rc = 0; while(1) { spin_lock(&rtas_data_buf_lock); memcpy(rtas_data_buf, args_buf->buf, VALIDATE_BUF_SIZE); - rc = (s32) rtas_call(token, 2, 2, &update_results, - __pa(rtas_data_buf), args_buf->buf_size); + rc = rtas_call(token, 2, 2, &update_results, + (u32) __pa(rtas_data_buf), args_buf->buf_size); memcpy(args_buf->buf, rtas_data_buf, VALIDATE_BUF_SIZE); spin_unlock(&rtas_data_buf_lock); @@ -451,7 +451,7 @@ static void validate_flash(struct rtas_validate_flash_t *args_buf) } args_buf->status = rc; - args_buf->update_results = (u32) update_results; + args_buf->update_results = update_results; } static int get_validate_flash_msg(struct rtas_validate_flash_t *args_buf, diff --git a/arch/ppc64/kernel/rtasd.c b/arch/ppc64/kernel/rtasd.c index eea82c7b29d1..aa649a24a947 100644 --- a/arch/ppc64/kernel/rtasd.c +++ b/arch/ppc64/kernel/rtasd.c @@ -364,7 +364,6 @@ static int rtasd(void *unused) unsigned int err_type; int cpu = 0; int event_scan = rtas_token("event-scan"); - cpumask_t all = CPU_MASK_ALL; int rc; daemonize("rtasd"); @@ -415,11 +414,11 @@ static int rtasd(void *unused) } lock_cpu_hotplug(); - cpu = first_cpu_const(mk_cpumask_const(cpu_online_map)); + cpu = first_cpu(cpu_online_map); for (;;) { set_cpus_allowed(current, cpumask_of_cpu(cpu)); do_event_scan(event_scan); - set_cpus_allowed(current, all); + set_cpus_allowed(current, CPU_MASK_ALL); /* Drop hotplug lock, and sleep for a bit (at least * one second since some machines have problems if we @@ -429,9 +428,9 @@ static int rtasd(void *unused) schedule_timeout((HZ*60/rtas_event_scan_rate) / 2); lock_cpu_hotplug(); - cpu = next_cpu_const(cpu, mk_cpumask_const(cpu_online_map)); + cpu = next_cpu(cpu, cpu_online_map); if (cpu == NR_CPUS) - cpu = first_cpu_const(mk_cpumask_const(cpu_online_map)); + cpu = first_cpu(cpu_online_map); } error: diff --git a/arch/ppc64/kernel/rtc.c b/arch/ppc64/kernel/rtc.c index eff800053c34..a08da09ed1a5 100644 --- a/arch/ppc64/kernel/rtc.c +++ b/arch/ppc64/kernel/rtc.c @@ -346,13 +346,13 @@ void iSeries_get_boot_time(struct rtc_time *tm) #define RTAS_CLOCK_BUSY (-2) void pSeries_get_boot_time(struct rtc_time *rtc_tm) { - unsigned long ret[8]; + int ret[8]; int error, wait_time; unsigned long max_wait_tb; max_wait_tb = __get_tb() + tb_ticks_per_usec * 1000 * MAX_RTC_WAIT; do { - error = rtas_call(rtas_token("get-time-of-day"), 0, 8, (void *)&ret); + error = rtas_call(rtas_token("get-time-of-day"), 0, 8, ret); if (error == RTAS_CLOCK_BUSY || rtas_is_extended_busy(error)) { wait_time = rtas_extended_busy_delay_time(error); /* This is boot time so we spin. */ @@ -381,13 +381,13 @@ void pSeries_get_boot_time(struct rtc_time *rtc_tm) */ void pSeries_get_rtc_time(struct rtc_time *rtc_tm) { - unsigned long ret[8]; + int ret[8]; int error, wait_time; unsigned long max_wait_tb; max_wait_tb = __get_tb() + tb_ticks_per_usec * 1000 * MAX_RTC_WAIT; do { - error = rtas_call(rtas_token("get-time-of-day"), 0, 8, (void *)&ret); + error = rtas_call(rtas_token("get-time-of-day"), 0, 8, ret); if (error == RTAS_CLOCK_BUSY || rtas_is_extended_busy(error)) { if (in_interrupt()) { printk(KERN_WARNING "error: reading clock would delay interrupt\n"); diff --git a/arch/ppc64/kernel/scanlog.c b/arch/ppc64/kernel/scanlog.c index 60e755132685..8f61669ad61a 100644 --- a/arch/ppc64/kernel/scanlog.c +++ b/arch/ppc64/kernel/scanlog.c @@ -49,7 +49,7 @@ static ssize_t scanlog_read(struct file *file, char *buf, struct inode * inode = file->f_dentry->d_inode; struct proc_dir_entry *dp; unsigned int *data; - unsigned long status; + int status; unsigned long len, off; unsigned int wait_time; @@ -81,11 +81,11 @@ static ssize_t scanlog_read(struct file *file, char *buf, spin_lock(&rtas_data_buf_lock); memcpy(rtas_data_buf, data, RTAS_DATA_BUF_SIZE); status = rtas_call(ibm_scan_log_dump, 2, 1, NULL, - __pa(rtas_data_buf), count); + (u32) __pa(rtas_data_buf), (u32) count); memcpy(data, rtas_data_buf, RTAS_DATA_BUF_SIZE); spin_unlock(&rtas_data_buf_lock); - DEBUG("status=%ld, data[0]=%x, data[1]=%x, data[2]=%x\n", + DEBUG("status=%d, data[0]=%x, data[1]=%x, data[2]=%x\n", status, data[0], data[1], data[2]); switch (status) { case SCANLOG_COMPLETE: @@ -133,7 +133,7 @@ static ssize_t scanlog_write(struct file * file, const char * buf, size_t count, loff_t *ppos) { char stkbuf[20]; - unsigned long status; + int status; if (count > 19) count = 19; if (copy_from_user (stkbuf, buf, count)) { @@ -144,8 +144,8 @@ static ssize_t scanlog_write(struct file * file, const char * buf, if (buf) { if (strncmp(stkbuf, "reset", 5) == 0) { DEBUG("reset scanlog\n"); - status = rtas_call(ibm_scan_log_dump, 2, 1, NULL, NULL, 0); - DEBUG("rtas returns %ld\n", status); + status = rtas_call(ibm_scan_log_dump, 2, 1, NULL, 0, 0); + DEBUG("rtas returns %d\n", status); } else if (strncmp(stkbuf, "debugon", 7) == 0) { printk(KERN_ERR "scanlog: debug on\n"); scanlog_debug = 1; diff --git a/arch/ppc64/kernel/setup.c b/arch/ppc64/kernel/setup.c index f13739566fa9..32b4db84bf19 100644 --- a/arch/ppc64/kernel/setup.c +++ b/arch/ppc64/kernel/setup.c @@ -82,7 +82,6 @@ unsigned long decr_overclock_proc0_set = 0; int powersave_nap; -char saved_command_line[COMMAND_LINE_SIZE]; unsigned char aux_device_present; void parse_cmd_line(unsigned long r3, unsigned long r4, unsigned long r5, @@ -165,7 +164,7 @@ void setup_system(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { #if defined(CONFIG_SMP) && defined(CONFIG_PPC_PSERIES) - unsigned int ret, i; + int ret, i; #endif #ifdef CONFIG_XMON_DEFAULT @@ -233,12 +232,11 @@ void setup_system(unsigned long r3, unsigned long r4, unsigned long r5, #ifdef CONFIG_SMP /* Start secondary threads on SMT systems */ for (i = 0; i < NR_CPUS; i++) { - if(cpu_available(i) && !cpu_possible(i)) { + if (cpu_available(i) && !cpu_possible(i)) { printk("%16.16x : starting thread\n", i); - rtas_call(rtas_token("start-cpu"), 3, 1, - (void *)&ret, + rtas_call(rtas_token("start-cpu"), 3, 1, &ret, get_hard_smp_processor_id(i), - *((unsigned long *)pseries_secondary_smp_init), + (u32)*((unsigned long *)pseries_secondary_smp_init), i); cpu_set(i, cpu_possible_map); systemcfg->processorCount++; diff --git a/arch/ppc64/kernel/smp.c b/arch/ppc64/kernel/smp.c index 7fa0e5a105b2..0a341cf1e75c 100644 --- a/arch/ppc64/kernel/smp.c +++ b/arch/ppc64/kernel/smp.c @@ -241,7 +241,7 @@ static void __devinit smp_openpic_setup_cpu(int cpu) */ static int query_cpu_stopped(unsigned int pcpu) { - long cpu_status; + int cpu_status; int status, qcss_tok; qcss_tok = rtas_token("query-cpu-stopped-state"); diff --git a/arch/ppc64/kernel/traps.c b/arch/ppc64/kernel/traps.c index 4de4982f58f3..15d38c53cd64 100644 --- a/arch/ppc64/kernel/traps.c +++ b/arch/ppc64/kernel/traps.c @@ -172,9 +172,9 @@ static struct rtas_error_log *FWNMI_get_errinfo(struct pt_regs *regs) */ static void FWNMI_release_errinfo(void) { - unsigned long ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL); + int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL); if (ret != 0) - printk("FWNMI: nmi-interlock failed: %ld\n", ret); + printk("FWNMI: nmi-interlock failed: %d\n", ret); } #endif diff --git a/arch/ppc64/kernel/xics.c b/arch/ppc64/kernel/xics.c index 1d9cf20a2900..35785ac01f06 100644 --- a/arch/ppc64/kernel/xics.c +++ b/arch/ppc64/kernel/xics.c @@ -240,14 +240,13 @@ static unsigned int real_irq_to_virt(unsigned int real_irq) static int get_irq_server(unsigned int irq) { cpumask_t cpumask = irq_affinity[irq]; - cpumask_t allcpus = CPU_MASK_ALL; cpumask_t tmp = CPU_MASK_NONE; unsigned int server; #ifdef CONFIG_IRQ_ALL_CPUS /* For the moment only implement delivery to all cpus or one cpu */ if (smp_threads_ready) { - if (cpus_equal(cpumask, allcpus)) { + if (cpus_equal(cpumask, CPU_MASK_ALL)) { server = default_distrib_server; } else { cpus_and(tmp, cpu_online_map, cpumask); @@ -276,7 +275,7 @@ static int get_irq_server(unsigned int irq) static void xics_enable_irq(unsigned int virq) { unsigned int irq; - long call_status; + int call_status; unsigned int server; irq = virt_irq_to_real(irq_offset_down(virq)); @@ -288,7 +287,7 @@ static void xics_enable_irq(unsigned int virq) DEFAULT_PRIORITY); if (call_status != 0) { printk(KERN_ERR "xics_enable_irq: irq=%x: ibm_set_xive " - "returned %lx\n", irq, call_status); + "returned %x\n", irq, call_status); return; } @@ -296,14 +295,14 @@ static void xics_enable_irq(unsigned int virq) call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq); if (call_status != 0) { printk(KERN_ERR "xics_enable_irq: irq=%x: ibm_int_on " - "returned %lx\n", irq, call_status); + "returned %x\n", irq, call_status); return; } } static void xics_disable_real_irq(unsigned int irq) { - long call_status; + int call_status; unsigned int server; if (irq == XICS_IPI) @@ -312,7 +311,7 @@ static void xics_disable_real_irq(unsigned int irq) call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq); if (call_status != 0) { printk(KERN_ERR "xics_disable_real_irq: irq=%x: " - "ibm_int_off returned %lx\n", irq, call_status); + "ibm_int_off returned %x\n", irq, call_status); return; } @@ -321,7 +320,7 @@ static void xics_disable_real_irq(unsigned int irq) call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, 0xff); if (call_status != 0) { printk(KERN_ERR "xics_disable_irq: irq=%x: ibm_set_xive(0xff)" - " returned %lx\n", irq, call_status); + " returned %x\n", irq, call_status); return; } } @@ -613,26 +612,25 @@ void xics_request_IPIs(void) static void xics_set_affinity(unsigned int virq, cpumask_t cpumask) { unsigned int irq; - long status; - unsigned long xics_status[2]; + int status; + int xics_status[2]; unsigned long newmask; - cpumask_t allcpus = CPU_MASK_ALL; cpumask_t tmp = CPU_MASK_NONE; irq = virt_irq_to_real(irq_offset_down(virq)); if (irq == XICS_IPI || irq == NO_IRQ) return; - status = rtas_call(ibm_get_xive, 1, 3, (void *)&xics_status, irq); + status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); if (status) { printk(KERN_ERR "xics_set_affinity: irq=%d ibm,get-xive " - "returns %ld\n", irq, status); + "returns %d\n", irq, status); return; } /* For the moment only implement delivery to all cpus or one cpu */ - if (cpus_equal(cpumask, allcpus)) { + if (cpus_equal(cpumask, CPU_MASK_ALL)) { newmask = default_distrib_server; } else { cpus_and(tmp, cpu_online_map, cpumask); @@ -646,7 +644,7 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask) if (status) { printk(KERN_ERR "xics_set_affinity irq=%d ibm,set-xive " - "returns %ld\n", irq, status); + "returns %d\n", irq, status); return; } } @@ -657,10 +655,10 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask) void xics_migrate_irqs_away(void) { int set_indicator = rtas_token("set-indicator"); - const unsigned long giqs = 9005UL; /* Global Interrupt Queue Server */ - unsigned long status = 0; + const unsigned int giqs = 9005UL; /* Global Interrupt Queue Server */ + int status = 0; unsigned int irq, cpu = smp_processor_id(); - unsigned long xics_status[2]; + int xics_status[2]; unsigned long flags; BUG_ON(set_indicator == RTAS_UNKNOWN_SERVICE); @@ -671,7 +669,7 @@ void xics_migrate_irqs_away(void) /* Refuse any new interrupts... */ rtas_call(set_indicator, 3, 1, &status, giqs, - hard_smp_processor_id(), 0UL); + hard_smp_processor_id(), 0); WARN_ON(status != 0); /* Allow IPIs again... */ @@ -694,11 +692,10 @@ void xics_migrate_irqs_away(void) spin_lock_irqsave(&desc->lock, flags); - status = rtas_call(ibm_get_xive, 1, 3, (void *)&xics_status, - irq); + status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); if (status) { printk(KERN_ERR "migrate_irqs_away: irq=%d " - "ibm,get-xive returns %ld\n", + "ibm,get-xive returns %d\n", irq, status); goto unlock; } @@ -721,7 +718,7 @@ void xics_migrate_irqs_away(void) irq, xics_status[0], xics_status[1]); if (status) printk(KERN_ERR "migrate_irqs_away irq=%d " - "ibm,set-xive returns %ld\n", + "ibm,set-xive returns %d\n", irq, status); unlock: diff --git a/arch/ppc64/lib/string.S b/arch/ppc64/lib/string.S index 84d14d1b118e..10e4e86bb2bd 100644 --- a/arch/ppc64/lib/string.S +++ b/arch/ppc64/lib/string.S @@ -66,28 +66,69 @@ _GLOBAL(strlen) blr _GLOBAL(memset) + neg r0,r5 rlwimi r4,r4,8,16,23 + andi. r0,r0,7 /* # bytes to be 8-byte aligned */ rlwimi r4,r4,16,0,15 - addi r6,r3,-4 - cmplwi 0,r5,4 - blt 7f - stwu r4,4(r6) - beqlr - andi. r0,r6,3 - add r5,r0,r5 - subf r6,r0,r6 - srwi r0,r5,2 + cmplw cr1,r5,r0 /* do we get that far? */ + rldimi r4,r4,32,0 + mr r6,r3 + mtcrf 1,r0 + mr r6,r3 + blt cr1,8f + beq+ 3f /* if already 8-byte aligned */ + subf r5,r0,r5 + bf 31,1f + stb r4,0(r6) + addi r6,r6,1 +1: bf 30,2f + sth r4,0(r6) + addi r6,r6,2 +2: bf 29,3f + stw r4,0(r6) + addi r6,r6,4 +3: srdi. r0,r5,6 + clrldi r5,r5,58 mtctr r0 - bdz 6f -1: stwu r4,4(r6) - bdnz 1b -6: andi. r5,r5,3 -7: cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r6,r6,3 -8: stbu r4,1(r6) - bdnz 8b + beq 5f +4: std r4,0(r6) + std r4,8(r6) + std r4,16(r6) + std r4,24(r6) + std r4,32(r6) + std r4,40(r6) + std r4,48(r6) + std r4,56(r6) + addi r6,r6,64 + bdnz 4b +5: srwi. r0,r5,3 + clrlwi r5,r5,29 + mtcrf 1,r0 + beq 8f + bf 29,6f + std r4,0(r6) + std r4,8(r6) + std r4,16(r6) + std r4,24(r6) + addi r6,r6,32 +6: bf 30,7f + std r4,0(r6) + std r4,8(r6) + addi r6,r6,16 +7: bf 31,8f + std r4,0(r6) + addi r6,r6,8 +8: cmpwi r5,0 + mtcrf 1,r5 + beqlr+ + bf 29,9f + stw r4,0(r6) + addi r6,r6,4 +9: bf 30,10f + sth r4,0(r6) + addi r6,r6,2 +10: bflr 31 + stb r4,0(r6) blr _GLOBAL(memmove) diff --git a/arch/ppc64/mm/init.c b/arch/ppc64/mm/init.c index 5043702a470f..857e8915ee89 100644 --- a/arch/ppc64/mm/init.c +++ b/arch/ppc64/mm/init.c @@ -89,15 +89,15 @@ unsigned long top_of_ram; void show_mem(void) { - int total = 0, reserved = 0; - int shared = 0, cached = 0; + unsigned long total = 0, reserved = 0; + unsigned long shared = 0, cached = 0; struct page *page; pg_data_t *pgdat; unsigned long i; printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); for_each_pgdat(pgdat) { for (i = 0; i < pgdat->node_spanned_pages; i++) { page = pgdat->node_mem_map + i; @@ -110,10 +110,10 @@ void show_mem(void) shared += page_count(page) - 1; } } - printk("%d pages of RAM\n",total); - printk("%d reserved pages\n",reserved); - printk("%d pages shared\n",shared); - printk("%d pages swap cached\n",cached); + printk("%ld pages of RAM\n", total); + printk("%ld reserved pages\n", reserved); + printk("%ld pages shared\n", shared); + printk("%ld pages swap cached\n", cached); } #ifdef CONFIG_PPC_ISERIES diff --git a/arch/ppc64/mm/numa.c b/arch/ppc64/mm/numa.c index c1c4d6cd0b32..222120298ab8 100644 --- a/arch/ppc64/mm/numa.c +++ b/arch/ppc64/mm/numa.c @@ -457,7 +457,7 @@ void __init paging_init(void) zones_size[ZONE_DMA] = end_pfn - start_pfn; zholes_size[ZONE_DMA] = 0; if (nid == 0) - zholes_size[ZONE_DMA] = node0_io_hole_size; + zholes_size[ZONE_DMA] = node0_io_hole_size >> PAGE_SHIFT; dbg("free_area_init node %d %lx %lx (hole: %lx)\n", nid, zones_size[ZONE_DMA], start_pfn, zholes_size[ZONE_DMA]); diff --git a/arch/ppc64/mm/tlb.c b/arch/ppc64/mm/tlb.c index 980443bebed1..8825e14cb35a 100644 --- a/arch/ppc64/mm/tlb.c +++ b/arch/ppc64/mm/tlb.c @@ -158,9 +158,10 @@ void pte_free_now(struct page *ptepage) pte_free(ptepage); } -static void pte_free_rcu_callback(void *arg) +static void pte_free_rcu_callback(struct rcu_head *head) { - struct pte_freelist_batch *batch = arg; + struct pte_freelist_batch *batch = + container_of(head, struct pte_freelist_batch, rcu); unsigned int i; for (i = 0; i < batch->index; i++) @@ -171,7 +172,7 @@ static void pte_free_rcu_callback(void *arg) void pte_free_submit(struct pte_freelist_batch *batch) { INIT_RCU_HEAD(&batch->rcu); - call_rcu(&batch->rcu, pte_free_rcu_callback, batch); + call_rcu(&batch->rcu, pte_free_rcu_callback); } void pte_free_finish(void) diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index d549ad5c2724..8b4c40d8f7bf 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c @@ -76,7 +76,6 @@ extern int _text,_etext, _edata, _end; #include <asm/setup.h> static char command_line[COMMAND_LINE_SIZE] = { 0, }; - char saved_command_line[COMMAND_LINE_SIZE]; static struct resource code_resource = { "Kernel code", 0x100000, 0 }; static struct resource data_resource = { "Kernel data", 0, 0 }; diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c index 177a3d26e261..1541b8699c17 100644 --- a/arch/s390/mm/init.c +++ b/arch/s390/mm/init.c @@ -60,7 +60,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); i = max_mapnr; while (i-- > 0) { total++; diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 8efb8e02aaf7..ce61d06cae26 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -45,6 +45,12 @@ config SH_7751_SOLUTION_ENGINE Select 7751 SolutionEngine if configuring for a Hitachi SH7751 evalutation board. +config SH_7300_SOLUTION_ENGINE + bool "SolutionEngine7300" + help + Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V) + evalutation board. + config SH_7751_SYSTEMH bool "SystemH7751R" help @@ -138,6 +144,18 @@ config SH_SECUREEDGE5410 This includes both the OEM SecureEdge products as well as the SME product line. +config SH_HS7751RVOIP + bool "HS7751RVOIP" + help + Select HS7751RVOIP if configuring for a Renesas Technology + Sales VoIP board. + +config SH_RTS7751R2D + bool "RTS7751R2D" + help + Select RTS7751R2D if configuring for a Renesas Technology + Sales SH-Graphics board. + config SH_UNKNOWN bool "BareCPU" help @@ -186,7 +204,11 @@ config CPU_SUBTYPE_SH7604 config CPU_SUBTYPE_SH7300 bool "SH7300" depends on CPU_SH3 - + +config CPU_SUBTYPE_SH7705 + bool "SH7705" + depends on CPU_SH3 + config CPU_SUBTYPE_SH7707 bool "SH7707" depends on CPU_SH3 @@ -224,10 +246,17 @@ config CPU_SUBTYPE_SH7760 depends on CPU_SH4 config CPU_SUBTYPE_ST40STB1 - bool "ST40STB1" - depends on CPU_SH4 - help - Select ST40STB1 if you have a ST40STB1 CPU. + bool "ST40STB1 / ST40RA" + depends on CPU_SH4 + help + Select ST40STB1 if you have a ST40RA CPU. + This was previously called the ST40STB1, hence the option name. + +config CPU_SUBTYPE_ST40GX1 + bool "ST40GX1" + depends on CPU_SH4 + help + Select ST40GX1 if you have a ST40GX1 CPU. endchoice @@ -268,7 +297,7 @@ config CMDLINE config MEMORY_START hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SECUREEDGE5410 - default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE) + default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D) ---help--- Computers built with Hitachi SuperH processors always map the ROM starting at address zero. But the processor @@ -287,7 +316,7 @@ config MEMORY_SIZE hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000) default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410 - default "0x04000000" if !MEMORY_OVERRIDE && SH_7751_SOLUTION_ENGINE + default "0x04000000" if !MEMORY_OVERRIDE && (SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D) default "0x02000000" if !MEMORY_OVERRIDE && SH_SOLUTION_ENGINE default "0x08000000" if SH_MPC1211 help @@ -299,7 +328,7 @@ config MEMORY_SIZE config MEMORY_SET bool - depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410) + depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D) default y help This is an option about which you will never be asked a question. @@ -358,7 +387,7 @@ config CF_BASE_ADDR # The SH7750 RTC module is disabled in the Dreamcast config SH_RTC bool - depends on !SH_DREAMCAST && !SH_SATURN + depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE default y help Selecting this option will allow the Linux kernel to emulate @@ -377,11 +406,26 @@ config SH_DSP This option must be set in order to enable the DSP. +config SH_ADC + bool "ADC support" + depends on CPU_SH3 + default y + help + Selecting this option will allow the Linux kernel to use SH3 on-chip + ADC module. + + If unsure, say N. + config SH_HP600 bool depends on SH_HP620 || SH_HP680 || SH_HP690 default y +config CPU_SUBTYPE_ST40 + bool + depends on CPU_SUBTYPE_ST40STB1 || CPU_SUBTYPE_ST40GX1 + default y + config DISCONTIGMEM bool depends on SH_HP690 @@ -514,10 +558,32 @@ config NR_CPUS This is purely to save memory - each supported CPU adds approximately eight kilobytes to the kernel image. +config HS7751RVOIP_CODEC + bool "Support VoIP Codec section" + depends on SH_HS7751RVOIP + help + Selecting this option will support CODEC section. + +config RTS7751R2D_REV11 + bool "RTS7751R2D Rev. 1.1 board support" + depends on SH_RTS7751R2D + help + Selecting this option will support version rev. 1.1. + +config SH_PCLK_CALC + bool + default n if CPU_SUBTYPE_SH7300 + default y + help + This option will cause the PCLK value to be probed at run-time. It + will display a notification if the probed value has greater than a + 1% variance of the hardcoded CONFIG_SH_PCLK_FREQ. + config SH_PCLK_FREQ int "Peripheral clock frequency (in Hz)" default "49876504" if CPU_SUBTYPE_SH7750 default "60013568" if CPU_SUBTYPE_SH7751 + default "33333333" if CPU_SUBTYPE_SH7300 default "1193182" help This option is used to specify the peripheral clock frequency. This @@ -570,12 +636,18 @@ source "arch/sh/cchips/Kconfig" config HEARTBEAT bool "Heartbeat LED" - depends on SH_MPC1211 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE + depends on SH_MPC1211 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D help Use the power-on LED on your machine as a load meter. The exact behavior is platform-dependent, but normally the flash frequency is a hyperbolic function of the 5-minute load average. +config RTC_9701JE + tristate "EPSON RTC-9701JE support" + depends on SH_RTS7751R2D + help + Selecting this option will support EPSON RTC-9701JE. + endmenu @@ -646,6 +718,24 @@ source "fs/Kconfig.binfmt" endmenu +menu "SH initrd options" + depends on BLK_DEV_INITRD + +config EMBEDDED_RAMDISK + bool "Embed root filesystem ramdisk into the kernel" + +config EMBEDDED_RAMDISK_IMAGE + string "Filename of gziped ramdisk image" + depends on EMBEDDED_RAMDISK + default "ramdisk.gz" + help + This is the filename of the ramdisk image to be built into the + kernel. Relative pathnames are relative to arch/mips/ramdisk/. + The ramdisk image is not part of the kernel distribution; you must + provide one yourself. + +endmenu + source "drivers/Kconfig" source "fs/Kconfig" @@ -675,6 +765,14 @@ config DEBUG_SPINLOCK best used in conjunction with the NMI watchdog so that spinlock deadlocks are also debuggable. +config DEBUG_INFO + bool "Compile the kernel with debug info" + help + If you say Y here the resulting kernel image will include + debugging info resulting in a larger kernel image. + Say Y here only if you plan to use gdb to debug the kernel. + If you don't debug the kernel, you can say N. + config SH_STANDARD_BIOS bool "Use LinuxSH standard BIOS" help @@ -688,9 +786,13 @@ config SH_STANDARD_BIOS mask ROM and no flash (WindowsCE machines fall in this category). If unsure, say N. -config SH_EARLY_PRINTK +config EARLY_SCIF_CONSOLE + bool "Use early SCIF console" + depends on CPU_SH4 + +config EARLY_PRINTK bool "Early printk support" - depends on SH_STANDARD_BIOS + depends on SH_STANDARD_BIOS || EARLY_SCIF_CONSOLE help Say Y here to redirect kernel printk messages to the serial port used by the SH-IPL bootloader, starting very early in the boot diff --git a/arch/sh/Makefile b/arch/sh/Makefile index ea63935f1a9e..7e0087146eb2 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -1,11 +1,11 @@ -# $Id: Makefile,v 1.34 2004/03/21 17:31:06 lethal Exp $ +# $Id: Makefile,v 1.35 2004/04/15 03:39:20 sugioka Exp $ # # This file is subject to the terms and conditions of the GNU General Public # License. See the file "COPYING" in the main directory of this archive # for more details. # # Copyright (C) 1999 Kaz Kojima -# Copyright (C) 2002, 2003 Paul Mundt +# Copyright (C) 2002, 2003, 2004 Paul Mundt # Copyright (C) 2002 M. R. Brown # # This file is included by the global makefile so that you can add your own @@ -64,10 +64,18 @@ LIBGCC := $(shell $(CC) $(CFLAGS) -print-libgcc-file-name) core-y += arch/sh/kernel/ arch/sh/mm/ +# +# ramdisk/initrd support +# You need a compressed ramdisk image, named +# CONFIG_EMBEDDED_RAMDISK_IMAGE. Relative pathnames +# are relative to arch/sh/ramdisk/. +# +core-$(CONFIG_EMBEDDED_RAMDISK) += arch/sh/ramdisk/ + # Boards machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751 -machdir-$(CONFIG_SH_7751_SYSTEMH) := systemh +machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300 machdir-$(CONFIG_SH_STB1_HARP) := harp machdir-$(CONFIG_SH_STB1_OVERDRIVE) := overdrive machdir-$(CONFIG_SH_HP620) := hp6xx/hp620 @@ -84,19 +92,24 @@ machdir-$(CONFIG_SH_SH2000) := sh2000 machdir-$(CONFIG_SH_ADX) := adx machdir-$(CONFIG_SH_MPC1211) := mpc1211 machdir-$(CONFIG_SH_SECUREEDGE5410) := snapgear +machdir-$(CONFIG_SH_HS7751RVOIP) := renesas/hs7751rvoip +machdir-$(CONFIG_SH_RTS7751R2D) := renesas/rts7751r2d +machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh machdir-$(CONFIG_SH_UNKNOWN) := unknown -incdir-y := $(machdir-y) +incdir-y := $(notdir $(machdir-y)) incdir-$(CONFIG_SH_SOLUTION_ENGINE) := se incdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se7751 +incdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se7300 incdir-$(CONFIG_SH_HP600) := hp6xx core-y += arch/sh/boards/$(machdir-y)/ # Companion chips -core-$(CONFIG_HD64461) += arch/sh/cchips/hd6446x/hd64461/ -core-$(CONFIG_HD64465) += arch/sh/cchips/hd6446x/hd64465/ +core-$(CONFIG_HD64461) += arch/sh/cchips/hd6446x/hd64461/ +core-$(CONFIG_HD64465) += arch/sh/cchips/hd6446x/hd64465/ +core-$(CONFIG_VOYAGERGX) += arch/sh/cchips/voyagergx/ cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2 cpuincdir-$(CONFIG_CPU_SH3) := cpu-sh3 @@ -114,6 +127,9 @@ AFLAGS_vmlinux.lds.o := -traditional prepare: target_links .PHONY: target_links FORCE + +all: zImage + target_links: @echo ' Making asm-sh/cpu -> asm-sh/$(cpuincdir-y) link' @rm -f include/asm-sh/cpu diff --git a/arch/sh/boards/renesas/hs7751rvoip/Makefile b/arch/sh/boards/renesas/hs7751rvoip/Makefile new file mode 100644 index 000000000000..e8b4109ace11 --- /dev/null +++ b/arch/sh/boards/renesas/hs7751rvoip/Makefile @@ -0,0 +1,12 @@ +# +# Makefile for the HS7751RVoIP specific parts of the kernel +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +obj-y := mach.o setup.o io.o irq.o led.o + +obj-$(CONFIG_PCI) += pci.o + diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c new file mode 100644 index 000000000000..a2ecd2d6af53 --- /dev/null +++ b/arch/sh/boards/renesas/hs7751rvoip/io.c @@ -0,0 +1,310 @@ +/* + * linux/arch/sh/kernel/io_hs7751rvoip.c + * + * Copyright (C) 2001 Ian da Silva, Jeremy Siegel + * Based largely on io_se.c. + * + * I/O routine for Renesas Technology sales HS7751RVoIP + * + * Initial version only to support LAN access; some + * placeholder code from io_hs7751rvoip.c left in with the + * expectation of later SuperIO and PCMCIA access. + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <asm/io.h> +#include <asm/hs7751rvoip/hs7751rvoip.h> +#include <asm/addrspace.h> + +#include <linux/module.h> +#include <linux/pci.h> +#include "../../../drivers/pci/pci-sh7751.h" + +extern void *area5_io8_base; /* Area 5 8bit I/O Base address */ +extern void *area6_io8_base; /* Area 6 8bit I/O Base address */ +extern void *area5_io16_base; /* Area 5 16bit I/O Base address */ +extern void *area6_io16_base; /* Area 6 16bit I/O Base address */ + +/* + * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC) + * of the 7751R processor, and has a SuperIO accessible via the PCI. + * The board also includes a PCMCIA controller on its memory bus, + * like the other Solution Engine boards. + */ + +#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) +#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) +#define PCI_IO_AREA SH7751_PCI_IO_BASE +#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE + +#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) + +#if defined(CONFIG_HS7751RVOIP_CODEC) +#define CODEC_IO_BASE 0x1000 +#endif + +#define maybebadio(name,port) \ + printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ + #name, (port), (__u32) __builtin_return_address(0)) + +static inline void delay(void) +{ + ctrl_inw(0xa0000000); +} + +static inline unsigned long port2adr(unsigned int port) +{ + if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) + if (port == 0x3f6) + return ((unsigned long)area5_io16_base + 0x0c); + else + return ((unsigned long)area5_io16_base + 0x800 + ((port-0x1f0) << 1)); + else + maybebadio(port2adr, (unsigned long)port); + return port; +} + +/* The 7751R HS7751RVoIP seems to have everything hooked */ +/* up pretty normally (nothing on high-bytes only...) so this */ +/* shouldn't be needed */ +static inline int shifted_port(unsigned long port) +{ + /* For IDE registers, value is not shifted */ + if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) + return 0; + else + return 1; +} + +#if defined(CONFIG_HS7751RVOIP_CODEC) +static inline int +codec_port(unsigned long port) +{ + if (CODEC_IO_BASE <= port && port < (CODEC_IO_BASE+0x20)) + return 1; + else + return 0; +} +#endif + +/* In case someone configures the kernel w/o PCI support: in that */ +/* scenario, don't ever bother to check for PCI-window addresses */ + +/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ +#if defined(CONFIG_PCI) +#define CHECK_SH7751_PCIIO(port) \ + ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) +#else +#define CHECK_SH7751_PCIIO(port) (0) +#endif + +/* + * General outline: remap really low stuff [eventually] to SuperIO, + * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) + * is mapped through the PCI IO window. Stuff with high bits (PXSEG) + * should be way beyond the window, and is used w/o translation for + * compatibility. + */ +unsigned char hs7751rvoip_inb(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned char *)port; +#if defined(CONFIG_HS7751RVOIP_CODEC) + else if (codec_port(port)) + return *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); +#endif + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + return *(volatile unsigned char *)PCI_IOMAP(port); + else + return (*(volatile unsigned short *)port2adr(port) & 0xff); +} + +unsigned char hs7751rvoip_inb_p(unsigned long port) +{ + unsigned char v; + + if (PXSEG(port)) + v = *(volatile unsigned char *)port; +#if defined(CONFIG_HS7751RVOIP_CODEC) + else if (codec_port(port)) + v = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); +#endif + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + v = *(volatile unsigned char *)PCI_IOMAP(port); + else + v = (*(volatile unsigned short *)port2adr(port) & 0xff); + delay(); + return v; +} + +unsigned short hs7751rvoip_inw(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned short *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + return *(volatile unsigned short *)PCI_IOMAP(port); + else + maybebadio(inw, port); + return 0; +} + +unsigned int hs7751rvoip_inl(unsigned long port) +{ + if (PXSEG(port)) + return *(volatile unsigned long *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + return *(volatile unsigned long *)PCI_IOMAP(port); + else + maybebadio(inl, port); + return 0; +} + +void hs7751rvoip_outb(unsigned char value, unsigned long port) +{ + + if (PXSEG(port)) + *(volatile unsigned char *)port = value; +#if defined(CONFIG_HS7751RVOIP_CIDEC) + else if (codec_port(port)) + *(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; +#endif + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + *(unsigned char *)PCI_IOMAP(port) = value; + else + *(volatile unsigned short *)port2adr(port) = value; +} + +void hs7751rvoip_outb_p(unsigned char value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned char *)port = value; +#if defined(CONFIG_HS7751RVOIP_CIDEC) + else if (codec_port(port)) + *(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; +#endif + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + *(unsigned char *)PCI_IOMAP(port) = value; + else + *(volatile unsigned short *)port2adr(port) = value; + delay(); +} + +void hs7751rvoip_outw(unsigned short value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned short *)port = value; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + *(unsigned short *)PCI_IOMAP(port) = value; + else + maybebadio(outw, port); +} + +void hs7751rvoip_outl(unsigned int value, unsigned long port) +{ + if (PXSEG(port)) + *(volatile unsigned long *)port = value; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + *((unsigned long *)PCI_IOMAP(port)) = value; + else + maybebadio(outl, port); +} + +void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count) +{ + if (PXSEG(port)) + while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)port; +#if defined(CONFIG_HS7751RVOIP_CODEC) + else if (codec_port(port)) + while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); +#endif + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + volatile __u8 *bp = (__u8 *)PCI_IOMAP(port); + + while (count--) *((volatile unsigned char *) addr)++ = *bp; + } else { + volatile __u16 *p = (volatile unsigned short *)port2adr(port); + + while (count--) *((unsigned char *) addr)++ = *p & 0xff; + } +} + +void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count) +{ + volatile __u16 *p; + + if (PXSEG(port)) + p = (volatile unsigned short *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + p = (volatile unsigned short *)PCI_IOMAP(port); + else + p = (volatile unsigned short *)port2adr(port); + while (count--) *((__u16 *) addr)++ = *p; +} + +void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count) +{ + if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + volatile __u32 *p = (__u32 *)PCI_IOMAP(port); + + while (count--) *((__u32 *) addr)++ = *p; + } else + maybebadio(insl, port); +} + +void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count) +{ + if (PXSEG(port)) + while (count--) *(volatile unsigned char *)port = *((unsigned char *) addr)++; +#if defined(CONFIG_HS7751RVOIP_CODEC) + else if (codec_port(port)) + while (count--) *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = *((unsigned char *) addr)++; +#endif + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + volatile __u8 *bp = (__u8 *)PCI_IOMAP(port); + + while (count--) *bp = *((volatile unsigned char *) addr)++; + } else { + volatile __u16 *p = (volatile unsigned short *)port2adr(port); + + while (count--) *p = *((unsigned char *) addr)++; + } +} + +void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count) +{ + volatile __u16 *p; + + if (PXSEG(port)) + p = (volatile unsigned short *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + p = (volatile unsigned short *)PCI_IOMAP(port); + else + p = (volatile unsigned short *)port2adr(port); + while (count--) *p = *((__u16 *) addr)++; +} + +void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count) +{ + if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + volatile __u32 *p = (__u32 *)PCI_IOMAP(port); + + while (count--) *p = *((__u32 *) addr)++; + } else + maybebadio(outsl, port); +} + +void *hs7751rvoip_ioremap(unsigned long offset, unsigned long size) +{ + if (offset >= 0xfd000000) + return (void *)offset; + else + return (void *)P2SEGADDR(offset); +} +EXPORT_SYMBOL(hs7751rvoip_ioremap); + +unsigned long hs7751rvoip_isa_port2addr(unsigned long offset) +{ + return port2adr(offset); +} diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c new file mode 100644 index 000000000000..a7921f67a35f --- /dev/null +++ b/arch/sh/boards/renesas/hs7751rvoip/irq.c @@ -0,0 +1,122 @@ +/* + * linux/arch/sh/boards/renesas/hs7751rvoip/irq.c + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Renesas Technology Sales HS7751RVoIP Support. + * + * Modified for HS7751RVoIP by + * Atom Create Engineering Co., Ltd. 2002. + * Lineo uSolutions, Inc. 2003. + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/hs7751rvoip/hs7751rvoip.h> + +static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7}; + +static void enable_hs7751rvoip_irq(unsigned int irq); +static void disable_hs7751rvoip_irq(unsigned int irq); + +/* shutdown is same as "disable" */ +#define shutdown_hs7751rvoip_irq disable_hs7751rvoip_irq + +static void ack_hs7751rvoip_irq(unsigned int irq); +static void end_hs7751rvoip_irq(unsigned int irq); + +static unsigned int startup_hs7751rvoip_irq(unsigned int irq) +{ + enable_hs7751rvoip_irq(irq); + return 0; /* never anything pending */ +} + +static void disable_hs7751rvoip_irq(unsigned int irq) +{ + unsigned long flags; + unsigned short val; + unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); + + /* Set the priority in IPR to 0 */ + local_irq_save(flags); + val = ctrl_inw(IRLCNTR3); + val &= mask; + ctrl_outw(val, IRLCNTR3); + local_irq_restore(flags); +} + +static void enable_hs7751rvoip_irq(unsigned int irq) +{ + unsigned long flags; + unsigned short val; + unsigned short value = (0x0001 << mask_pos[irq]); + + /* Set priority in IPR back to original value */ + local_irq_save(flags); + val = ctrl_inw(IRLCNTR3); + val |= value; + ctrl_outw(val, IRLCNTR3); + local_irq_restore(flags); +} + +static void ack_hs7751rvoip_irq(unsigned int irq) +{ + disable_hs7751rvoip_irq(irq); +} + +static void end_hs7751rvoip_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_hs7751rvoip_irq(irq); +} + +static struct hw_interrupt_type hs7751rvoip_irq_type = { + "HS7751RVoIP IRQ", + startup_hs7751rvoip_irq, + shutdown_hs7751rvoip_irq, + enable_hs7751rvoip_irq, + disable_hs7751rvoip_irq, + ack_hs7751rvoip_irq, + end_hs7751rvoip_irq, +}; + +static void make_hs7751rvoip_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + irq_desc[irq].handler = &hs7751rvoip_irq_type; + disable_hs7751rvoip_irq(irq); +} + +/* + * Initialize IRQ setting + */ +void __init init_hs7751rvoip_IRQ(void) +{ + int i; + + /* IRL0=ON HOOK1 + * IRL1=OFF HOOK1 + * IRL2=ON HOOK2 + * IRL3=OFF HOOK2 + * IRL4=Ringing Detection + * IRL5=CODEC + * IRL6=Ethernet + * IRL7=Ethernet Hub + * IRL8=USB Communication + * IRL9=USB Connection + * IRL10=USB DMA + * IRL11=CF Card + * IRL12=PCMCIA + * IRL13=PCI Slot + */ + ctrl_outw(0x9876, IRLCNTR1); + ctrl_outw(0xdcba, IRLCNTR2); + ctrl_outw(0x0050, IRLCNTR4); + ctrl_outw(0x4321, IRLCNTR5); + + for (i=0; i<14; i++) + make_hs7751rvoip_irq(i); +} diff --git a/arch/sh/boards/renesas/hs7751rvoip/led.c b/arch/sh/boards/renesas/hs7751rvoip/led.c new file mode 100644 index 000000000000..18a13c8da8a4 --- /dev/null +++ b/arch/sh/boards/renesas/hs7751rvoip/led.c @@ -0,0 +1,27 @@ +/* + * linux/arch/sh/kernel/setup_hs7751rvoip.c + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Renesas Technology Sales HS7751RVoIP Support. + * + * Modified for HS7751RVoIP by + * Atom Create Engineering Co., Ltd. 2002. + * Lineo uSolutions, Inc. 2003. + */ + +#include <linux/config.h> +#include <asm/io.h> +#include <asm/hs7751rvoip/hs7751rvoip.h> + +extern unsigned int debug_counter; + +void debug_led_disp(void) +{ + unsigned short value; + + value = (unsigned char)debug_counter++; + ctrl_outb((0xf0|value), PA_OUTPORTR); + if (value == 0x0f) + debug_counter = 0; +} diff --git a/arch/sh/boards/renesas/hs7751rvoip/mach.c b/arch/sh/boards/renesas/hs7751rvoip/mach.c new file mode 100644 index 000000000000..8bbed60220ca --- /dev/null +++ b/arch/sh/boards/renesas/hs7751rvoip/mach.c @@ -0,0 +1,55 @@ +/* + * linux/arch/sh/kernel/mach_hs7751rvoip.c + * + * Minor tweak of mach_se.c file to reference hs7751rvoip-specific items. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Machine vector for the Renesas Technology sales HS7751RVoIP + */ + +#include <linux/config.h> +#include <linux/init.h> + +#include <asm/machvec.h> +#include <asm/rtc.h> +#include <asm/irq.h> +#include <asm/hs7751rvoip/io.h> + +extern void init_hs7751rvoip_IRQ(void); +extern void *hs7751rvoip_ioremap(unsigned long, unsigned long); + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_hs7751rvoip __initmv = { + .mv_nr_irqs = 72, + + .mv_inb = hs7751rvoip_inb, + .mv_inw = hs7751rvoip_inw, + .mv_inl = hs7751rvoip_inl, + .mv_outb = hs7751rvoip_outb, + .mv_outw = hs7751rvoip_outw, + .mv_outl = hs7751rvoip_outl, + + .mv_inb_p = hs7751rvoip_inb_p, + .mv_inw_p = hs7751rvoip_inw, + .mv_inl_p = hs7751rvoip_inl, + .mv_outb_p = hs7751rvoip_outb_p, + .mv_outw_p = hs7751rvoip_outw, + .mv_outl_p = hs7751rvoip_outl, + + .mv_insb = hs7751rvoip_insb, + .mv_insw = hs7751rvoip_insw, + .mv_insl = hs7751rvoip_insl, + .mv_outsb = hs7751rvoip_outsb, + .mv_outsw = hs7751rvoip_outsw, + .mv_outsl = hs7751rvoip_outsl, + + .mv_ioremap = hs7751rvoip_ioremap, + .mv_isa_port2addr = hs7751rvoip_isa_port2addr, + .mv_init_irq = init_hs7751rvoip_IRQ, +}; +ALIAS_MV(hs7751rvoip) diff --git a/arch/sh/boards/renesas/hs7751rvoip/pci.c b/arch/sh/boards/renesas/hs7751rvoip/pci.c new file mode 100644 index 000000000000..7a442d1eca46 --- /dev/null +++ b/arch/sh/boards/renesas/hs7751rvoip/pci.c @@ -0,0 +1,150 @@ +/* + * linux/arch/sh/kernel/pci-hs7751rvoip.c + * + * Author: Ian DaSilva (idasilva@mvista.com) + * + * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * PCI initialization for the Renesas SH7751R HS7751RVoIP board + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pci.h> +#include <linux/module.h> + +#include <asm/io.h> +#include "../../../drivers/pci/pci-sh7751.h" +#include <asm/hs7751rvoip/hs7751rvoip.h> + +#define PCIMCR_MRSET_OFF 0xBFFFFFFF +#define PCIMCR_RFSH_OFF 0xFFFFFFFB + +/* + * Only long word accesses of the PCIC's internal local registers and the + * configuration registers from the CPU is supported. + */ +#define PCIC_WRITE(x,v) writel((v), PCI_REG(x)) +#define PCIC_READ(x) readl(PCI_REG(x)) + +/* + * Description: This function sets up and initializes the pcic, sets + * up the BARS, maps the DRAM into the address space etc, etc. + */ +int __init pcibios_init_platform(void) +{ + unsigned long bcr1, wcr1, wcr2, wcr3, mcr; + unsigned short bcr2, bcr3; + + /* + * Initialize the slave bus controller on the pcic. The values used + * here should not be hardcoded, but they should be taken from the bsc + * on the processor, to make this function as generic as possible. + * (i.e. Another sbc may usr different SDRAM timing settings -- in order + * for the pcic to work, its settings need to be exactly the same.) + */ + bcr1 = (*(volatile unsigned long *)(SH7751_BCR1)); + bcr2 = (*(volatile unsigned short *)(SH7751_BCR2)); + bcr3 = (*(volatile unsigned short *)(SH7751_BCR3)); + wcr1 = (*(volatile unsigned long *)(SH7751_WCR1)); + wcr2 = (*(volatile unsigned long *)(SH7751_WCR2)); + wcr3 = (*(volatile unsigned long *)(SH7751_WCR3)); + mcr = (*(volatile unsigned long *)(SH7751_MCR)); + + bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */ + (*(volatile unsigned long *)(SH7751_BCR1)) = bcr1; + + bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */ + PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */ + PCIC_WRITE(SH7751_PCIBCR2, bcr2); /* PCIC BCR2 */ + PCIC_WRITE(SH7751_PCIBCR3, bcr3); /* PCIC BCR3 */ + PCIC_WRITE(SH7751_PCIWCR1, wcr1); /* PCIC WCR1 */ + PCIC_WRITE(SH7751_PCIWCR2, wcr2); /* PCIC WCR2 */ + PCIC_WRITE(SH7751_PCIWCR3, wcr3); /* PCIC WCR3 */ + mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; + PCIC_WRITE(SH7751_PCIMCR, mcr); /* PCIC MCR */ + + /* Enable all interrupts, so we know what to fix */ + PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff); + PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f); + + /* Set up standard PCI config registers */ + PCIC_WRITE(SH7751_PCICONF1, 0xFB900047); /* Bus Master, Mem & I/O access */ + PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */ + PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O address (local regs) */ + PCIC_WRITE(SH7751_PCICONF5, 0x0c000000); /* PCI MEM address (local RAM) */ + PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM address (unused) */ + PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */ + PCIC_WRITE(SH7751_PCILSR0, 0x03f00000); /* MEM (full 64M exposed) */ + PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* MEM (unused) */ + PCIC_WRITE(SH7751_PCILAR0, 0x0c000000); /* MEM (direct map from PCI) */ + PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM (unused) */ + + /* Now turn it on... */ + PCIC_WRITE(SH7751_PCICR, 0xa5000001); + + /* + * Set PCIMBR and PCIIOBR here, assuming a single window + * (16M MEM, 256K IO) is enough. If a larger space is + * needed, the readx/writex and inx/outx functions will + * have to do more (e.g. setting registers for each call). + */ + + /* + * Set the MBR so PCI address is one-to-one with window, + * meaning all calls go straight through... use ifdef to + * catch erroneous assumption. + */ + BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE); + + PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM); + + /* Set IOBR for window containing area specified in pci.h */ + PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK)); + + /* All done, may as well say so... */ + printk("SH7751R PCI: Finished initialization of the PCI controller\n"); + + return 1; +} + +int __init pcibios_map_platform_irq(u8 slot, u8 pin) +{ + switch (slot) { + case 0: return IRQ_PCISLOT; /* PCI Extend slot */ + case 1: return IRQ_PCMCIA; /* PCI Cardbus Bridge */ + case 2: return IRQ_PCIETH; /* Realtek Ethernet controller */ + case 3: return IRQ_PCIHUB; /* Realtek Ethernet Hub controller */ + default: + printk("PCI: Bad IRQ mapping request for slot %d\n", slot); + return -1; + } +} + +static struct resource sh7751_io_resource = { + .name = "SH7751_IO", + .start = 0x4000, + .end = 0x4000 + SH7751_PCI_IO_SIZE - 1, + .flags = IORESOURCE_IO +}; + +static struct resource sh7751_mem_resource = { + .name = "SH7751_mem", + .start = SH7751_PCI_MEMORY_BASE, + .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM +}; + +extern struct pci_ops sh7751_pci_ops; + +struct pci_channel board_pci_channels[] = { + { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { NULL, NULL, NULL, 0, 0 }, +}; +EXPORT_SYMBOL(board_pci_channels); diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c new file mode 100644 index 000000000000..f1a78b6c714c --- /dev/null +++ b/arch/sh/boards/renesas/hs7751rvoip/setup.c @@ -0,0 +1,89 @@ +/* + * linux/arch/sh/kernel/setup_hs7751rvoip.c + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Renesas Technology Sales HS7751RVoIP Support. + * + * Modified for HS7751RVoIP by + * Atom Create Engineering Co., Ltd. 2002. + * Lineo uSolutions, Inc. 2003. + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <linux/irq.h> + +#include <linux/hdreg.h> +#include <linux/ide.h> +#include <asm/io.h> +#include <asm/hs7751rvoip/hs7751rvoip.h> + +#include <linux/mm.h> +#include <linux/vmalloc.h> + +/* defined in mm/ioremap.c */ +extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags); + +unsigned int debug_counter; + +const char *get_system_type(void) +{ + return "HS7751RVoIP"; +} + +/* + * Initialize the board + */ +void __init platform_setup(void) +{ + printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n"); + ctrl_outb(0xf0, PA_OUTPORTR); + debug_counter = 0; +} + +void *area5_io8_base; +void *area6_io8_base; +void *area5_io16_base; +void *area6_io16_base; + +int __init cf_init(void) +{ + pgprot_t prot; + unsigned long paddrbase, psize; + + /* open I/O area window */ + paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800)); + psize = PAGE_SIZE; + prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16); + area5_io16_base = p3_ioremap(paddrbase, psize, prot.pgprot); + if (!area5_io16_base) { + printk("allocate_cf_area : can't open CF I/O window!\n"); + return -ENOMEM; + } + + /* XXX : do we need attribute and common-memory area also? */ + + paddrbase = virt_to_phys((void *)PA_AREA6_IO); + psize = PAGE_SIZE; +#if defined(CONFIG_HS7751RVOIP_CODEC) + prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8); +#else + prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8); +#endif + area6_io8_base = p3_ioremap(paddrbase, psize, prot.pgprot); + if (!area6_io8_base) { + printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n"); + return -ENOMEM; + } + prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16); + area6_io16_base = p3_ioremap(paddrbase, psize, prot.pgprot); + if (!area6_io16_base) { + printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n"); + return -ENOMEM; + } + + return 0; +} + +__initcall (cf_init); diff --git a/arch/sh/boards/renesas/rts7751r2d/Makefile b/arch/sh/boards/renesas/rts7751r2d/Makefile new file mode 100644 index 000000000000..daa53334bdc3 --- /dev/null +++ b/arch/sh/boards/renesas/rts7751r2d/Makefile @@ -0,0 +1,10 @@ +# +# Makefile for the RTS7751R2D specific parts of the kernel +# +# Note! Dependencies are done automagically by 'make dep', which also +# removes any old dependencies. DON'T put your own dependencies here +# unless it's something special (ie not a .c file). +# + +obj-y := mach.o setup.o io.o irq.o led.o + diff --git a/arch/sh/boards/renesas/rts7751r2d/io.c b/arch/sh/boards/renesas/rts7751r2d/io.c new file mode 100644 index 000000000000..c46f9154cfd5 --- /dev/null +++ b/arch/sh/boards/renesas/rts7751r2d/io.c @@ -0,0 +1,319 @@ +/* + * linux/arch/sh/kernel/io_rts7751r2d.c + * + * Copyright (C) 2001 Ian da Silva, Jeremy Siegel + * Based largely on io_se.c. + * + * I/O routine for Renesas Technology sales RTS7751R2D. + * + * Initial version only to support LAN access; some + * placeholder code from io_rts7751r2d.c left in with the + * expectation of later SuperIO and PCMCIA access. + */ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <asm/io.h> +#include <asm/rts7751r2d/rts7751r2d.h> +#include <asm/addrspace.h> + +#include <linux/module.h> +#include <linux/pci.h> +#include "../../../drivers/pci/pci-sh7751.h" + +/* + * The 7751R RTS7751R2D uses the built-in PCI controller (PCIC) + * of the 7751R processor, and has a SuperIO accessible via the PCI. + * The board also includes a PCMCIA controller on its memory bus, + * like the other Solution Engine boards. + */ + +#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) +#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) +#define PCI_IO_AREA SH7751_PCI_IO_BASE +#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE + +#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) + +#define maybebadio(name,port) \ + printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ + #name, (port), (__u32) __builtin_return_address(0)) + +static inline void delay(void) +{ + ctrl_inw(0xa0000000); +} + +static inline unsigned long port2adr(unsigned int port) +{ + if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) + if (port == 0x3f6) + return (PA_AREA5_IO + 0x80c); + else + return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1)); + else + maybebadio(port2adr, (unsigned long)port); + + return port; +} + +static inline unsigned long port88796l(unsigned int port, int flag) +{ + unsigned long addr; + + if (flag) + addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1); + else + addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000; + + return addr; +} + +/* The 7751R RTS7751R2D seems to have everything hooked */ +/* up pretty normally (nothing on high-bytes only...) so this */ +/* shouldn't be needed */ +static inline int shifted_port(unsigned long port) +{ + /* For IDE registers, value is not shifted */ + if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) + return 0; + else + return 1; +} + +/* In case someone configures the kernel w/o PCI support: in that */ +/* scenario, don't ever bother to check for PCI-window addresses */ + +/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */ +#if defined(CONFIG_PCI) +#define CHECK_SH7751_PCIIO(port) \ + ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE))) +#else +#define CHECK_SH7751_PCIIO(port) (0) +#endif + +#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) +#define CHECK_AX88796L_PORT(port) \ + ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) +#else +#define CHECK_AX88796L_PORT(port) (0) +#endif + +/* + * General outline: remap really low stuff [eventually] to SuperIO, + * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) + * is mapped through the PCI IO window. Stuff with high bits (PXSEG) + * should be way beyond the window, and is used w/o translation for + * compatibility. + */ +unsigned char rts7751r2d_inb(unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; + else if (PXSEG(port)) + return *(volatile unsigned char *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + return *(volatile unsigned char *)PCI_IOMAP(port); + else + return (*(volatile unsigned short *)port2adr(port) & 0xff); +} + +unsigned char rts7751r2d_inb_p(unsigned long port) +{ + unsigned char v; + + if (CHECK_AX88796L_PORT(port)) + v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; + else if (PXSEG(port)) + v = *(volatile unsigned char *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + v = *(volatile unsigned char *)PCI_IOMAP(port); + else + v = (*(volatile unsigned short *)port2adr(port) & 0xff); + delay(); + + return v; +} + +unsigned short rts7751r2d_inw(unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(inw, port); + else if (PXSEG(port)) + return *(volatile unsigned short *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + return *(volatile unsigned short *)PCI_IOMAP(port); + else + maybebadio(inw, port); + + return 0; +} + +unsigned int rts7751r2d_inl(unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(inl, port); + else if (PXSEG(port)) + return *(volatile unsigned long *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + return *(volatile unsigned long *)PCI_IOMAP(port); + else + maybebadio(inl, port); + + return 0; +} + +void rts7751r2d_outb(unsigned char value, unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + *((volatile unsigned short *)port88796l(port, 0)) = value; + else if (PXSEG(port)) + *(volatile unsigned char *)port = value; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + *(volatile unsigned char *)PCI_IOMAP(port) = value; + else + *(volatile unsigned short *)port2adr(port) = value; +} + +void rts7751r2d_outb_p(unsigned char value, unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + *((volatile unsigned short *)port88796l(port, 0)) = value; + else if (PXSEG(port)) + *(volatile unsigned char *)port = value; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + *(volatile unsigned char *)PCI_IOMAP(port) = value; + else + *(volatile unsigned short *)port2adr(port) = value; + delay(); +} + +void rts7751r2d_outw(unsigned short value, unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(outw, port); + else if (PXSEG(port)) + *(volatile unsigned short *)port = value; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + *(volatile unsigned short *)PCI_IOMAP(port) = value; + else + maybebadio(outw, port); +} + +void rts7751r2d_outl(unsigned int value, unsigned long port) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(outl, port); + else if (PXSEG(port)) + *(volatile unsigned long *)port = value; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + *(volatile unsigned long *)PCI_IOMAP(port) = value; + else + maybebadio(outl, port); +} + +void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count) +{ + volatile __u8 *bp; + volatile __u16 *p; + + if (CHECK_AX88796L_PORT(port)) { + p = (volatile unsigned short *)port88796l(port, 0); + while (count--) *((unsigned char *) addr)++ = *p & 0xff; + } else if (PXSEG(port)) + while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + bp = (__u8 *)PCI_IOMAP(port); + while (count--) *((volatile unsigned char *) addr)++ = *bp; + } else { + p = (volatile unsigned short *)port2adr(port); + while (count--) *((unsigned char *) addr)++ = *p & 0xff; + } +} + +void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count) +{ + volatile __u16 *p; + + if (CHECK_AX88796L_PORT(port)) + p = (volatile unsigned short *)port88796l(port, 1); + else if (PXSEG(port)) + p = (volatile unsigned short *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + p = (volatile unsigned short *)PCI_IOMAP(port); + else + p = (volatile unsigned short *)port2adr(port); + while (count--) *((__u16 *) addr)++ = *p; +} + +void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(insl, port); + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + volatile __u32 *p = (__u32 *)PCI_IOMAP(port); + + while (count--) *((__u32 *) addr)++ = *p; + } else + maybebadio(insl, port); +} + +void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count) +{ + volatile __u8 *bp; + volatile __u16 *p; + + if (CHECK_AX88796L_PORT(port)) { + p = (volatile unsigned short *)port88796l(port, 0); + while (count--) *p = *((unsigned char *) addr)++; + } else if (PXSEG(port)) + while (count--) *(volatile unsigned char *)port = *((unsigned char *) addr)++; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + bp = (__u8 *)PCI_IOMAP(port); + while (count--) *bp = *((volatile unsigned char *) addr)++; + } else { + p = (volatile unsigned short *)port2adr(port); + while (count--) *p = *((unsigned char *) addr)++; + } +} + +void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count) +{ + volatile __u16 *p; + + if (CHECK_AX88796L_PORT(port)) + p = (volatile unsigned short *)port88796l(port, 1); + else if (PXSEG(port)) + p = (volatile unsigned short *)port; + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) + p = (volatile unsigned short *)PCI_IOMAP(port); + else + p = (volatile unsigned short *)port2adr(port); + while (count--) *p = *((__u16 *) addr)++; +} + +void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count) +{ + if (CHECK_AX88796L_PORT(port)) + maybebadio(outsl, port); + else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { + volatile __u32 *p = (__u32 *)PCI_IOMAP(port); + + while (count--) *p = *((__u32 *) addr)++; + } else + maybebadio(outsl, port); +} + +void *rts7751r2d_ioremap(unsigned long offset, unsigned long size) +{ + if (offset >= 0xfd000000) + return (void *)offset; + else + return (void *)P2SEGADDR(offset); +} +EXPORT_SYMBOL(rts7751r2d_ioremap); + +unsigned long rts7751r2d_isa_port2addr(unsigned long offset) +{ + return port2adr(offset); +} diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c new file mode 100644 index 000000000000..95717f4f1e2d --- /dev/null +++ b/arch/sh/boards/renesas/rts7751r2d/irq.c @@ -0,0 +1,135 @@ +/* + * linux/arch/sh/boards/renesas/rts7751r2d/irq.c + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Renesas Technology Sales RTS7751R2D Support. + * + * Modified for RTS7751R2D by + * Atom Create Engineering Co., Ltd. 2002. + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/rts7751r2d/rts7751r2d.h> + +#if defined(CONFIG_RTS7751R2D_REV11) +static int mask_pos[] = {11, 9, 8, 12, 10, 6, 5, 4, 7, 14, 13, 0, 0, 0, 0}; +#else +static int mask_pos[] = {6, 11, 9, 8, 12, 10, 5, 4, 7, 14, 13, 0, 0, 0, 0}; +#endif + +extern int voyagergx_irq_demux(int irq); +extern void setup_voyagergx_irq(void); + +static void enable_rts7751r2d_irq(unsigned int irq); +static void disable_rts7751r2d_irq(unsigned int irq); + +/* shutdown is same as "disable" */ +#define shutdown_rts7751r2d_irq disable_rts7751r2d_irq + +static void ack_rts7751r2d_irq(unsigned int irq); +static void end_rts7751r2d_irq(unsigned int irq); + +static unsigned int startup_rts7751r2d_irq(unsigned int irq) +{ + enable_rts7751r2d_irq(irq); + return 0; /* never anything pending */ +} + +static void disable_rts7751r2d_irq(unsigned int irq) +{ + unsigned long flags; + unsigned short val; + unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); + + /* Set the priority in IPR to 0 */ + local_irq_save(flags); + val = ctrl_inw(IRLCNTR1); + val &= mask; + ctrl_outw(val, IRLCNTR1); + local_irq_restore(flags); +} + +static void enable_rts7751r2d_irq(unsigned int irq) +{ + unsigned long flags; + unsigned short val; + unsigned short value = (0x0001 << mask_pos[irq]); + + /* Set priority in IPR back to original value */ + local_irq_save(flags); + val = ctrl_inw(IRLCNTR1); + val |= value; + ctrl_outw(val, IRLCNTR1); + local_irq_restore(flags); +} + +int rts7751r2d_irq_demux(int irq) +{ + int demux_irq; + + demux_irq = voyagergx_irq_demux(irq); + return demux_irq; +} + +static void ack_rts7751r2d_irq(unsigned int irq) +{ + disable_rts7751r2d_irq(irq); +} + +static void end_rts7751r2d_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_rts7751r2d_irq(irq); +} + +static struct hw_interrupt_type rts7751r2d_irq_type = { + "RTS7751R2D IRQ", + startup_rts7751r2d_irq, + shutdown_rts7751r2d_irq, + enable_rts7751r2d_irq, + disable_rts7751r2d_irq, + ack_rts7751r2d_irq, + end_rts7751r2d_irq, +}; + +static void make_rts7751r2d_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + irq_desc[irq].handler = &rts7751r2d_irq_type; + disable_rts7751r2d_irq(irq); +} + +/* + * Initialize IRQ setting + */ +void __init init_rts7751r2d_IRQ(void) +{ + int i; + + /* IRL0=KEY Input + * IRL1=Ethernet + * IRL2=CF Card + * IRL3=CF Card Insert + * IRL4=PCMCIA + * IRL5=VOYAGER + * IRL6=RTC Alarm + * IRL7=RTC Timer + * IRL8=SD Card + * IRL9=PCI Slot #1 + * IRL10=PCI Slot #2 + * IRL11=Extention #0 + * IRL12=Extention #1 + * IRL13=Extention #2 + * IRL14=Extention #3 + */ + + for (i=0; i<15; i++) + make_rts7751r2d_irq(i); + + setup_voyagergx_irq(); +} diff --git a/arch/sh/boards/renesas/rts7751r2d/led.c b/arch/sh/boards/renesas/rts7751r2d/led.c new file mode 100644 index 000000000000..9993259a894f --- /dev/null +++ b/arch/sh/boards/renesas/rts7751r2d/led.c @@ -0,0 +1,67 @@ +/* + * linux/arch/sh/kernel/led_rts7751r2d.c + * + * Copyright (C) Atom Create Engineering Co., Ltd. + * + * May be copied or modified under the terms of GNU General Public + * License. See linux/COPYING for more information. + * + * This file contains Renesas Technology Sales RTS7751R2D specific LED code. + */ + +#include <linux/config.h> +#include <asm/io.h> +#include <asm/rts7751r2d/rts7751r2d.h> + +extern unsigned int debug_counter; + +#ifdef CONFIG_HEARTBEAT + +#include <linux/sched.h> + +/* Cycle the LED's in the clasic Knightriger/Sun pattern */ +void heartbeat_rts7751r2d(void) +{ + static unsigned int cnt = 0, period = 0; + volatile unsigned short *p = (volatile unsigned short *)PA_OUTPORT; + static unsigned bit = 0, up = 1; + + cnt += 1; + if (cnt < period) + return; + + cnt = 0; + + /* Go through the points (roughly!): + * f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110 + */ + period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT))); + + *p = 1 << bit; + if (up) + if (bit == 7) { + bit--; + up = 0; + } else + bit++; + else if (bit == 0) + up = 1; + else + bit--; +} +#endif /* CONFIG_HEARTBEAT */ + +void rts7751r2d_led(unsigned short value) +{ + ctrl_outw(value, PA_OUTPORT); +} + +void debug_led_disp(void) +{ + unsigned short value; + + value = (unsigned short)debug_counter++; + rts7751r2d_led(value); + if (value == 0xff) + debug_counter = 0; +} diff --git a/arch/sh/boards/renesas/rts7751r2d/mach.c b/arch/sh/boards/renesas/rts7751r2d/mach.c new file mode 100644 index 000000000000..c1ff45407ab4 --- /dev/null +++ b/arch/sh/boards/renesas/rts7751r2d/mach.c @@ -0,0 +1,68 @@ +/* + * linux/arch/sh/kernel/mach_rts7751r2d.c + * + * Minor tweak of mach_se.c file to reference rts7751r2d-specific items. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Machine vector for the Renesas Technology sales RTS7751R2D + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <linux/types.h> + +#include <asm/machvec.h> +#include <asm/rtc.h> +#include <asm/irq.h> +#include <asm/rts7751r2d/io.h> + +extern void heartbeat_rts7751r2d(void); +extern void init_rts7751r2d_IRQ(void); +extern void *rts7751r2d_ioremap(unsigned long, unsigned long); +extern int rts7751r2d_irq_demux(int irq); + +extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, int); +extern void voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t); + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_rts7751r2d __initmv = { + .mv_nr_irqs = 72, + + .mv_inb = rts7751r2d_inb, + .mv_inw = rts7751r2d_inw, + .mv_inl = rts7751r2d_inl, + .mv_outb = rts7751r2d_outb, + .mv_outw = rts7751r2d_outw, + .mv_outl = rts7751r2d_outl, + + .mv_inb_p = rts7751r2d_inb_p, + .mv_inw_p = rts7751r2d_inw, + .mv_inl_p = rts7751r2d_inl, + .mv_outb_p = rts7751r2d_outb_p, + .mv_outw_p = rts7751r2d_outw, + .mv_outl_p = rts7751r2d_outl, + + .mv_insb = rts7751r2d_insb, + .mv_insw = rts7751r2d_insw, + .mv_insl = rts7751r2d_insl, + .mv_outsb = rts7751r2d_outsb, + .mv_outsw = rts7751r2d_outsw, + .mv_outsl = rts7751r2d_outsl, + + .mv_ioremap = rts7751r2d_ioremap, + .mv_isa_port2addr = rts7751r2d_isa_port2addr, + .mv_init_irq = init_rts7751r2d_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_rts7751r2d, +#endif + .mv_irq_demux = rts7751r2d_irq_demux, + + .mv_consistent_alloc = voyagergx_consistent_alloc, + .mv_consistent_free = voyagergx_consistent_free, +}; +ALIAS_MV(rts7751r2d) diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c new file mode 100644 index 000000000000..2587fd1a0240 --- /dev/null +++ b/arch/sh/boards/renesas/rts7751r2d/setup.c @@ -0,0 +1,31 @@ +/* + * linux/arch/sh/kernel/setup_rts7751r2d.c + * + * Copyright (C) 2000 Kazumoto Kojima + * + * Renesas Technology Sales RTS7751R2D Support. + * + * Modified for RTS7751R2D by + * Atom Create Engineering Co., Ltd. 2002. + */ + +#include <linux/init.h> +#include <asm/io.h> +#include <asm/rts7751r2d/rts7751r2d.h> + +unsigned int debug_counter; + +const char *get_system_type(void) +{ + return "RTS7751R2D"; +} + +/* + * Initialize the board + */ +void __init platform_setup(void) +{ + printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); + ctrl_outw(0x0000, PA_OUTPORT); + debug_counter = 0; +} diff --git a/arch/sh/boards/systemh/Makefile b/arch/sh/boards/renesas/systemh/Makefile index 858d4d918dc9..2cc6a23d9d39 100644 --- a/arch/sh/boards/systemh/Makefile +++ b/arch/sh/boards/renesas/systemh/Makefile @@ -9,5 +9,5 @@ obj-y := setup.o irq.o io.o # just abuse the hell out of kbuild, because we can.. obj-$(CONFIG_PCI) += pci.o -pci-y := ../se/7751/pci.o +pci-y := ../../se/7751/pci.o diff --git a/arch/sh/boards/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c index bb10cb6c65a6..cf979011aa94 100644 --- a/arch/sh/boards/systemh/io.c +++ b/arch/sh/boards/renesas/systemh/io.c @@ -1,4 +1,4 @@ -/* +/* * linux/arch/sh/boards/systemh/io.c * * Copyright (C) 2001 Ian da Silva, Jeremy Siegel @@ -19,9 +19,9 @@ /* * The 7751 SystemH Engine uses the built-in PCI controller (PCIC) - * of the 7751 processor, and has a SuperIO accessible on its memory + * of the 7751 processor, and has a SuperIO accessible on its memory * bus. - */ + */ #define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR) #define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR) @@ -30,7 +30,7 @@ #define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK)) #define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area - of smc lan chip*/ + of smc lan chip*/ #define maybebadio(name,port) \ printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \ @@ -81,7 +81,7 @@ unsigned char sh7751systemh_inb(unsigned long port) else if (port <= 0x3F1) return *(volatile unsigned char *)ETHER_IOMAP(port); else - return (*port2adr(port))&0xff; + return (*port2adr(port))&0xff; } unsigned char sh7751systemh_inb_p(unsigned long port) @@ -95,7 +95,7 @@ unsigned char sh7751systemh_inb_p(unsigned long port) else if (port <= 0x3F1) v = *(volatile unsigned char *)ETHER_IOMAP(port); else - v = (*port2adr(port))&0xff; + v = (*port2adr(port))&0xff; delay(); return v; } diff --git a/arch/sh/boards/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c index cc9ea89b9509..5675a4134eee 100644 --- a/arch/sh/boards/systemh/irq.c +++ b/arch/sh/boards/renesas/systemh/irq.c @@ -1,4 +1,4 @@ -/* +/* * linux/arch/sh/boards/systemh/irq.c * * Copyright (C) 2000 Kazumoto Kojima @@ -45,7 +45,7 @@ static struct hw_interrupt_type systemh_irq_type = { }; static unsigned int startup_systemh_irq(unsigned int irq) -{ +{ enable_systemh_irq(irq); return 0; /* never anything pending */ } diff --git a/arch/sh/boards/systemh/setup.c b/arch/sh/boards/renesas/systemh/setup.c index 7f263457122f..826fa3d7669c 100644 --- a/arch/sh/boards/systemh/setup.c +++ b/arch/sh/boards/renesas/systemh/setup.c @@ -1,4 +1,4 @@ -/* +/* * linux/arch/sh/boards/systemh/setup.c * * Copyright (C) 2000 Kazumoto Kojima diff --git a/arch/sh/boards/se/7300/Makefile b/arch/sh/boards/se/7300/Makefile new file mode 100644 index 000000000000..0fbd4f47815c --- /dev/null +++ b/arch/sh/boards/se/7300/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for the 7300 SolutionEngine specific parts of the kernel +# + +obj-y := setup.o io.o irq.o + +obj-$(CONFIG_HEARTBEAT) += led.o diff --git a/arch/sh/boards/se/7300/io.c b/arch/sh/boards/se/7300/io.c new file mode 100644 index 000000000000..4e8939197e20 --- /dev/null +++ b/arch/sh/boards/se/7300/io.c @@ -0,0 +1,261 @@ +/* + * linux/arch/sh/boards/se/7300/io.c + * + * Copyright (C) 2003 YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp> + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <asm/se7300/se7300.h> +#include <asm/io.h> + +#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a) + +struct iop { + unsigned long start, end; + unsigned long base; + struct iop *(*check) (struct iop * p, unsigned long port); + unsigned char (*inb) (struct iop * p, unsigned long port); + unsigned short (*inw) (struct iop * p, unsigned long port); + void (*outb) (struct iop * p, unsigned char value, unsigned long port); + void (*outw) (struct iop * p, unsigned short value, unsigned long port); +}; + +struct iop * +simple_check(struct iop *p, unsigned long port) +{ + if ((p->start <= port) && (port <= p->end)) + return p; + else + badio(check, port); +} + +struct iop * +ide_check(struct iop *p, unsigned long port) +{ + if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7)) + return p; + return NULL; +} + +unsigned char +simple_inb(struct iop *p, unsigned long port) +{ + return *(unsigned char *) (p->base + port); +} + +unsigned short +simple_inw(struct iop *p, unsigned long port) +{ + return *(unsigned short *) (p->base + port); +} + +void +simple_outb(struct iop *p, unsigned char value, unsigned long port) +{ + *(unsigned char *) (p->base + port) = value; +} + +void +simple_outw(struct iop *p, unsigned short value, unsigned long port) +{ + *(unsigned short *) (p->base + port) = value; +} + +unsigned char +pcc_inb(struct iop *p, unsigned long port) +{ + unsigned long addr = p->base + port + 0x40000; + unsigned long v; + + if (port & 1) + addr += 0x00400000; + v = *(volatile unsigned char *) addr; + return v; +} + +void +pcc_outb(struct iop *p, unsigned char value, unsigned long port) +{ + unsigned long addr = p->base + port + 0x40000; + + if (port & 1) + addr += 0x00400000; + *(volatile unsigned char *) addr = value; +} + +unsigned char +bad_inb(struct iop *p, unsigned long port) +{ + badio(inb, port); +} + +void +bad_outb(struct iop *p, unsigned char value, unsigned long port) +{ + badio(inw, port); +} + +/* MSTLANEX01 LAN at 0xb400:0000 */ +static struct iop laniop = { + .start = 0x300, + .end = 0x30f, + .base = 0xb4000000, + .check = simple_check, + .inb = simple_inb, + .inw = simple_inw, + .outb = simple_outb, + .outw = simple_outw, +}; + +/* NE2000 pc card NIC */ +static struct iop neiop = { + .start = 0x280, + .end = 0x29f, + .base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */ + .check = simple_check, + .inb = pcc_inb, + .inw = simple_inw, + .outb = pcc_outb, + .outw = simple_outw, +}; + +/* CF in CF slot */ +static struct iop cfiop = { + .base = 0xb0600000, + .check = ide_check, + .inb = pcc_inb, + .inw = simple_inw, + .outb = pcc_outb, + .outw = simple_outw, +}; + +static __inline__ struct iop * +port2iop(unsigned long port) +{ + if (0) ; +#if defined(CONFIG_SMC91111) + else if (laniop.check(&laniop, port)) + return &laniop; +#endif +#if defined(CONFIG_NE2000) + else if (neiop.check(&neiop, port)) + return &neiop; +#endif +#if defined(CONFIG_IDE) + else if (cfiop.check(&cfiop, port)) + return &cfiop; +#endif + else + return &neiop; /* fallback */ +} + +static inline void +delay(void) +{ + ctrl_inw(0xac000000); + ctrl_inw(0xac000000); +} + +unsigned char +sh7300se_inb(unsigned long port) +{ + struct iop *p = port2iop(port); + return (p->inb) (p, port); +} + +unsigned char +sh7300se_inb_p(unsigned long port) +{ + unsigned char v = sh7300se_inb(port); + delay(); + return v; +} + +unsigned short +sh7300se_inw(unsigned long port) +{ + struct iop *p = port2iop(port); + return (p->inw) (p, port); +} + +unsigned int +sh7300se_inl(unsigned long port) +{ + badio(inl, port); +} + +void +sh7300se_outb(unsigned char value, unsigned long port) +{ + struct iop *p = port2iop(port); + (p->outb) (p, value, port); +} + +void +sh7300se_outb_p(unsigned char value, unsigned long port) +{ + sh7300se_outb(value, port); + delay(); +} + +void +sh7300se_outw(unsigned short value, unsigned long port) +{ + struct iop *p = port2iop(port); + (p->outw) (p, value, port); +} + +void +sh7300se_outl(unsigned int value, unsigned long port) +{ + badio(outl, port); +} + +void +sh7300se_insb(unsigned long port, void *addr, unsigned long count) +{ + unsigned char *a = addr; + struct iop *p = port2iop(port); + while (count--) + *a++ = (p->inb) (p, port); +} + +void +sh7300se_insw(unsigned long port, void *addr, unsigned long count) +{ + unsigned short *a = addr; + struct iop *p = port2iop(port); + while (count--) + *a++ = (p->inw) (p, port); +} + +void +sh7300se_insl(unsigned long port, void *addr, unsigned long count) +{ + badio(insl, port); +} + +void +sh7300se_outsb(unsigned long port, const void *addr, unsigned long count) +{ + unsigned char *a = (unsigned char *) addr; + struct iop *p = port2iop(port); + while (count--) + (p->outb) (p, *a++, port); +} + +void +sh7300se_outsw(unsigned long port, const void *addr, unsigned long count) +{ + unsigned short *a = (unsigned short *) addr; + struct iop *p = port2iop(port); + while (count--) + (p->outw) (p, *a++, port); +} + +void +sh7300se_outsl(unsigned long port, const void *addr, unsigned long count) +{ + badio(outsw, port); +} diff --git a/arch/sh/boards/se/7300/irq.c b/arch/sh/boards/se/7300/irq.c new file mode 100644 index 000000000000..96c8c23d6c93 --- /dev/null +++ b/arch/sh/boards/se/7300/irq.c @@ -0,0 +1,37 @@ +/* + * linux/arch/sh/boards/se/7300/irq.c + * + * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> + * + * SH-Mobile SolutionEngine 7300 Support. + * + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <asm/irq.h> +#include <asm/io.h> +#include <asm/mach/se7300.h> + +/* + * Initialize IRQ setting + */ +void __init +init_7300se_IRQ(void) +{ + ctrl_outw(0x0028, PA_EPLD_MODESET); /* mode set IRQ0,1 active low. */ + ctrl_outw(0xa000, INTC_ICR1); /* IRQ mode; IRQ0,1 enable. */ + ctrl_outw(0x0000, PORT_PFCR); /* use F for IRQ[3:0] and SIU. */ + + /* PC_IRQ[0-3] -> IRQ0 (32) */ + make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ); + /* A_IRQ[0-3] -> IRQ1 (33) */ + make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ); + make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY); + make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); + make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); + make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY); + + ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */ +} diff --git a/arch/sh/boards/se/7300/led.c b/arch/sh/boards/se/7300/led.c new file mode 100644 index 000000000000..02c7f846c84c --- /dev/null +++ b/arch/sh/boards/se/7300/led.c @@ -0,0 +1,69 @@ +/* + * linux/arch/sh/boards/se/7300/led.c + * + * Derived from linux/arch/sh/boards/se/770x/led.c + * + * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com> + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * This file contains Solution Engine specific LED code. + */ + +#include <linux/config.h> +#include <linux/sched.h> +#include <asm/mach/se7300.h> + +static void +mach_led(int position, int value) +{ + volatile unsigned short *p = (volatile unsigned short *) PA_LED; + + if (value) { + *p |= (1 << 8); + } else { + *p &= ~(1 << 8); + } +} + + +/* Cycle the LED's in the clasic Knightrider/Sun pattern */ +void +heartbeat_7300se(void) +{ + static unsigned int cnt = 0, period = 0; + volatile unsigned short *p = (volatile unsigned short *) PA_LED; + static unsigned bit = 0, up = 1; + + cnt += 1; + if (cnt < period) { + return; + } + + cnt = 0; + + /* Go through the points (roughly!): + * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110 + */ + period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT))); + + if (up) { + if (bit == 7) { + bit--; + up = 0; + } else { + bit++; + } + } else { + if (bit == 0) { + bit++; + up = 1; + } else { + bit--; + } + } + *p = 1 << (bit + 8); + +} + diff --git a/arch/sh/boards/se/7300/setup.c b/arch/sh/boards/se/7300/setup.c new file mode 100644 index 000000000000..08536bc224dc --- /dev/null +++ b/arch/sh/boards/se/7300/setup.c @@ -0,0 +1,66 @@ +/* + * linux/arch/sh/boards/se/7300/setup.c + * + * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> + * + * SH-Mobile SolutionEngine 7300 Support. + * + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <asm/machvec.h> +#include <asm/machvec_init.h> +#include <asm/mach/io.h> + +void heartbeat_7300se(void); +void init_7300se_IRQ(void); + +const char * +get_system_type(void) +{ + return "SolutionEngine 7300"; +} + +/* + * The Machine Vector + */ + +struct sh_machine_vector mv_7300se __initmv = { + .mv_nr_irqs = 109, + .mv_inb = sh7300se_inb, + .mv_inw = sh7300se_inw, + .mv_inl = sh7300se_inl, + .mv_outb = sh7300se_outb, + .mv_outw = sh7300se_outw, + .mv_outl = sh7300se_outl, + + .mv_inb_p = sh7300se_inb_p, + .mv_inw_p = sh7300se_inw, + .mv_inl_p = sh7300se_inl, + .mv_outb_p = sh7300se_outb_p, + .mv_outw_p = sh7300se_outw, + .mv_outl_p = sh7300se_outl, + + .mv_insb = sh7300se_insb, + .mv_insw = sh7300se_insw, + .mv_insl = sh7300se_insl, + .mv_outsb = sh7300se_outsb, + .mv_outsw = sh7300se_outsw, + .mv_outsl = sh7300se_outsl, + + .mv_init_irq = init_7300se_IRQ, +#ifdef CONFIG_HEARTBEAT + .mv_heartbeat = heartbeat_7300se, +#endif +}; + +ALIAS_MV(7300se) +/* + * Initialize the board + */ +void __init +platform_setup(void) +{ + +} diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile index 04489a938105..05ca14dfafb8 100644 --- a/arch/sh/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile @@ -15,7 +15,11 @@ endif # # IMAGE_OFFSET is the load offset of the compression loader +# Assign dummy values if these 2 variables are not defined, +# in order to suppress error message. # +CONFIG_MEMORY_START ?= 0x0c000000 +CONFIG_BOOT_LINK_OFFSET ?= 0x00800000 IMAGE_OFFSET := $(shell printf "0x%8x" $$[0x80000000+$(CONFIG_MEMORY_START)+$(CONFIG_BOOT_LINK_OFFSET)]) LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds.s diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c index 1ed7425a4467..211e9110074f 100644 --- a/arch/sh/boot/compressed/misc.c +++ b/arch/sh/boot/compressed/misc.c @@ -1,7 +1,7 @@ /* * arch/sh/boot/compressed/misc.c - * - * This is a collection of several routines from gzip-1.0.3 + * + * This is a collection of several routines from gzip-1.0.3 * adapted for Linux. * * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994 @@ -52,7 +52,7 @@ static unsigned outcnt = 0; /* bytes in output buffer */ #define RESERVED 0xC0 /* bit 6,7: reserved */ #define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf()) - + /* Diagnostic functions */ #ifdef DEBUG # define Assert(cond,msg) {if(!(cond)) error(msg);} @@ -75,7 +75,7 @@ static void flush_window(void); static void error(char *m); static void gzip_mark(void **); static void gzip_release(void **); - + extern char input_data[]; extern int input_len; @@ -83,20 +83,19 @@ static long bytes_out = 0; static uch *output_data; static unsigned long output_ptr = 0; - static void *malloc(int size); static void free(void *where); static void error(char *m); static void gzip_mark(void **); static void gzip_release(void **); - -static void puts(const char *); - + +int puts(const char *); + extern int _text; /* Defined in vmlinux.lds.S */ extern int _end; static unsigned long free_mem_ptr; static unsigned long free_mem_end_ptr; - + #define HEAP_SIZE 0x10000 #include "../../../../lib/inflate.c" @@ -134,7 +133,7 @@ static void gzip_release(void **ptr) } #ifdef CONFIG_SH_STANDARD_BIOS -static int strlen(const char *s) +size_t strlen(const char *s) { int i = 0; @@ -143,14 +142,17 @@ static int strlen(const char *s) return i; } -void puts(const char *s) +int puts(const char *s) { - sh_bios_console_write(s, strlen(s)); + int len = strlen(s); + sh_bios_console_write(s, len); + return len; } #else -void puts(const char *s) +int puts(const char *s) { - /* This should be updated to use the sh-sci routines */ + /* This should be updated to use the sh-sci routines */ + return 0; } #endif @@ -198,9 +200,9 @@ static void flush_window(void) ulg c = crc; /* temporary variable */ unsigned n; uch *in, *out, ch; - + in = window; - out = &output_data[output_ptr]; + out = &output_data[output_ptr]; for (n = 0; n < outcnt; n++) { ch = *out++ = *in++; c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8); diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig index 8a11af1ba3f8..155d139884c3 100644 --- a/arch/sh/cchips/Kconfig +++ b/arch/sh/cchips/Kconfig @@ -1,5 +1,18 @@ menu "Companion Chips" +config VOYAGERGX + bool "VoyagerGX chip support" + depends on SH_RTS7751R2D + help + Selecting this option will support Silicon Motion, Inc. SM501. + Designed to complement needs for the embedded industry, it + provides video and 2D capability. To reduce system cost a + wide variety of include I/O is supported, including analog RGB + and digital LCD Panel interface, 8-bit parallel interface, USB, + UART, IrDA, Zoom Video, AC97 or I2S, SSP, PWM, and I2C. There + are additional GPIO bits that can be used to interface to + external as well. + # A board must have defined HD6446X_SERIES in order to see these config HD6446X_SERIES bool "HD6446x support" diff --git a/arch/sh/cchips/hd6446x/hd64461/setup.c b/arch/sh/cchips/hd6446x/hd64461/setup.c index 5e03ea93838e..f014b9bf6922 100644 --- a/arch/sh/cchips/hd6446x/hd64461/setup.c +++ b/arch/sh/cchips/hd6446x/hd64461/setup.c @@ -134,7 +134,7 @@ int hd64461_irq_demux(int irq) return __irq_demux(irq); } -static struct irqaction irq0 = { hd64461_interrupt, SA_INTERRUPT, 0, "HD64461", NULL, NULL }; +static struct irqaction irq0 = { hd64461_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64461", NULL, NULL }; int __init setup_hd64461(void) { diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c index 73a44a7701bb..68e4c4e4283d 100644 --- a/arch/sh/cchips/hd6446x/hd64465/setup.c +++ b/arch/sh/cchips/hd6446x/hd64465/setup.c @@ -154,7 +154,7 @@ int hd64465_irq_demux(int irq) return irq; } -static struct irqaction irq0 = { hd64465_interrupt, SA_INTERRUPT, 0, "HD64465", NULL, NULL}; +static struct irqaction irq0 = { hd64465_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64465", NULL, NULL}; static int __init setup_hd64465(void) diff --git a/arch/sh/cchips/voyagergx/Makefile b/arch/sh/cchips/voyagergx/Makefile new file mode 100644 index 000000000000..085de72fd327 --- /dev/null +++ b/arch/sh/cchips/voyagergx/Makefile @@ -0,0 +1,8 @@ +# +# Makefile for VoyagerGX +# + +obj-y := irq.o setup.o + +obj-$(CONFIG_USB_OHCI_HCD) += consistent.o + diff --git a/arch/sh/cchips/voyagergx/consistent.c b/arch/sh/cchips/voyagergx/consistent.c new file mode 100644 index 000000000000..95a309d149b7 --- /dev/null +++ b/arch/sh/cchips/voyagergx/consistent.c @@ -0,0 +1,126 @@ +/* + * arch/sh/cchips/voyagergx/consistent.c + * + * Copyright (C) 2004 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/mm.h> +#include <linux/dma-mapping.h> +#include <linux/slab.h> +#include <linux/list.h> +#include <linux/types.h> +#include <linux/module.h> +#include <linux/device.h> +#include <asm/io.h> +#include <asm/bus-sh.h> + +struct voya_alloc_entry { + struct list_head list; + unsigned long ofs; + unsigned long len; +}; + +static spinlock_t voya_list_lock = SPIN_LOCK_UNLOCKED; +static LIST_HEAD(voya_alloc_list); + +#define OHCI_SRAM_START 0xb0000000 +#define OHCI_HCCA_SIZE 0x100 +#define OHCI_SRAM_SIZE 0x10000 + +void *voyagergx_consistent_alloc(struct device *dev, size_t size, + dma_addr_t *handle, int flag) +{ + struct list_head *list = &voya_alloc_list; + struct voya_alloc_entry *entry; + struct sh_dev *shdev = to_sh_dev(dev); + unsigned long start, end; + unsigned long flags; + + /* + * The SM501 contains an integrated 8051 with its own SRAM. + * Devices within the cchip can all hook into the 8051 SRAM. + * We presently use this for the OHCI. + * + * Everything else goes through consistent_alloc(). + */ + if (!dev || dev->bus != &sh_bus_types[SH_BUS_VIRT] || + (dev->bus == &sh_bus_types[SH_BUS_VIRT] && + shdev->dev_id != SH_DEV_ID_USB_OHCI)) + return consistent_alloc(flag, size, handle); + + start = OHCI_SRAM_START + OHCI_HCCA_SIZE; + + entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC); + if (!entry) + return NULL; + + entry->len = (size + 15) & ~15; + + /* + * The basis for this allocator is dwmw2's malloc.. the + * Matrox allocator :-) + */ + spin_lock_irqsave(&voya_list_lock, flags); + list_for_each(list, &voya_alloc_list) { + struct voya_alloc_entry *p; + + p = list_entry(list, struct voya_alloc_entry, list); + + if (p->ofs - start >= size) + goto out; + + start = p->ofs + p->len; + } + + end = start + (OHCI_SRAM_SIZE - OHCI_HCCA_SIZE); + list = &voya_alloc_list; + + if (end - start >= size) { +out: + entry->ofs = start; + list_add_tail(&entry->list, list); + spin_unlock_irqrestore(&voya_list_lock, flags); + + *handle = start; + return (void *)start; + } + + kfree(entry); + spin_unlock_irqrestore(&voya_list_lock, flags); + + return NULL; +} + +void voyagergx_consistent_free(struct device *dev, size_t size, + void *vaddr, dma_addr_t handle) +{ + struct voya_alloc_entry *entry; + struct sh_dev *shdev = to_sh_dev(dev); + unsigned long flags; + + if (!dev || dev->bus != &sh_bus_types[SH_BUS_VIRT] || + (dev->bus == &sh_bus_types[SH_BUS_VIRT] && + shdev->dev_id != SH_DEV_ID_USB_OHCI)) { + consistent_free(vaddr, size); + return; + } + + spin_lock_irqsave(&voya_list_lock, flags); + list_for_each_entry(entry, &voya_alloc_list, list) { + if (entry->ofs != handle) + continue; + + list_del(&entry->list); + kfree(entry); + + break; + } + spin_unlock_irqrestore(&voya_list_lock, flags); +} + +EXPORT_SYMBOL(voyagergx_consistent_alloc); +EXPORT_SYMBOL(voyagergx_consistent_free); + diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c new file mode 100644 index 000000000000..3079234cb65b --- /dev/null +++ b/arch/sh/cchips/voyagergx/irq.c @@ -0,0 +1,194 @@ +/* -------------------------------------------------------------------- */ +/* setup_voyagergx.c: */ +/* -------------------------------------------------------------------- */ +/* This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + + Copyright 2003 (c) Lineo uSolutions,Inc. +*/ +/* -------------------------------------------------------------------- */ + +#undef DEBUG + +#include <linux/config.h> +#include <linux/sched.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/param.h> +#include <linux/ioport.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/irq.h> + +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/rts7751r2d/rts7751r2d.h> +#include <asm/rts7751r2d/voyagergx_reg.h> + +static void disable_voyagergx_irq(unsigned int irq) +{ + unsigned long flags, val; + unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); + + pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask); + local_irq_save(flags); + val = inl(VOYAGER_INT_MASK); + val &= ~mask; + outl(val, VOYAGER_INT_MASK); + local_irq_restore(flags); +} + + +static void enable_voyagergx_irq(unsigned int irq) +{ + unsigned long flags, val; + unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE); + + pr_debug("disable_voyagergx_irq(%d): mask=%x\n", irq, mask); + local_irq_save(flags); + val = inl(VOYAGER_INT_MASK); + val |= mask; + outl(val, VOYAGER_INT_MASK); + local_irq_restore(flags); +} + + +static void mask_and_ack_voyagergx(unsigned int irq) +{ + disable_voyagergx_irq(irq); +} + +static void end_voyagergx_irq(unsigned int irq) +{ + if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) + enable_voyagergx_irq(irq); +} + +static unsigned int startup_voyagergx_irq(unsigned int irq) +{ + enable_voyagergx_irq(irq); + return 0; +} + +static void shutdown_voyagergx_irq(unsigned int irq) +{ + disable_voyagergx_irq(irq); +} + +static struct hw_interrupt_type voyagergx_irq_type = { + "VOYAGERGX-IRQ", + startup_voyagergx_irq, + shutdown_voyagergx_irq, + enable_voyagergx_irq, + disable_voyagergx_irq, + mask_and_ack_voyagergx, + end_voyagergx_irq, +}; + +static irqreturn_t voyagergx_interrupt(int irq, void *dev_id, struct pt_regs *regs) +{ + printk(KERN_INFO + "VoyagerGX: spurious interrupt, status: 0x%x\n", + inl(INT_STATUS)); + return IRQ_HANDLED; +} + + +/*====================================================*/ + +static struct { + int (*func)(int, void *); + void *dev; +} voyagergx_demux[VOYAGER_IRQ_NUM]; + +void voyagergx_register_irq_demux(int irq, + int (*demux)(int irq, void *dev), void *dev) +{ + voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux; + voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev; +} + +void voyagergx_unregister_irq_demux(int irq) +{ + voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0; +} + +int voyagergx_irq_demux(int irq) +{ + + if (irq == IRQ_VOYAGER ) { + unsigned long i = 0, bit __attribute__ ((unused)); + unsigned long val = inl(INT_STATUS); +#if 1 + if ( val & ( 1 << 1 )){ + i = 1; + } else if ( val & ( 1 << 2 )){ + i = 2; + } else if ( val & ( 1 << 6 )){ + i = 6; + } else if( val & ( 1 << 10 )){ + i = 10; + } else if( val & ( 1 << 11 )){ + i = 11; + } else if( val & ( 1 << 12 )){ + i = 12; + } else if( val & ( 1 << 17 )){ + i = 17; + } else { + printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val); + } + pr_debug("voyagergx_irq_demux %d \n", i); +#else + for (bit = 1, i = 0 ; i < VOYAGER_IRQ_NUM ; bit <<= 1, i++) + if (val & bit) + break; +#endif + if (i < VOYAGER_IRQ_NUM) { + irq = VOYAGER_IRQ_BASE + i; + if (voyagergx_demux[i].func != 0) + irq = voyagergx_demux[i].func(irq, voyagergx_demux[i].dev); + } + } + return irq; +} + +static struct irqaction irq0 = { voyagergx_interrupt, SA_INTERRUPT, 0, "VOYAGERGX", NULL, NULL}; + +void __init setup_voyagergx_irq(void) +{ + int i, flag; + + printk(KERN_INFO "VoyagerGX configured at 0x%x on irq %d(mapped into %d to %d)\n", + VOYAGER_BASE, + IRQ_VOYAGER, + VOYAGER_IRQ_BASE, + VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1); + + for (i=0; i<VOYAGER_IRQ_NUM; i++) { + flag = 0; + switch (VOYAGER_IRQ_BASE + i) { + case VOYAGER_USBH_IRQ: + case VOYAGER_8051_IRQ: + case VOYAGER_UART0_IRQ: + case VOYAGER_UART1_IRQ: + case VOYAGER_AC97_IRQ: + flag = 1; + } + if (flag == 1) + irq_desc[VOYAGER_IRQ_BASE + i].handler = &voyagergx_irq_type; + } + + setup_irq(IRQ_VOYAGER, &irq0); +} + diff --git a/arch/sh/cchips/voyagergx/setup.c b/arch/sh/cchips/voyagergx/setup.c new file mode 100644 index 000000000000..139ca88ac9e6 --- /dev/null +++ b/arch/sh/cchips/voyagergx/setup.c @@ -0,0 +1,37 @@ +/* + * arch/sh/cchips/voyagergx/setup.c + * + * Setup routines for VoyagerGX cchip. + * + * Copyright (C) 2003 Lineo uSolutions, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include <linux/init.h> +#include <linux/module.h> +#include <asm/io.h> +#include <asm/rts7751r2d/voyagergx_reg.h> + +static int __init setup_voyagergx(void) +{ + unsigned long val; + + val = inl(DRAM_CTRL); + val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 | + DRAM_CTRL_CPU_ACTIVE_PRECHARGE | + DRAM_CTRL_CPU_RESET | + DRAM_CTRL_REFRESH_COMMAND | + DRAM_CTRL_BLOCK_WRITE_TIME | + DRAM_CTRL_BLOCK_WRITE_PRECHARGE | + DRAM_CTRL_ACTIVE_PRECHARGE | + DRAM_CTRL_RESET | + DRAM_CTRL_REMAIN_ACTIVE); + outl(val, DRAM_CTRL); + + return 0; +} + +module_init(setup_voyagergx); diff --git a/arch/sh/configs/rts7751r2d_defconfig b/arch/sh/configs/rts7751r2d_defconfig new file mode 100644 index 000000000000..f9e1f7c5a657 --- /dev/null +++ b/arch/sh/configs/rts7751r2d_defconfig @@ -0,0 +1,809 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_SUPERH=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_STANDALONE=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +CONFIG_KALLSYMS=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODULE_UNLOAD is not set +CONFIG_OBSOLETE_MODPARM=y +# CONFIG_MODVERSIONS is not set +# CONFIG_KMOD is not set + +# +# System type +# +# CONFIG_SH_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SYSTEMH is not set +# CONFIG_SH_STB1_HARP is not set +# CONFIG_SH_STB1_OVERDRIVE is not set +# CONFIG_SH_HP620 is not set +# CONFIG_SH_HP680 is not set +# CONFIG_SH_HP690 is not set +# CONFIG_SH_CQREEK is not set +# CONFIG_SH_DMIDA is not set +# CONFIG_SH_EC3104 is not set +# CONFIG_SH_SATURN is not set +# CONFIG_SH_DREAMCAST is not set +# CONFIG_SH_CAT68701 is not set +# CONFIG_SH_BIGSUR is not set +# CONFIG_SH_SH2000 is not set +# CONFIG_SH_ADX is not set +# CONFIG_SH_MPC1211 is not set +# CONFIG_SH_SECUREEDGE5410 is not set +CONFIG_SH_RTS7751R2D=y +# CONFIG_SH_UNKNOWN is not set +# CONFIG_CPU_SH2 is not set +# CONFIG_CPU_SH3 is not set +CONFIG_CPU_SH4=y +# CONFIG_CPU_SUBTYPE_SH7604 is not set +# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +CONFIG_CPU_SUBTYPE_SH7751=y +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_ST40STB1 is not set +CONFIG_MMU=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="mem=64M console=ttySC0,115200 root=/dev/hda1" +CONFIG_MEMORY_START=0x0c000000 +CONFIG_MEMORY_SIZE=0x04000000 +CONFIG_MEMORY_SET=y +# CONFIG_MEMORY_OVERRIDE is not set +CONFIG_SH_RTC=y +CONFIG_ZERO_PAGE_OFFSET=0x00010000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_PREEMPT is not set +# CONFIG_UBC_WAKEUP is not set +# CONFIG_SH_WRITETHROUGH is not set +# CONFIG_SH_OCRAM is not set +# CONFIG_SH_STORE_QUEUES is not set +# CONFIG_SMP is not set +CONFIG_VOYAGERGX=y +CONFIG_RTS7751R2D_REV11=y +CONFIG_SH_PCLK_FREQ=60000000 +# CONFIG_CPU_FREQ is not set +CONFIG_SH_DMA=y +CONFIG_NR_ONCHIP_DMA_CHANNELS=8 +# CONFIG_NR_DMA_CHANNELS_BOOL is not set +# CONFIG_DMA_PAGE_OPS is not set + +# +# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# +CONFIG_ISA=y +CONFIG_PCI=y +CONFIG_SH_PCIDMA_NONCOHERENT=y +CONFIG_PCI_AUTO=y +CONFIG_PCI_AUTO_UPDATE_RESOURCES=y +CONFIG_PCI_DMA=y +# CONFIG_PCI_LEGACY_PROC is not set +CONFIG_PCI_NAMES=y +CONFIG_HOTPLUG=y + +# +# PCMCIA/CardBus support +# +CONFIG_PCMCIA=m +CONFIG_YENTA=m +CONFIG_CARDBUS=y +# CONFIG_I82092 is not set +# CONFIG_I82365 is not set +# CONFIG_TCIC is not set +CONFIG_PCMCIA_PROBE=y + +# +# PCI Hotplug Support +# +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_FAKE is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Generic Driver Options +# +# CONFIG_FW_LOADER is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_XD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_LBD is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_IDEDISK_STROKE is not set +CONFIG_BLK_DEV_IDECS=m +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_IDE_TASK_IOCTL is not set +# CONFIG_IDE_TASKFILE_IO is not set + +# +# IDE chipset support/bugfixes +# +# CONFIG_BLK_DEV_IDEPCI is not set +# CONFIG_IDE_CHIPSETS is not set +# CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_DMA_NONPCI is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Old CD-ROM drivers (not SCSI, not IDE) +# +# CONFIG_CD_NO_IDESCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# IEEE 1394 (FireWire) support (EXPERIMENTAL) +# +# CONFIG_IEEE1394 is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +# CONFIG_NETLINK_DEV is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_INET_ECN is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_IPV6 is not set +# CONFIG_DECNET is not set +# CONFIG_BRIDGE is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +CONFIG_IPV6_SCTP__=y +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_FASTROUTE is not set +# CONFIG_NET_HW_FLOWCONTROL is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +CONFIG_NETDEVICES=y + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_STNIC is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_LANCE is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_NET_VENDOR_RACAL is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_AT1700 is not set +# CONFIG_DEPCA is not set +# CONFIG_HP100 is not set +CONFIG_NET_ISA=y +# CONFIG_E2100 is not set +# CONFIG_EWRK3 is not set +# CONFIG_EEXPRESS is not set +# CONFIG_EEXPRESS_PRO is not set +# CONFIG_HPLAN_PLUS is not set +# CONFIG_HPLAN is not set +# CONFIG_LP486E is not set +# CONFIG_ETH16I is not set +CONFIG_NE2000=m +# CONFIG_ZNET is not set +# CONFIG_SEEQ8005 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_AC3200 is not set +# CONFIG_APRICOT is not set +# CONFIG_B44 is not set +# CONFIG_CS89x0 is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_NET_POCKET is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_IXGB is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set + +# +# Wireless LAN (non-hamradio) +# +CONFIG_NET_RADIO=y + +# +# Obsolete Wireless cards support (pre-802.11) +# +# CONFIG_STRIP is not set +# CONFIG_ARLAN is not set +# CONFIG_WAVELAN is not set +# CONFIG_PCMCIA_WAVELAN is not set +# CONFIG_PCMCIA_NETWAVE is not set + +# +# Wireless 802.11 Frequency Hopping cards support +# +# CONFIG_PCMCIA_RAYCS is not set + +# +# Wireless 802.11b ISA/PCI cards support +# +# CONFIG_AIRO is not set +CONFIG_HERMES=m +# CONFIG_PLX_HERMES is not set +# CONFIG_TMD_HERMES is not set +# CONFIG_PCI_HERMES is not set + +# +# Wireless 802.11b Pcmcia/Cardbus cards support +# +CONFIG_PCMCIA_HERMES=m +# CONFIG_AIRO_CS is not set +# CONFIG_PCMCIA_ATMEL is not set +# CONFIG_PCMCIA_WL3501 is not set +CONFIG_NET_WIRELESS=y + +# +# Token Ring devices +# +# CONFIG_TR is not set +# CONFIG_RCPCI is not set +# CONFIG_SHAPER is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Amateur Radio support +# +# CONFIG_HAMRADIO is not set + +# +# IrDA (infrared) support +# +# CONFIG_IRDA is not set + +# +# Bluetooth support +# +# CONFIG_BT is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN_BOOL is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Userland interfaces +# + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +# CONFIG_SERIO is not set +# CONFIG_SERIO_I8042 is not set + +# +# Input Device Drivers +# + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL is not set +CONFIG_SH_SCI=y +CONFIG_SERIAL_CONSOLE=y +CONFIG_RTC_9701JE=y + +# +# Unix 98 PTY support +# +# CONFIG_UNIX98_PTYS is not set +CONFIG_HEARTBEAT=y +# CONFIG_PSMOUSE is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_RTC is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_SH_SCI is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# I2C Algorithms +# + +# +# I2C Hardware Bus support +# + +# +# I2C Hardware Sensors Chip support +# +# CONFIG_I2C_SENSOR is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +CONFIG_MINIX_FS=y +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +# CONFIG_DEVFS_FS is not set +# CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set +# CONFIG_EXPORTFS is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_INTERMEZZO_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y + +# +# Native Language Support +# +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_CODEPAGE_932=y +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=m +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_OSSEMUL is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ISA devices +# +# CONFIG_SND_AD1848 is not set +# CONFIG_SND_CS4231 is not set +# CONFIG_SND_CS4232 is not set +# CONFIG_SND_CS4236 is not set +# CONFIG_SND_ES1688 is not set +# CONFIG_SND_ES18XX is not set +# CONFIG_SND_GUSCLASSIC is not set +# CONFIG_SND_GUSEXTREME is not set +# CONFIG_SND_GUSMAX is not set +# CONFIG_SND_INTERWAVE is not set +# CONFIG_SND_INTERWAVE_STB is not set +# CONFIG_SND_OPTI92X_AD1848 is not set +# CONFIG_SND_OPTI92X_CS4231 is not set +# CONFIG_SND_OPTI93X is not set +# CONFIG_SND_SB8 is not set +# CONFIG_SND_SB16 is not set +# CONFIG_SND_SBAWE is not set +# CONFIG_SND_WAVEFRONT is not set +# CONFIG_SND_CMI8330 is not set +# CONFIG_SND_OPL3SA2 is not set +# CONFIG_SND_SGALAXY is not set +# CONFIG_SND_SSCAPE is not set + +# +# PCI devices +# +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_TRIDENT is not set +CONFIG_SND_YMFPCI=m +# CONFIG_SND_ALS4000 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VX222 is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_VXP440 is not set + +# +# Open Sound System +# +CONFIG_SOUND_PRIME=m +# CONFIG_SOUND_BT878 is not set +CONFIG_SOUND_CMPCI=m +# CONFIG_SOUND_CMPCI_FM is not set +# CONFIG_SOUND_CMPCI_MIDI is not set +# CONFIG_SOUND_CMPCI_JOYSTICK is not set +# CONFIG_SOUND_CMPCI_CM8738 is not set +# CONFIG_SOUND_EMU10K1 is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_CS4281 is not set +# CONFIG_SOUND_ES1370 is not set +# CONFIG_SOUND_ES1371 is not set +# CONFIG_SOUND_ESSSOLO1 is not set +# CONFIG_SOUND_MAESTRO is not set +# CONFIG_SOUND_MAESTRO3 is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_SONICVIBES is not set +# CONFIG_SOUND_TRIDENT is not set +# CONFIG_SOUND_MSNDCLAS is not set +# CONFIG_SOUND_MSNDPIN is not set +# CONFIG_SOUND_VIA82CXXX is not set +# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_ALI5455 is not set +# CONFIG_SOUND_FORTE is not set +# CONFIG_SOUND_RME96XX is not set +# CONFIG_SOUND_AD1980 is not set +CONFIG_SOUND_VOYAGERGX=m + +# +# USB support +# +# CONFIG_USB is not set +# CONFIG_USB_GADGET is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_KGDB is not set +# CONFIG_FRAME_POINTER is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_CRC32=y diff --git a/arch/sh/configs/se7300_defconfig b/arch/sh/configs/se7300_defconfig new file mode 100644 index 000000000000..842ca47a684e --- /dev/null +++ b/arch/sh/configs/se7300_defconfig @@ -0,0 +1,461 @@ +# +# Automatically generated make config: don't edit +# +CONFIG_SUPERH=y +CONFIG_UID16=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_STANDALONE=y +CONFIG_BROKEN_ON_SMP=y + +# +# General setup +# +# CONFIG_SWAP is not set +# CONFIG_SYSVIPC is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_HOTPLUG is not set +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +# CONFIG_KALLSYMS is not set +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set + +# +# Loadable module support +# +# CONFIG_MODULES is not set + +# +# System type +# +# CONFIG_SH_SOLUTION_ENGINE is not set +# CONFIG_SH_7751_SOLUTION_ENGINE is not set +CONFIG_SH_7300_SOLUTION_ENGINE=y +# CONFIG_SH_7751_SYSTEMH is not set +# CONFIG_SH_STB1_HARP is not set +# CONFIG_SH_STB1_OVERDRIVE is not set +# CONFIG_SH_HP620 is not set +# CONFIG_SH_HP680 is not set +# CONFIG_SH_HP690 is not set +# CONFIG_SH_CQREEK is not set +# CONFIG_SH_DMIDA is not set +# CONFIG_SH_EC3104 is not set +# CONFIG_SH_SATURN is not set +# CONFIG_SH_DREAMCAST is not set +# CONFIG_SH_CAT68701 is not set +# CONFIG_SH_BIGSUR is not set +# CONFIG_SH_SH2000 is not set +# CONFIG_SH_ADX is not set +# CONFIG_SH_MPC1211 is not set +# CONFIG_SH_SECUREEDGE5410 is not set +# CONFIG_SH_HS7751RVOIP is not set +# CONFIG_SH_RTS7751R2D is not set +# CONFIG_SH_UNKNOWN is not set +# CONFIG_CPU_SH2 is not set +CONFIG_CPU_SH3=y +# CONFIG_CPU_SH4 is not set +# CONFIG_CPU_SUBTYPE_SH7604 is not set +CONFIG_CPU_SUBTYPE_SH7300=y +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +# CONFIG_CPU_SUBTYPE_SH7751 is not set +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_ST40STB1 is not set +# CONFIG_CPU_SUBTYPE_ST40GX1 is not set +CONFIG_MMU=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="console=ttySC0,38400 root=/dev/ram0" +CONFIG_MEMORY_START=0x0c000000 +CONFIG_MEMORY_SIZE=0x04000000 +# CONFIG_MEMORY_OVERRIDE is not set +CONFIG_SH_DSP=y +# CONFIG_SH_ADC is not set +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00210000 +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_PREEMPT is not set +# CONFIG_UBC_WAKEUP is not set +# CONFIG_SH_WRITETHROUGH is not set +# CONFIG_SH_OCRAM is not set +# CONFIG_SMP is not set +# CONFIG_SH_PCLK_CALC is not set +CONFIG_SH_PCLK_FREQ=33333333 + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# DMA support +# +# CONFIG_SH_DMA is not set + +# +# Companion Chips +# +# CONFIG_HD6446X_SERIES is not set +CONFIG_HEARTBEAT=y + +# +# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# +# CONFIG_PCI is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_FLAT is not set +# CONFIG_BINFMT_MISC is not set + +# +# SH initrd options +# +CONFIG_EMBEDDED_RAMDISK=y +CONFIG_EMBEDDED_RAMDISK_IMAGE="ramdisk.gz" + +# +# Device Drivers +# + +# +# Generic Driver Options +# + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_LOOP is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_LBD is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_SCSI is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# + +# +# Networking support +# +# CONFIG_NET is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input I/O drivers +# +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_CT82C710 is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_UNIX98_PTYS is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_QIC02_TAPE is not set + +# +# IPMI +# +CONFIG_IPMI_HANDLER=y +# CONFIG_IPMI_PANIC_EVENT is not set +CONFIG_IPMI_DEVICE_INTERFACE=y +# CONFIG_IPMI_SI is not set +CONFIG_IPMI_WATCHDOG=y + +# +# Watchdog Cards +# +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=y +# CONFIG_SH_WDT is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_FTAPE is not set +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# Misc devices +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# + +# +# Graphics support +# +# CONFIG_FB is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT3_FS is not set +# CONFIG_JBD is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_XFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_FAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_SYSFS=y +CONFIG_DEVFS_FS=y +CONFIG_DEVFS_MOUNT=y +# CONFIG_DEVFS_DEBUG is not set +# CONFIG_TMPFS is not set +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_INFO is not set +CONFIG_SH_STANDARD_BIOS=y +CONFIG_EARLY_PRINTK=y +CONFIG_KGDB=y + +# +# KGDB configuration options +# +# CONFIG_MORE_COMPILE_OPTIONS is not set +# CONFIG_KGDB_NMI is not set +# CONFIG_KGDB_THREAD is not set +# CONFIG_SH_KGDB_CONSOLE is not set +# CONFIG_KGDB_SYSRQ is not set +# CONFIG_KGDB_KERNEL_ASSERTS is not set + +# +# Serial port setup +# +CONFIG_KGDB_DEFPORT=1 +CONFIG_KGDB_DEFBAUD=115200 +CONFIG_KGDB_DEFPARITY_N=y +# CONFIG_KGDB_DEFPARITY_E is not set +# CONFIG_KGDB_DEFPARITY_O is not set +CONFIG_KGDB_DEFBITS_8=y +# CONFIG_KGDB_DEFBITS_7 is not set +# CONFIG_FRAME_POINTER is not set + +# +# Security options +# +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set diff --git a/arch/sh/defconfig b/arch/sh/defconfig index 44ec26ea5505..ef852bbc926b 100644 --- a/arch/sh/defconfig +++ b/arch/sh/defconfig @@ -352,7 +352,7 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_MAGIC_SYSRQ is not set # CONFIG_DEBUG_SPINLOCK is not set CONFIG_SH_STANDARD_BIOS=y -CONFIG_SH_EARLY_PRINTK=y +CONFIG_EARLY_PRINTK=y # CONFIG_KGDB is not set # CONFIG_FRAME_POINTER is not set diff --git a/arch/sh/drivers/dma/Makefile b/arch/sh/drivers/dma/Makefile index e8941854252c..065d4c90970e 100644 --- a/arch/sh/drivers/dma/Makefile +++ b/arch/sh/drivers/dma/Makefile @@ -3,6 +3,7 @@ # obj-y += dma-api.o dma-isa.o +obj-$(CONFIG_SYSFS) += dma-sysfs.o obj-$(CONFIG_SH_DMA) += dma-sh.o obj-$(CONFIG_SH_DREAMCAST) += dma-pvr2.o dma-g2.o diff --git a/arch/sh/drivers/dma/dma-api.c b/arch/sh/drivers/dma/dma-api.c index f8b352d4b091..3fc34e1cf7df 100644 --- a/arch/sh/drivers/dma/dma-api.c +++ b/arch/sh/drivers/dma/dma-api.c @@ -3,23 +3,24 @@ * * SuperH-specific DMA management API * - * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2003, 2004 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. - */ + */ #include <linux/init.h> #include <linux/module.h> #include <linux/interrupt.h> #include <linux/spinlock.h> #include <linux/proc_fs.h> +#include <linux/list.h> #include <asm/dma.h> -struct dma_info dma_info[MAX_DMA_CHANNELS] = { { 0, } }; spinlock_t dma_spin_lock = SPIN_LOCK_UNLOCKED; +static LIST_HEAD(registered_dmac_list); -/* +/* * A brief note about the reasons for this API as it stands. * * For starters, the old ISA DMA API didn't work for us for a number of @@ -54,124 +55,213 @@ spinlock_t dma_spin_lock = SPIN_LOCK_UNLOCKED; struct dma_info *get_dma_info(unsigned int chan) { - return dma_info + chan; + struct list_head *pos, *tmp; + unsigned int total = 0; + + /* + * Look for each DMAC's range to determine who the owner of + * the channel is. + */ + list_for_each_safe(pos, tmp, ®istered_dmac_list) { + struct dma_info *info = list_entry(pos, struct dma_info, list); + + total += info->nr_channels; + if (chan > total) + continue; + + return info; + } + + return NULL; +} + +struct dma_channel *get_dma_channel(unsigned int chan) +{ + struct dma_info *info = get_dma_info(chan); + + if (!info) + return ERR_PTR(-EINVAL); + + return info->channels + chan; } int get_dma_residue(unsigned int chan) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; if (info->ops->get_residue) - return info->ops->get_residue(info); - + return info->ops->get_residue(channel); + return 0; } int request_dma(unsigned int chan, const char *dev_id) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; - down(&info->sem); + down(&channel->sem); if (!info->ops || chan >= MAX_DMA_CHANNELS) { - up(&info->sem); + up(&channel->sem); return -EINVAL; } - - atomic_set(&info->busy, 1); - info->dev_id = dev_id; + atomic_set(&channel->busy, 1); - up(&info->sem); + strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id)); + + up(&channel->sem); if (info->ops->request) - return info->ops->request(info); - + return info->ops->request(channel); + return 0; } void free_dma(unsigned int chan) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; if (info->ops->free) - info->ops->free(info); - - atomic_set(&info->busy, 0); + info->ops->free(channel); + + atomic_set(&channel->busy, 0); } void dma_wait_for_completion(unsigned int chan) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; - if (info->tei_capable) { - wait_event(info->wait_queue, (info->ops->get_residue(info) == 0)); + if (channel->flags & DMA_TEI_CAPABLE) { + wait_event(channel->wait_queue, + (info->ops->get_residue(channel) == 0)); return; } - while (info->ops->get_residue(info)) + while (info->ops->get_residue(channel)) cpu_relax(); } void dma_configure_channel(unsigned int chan, unsigned long flags) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; if (info->ops->configure) - info->ops->configure(info, flags); + info->ops->configure(channel, flags); } int dma_xfer(unsigned int chan, unsigned long from, unsigned long to, size_t size, unsigned int mode) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; - info->sar = from; - info->dar = to; - info->count = size; - info->mode = mode; + channel->sar = from; + channel->dar = to; + channel->count = size; + channel->mode = mode; - return info->ops->xfer(info); + return info->ops->xfer(channel); } #ifdef CONFIG_PROC_FS static int dma_read_proc(char *buf, char **start, off_t off, int len, int *eof, void *data) { - struct dma_info *info; + struct list_head *pos, *tmp; char *p = buf; - int i; - for (i = 0, info = dma_info; i < MAX_DMA_CHANNELS; i++, info++) { - if (!atomic_read(&info->busy)) - continue; + if (list_empty(®istered_dmac_list)) + return 0; + + /* + * Iterate over each registered DMAC + */ + list_for_each_safe(pos, tmp, ®istered_dmac_list) { + struct dma_info *info = list_entry(pos, struct dma_info, list); + int i; - p += sprintf(p, "%2d: %14s %s\n", i, - info->ops->name, info->dev_id); + /* + * Iterate over each channel + */ + for (i = 0; i < info->nr_channels; i++) { + struct dma_channel *channel = info->channels + i; + + if (!(channel->flags & DMA_CONFIGURED)) + continue; + + p += sprintf(p, "%2d: %14s %s\n", i, + info->name, channel->dev_id); + } } return p - buf; } #endif -int __init register_dmac(struct dma_ops *ops) + +int __init register_dmac(struct dma_info *info) { int i; - printk("DMA: Registering %s handler.\n", ops->name); + INIT_LIST_HEAD(&info->list); + + printk(KERN_INFO "DMA: Registering %s handler (%d channels).\n", + info->name, info->nr_channels); + + BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels); - for (i = 0; i < MAX_DMA_CHANNELS; i++) { - struct dma_info *info = get_dma_info(i); + /* + * Don't touch pre-configured channels + */ + if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) { + unsigned int size; - info->chan = i; + size = sizeof(struct dma_channel) * info->nr_channels; - init_MUTEX(&info->sem); - init_waitqueue_head(&info->wait_queue); + info->channels = kmalloc(size, GFP_KERNEL); + if (!info->channels) + return -ENOMEM; + + memset(info->channels, 0, size); } + for (i = 0; i < info->nr_channels; i++) { + struct dma_channel *chan = info->channels + i; + + chan->chan = i; + + memcpy(chan->dev_id, "Unused", 7); + + if (info->flags & DMAC_CHANNELS_TEI_CAPABLE) + chan->flags |= DMA_TEI_CAPABLE; + + init_MUTEX(&chan->sem); + init_waitqueue_head(&chan->wait_queue); + +#ifdef CONFIG_SYSFS + dma_create_sysfs_files(chan); +#endif + } + + list_add(&info->list, ®istered_dmac_list); + return 0; } +void __exit unregister_dmac(struct dma_info *info) +{ + if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) + kfree(info->channels); + + list_del(&info->list); +} + static int __init dma_api_init(void) { printk("DMA: Registering DMA API.\n"); @@ -191,8 +281,11 @@ MODULE_LICENSE("GPL"); EXPORT_SYMBOL(request_dma); EXPORT_SYMBOL(free_dma); +EXPORT_SYMBOL(register_dmac); +EXPORT_SYMBOL(unregister_dmac); EXPORT_SYMBOL(get_dma_residue); EXPORT_SYMBOL(get_dma_info); +EXPORT_SYMBOL(get_dma_channel); EXPORT_SYMBOL(dma_xfer); EXPORT_SYMBOL(dma_wait_for_completion); EXPORT_SYMBOL(dma_configure_channel); diff --git a/arch/sh/drivers/dma/dma-isa.c b/arch/sh/drivers/dma/dma-isa.c index 01564983b967..1c9bc45b8bcb 100644 --- a/arch/sh/drivers/dma/dma-isa.c +++ b/arch/sh/drivers/dma/dma-isa.c @@ -3,13 +3,14 @@ * * Generic ISA DMA wrapper for SH DMA API * - * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2003, 2004 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. - */ + */ #include <linux/kernel.h> +#include <linux/module.h> #include <asm/dma.h> /* @@ -39,55 +40,67 @@ unsigned long __deprecated claim_dma_lock(void) return flags; } +EXPORT_SYMBOL(claim_dma_lock); void __deprecated release_dma_lock(unsigned long flags) { spin_unlock_irqrestore(&dma_spin_lock, flags); } +EXPORT_SYMBOL(release_dma_lock); void __deprecated disable_dma(unsigned int chan) { /* Nothing */ } +EXPORT_SYMBOL(disable_dma); void __deprecated enable_dma(unsigned int chan) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; - info->ops->xfer(info); + info->ops->xfer(channel); } +EXPORT_SYMBOL(enable_dma); void clear_dma_ff(unsigned int chan) { /* Nothing */ } +EXPORT_SYMBOL(clear_dma_ff); void set_dma_mode(unsigned int chan, char mode) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; - info->mode = mode; + channel->mode = mode; } +EXPORT_SYMBOL(set_dma_mode); void set_dma_addr(unsigned int chan, unsigned int addr) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; /* * Single address mode is the only thing supported through * this interface. */ - if ((info->mode & DMA_MODE_MASK) == DMA_MODE_READ) { - info->sar = addr; + if ((channel->mode & DMA_MODE_MASK) == DMA_MODE_READ) { + channel->sar = addr; } else { - info->dar = addr; + channel->dar = addr; } } +EXPORT_SYMBOL(set_dma_addr); void set_dma_count(unsigned int chan, unsigned int count) { struct dma_info *info = get_dma_info(chan); + struct dma_channel *channel = &info->channels[chan]; - info->count = count; + channel->count = count; } +EXPORT_SYMBOL(set_dma_count); diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c index ec3ff5044744..31dacd4444b2 100644 --- a/arch/sh/drivers/dma/dma-sh.c +++ b/arch/sh/drivers/dma/dma-sh.c @@ -1,10 +1,10 @@ /* - * arch/sh/kernel/cpu/dma.c + * arch/sh/drivers/dma/dma-sh.c * - * Copyright (C) 2000 Takashi YOSHII - * Copyright (C) 2003 Paul Mundt + * SuperH On-chip DMAC Support * - * PC like DMA API for SuperH's DMAC. + * Copyright (C) 2000 Takashi YOSHII + * Copyright (C) 2003, 2004 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -29,43 +29,29 @@ * Defaults to a 64-bit transfer size. */ enum { - XMIT_SZ_64BIT = 0, - XMIT_SZ_8BIT = 1, - XMIT_SZ_16BIT = 2, - XMIT_SZ_32BIT = 3, - XMIT_SZ_256BIT = 4, + XMIT_SZ_64BIT, + XMIT_SZ_8BIT, + XMIT_SZ_16BIT, + XMIT_SZ_32BIT, + XMIT_SZ_256BIT, }; /* * The DMA count is defined as the number of bytes to transfer. */ static unsigned int ts_shift[] = { - [XMIT_SZ_64BIT] 3, - [XMIT_SZ_8BIT] 0, - [XMIT_SZ_16BIT] 1, - [XMIT_SZ_32BIT] 2, - [XMIT_SZ_256BIT] 5, -}; - -struct sh_dmac_channel { - unsigned long sar; - unsigned long dar; - unsigned long dmatcr; - unsigned long chcr; -} __attribute__ ((aligned(16))); - -struct sh_dmac_info { - struct sh_dmac_channel channel[4]; - unsigned long dmaor; + [XMIT_SZ_64BIT] = 3, + [XMIT_SZ_8BIT] = 0, + [XMIT_SZ_16BIT] = 1, + [XMIT_SZ_32BIT] = 2, + [XMIT_SZ_256BIT] = 5, }; -static volatile struct sh_dmac_info *sh_dmac = (volatile struct sh_dmac_info *)SH_DMAC_BASE; - static inline unsigned int get_dmte_irq(unsigned int chan) { unsigned int irq; - /* + /* * Normally we could just do DMTE0_IRQ + chan outright, though in the * case of the 7751R, the DMTE IRQs for channels > 4 start right above * the SCIF @@ -84,13 +70,17 @@ static inline unsigned int get_dmte_irq(unsigned int chan) * We determine the correct shift size based off of the CHCR transmit size * for the given channel. Since we know that it will take: * - * info->count >> ts_shift[transmit_size] + * info->count >> ts_shift[transmit_size] * * iterations to complete the transfer. */ -static inline unsigned int calc_xmit_shift(struct dma_info *info) +static inline unsigned int calc_xmit_shift(struct dma_channel *chan) { - return ts_shift[(sh_dmac->channel[info->chan].chcr >> 4) & 0x0007]; + u32 chcr = ctrl_inl(CHCR[chan->chan]); + + chcr >>= 4; + + return ts_shift[chcr & 0x0007]; } /* @@ -101,68 +91,79 @@ static inline unsigned int calc_xmit_shift(struct dma_info *info) */ static irqreturn_t dma_tei(int irq, void *dev_id, struct pt_regs *regs) { - struct dma_info * info = (struct dma_info *)dev_id; - u32 chcr = sh_dmac->channel[info->chan].chcr; + struct dma_channel *chan = (struct dma_channel *)dev_id; + u32 chcr; + + chcr = ctrl_inl(CHCR[chan->chan]); if (!(chcr & CHCR_TE)) return IRQ_NONE; - sh_dmac->channel[info->chan].chcr = chcr & ~(CHCR_IE | CHCR_DE); + chcr &= ~(CHCR_IE | CHCR_DE); + ctrl_outl(chcr, CHCR[chan->chan]); - wake_up(&info->wait_queue); + wake_up(&chan->wait_queue); return IRQ_HANDLED; } -static int sh_dmac_request_dma(struct dma_info *info) +static int sh_dmac_request_dma(struct dma_channel *chan) { - return request_irq(get_dmte_irq(info->chan), dma_tei, - SA_INTERRUPT, "DMAC Transfer End", info); + return request_irq(get_dmte_irq(chan->chan), dma_tei, + SA_INTERRUPT, "DMAC Transfer End", chan); } -static void sh_dmac_free_dma(struct dma_info *info) +static void sh_dmac_free_dma(struct dma_channel *chan) { - free_irq(get_dmte_irq(info->chan), info); + free_irq(get_dmte_irq(chan->chan), chan); } -static void sh_dmac_configure_channel(struct dma_info *info, unsigned long chcr) +static void sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr) { if (!chcr) chcr = RS_DUAL; - sh_dmac->channel[info->chan].chcr = chcr; + ctrl_outl(chcr, CHCR[chan->chan]); - info->configured = 1; + chan->flags |= DMA_CONFIGURED; } -static void sh_dmac_enable_dma(struct dma_info *info) +static void sh_dmac_enable_dma(struct dma_channel *chan) { - int irq = get_dmte_irq(info->chan); + int irq = get_dmte_irq(chan->chan); + u32 chcr; + + chcr = ctrl_inl(CHCR[chan->chan]); + chcr |= CHCR_DE | CHCR_IE; + ctrl_outl(chcr, CHCR[chan->chan]); - sh_dmac->channel[info->chan].chcr |= (CHCR_DE | CHCR_IE); enable_irq(irq); } -static void sh_dmac_disable_dma(struct dma_info *info) +static void sh_dmac_disable_dma(struct dma_channel *chan) { - int irq = get_dmte_irq(info->chan); + int irq = get_dmte_irq(chan->chan); + u32 chcr; disable_irq(irq); - sh_dmac->channel[info->chan].chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE); + + chcr = ctrl_inl(CHCR[chan->chan]); + chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE); + ctrl_outl(chcr, CHCR[chan->chan]); } -static int sh_dmac_xfer_dma(struct dma_info *info) +static int sh_dmac_xfer_dma(struct dma_channel *chan) { - /* + /* * If we haven't pre-configured the channel with special flags, use * the defaults. */ - if (!info->configured) - sh_dmac_configure_channel(info, 0); + if (!(chan->flags & DMA_CONFIGURED)) + sh_dmac_configure_channel(chan, 0); + + sh_dmac_disable_dma(chan); - sh_dmac_disable_dma(info); - - /* + /* * Single-address mode usage note! * * It's important that we don't accidentally write any value to SAR/DAR @@ -177,33 +178,36 @@ static int sh_dmac_xfer_dma(struct dma_info *info) * cascading to the PVR2 DMAC. In this case, we still need to write * SAR and DAR, regardless of value, in order for cascading to work. */ - if (info->sar || (mach_is_dreamcast() && info->chan == 2)) - sh_dmac->channel[info->chan].sar = info->sar; - if (info->dar || (mach_is_dreamcast() && info->chan == 2)) - sh_dmac->channel[info->chan].dar = info->dar; - - sh_dmac->channel[info->chan].dmatcr = info->count >> calc_xmit_shift(info); + if (chan->sar || (mach_is_dreamcast() && chan->chan == 2)) + ctrl_outl(chan->sar, SAR[chan->chan]); + if (chan->dar || (mach_is_dreamcast() && chan->chan == 2)) + ctrl_outl(chan->dar, DAR[chan->chan]); + + ctrl_outl(chan->count >> calc_xmit_shift(chan), DMATCR[chan->chan]); - sh_dmac_enable_dma(info); + sh_dmac_enable_dma(chan); return 0; } -static int sh_dmac_get_dma_residue(struct dma_info *info) +static int sh_dmac_get_dma_residue(struct dma_channel *chan) { - if (!(sh_dmac->channel[info->chan].chcr & CHCR_DE)) + if (!(ctrl_inl(CHCR[chan->chan]) & CHCR_DE)) return 0; - return sh_dmac->channel[info->chan].dmatcr << calc_xmit_shift(info); + return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan); } #if defined(CONFIG_CPU_SH4) static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs) { - printk("DMAE: DMAOR=%lx\n", sh_dmac->dmaor); + unsigned long dmaor = ctrl_inl(DMAOR); - sh_dmac->dmaor &= ~(DMAOR_NMIF | DMAOR_AE); - sh_dmac->dmaor |= DMAOR_DME; + printk("DMAE: DMAOR=%lx\n", dmaor); + + ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_NMIF, DMAOR); + ctrl_outl(ctrl_inl(DMAOR)&~DMAOR_AE, DMAOR); + ctrl_outl(ctrl_inl(DMAOR)|DMAOR_DME, DMAOR); disable_irq(irq); @@ -212,16 +216,23 @@ static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs) #endif static struct dma_ops sh_dmac_ops = { - .name = "SuperH DMAC", .request = sh_dmac_request_dma, .free = sh_dmac_free_dma, .get_residue = sh_dmac_get_dma_residue, .xfer = sh_dmac_xfer_dma, .configure = sh_dmac_configure_channel, }; - + +static struct dma_info sh_dmac_info = { + .name = "SuperH DMAC", + .nr_channels = 4, + .ops = &sh_dmac_ops, + .flags = DMAC_CHANNELS_TEI_CAPABLE, +}; + static int __init sh_dmac_init(void) { + struct dma_info *info = &sh_dmac_info; int i; #ifdef CONFIG_CPU_SH4 @@ -231,18 +242,15 @@ static int __init sh_dmac_init(void) return i; #endif - for (i = 0; i < MAX_DMAC_CHANNELS; i++) { + for (i = 0; i < info->nr_channels; i++) { int irq = get_dmte_irq(i); make_ipr_irq(irq, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY); - - dma_info[i].ops = &sh_dmac_ops; - dma_info[i].tei_capable = 1; } - sh_dmac->dmaor |= 0x8000 | DMAOR_DME; + ctrl_outl(0x8000 | DMAOR_DME, DMAOR); - return register_dmac(&sh_dmac_ops); + return register_dmac(info); } static void __exit sh_dmac_exit(void) diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c new file mode 100644 index 000000000000..71a6d4e7809f --- /dev/null +++ b/arch/sh/drivers/dma/dma-sysfs.c @@ -0,0 +1,133 @@ +/* + * arch/sh/drivers/dma/dma-sysfs.c + * + * sysfs interface for SH DMA API + * + * Copyright (C) 2004 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/sysdev.h> +#include <linux/module.h> +#include <asm/dma.h> + +static struct sysdev_class dma_sysclass = { + set_kset_name("dma"), +}; + +EXPORT_SYMBOL(dma_sysclass); + +static ssize_t dma_show_devices(struct sys_device *dev, char *buf) +{ + ssize_t len = 0; + int i; + + for (i = 0; i < MAX_DMA_CHANNELS; i++) { + struct dma_info *info = get_dma_info(i); + struct dma_channel *channel = &info->channels[i]; + + len += sprintf(buf + len, "%2d: %14s %s\n", + channel->chan, info->name, + channel->dev_id); + } + + return len; +} + +static SYSDEV_ATTR(devices, S_IRUGO, dma_show_devices, NULL); + +static int __init dma_sysclass_init(void) +{ + int ret; + + ret = sysdev_class_register(&dma_sysclass); + if (ret == 0) + sysfs_create_file(&dma_sysclass.kset.kobj, &attr_devices.attr); + + return ret; +} + +postcore_initcall(dma_sysclass_init); + +static ssize_t dma_show_dev_id(struct sys_device *dev, char *buf) +{ + struct dma_channel *channel = to_dma_channel(dev); + return sprintf(buf, "%s\n", channel->dev_id); +} + +static ssize_t dma_store_dev_id(struct sys_device *dev, + const char *buf, size_t count) +{ + struct dma_channel *channel = to_dma_channel(dev); + strcpy(channel->dev_id, buf); + return count; +} + +static SYSDEV_ATTR(dev_id, S_IRUGO | S_IWUSR, dma_show_dev_id, dma_store_dev_id); + +static ssize_t dma_store_config(struct sys_device *dev, + const char *buf, size_t count) +{ + struct dma_channel *channel = to_dma_channel(dev); + unsigned long config; + + config = simple_strtoul(buf, NULL, 0); + dma_configure_channel(channel->chan, config); + + return count; +} + +static SYSDEV_ATTR(config, S_IWUSR, NULL, dma_store_config); + +static ssize_t dma_show_mode(struct sys_device *dev, char *buf) +{ + struct dma_channel *channel = to_dma_channel(dev); + return sprintf(buf, "0x%08x\n", channel->mode); +} + +static ssize_t dma_store_mode(struct sys_device *dev, + const char *buf, size_t count) +{ + struct dma_channel *channel = to_dma_channel(dev); + channel->mode = simple_strtoul(buf, NULL, 0); + return count; +} + +static SYSDEV_ATTR(mode, S_IRUGO | S_IWUSR, dma_show_mode, dma_store_mode); + +#define dma_ro_attr(field, fmt) \ +static ssize_t dma_show_##field(struct sys_device *dev, char *buf) \ +{ \ + struct dma_channel *channel = to_dma_channel(dev); \ + return sprintf(buf, fmt, channel->field); \ +} \ +static SYSDEV_ATTR(field, S_IRUGO, dma_show_##field, NULL); + +dma_ro_attr(count, "0x%08x\n"); +dma_ro_attr(flags, "0x%08lx\n"); + +int __init dma_create_sysfs_files(struct dma_channel *chan) +{ + struct sys_device *dev = &chan->dev; + int ret; + + dev->id = chan->chan; + dev->cls = &dma_sysclass; + + ret = sysdev_register(dev); + if (ret) + return ret; + + sysdev_create_file(dev, &attr_dev_id); + sysdev_create_file(dev, &attr_count); + sysdev_create_file(dev, &attr_mode); + sysdev_create_file(dev, &attr_flags); + sysdev_create_file(dev, &attr_config); + + return 0; +} + diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile index 20e928162d1b..4923bbf5e8a9 100644 --- a/arch/sh/drivers/pci/Makefile +++ b/arch/sh/drivers/pci/Makefile @@ -12,4 +12,5 @@ obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ dma-dreamcast.o obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o +obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c new file mode 100644 index 000000000000..7b5dbe157867 --- /dev/null +++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c @@ -0,0 +1,32 @@ +/* + * arch/sh/drivers/pci/fixups-rts7751r2d.c + * + * RTS7751R2D PCI fixups + * + * Copyright (C) 2003 Lineo uSolutions, Inc. + * Copyright (C) 2004 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include "pci-sh7751.h" +#include <asm/io.h> + +#define PCIMCR_MRSET_OFF 0xBFFFFFFF +#define PCIMCR_RFSH_OFF 0xFFFFFFFB + +int pci_fixup_pcic(void) +{ + unsigned long mcr; + + outl(0xfb900047, SH7751_PCICONF1); + outl(0xab000001, SH7751_PCICONF4); + + mcr = inl(SH7751_MCR); + mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF; + outl(mcr, SH7751_PCIMCR); + + return 0; +} + diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c new file mode 100644 index 000000000000..2bceb43c9a33 --- /dev/null +++ b/arch/sh/drivers/pci/ops-rts7751r2d.c @@ -0,0 +1,74 @@ +/* + * linux/arch/sh/kernel/pci-rts7751r2d.c + * + * Author: Ian DaSilva (idasilva@mvista.com) + * + * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * PCI initialization for the Renesas SH7751R RTS7751R2D board + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pci.h> +#include <linux/module.h> + +#include <asm/io.h> +#include "pci-sh7751.h" +#include <asm/rts7751r2d/rts7751r2d.h> + +int __init pcibios_map_platform_irq(u8 slot, u8 pin) +{ + switch (slot) { + case 0: return IRQ_PCISLOT1; /* PCI Extend slot #1 */ + case 1: return IRQ_PCISLOT2; /* PCI Extend slot #2 */ + case 2: return IRQ_PCMCIA; /* PCI Cardbus Bridge */ + case 3: return IRQ_PCIETH; /* Realtek Ethernet controller */ + default: + printk("PCI: Bad IRQ mapping request for slot %d\n", slot); + return -1; + } +} + +static struct resource sh7751_io_resource = { + .name = "SH7751_IO", + .start = 0x4000, + .end = 0x4000 + SH7751_PCI_IO_SIZE - 1, + .flags = IORESOURCE_IO +}; + +static struct resource sh7751_mem_resource = { + .name = "SH7751_mem", + .start = SH7751_PCI_MEMORY_BASE, + .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM +}; + +extern struct pci_ops sh7751_pci_ops; + +struct pci_channel board_pci_channels[] = { + { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, + { NULL, NULL, NULL, 0, 0 }, +}; +EXPORT_SYMBOL(board_pci_channels); + +static struct sh7751_pci_address_map sh7751_pci_map = { + .window0 = { + .base = SH7751_CS3_BASE_ADDR, + .size = 0x03f00000, + }, + + .flags = SH7751_PCIC_NO_RESET, +}; + +int __init pcibios_init_platform(void) +{ + return sh7751_pcic_init(&sh7751_pci_map); +} + diff --git a/arch/sh/drivers/pci/ops-snapgear.c b/arch/sh/drivers/pci/ops-snapgear.c index b44fe7f5356c..6fdb9765c99a 100644 --- a/arch/sh/drivers/pci/ops-snapgear.c +++ b/arch/sh/drivers/pci/ops-snapgear.c @@ -61,6 +61,8 @@ static struct sh7751_pci_address_map sh7751_pci_map = { .base = SH7751_CS2_BASE_ADDR, .size = SNAPGEAR_LSR1_SIZE, }, + + .flags = SH7751_PCIC_NO_RESET, }; /* diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c index 65fb8832f3d7..2ad70d499114 100644 --- a/arch/sh/drivers/pci/pci-auto.c +++ b/arch/sh/drivers/pci/pci-auto.c @@ -45,7 +45,7 @@ #include <linux/types.h> #include <linux/pci.h> -#define DEBUG +#undef DEBUG #ifdef DEBUG #define DBG(x...) printk(x) #else @@ -106,7 +106,8 @@ static void __init pciauto_setup_bars(struct pci_channel *hose, int top_bus, int current_bus, - int pci_devfn) + int pci_devfn, + int bar_limit) { u32 bar_response, bar_size, bar_value; u32 bar, addr_mask, bar_nr = 0; @@ -114,7 +115,8 @@ pciauto_setup_bars(struct pci_channel *hose, u32 * lower_limit; int found_mem64 = 0; - for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar+=4) { + for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar+=4) { +#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) u32 bar_addr; /* Read the old BAR value */ @@ -123,6 +125,7 @@ pciauto_setup_bars(struct pci_channel *hose, pci_devfn, bar, &bar_addr); +#endif /* Tickle the BAR and get the response */ early_write_config_dword(hose, top_bus, @@ -137,6 +140,7 @@ pciauto_setup_bars(struct pci_channel *hose, bar, &bar_response); +#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) /* * Write the old BAR value back out, only update the BAR * if we implicitly want resources to be updated, which @@ -147,6 +151,7 @@ pciauto_setup_bars(struct pci_channel *hose, pci_devfn, bar, bar_addr); +#endif /* If BAR is not implemented go to the next BAR */ if (!bar_response) @@ -287,6 +292,11 @@ pciauto_postscan_setup_bridge(struct pci_channel *hose, { u32 temp; + /* + * [jsun] we always bump up baselines a little, so that if there + * nothing behind P2P bridge, we don't wind up overlapping IO/MEM + * spaces. + */ pciauto_lower_memspc += 1; pciauto_lower_iospc += 1; @@ -318,93 +328,99 @@ pciauto_postscan_setup_bridge(struct pci_channel *hose, static void __init pciauto_prescan_setup_cardbus_bridge(struct pci_channel *hose, - int top_bus, - int current_bus, - int pci_devfn, - int sub_bus) + int top_bus, + int current_bus, + int pci_devfn, + int sub_bus) { - /* Configure bus number registers */ - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_PRIMARY_BUS, current_bus); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SECONDARY_BUS, sub_bus + 1); - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SUBORDINATE_BUS, 0xff); - - /* Align memory and I/O to 4KB and 4 byte boundaries. */ - pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) - & ~(0x1000 - 1); - pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1)) - & ~(0x4 - 1); - - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_CB_MEMORY_BASE_0, pciauto_lower_memspc); - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_CB_IO_BASE_0, pciauto_lower_iospc); + /* Configure bus number registers */ + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_PRIMARY_BUS, current_bus); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SECONDARY_BUS, sub_bus + 1); + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SUBORDINATE_BUS, 0xff); + + /* Align memory and I/O to 4KB and 4 byte boundaries. */ + pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) + & ~(0x1000 - 1); + pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1)) + & ~(0x4 - 1); + + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_CB_MEMORY_BASE_0, pciauto_lower_memspc); + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_CB_IO_BASE_0, pciauto_lower_iospc); } static void __init pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose, - int top_bus, - int current_bus, - int pci_devfn, - int sub_bus) + int top_bus, + int current_bus, + int pci_devfn, + int sub_bus) { - u32 temp; - - /* - * [jsun] we always bump up baselines a little, so that if there - * nothing behind P2P bridge, we don't wind up overlapping IO/MEM - * spaces. - */ - pciauto_lower_memspc += 1; - pciauto_lower_iospc += 1; - - /* - * Configure subordinate bus number. The PCI subsystem - * bus scan will renumber buses (reserving three additional - * for this PCI<->CardBus bridge for the case where a CardBus - * adapter contains a P2P or CB2CB bridge. - */ - - early_write_config_byte(hose, top_bus, current_bus, pci_devfn, - PCI_SUBORDINATE_BUS, sub_bus); - - /* - * Reserve an additional 4MB for mem space and 16KB for - * I/O space. This should cover any additional space - * requirement of unusual CardBus devices with - * additional bridges that can consume more address space. - * - * Although pcmcia-cs currently will reprogram bridge - * windows, the goal is to add an option to leave them - * alone and use the bridge window ranges as the regions - * that are searched for free resources upon hot-insertion - * of a device. This will allow a PCI<->CardBus bridge - * configured by this routine to happily live behind a - * P2P bridge in a system. - */ - - /* Align memory and I/O to 4KB and 4 byte boundaries. */ - pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) - & ~(0x1000 - 1); - pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1)) - & ~(0x4 - 1); - /* Set up memory and I/O filter limits, assume 32-bit I/O space */ - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_CB_MEMORY_LIMIT_0, pciauto_lower_memspc - 1); - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_CB_IO_LIMIT_0, pciauto_lower_iospc - 1); - - /* Enable memory and I/O accesses, enable bus master */ - early_read_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_COMMAND, &temp); - early_write_config_dword(hose, top_bus, current_bus, pci_devfn, - PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY - | PCI_COMMAND_MASTER); + u32 temp; + +#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) + /* + * [jsun] we always bump up baselines a little, so that if there + * nothing behind P2P bridge, we don't wind up overlapping IO/MEM + * spaces. + */ + pciauto_lower_memspc += 1; + pciauto_lower_iospc += 1; +#endif + + /* + * Configure subordinate bus number. The PCI subsystem + * bus scan will renumber buses (reserving three additional + * for this PCI<->CardBus bridge for the case where a CardBus + * adapter contains a P2P or CB2CB bridge. + */ + + early_write_config_byte(hose, top_bus, current_bus, pci_devfn, + PCI_SUBORDINATE_BUS, sub_bus); + + /* + * Reserve an additional 4MB for mem space and 16KB for + * I/O space. This should cover any additional space + * requirement of unusual CardBus devices with + * additional bridges that can consume more address space. + * + * Although pcmcia-cs currently will reprogram bridge + * windows, the goal is to add an option to leave them + * alone and use the bridge window ranges as the regions + * that are searched for free resources upon hot-insertion + * of a device. This will allow a PCI<->CardBus bridge + * configured by this routine to happily live behind a + * P2P bridge in a system. + */ +#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) + pciauto_lower_memspc += 0x00400000; + pciauto_lower_iospc += 0x00004000; +#endif + + /* Align memory and I/O to 4KB and 4 byte boundaries. */ + pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1)) + & ~(0x1000 - 1); + pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1)) + & ~(0x4 - 1); + /* Set up memory and I/O filter limits, assume 32-bit I/O space */ + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_CB_MEMORY_LIMIT_0, pciauto_lower_memspc - 1); + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_CB_IO_LIMIT_0, pciauto_lower_iospc - 1); + + /* Enable memory and I/O accesses, enable bus master */ + early_read_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_COMMAND, &temp); + early_write_config_dword(hose, top_bus, current_bus, pci_devfn, + PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | + PCI_COMMAND_MASTER); } -#define PCIAUTO_IDE_MODE_MASK 0x05 +#define PCIAUTO_IDE_MODE_MASK 0x05 static int __init pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) @@ -455,6 +471,9 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) { DBG(" Bridge: primary=%.2x, secondary=%.2x\n", current_bus, sub_bus + 1); +#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) + pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_1); +#endif pciauto_prescan_setup_bridge(hose, top_bus, current_bus, pci_devfn, sub_bus); DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", @@ -463,26 +482,26 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1); DBG("Back to bus %.2x\n", current_bus); pciauto_postscan_setup_bridge(hose, top_bus, current_bus, - pci_devfn, sub_bus); + pci_devfn, sub_bus); continue; - } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) { - DBG(" CARDBUS Bridge: primary=%.2x, secondary=%.2x\n", - current_bus, sub_bus + 1); - DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn)); - /* Place CardBus Socket/ExCA registers */ - pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn); + } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) { + DBG(" CARDBUS Bridge: primary=%.2x, secondary=%.2x\n", + current_bus, sub_bus + 1); + DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn)); + /* Place CardBus Socket/ExCA registers */ + pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_0); - pciauto_prescan_setup_cardbus_bridge(hose, top_bus, - current_bus, pci_devfn, sub_bus); + pciauto_prescan_setup_cardbus_bridge(hose, top_bus, + current_bus, pci_devfn, sub_bus); - DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", - sub_bus + 1, - pciauto_lower_iospc, pciauto_lower_memspc); - sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1); - DBG("Back to bus %.2x, sub_bus is %x\n", current_bus, sub_bus); - pciauto_postscan_setup_cardbus_bridge(hose, top_bus, - current_bus, pci_devfn, sub_bus); - continue; + DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n", + sub_bus + 1, + pciauto_lower_iospc, pciauto_lower_memspc); + sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1); + DBG("Back to bus %.2x, sub_bus is %x\n", current_bus, sub_bus); + pciauto_postscan_setup_cardbus_bridge(hose, top_bus, + current_bus, pci_devfn, sub_bus); + continue; } else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) { unsigned char prg_iface; @@ -495,7 +514,7 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) } } - /* + /* * Found a peripheral, enable some standard * settings */ @@ -509,7 +528,7 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus) PCI_LATENCY_TIMER, 0x80); /* Allocate PCI I/O and/or memory space */ - pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn); + pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5); } return sub_bus; } diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c index e53823e65dcc..b2bb72972bdb 100644 --- a/arch/sh/drivers/pci/pci-sh7751.c +++ b/arch/sh/drivers/pci/pci-sh7751.c @@ -31,6 +31,7 @@ #include "pci-sh7751.h" static unsigned int pci_probe = PCI_PROBE_CONF1; +extern int pci_fixup_pcic(void); /* * Direct access to PCI hardware... @@ -74,7 +75,8 @@ static int sh7751_pci_read(struct pci_bus *bus, unsigned int devfn, } /* - * Since SH7751 only does 32bit access we'll have to do a read,mask,write operation. + * Since SH7751 only does 32bit access we'll have to do a read, + * mask,write operation. * We'll allow an odd byte offset, though it should be illegal. */ static int sh7751_pci_write(struct pci_bus *bus, unsigned int devfn, @@ -156,6 +158,7 @@ static int __init pci_check_direct(void) * Handle bus scanning and fixups .... */ +#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) static void __init pci_fixup_ide_bases(struct pci_dev *d) { int i; @@ -174,11 +177,13 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d) } } } - +#endif /* Add future fixups here... */ struct pci_fixup pcibios_fixups[] = { +#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D) { PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases }, +#endif { 0 } }; @@ -261,19 +266,19 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) outl(word, PCI_REG(SH7751_PCICLKR)); /* - * XXX: This code is unused for the SnapGear boards as it is done in - * the bootloader and doing it here means the MAC addresses loaded by - * the bootloader get lost. + * This code is unused for some boards as it is done in the + * bootloader and doing it here means the MAC addresses loaded + * by the bootloader get lost. */ -#ifndef CONFIG_SH_SECUREEDGE5410 - /* toggle PCI reset pin */ - word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST; - outl(word,PCI_REG(SH7751_PCICR)); - /* Wait for a long time... not 1 sec. but long enough */ - mdelay(100); - word = SH7751_PCICR_PREFIX; - outl(word,PCI_REG(SH7751_PCICR)); -#endif + if (!(map->flags & SH7751_PCIC_NO_RESET)) { + /* toggle PCI reset pin */ + word = SH7751_PCICR_PREFIX | SH7751_PCICR_PRST; + outl(word,PCI_REG(SH7751_PCICR)); + /* Wait for a long time... not 1 sec. but long enough */ + mdelay(100); + word = SH7751_PCICR_PREFIX; + outl(word,PCI_REG(SH7751_PCICR)); + } /* set the command/status bits to: * Wait Cycle Control + Parity Enable + Bus Master + @@ -364,6 +369,10 @@ int __init sh7751_pcic_init(struct sh7751_pci_address_map *map) * DMA interrupts... */ +#ifdef CONFIG_SH_RTS7751R2D + pci_fixup_pcic(); +#endif + /* SH7751 init done, set central function init complete */ /* use round robin mode to stop a device starving/overruning */ word = SH7751_PCICR_PREFIX | SH7751_PCICR_CFIN | SH7751_PCICR_ARBM; diff --git a/arch/sh/drivers/pci/pci-sh7751.h b/arch/sh/drivers/pci/pci-sh7751.h index b8b1d421aec7..1fee5cae10d1 100644 --- a/arch/sh/drivers/pci/pci-sh7751.h +++ b/arch/sh/drivers/pci/pci-sh7751.h @@ -234,6 +234,7 @@ #define SH7751_PCIWCR2 0x1EC /* Wait Control 2 Register */ #define SH7751_PCIWCR3 0x1F0 /* Wait Control 3 Register */ #define SH7751_PCIMCR 0x1F4 /* Memory Control Register */ +#define SH7751_PCIBCR3 0x1f8 /* Memory BCR3 Register */ #define SH7751_PCIPCTR 0x200 /* Port Control Register */ #define SH7751_PCIPCTR_P2EN 0x000400000 /* Port 2 Enable */ #define SH7751_PCIPCTR_P1EN 0x000200000 /* Port 1 Enable */ @@ -256,6 +257,8 @@ /* Memory Control Registers */ #define SH7751_BCR1 0xFF800000 /* Memory BCR1 Register */ #define SH7751_BCR2 0xFF800004 /* Memory BCR2 Register */ +#define SH7751_BCR3 0xFF800050 /* Memory BCR3 Register */ +#define SH7751_BCR4 0xFE0A00F0 /* Memory BCR4 Register */ #define SH7751_WCR1 0xFF800008 /* Wait Control 1 Register */ #define SH7751_WCR2 0xFF80000C /* Wait Control 2 Register */ #define SH7751_WCR3 0xFF800010 /* Wait Control 3 Register */ @@ -274,6 +277,9 @@ /* General PCI values */ #define SH7751_PCI_HOST_BRIDGE 0x6 +/* Flags */ +#define SH7751_PCIC_NO_RESET 0x0001 + /* External functions defined per platform i.e. Big Sur, SE... (these could be routed * through the machine vectors... */ extern int pcibios_init_platform(void); @@ -287,6 +293,7 @@ struct sh7751_pci_address_space { struct sh7751_pci_address_map { struct sh7751_pci_address_space window0; struct sh7751_pci_address_space window1; + unsigned long flags; }; /* arch/sh/drivers/pci/pci-sh7751.c */ diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index fce69a2ecd15..4bf35336d824 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -25,7 +25,7 @@ static int __init pcibios_init(void) #ifdef CONFIG_PCI_AUTO /* assign resources */ - busno=0; + busno = 0; for (p = board_pci_channels; p->pci_ops != NULL; p++) { busno = pciauto_assign_resources(busno, p) + 1; } diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile index a7c247a30c5e..d36bd9410146 100644 --- a/arch/sh/kernel/Makefile +++ b/arch/sh/kernel/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o obj-$(CONFIG_MODULES) += module.o +obj-$(CONFIG_EARLY_PRINTK) += early_printk.o USE_STANDARD_AS_RULE := true diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index bf3a311c9f35..cd43714df61a 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile @@ -2,7 +2,7 @@ # Makefile for the Linux/SuperH CPU-specifc backends. # -obj-y := irq_ipr.o irq_imask.o init.o +obj-y := irq_ipr.o irq_imask.o init.o bus.o obj-$(CONFIG_CPU_SH2) += sh2/ obj-$(CONFIG_CPU_SH3) += sh3/ @@ -10,6 +10,7 @@ obj-$(CONFIG_CPU_SH4) += sh4/ obj-$(CONFIG_SH_RTC) += rtc.o obj-$(CONFIG_UBC_WAKEUP) += ubc.o +obj-$(CONFIG_SH_ADC) += adc.o USE_STANDARD_AS_RULE := true diff --git a/arch/sh/kernel/cpu/adc.c b/arch/sh/kernel/cpu/adc.c new file mode 100644 index 000000000000..da3d6877f93d --- /dev/null +++ b/arch/sh/kernel/cpu/adc.c @@ -0,0 +1,36 @@ +/* + * linux/arch/sh/kernel/adc.c -- SH3 on-chip ADC support + * + * Copyright (C) 2004 Andriy Skulysh <askulysh@image.kiev.ua> + */ + +#include <linux/module.h> +#include <asm/adc.h> +#include <asm/io.h> + + +int adc_single(unsigned int channel) +{ + int off; + unsigned char csr; + + if (channel >= 8) return -1; + + off = (channel & 0x03) << 2; + + csr = ctrl_inb(ADCSR); + csr = channel | ADCSR_ADST | ADCSR_CKS; + ctrl_outb(csr, ADCSR); + + do { + csr = ctrl_inb(ADCSR); + } while ((csr & ADCSR_ADF) == 0); + + csr &= ~(ADCSR_ADF | ADCSR_ADST); + ctrl_outb(csr, ADCSR); + + return (((ctrl_inb(ADDRAH + off) << 8) | + ctrl_inb(ADDRAL + off)) >> 6); +} + +EXPORT_SYMBOL(adc_single); diff --git a/arch/sh/kernel/cpu/bus.c b/arch/sh/kernel/cpu/bus.c new file mode 100644 index 000000000000..ace82f4b4a59 --- /dev/null +++ b/arch/sh/kernel/cpu/bus.c @@ -0,0 +1,195 @@ +/* + * arch/sh/kernel/cpu/bus.c + * + * Virtual bus for SuperH. + * + * Copyright (C) 2004 Paul Mundt + * + * Shamelessly cloned from arch/arm/mach-omap/bus.c, which was written + * by: + * + * Copyright (C) 2003 - 2004 Nokia Corporation + * Written by Tony Lindgren <tony@atomide.com> + * Portions of code based on sa1111.c. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include <linux/kernel.h> +#include <linux/device.h> +#include <linux/init.h> +#include <linux/module.h> +#include <asm/bus-sh.h> + +static int sh_bus_match(struct device *dev, struct device_driver *drv) +{ + struct sh_driver *shdrv = to_sh_driver(drv); + struct sh_dev *shdev = to_sh_dev(dev); + + return shdev->dev_id == shdrv->dev_id; +} + +static int sh_bus_suspend(struct device *dev, u32 state) +{ + struct sh_dev *shdev = to_sh_dev(dev); + struct sh_driver *shdrv = to_sh_driver(dev->driver); + + if (shdrv && shdrv->suspend) + return shdrv->suspend(shdev, state); + + return 0; +} + +static int sh_bus_resume(struct device *dev) +{ + struct sh_dev *shdev = to_sh_dev(dev); + struct sh_driver *shdrv = to_sh_driver(dev->driver); + + if (shdrv && shdrv->resume) + return shdrv->resume(shdev); + + return 0; +} + +static struct device sh_bus_devices[SH_NR_BUSES] = { + { + .bus_id = SH_BUS_NAME_VIRT, + }, +}; + +struct bus_type sh_bus_types[SH_NR_BUSES] = { + { + .name = SH_BUS_NAME_VIRT, + .match = sh_bus_match, + .suspend = sh_bus_suspend, + .resume = sh_bus_resume, + }, +}; + +static int sh_device_probe(struct device *dev) +{ + struct sh_dev *shdev = to_sh_dev(dev); + struct sh_driver *shdrv = to_sh_driver(dev->driver); + + if (shdrv && shdrv->probe) + return shdrv->probe(shdev); + + return -ENODEV; +} + +static int sh_device_remove(struct device *dev) +{ + struct sh_dev *shdev = to_sh_dev(dev); + struct sh_driver *shdrv = to_sh_driver(dev->driver); + + if (shdrv && shdrv->remove) + return shdrv->remove(shdev); + + return 0; +} + +int sh_device_register(struct sh_dev *dev) +{ + if (!dev) + return -EINVAL; + + if (dev->bus_id < 0 || dev->bus_id >= SH_NR_BUSES) { + printk(KERN_ERR "%s: bus_id invalid: %s bus: %d\n", + __FUNCTION__, dev->name, dev->bus_id); + return -EINVAL; + } + + dev->dev.parent = &sh_bus_devices[dev->bus_id]; + dev->dev.bus = &sh_bus_types[dev->bus_id]; + + /* This is needed for USB OHCI to work */ + if (dev->dma_mask) + dev->dev.dma_mask = dev->dma_mask; + + snprintf(dev->dev.bus_id, BUS_ID_SIZE, "%s%u", + dev->name, dev->dev_id); + + printk(KERN_INFO "Registering SH device '%s'. Parent at %s\n", + dev->dev.bus_id, dev->dev.parent->bus_id); + + return device_register(&dev->dev); +} + +void sh_device_unregister(struct sh_dev *dev) +{ + device_unregister(&dev->dev); +} + +int sh_driver_register(struct sh_driver *drv) +{ + if (!drv) + return -EINVAL; + + if (drv->bus_id < 0 || drv->bus_id >= SH_NR_BUSES) { + printk(KERN_ERR "%s: bus_id invalid: bus: %d device %d\n", + __FUNCTION__, drv->bus_id, drv->dev_id); + return -EINVAL; + } + + drv->drv.probe = sh_device_probe; + drv->drv.remove = sh_device_remove; + drv->drv.bus = &sh_bus_types[drv->bus_id]; + + return driver_register(&drv->drv); +} + +void sh_driver_unregister(struct sh_driver *drv) +{ + driver_unregister(&drv->drv); +} + +static int __init sh_bus_init(void) +{ + int i, ret = 0; + + for (i = 0; i < SH_NR_BUSES; i++) { + ret = device_register(&sh_bus_devices[i]); + if (ret != 0) { + printk(KERN_ERR "Unable to register bus device %s\n", + sh_bus_devices[i].bus_id); + continue; + } + + ret = bus_register(&sh_bus_types[i]); + if (ret != 0) { + printk(KERN_ERR "Unable to register bus %s\n", + sh_bus_types[i].name); + device_unregister(&sh_bus_devices[i]); + } + } + + printk(KERN_INFO "SH Virtual Bus initialized\n"); + + return ret; +} + +static void __exit sh_bus_exit(void) +{ + int i; + + for (i = 0; i < SH_NR_BUSES; i++) { + bus_unregister(&sh_bus_types[i]); + device_unregister(&sh_bus_devices[i]); + } +} + +module_init(sh_bus_init); +module_exit(sh_bus_exit); + +MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>"); +MODULE_DESCRIPTION("SH Virtual Bus"); +MODULE_LICENSE("GPL"); + +EXPORT_SYMBOL(sh_bus_types); +EXPORT_SYMBOL(sh_device_register); +EXPORT_SYMBOL(sh_device_unregister); +EXPORT_SYMBOL(sh_driver_register); +EXPORT_SYMBOL(sh_driver_unregister); + diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c index a81b3401f7fa..975103f34653 100644 --- a/arch/sh/kernel/cpu/init.c +++ b/arch/sh/kernel/cpu/init.c @@ -42,7 +42,7 @@ onchip_setup(dsp); */ static void __init cache_init(void) { - unsigned long ccr, flags = 0; + unsigned long ccr, flags; if (cpu_data->type == CPU_SH_NONE) panic("Unknown CPU"); @@ -54,42 +54,50 @@ static void __init cache_init(void) * If the cache is already enabled .. flush it. */ if (ccr & CCR_CACHE_ENABLE) { - unsigned long entries, i, j; + unsigned long ways, waysize, addrstart; - entries = cpu_data->dcache.sets; + waysize = cpu_data->dcache.sets; /* * If the OC is already in RAM mode, we only have * half of the entries to flush.. */ if (ccr & CCR_CACHE_ORA) - entries >>= 1; + waysize >>= 1; - for (i = 0; i < entries; i++) { - for (j = 0; j < cpu_data->dcache.ways; j++) { - unsigned long data, addr; + waysize <<= cpu_data->dcache.entry_shift; - addr = CACHE_OC_ADDRESS_ARRAY | - (j << cpu_data->dcache.way_shift) | - (i << cpu_data->dcache.entry_shift); +#ifdef CCR_CACHE_EMODE + /* If EMODE is not set, we only have 1 way to flush. */ + if (!(ccr & CCR_CACHE_EMODE)) + ways = 1; + else +#endif + ways = cpu_data->dcache.ways; - data = ctrl_inl(addr); + addrstart = CACHE_OC_ADDRESS_ARRAY; + do { + unsigned long addr; - if ((data & (SH_CACHE_UPDATED | SH_CACHE_VALID)) - == (SH_CACHE_UPDATED | SH_CACHE_VALID)) - ctrl_outl(data & ~SH_CACHE_UPDATED, addr); - } - } + for (addr = addrstart; + addr < addrstart + waysize; + addr += cpu_data->dcache.linesz) + ctrl_outl(0, addr); + + addrstart += cpu_data->dcache.way_incr; + } while (--ways); } /* * Default CCR values .. enable the caches - * and flush them immediately.. + * and invalidate them immediately.. */ - flags |= CCR_CACHE_ENABLE | CCR_CACHE_INVALIDATE; - + flags = CCR_CACHE_ENABLE | CCR_CACHE_INVALIDATE; + #ifdef CCR_CACHE_EMODE - flags |= (ccr & CCR_CACHE_EMODE); + /* Force EMODE if possible */ + if (cpu_data->dcache.ways > 1) + flags |= CCR_CACHE_EMODE; #endif #ifdef CONFIG_SH_WRITETHROUGH @@ -145,8 +153,8 @@ static void __init dsp_init(void) /* If the DSP bit is still set, this CPU has a DSP */ if (sr & SR_DSP) - set_bit(CPU_HAS_DSP, &(cpu_data->flags)); - + cpu_data->flags |= CPU_HAS_DSP; + /* Now that we've determined the DSP status, clear the DSP bit. */ release_dsp(); } @@ -184,7 +192,7 @@ asmlinkage void __init sh_cpu_init(void) } /* FPU initialization */ - if (test_bit(CPU_HAS_FPU, &(cpu_data->flags))) { + if ((cpu_data->flags & CPU_HAS_FPU)) { clear_thread_flag(TIF_USEDFPU); current->used_math = 0; } diff --git a/arch/sh/kernel/cpu/irq_ipr.c b/arch/sh/kernel/cpu/irq_ipr.c index c66d6227965a..daae02e6b56d 100644 --- a/arch/sh/kernel/cpu/irq_ipr.c +++ b/arch/sh/kernel/cpu/irq_ipr.c @@ -4,12 +4,13 @@ * * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi * Copyright (C) 2000 Kazumoto Kojima + * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> * * Interrupt handling for IPR-based IRQ. * * Supported system: * On-chip supporting modules (TMU, RTC, etc.). - * On-chip supporting modules for SH7709/SH7709A/SH7729. + * On-chip supporting modules for SH7709/SH7709A/SH7729/SH7300. * Hitachi SolutionEngine external I/O: * MS7709SE01, MS7709ASE01, and MS7750SE01 * @@ -88,7 +89,8 @@ static void mask_and_ack_ipr(unsigned int irq) { disable_ipr_irq(irq); -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) /* This is needed when we use edge triggered setting */ /* XXX: Is it really needed? */ if (IRQ0_IRQ <= irq && irq <= IRQ5_IRQ) { @@ -117,7 +119,9 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority) disable_ipr_irq(irq); } -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) static unsigned char pint_map[256]; static unsigned long portcr_mask = 0; @@ -131,7 +135,7 @@ static void mask_and_ack_pint(unsigned int); static void end_pint_irq(unsigned int irq); static unsigned int startup_pint_irq(unsigned int irq) -{ +{ enable_pint_irq(irq); return 0; /* never anything pending */ } @@ -191,13 +195,17 @@ void make_pint_irq(unsigned int irq) void __init init_IRQ(void) { -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) int i; #endif make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY); make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY); +#if defined(CONFIG_SH_RTC) make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY); +#endif #ifdef SCI_ERI_IRQ make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY); @@ -212,6 +220,13 @@ void __init init_IRQ(void) make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY); #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7300) + make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY); + make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); + make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY); + make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY); +#endif + #ifdef SCIF_ERI_IRQ make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY); @@ -226,11 +241,12 @@ void __init init_IRQ(void) make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY); #endif -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) /* * Initialize the Interrupt Controller (INTC) * registers to their power on values - */ + */ /* * Enable external irq (INTC IRQ mode). @@ -243,6 +259,7 @@ void __init init_IRQ(void) make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY); make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY); make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY); +#if !defined(CONFIG_CPU_SUBTYPE_SH7300) make_ipr_irq(PINT0_IRQ, PINT0_IPR_ADDR, PINT0_IPR_POS, PINT0_PRIORITY); make_ipr_irq(PINT8_IRQ, PINT8_IPR_ADDR, PINT8_IPR_POS, PINT8_PRIORITY); enable_ipr_irq(PINT0_IRQ); @@ -261,16 +278,19 @@ void __init init_IRQ(void) else if(i & 0x40) pint_map[i] = 6; else if(i & 0x80) pint_map[i] = 7; } -#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 */ +#endif /* !CONFIG_CPU_SUBTYPE_SH7300 */ +#endif /* CONFIG_CPU_SUBTYPE_SH7707 || CONFIG_CPU_SUBTYPE_SH7709 || CONFIG_CPU_SUBTYPE_SH7300*/ /* Perform the machine specific initialisation */ if (sh_mv.mv_init_irq != NULL) { sh_mv.mv_init_irq(); } } -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) int ipr_irq_demux(int irq) { +#if !defined(CONFIG_CPU_SUBTYPE_SH7300) unsigned long creg, dreg, d, sav; if(irq == PINT0_IRQ) @@ -305,6 +325,7 @@ int ipr_irq_demux(int irq) if(d == 0) return irq; return PINT_IRQ_BASE + 8 + pint_map[d]; } +#endif return irq; } #endif diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index 78df0d1bf060..966c0858b714 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S @@ -85,7 +85,8 @@ ENTRY(interrupt_table) .long do_IRQ ! rovi .long do_IRQ .long do_IRQ /* 5E0 */ -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) .long do_IRQ ! 32 IRQ irq0 /* 600 */ .long do_IRQ ! 33 irq1 .long do_IRQ ! 34 irq2 @@ -115,10 +116,84 @@ ENTRY(interrupt_table) .long do_IRQ ! 58 bri2 .long do_IRQ ! 59 txi2 .long do_IRQ ! 60 ADC adi /* 980 */ -#if defined(CONFIG_CPU_SUBTYPE_SH7707) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) + .long exception_none ! 61 /* 9A0 */ + .long exception_none ! 62 + .long exception_none ! 63 + .long exception_none ! 64 /* A00 */ + .long do_IRQ ! 65 USB usi0 + .long do_IRQ ! 66 usi1 + .long exception_none ! 67 + .long exception_none ! 68 + .long exception_none ! 69 + .long exception_none ! 70 + .long exception_none ! 71 + .long exception_none ! 72 /* B00 */ + .long exception_none ! 73 + .long exception_none ! 74 + .long exception_none ! 75 + .long exception_none ! 76 + .long exception_none ! 77 + .long exception_none ! 78 + .long exception_none ! 79 + .long do_IRQ ! 80 TPU0 tpi0 /* C00 */ + .long do_IRQ ! 81 TPU1 tpi1 + .long exception_none ! 82 + .long exception_none ! 83 + .long do_IRQ ! 84 TPU2 tpi2 + .long do_IRQ ! 85 TPU3 tpi3 /* CA0 */ +#endif +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7300) .long do_IRQ ! 61 LCDC lcdi /* 9A0 */ .long do_IRQ ! 62 PCC pcc0i .long do_IRQ ! 63 pcc1i /* 9E0 */ #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7300) + .long do_IRQ ! 64 + .long do_IRQ ! 65 + .long do_IRQ ! 66 + .long do_IRQ ! 67 + .long do_IRQ ! 68 + .long do_IRQ ! 69 + .long do_IRQ ! 70 + .long do_IRQ ! 71 + .long do_IRQ ! 72 + .long do_IRQ ! 73 + .long do_IRQ ! 74 + .long do_IRQ ! 75 + .long do_IRQ ! 76 + .long do_IRQ ! 77 + .long do_IRQ ! 78 + .long do_IRQ ! 79 + .long do_IRQ ! 80 SCIF0(SH7300) + .long do_IRQ ! 81 + .long do_IRQ ! 82 + .long do_IRQ ! 83 + .long do_IRQ ! 84 + .long do_IRQ ! 85 + .long do_IRQ ! 86 + .long do_IRQ ! 87 + .long do_IRQ ! 88 + .long do_IRQ ! 89 + .long do_IRQ ! 90 + .long do_IRQ ! 91 + .long do_IRQ ! 92 + .long do_IRQ ! 93 + .long do_IRQ ! 94 + .long do_IRQ ! 95 + .long do_IRQ ! 96 + .long do_IRQ ! 97 + .long do_IRQ ! 98 + .long do_IRQ ! 99 + .long do_IRQ ! 100 + .long do_IRQ ! 101 + .long do_IRQ ! 102 + .long do_IRQ ! 103 + .long do_IRQ ! 104 + .long do_IRQ ! 105 + .long do_IRQ ! 106 + .long do_IRQ ! 107 + .long do_IRQ ! 108 +#endif #endif diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c new file mode 100644 index 000000000000..8c2769c0d9ff --- /dev/null +++ b/arch/sh/kernel/early_printk.c @@ -0,0 +1,135 @@ +/* + * arch/sh/kernel/early_printk.c + * + * Copyright (C) 1999, 2000 Niibe Yutaka + * Copyright (C) 2002 M. R. Brown + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/console.h> +#include <linux/tty.h> +#include <linux/init.h> +#include <asm/io.h> + +#ifdef CONFIG_SH_STANDARD_BIOS +#include <asm/sh_bios.h> + +/* + * Print a string through the BIOS + */ +static void sh_console_write(struct console *co, const char *s, + unsigned count) +{ + sh_bios_console_write(s, count); +} + +/* + * Setup initial baud/bits/parity. We do two things here: + * - construct a cflag setting for the first rs_open() + * - initialize the serial port + * Return non-zero if we didn't find a serial port. + */ +static int __init sh_console_setup(struct console *co, char *options) +{ + int cflag = CREAD | HUPCL | CLOCAL; + + /* + * Now construct a cflag setting. + * TODO: this is a totally bogus cflag, as we have + * no idea what serial settings the BIOS is using, or + * even if its using the serial port at all. + */ + cflag |= B115200 | CS8 | /*no parity*/0; + + co->cflag = cflag; + + return 0; +} + +static struct console early_console = { + .name = "bios", + .write = sh_console_write, + .setup = sh_console_setup, + .flags = CON_PRINTBUFFER, + .index = -1, +}; +#endif + +#ifdef CONFIG_EARLY_SCIF_CONSOLE +#define SCIF_REG 0xffe80000 + +static void scif_sercon_putc(int c) +{ + while (!(ctrl_inw(SCIF_REG + 0x10) & 0x20)) ; + + ctrl_outb(c, SCIF_REG + 12); + ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0x9f), SCIF_REG + 0x10); + + if (c == '\n') + scif_sercon_putc('\r'); +} + +static void scif_sercon_flush(void) +{ + ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10); + + while (!(ctrl_inw(SCIF_REG + 0x10) & 0x40)) ; + + ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10); +} + +static void scif_sercon_write(struct console *con, const char *s, unsigned count) +{ + while (count-- > 0) + scif_sercon_putc(*s++); + + scif_sercon_flush(); +} + +static int __init scif_sercon_setup(struct console *con, char *options) +{ + con->cflag = CREAD | HUPCL | CLOCAL | B115200 | CS8; + + return 0; +} + +static struct console early_console = { + .name = "sercon", + .write = scif_sercon_write, + .setup = scif_sercon_setup, + .flags = CON_PRINTBUFFER, + .index = -1, +}; + +void scif_sercon_init(int baud) +{ + ctrl_outw(0, SCIF_REG + 8); + ctrl_outw(0, SCIF_REG); + + /* Set baud rate */ + ctrl_outb((50000000 / (32 * baud)) - 1, SCIF_REG + 4); + + ctrl_outw(12, SCIF_REG + 24); + ctrl_outw(8, SCIF_REG + 24); + ctrl_outw(0, SCIF_REG + 32); + ctrl_outw(0x60, SCIF_REG + 16); + ctrl_outw(0, SCIF_REG + 36); + ctrl_outw(0x30, SCIF_REG + 8); +} +#endif + +void __init enable_early_printk(void) +{ +#ifdef CONFIG_EARLY_SCIF_CONSOLE + scif_sercon_init(115200); +#endif + register_console(&early_console); +} + +void disable_early_printk(void) +{ + unregister_console(&early_console); +} + diff --git a/arch/sh/kernel/entry.S b/arch/sh/kernel/entry.S index dbc33d72656c..05dcc2e01fc1 100644 --- a/arch/sh/kernel/entry.S +++ b/arch/sh/kernel/entry.S @@ -1,4 +1,4 @@ -/* $Id: entry.S,v 1.35 2004/02/21 14:45:47 lethal Exp $ +/* $Id: entry.S,v 1.37 2004/06/11 13:02:46 doyu Exp $ * * linux/arch/sh/entry.S * @@ -77,7 +77,8 @@ EINVAL = 22 #if defined(CONFIG_CPU_SH3) TRA = 0xffffffd0 EXPEVT = 0xffffffd4 -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7705) INTEVT = 0xa4000000 ! INTEVTE2(0xa4000000) #else INTEVT = 0xffffffd8 @@ -1129,6 +1130,14 @@ ENTRY(sys_call_table) .long sys_utimes .long sys_fadvise64_64_wrapper .long sys_ni_syscall /* Reserved for vserver */ - .long sys_ni_syscall + .long sys_ni_syscall /* Reserved for mbind */ + .long sys_ni_syscall /* 275 - get_mempolicy */ + .long sys_ni_syscall /* set_mempolicy */ + .long sys_mq_open + .long sys_mq_unlink + .long sys_mq_timedsend + .long sys_mq_timedreceive /* 280 */ + .long sys_mq_notify + .long sys_mq_getsetattr /* End of entry.S */ diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c index e920a5954788..a911b0149d1f 100644 --- a/arch/sh/kernel/io_generic.c +++ b/arch/sh/kernel/io_generic.c @@ -1,4 +1,4 @@ -/* $Id: io_generic.c,v 1.1.1.1.4.2.2.1 2003/01/10 17:26:56 lethal Exp $ +/* $Id: io_generic.c,v 1.2 2003/05/04 19:29:53 lethal Exp $ * * linux/arch/sh/kernel/io_generic.c * @@ -71,16 +71,32 @@ unsigned int generic_inl_p(unsigned long port) return v; } +/* + * insb/w/l all read a series of bytes/words/longs from a fixed port + * address. However as the port address doesn't change we only need to + * convert the port address to real address once. + */ + void generic_insb(unsigned long port, void *buffer, unsigned long count) { + volatile unsigned char *port_addr; unsigned char *buf=buffer; - while(count--) *buf++=inb(port); + + port_addr = (volatile unsigned char *)PORT2ADDR(port); + + while(count--) + *buf++ = *port_addr; } void generic_insw(unsigned long port, void *buffer, unsigned long count) { + volatile unsigned short *port_addr; unsigned short *buf=buffer; - while(count--) *buf++=inw(port); + + port_addr = (volatile unsigned short *)PORT2ADDR(port); + + while(count--) + *buf++ = *port_addr; #ifdef SH3_PCMCIA_BUG_WORKAROUND ctrl_inb (DUMMY_READ_AREA6); #endif @@ -88,8 +104,13 @@ void generic_insw(unsigned long port, void *buffer, unsigned long count) void generic_insl(unsigned long port, void *buffer, unsigned long count) { + volatile unsigned long *port_addr; unsigned long *buf=buffer; - while(count--) *buf++=inl(port); + + port_addr = (volatile unsigned long *)PORT2ADDR(port); + + while(count--) + *buf++ = *port_addr; #ifdef SH3_PCMCIA_BUG_WORKAROUND ctrl_inb (DUMMY_READ_AREA6); #endif @@ -128,16 +149,33 @@ void generic_outl_p(unsigned int b, unsigned long port) delay(); } +/* + * outsb/w/l all write a series of bytes/words/longs to a fixed port + * address. However as the port address doesn't change we only need to + * convert the port address to real address once. + */ + void generic_outsb(unsigned long port, const void *buffer, unsigned long count) { + volatile unsigned char *port_addr; const unsigned char *buf=buffer; - while(count--) outb(*buf++, port); + + port_addr = (volatile unsigned char *)PORT2ADDR(port); + + while(count--) + *port_addr = *buf++; } void generic_outsw(unsigned long port, const void *buffer, unsigned long count) { + volatile unsigned short *port_addr; const unsigned short *buf=buffer; - while(count--) outw(*buf++, port); + + port_addr = (volatile unsigned short *)PORT2ADDR(port); + + while(count--) + *port_addr = *buf++; + #ifdef SH3_PCMCIA_BUG_WORKAROUND ctrl_inb (DUMMY_READ_AREA6); #endif @@ -145,8 +183,14 @@ void generic_outsw(unsigned long port, const void *buffer, unsigned long count) void generic_outsl(unsigned long port, const void *buffer, unsigned long count) { + volatile unsigned long *port_addr; const unsigned long *buf=buffer; - while(count--) outl(*buf++, port); + + port_addr = (volatile unsigned long *)PORT2ADDR(port); + + while(count--) + *port_addr = *buf++; + #ifdef SH3_PCMCIA_BUG_WORKAROUND ctrl_inb (DUMMY_READ_AREA6); #endif diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index a37e2d1cffce..d78503dd22da 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c @@ -436,7 +436,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; @@ -575,6 +575,49 @@ unsigned long probe_irq_on(void) EXPORT_SYMBOL(probe_irq_on); +/* Return a mask of triggered interrupts (this + * can handle only legacy ISA interrupts). + */ + +/* + * probe_irq_mask - scan a bitmap of interrupt lines + * @val: mask of interrupts to consider + * + * Scan the ISA bus interrupt lines and return a bitmap of + * active interrupts. The interrupt probe logic state is then + * returned to its previous value. + * + * Note: we need to scan all the irq's even though we will + * only return ISA irq numbers - just so that we reset them + * all to a known state. + */ +unsigned int probe_irq_mask(unsigned long val) +{ + int i; + unsigned int mask; + + mask = 0; + for (i = 0; i < NR_IRQS; i++) { + irq_desc_t *desc = irq_desc + i; + unsigned int status; + + spin_lock_irq(&desc->lock); + status = desc->status; + + if (status & IRQ_AUTODETECT) { + if (i < 16 && !(status & IRQ_WAITING)) + mask |= 1 << i; + + desc->status = status & ~IRQ_AUTODETECT; + desc->handler->shutdown(i); + } + spin_unlock_irq(&desc->lock); + } + up(&probe_sem); + + return mask & val; +} + int probe_irq_off(unsigned long val) { int i, irq_found, nr_irqs; diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index 6b4cb096b11c..8ba6dd300957 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -1,4 +1,4 @@ -/* $Id: process.c,v 1.26 2004/02/06 14:14:14 kkojima Exp $ +/* $Id: process.c,v 1.28 2004/05/05 16:54:23 lethal Exp $ * * linux/arch/sh/kernel/process.c * @@ -25,6 +25,11 @@ #include <asm/uaccess.h> #include <asm/mmu_context.h> #include <asm/elf.h> +#if defined(CONFIG_SH_HS7751RVOIP) +#include <asm/hs7751rvoip/hs7751rvoip.h> +#elif defined(CONFIG_SH_RTS7751R2D) +#include <asm/rts7751r2d/rts7751r2d.h> +#endif static int hlt_counter=0; @@ -50,8 +55,14 @@ void default_idle(void) { /* endless idle loop with no priority at all */ while (1) { - while (!need_resched()) - cpu_relax(); + if (hlt_counter) { + while (1) + if (need_resched()) + break; + } else { + while (!need_resched()) + cpu_sleep(); + } schedule(); } @@ -73,14 +84,30 @@ EXPORT_SYMBOL(machine_restart); void machine_halt(void) { +#if defined(CONFIG_SH_HS7751RVOIP) + unsigned short value; + + value = ctrl_inw(PA_OUTPORTR); + ctrl_outw((value & 0xffdf), PA_OUTPORTR); +#elif defined(CONFIG_SH_RTS7751R2D) + ctrl_outw(0x0001, PA_POWOFF); +#endif while (1) - cpu_relax(); + cpu_sleep(); } EXPORT_SYMBOL(machine_halt); void machine_power_off(void) { +#if defined(CONFIG_SH_HS7751RVOIP) + unsigned short value; + + value = ctrl_inw(PA_OUTPORTR); + ctrl_outw((value & 0xffdf), PA_OUTPORTR); +#elif defined(CONFIG_SH_RTS7751R2D) + ctrl_outw(0x0001, PA_POWOFF); +#endif } EXPORT_SYMBOL(machine_power_off); diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace.c index 602f6c570be6..017826912cc5 100644 --- a/arch/sh/kernel/ptrace.c +++ b/arch/sh/kernel/ptrace.c @@ -1,4 +1,4 @@ -/* $Id: ptrace.c,v 1.14 2003/11/28 23:05:43 kkojima Exp $ +/* $Id: ptrace.c,v 1.15 2004/05/07 05:32:05 sugioka Exp $ * * linux/arch/sh/kernel/ptrace.c * @@ -255,13 +255,6 @@ asmlinkage int sys_ptrace(long request, long pid, long addr, long data) ret = ptrace_detach(child, data); break; - case PTRACE_SETOPTIONS: - if (data & PTRACE_O_TRACESYSGOOD) - child->ptrace |= PT_TRACESYSGOOD; - else - child->ptrace &= ~PT_TRACESYSGOOD; - ret = 0; - break; #ifdef CONFIG_SH_DSP case PTRACE_GETDSPREGS: { unsigned long dp; diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 574ac24f8e51..7746f7c5e714 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -25,15 +25,12 @@ #include <asm/io_generic.h> #include <asm/sections.h> #include <asm/irq.h> -#ifdef CONFIG_SH_EARLY_PRINTK -#include <asm/sh_bios.h> -#endif #ifdef CONFIG_SH_KGDB #include <asm/kgdb.h> static int kgdb_parse_options(char *options); #endif - +extern void * __rd_start, * __rd_end; /* * Machine setup.. */ @@ -85,14 +82,12 @@ static struct sh_machine_vector* __init get_mv_byname(const char* name); #define INITRD_SIZE (*(unsigned long *) (PARAM+0x014)) /* ... */ #define COMMAND_LINE ((char *) (PARAM+0x100)) -#define COMMAND_LINE_SIZE 256 #define RAMDISK_IMAGE_START_MASK 0x07FF #define RAMDISK_PROMPT_FLAG 0x8000 #define RAMDISK_LOAD_FLAG 0x4000 static char command_line[COMMAND_LINE_SIZE] = { 0, }; - char saved_command_line[COMMAND_LINE_SIZE]; struct resource standard_io_resources[] = { { "dma1", 0x00, 0x1f }, @@ -120,130 +115,6 @@ static struct resource ram_resources[] = { unsigned long memory_start, memory_end; -/* XXX: MRB-remove - blatant hack */ -#if 1 -#define SCIF_REG 0xffe80000 - -static void scif_sercon_putc(int c) -{ - while (!(ctrl_inw(SCIF_REG + 0x10) & 0x20)) ; - - ctrl_outb(c, SCIF_REG + 12); - ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0x9f), SCIF_REG + 0x10); - - if (c == '\n') - scif_sercon_putc('\r'); -} - -static void scif_sercon_flush(void) -{ - ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10); - - while (!(ctrl_inw(SCIF_REG + 0x10) & 0x40)) ; - - ctrl_outw((ctrl_inw(SCIF_REG + 0x10) & 0xbf), SCIF_REG + 0x10); -} - -static void scif_sercon_write(struct console *con, const char *s, unsigned count) -{ - while (count-- > 0) - scif_sercon_putc(*s++); - - scif_sercon_flush(); -} - -static int __init scif_sercon_setup(struct console *con, char *options) -{ - con->cflag = CREAD | HUPCL | CLOCAL | B57600 | CS8; - - return 0; -} - -static struct console scif_sercon = { - .name = "sercon", - .write = scif_sercon_write, - .setup = scif_sercon_setup, - .flags = CON_PRINTBUFFER, - .index = -1, -}; - -void scif_sercon_init(int baud) -{ - ctrl_outw(0, SCIF_REG + 8); - ctrl_outw(0, SCIF_REG); - - /* Set baud rate */ - ctrl_outb((50000000 / (32 * baud)) - 1, SCIF_REG + 4); - - ctrl_outw(12, SCIF_REG + 24); - ctrl_outw(8, SCIF_REG + 24); - ctrl_outw(0, SCIF_REG + 32); - ctrl_outw(0x60, SCIF_REG + 16); - ctrl_outw(0, SCIF_REG + 36); - ctrl_outw(0x30, SCIF_REG + 8); - - register_console(&scif_sercon); -} - -void scif_sercon_unregister(void) -{ - unregister_console(&scif_sercon); -} -#endif - -#ifdef CONFIG_SH_EARLY_PRINTK -/* - * Print a string through the BIOS - */ -static void sh_console_write(struct console *co, const char *s, - unsigned count) -{ - sh_bios_console_write(s, count); -} - -/* - * Setup initial baud/bits/parity. We do two things here: - * - construct a cflag setting for the first rs_open() - * - initialize the serial port - * Return non-zero if we didn't find a serial port. - */ -static int __init sh_console_setup(struct console *co, char *options) -{ - int cflag = CREAD | HUPCL | CLOCAL; - - /* - * Now construct a cflag setting. - * TODO: this is a totally bogus cflag, as we have - * no idea what serial settings the BIOS is using, or - * even if its using the serial port at all. - */ - cflag |= B115200 | CS8 | /*no parity*/0; - - co->cflag = cflag; - - return 0; -} - -static struct console sh_console = { - .name = "bios", - .write = sh_console_write, - .setup = sh_console_setup, - .flags = CON_PRINTBUFFER, - .index = -1, -}; - -void sh_console_init(void) -{ - register_console(&sh_console); -} - -void sh_console_unregister(void) -{ - unregister_console(&sh_console); -} - -#endif - static inline void parse_cmdline (char ** cmdline_p, char mv_name[MV_NAME_SIZE], struct sh_machine_vector** mvp, unsigned long *mv_io_base, @@ -325,10 +196,6 @@ static int __init sh_mv_setup(char **cmdline_p) parse_cmdline(cmdline_p, mv_name, &mv, &mv_io_base, &mv_mmio_enable); -#ifdef CONFIG_CMDLINE_BOOL - sprintf(*cmdline_p, CONFIG_CMDLINE); -#endif - #ifdef CONFIG_SH_GENERIC if (mv == NULL) { mv = &mv_unknown; @@ -382,14 +249,15 @@ void __init setup_arch(char **cmdline_p) unsigned long bootmap_size; unsigned long start_pfn, max_pfn, max_low_pfn; -/* XXX: MRB-remove */ -#if 0 - scif_sercon_init(57600); +#ifdef CONFIG_EARLY_PRINTK + extern void enable_early_printk(void); + + enable_early_printk(); #endif -#ifdef CONFIG_SH_EARLY_PRINTK - sh_console_init(); +#ifdef CONFIG_CMDLINE_BOOL + strcpy(COMMAND_LINE, CONFIG_CMDLINE); #endif - + ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); #ifdef CONFIG_BLK_DEV_RAM @@ -492,6 +360,13 @@ void __init setup_arch(char **cmdline_p) reserve_bootmem_node(NODE_DATA(0), __MEMORY_START, PAGE_SIZE); #ifdef CONFIG_BLK_DEV_INITRD + ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); + if (&__rd_start != &__rd_end) { + LOADER_TYPE = 1; + INITRD_START = PHYSADDR((unsigned long)&__rd_start) - __MEMORY_START; + INITRD_SIZE = (unsigned long)&__rd_end - (unsigned long)&__rd_start; + } + if (LOADER_TYPE && INITRD_START) { if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) { reserve_bootmem_node(NODE_DATA(0), INITRD_START+__MEMORY_START, INITRD_SIZE); @@ -557,8 +432,10 @@ subsys_initcall(topology_init); static const char *cpu_name[] = { [CPU_SH7604] = "SH7604", + [CPU_SH7705] = "SH7705", [CPU_SH7708] = "SH7708", [CPU_SH7729] = "SH7729", + [CPU_SH7300] = "SH7300", [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", @@ -595,8 +472,8 @@ static void show_cpuflags(struct seq_file *m) for (i = 0; i < cpu_data->flags; i++) if ((cpu_data->flags & (1 << i))) - seq_printf(m, " %s", cpu_flags[i]); - + seq_printf(m, " %s", cpu_flags[i+1]); + seq_printf(m, "\n"); } diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms.c index abe649077f7b..42868fca481a 100644 --- a/arch/sh/kernel/sh_ksyms.c +++ b/arch/sh/kernel/sh_ksyms.c @@ -33,6 +33,7 @@ EXPORT_SYMBOL(dump_fpu); EXPORT_SYMBOL(iounmap); EXPORT_SYMBOL(enable_irq); EXPORT_SYMBOL(disable_irq); +EXPORT_SYMBOL(probe_irq_mask); EXPORT_SYMBOL(kernel_thread); EXPORT_SYMBOL(disable_irq_nosync); EXPORT_SYMBOL(irq_desc); @@ -83,6 +84,7 @@ EXPORT_SYMBOL(__down); EXPORT_SYMBOL(__down_interruptible); EXPORT_SYMBOL(__udelay); +EXPORT_SYMBOL(__ndelay); EXPORT_SYMBOL(__const_udelay); #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL_NOVERS(name) @@ -100,6 +102,7 @@ DECLARE_EXPORT(__movstr); DECLARE_EXPORT(__movstr_i4_even); DECLARE_EXPORT(__movstr_i4_odd); +DECLARE_EXPORT(__movstrSI12_i4); /* needed by some modules */ EXPORT_SYMBOL(flush_cache_all); @@ -115,3 +118,4 @@ EXPORT_SYMBOL(synchronize_irq); #endif EXPORT_SYMBOL(csum_partial); +EXPORT_SYMBOL(consistent_sync); diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index cd91a59a9fff..3bcdf4ca405d 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c @@ -1,10 +1,10 @@ -/* $Id: time.c,v 1.19 2004/02/27 00:40:48 lethal Exp $ +/* $Id: time.c,v 1.21 2004/04/21 00:09:15 lethal Exp $ * * linux/arch/sh/kernel/time.c * * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> - * Copyright (C) 2002, 2003 Paul Mundt + * Copyright (C) 2002, 2003, 2004 Paul Mundt * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org> * * Some code taken from i386 version. @@ -47,12 +47,26 @@ #define TMU0_TCR_CALIB 0x0000 #if defined(CONFIG_CPU_SH3) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +#define TMU_TSTR 0xA412FE92 /* Byte access */ + +#define TMU0_TCOR 0xA412FE94 /* Long access */ +#define TMU0_TCNT 0xA412FE98 /* Long access */ +#define TMU0_TCR 0xA412FE9C /* Word access */ + +#define TMU1_TCOR 0xA412FEA0 /* Long access */ +#define TMU1_TCNT 0xA412FEA4 /* Long access */ +#define TMU1_TCR 0xA412FEA8 /* Word access */ + +#define FRQCR 0xA415FF80 +#else #define TMU_TOCR 0xfffffe90 /* Byte access */ #define TMU_TSTR 0xfffffe92 /* Byte access */ #define TMU0_TCOR 0xfffffe94 /* Long access */ #define TMU0_TCNT 0xfffffe98 /* Long access */ #define TMU0_TCR 0xfffffe9c /* Word access */ +#endif #elif defined(CONFIG_CPU_SH4) #define TMU_TOCR 0xffd80000 /* Byte access */ #define TMU_TSTR 0xffd80004 /* Byte access */ @@ -85,6 +99,9 @@ void (*rtc_get_time)(struct timespec *) = 0; int (*rtc_set_time)(const time_t) = 0; #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 }; +#endif #if defined(CONFIG_CPU_SH3) static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 }; static int stc_values[] = { 0, 1, 4, 2, 5, 0, 0, 0 }; @@ -337,7 +354,9 @@ static unsigned int __init get_timer_frequency(void) * have it count down at its natural rate. */ ctrl_outb(0, TMU_TSTR); +#if !defined(CONFIG_CPU_SUBTYPE_SH7300) ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); +#endif ctrl_outw(TMU0_TCR_CALIB, TMU0_TCR); ctrl_outl(0xffffffff, TMU0_TCOR); ctrl_outl(0xffffffff, TMU0_TCNT); @@ -391,13 +410,22 @@ static int __init sh_pclk_setup(char *str) } __setup("sh_pclk=", sh_pclk_setup); -static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; +static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL}; void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsigned int *pfc) { unsigned int frqcr = ctrl_inw(FRQCR); #if defined(CONFIG_CPU_SH3) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) + *ifc = md_table[((frqcr & 0x0070) >> 4)]; + *bfc = md_table[((frqcr & 0x0700) >> 8)]; + *pfc = md_table[frqcr & 0x0007]; +#elif defined(CONFIG_CPU_SUBTYPE_SH7705) + *bfc = stc_multipliers[(frqcr & 0x0300) >> 8]; + *ifc = ifc_divisors[(frqcr & 0x0030) >> 4]; + *pfc = pfc_divisors[frqcr & 0x0003]; +#else unsigned int tmp; tmp = (frqcr & 0x8000) >> 13; @@ -409,6 +437,7 @@ void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsign tmp = (frqcr & 0x2000) >> 11; tmp |= frqcr & 0x0003; *pfc = pfc_divisors[tmp]; +#endif #elif defined(CONFIG_CPU_SH4) *ifc = ifc_divisors[(frqcr >> 6) & 0x0007]; *bfc = bfc_divisors[(frqcr >> 3) & 0x0007]; @@ -431,26 +460,139 @@ _FREQ_TABLE(ifc); _FREQ_TABLE(bfc); _FREQ_TABLE(pfc); +#ifdef CONFIG_CPU_SUBTYPE_ST40STB1 + +/* The ST40 divisors are totally different so we set the cpu data +** clocks using a different algorithm +** +** I've just plugged this from the 2.4 code - Alex Bennee <kernel-hacker@bennee.com> +*/ +#define CCN_PVR_CHIP_SHIFT 24 +#define CCN_PVR_CHIP_MASK 0xff +#define CCN_PVR_CHIP_ST40STB1 0x4 + + +struct frqcr_data { + unsigned short frqcr; + struct { + unsigned char multiplier; + unsigned char divisor; + } factor[3]; +}; + +static struct frqcr_data st40_frqcr_table[] = { + { 0x000, {{1,1}, {1,1}, {1,2}}}, + { 0x002, {{1,1}, {1,1}, {1,4}}}, + { 0x004, {{1,1}, {1,1}, {1,8}}}, + { 0x008, {{1,1}, {1,2}, {1,2}}}, + { 0x00A, {{1,1}, {1,2}, {1,4}}}, + { 0x00C, {{1,1}, {1,2}, {1,8}}}, + { 0x011, {{1,1}, {2,3}, {1,6}}}, + { 0x013, {{1,1}, {2,3}, {1,3}}}, + { 0x01A, {{1,1}, {1,2}, {1,4}}}, + { 0x01C, {{1,1}, {1,2}, {1,8}}}, + { 0x023, {{1,1}, {2,3}, {1,3}}}, + { 0x02C, {{1,1}, {1,2}, {1,8}}}, + { 0x048, {{1,2}, {1,2}, {1,4}}}, + { 0x04A, {{1,2}, {1,2}, {1,6}}}, + { 0x04C, {{1,2}, {1,2}, {1,8}}}, + { 0x05A, {{1,2}, {1,3}, {1,6}}}, + { 0x05C, {{1,2}, {1,3}, {1,6}}}, + { 0x063, {{1,2}, {1,4}, {1,4}}}, + { 0x06C, {{1,2}, {1,4}, {1,8}}}, + { 0x091, {{1,3}, {1,3}, {1,6}}}, + { 0x093, {{1,3}, {1,3}, {1,6}}}, + { 0x0A3, {{1,3}, {1,6}, {1,6}}}, + { 0x0DA, {{1,4}, {1,4}, {1,8}}}, + { 0x0DC, {{1,4}, {1,4}, {1,8}}}, + { 0x0EC, {{1,4}, {1,8}, {1,8}}}, + { 0x123, {{1,4}, {1,4}, {1,8}}}, + { 0x16C, {{1,4}, {1,8}, {1,8}}}, +}; + +struct memclk_data { + unsigned char multiplier; + unsigned char divisor; +}; +static struct memclk_data st40_memclk_table[8] = { + {1,1}, // 000 + {1,2}, // 001 + {1,3}, // 010 + {2,3}, // 011 + {1,4}, // 100 + {1,6}, // 101 + {1,8}, // 110 + {1,8} // 111 +}; + +static void st40_specific_time_init(unsigned int module_clock, unsigned short frqcr) +{ + unsigned int cpu_clock, master_clock, bus_clock, memory_clock; + struct frqcr_data *d; + int a; + unsigned long memclkcr; + struct memclk_data *e; + + for (a=0; a<ARRAY_SIZE(st40_frqcr_table); a++) { + d = &st40_frqcr_table[a]; + if (d->frqcr == (frqcr & 0x1ff)) + break; + } + if (a == ARRAY_SIZE(st40_frqcr_table)) { + d = st40_frqcr_table; + printk("ERROR: Unrecognised FRQCR value (0x%x), using default multipliers\n",frqcr); + } + + memclkcr = ctrl_inl(CLOCKGEN_MEMCLKCR); + e = &st40_memclk_table[memclkcr & MEMCLKCR_RATIO_MASK]; + + printk("Clock multipliers: CPU: %d/%d Bus: %d/%d Mem: %d/%d Periph: %d/%d\n", + d->factor[0].multiplier, d->factor[0].divisor, + d->factor[1].multiplier, d->factor[1].divisor, + e->multiplier, e->divisor, + d->factor[2].multiplier, d->factor[2].divisor); + + master_clock = module_clock * d->factor[2].divisor / d->factor[2].multiplier; + bus_clock = master_clock * d->factor[1].multiplier / d->factor[1].divisor; + memory_clock = master_clock * e->multiplier / e->divisor; + cpu_clock = master_clock * d->factor[0].multiplier / d->factor[0].divisor; + + current_cpu_data.cpu_clock = cpu_clock; + current_cpu_data.master_clock = master_clock; + current_cpu_data.bus_clock = bus_clock; + current_cpu_data.memory_clock = memory_clock; + current_cpu_data.module_clock = module_clock; + +} + +#endif + void __init time_init(void) { unsigned int timer_freq = 0; unsigned int ifc, pfc, bfc; unsigned long interval; +#ifdef CONFIG_CPU_SUBTYPE_ST40STB1 + unsigned long pvr; + unsigned short frqcr; +#endif if (board_time_init) board_time_init(); - get_current_frequency_divisors(&ifc, &bfc, &pfc); /* * If we don't have an RTC (such as with the SH7300), don't attempt to * probe the timer frequency. Rely on an either hardcoded peripheral - * clock value, or on the sh_pclk command line option. + * clock value, or on the sh_pclk command line option. Note that we + * still need to have CONFIG_SH_PCLK_FREQ set in order for things like + * CLOCK_TICK_RATE to be sane. */ current_cpu_data.module_clock = sh_pclk_freq; +#ifdef CONFIG_SH_PCLK_CALC /* XXX: Switch this over to a more generic test. */ - if (current_cpu_data.type != CPU_SH7300) { + { unsigned int freq; /* @@ -466,15 +608,31 @@ void __init time_init(void) timer_freq = get_timer_frequency(); freq = timer_freq * 4; - if (sh_pclk_freq && sh_pclk_freq != freq) { + if (sh_pclk_freq && (sh_pclk_freq/100*99 > freq || sh_pclk_freq/100*101 < freq)) { printk(KERN_NOTICE "Calculated peripheral clock value " "%d differs from sh_pclk value %d, fixing..\n", freq, sh_pclk_freq); current_cpu_data.module_clock = freq; } } +#endif + +#ifdef CONFIG_CPU_SUBTYPE_ST40STB1 + pvr = ctrl_inl(CCN_PVR); + frqcr = ctrl_inw(FRQCR); + printk("time.c ST40 Probe: PVR %08lx, FRQCR %04hx\n", pvr, frqcr); + if (((pvr >>CCN_PVR_CHIP_SHIFT) & CCN_PVR_CHIP_MASK) == CCN_PVR_CHIP_ST40STB1) + st40_specific_time_init(current_cpu_data.module_clock, frqcr); + else +#endif + get_current_frequency_divisors(&ifc, &bfc, &pfc); - rtc_get_time(&xtime); + if (rtc_get_time) + rtc_get_time(&xtime); + else { + xtime.tv_sec = mktime(2000, 1, 1, 0, 0, 0); + xtime.tv_nsec = 0; + } set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec); @@ -485,6 +643,10 @@ void __init time_init(void) setup_irq(TIMER_IRQ, &irq0); } + /* + ** for ST40 chips the current_cpu_data should already be set + ** so not having valid pfc/bfc/ifc shouldn't be a problem + */ if (!current_cpu_data.master_clock) current_cpu_data.master_clock = current_cpu_data.module_clock * pfc; if (!current_cpu_data.bus_clock) @@ -506,13 +668,19 @@ void __init time_init(void) printk("Module clock: %d.%02dMHz\n", (current_cpu_data.module_clock / 1000000), (current_cpu_data.module_clock % 1000000)/10000); +#if defined(CONFIG_SH_HS7751RVOIP) || defined(CONFIG_SH_RTS7751R2D) + interval = ((current_cpu_data.module_clock/4 + HZ/2) / HZ) - 1; +#else interval = (current_cpu_data.module_clock/4 + HZ/2) / HZ; +#endif printk("Interval = %ld\n", interval); /* Start TMU0 */ ctrl_outb(0, TMU_TSTR); +#if !defined(CONFIG_CPU_SUBTYPE_SH7300) ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); +#endif ctrl_outw(TMU0_TCR_INIT, TMU0_TCR); ctrl_outl(interval, TMU0_TCOR); ctrl_outl(interval, TMU0_TCNT); diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c index 3e63d8a70ed3..da5721f4aab7 100644 --- a/arch/sh/kernel/traps.c +++ b/arch/sh/kernel/traps.c @@ -1,4 +1,4 @@ -/* $Id: traps.c,v 1.16 2004/03/16 00:10:54 lethal Exp $ +/* $Id: traps.c,v 1.17 2004/05/02 01:46:30 sugioka Exp $ * * linux/arch/sh/traps.c * @@ -559,7 +559,7 @@ int is_dsp_inst(struct pt_regs *regs) * Safe guard if DSP mode is already enabled or we're lacking * the DSP altogether. */ - if (!test_bit(CPU_HAS_DSP, &(cpu_data->flags)) || (regs->sr & SR_DSP)) + if (!(cpu_data->flags & CPU_HAS_DSP) || (regs->sr & SR_DSP)) return 0; get_user(inst, ((unsigned short *) regs->pc)); @@ -636,7 +636,7 @@ void __init trap_init(void) = (void *)do_illegal_slot_inst; #ifdef CONFIG_CPU_SH4 - if (!test_bit(CPU_HAS_FPU, &(cpu_data->flags))) { + if (!(cpu_data->flags & CPU_HAS_FPU)) { /* For SH-4 lacking an FPU, treat floating point instructions as reserved. */ /* entry 64 corresponds to EXPEVT=0x800 */ diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index da0f5d728b3e..92398074128c 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S @@ -38,6 +38,14 @@ SECTIONS .data : { /* Data */ *(.data) + + /* Align the initial ramdisk image (INITRD) on page boundaries. */ + . = ALIGN(4096); + __rd_start = .; + *(.initrd) + . = ALIGN(4096); + __rd_end = .; + CONSTRUCTORS } diff --git a/arch/sh/lib/delay.c b/arch/sh/lib/delay.c index e1fcc970f0e2..5504546494c8 100644 --- a/arch/sh/lib/delay.c +++ b/arch/sh/lib/delay.c @@ -33,3 +33,9 @@ void __udelay(unsigned long usecs) { __const_udelay(usecs * 0x000010c6); /* 2**32 / 1000000 */ } + +void __ndelay(unsigned long nsecs) +{ + __const_udelay(nsecs * 0x00000005); +} + diff --git a/arch/sh/mm/cache-sh3.c b/arch/sh/mm/cache-sh3.c index cb6c0c0c7d56..b03d5e441029 100644 --- a/arch/sh/mm/cache-sh3.c +++ b/arch/sh/mm/cache-sh3.c @@ -1,4 +1,4 @@ -/* $Id: cache-sh3.c,v 1.8 2004/02/01 16:26:27 lethal Exp $ +/* $Id: cache-sh3.c,v 1.9 2004/05/02 01:46:30 sugioka Exp $ * * linux/arch/sh/mm/cache-sh3.c * @@ -65,14 +65,14 @@ int __init detect_cpu_and_cache_system(void) * 2K(direct) 7702 is not supported (yet) */ if (data0 == data1 && data2 == data3) { /* Shadow */ - cpu_data->dcache.way_shift = 11; + cpu_data->dcache.way_incr = (1 << 11); cpu_data->dcache.entry_mask = 0x7f0; cpu_data->dcache.sets = 128; cpu_data->type = CPU_SH7708; - set_bit(CPU_HAS_MMU_PAGE_ASSOC, &(cpu_data->flags)); + cpu_data->flags |= CPU_HAS_MMU_PAGE_ASSOC; } else { /* 7709A or 7729 */ - cpu_data->dcache.way_shift = 12; + cpu_data->dcache.way_incr = (1 << 12); cpu_data->dcache.entry_mask = 0xff0; cpu_data->dcache.sets = 256; cpu_data->type = CPU_SH7729; @@ -108,13 +108,12 @@ void __flush_wback_region(void *start, int size) & ~(L1_CACHE_BYTES-1); for (v = begin; v < end; v+=L1_CACHE_BYTES) { + unsigned long addrstart = CACHE_OC_ADDRESS_ARRAY; for (j = 0; j < cpu_data->dcache.ways; j++) { unsigned long data, addr, p; p = __pa(v); - addr = CACHE_OC_ADDRESS_ARRAY | - (j << cpu_data->dcache.way_shift)| - (v & cpu_data->dcache.entry_mask); + addr = addrstart | (v & cpu_data->dcache.entry_mask); local_irq_save(flags); data = ctrl_inl(addr); @@ -126,6 +125,7 @@ void __flush_wback_region(void *start, int size) break; } local_irq_restore(flags); + addrstart += cpu_data->dcache.way_incr; } } } diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index dde3de346fab..adb99d833d23 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c @@ -30,7 +30,7 @@ static void __flush_dcache_all_ex(void); int __init detect_cpu_and_cache_system(void) { - unsigned long pvr, prr, ccr, cvr; + unsigned long pvr, prr, cvr; unsigned long size; static unsigned long sizes[16] = { @@ -48,7 +48,7 @@ int __init detect_cpu_and_cache_system(void) /* * Setup some sane SH-4 defaults for the icache */ - cpu_data->icache.way_shift = 13; + cpu_data->icache.way_incr = (1 << 13); cpu_data->icache.entry_shift = 5; cpu_data->icache.entry_mask = 0x1fe0; cpu_data->icache.sets = 256; @@ -58,7 +58,7 @@ int __init detect_cpu_and_cache_system(void) /* * And again for the dcache .. */ - cpu_data->dcache.way_shift = 14; + cpu_data->dcache.way_incr = (1 << 14); cpu_data->dcache.entry_shift = 5; cpu_data->dcache.entry_mask = 0x3fe0; cpu_data->dcache.sets = 512; @@ -66,7 +66,7 @@ int __init detect_cpu_and_cache_system(void) cpu_data->dcache.linesz = L1_CACHE_BYTES; /* Set the FPU flag, virtually all SH-4's have one */ - set_bit(CPU_HAS_FPU, &(cpu_data->flags)); + cpu_data->flags |= CPU_HAS_FPU; /* * Probe the underlying processor version/revision and @@ -75,7 +75,7 @@ int __init detect_cpu_and_cache_system(void) switch (pvr) { case 0x205: cpu_data->type = CPU_SH7750; - set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags)); + cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG; break; case 0x206: cpu_data->type = CPU_SH7750S; @@ -84,7 +84,7 @@ int __init detect_cpu_and_cache_system(void) * FIXME: This is needed for 7750, but do we need it for the * 7750S too? For now, assume we do.. -- PFM */ - set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags)); + cpu_data->flags |= CPU_HAS_P2_FLUSH_BUG; break; case 0x1100: @@ -102,7 +102,7 @@ int __init detect_cpu_and_cache_system(void) cpu_data->dcache.ways = 2; /* No FPU on the SH4-500 series.. */ - clear_bit(CPU_HAS_FPU, &(cpu_data->flags)); + cpu_data->flags &= ~CPU_HAS_FPU; break; case 0x600: cpu_data->type = CPU_SH4_202; @@ -129,27 +129,20 @@ int __init detect_cpu_and_cache_system(void) * On anything that's not a direct-mapped cache, look to the CVR * for I/D-cache specifics. */ - if (cpu_data->dcache.ways > 1) { - jump_to_P2(); - ccr = ctrl_inl(CCR); - - /* Force EMODE */ - if (!(ccr & CCR_CACHE_EMODE)) { - ccr |= CCR_CACHE_EMODE; - ctrl_outl(ccr, CCR); - } - - back_to_P1(); - + if (cpu_data->icache.ways > 1) { size = sizes[(cvr >> 20) & 0xf]; - cpu_data->icache.way_shift = (size >> 1); - cpu_data->icache.entry_mask = ((size >> 2) - (1 << 5)); - cpu_data->icache.sets = (size >> 6); + cpu_data->icache.way_incr = size / cpu_data->icache.ways; + cpu_data->icache.sets = (size >> 6); + cpu_data->icache.entry_mask = + ((size / cpu_data->icache.ways) - (1 << 5)); + } + if (cpu_data->dcache.ways > 1) { size = sizes[(cvr >> 16) & 0xf]; - cpu_data->dcache.way_shift = (size >> 1); - cpu_data->dcache.entry_mask = ((size >> 2) - (1 << 5)); - cpu_data->dcache.sets = (size >> 6); + cpu_data->dcache.way_incr = size / cpu_data->dcache.ways; + cpu_data->dcache.sets = (size >> 6); + cpu_data->dcache.entry_mask = + ((size / cpu_data->dcache.ways) - (1 << 5)); } return 0; @@ -250,7 +243,7 @@ static void __flush_cache_4096_all_ex(unsigned long start) int i; entry_offset = 1 << cpu_data->dcache.entry_shift; - for (i = 0; i < cpu_data->dcache.ways; i++, start += (1 << cpu_data->dcache.way_shift)) { + for (i = 0; i < cpu_data->dcache.ways; i++, start += cpu_data->dcache.way_incr) { for (addr = CACHE_OC_ADDRESS_ARRAY + start; addr < CACHE_OC_ADDRESS_ARRAY + 4096 + start; addr += entry_offset) { @@ -297,7 +290,7 @@ void flush_cache_sigtramp(unsigned long addr) local_irq_save(flags); jump_to_P2(); - for(i = 0; i < cpu_data->icache.ways; i++, index += (1 << cpu_data->icache.way_shift)) + for(i = 0; i < cpu_data->icache.ways; i++, index += cpu_data->icache.way_incr) ctrl_outl(0, index); /* Clear out Valid-bit */ back_to_P1(); local_irq_restore(flags); @@ -313,12 +306,13 @@ static inline void flush_cache_4096(unsigned long start, * SH7751, SH7751R, and ST40 have no restriction to handle cache. * (While SH7750 must do that at P2 area.) */ - if (test_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags))) { + if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) + || start < CACHE_OC_ADDRESS_ARRAY) { local_irq_save(flags); - __flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0x20000000); + __flush_cache_4096(start | SH_CACHE_ASSOC, P1SEGADDR(phys), 0x20000000); local_irq_restore(flags); - } else if (start >= CACHE_OC_ADDRESS_ARRAY) { - __flush_cache_4096(start | SH_CACHE_ASSOC, phys | 0x80000000, 0); + } else { + __flush_cache_4096(start | SH_CACHE_ASSOC, P1SEGADDR(phys), 0); } } diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c index f988035c7c86..789bacf1a7aa 100644 --- a/arch/sh/mm/consistent.c +++ b/arch/sh/mm/consistent.c @@ -24,56 +24,58 @@ void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle) if (!page) return NULL; - ret = (void *)P2SEGADDR(page_to_bus(page)); + ret = page_address(page); + *handle = virt_to_phys(ret); /* * We must flush the cache before we pass it on to the device */ dma_cache_wback_inv(ret, size); - *handle = (unsigned long)ret; - + page = virt_to_page(ret); free = page + (size >> PAGE_SHIFT); end = page + (1 << order); - do { + while (++page < end) { set_page_count(page, 1); - page++; - } while (size -= PAGE_SIZE); - /* - * Free any unused pages - */ - while (page < end) { - set_page_count(page, 1); - __free_page(page); - page++; + /* Free any unused pages */ + if (page >= free) { + __free_page(page); + } } - return ret; + return P2SEGADDR(ret); } void consistent_free(void *vaddr, size_t size) { unsigned long addr = P1SEGADDR((unsigned long)vaddr); + struct page *page=virt_to_page(addr); + int num_pages=(size+PAGE_SIZE-1) >> PAGE_SHIFT; + int i; - free_pages(addr, get_order(size)); + for(i=0;i<num_pages;i++) { + __free_page((page+i)); + } } void consistent_sync(void *vaddr, size_t size, int direction) { + void * p1addr = (void*) P1SEGADDR((unsigned long)vaddr); + switch (direction) { case DMA_FROM_DEVICE: /* invalidate only */ - dma_cache_inv(vaddr, size); + dma_cache_inv(p1addr, size); break; case DMA_TO_DEVICE: /* writeback only */ - dma_cache_wback(vaddr, size); + dma_cache_wback(p1addr, size); break; case DMA_BIDIRECTIONAL: /* writeback and invalidate */ - dma_cache_wback_inv(vaddr, size); + dma_cache_wback_inv(p1addr, size); break; default: BUG(); } } - +EXPORT_SYMBOL(consistent_sync); diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c index 95b5368c0670..7b49b6976e78 100644 --- a/arch/sh/mm/init.c +++ b/arch/sh/mm/init.c @@ -3,7 +3,7 @@ * linux/arch/sh/mm/init.c * * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2002 Paul Mundt + * Copyright (C) 2002, 2004 Paul Mundt * * Based on linux/arch/i386/mm/init.c: * Copyright (C) 1995 Linus Torvalds @@ -66,7 +66,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); i = max_mapnr; while (i-- > 0) { total++; @@ -83,6 +83,66 @@ void show_mem(void) printk("%d pages swap cached\n",cached); } +static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) +{ + pgd_t *pgd; + pmd_t *pmd; + pte_t *pte; + + pgd = swapper_pg_dir + pgd_index(addr); + if (pgd_none(*pgd)) { + pgd_ERROR(*pgd); + return; + } + + pmd = pmd_offset(pgd, addr); + if (pmd_none(*pmd)) { + pte = (pte_t *)get_zeroed_page(GFP_ATOMIC); + set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE | _PAGE_USER)); + if (pte != pte_offset_kernel(pmd, 0)) { + pmd_ERROR(*pmd); + return; + } + } + + pte = pte_offset_kernel(pmd, addr); + if (!pte_none(*pte)) { + pte_ERROR(*pte); + return; + } + + set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot)); + + __flush_tlb_page(get_asid(), addr); +} + +/* + * As a performance optimization, other platforms preserve the fixmap mapping + * across a context switch, we don't presently do this, but this could be done + * in a similar fashion as to the wired TLB interface that sh64 uses (by way + * of the memorry mapped UTLB configuration) -- this unfortunately forces us to + * give up a TLB entry for each mapping we want to preserve. While this may be + * viable for a small number of fixmaps, it's not particularly useful for + * everything and needs to be carefully evaluated. (ie, we may want this for + * the vsyscall page). + * + * XXX: Perhaps add a _PAGE_WIRED flag or something similar that we can pass + * in at __set_fixmap() time to determine the appropriate behavior to follow. + * + * -- PFM. + */ +void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot) +{ + unsigned long address = __fix_to_virt(idx); + + if (idx >= __end_of_fixed_addresses) { + BUG(); + return; + } + + set_pte_phys(address, phys, prot); +} + /* References to section boundaries */ extern char _text, _etext, _edata, __bss_start, _end; diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c index 07cbbd6c1a88..f6a76230872f 100644 --- a/arch/sh/mm/pg-sh4.c +++ b/arch/sh/mm/pg-sh4.c @@ -1,7 +1,5 @@ -/* - * $Id: pg-sh4.c,v 1.1.2.2 2002/11/17 17:56:18 lethal Exp $ - * - * arch/sh/mm/pg-sh4.c +/* + * arch/sh/mm/pg-sh4.c * * Copyright (C) 1999, 2000, 2002 Niibe Yutaka * Copyright (C) 2002 Paul Mundt @@ -101,3 +99,24 @@ void copy_user_page(void *to, void *from, unsigned long address, up(&p3map_sem[(address & CACHE_ALIAS)>>12]); } } + +/* + * For SH-4, we have our own implementation for ptep_get_and_clear + */ +inline pte_t ptep_get_and_clear(pte_t *ptep) +{ + pte_t pte = *ptep; + + pte_clear(ptep); + if (!pte_not_present(pte)) { + unsigned long pfn = pte_pfn(pte); + if (pfn_valid(pfn)) { + struct page *page = pfn_to_page(pfn); + struct address_space *mapping = page_mapping(page); + if (!mapping || !mapping_writably_mapped(mapping)) + __clear_bit(PG_mapped, &page->flags); + } + } + return pte; +} + diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c index 88213cef3dea..318d1a529b49 100644 --- a/arch/sh/mm/tlb-sh3.c +++ b/arch/sh/mm/tlb-sh3.c @@ -72,7 +72,7 @@ void __flush_tlb_page(unsigned long asid, unsigned long page) addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000); data = (page & 0xfffe0000) | asid; /* VALID bit is off */ - if (test_bit(CPU_HAS_MMU_PAGE_ASSOC, &(cpu_data->flags))) { + if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) { addr |= MMU_PAGE_ASSOC_BIT; ways = 1; /* we already know the way .. */ } diff --git a/arch/sh/ramdisk/Makefile b/arch/sh/ramdisk/Makefile new file mode 100644 index 000000000000..a22d86bf0c45 --- /dev/null +++ b/arch/sh/ramdisk/Makefile @@ -0,0 +1,19 @@ +# +# Makefile for a ramdisk image +# + +obj-y += ramdisk.o + + +O_FORMAT = $(shell $(OBJDUMP) -i | head -n 2 | grep elf32) +img := $(subst ",,$(CONFIG_EMBEDDED_RAMDISK_IMAGE)) +# add $(src) when $(img) is relative +img := $(subst $(src)//,/,$(src)/$(img)) + +quiet_cmd_ramdisk = LD $@ +define cmd_ramdisk + $(LD) -T $(src)/ld.script -b binary --oformat $(O_FORMAT) -o $@ $(img) +endef + +$(obj)/ramdisk.o: $(img) $(src)/ld.script + $(call cmd,ramdisk) diff --git a/arch/sh/ramdisk/ld.script b/arch/sh/ramdisk/ld.script new file mode 100644 index 000000000000..94beee248c04 --- /dev/null +++ b/arch/sh/ramdisk/ld.script @@ -0,0 +1,9 @@ +OUTPUT_ARCH(sh) +SECTIONS +{ + .initrd : + { + *(.data) + } +} + diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index be54d527dc30..faf6d9e38bff 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types @@ -7,6 +7,7 @@ # SE SH_SOLUTION_ENGINE 7751SE SH_7751_SOLUTION_ENGINE +7300SE SH_7300_SOLUTION_ENGINE 7751SYSTEMH SH_7751_SYSTEMH HP600 SH_HP600 HP620 SH_HP620 @@ -21,4 +22,6 @@ BIGSUR SH_BIGSUR ADX SH_ADX MPC1211 SH_MPC1211 SNAPGEAR SH_SECUREEDGE5410 +HS7751RVOIP SH_HS7751RVOIP +RTS7751R2D SH_RTS7751R2D diff --git a/arch/sparc/kernel/irq.c b/arch/sparc/kernel/irq.c index 6b1698b5ad6f..237764bb69fd 100644 --- a/arch/sparc/kernel/irq.c +++ b/arch/sparc/kernel/irq.c @@ -449,7 +449,7 @@ int request_fast_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->dev_id = NULL; action->next = NULL; @@ -529,7 +529,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c index e4558e7f0df7..ba8a2fab320e 100644 --- a/arch/sparc/kernel/setup.c +++ b/arch/sparc/kernel/setup.c @@ -244,8 +244,7 @@ extern unsigned short ram_flags; extern int root_mountflags; -char saved_command_line[256]; -char reboot_command[256]; +char reboot_command[COMMAND_LINE_SIZE]; enum sparc_cpu sparc_cpu_model; struct tt_entry *sparc_ttable; diff --git a/arch/sparc/kernel/sparc_ksyms.c b/arch/sparc/kernel/sparc_ksyms.c index 601c97a31dd0..fdaacfa478c7 100644 --- a/arch/sparc/kernel/sparc_ksyms.c +++ b/arch/sparc/kernel/sparc_ksyms.c @@ -11,6 +11,7 @@ #include <linux/config.h> #include <linux/module.h> +#include <linux/init.h> #include <linux/smp.h> #include <linux/types.h> #include <linux/string.h> @@ -74,7 +75,6 @@ extern void *__memscan_zero(void *, size_t); extern void *__memscan_generic(void *, int, size_t); extern int __memcmp(const void *, const void *, __kernel_size_t); extern int __strncmp(const char *, const char *, __kernel_size_t); -extern char saved_command_line[]; extern void bcopy (const char *, char *, int); extern int __ashrdi3(int, int); diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c index 5e9a705c1093..93e385611b95 100644 --- a/arch/sparc/kernel/sun4d_irq.c +++ b/arch/sparc/kernel/sun4d_irq.c @@ -336,7 +336,7 @@ int sun4d_request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/sparc/mm/init.c b/arch/sparc/mm/init.c index 1d61ed4130b3..4bc6aff2c8c3 100644 --- a/arch/sparc/mm/init.c +++ b/arch/sparc/mm/init.c @@ -76,7 +76,7 @@ void show_mem(void) { printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n", + printk("Free swap: %6ldkB\n", nr_swap_pages << (PAGE_SHIFT-10)); printk("%ld pages of RAM\n", totalram_pages); printk("%d free pages\n", nr_free_pages()); diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c index b7f6a1eb922f..10c0c4ed6e89 100644 --- a/arch/sparc64/kernel/irq.c +++ b/arch/sparc64/kernel/irq.c @@ -118,10 +118,6 @@ static void register_irq_proc (unsigned int irq); action->flags |= __irq_ino(irq) << 48; #define get_ino_in_irqaction(action) (action->flags >> 48) -#if NR_CPUS > 64 -#error irqaction embedded smp affinity does not work with > 64 cpus, FIXME -#endif - #define put_smpaff_in_irqaction(action, smpaff) (action)->mask = (smpaff) #define get_smpaff_in_irqaction(action) ((action)->mask) @@ -458,7 +454,7 @@ int request_irq(unsigned int irq, irqreturn_t (*handler)(int, void *, struct pt_ action->next = NULL; action->dev_id = dev_id; put_ino_in_irqaction(action, irq); - put_smpaff_in_irqaction(action, 0); + put_smpaff_in_irqaction(action, CPU_MASK_NONE); if (tmp) tmp->next = action; @@ -691,9 +687,10 @@ static inline void redirect_intr(int cpu, struct ino_bucket *bp) * Just Do It. */ struct irqaction *ap = bp->irq_info; - cpumask_t cpu_mask = get_smpaff_in_irqaction(ap); + cpumask_t cpu_mask; unsigned int buddy, ticks; + cpu_mask = get_smpaff_in_irqaction(ap); cpus_and(cpu_mask, cpu_mask, cpu_online_map); if (cpus_empty(cpu_mask)) cpu_mask = cpu_online_map; @@ -714,7 +711,7 @@ static inline void redirect_intr(int cpu, struct ino_bucket *bp) if (++buddy >= NR_CPUS) buddy = 0; if (++ticks > NR_CPUS) { - put_smpaff_in_irqaction(ap, 0); + put_smpaff_in_irqaction(ap, CPU_MASK_NONE); goto out; } } @@ -948,7 +945,7 @@ int request_fast_irq(unsigned int irq, action->name = name; action->next = NULL; put_ino_in_irqaction(action, irq); - put_smpaff_in_irqaction(action, 0); + put_smpaff_in_irqaction(action, CPU_MASK_NONE); *(bucket->pil + irq_action) = action; enable_irq(irq); @@ -1166,53 +1163,15 @@ static struct proc_dir_entry * irq_dir [NUM_IVECS]; #ifdef CONFIG_SMP -#define HEX_DIGITS 16 - -static unsigned int parse_hex_value (const char __user *buffer, - unsigned long count, unsigned long *ret) -{ - unsigned char hexnum [HEX_DIGITS]; - unsigned long value; - int i; - - if (!count) - return -EINVAL; - if (count > HEX_DIGITS) - count = HEX_DIGITS; - if (copy_from_user(hexnum, buffer, count)) - return -EFAULT; - - /* - * Parse the first 8 characters as a hex string, any non-hex char - * is end-of-string. '00e1', 'e1', '00E1', 'E1' are all the same. - */ - value = 0; - - for (i = 0; i < count; i++) { - unsigned int c = hexnum[i]; - - switch (c) { - case '0' ... '9': c -= '0'; break; - case 'a' ... 'f': c -= 'a'-10; break; - case 'A' ... 'F': c -= 'A'-10; break; - default: - goto out; - } - value = (value << 4) | c; - } -out: - *ret = value; - return 0; -} - static int irq_affinity_read_proc (char *page, char **start, off_t off, int count, int *eof, void *data) { struct ino_bucket *bp = ivector_table + (long)data; struct irqaction *ap = bp->irq_info; - cpumask_t mask = get_smpaff_in_irqaction(ap); + cpumask_t mask; int len; + mask = get_smpaff_in_irqaction(ap); if (cpus_empty(mask)) mask = cpu_online_map; @@ -1223,7 +1182,7 @@ static int irq_affinity_read_proc (char *page, char **start, off_t off, return len; } -static inline void set_intr_affinity(int irq, unsigned long hw_aff) +static inline void set_intr_affinity(int irq, cpumask_t hw_aff) { struct ino_bucket *bp = ivector_table + irq; @@ -1241,22 +1200,17 @@ static int irq_affinity_write_proc (struct file *file, const char __user *buffer unsigned long count, void *data) { int irq = (long) data, full_count = count, err; - unsigned long new_value, i; + cpumask_t new_value; - err = parse_hex_value(buffer, count, &new_value); + err = cpumask_parse(buffer, count, new_value); /* * Do not allow disabling IRQs completely - it's a too easy * way to make the system unusable accidentally :-) At least * one online CPU still has to be targeted. */ - for (i = 0; i < NR_CPUS; i++) { - if ((new_value & (1UL << i)) != 0 && - !cpu_online(i)) - new_value &= ~(1UL << i); - } - - if (!new_value) + cpus_and(new_value, new_value, cpu_online_map); + if (cpus_empty(new_value)) return -EINVAL; set_intr_affinity(irq, new_value); diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c index 3d097a4bb2c3..f463ca2e61c8 100644 --- a/arch/sparc64/kernel/setup.c +++ b/arch/sparc64/kernel/setup.c @@ -451,8 +451,7 @@ extern unsigned short ram_flags; extern int root_mountflags; -char saved_command_line[256]; -char reboot_command[256]; +char reboot_command[COMMAND_LINE_SIZE]; static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 }; diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c index 64b873212243..c0f729f9167f 100644 --- a/arch/sparc64/kernel/smp.c +++ b/arch/sparc64/kernel/smp.c @@ -406,23 +406,14 @@ static __inline__ void spitfire_xcall_deliver(u64 data0, u64 data1, u64 data2, c int i; __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); - for (i = 0; i < NR_CPUS; i++) { - if (cpu_isset(i, mask)) { - spitfire_xcall_helper(data0, data1, data2, pstate, i); - cpu_clear(i, mask); - if (cpus_empty(mask)) - break; - } - } + for_each_cpu_mask(i, mask) + spitfire_xcall_helper(data0, data1, data2, pstate, i); } /* Cheetah now allows to send the whole 64-bytes of data in the interrupt * packet, but we have no use for that. However we do take advantage of * the new pipelining feature (ie. dispatch to multiple cpus simultaneously). */ -#if NR_CPUS > 32 -#error Fixup cheetah_xcall_deliver Dave... -#endif static void cheetah_xcall_deliver(u64 data0, u64 data1, u64 data2, cpumask_t mask) { u64 pstate, ver; @@ -456,25 +447,19 @@ retry: nack_busy_id = 0; { - cpumask_t work_mask = mask; int i; - for (i = 0; i < NR_CPUS; i++) { - if (cpu_isset(i, work_mask)) { - u64 target = (i << 14) | 0x70; - - if (!is_jalapeno) - target |= (nack_busy_id << 24); - __asm__ __volatile__( - "stxa %%g0, [%0] %1\n\t" - "membar #Sync\n\t" - : /* no outputs */ - : "r" (target), "i" (ASI_INTR_W)); - nack_busy_id++; - cpu_clear(i, work_mask); - if (cpus_empty(work_mask)) - break; - } + for_each_cpu_mask(i, mask) { + u64 target = (i << 14) | 0x70; + + if (!is_jalapeno) + target |= (nack_busy_id << 24); + __asm__ __volatile__( + "stxa %%g0, [%0] %1\n\t" + "membar #Sync\n\t" + : /* no outputs */ + : "r" (target), "i" (ASI_INTR_W)); + nack_busy_id++; } } @@ -507,7 +492,6 @@ retry: printk("CPU[%d]: mondo stuckage result[%016lx]\n", smp_processor_id(), dispatch_stat); } else { - cpumask_t work_mask = mask; int i, this_busy_nack = 0; /* Delay some random time with interrupts enabled @@ -518,22 +502,17 @@ retry: /* Clear out the mask bits for cpus which did not * NACK us. */ - for (i = 0; i < NR_CPUS; i++) { - if (cpu_isset(i, work_mask)) { - u64 check_mask; - - if (is_jalapeno) - check_mask = (0x2UL << (2*i)); - else - check_mask = (0x2UL << - this_busy_nack); - if ((dispatch_stat & check_mask) == 0) - cpu_clear(i, mask); - this_busy_nack += 2; - cpu_clear(i, work_mask); - if (cpus_empty(work_mask)) - break; - } + for_each_cpu_mask(i, mask) { + u64 check_mask; + + if (is_jalapeno) + check_mask = (0x2UL << (2*i)); + else + check_mask = (0x2UL << + this_busy_nack); + if ((dispatch_stat & check_mask) == 0) + cpu_clear(i, mask); + this_busy_nack += 2; } goto retry; diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c index 909a13aeb1d8..888d540a1672 100644 --- a/arch/sparc64/kernel/sparc64_ksyms.c +++ b/arch/sparc64/kernel/sparc64_ksyms.c @@ -24,6 +24,7 @@ #include <linux/socket.h> #include <linux/syscalls.h> #include <linux/percpu.h> +#include <linux/init.h> #include <net/compat.h> #include <asm/oplib.h> @@ -76,7 +77,6 @@ extern int __memcmp(const void *, const void *, __kernel_size_t); extern int __strncmp(const char *, const char *, __kernel_size_t); extern __kernel_size_t __strlen(const char *); extern __kernel_size_t strlen(const char *); -extern char saved_command_line[]; extern void linux_sparc_syscall(void); extern void rtrap(void); extern void show_regs(struct pt_regs *); diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c index 043861f313c2..72a2164bdf67 100644 --- a/arch/sparc64/mm/init.c +++ b/arch/sparc64/mm/init.c @@ -348,7 +348,7 @@ void show_mem(void) { printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n", + printk("Free swap: %6ldkB\n", nr_swap_pages << (PAGE_SHIFT-10)); printk("%ld pages of RAM\n", num_physpages); printk("%d free pages\n", nr_free_pages()); diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c index 5f6c8502a248..0e968bb11a45 100644 --- a/arch/um/kernel/irq.c +++ b/arch/um/kernel/irq.c @@ -419,7 +419,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c index ec2be14beedf..84a895c2a365 100644 --- a/arch/um/kernel/mem.c +++ b/arch/um/kernel/mem.c @@ -380,7 +380,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); pfn = max_mapnr; while(pfn-- > 0) { page = pfn_to_page(pfn); diff --git a/arch/um/kernel/user_util.c b/arch/um/kernel/user_util.c index a953a08c1a14..9e4fbae93617 100644 --- a/arch/um/kernel/user_util.c +++ b/arch/um/kernel/user_util.c @@ -34,7 +34,6 @@ #define COMMAND_LINE_SIZE _POSIX_ARG_MAX /* Changed in linux_main and setup_arch, which run before SMP is started */ -char saved_command_line[COMMAND_LINE_SIZE] = { 0 }; char command_line[COMMAND_LINE_SIZE] = { 0 }; void add_arg(char *cmd_line, char *arg) diff --git a/arch/v850/kernel/fpga85e2c.c b/arch/v850/kernel/fpga85e2c.c index 72dda796fac6..17e3dbafc371 100644 --- a/arch/v850/kernel/fpga85e2c.c +++ b/arch/v850/kernel/fpga85e2c.c @@ -168,5 +168,5 @@ static void make_reg_snap (int irq, void *dummy, struct pt_regs *regs) static int reg_snap_dev_id; static struct irqaction reg_snap_action = { - make_reg_snap, 0, 0, "reg_snap", ®_snap_dev_id, 0 + make_reg_snap, 0, CPU_MASK_NONE, "reg_snap", ®_snap_dev_id, 0 }; diff --git a/arch/v850/kernel/irq.c b/arch/v850/kernel/irq.c index a5d918e71be9..d97864021730 100644 --- a/arch/v850/kernel/irq.c +++ b/arch/v850/kernel/irq.c @@ -392,7 +392,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/v850/kernel/setup.c b/arch/v850/kernel/setup.c index 960802a756ae..49675035cf9d 100644 --- a/arch/v850/kernel/setup.c +++ b/arch/v850/kernel/setup.c @@ -20,6 +20,7 @@ #include <linux/major.h> #include <linux/root_dev.h> #include <linux/mtd/mtd.h> +#include <linux/init.h> #include <asm/irq.h> @@ -40,8 +41,7 @@ extern char _root_fs_image_start __attribute__ ((__weak__)); extern char _root_fs_image_end __attribute__ ((__weak__)); -char command_line[512]; -char saved_command_line[512]; +char command_line[COMMAND_LINE_SIZE]; /* Memory not used by the kernel. */ static unsigned long total_ram_pages; diff --git a/arch/v850/kernel/time.c b/arch/v850/kernel/time.c index fee3e957da5c..74067adea388 100644 --- a/arch/v850/kernel/time.c +++ b/arch/v850/kernel/time.c @@ -203,7 +203,7 @@ static int timer_dev_id; static struct irqaction timer_irqaction = { timer_interrupt, SA_INTERRUPT, - 0, + CPU_MASK_NONE, "timer", &timer_dev_id, NULL diff --git a/arch/x86_64/kernel/i8259.c b/arch/x86_64/kernel/i8259.c index 304b6a37f58b..94e77bd96ff8 100644 --- a/arch/x86_64/kernel/i8259.c +++ b/arch/x86_64/kernel/i8259.c @@ -47,6 +47,12 @@ BI(x,8) BI(x,9) BI(x,a) BI(x,b) \ BI(x,c) BI(x,d) BI(x,e) BI(x,f) +#define BUILD_14_IRQS(x) \ + BI(x,0) BI(x,1) BI(x,2) BI(x,3) \ + BI(x,4) BI(x,5) BI(x,6) BI(x,7) \ + BI(x,8) BI(x,9) BI(x,a) BI(x,b) \ + BI(x,c) BI(x,d) + /* * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: * (these are usually mapped to vectors 0x20-0x2f) @@ -68,9 +74,15 @@ BUILD_16_IRQS(0x0) BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7) BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb) BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) + +#ifdef CONFIG_PCI_USE_VECTOR + BUILD_14_IRQS(0xe) +#endif + #endif #undef BUILD_16_IRQS +#undef BUILD_14_IRQS #undef BI @@ -83,6 +95,12 @@ BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \ IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f) +#define IRQLIST_14(x) \ + IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \ + IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \ + IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \ + IRQ(x,c), IRQ(x,d) + void (*interrupt[NR_IRQS])(void) = { IRQLIST_16(0x0), @@ -91,11 +109,17 @@ void (*interrupt[NR_IRQS])(void) = { IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7), IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb), IRQLIST_16(0xc), IRQLIST_16(0xd) + +#ifdef CONFIG_PCI_USE_VECTOR + , IRQLIST_14(0xe) +#endif + #endif }; #undef IRQ #undef IRQLIST_16 +#undef IRQLIST_14 /* * This is the 'legacy' 8259A Programmable Interrupt Controller, @@ -365,7 +389,7 @@ void __init init_8259A(int auto_eoi) * IRQ2 is cascade interrupt to second interrupt controller */ -static struct irqaction irq2 = { no_action, 0, 0, "cascade", NULL, NULL}; +static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL}; void __init init_ISA_irqs (void) { diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index 718504a32741..3869af670b28 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c @@ -67,8 +67,8 @@ static struct irq_pin_list { short apic, pin, next; } irq_2_pin[PIN_MAP_SIZE]; +int vector_irq[NR_VECTORS] = { [0 ... NR_VECTORS - 1] = -1}; #ifdef CONFIG_PCI_USE_VECTOR -int vector_irq[NR_IRQS] = { [0 ... NR_IRQS -1] = -1}; #define vector_to_irq(vector) \ (platform_legacy_irq(vector) ? vector : vector_irq[vector]) #else @@ -656,10 +656,14 @@ static inline int IO_APIC_irq_trigger(int irq) /* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */ u8 irq_vector[NR_IRQ_VECTORS] = { FIRST_DEVICE_VECTOR , 0 }; -#ifndef CONFIG_PCI_USE_VECTOR +#ifdef CONFIG_PCI_USE_VECTOR +int assign_irq_vector(int irq) +#else int __init assign_irq_vector(int irq) +#endif { static int current_vector = FIRST_DEVICE_VECTOR, offset = 0; + BUG_ON(irq >= NR_IRQ_VECTORS); if (IO_APIC_VECTOR(irq) > 0) return IO_APIC_VECTOR(irq); @@ -668,18 +672,19 @@ next: if (current_vector == IA32_SYSCALL_VECTOR) goto next; - if (current_vector > FIRST_SYSTEM_VECTOR) { + if (current_vector >= FIRST_SYSTEM_VECTOR) { offset++; + if (!(offset%8)) + return -ENOSPC; current_vector = FIRST_DEVICE_VECTOR + offset; } - if (current_vector == FIRST_SYSTEM_VECTOR) - panic("ran out of interrupt sources!"); + vector_irq[current_vector] = irq; + if (irq != AUTO_ASSIGN) + IO_APIC_VECTOR(irq) = current_vector; - IO_APIC_VECTOR(irq) = current_vector; return current_vector; } -#endif extern void (*interrupt[NR_IRQS])(void); static struct hw_interrupt_type ioapic_level_type; @@ -925,12 +930,17 @@ void __init print_IO_APIC(void) ); } } + if (use_pci_vector()) + printk(KERN_INFO "Using vector-based indexing\n"); printk(KERN_DEBUG "IRQ to pin mappings:\n"); for (i = 0; i < NR_IRQS; i++) { struct irq_pin_list *entry = irq_2_pin + i; if (entry->pin < 0) continue; - printk(KERN_DEBUG "IRQ%d ", i); + if (use_pci_vector() && !platform_legacy_irq(i)) + printk(KERN_DEBUG "IRQ%d ", IO_APIC_VECTOR(i)); + else + printk(KERN_DEBUG "IRQ%d ", i); for (;;) { printk("-> %d:%d", entry->apic, entry->pin); if (!entry->next) @@ -1384,7 +1394,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask) unsigned long flags; unsigned int dest; - dest = cpu_mask_to_apicid(mk_cpumask_const(mask)); + dest = cpu_mask_to_apicid(mask); /* * Only the first 8 bits are valid. diff --git a/arch/x86_64/kernel/irq.c b/arch/x86_64/kernel/irq.c index bfdb95e8bf95..fcaaa8c17262 100644 --- a/arch/x86_64/kernel/irq.c +++ b/arch/x86_64/kernel/irq.c @@ -488,7 +488,7 @@ int request_irq(unsigned int irq, action->handler = handler; action->flags = irqflags; - action->mask = 0; + cpus_clear(action->mask); action->name = devname; action->next = NULL; action->dev_id = dev_id; diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c index fd1c2d79131d..261700eacb18 100644 --- a/arch/x86_64/kernel/pci-gart.c +++ b/arch/x86_64/kernel/pci-gart.c @@ -148,7 +148,7 @@ static void flush_gart(struct pci_dev *dev) { unsigned long flags; int bus = dev ? dev->bus->number : -1; - cpumask_const_t bus_cpumask = pcibus_to_cpumask(bus); + cpumask_t bus_cpumask = pcibus_to_cpumask(bus); int flushed = 0; int i; @@ -158,7 +158,7 @@ static void flush_gart(struct pci_dev *dev) u32 w; if (!northbridges[i]) continue; - if (bus >= 0 && !(cpu_isset_const(i, bus_cpumask))) + if (bus >= 0 && !(cpu_isset(i, bus_cpumask))) continue; pci_write_config_dword(northbridges[i], 0x9c, northbridge_flush_word[i] | 1); diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index 094949f96ace..84417fc01841 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c @@ -100,7 +100,6 @@ extern int root_mountflags; extern char _text, _etext, _edata, _end; char command_line[COMMAND_LINE_SIZE]; -char saved_command_line[COMMAND_LINE_SIZE]; struct resource standard_io_resources[] = { { "dma1", 0x00, 0x1f, IORESOURCE_BUSY | IORESOURCE_IO }, diff --git a/arch/x86_64/kernel/smp.c b/arch/x86_64/kernel/smp.c index fec777046b9a..4246255697ab 100644 --- a/arch/x86_64/kernel/smp.c +++ b/arch/x86_64/kernel/smp.c @@ -94,7 +94,7 @@ void send_IPI_self(int vector) static inline void send_IPI_mask(cpumask_t cpumask, int vector) { - unsigned long mask = cpus_coerce(cpumask); + unsigned long mask = cpus_addr(cpumask)[0]; unsigned long cfg; unsigned long flags; diff --git a/arch/x86_64/kernel/smpboot.c b/arch/x86_64/kernel/smpboot.c index ba2cba68da14..06937402b31c 100644 --- a/arch/x86_64/kernel/smpboot.c +++ b/arch/x86_64/kernel/smpboot.c @@ -827,7 +827,7 @@ static void __init smp_boot_cpus(unsigned int max_cpus) if (apicid == boot_cpu_id || (apicid == BAD_APICID)) continue; - if (!cpu_isset(apicid, phys_cpu_present_map)) + if (!physid_isset(apicid, phys_cpu_present_map)) continue; if ((max_cpus >= 0) && (max_cpus <= cpucount+1)) continue; diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c index d47d3f8de44e..10c511f50d1d 100644 --- a/arch/x86_64/kernel/time.c +++ b/arch/x86_64/kernel/time.c @@ -689,7 +689,7 @@ int __init time_setup(char *str) } static struct irqaction irq0 = { - timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL + timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL }; extern void __init config_acpi_tables(void); diff --git a/arch/x86_64/mm/init.c b/arch/x86_64/mm/init.c index fa8cc36487d7..f393e3355b99 100644 --- a/arch/x86_64/mm/init.c +++ b/arch/x86_64/mm/init.c @@ -60,7 +60,7 @@ void show_mem(void) printk("Mem-info:\n"); show_free_areas(); - printk("Free swap: %6dkB\n",nr_swap_pages<<(PAGE_SHIFT-10)); + printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); for_each_pgdat(pgdat) { for (i = 0; i < pgdat->node_spanned_pages; ++i) { diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c index e4c1ae352f29..eb0f062c3ce2 100644 --- a/drivers/cdrom/cdrom.c +++ b/drivers/cdrom/cdrom.c @@ -1476,6 +1476,7 @@ static int dvd_do_auth(struct cdrom_device_info *cdi, dvd_authinfo *ai) /* LU data send */ case DVD_LU_SEND_AGID: cdinfo(CD_DVD, "entering DVD_LU_SEND_AGID\n"); + cgc.quiet = 1; setup_report_key(&cgc, ai->lsa.agid, 0); if ((ret = cdo->generic_packet(cdi, &cgc))) @@ -1510,6 +1511,7 @@ static int dvd_do_auth(struct cdrom_device_info *cdi, dvd_authinfo *ai) /* Post-auth key */ case DVD_LU_SEND_TITLE_KEY: cdinfo(CD_DVD, "entering DVD_LU_SEND_TITLE_KEY\n"); + cgc.quiet = 1; setup_report_key(&cgc, ai->lstk.agid, 4); cgc.cmd[5] = ai->lstk.lba; cgc.cmd[4] = ai->lstk.lba >> 8; diff --git a/drivers/char/dtlk.c b/drivers/char/dtlk.c index 8febd413fd58..e6ad246b9527 100644 --- a/drivers/char/dtlk.c +++ b/drivers/char/dtlk.c @@ -85,9 +85,9 @@ static wait_queue_head_t dtlk_process_list; static struct timer_list dtlk_timer; /* prototypes for file_operations struct */ -static ssize_t dtlk_read(struct file *, char *, +static ssize_t dtlk_read(struct file *, char __user *, size_t nbytes, loff_t * ppos); -static ssize_t dtlk_write(struct file *, const char *, +static ssize_t dtlk_write(struct file *, const char __user *, size_t nbytes, loff_t * ppos); static unsigned int dtlk_poll(struct file *, poll_table *); static int dtlk_open(struct inode *, struct file *); @@ -121,7 +121,7 @@ static char dtlk_write_tts(char); */ static void dtlk_timer_tick(unsigned long data); -static ssize_t dtlk_read(struct file *file, char *buf, +static ssize_t dtlk_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) { unsigned int minor = iminor(file->f_dentry->d_inode); @@ -158,7 +158,7 @@ static ssize_t dtlk_read(struct file *file, char *buf, return -EAGAIN; } -static ssize_t dtlk_write(struct file *file, const char *buf, +static ssize_t dtlk_write(struct file *file, const char __user *buf, size_t count, loff_t * ppos) { int i = 0, retries = 0, ch; @@ -277,6 +277,7 @@ static int dtlk_ioctl(struct inode *inode, unsigned int cmd, unsigned long arg) { + char __user *argp = (char __user *)arg; struct dtlk_settings *sp; char portval; TRACE_TEXT(" dtlk_ioctl"); @@ -285,14 +286,13 @@ static int dtlk_ioctl(struct inode *inode, case DTLK_INTERROGATE: sp = dtlk_interrogate(); - if (copy_to_user((char *) arg, (char *) sp, - sizeof(struct dtlk_settings))) + if (copy_to_user(argp, sp, sizeof(struct dtlk_settings))) return -EINVAL; return 0; case DTLK_STATUS: portval = inb_p(dtlk_port_tts); - return put_user(portval, (char *) arg); + return put_user(portval, argp); default: return -EINVAL; diff --git a/drivers/char/genrtc.c b/drivers/char/genrtc.c index d110713e8e20..36e1cb4fbfcc 100644 --- a/drivers/char/genrtc.c +++ b/drivers/char/genrtc.c @@ -171,7 +171,7 @@ static void gen_rtc_interrupt(unsigned long arg) /* * Now all the various file operations that we export. */ -static ssize_t gen_rtc_read(struct file *file, char *buf, +static ssize_t gen_rtc_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) { DECLARE_WAITQUEUE(wait, current); @@ -200,10 +200,10 @@ static ssize_t gen_rtc_read(struct file *file, char *buf, /* first test allows optimizer to nuke this case for 32-bit machines */ if (sizeof (int) != sizeof (long) && count == sizeof (unsigned int)) { unsigned int uidata = data; - retval = put_user(uidata, (unsigned long *)buf); + retval = put_user(uidata, (unsigned long __user *)buf); } else { - retval = put_user(data, (unsigned long *)buf); + retval = put_user(data, (unsigned long __user *)buf); } if (!retval) retval = sizeof(unsigned long); @@ -278,6 +278,7 @@ static int gen_rtc_ioctl(struct inode *inode, struct file *file, { struct rtc_time wtime; struct rtc_pll_info pll; + void __user *argp = (void __user *)arg; switch (cmd) { @@ -285,13 +286,12 @@ static int gen_rtc_ioctl(struct inode *inode, struct file *file, if (get_rtc_pll(&pll)) return -EINVAL; else - return copy_to_user((void *)arg, &pll, sizeof pll) ? -EFAULT : 0; + return copy_to_user(argp, &pll, sizeof pll) ? -EFAULT : 0; case RTC_PLL_SET: if (!capable(CAP_SYS_TIME)) return -EACCES; - if (copy_from_user(&pll, (struct rtc_pll_info*)arg, - sizeof(pll))) + if (copy_from_user(&pll, argp, sizeof(pll))) return -EFAULT; return set_rtc_pll(&pll); @@ -307,7 +307,7 @@ static int gen_rtc_ioctl(struct inode *inode, struct file *file, memset(&wtime, 0, sizeof(wtime)); get_rtc_time(&wtime); - return copy_to_user((void *)arg, &wtime, sizeof(wtime)) ? -EFAULT : 0; + return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0; case RTC_SET_TIME: /* Set the RTC */ { @@ -317,8 +317,7 @@ static int gen_rtc_ioctl(struct inode *inode, struct file *file, if (!capable(CAP_SYS_TIME)) return -EACCES; - if (copy_from_user(&wtime, (struct rtc_time *)arg, - sizeof(wtime))) + if (copy_from_user(&wtime, argp, sizeof(wtime))) return -EFAULT; year = wtime.tm_year + 1900; diff --git a/drivers/char/hpet.c b/drivers/char/hpet.c index cef6032b84e2..bb4e347d4fa4 100644 --- a/drivers/char/hpet.c +++ b/drivers/char/hpet.c @@ -174,7 +174,7 @@ static int hpet_open(struct inode *inode, struct file *file) } static ssize_t -hpet_read(struct file *file, char *buf, size_t count, loff_t * ppos) +hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) { DECLARE_WAITQUEUE(wait, current); unsigned long data; @@ -212,7 +212,7 @@ hpet_read(struct file *file, char *buf, size_t count, loff_t * ppos) } while (1); - retval = put_user(data, (unsigned long *)buf); + retval = put_user(data, (unsigned long __user *)buf); if (!retval) retval = sizeof(unsigned long); out: @@ -477,7 +477,7 @@ hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel) readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; info.hi_hpet = devp->hd_hpets->hp_which; info.hi_timer = devp - devp->hd_hpets->hp_dev; - if (copy_to_user((void *)arg, &info, sizeof(info))) + if (copy_to_user((void __user *)arg, &info, sizeof(info))) err = -EFAULT; break; } diff --git a/drivers/char/n_hdlc.c b/drivers/char/n_hdlc.c index 328f2701c5c6..0f1966d00e32 100644 --- a/drivers/char/n_hdlc.c +++ b/drivers/char/n_hdlc.c @@ -182,9 +182,9 @@ static ssize_t maxframe = 4096; /* TTY callbacks */ static ssize_t n_hdlc_tty_read(struct tty_struct *tty, struct file *file, - __u8 *buf, size_t nr); + __u8 __user *buf, size_t nr); static ssize_t n_hdlc_tty_write(struct tty_struct *tty, struct file *file, - const __u8 *buf, size_t nr); + const __u8 __user *buf, size_t nr); static int n_hdlc_tty_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg); static unsigned int n_hdlc_tty_poll(struct tty_struct *tty, struct file *filp, @@ -572,7 +572,7 @@ static void n_hdlc_tty_receive(struct tty_struct *tty, const __u8 *data, * Returns the number of bytes returned or error code. */ static ssize_t n_hdlc_tty_read(struct tty_struct *tty, struct file *file, - __u8 *buf, size_t nr) + __u8 __user *buf, size_t nr) { struct n_hdlc *n_hdlc = tty2n_hdlc(tty); int error; @@ -649,7 +649,7 @@ static ssize_t n_hdlc_tty_read(struct tty_struct *tty, struct file *file, * Returns the number of bytes written (or error code). */ static ssize_t n_hdlc_tty_write(struct tty_struct *tty, struct file *file, - const __u8 *data, size_t count) + const __u8 __user *data, size_t count) { struct n_hdlc *n_hdlc = tty2n_hdlc (tty); int error = 0; @@ -755,7 +755,7 @@ static int n_hdlc_tty_ioctl(struct tty_struct *tty, struct file *file, else count = 0; spin_unlock_irqrestore(&n_hdlc->rx_buf_list.spinlock,flags); - error = put_user(count, (int *)arg); + error = put_user(count, (int __user *)arg); break; case TIOCOUTQ: @@ -767,7 +767,7 @@ static int n_hdlc_tty_ioctl(struct tty_struct *tty, struct file *file, if (n_hdlc->tx_buf_list.head) count += n_hdlc->tx_buf_list.head->count; spin_unlock_irqrestore(&n_hdlc->tx_buf_list.spinlock,flags); - error = put_user(count, (int*)arg); + error = put_user(count, (int __user *)arg); break; default: diff --git a/drivers/char/n_r3964.c b/drivers/char/n_r3964.c index e3a50dacd181..e24b7efafadc 100644 --- a/drivers/char/n_r3964.c +++ b/drivers/char/n_r3964.c @@ -126,7 +126,7 @@ static void receive_char(struct r3964_info *pInfo, const unsigned char c); static void receive_error(struct r3964_info *pInfo, const char flag); static void on_timeout(unsigned long priv); static int enable_signals(struct r3964_info *pInfo, pid_t pid, int arg); -static int read_telegram(struct r3964_info *pInfo, pid_t pid, unsigned char *buf); +static int read_telegram(struct r3964_info *pInfo, pid_t pid, unsigned char __user *buf); static void add_msg(struct r3964_client_info *pClient, int msg_id, int arg, int error_code, struct r3964_block_header *pBlock); static struct r3964_message* remove_msg(struct r3964_info *pInfo, @@ -137,9 +137,9 @@ static void remove_client_block(struct r3964_info *pInfo, static int r3964_open(struct tty_struct *tty); static void r3964_close(struct tty_struct *tty); static ssize_t r3964_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t nr); + unsigned char __user *buf, size_t nr); static ssize_t r3964_write(struct tty_struct * tty, struct file * file, - const unsigned char * buf, size_t nr); + const unsigned char __user * buf, size_t nr); static int r3964_ioctl(struct tty_struct * tty, struct file * file, unsigned int cmd, unsigned long arg); static void r3964_set_termios(struct tty_struct *tty, struct termios * old); @@ -910,7 +910,7 @@ static int enable_signals(struct r3964_info *pInfo, pid_t pid, int arg) return 0; } -static int read_telegram(struct r3964_info *pInfo, pid_t pid, unsigned char *buf) +static int read_telegram(struct r3964_info *pInfo, pid_t pid, unsigned char __user *buf) { struct r3964_client_info *pClient; struct r3964_block_header *block; @@ -1185,7 +1185,7 @@ static void r3964_close(struct tty_struct *tty) } static ssize_t r3964_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t nr) + unsigned char __user *buf, size_t nr) { struct r3964_info *pInfo=(struct r3964_info*)tty->disc_data; struct r3964_client_info *pClient; @@ -1246,7 +1246,7 @@ repeat: } static ssize_t r3964_write(struct tty_struct * tty, struct file * file, - const unsigned char *data, size_t count) + const unsigned char __user *data, size_t count) { struct r3964_info *pInfo=(struct r3964_info*)tty->disc_data; struct r3964_block_header *pHeader; @@ -1348,7 +1348,7 @@ static int r3964_ioctl(struct tty_struct * tty, struct file * file, pInfo->flags &= ~R3964_BCC; return 0; case R3964_READ_TELEGRAM: - return read_telegram(pInfo, current->pid, (unsigned char *)arg); + return read_telegram(pInfo, current->pid, (unsigned char __user *)arg); default: return -ENOIOCTLCMD; } diff --git a/drivers/char/rocket.c b/drivers/char/rocket.c index b0da37eab8e7..be9c6943d549 100644 --- a/drivers/char/rocket.c +++ b/drivers/char/rocket.c @@ -1258,7 +1258,7 @@ static int rp_tiocmset(struct tty_struct *tty, struct file *file, return 0; } -static int get_config(struct r_port *info, struct rocket_config *retinfo) +static int get_config(struct r_port *info, struct rocket_config __user *retinfo) { struct rocket_config tmp; @@ -1276,7 +1276,7 @@ static int get_config(struct r_port *info, struct rocket_config *retinfo) return 0; } -static int set_config(struct r_port *info, struct rocket_config *new_info) +static int set_config(struct r_port *info, struct rocket_config __user *new_info) { struct rocket_config new_serial; @@ -1319,7 +1319,7 @@ static int set_config(struct r_port *info, struct rocket_config *new_info) * to user space. See setrocket.c where the info is used to create * the /dev/ttyRx ports. */ -static int get_ports(struct r_port *info, struct rocket_ports *retports) +static int get_ports(struct r_port *info, struct rocket_ports __user *retports) { struct rocket_ports tmp; int board; @@ -1341,11 +1341,11 @@ static int get_ports(struct r_port *info, struct rocket_ports *retports) return 0; } -static int reset_rm2(struct r_port *info, unsigned long arg) +static int reset_rm2(struct r_port *info, void __user *arg) { int reset; - if (copy_from_user(&reset, (void *) arg, sizeof (int))) + if (copy_from_user(&reset, arg, sizeof (int))) return -EFAULT; if (reset) reset = 1; @@ -1362,7 +1362,7 @@ static int reset_rm2(struct r_port *info, unsigned long arg) return 0; } -static int get_version(struct r_port *info, struct rocket_version *retvers) +static int get_version(struct r_port *info, struct rocket_version __user *retvers) { if (copy_to_user(retvers, &driver_version, sizeof (*retvers))) return -EFAULT; @@ -1374,25 +1374,26 @@ static int rp_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg) { struct r_port *info = (struct r_port *) tty->driver_data; + void __user *argp = (void __user *)arg; if (cmd != RCKP_GET_PORTS && rocket_paranoia_check(info, "rp_ioctl")) return -ENXIO; switch (cmd) { case RCKP_GET_STRUCT: - if (copy_to_user((void *) arg, info, sizeof (struct r_port))) + if (copy_to_user(argp, info, sizeof (struct r_port))) return -EFAULT; return 0; case RCKP_GET_CONFIG: - return get_config(info, (struct rocket_config *) arg); + return get_config(info, argp); case RCKP_SET_CONFIG: - return set_config(info, (struct rocket_config *) arg); + return set_config(info, argp); case RCKP_GET_PORTS: - return get_ports(info, (struct rocket_ports *) arg); + return get_ports(info, argp); case RCKP_RESET_RM2: - return reset_rm2(info, arg); + return reset_rm2(info, argp); case RCKP_GET_VERSION: - return get_version(info, (struct rocket_version *) arg); + return get_version(info, argp); default: return -ENOIOCTLCMD; } diff --git a/drivers/char/tipar.c b/drivers/char/tipar.c index 8cbf15bb51ac..5f821fe0b8a7 100644 --- a/drivers/char/tipar.c +++ b/drivers/char/tipar.c @@ -279,7 +279,7 @@ tipar_close(struct inode *inode, struct file *file) } static ssize_t -tipar_write(struct file *file, const char *buf, size_t count, loff_t * ppos) +tipar_write(struct file *file, const char __user *buf, size_t count, loff_t * ppos) { unsigned int minor = iminor(file->f_dentry->d_inode) - TIPAR_MINOR; ssize_t n; @@ -306,7 +306,7 @@ tipar_write(struct file *file, const char *buf, size_t count, loff_t * ppos) } static ssize_t -tipar_read(struct file *file, char *buf, size_t count, loff_t * ppos) +tipar_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) { int b = 0; unsigned int minor = iminor(file->f_dentry->d_inode) - TIPAR_MINOR; @@ -328,7 +328,7 @@ tipar_read(struct file *file, char *buf, size_t count, loff_t * ppos) retval = -ETIMEDOUT; goto out; } else { - if (put_user(b, ((unsigned char *) buf) + n)) { + if (put_user(b, buf + n)) { retval = -EFAULT; break; } else diff --git a/drivers/char/watchdog/indydog.c b/drivers/char/watchdog/indydog.c index 42363f353e71..cbd19e5a9478 100644 --- a/drivers/char/watchdog/indydog.c +++ b/drivers/char/watchdog/indydog.c @@ -22,16 +22,11 @@ #include <linux/notifier.h> #include <linux/reboot.h> #include <linux/init.h> -#include <linux/moduleparam.h> #include <asm/uaccess.h> -#include <asm/sgi/sgimc.h> +#include <asm/sgi/mc.h> #define PFX "indydog: " -#define WATCHDOG_HEARTBEAT 60 - -static unsigned long indydog_alive; -static struct sgimc_misc_ctrl *mcmisc_regs; -static char expect_close; +static int indydog_alive; #ifdef CONFIG_WATCHDOG_NOWAYOUT static int nowayout = 1; @@ -39,96 +34,78 @@ static int nowayout = 1; static int nowayout = 0; #endif +#define WATCHDOG_TIMEOUT 30 /* 30 sec default timeout */ + module_param(nowayout, int, 0); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); static void indydog_start(void) { - u32 mc_ctrl0 = mcmisc_regs->cpuctrl0; + u32 mc_ctrl0 = sgimc->cpuctrl0; - mc_ctrl0 |= SGIMC_CCTRL0_WDOG; - mcmisc_regs->cpuctrl0 = mc_ctrl0; - - printk(KERN_INFO PFX "Started watchdog timer.\n"); + mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG; + sgimc->cpuctrl0 = mc_ctrl0; } static void indydog_stop(void) { - u32 mc_ctrl0 = mcmisc_regs->cpuctrl0; + u32 mc_ctrl0 = sgimc->cpuctrl0; mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG; - mcmisc_regs->cpuctrl0 = mc_ctrl0; + sgimc->cpuctrl0 = mc_ctrl0; printk(KERN_INFO PFX "Stopped watchdog timer.\n"); } static void indydog_ping(void) { - mcmisc_regs->watchdogt = 0; + sgimc->watchdogt = 0; } /* * Allow only one person to hold it open */ - static int indydog_open(struct inode *inode, struct file *file) { - if( test_and_set_bit(0,&indydog_alive) ) + if (indydog_alive) return -EBUSY; if (nowayout) __module_get(THIS_MODULE); - /* - * Activate timer - */ + /* Activate timer */ indydog_start(); indydog_ping(); + indydog_alive = 1; + printk(KERN_INFO "Started watchdog timer.\n"); + return 0; } static int indydog_release(struct inode *inode, struct file *file) { - /* - * Shut off the timer. - * Lock it in if it's a module and we set nowayout - */ - - if (expect_close == 42) { - indydog_stop(); - } else { - printk(KERN_CRIT PFX "WDT device closed unexpectedly. WDT will not stop!\n"); - indydog_ping(); + /* Shut off the timer. + * Lock it in if it's a module and we defined ...NOWAYOUT */ + if (!nowayout) { + u32 mc_ctrl0 = sgimc->cpuctrl0; + mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG; + sgimc->cpuctrl0 = mc_ctrl0; + printk(KERN_INFO "Stopped watchdog timer.\n"); } - clear_bit(0,&indydog_alive); - expect_close = 0; + indydog_alive = 0; + return 0; } static ssize_t indydog_write(struct file *file, const char *data, size_t len, loff_t *ppos) { - /* Can't seek (pwrite) on this device */ + /* Can't seek (pwrite) on this device */ if (ppos != &file->f_pos) return -ESPIPE; /* Refresh the timer. */ if (len) { - if (!nowayout) { - size_t i; - - /* In case it was set long ago */ - expect_close = 0; - - for (i = 0; i != len; i++) { - char c; - - if (get_user(c, data + i)) - return -EFAULT; - if (c == 'V') - expect_close = 42; - } - } indydog_ping(); } return len; @@ -139,17 +116,18 @@ static int indydog_ioctl(struct inode *inode, struct file *file, { int options, retval = -EINVAL; static struct watchdog_info ident = { - .options = WDIOF_KEEPALIVEPING | - WDIOF_MAGICCLOSE, - .firmware_version = 0, - .identity = "Hardware Watchdog for SGI IP22", + .options = WDIOF_KEEPALIVEPING | + WDIOF_MAGICCLOSE, + .firmware_version = 0, + .identity = "Hardware Watchdog for SGI IP22", }; switch (cmd) { default: return -ENOIOCTLCMD; case WDIOC_GETSUPPORT: - if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident))) + if (copy_to_user((struct watchdog_info *)arg, + &ident, sizeof(ident))) return -EFAULT; return 0; case WDIOC_GETSTATUS: @@ -165,14 +143,12 @@ static int indydog_ioctl(struct inode *inode, struct file *file, if (get_user(options, (int *)arg)) return -EFAULT; - if (options & WDIOS_DISABLECARD) - { + if (options & WDIOS_DISABLECARD) { indydog_stop(); retval = 0; } - if (options & WDIOS_ENABLECARD) - { + if (options & WDIOS_ENABLECARD) { indydog_start(); retval = 0; } @@ -184,40 +160,37 @@ static int indydog_ioctl(struct inode *inode, struct file *file, static int indydog_notify_sys(struct notifier_block *this, unsigned long code, void *unused) { - if (code==SYS_DOWN || code==SYS_HALT) { - /* Turn the WDT off */ - indydog_stop(); - } + if (code == SYS_DOWN || code == SYS_HALT) + indydog_stop(); /* Turn the WDT off */ return NOTIFY_DONE; } static struct file_operations indydog_fops = { - .owner = THIS_MODULE, - .write = indydog_write, - .ioctl = indydog_ioctl, - .open = indydog_open, - .release= indydog_release, + .owner = THIS_MODULE, + .write = indydog_write, + .ioctl = indydog_ioctl, + .open = indydog_open, + .release = indydog_release, }; static struct miscdevice indydog_miscdev = { - .minor = WATCHDOG_MINOR, - .name = "watchdog", - .fops = &indydog_fops, + .minor = WATCHDOG_MINOR, + .name = "watchdog", + .fops = &indydog_fops, }; static struct notifier_block indydog_notifier = { .notifier_call = indydog_notify_sys, }; -static char banner[] __initdata = KERN_INFO PFX "Hardware Watchdog Timer for SGI IP22: 0.3\n"; +static char banner[] __initdata = + KERN_INFO PFX "Hardware Watchdog Timer for SGI IP22: 0.3\n"; static int __init watchdog_init(void) { int ret; - mcmisc_regs = (struct sgimc_misc_ctrl *)(KSEG1+0x1fa00000); - ret = register_reboot_notifier(&indydog_notifier); if (ret) { printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n", diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig index 8b1d16b9c1ad..fc96b0db3c4c 100644 --- a/drivers/ide/Kconfig +++ b/drivers/ide/Kconfig @@ -54,7 +54,7 @@ if IDE config IDE_MAX_HWIFS int "Max IDE interfaces" - depends on ALPHA + depends on ALPHA || SUPERH default 4 help This is the maximum number of IDE hardware interfaces that will diff --git a/drivers/ide/ide-taskfile.c b/drivers/ide/ide-taskfile.c index 98f4f3e4d573..3bdc35f24c8a 100644 --- a/drivers/ide/ide-taskfile.c +++ b/drivers/ide/ide-taskfile.c @@ -53,12 +53,6 @@ #define DEBUG_TASKFILE 0 /* unset when fixed */ -#if DEBUG_TASKFILE -#define DTF(x...) printk(x) -#else -#define DTF(x...) -#endif - static void ata_bswap_data (void *buffer, int wcount) { u16 *p = buffer; @@ -165,7 +159,7 @@ ide_startstop_t do_rw_taskfile (ide_drive_t *drive, ide_task_t *task) hwif->OUTB(taskfile->high_cylinder, IDE_HCYL_REG); hwif->OUTB((taskfile->device_head & HIHI) | drive->select.all, IDE_SELECT_REG); -#ifdef CONFIG_IDE_TASKFILE_IO + if (task->handler != NULL) { if (task->prehandler != NULL) { hwif->OUTBSYNC(drive, taskfile->command, IDE_COMMAND_REG); @@ -175,14 +169,6 @@ ide_startstop_t do_rw_taskfile (ide_drive_t *drive, ide_task_t *task) ide_execute_command(drive, taskfile->command, task->handler, WAIT_WORSTCASE, NULL); return ide_started; } -#else - if (task->handler != NULL) { - ide_execute_command(drive, taskfile->command, task->handler, WAIT_WORSTCASE, NULL); - if (task->prehandler != NULL) - return task->prehandler(drive, task->rq); - return ide_started; - } -#endif if (!drive->using_dma) return ide_stopped; @@ -283,8 +269,6 @@ ide_startstop_t task_no_data_intr (ide_drive_t *drive) local_irq_enable(); if (!OK_STAT(stat = hwif->INB(IDE_STATUS_REG),READY_STAT,BAD_STAT)) { - DTF("%s: command opcode 0x%02x\n", drive->name, - args->tfRegister[IDE_COMMAND_OFFSET]); return DRIVER(drive)->error(drive, "task_no_data_intr", stat); /* calls ide_end_drive_cmd */ } @@ -296,6 +280,29 @@ ide_startstop_t task_no_data_intr (ide_drive_t *drive) EXPORT_SYMBOL(task_no_data_intr); +static void task_buffer_sectors(ide_drive_t *drive, struct request *rq, + unsigned nsect, unsigned rw) +{ + char *buf = rq->buffer + blk_rq_offset(rq); + + rq->sector += nsect; + rq->current_nr_sectors -= nsect; + rq->nr_sectors -= nsect; + __task_sectors(drive, buf, nsect, rw); +} + +static inline void task_buffer_multi_sectors(ide_drive_t *drive, + struct request *rq, unsigned rw) +{ + unsigned int msect = drive->mult_count, nsect; + + nsect = rq->current_nr_sectors; + if (nsect > msect) + nsect = msect; + + task_buffer_sectors(drive, rq, nsect, rw); +} + /* * old taskfile PIO handlers, to be killed as soon as possible. */ @@ -308,7 +315,6 @@ ide_startstop_t task_in_intr (ide_drive_t *drive) { struct request *rq = HWGROUP(drive)->rq; ide_hwif_t *hwif = HWIF(drive); - char *pBuf = NULL; u8 stat; if (!OK_STAT(stat = hwif->INB(IDE_STATUS_REG),DATA_READY,BAD_R_STAT)) { @@ -316,28 +322,18 @@ ide_startstop_t task_in_intr (ide_drive_t *drive) return DRIVER(drive)->error(drive, "task_in_intr", stat); } if (!(stat & BUSY_STAT)) { - DTF("task_in_intr to Soon wait for next interrupt\n"); - if (HWGROUP(drive)->handler == NULL) - ide_set_handler(drive, &task_in_intr, WAIT_WORSTCASE, NULL); + ide_set_handler(drive, &task_in_intr, WAIT_WORSTCASE, NULL); return ide_started; } } - pBuf = rq->buffer + task_rq_offset(rq); - DTF("Read: %p, rq->current_nr_sectors: %d, stat: %02x\n", - pBuf, (int) rq->current_nr_sectors, stat); - taskfile_input_data(drive, pBuf, SECTOR_WORDS); + task_buffer_sectors(drive, rq, 1, IDE_PIO_IN); /* FIXME: check drive status */ - if (--rq->current_nr_sectors <= 0) + if (!rq->current_nr_sectors) if (!DRIVER(drive)->end_request(drive, 1, 0)) return ide_stopped; - /* - * ERM, it is techincally legal to leave/exit here but it makes - * a mess of the code ... - */ - if (HWGROUP(drive)->handler == NULL) - ide_set_handler(drive, &task_in_intr, WAIT_WORSTCASE, NULL); + ide_set_handler(drive, &task_in_intr, WAIT_WORSTCASE, NULL); return ide_started; } @@ -350,9 +346,6 @@ ide_startstop_t task_mulin_intr (ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct request *rq = HWGROUP(drive)->rq; - char *pBuf = NULL; - unsigned int msect = drive->mult_count; - unsigned int nsect; u8 stat; if (!OK_STAT(stat = hwif->INB(IDE_STATUS_REG),DATA_READY,BAD_R_STAT)) { @@ -360,32 +353,19 @@ ide_startstop_t task_mulin_intr (ide_drive_t *drive) return DRIVER(drive)->error(drive, "task_mulin_intr", stat); } /* no data yet, so wait for another interrupt */ - if (HWGROUP(drive)->handler == NULL) - ide_set_handler(drive, &task_mulin_intr, WAIT_WORSTCASE, NULL); + ide_set_handler(drive, &task_mulin_intr, WAIT_WORSTCASE, NULL); return ide_started; } - do { - nsect = rq->current_nr_sectors; - if (nsect > msect) - nsect = msect; - pBuf = rq->buffer + task_rq_offset(rq); - DTF("Multiread: %p, nsect: %d, msect: %d, " \ - " rq->current_nr_sectors: %d\n", - pBuf, nsect, msect, rq->current_nr_sectors); - taskfile_input_data(drive, pBuf, nsect * SECTOR_WORDS); - rq->errors = 0; - rq->current_nr_sectors -= nsect; - msect -= nsect; + task_buffer_multi_sectors(drive, rq, IDE_PIO_IN); - /* FIXME: check drive status */ - if (!rq->current_nr_sectors) { - if (!DRIVER(drive)->end_request(drive, 1, 0)) - return ide_stopped; - } - } while (msect); - if (HWGROUP(drive)->handler == NULL) - ide_set_handler(drive, &task_mulin_intr, WAIT_WORSTCASE, NULL); + /* FIXME: check drive status */ + if (!rq->current_nr_sectors) { + DRIVER(drive)->end_request(drive, 1, 0); + return ide_stopped; + } + + ide_set_handler(drive, &task_mulin_intr, WAIT_WORSTCASE, NULL); return ide_started; } @@ -407,8 +387,9 @@ ide_startstop_t pre_task_out_intr (ide_drive_t *drive, struct request *rq) return startstop; } /* For Write_sectors we need to stuff the first sector */ - taskfile_output_data(drive, rq->buffer + task_rq_offset(rq), SECTOR_WORDS); - rq->current_nr_sectors--; + ide_set_handler(drive, &task_out_intr, WAIT_WORSTCASE, NULL); + task_buffer_sectors(drive, rq, 1, IDE_PIO_OUT); + return ide_started; } @@ -423,7 +404,6 @@ ide_startstop_t task_out_intr (ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct request *rq = HWGROUP(drive)->rq; - char *pBuf = NULL; u8 stat; if (!OK_STAT(stat = hwif->INB(IDE_STATUS_REG), DRIVE_READY, drive->bad_wstat)) { @@ -437,16 +417,9 @@ ide_startstop_t task_out_intr (ide_drive_t *drive) if (!DRIVER(drive)->end_request(drive, 1, 0)) return ide_stopped; if ((rq->current_nr_sectors==1) ^ (stat & DRQ_STAT)) { - rq = HWGROUP(drive)->rq; - pBuf = rq->buffer + task_rq_offset(rq); - DTF("write: %p, rq->current_nr_sectors: %d\n", - pBuf, (int) rq->current_nr_sectors); - taskfile_output_data(drive, pBuf, SECTOR_WORDS); - rq->errors = 0; - rq->current_nr_sectors--; + task_buffer_sectors(drive, rq, 1, IDE_PIO_OUT); } - if (HWGROUP(drive)->handler == NULL) - ide_set_handler(drive, &task_out_intr, WAIT_WORSTCASE, NULL); + ide_set_handler(drive, &task_out_intr, WAIT_WORSTCASE, NULL); return ide_started; } @@ -454,7 +427,6 @@ EXPORT_SYMBOL(task_out_intr); ide_startstop_t pre_task_mulout_intr (ide_drive_t *drive, struct request *rq) { - ide_task_t *args = rq->special; ide_startstop_t startstop; if (ide_wait_stat(&startstop, drive, DATA_READY, @@ -472,28 +444,22 @@ ide_startstop_t pre_task_mulout_intr (ide_drive_t *drive, struct request *rq) } } - /* - * WARNING :: if the drive as not acked good status we may not - * move the DATA-TRANSFER T-Bar as BSY != 0. <andre@linux-ide.org> - */ - return args->handler(drive); + ide_set_handler(drive, &task_mulout_intr, WAIT_WORSTCASE, NULL); + task_buffer_multi_sectors(drive, rq, IDE_PIO_OUT); + + return ide_started; } EXPORT_SYMBOL(pre_task_mulout_intr); /* * Handler for command write multiple - * Called directly from execute_drive_cmd for the first bunch of sectors, - * afterwards only by the ISR */ ide_startstop_t task_mulout_intr (ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); u8 stat = hwif->INB(IDE_STATUS_REG); struct request *rq = HWGROUP(drive)->rq; - char *pBuf = NULL; - unsigned int msect = drive->mult_count; - unsigned int nsect; if (!OK_STAT(stat, DATA_READY, BAD_R_STAT) || !rq->current_nr_sectors) { if (stat & (ERR_STAT|DRQ_STAT)) { @@ -505,47 +471,58 @@ ide_startstop_t task_mulout_intr (ide_drive_t *drive) return ide_stopped; } /* no data yet, so wait for another interrupt */ - if (HWGROUP(drive)->handler == NULL) - ide_set_handler(drive, &task_mulout_intr, WAIT_WORSTCASE, NULL); + ide_set_handler(drive, &task_mulout_intr, WAIT_WORSTCASE, NULL); return ide_started; } - if (HWGROUP(drive)->handler != NULL) { - unsigned long lflags; - spin_lock_irqsave(&ide_lock, lflags); - HWGROUP(drive)->handler = NULL; - del_timer(&HWGROUP(drive)->timer); - spin_unlock_irqrestore(&ide_lock, lflags); - } + task_buffer_multi_sectors(drive, rq, IDE_PIO_OUT); + ide_set_handler(drive, &task_mulout_intr, WAIT_WORSTCASE, NULL); + + return ide_started; +} + +EXPORT_SYMBOL(task_mulout_intr); + +#else /* !CONFIG_IDE_TASKFILE_IO */ + +static void task_sectors(ide_drive_t *drive, struct request *rq, + unsigned nsect, unsigned rw) +{ + if (rq->cbio) { /* fs request */ + rq->errors = 0; + task_bio_sectors(drive, rq, nsect, rw); + } else /* task request */ + task_buffer_sectors(drive, rq, nsect, rw); +} + +static inline void task_bio_multi_sectors(ide_drive_t *drive, + struct request *rq, unsigned rw) +{ + unsigned int nsect, msect = drive->mult_count; do { nsect = rq->current_nr_sectors; if (nsect > msect) nsect = msect; - pBuf = rq->buffer + task_rq_offset(rq); - DTF("Multiwrite: %p, nsect: %d, msect: %d, " \ - "rq->current_nr_sectors: %ld\n", - pBuf, nsect, msect, rq->current_nr_sectors); - msect -= nsect; - taskfile_output_data(drive, pBuf, nsect * SECTOR_WORDS); - rq->current_nr_sectors -= nsect; - - /* FIXME: check drive status */ - if (!rq->current_nr_sectors) { - if (!DRIVER(drive)->end_request(drive, 1, 0)) - if (!rq->bio) - return ide_stopped; - } + + task_bio_sectors(drive, rq, nsect, rw); + + if (!rq->nr_sectors) + msect = 0; + else + msect -= nsect; } while (msect); - rq->errors = 0; - if (HWGROUP(drive)->handler == NULL) - ide_set_handler(drive, &task_mulout_intr, WAIT_WORSTCASE, NULL); - return ide_started; } -EXPORT_SYMBOL(task_mulout_intr); - -#else /* !CONFIG_IDE_TASKFILE_IO */ +static void task_multi_sectors(ide_drive_t *drive, + struct request *rq, unsigned rw) +{ + if (rq->cbio) { /* fs request */ + rq->errors = 0; + task_bio_multi_sectors(drive, rq, rw); + } else /* task request */ + task_buffer_multi_sectors(drive, rq, rw); +} static u8 wait_drive_not_busy(ide_drive_t *drive) { @@ -573,19 +550,16 @@ static u8 wait_drive_not_busy(ide_drive_t *drive) ide_startstop_t task_in_intr (ide_drive_t *drive) { struct request *rq = HWGROUP(drive)->rq; - u8 stat, good_stat; + u8 stat = HWIF(drive)->INB(IDE_STATUS_REG); - good_stat = DATA_READY; - stat = HWIF(drive)->INB(IDE_STATUS_REG); -check_status: - if (!OK_STAT(stat, good_stat, BAD_R_STAT)) { + if (!OK_STAT(stat, DATA_READY, BAD_R_STAT)) { if (stat & (ERR_STAT | DRQ_STAT)) return DRIVER(drive)->error(drive, __FUNCTION__, stat); /* BUSY_STAT: No data yet, so wait for another IRQ. */ ide_set_handler(drive, &task_in_intr, WAIT_WORSTCASE, NULL); return ide_started; } - +finish_rq: /* * Complete previously submitted bios (if any). * Status was already verifyied. @@ -595,18 +569,18 @@ check_status: return ide_stopped; /* Complete rq->buffer based request (ioctls). */ if (!rq->bio && !rq->nr_sectors) { - ide_end_drive_cmd(drive, stat, HWIF(drive)->INB(IDE_ERROR_REG)); + DRIVER(drive)->end_request(drive, 1, 0); return ide_stopped; } - rq->errors = 0; task_sectors(drive, rq, 1, IDE_PIO_IN); /* If it was the last datablock check status and finish transfer. */ if (!rq->nr_sectors) { - good_stat = 0; stat = wait_drive_not_busy(drive); - goto check_status; + if (!OK_STAT(stat, 0, BAD_R_STAT)) + return DRIVER(drive)->error(drive, __FUNCTION__, stat); + goto finish_rq; } /* Still data left to transfer. */ @@ -622,21 +596,16 @@ EXPORT_SYMBOL(task_in_intr); ide_startstop_t task_mulin_intr (ide_drive_t *drive) { struct request *rq = HWGROUP(drive)->rq; - unsigned int msect = drive->mult_count; - unsigned int nsect; - u8 stat, good_stat; + u8 stat = HWIF(drive)->INB(IDE_STATUS_REG); - good_stat = DATA_READY; - stat = HWIF(drive)->INB(IDE_STATUS_REG); -check_status: - if (!OK_STAT(stat, good_stat, BAD_R_STAT)) { + if (!OK_STAT(stat, DATA_READY, BAD_R_STAT)) { if (stat & (ERR_STAT | DRQ_STAT)) return DRIVER(drive)->error(drive, __FUNCTION__, stat); /* BUSY_STAT: No data yet, so wait for another IRQ. */ ide_set_handler(drive, &task_mulin_intr, WAIT_WORSTCASE, NULL); return ide_started; } - +finish_rq: /* * Complete previously submitted bios (if any). * Status was already verifyied. @@ -646,29 +615,18 @@ check_status: return ide_stopped; /* Complete rq->buffer based request (ioctls). */ if (!rq->bio && !rq->nr_sectors) { - ide_end_drive_cmd(drive, stat, HWIF(drive)->INB(IDE_ERROR_REG)); + DRIVER(drive)->end_request(drive, 1, 0); return ide_stopped; } - rq->errors = 0; - do { - nsect = rq->current_nr_sectors; - if (nsect > msect) - nsect = msect; - - task_sectors(drive, rq, nsect, IDE_PIO_IN); - - if (!rq->nr_sectors) - msect = 0; - else - msect -= nsect; - } while (msect); + task_multi_sectors(drive, rq, IDE_PIO_IN); /* If it was the last datablock check status and finish transfer. */ if (!rq->nr_sectors) { - good_stat = 0; stat = wait_drive_not_busy(drive); - goto check_status; + if (!OK_STAT(stat, 0, BAD_R_STAT)) + return DRIVER(drive)->error(drive, __FUNCTION__, stat); + goto finish_rq; } /* Still data left to transfer. */ @@ -712,14 +670,12 @@ ide_startstop_t task_out_intr (ide_drive_t *drive) return ide_stopped; /* Complete rq->buffer based request (ioctls). */ if (!rq->bio && !rq->nr_sectors) { - ide_end_drive_cmd(drive, stat, HWIF(drive)->INB(IDE_ERROR_REG)); + DRIVER(drive)->end_request(drive, 1, 0); return ide_stopped; } /* Still data left to transfer. */ ide_set_handler(drive, &task_out_intr, WAIT_WORSTCASE, NULL); - - rq->errors = 0; task_sectors(drive, rq, 1, IDE_PIO_OUT); return ide_started; @@ -751,8 +707,6 @@ EXPORT_SYMBOL(pre_task_out_intr); ide_startstop_t task_mulout_intr (ide_drive_t *drive) { struct request *rq = HWGROUP(drive)->rq; - unsigned int msect = drive->mult_count; - unsigned int nsect; u8 stat; stat = HWIF(drive)->INB(IDE_STATUS_REG); @@ -781,26 +735,13 @@ ide_startstop_t task_mulout_intr (ide_drive_t *drive) return ide_stopped; /* Complete rq->buffer based request (ioctls). */ if (!rq->bio && !rq->nr_sectors) { - ide_end_drive_cmd(drive, stat, HWIF(drive)->INB(IDE_ERROR_REG)); + DRIVER(drive)->end_request(drive, 1, 0); return ide_stopped; } /* Still data left to transfer. */ ide_set_handler(drive, &task_mulout_intr, WAIT_WORSTCASE, NULL); - - rq->errors = 0; - do { - nsect = rq->current_nr_sectors; - if (nsect > msect) - nsect = msect; - - task_sectors(drive, rq, nsect, IDE_PIO_OUT); - - if (!rq->nr_sectors) - msect = 0; - else - msect -= nsect; - } while (msect); + task_multi_sectors(drive, rq, IDE_PIO_OUT); return ide_started; } @@ -1201,6 +1142,14 @@ ide_startstop_t flagged_taskfile (ide_drive_t *drive, ide_task_t *task) void debug_taskfile(drive, task); #endif /* CONFIG_IDE_TASK_IOCTL_DEBUG */ + if (task->data_phase == TASKFILE_MULTI_IN || + task->data_phase == TASKFILE_MULTI_OUT) { + if (!drive->mult_count) { + printk(KERN_ERR "%s: multimode not set!\n", drive->name); + return ide_stopped; + } + } + /* * (ks) Check taskfile in/out flags. * If set, then execute as it is defined. @@ -1333,7 +1282,6 @@ ide_startstop_t flagged_task_in_intr (ide_drive_t *drive) ide_hwif_t *hwif = HWIF(drive); u8 stat = hwif->INB(IDE_STATUS_REG); struct request *rq = HWGROUP(drive)->rq; - char *pBuf = NULL; int retries = 5; if (!OK_STAT(stat, DATA_READY, BAD_R_STAT)) { @@ -1349,12 +1297,9 @@ ide_startstop_t flagged_task_in_intr (ide_drive_t *drive) return DRIVER(drive)->error(drive, "flagged_task_in_intr (unexpected data phase)", stat); } - pBuf = rq->buffer + ((rq->nr_sectors - rq->current_nr_sectors) * SECTOR_SIZE); - DTF("Read - rq->current_nr_sectors: %d, status: %02x\n", (int) rq->current_nr_sectors, stat); - - taskfile_input_data(drive, pBuf, SECTOR_WORDS); + task_buffer_sectors(drive, rq, 1, IDE_PIO_IN); - if (--rq->current_nr_sectors != 0) { + if (rq->current_nr_sectors) { /* * (ks) We don't know which command was executed. * So, we wait the 'WORSTCASE' value. @@ -1378,13 +1323,7 @@ ide_startstop_t flagged_task_mulin_intr (ide_drive_t *drive) ide_hwif_t *hwif = HWIF(drive); u8 stat = hwif->INB(IDE_STATUS_REG); struct request *rq = HWGROUP(drive)->rq; - char *pBuf = NULL; int retries = 5; - unsigned int msect, nsect; - - msect = drive->mult_count; - if (msect == 0) - return DRIVER(drive)->error(drive, "flagged_task_mulin_intr (multimode not set)", stat); if (!OK_STAT(stat, DATA_READY, BAD_R_STAT)) { if (stat & ERR_STAT) { @@ -1399,15 +1338,8 @@ ide_startstop_t flagged_task_mulin_intr (ide_drive_t *drive) return DRIVER(drive)->error(drive, "flagged_task_mulin_intr (unexpected data phase)", stat); } - nsect = (rq->current_nr_sectors > msect) ? msect : rq->current_nr_sectors; - pBuf = rq->buffer + ((rq->nr_sectors - rq->current_nr_sectors) * SECTOR_SIZE); - - DTF("Multiread: %p, nsect: %d , rq->current_nr_sectors: %ld\n", - pBuf, nsect, rq->current_nr_sectors); + task_buffer_multi_sectors(drive, rq, IDE_PIO_IN); - taskfile_input_data(drive, pBuf, nsect * SECTOR_WORDS); - - rq->current_nr_sectors -= nsect; if (rq->current_nr_sectors != 0) { /* * (ks) We don't know which command was executed. @@ -1441,8 +1373,7 @@ ide_startstop_t flagged_pre_task_out_intr (ide_drive_t *drive, struct request *r return startstop; } - taskfile_output_data(drive, rq->buffer, SECTOR_WORDS); - --rq->current_nr_sectors; + task_buffer_sectors(drive, rq, 1, IDE_PIO_OUT); return ide_started; } @@ -1452,7 +1383,6 @@ ide_startstop_t flagged_task_out_intr (ide_drive_t *drive) ide_hwif_t *hwif = HWIF(drive); u8 stat = hwif->INB(IDE_STATUS_REG); struct request *rq = HWGROUP(drive)->rq; - char *pBuf = NULL; if (!OK_STAT(stat, DRIVE_READY, BAD_W_STAT)) return DRIVER(drive)->error(drive, "flagged_task_out_intr", stat); @@ -1472,12 +1402,7 @@ ide_startstop_t flagged_task_out_intr (ide_drive_t *drive) return DRIVER(drive)->error(drive, "flagged_task_out_intr (unexpected data phase)", stat); } - pBuf = rq->buffer + ((rq->nr_sectors - rq->current_nr_sectors) * SECTOR_SIZE); - DTF("Write - rq->current_nr_sectors: %d, status: %02x\n", - (int) rq->current_nr_sectors, stat); - - taskfile_output_data(drive, pBuf, SECTOR_WORDS); - --rq->current_nr_sectors; + task_buffer_sectors(drive, rq, 1, IDE_PIO_OUT); /* * (ks) We don't know which command was executed. @@ -1490,15 +1415,7 @@ ide_startstop_t flagged_task_out_intr (ide_drive_t *drive) ide_startstop_t flagged_pre_task_mulout_intr (ide_drive_t *drive, struct request *rq) { - ide_hwif_t *hwif = HWIF(drive); - u8 stat = hwif->INB(IDE_STATUS_REG); - char *pBuf = NULL; ide_startstop_t startstop; - unsigned int msect, nsect; - - msect = drive->mult_count; - if (msect == 0) - return DRIVER(drive)->error(drive, "flagged_pre_task_mulout_intr (multimode not set)", stat); if (ide_wait_stat(&startstop, drive, DATA_READY, BAD_W_STAT, WAIT_DRQ)) { @@ -1506,14 +1423,7 @@ ide_startstop_t flagged_pre_task_mulout_intr (ide_drive_t *drive, struct request return startstop; } - nsect = (rq->current_nr_sectors > msect) ? msect : rq->current_nr_sectors; - pBuf = rq->buffer + ((rq->nr_sectors - rq->current_nr_sectors) * SECTOR_SIZE); - DTF("Multiwrite: %p, nsect: %d , rq->current_nr_sectors: %ld\n", - pBuf, nsect, rq->current_nr_sectors); - - taskfile_output_data(drive, pBuf, nsect * SECTOR_WORDS); - - rq->current_nr_sectors -= nsect; + task_buffer_multi_sectors(drive, rq, IDE_PIO_OUT); return ide_started; } @@ -1523,12 +1433,6 @@ ide_startstop_t flagged_task_mulout_intr (ide_drive_t *drive) ide_hwif_t *hwif = HWIF(drive); u8 stat = hwif->INB(IDE_STATUS_REG); struct request *rq = HWGROUP(drive)->rq; - char *pBuf = NULL; - unsigned int msect, nsect; - - msect = drive->mult_count; - if (msect == 0) - return DRIVER(drive)->error(drive, "flagged_task_mulout_intr (multimode not set)", stat); if (!OK_STAT(stat, DRIVE_READY, BAD_W_STAT)) return DRIVER(drive)->error(drive, "flagged_task_mulout_intr", stat); @@ -1548,13 +1452,7 @@ ide_startstop_t flagged_task_mulout_intr (ide_drive_t *drive) return DRIVER(drive)->error(drive, "flagged_task_mulout_intr (unexpected data phase)", stat); } - nsect = (rq->current_nr_sectors > msect) ? msect : rq->current_nr_sectors; - pBuf = rq->buffer + ((rq->nr_sectors - rq->current_nr_sectors) * SECTOR_SIZE); - DTF("Multiwrite: %p, nsect: %d , rq->current_nr_sectors: %ld\n", - pBuf, nsect, rq->current_nr_sectors); - - taskfile_output_data(drive, pBuf, nsect * SECTOR_WORDS); - rq->current_nr_sectors -= nsect; + task_buffer_multi_sectors(drive, rq, IDE_PIO_OUT); /* * (ks) We don't know which command was executed. diff --git a/drivers/ide/legacy/ide-cs.c b/drivers/ide/legacy/ide-cs.c index fb7ae0006249..0634a279505d 100644 --- a/drivers/ide/legacy/ide-cs.c +++ b/drivers/ide/legacy/ide-cs.c @@ -199,6 +199,16 @@ static void ide_detach(dev_link_t *link) } /* ide_detach */ +static int idecs_register(unsigned long io, unsigned long ctl, unsigned long irq) +{ + hw_regs_t hw; + memset(&hw, 0, sizeof(hw)); + ide_init_hwif_ports(&hw, io, ctl, NULL); + hw.irq = irq; + hw.chipset = ide_pci; + return ide_register_hw(&hw, NULL); +} + /*====================================================================== ide_config() is scheduled to run after a CARD_INSERTION event @@ -210,84 +220,82 @@ static void ide_detach(dev_link_t *link) #define CS_CHECK(fn, ret) \ do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) -static int idecs_register(unsigned long io, unsigned long ctl, unsigned long irq) -{ - hw_regs_t hw; - memset(&hw, 0, sizeof(hw)); - ide_init_hwif_ports(&hw, io, ctl, NULL); - hw.irq = irq; - hw.chipset = ide_pci; - return ide_register_hw(&hw, NULL); -} - void ide_config(dev_link_t *link) { client_handle_t handle = link->handle; ide_info_t *info = link->priv; tuple_t tuple; - u_short buf[128]; - cisparse_t parse; - config_info_t conf; - cistpl_cftable_entry_t *cfg = &parse.cftable_entry; - cistpl_cftable_entry_t dflt = { 0 }; - int i, pass, last_ret, last_fn, hd, is_kme = 0; + struct { + u_short buf[128]; + cisparse_t parse; + config_info_t conf; + cistpl_cftable_entry_t dflt; + } *stk = 0; + cistpl_cftable_entry_t *cfg; + int i, pass, last_ret = 0, last_fn = 0, hd, is_kme = 0; unsigned long io_base, ctl_base; DEBUG(0, "ide_config(0x%p)\n", link); - - tuple.TupleData = (cisdata_t *)buf; - tuple.TupleOffset = 0; tuple.TupleDataMax = 255; + + stk = kmalloc(sizeof(*stk), GFP_KERNEL); + if (!stk) goto err_mem; + memset(stk, 0, sizeof(*stk)); + cfg = &stk->parse.cftable_entry; + + tuple.TupleData = (cisdata_t *)&stk->buf; + tuple.TupleOffset = 0; + tuple.TupleDataMax = 255; tuple.Attributes = 0; tuple.DesiredTuple = CISTPL_CONFIG; CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple)); CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple)); - CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse)); - link->conf.ConfigBase = parse.config.base; - link->conf.Present = parse.config.rmask[0]; + CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &stk->parse)); + link->conf.ConfigBase = stk->parse.config.base; + link->conf.Present = stk->parse.config.rmask[0]; tuple.DesiredTuple = CISTPL_MANFID; if (!pcmcia_get_first_tuple(handle, &tuple) && !pcmcia_get_tuple_data(handle, &tuple) && - !pcmcia_parse_tuple(handle, &tuple, &parse)) - is_kme = ((parse.manfid.manf == MANFID_KME) && - ((parse.manfid.card == PRODID_KME_KXLC005_A) || - (parse.manfid.card == PRODID_KME_KXLC005_B))); + !pcmcia_parse_tuple(handle, &tuple, &stk->parse)) + is_kme = ((stk->parse.manfid.manf == MANFID_KME) && + ((stk->parse.manfid.card == PRODID_KME_KXLC005_A) || + (stk->parse.manfid.card == PRODID_KME_KXLC005_B))); /* Configure card */ link->state |= DEV_CONFIG; /* Not sure if this is right... look up the current Vcc */ - CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &conf)); - link->conf.Vcc = conf.Vcc; - + CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &stk->conf)); + link->conf.Vcc = stk->conf.Vcc; + pass = io_base = ctl_base = 0; tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY; tuple.Attributes = 0; CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple)); while (1) { if (pcmcia_get_tuple_data(handle, &tuple) != 0) goto next_entry; - if (pcmcia_parse_tuple(handle, &tuple, &parse) != 0) goto next_entry; + if (pcmcia_parse_tuple(handle, &tuple, &stk->parse) != 0) goto next_entry; /* Check for matching Vcc, unless we're desperate */ if (!pass) { - if (cfg->vcc.present & (1<<CISTPL_POWER_VNOM)) { - if (conf.Vcc != cfg->vcc.param[CISTPL_POWER_VNOM]/10000) + if (cfg->vcc.present & (1 << CISTPL_POWER_VNOM)) { + if (stk->conf.Vcc != cfg->vcc.param[CISTPL_POWER_VNOM] / 10000) goto next_entry; - } else if (dflt.vcc.present & (1<<CISTPL_POWER_VNOM)) { - if (conf.Vcc != dflt.vcc.param[CISTPL_POWER_VNOM]/10000) + } else if (stk->dflt.vcc.present & (1 << CISTPL_POWER_VNOM)) { + if (stk->conf.Vcc != stk->dflt.vcc.param[CISTPL_POWER_VNOM] / 10000) goto next_entry; } } - - if (cfg->vpp1.present & (1<<CISTPL_POWER_VNOM)) + + if (cfg->vpp1.present & (1 << CISTPL_POWER_VNOM)) link->conf.Vpp1 = link->conf.Vpp2 = - cfg->vpp1.param[CISTPL_POWER_VNOM]/10000; - else if (dflt.vpp1.present & (1<<CISTPL_POWER_VNOM)) + cfg->vpp1.param[CISTPL_POWER_VNOM] / 10000; + else if (stk->dflt.vpp1.present & (1 << CISTPL_POWER_VNOM)) link->conf.Vpp1 = link->conf.Vpp2 = - dflt.vpp1.param[CISTPL_POWER_VNOM]/10000; - - if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) { - cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io; + stk->dflt.vpp1.param[CISTPL_POWER_VNOM] / 10000; + + if ((cfg->io.nwin > 0) || (stk->dflt.io.nwin > 0)) { + cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &stk->dflt.io; link->conf.ConfigIndex = cfg->index; link->io.BasePort1 = io->win[0].base; link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK; @@ -307,23 +315,24 @@ void ide_config(dev_link_t *link) if (pcmcia_request_io(link->handle, &link->io) != 0) goto next_entry; io_base = link->io.BasePort1; - ctl_base = link->io.BasePort1+0x0e; + ctl_base = link->io.BasePort1 + 0x0e; } else goto next_entry; /* If we've got this far, we're done */ break; } - + next_entry: - if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg; + if (cfg->flags & CISTPL_CFTABLE_DEFAULT) + memcpy(&stk->dflt, cfg, sizeof(stk->dflt)); if (pass) { CS_CHECK(GetNextTuple, pcmcia_get_next_tuple(handle, &tuple)); } else if (pcmcia_get_next_tuple(handle, &tuple) != 0) { CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple)); - memset(&dflt, 0, sizeof(dflt)); + memset(&stk->dflt, 0, sizeof(stk->dflt)); pass++; } } - + CS_CHECK(RequestIRQ, pcmcia_request_irq(handle, &link->irq)); CS_CHECK(RequestConfiguration, pcmcia_request_configuration(handle, &link->conf)); @@ -336,25 +345,27 @@ void ide_config(dev_link_t *link) outb(0x02, ctl_base); /* special setup for KXLC005 card */ - if (is_kme) outb(0x81, ctl_base+1); + if (is_kme) + outb(0x81, ctl_base+1); /* retry registration in case device is still spinning up */ for (hd = -1, i = 0; i < 10; i++) { hd = idecs_register(io_base, ctl_base, link->irq.AssignedIRQ); if (hd >= 0) break; if (link->io.NumPorts1 == 0x20) { - outb(0x02, ctl_base+0x10); - hd = idecs_register(io_base+0x10, ctl_base+0x10, + outb(0x02, ctl_base + 0x10); + hd = idecs_register(io_base + 0x10, ctl_base + 0x10, link->irq.AssignedIRQ); if (hd >= 0) { - io_base += 0x10; ctl_base += 0x10; + io_base += 0x10; + ctl_base += 0x10; break; } } __set_current_state(TASK_UNINTERRUPTIBLE); schedule_timeout(HZ/10); } - + if (hd < 0) { printk(KERN_NOTICE "ide-cs: ide_register() at 0x%3lx & 0x%3lx" ", irq %u failed\n", io_base, ctl_base, @@ -363,24 +374,29 @@ void ide_config(dev_link_t *link) } info->ndev = 1; - sprintf(info->node.dev_name, "hd%c", 'a'+(hd*2)); + sprintf(info->node.dev_name, "hd%c", 'a' + (hd * 2)); info->node.major = ide_major[hd]; info->node.minor = 0; info->hd = hd; link->dev = &info->node; printk(KERN_INFO "ide-cs: %s: Vcc = %d.%d, Vpp = %d.%d\n", - info->node.dev_name, link->conf.Vcc/10, link->conf.Vcc%10, - link->conf.Vpp1/10, link->conf.Vpp1%10); + info->node.dev_name, link->conf.Vcc / 10, link->conf.Vcc % 10, + link->conf.Vpp1 / 10, link->conf.Vpp1 % 10); link->state &= ~DEV_CONFIG_PENDING; + kfree(stk); return; - + +err_mem: + printk(KERN_NOTICE "ide-cs: ide_config failed memory allocation\n"); + goto failed; + cs_failed: cs_error(link->handle, last_fn, last_ret); failed: + kfree(stk); ide_release(link); link->state &= ~DEV_CONFIG_PENDING; - } /* ide_config */ /*====================================================================== diff --git a/drivers/ide/legacy/pdc4030.c b/drivers/ide/legacy/pdc4030.c index 73e833d0f9b0..c07d341d1c74 100644 --- a/drivers/ide/legacy/pdc4030.c +++ b/drivers/ide/legacy/pdc4030.c @@ -355,7 +355,7 @@ read_next: #endif /* DEBUG_READ */ #ifdef CONFIG_IDE_TASKFILE_IO - task_sectors(drive, rq, nsect, IDE_PIO_IN); + task_bio_sectors(drive, rq, nsect, IDE_PIO_IN); /* FIXME: can we check status after transfer on pdc4030? */ /* Complete previously submitted bios. */ @@ -478,7 +478,7 @@ static void promise_multwrite (ide_drive_t *drive, unsigned int msect) if (nsect > msect) nsect = msect; - task_sectors(drive, rq, nsect, IDE_PIO_OUT); + task_bio_sectors(drive, rq, nsect, IDE_PIO_OUT); if (!rq->nr_sectors) msect = 0; diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index 77bc20861dd1..6c25d34b8939 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c @@ -292,7 +292,7 @@ static unsigned int pci_bus_clock_list (u8 speed, struct chipset_bus_clock_list_ return chipset_table->chipset_settings; } -static void hpt366_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed) { struct pci_dev *dev = HWIF(drive)->pci_dev; u8 speed = hpt3xx_ratefilter(drive, xferspeed); @@ -329,14 +329,11 @@ static void hpt366_tune_chipset (ide_drive_t *drive, u8 xferspeed) reg2 &= ~0x80000000; pci_write_config_dword(dev, regtime, reg2); -} -static void hpt368_tune_chipset (ide_drive_t *drive, u8 speed) -{ - hpt366_tune_chipset(drive, speed); + return ide_config_drive_speed(drive, speed); } -static void hpt370_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static int hpt370_tune_chipset(ide_drive_t *drive, u8 xferspeed) { struct pci_dev *dev = HWIF(drive)->pci_dev; u8 speed = hpt3xx_ratefilter(drive, xferspeed); @@ -378,9 +375,11 @@ static void hpt370_tune_chipset (ide_drive_t *drive, u8 xferspeed) } pci_write_config_dword(dev, drive_pci, list_conf); + + return ide_config_drive_speed(drive, speed); } -static void hpt372_tune_chipset (ide_drive_t *drive, u8 xferspeed) +static int hpt372_tune_chipset(ide_drive_t *drive, u8 xferspeed) { struct pci_dev *dev = HWIF(drive)->pci_dev; u8 speed = hpt3xx_ratefilter(drive, xferspeed); @@ -406,11 +405,8 @@ static void hpt372_tune_chipset (ide_drive_t *drive, u8 xferspeed) if (speed < XFER_MW_DMA_0) list_conf &= ~0x80000000; /* Disable on-chip PIO FIFO/buffer */ pci_write_config_dword(dev, drive_pci, list_conf); -} -static void hpt374_tune_chipset (ide_drive_t *drive, u8 speed) -{ - hpt372_tune_chipset(drive, speed); + return ide_config_drive_speed(drive, speed); } static int hpt3xx_tune_chipset (ide_drive_t *drive, u8 speed) @@ -418,7 +414,7 @@ static int hpt3xx_tune_chipset (ide_drive_t *drive, u8 speed) struct pci_dev *dev = HWIF(drive)->pci_dev; if (hpt_minimum_revision(dev, 8)) - hpt374_tune_chipset(drive, speed); + return hpt372_tune_chipset(drive, speed); /* not a typo */ #if 0 else if (hpt_minimum_revision(dev, 7)) hpt371_tune_chipset(drive, speed); @@ -426,15 +422,11 @@ static int hpt3xx_tune_chipset (ide_drive_t *drive, u8 speed) hpt302_tune_chipset(drive, speed); #endif else if (hpt_minimum_revision(dev, 5)) - hpt372_tune_chipset(drive, speed); + return hpt372_tune_chipset(drive, speed); else if (hpt_minimum_revision(dev, 3)) - hpt370_tune_chipset(drive, speed); - else if (hpt_minimum_revision(dev, 2)) - hpt368_tune_chipset(drive, speed); - else - hpt366_tune_chipset(drive, speed); - - return ((int) ide_config_drive_speed(drive, speed)); + return hpt370_tune_chipset(drive, speed); + else /* hpt368: hpt_minimum_revision(dev, 2) */ + return hpt36x_tune_chipset(drive, speed); } static void hpt3xx_tune_drive (ide_drive_t *drive, u8 pio) diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c index d482d8310069..d4c7539309c3 100644 --- a/drivers/ide/pci/trm290.c +++ b/drivers/ide/pci/trm290.c @@ -3,6 +3,10 @@ * * Copyright (c) 1997-1998 Mark Lord * May be copied or modified under the terms of the GNU General Public License + * + * June 22, 2004 - get rid of check_region + * Jesper Juhl <juhl-lkml@dif.dk> + * */ /* @@ -372,16 +376,6 @@ void __devinit init_hwif_trm290(ide_hwif_t *hwif) if (old != compat && old_mask == 0xff) { /* leave lower 10 bits untouched */ compat += (next_offset += 0x400); -# if 1 - if (check_region(compat + 2, 1)) - printk(KERN_ERR "%s: check_region failure at 0x%04x\n", - hwif->name, (compat + 2)); - /* - * The region check is not needed; however......... - * Since this is the checked in ide-probe.c, - * this is only an assignment. - */ -# endif hwif->io_ports[IDE_CONTROL_OFFSET] = compat + 2; hwif->OUTW(compat|1, hwif->config_data); new = hwif->INW(hwif->config_data); diff --git a/drivers/isdn/capi/capi.c b/drivers/isdn/capi/capi.c index 8c86df4f2264..53c0acf229c7 100644 --- a/drivers/isdn/capi/capi.c +++ b/drivers/isdn/capi/capi.c @@ -650,7 +650,7 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb) /* -------- file_operations for capidev ----------------------------- */ static ssize_t -capi_read(struct file *file, char *buf, size_t count, loff_t *ppos) +capi_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) { struct capidev *cdev = (struct capidev *)file->private_data; struct sk_buff *skb; @@ -693,7 +693,7 @@ capi_read(struct file *file, char *buf, size_t count, loff_t *ppos) } static ssize_t -capi_write(struct file *file, const char *buf, size_t count, loff_t *ppos) +capi_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) { struct capidev *cdev = (struct capidev *)file->private_data; struct sk_buff *skb; @@ -766,6 +766,7 @@ capi_ioctl(struct inode *inode, struct file *file, struct capi20_appl *ap = &cdev->ap; capi_ioctl_struct data; int retval = -EINVAL; + void __user *argp = (void __user *)arg; switch (cmd) { case CAPI_REGISTER: @@ -773,7 +774,7 @@ capi_ioctl(struct inode *inode, struct file *file, if (ap->applid) return -EEXIST; - if (copy_from_user(&cdev->ap.rparam, (void *) arg, + if (copy_from_user(&cdev->ap.rparam, argp, sizeof(struct capi_register_params))) return -EFAULT; @@ -789,14 +790,13 @@ capi_ioctl(struct inode *inode, struct file *file, case CAPI_GET_VERSION: { - if (copy_from_user((void *) &data.contr, - (void *) arg, + if (copy_from_user(&data.contr, argp, sizeof(data.contr))) return -EFAULT; cdev->errcode = capi20_get_version(data.contr, &data.version); if (cdev->errcode) return -EIO; - if (copy_to_user((void *)arg, (void *)&data.version, + if (copy_to_user(argp, &data.version, sizeof(data.version))) return -EFAULT; } @@ -804,20 +804,20 @@ capi_ioctl(struct inode *inode, struct file *file, case CAPI_GET_SERIAL: { - if (copy_from_user((void *)&data.contr, (void *)arg, + if (copy_from_user(&data.contr, argp, sizeof(data.contr))) return -EFAULT; cdev->errcode = capi20_get_serial (data.contr, data.serial); if (cdev->errcode) return -EIO; - if (copy_to_user((void *)arg, (void *)data.serial, + if (copy_to_user(argp, data.serial, sizeof(data.serial))) return -EFAULT; } return 0; case CAPI_GET_PROFILE: { - if (copy_from_user((void *)&data.contr, (void *)arg, + if (copy_from_user(&data.contr, argp, sizeof(data.contr))) return -EFAULT; @@ -826,8 +826,8 @@ capi_ioctl(struct inode *inode, struct file *file, if (cdev->errcode) return -EIO; - retval = copy_to_user((void *) arg, - (void *) &data.profile.ncontroller, + retval = copy_to_user(argp, + &data.profile.ncontroller, sizeof(data.profile.ncontroller)); } else { @@ -835,8 +835,7 @@ capi_ioctl(struct inode *inode, struct file *file, if (cdev->errcode) return -EIO; - retval = copy_to_user((void *) arg, - (void *) &data.profile, + retval = copy_to_user(argp, &data.profile, sizeof(data.profile)); } if (retval) @@ -846,14 +845,14 @@ capi_ioctl(struct inode *inode, struct file *file, case CAPI_GET_MANUFACTURER: { - if (copy_from_user((void *)&data.contr, (void *)arg, + if (copy_from_user(&data.contr, argp, sizeof(data.contr))) return -EFAULT; cdev->errcode = capi20_get_manufacturer(data.contr, data.manufacturer); if (cdev->errcode) return -EIO; - if (copy_to_user((void *)arg, (void *)data.manufacturer, + if (copy_to_user(argp, data.manufacturer, sizeof(data.manufacturer))) return -EFAULT; @@ -863,7 +862,7 @@ capi_ioctl(struct inode *inode, struct file *file, data.errcode = cdev->errcode; cdev->errcode = CAPI_NOERROR; if (arg) { - if (copy_to_user((void *)arg, (void *)&data.errcode, + if (copy_to_user(argp, &data.errcode, sizeof(data.errcode))) return -EFAULT; } @@ -879,7 +878,7 @@ capi_ioctl(struct inode *inode, struct file *file, struct capi_manufacturer_cmd mcmd; if (!capable(CAP_SYS_ADMIN)) return -EPERM; - if (copy_from_user((void *)&mcmd, (void *)arg, + if (copy_from_user(&mcmd, argp, sizeof(mcmd))) return -EFAULT; return capi20_manufacturer(mcmd.cmd, mcmd.data); @@ -890,7 +889,7 @@ capi_ioctl(struct inode *inode, struct file *file, case CAPI_CLR_FLAGS: { unsigned userflags; - if (copy_from_user((void *)&userflags, (void *)arg, + if (copy_from_user(&userflags, argp, sizeof(userflags))) return -EFAULT; if (cmd == CAPI_SET_FLAGS) @@ -901,7 +900,7 @@ capi_ioctl(struct inode *inode, struct file *file, return 0; case CAPI_GET_FLAGS: - if (copy_to_user((void *)arg, (void *)&cdev->userflags, + if (copy_to_user(argp, &cdev->userflags, sizeof(cdev->userflags))) return -EFAULT; return 0; @@ -914,8 +913,7 @@ capi_ioctl(struct inode *inode, struct file *file, #endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */ unsigned ncci; int count = 0; - if (copy_from_user((void *)&ncci, (void *)arg, - sizeof(ncci))) + if (copy_from_user(&ncci, argp, sizeof(ncci))) return -EFAULT; down(&cdev->ncci_list_sem); @@ -940,7 +938,7 @@ capi_ioctl(struct inode *inode, struct file *file, struct capiminor *mp; unsigned ncci; int unit = 0; - if (copy_from_user((void *)&ncci, (void *)arg, + if (copy_from_user(&ncci, argp, sizeof(ncci))) return -EFAULT; down(&cdev->ncci_list_sem); diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c index 1b95f600592f..bace9a557ed9 100644 --- a/drivers/isdn/i4l/isdn_common.c +++ b/drivers/isdn/i4l/isdn_common.c @@ -64,7 +64,7 @@ static isdn_divert_if *divert_if; /* = NULL */ #endif /* CONFIG_ISDN_DIVERSION */ -static int isdn_writebuf_stub(int, int, const u_char *, int, int); +static int isdn_writebuf_stub(int, int, const u_char __user *, int); static void set_global_features(void); static int isdn_wildmat(char *s, char *p); @@ -937,7 +937,7 @@ isdn_info_update(void) } static ssize_t -isdn_read(struct file *file, char *buf, size_t count, loff_t * off) +isdn_read(struct file *file, char __user *buf, size_t count, loff_t * off) { uint minor = MINOR(file->f_dentry->d_inode->i_rdev); int len = 0; @@ -1044,7 +1044,7 @@ isdn_read(struct file *file, char *buf, size_t count, loff_t * off) } static ssize_t -isdn_write(struct file *file, const char *buf, size_t count, loff_t * off) +isdn_write(struct file *file, const char __user *buf, size_t count, loff_t * off) { uint minor = MINOR(file->f_dentry->d_inode->i_rdev); int drvidx; @@ -1072,7 +1072,7 @@ isdn_write(struct file *file, const char *buf, size_t count, loff_t * off) goto out; } chidx = isdn_minor2chan(minor); - while (isdn_writebuf_stub(drvidx, chidx, buf, count, 1) != count) + while (isdn_writebuf_stub(drvidx, chidx, buf, count) != count) interruptible_sleep_on(&dev->drv[drvidx]->snd_waitq[chidx]); retval = count; goto out; @@ -1159,7 +1159,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) int chidx; int ret; int i; - char *p; + char __user *p; char *s; union iocpar { char name[10]; @@ -1168,6 +1168,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) isdn_net_ioctl_phone phone; isdn_net_ioctl_cfg cfg; } iocpar; + void __user *argp = (void __user *)arg; #define name iocpar.name #define bname iocpar.bname @@ -1183,9 +1184,9 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) (INF_DV << 16)); case IIOCGETCPS: if (arg) { - ulong *p = (ulong *) arg; + ulong __user *p = argp; int i; - if ((ret = verify_area(VERIFY_WRITE, (void *) arg, + if ((ret = verify_area(VERIFY_WRITE, p, sizeof(ulong) * ISDN_MAX_CHANNELS * 2))) return ret; for (i = 0; i < ISDN_MAX_CHANNELS; i++) { @@ -1201,9 +1202,9 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) /* Get peer phone number of a connected * isdn network interface */ if (arg) { - if (copy_from_user((char *) &phone, (char *) arg, sizeof(phone))) + if (copy_from_user(&phone, argp, sizeof(phone))) return -EFAULT; - return isdn_net_getpeer(&phone, (isdn_net_ioctl_phone *) arg); + return isdn_net_getpeer(&phone, argp); } else return -EINVAL; #endif @@ -1241,7 +1242,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETAIF: /* Add a network-interface */ if (arg) { - if (copy_from_user(name, (char *) arg, sizeof(name))) + if (copy_from_user(name, argp, sizeof(name))) return -EFAULT; s = name; } else { @@ -1250,7 +1251,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) ret = down_interruptible(&dev->sem); if( ret ) return ret; if ((s = isdn_net_new(s, NULL))) { - if (copy_to_user((char *) arg, s, strlen(s) + 1)){ + if (copy_to_user(argp, s, strlen(s) + 1)){ ret = -EFAULT; } else { ret = 0; @@ -1262,14 +1263,14 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETASL: /* Add a slave to a network-interface */ if (arg) { - if (copy_from_user(bname, (char *) arg, sizeof(bname) - 1)) + if (copy_from_user(bname, argp, sizeof(bname) - 1)) return -EFAULT; } else return -EINVAL; ret = down_interruptible(&dev->sem); if( ret ) return ret; if ((s = isdn_net_newslave(bname))) { - if (copy_to_user((char *) arg, s, strlen(s) + 1)){ + if (copy_to_user(argp, s, strlen(s) + 1)){ ret = -EFAULT; } else { ret = 0; @@ -1281,7 +1282,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETDIF: /* Delete a network-interface */ if (arg) { - if (copy_from_user(name, (char *) arg, sizeof(name))) + if (copy_from_user(name, argp, sizeof(name))) return -EFAULT; ret = down_interruptible(&dev->sem); if( ret ) return ret; @@ -1293,7 +1294,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETSCF: /* Set configurable parameters of a network-interface */ if (arg) { - if (copy_from_user((char *) &cfg, (char *) arg, sizeof(cfg))) + if (copy_from_user(&cfg, argp, sizeof(cfg))) return -EFAULT; return isdn_net_setcfg(&cfg); } else @@ -1301,10 +1302,10 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETGCF: /* Get configurable parameters of a network-interface */ if (arg) { - if (copy_from_user((char *) &cfg, (char *) arg, sizeof(cfg))) + if (copy_from_user(&cfg, argp, sizeof(cfg))) return -EFAULT; if (!(ret = isdn_net_getcfg(&cfg))) { - if (copy_to_user((char *) arg, (char *) &cfg, sizeof(cfg))) + if (copy_to_user(argp, &cfg, sizeof(cfg))) return -EFAULT; } return ret; @@ -1313,7 +1314,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETANM: /* Add a phone-number to a network-interface */ if (arg) { - if (copy_from_user((char *) &phone, (char *) arg, sizeof(phone))) + if (copy_from_user(&phone, argp, sizeof(phone))) return -EFAULT; ret = down_interruptible(&dev->sem); if( ret ) return ret; @@ -1325,11 +1326,11 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETGNM: /* Get list of phone-numbers of a network-interface */ if (arg) { - if (copy_from_user((char *) &phone, (char *) arg, sizeof(phone))) + if (copy_from_user(&phone, argp, sizeof(phone))) return -EFAULT; ret = down_interruptible(&dev->sem); if( ret ) return ret; - ret = isdn_net_getphones(&phone, (char *) arg); + ret = isdn_net_getphones(&phone, argp); up(&dev->sem); return ret; } else @@ -1337,7 +1338,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETDNM: /* Delete a phone-number of a network-interface */ if (arg) { - if (copy_from_user((char *) &phone, (char *) arg, sizeof(phone))) + if (copy_from_user(&phone, argp, sizeof(phone))) return -EFAULT; ret = down_interruptible(&dev->sem); if( ret ) return ret; @@ -1349,7 +1350,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETDIL: /* Force dialing of a network-interface */ if (arg) { - if (copy_from_user(name, (char *) arg, sizeof(name))) + if (copy_from_user(name, argp, sizeof(name))) return -EFAULT; return isdn_net_force_dial(name); } else @@ -1358,13 +1359,13 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCNETALN: if (!arg) return -EINVAL; - if (copy_from_user(name, (char *) arg, sizeof(name))) + if (copy_from_user(name, argp, sizeof(name))) return -EFAULT; return isdn_ppp_dial_slave(name); case IIOCNETDLN: if (!arg) return -EINVAL; - if (copy_from_user(name, (char *) arg, sizeof(name))) + if (copy_from_user(name, argp, sizeof(name))) return -EFAULT; return isdn_ppp_hangup_slave(name); #endif @@ -1372,7 +1373,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) /* Force hangup of a network-interface */ if (!arg) return -EINVAL; - if (copy_from_user(name, (char *) arg, sizeof(name))) + if (copy_from_user(name, argp, sizeof(name))) return -EFAULT; return isdn_net_force_hangup(name); break; @@ -1394,7 +1395,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) if (arg) { int i; char *p; - if (copy_from_user((char *) &iocts, (char *) arg, + if (copy_from_user(&iocts, argp, sizeof(isdn_ioctl_struct))) return -EFAULT; if (strlen(iocts.drvid)) { @@ -1422,10 +1423,10 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCGETPRF: /* Get all Modem-Profiles */ if (arg) { - char *p = (char *) arg; + char __user *p = argp; int i; - if ((ret = verify_area(VERIFY_WRITE, (void *) arg, + if ((ret = verify_area(VERIFY_WRITE, argp, (ISDN_MODEM_NUMREG + ISDN_MSNLEN + ISDN_LMSNLEN) * ISDN_MAX_CHANNELS))) return ret; @@ -1449,10 +1450,10 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) case IIOCSETPRF: /* Set all Modem-Profiles */ if (arg) { - char *p = (char *) arg; + char __user *p = argp; int i; - if ((ret = verify_area(VERIFY_READ, (void *) arg, + if ((ret = verify_area(VERIFY_READ, argp, (ISDN_MODEM_NUMREG + ISDN_MSNLEN + ISDN_LMSNLEN) * ISDN_MAX_CHANNELS))) return ret; @@ -1478,8 +1479,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) /* Set/Get MSN->EAZ-Mapping for a driver */ if (arg) { - if (copy_from_user((char *) &iocts, - (char *) arg, + if (copy_from_user(&iocts, argp, sizeof(isdn_ioctl_struct))) return -EFAULT; if (strlen(iocts.drvid)) { @@ -1496,7 +1496,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) if (cmd == IIOCSETMAP) { int loop = 1; - p = (char *) iocts.arg; + p = (char __user *) iocts.arg; i = 0; while (loop) { int j = 0; @@ -1524,7 +1524,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) break; } } else { - p = (char *) iocts.arg; + p = (char __user *) iocts.arg; for (i = 0; i < 10; i++) { sprintf(bname, "%s%s", strlen(dev->drv[drvidx]->msn2eaz[i]) ? @@ -1540,7 +1540,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) return -EINVAL; case IIOCDBGVAR: if (arg) { - if (copy_to_user((char *) arg, (char *) &dev, sizeof(ulong))) + if (copy_to_user(argp, &dev, sizeof(ulong))) return -EFAULT; return 0; } else @@ -1554,7 +1554,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) if (arg) { int i; char *p; - if (copy_from_user((char *) &iocts, (char *) arg, sizeof(isdn_ioctl_struct))) + if (copy_from_user(&iocts, argp, sizeof(isdn_ioctl_struct))) return -EFAULT; if (strlen(iocts.drvid)) { if ((p = strchr(iocts.drvid, ','))) @@ -1569,16 +1569,16 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) drvidx = 0; if (drvidx == -1) return -ENODEV; - if ((ret = verify_area(VERIFY_WRITE, (void *) arg, + if ((ret = verify_area(VERIFY_WRITE, argp, sizeof(isdn_ioctl_struct)))) return ret; c.driver = drvidx; c.command = ISDN_CMD_IOCTL; c.arg = cmd; - memcpy(c.parm.num, (char *) &iocts.arg, sizeof(ulong)); + memcpy(c.parm.num, &iocts.arg, sizeof(ulong)); ret = isdn_command(&c); - memcpy((char *) &iocts.arg, c.parm.num, sizeof(ulong)); - if (copy_to_user((char *) arg, &iocts, sizeof(isdn_ioctl_struct))) + memcpy(&iocts.arg, c.parm.num, sizeof(ulong)); + if (copy_to_user(argp, &iocts, sizeof(isdn_ioctl_struct))) return -EFAULT; return ret; } else @@ -1838,8 +1838,7 @@ isdn_unexclusive_channel(int di, int ch) * writebuf replacement for SKB_ABLE drivers */ static int -isdn_writebuf_stub(int drvidx, int chan, const u_char * buf, int len, - int user) +isdn_writebuf_stub(int drvidx, int chan, const u_char __user * buf, int len) { int ret; int hl = dev->drv[drvidx]->interface->hl_hdrlen; @@ -1848,10 +1847,7 @@ isdn_writebuf_stub(int drvidx, int chan, const u_char * buf, int len, if (!skb) return 0; skb_reserve(skb, hl); - if (user) - copy_from_user(skb_put(skb, len), buf, len); - else - memcpy(skb_put(skb, len), buf, len); + copy_from_user(skb_put(skb, len), buf, len); ret = dev->drv[drvidx]->interface->writebuf_skb(drvidx, chan, 1, skb); if (ret <= 0) dev_kfree_skb(skb); diff --git a/drivers/isdn/i4l/isdn_net.c b/drivers/isdn/i4l/isdn_net.c index 03f22b6b7697..87015695256d 100644 --- a/drivers/isdn/i4l/isdn_net.c +++ b/drivers/isdn/i4l/isdn_net.c @@ -315,7 +315,7 @@ isdn_net_unbind_channel(isdn_net_local * lp) unsigned long last_jiffies = -HZ; void -isdn_net_autohup() +isdn_net_autohup(void) { isdn_net_dev *p = dev->netdev; int anymore; @@ -1443,15 +1443,14 @@ isdn_ciscohdlck_dev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /* get/set keepalive period */ case SIOCGKEEPPERIOD: len = (unsigned long)sizeof(lp->cisco_keepalive_period); - if (copy_to_user((char *)ifr->ifr_ifru.ifru_data, - (int *)&lp->cisco_keepalive_period, len)) + if (copy_to_user(ifr->ifr_data, + &lp->cisco_keepalive_period, len)) rc = -EFAULT; break; case SIOCSKEEPPERIOD: tmp = lp->cisco_keepalive_period; len = (unsigned long)sizeof(lp->cisco_keepalive_period); - if (copy_from_user((int *)&period, - (char *)ifr->ifr_ifru.ifru_data, len)) + if (copy_from_user(&period, ifr->ifr_data, len)) rc = -EFAULT; if ((period > 0) && (period <= 32767)) lp->cisco_keepalive_period = period; @@ -1470,14 +1469,14 @@ isdn_ciscohdlck_dev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /* get/set debugging */ case SIOCGDEBSERINT: len = (unsigned long)sizeof(lp->cisco_debserint); - if (copy_to_user((char *)ifr->ifr_ifru.ifru_data, - (char *)&lp->cisco_debserint, len)) + if (copy_to_user(ifr->ifr_data, + &lp->cisco_debserint, len)) rc = -EFAULT; break; case SIOCSDEBSERINT: len = (unsigned long)sizeof(lp->cisco_debserint); - if (copy_from_user((char *)&debserint, - (char *)ifr->ifr_ifru.ifru_data, len)) + if (copy_from_user(&debserint, + ifr->ifr_data, len)) rc = -EFAULT; if ((debserint >= 0) && (debserint <= 64)) lp->cisco_debserint = debserint; @@ -2968,7 +2967,7 @@ isdn_net_addphone(isdn_net_ioctl_phone * phone) * This might sleep and must be called with the isdn semaphore down. */ int -isdn_net_getphones(isdn_net_ioctl_phone * phone, char *phones) +isdn_net_getphones(isdn_net_ioctl_phone * phone, char __user *phones) { isdn_net_dev *p = isdn_net_findif(phone->name); int inout = phone->outgoing & 1; @@ -3001,7 +3000,7 @@ isdn_net_getphones(isdn_net_ioctl_phone * phone, char *phones) * to user space. */ int -isdn_net_getpeer(isdn_net_ioctl_phone *phone, isdn_net_ioctl_phone *peer) +isdn_net_getpeer(isdn_net_ioctl_phone *phone, isdn_net_ioctl_phone __user *peer) { isdn_net_dev *p = isdn_net_findif(phone->name); int ch, dv, idx; diff --git a/drivers/isdn/i4l/isdn_net.h b/drivers/isdn/i4l/isdn_net.h index 839518fe3fcf..ebdcde3710be 100644 --- a/drivers/isdn/i4l/isdn_net.h +++ b/drivers/isdn/i4l/isdn_net.h @@ -39,8 +39,8 @@ extern int isdn_net_stat_callback(int, isdn_ctrl *); extern int isdn_net_setcfg(isdn_net_ioctl_cfg *); extern int isdn_net_getcfg(isdn_net_ioctl_cfg *); extern int isdn_net_addphone(isdn_net_ioctl_phone *); -extern int isdn_net_getphones(isdn_net_ioctl_phone *, char *); -extern int isdn_net_getpeer(isdn_net_ioctl_phone *, isdn_net_ioctl_phone *); +extern int isdn_net_getphones(isdn_net_ioctl_phone *, char __user *); +extern int isdn_net_getpeer(isdn_net_ioctl_phone *, isdn_net_ioctl_phone __user *); extern int isdn_net_delphone(isdn_net_ioctl_phone *); extern int isdn_net_find_icall(int, int, int, setup_parm *); extern void isdn_net_hangup(struct net_device *); diff --git a/drivers/isdn/i4l/isdn_tty.c b/drivers/isdn/i4l/isdn_tty.c index 3abc26e2db81..3fc515dca012 100644 --- a/drivers/isdn/i4l/isdn_tty.c +++ b/drivers/isdn/i4l/isdn_tty.c @@ -1359,14 +1359,14 @@ isdn_tty_unthrottle(struct tty_struct *tty) * allows RS485 driver to be written in user space. */ static int -isdn_tty_get_lsr_info(modem_info * info, uint * value) +isdn_tty_get_lsr_info(modem_info * info, uint __user * value) { u_char status; uint result; status = info->lsr; result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); - return put_user(result, (uint *) value); + return put_user(result, value); } @@ -1468,12 +1468,12 @@ isdn_tty_ioctl(struct tty_struct *tty, struct file *file, #ifdef ISDN_DEBUG_MODEM_IOCTL printk(KERN_DEBUG "ttyI%d ioctl TIOCGSOFTCAR\n", info->line); #endif - return put_user(C_CLOCAL(tty) ? 1 : 0, (ulong *) arg); + return put_user(C_CLOCAL(tty) ? 1 : 0, (ulong __user *) arg); case TIOCSSOFTCAR: #ifdef ISDN_DEBUG_MODEM_IOCTL printk(KERN_DEBUG "ttyI%d ioctl TIOCSSOFTCAR\n", info->line); #endif - if (get_user(arg, (ulong *) arg)) + if (get_user(arg, (ulong __user *) arg)) return -EFAULT; tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | diff --git a/drivers/isdn/i4l/isdn_x25iface.c b/drivers/isdn/i4l/isdn_x25iface.c index 8f507e11de07..ee2071b061cd 100644 --- a/drivers/isdn/i4l/isdn_x25iface.c +++ b/drivers/isdn/i4l/isdn_x25iface.c @@ -79,7 +79,7 @@ static int pdata_is_bad( ix25_pdata_t * pda ){ /* create a new x25 interface protocol instance */ -struct concap_proto * isdn_x25iface_proto_new() +struct concap_proto * isdn_x25iface_proto_new(void) { ix25_pdata_t * tmp = kmalloc(sizeof(ix25_pdata_t),GFP_KERNEL); IX25DEBUG("isdn_x25iface_proto_new\n"); @@ -275,8 +275,7 @@ int isdn_x25iface_disconn_ind(struct concap_proto *cprot) int isdn_x25iface_xmit(struct concap_proto *cprot, struct sk_buff *skb) { unsigned char firstbyte = skb->data[0]; - unsigned *state = - &( ( (ix25_pdata_t*) (cprot -> proto_data) ) -> state ); + enum wan_states *state = &((ix25_pdata_t*)cprot->proto_data)->state; int ret = 0; IX25DEBUG( "isdn_x25iface_xmit: %s first=%x state=%d \n", MY_DEVNAME(cprot -> net_dev), firstbyte, *state ); switch ( firstbyte ){ diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index d271b8eeffaa..04b2aef4a05a 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c @@ -206,7 +206,7 @@ static int map(mddev_t *mddev, mdk_rdev_t **rdevp) *rdevp = rdev; atomic_inc(&rdev->nr_pending); spin_unlock_irq(&conf->device_lock); - return 0; + return i; } } spin_unlock_irq(&conf->device_lock); @@ -919,18 +919,22 @@ static void raid1d(mddev_t *mddev) mddev = r1_bio->mddev; conf = mddev_to_conf(mddev); - bio = r1_bio->master_bio; if (test_bit(R1BIO_IsSync, &r1_bio->state)) { sync_request_write(mddev, r1_bio); unplug = 1; } else { - if (map(mddev, &rdev) == -1) { + int disk; + bio = r1_bio->bios[r1_bio->read_disk]; + if ((disk=map(mddev, &rdev)) == -1) { printk(KERN_ALERT "raid1: %s: unrecoverable I/O" " read error for block %llu\n", bdevname(bio->bi_bdev,b), (unsigned long long)r1_bio->sector); raid_end_bio_io(r1_bio); } else { + r1_bio->bios[r1_bio->read_disk] = NULL; + r1_bio->read_disk = disk; + r1_bio->bios[r1_bio->read_disk] = bio; printk(KERN_ERR "raid1: %s: redirecting sector %llu to" " another mirror\n", bdevname(rdev->bdev,b), diff --git a/drivers/md/xor.c b/drivers/md/xor.c index e2103a8bb75a..324897c4be4e 100644 --- a/drivers/md/xor.c +++ b/drivers/md/xor.c @@ -108,29 +108,40 @@ calibrate_xor_block(void) } b2 = b1 + 2*PAGE_SIZE + BENCH_SIZE; - printk(KERN_INFO "raid5: measuring checksumming speed\n"); + /* + * If this arch/cpu has a short-circuited selection, don't loop through all + * the possible functions, just test the best one + */ + + fastest = NULL; + +#ifdef XOR_SELECT_TEMPLATE + fastest = XOR_SELECT_TEMPLATE(fastest); +#endif #define xor_speed(templ) do_xor_speed((templ), b1, b2) - XOR_TRY_TEMPLATES; + if (fastest) { + printk(KERN_INFO "raid5: automatically using best checksumming function: %s\n", + fastest->name); + xor_speed(fastest); + } else { + printk(KERN_INFO "raid5: measuring checksumming speed\n"); + XOR_TRY_TEMPLATES; + fastest = template_list; + for (f = fastest; f; f = f->next) + if (f->speed > fastest->speed) + fastest = f; + } + + printk("raid5: using function: %s (%d.%03d MB/sec)\n", + fastest->name, fastest->speed / 1000, fastest->speed % 1000); #undef xor_speed free_pages((unsigned long)b1, 2); - fastest = template_list; - for (f = fastest; f; f = f->next) - if (f->speed > fastest->speed) - fastest = f; - -#ifdef XOR_SELECT_TEMPLATE - fastest = XOR_SELECT_TEMPLATE(fastest); -#endif - active_template = fastest; - printk("raid5: using function: %s (%d.%03d MB/sec)\n", - fastest->name, fastest->speed / 1000, fastest->speed % 1000); - return 0; } diff --git a/drivers/media/video/tda9840.c b/drivers/media/video/tda9840.c index d1e74ecf2c1d..fd8ac116c863 100644 --- a/drivers/media/video/tda9840.c +++ b/drivers/media/video/tda9840.c @@ -268,13 +268,12 @@ static struct i2c_driver driver = { .command = tda9840_command, }; -static int tda9840_init_module(void) +static int __init tda9840_init_module(void) { - i2c_add_driver(&driver); - return 0; + return i2c_add_driver(&driver); } -static void tda9840_cleanup_module(void) +static void __exit tda9840_cleanup_module(void) { i2c_del_driver(&driver); } @@ -285,4 +284,3 @@ module_exit(tda9840_cleanup_module); MODULE_AUTHOR("Michael Hunold <michael@mihu.de>"); MODULE_DESCRIPTION("tda9840 driver"); MODULE_LICENSE("GPL"); - diff --git a/drivers/message/i2o/i2o_block.c b/drivers/message/i2o/i2o_block.c index 63e67b3b19be..36dc0e9d1b4a 100644 --- a/drivers/message/i2o/i2o_block.c +++ b/drivers/message/i2o/i2o_block.c @@ -861,6 +861,7 @@ static int i2ob_ioctl(struct inode *inode, struct file *file, { struct gendisk *disk = inode->i_bdev->bd_disk; struct i2ob_device *dev = disk->private_data; + void __user *argp = (void __user *)arg; /* Anyone capable of this syscall can do *real bad* things */ @@ -873,13 +874,13 @@ static int i2ob_ioctl(struct inode *inode, struct file *file, i2o_block_biosparam(get_capacity(disk), &g.cylinders, &g.heads, &g.sectors); g.start = get_start_sect(inode->i_bdev); - return copy_to_user((void *)arg,&g, sizeof(g))?-EFAULT:0; + return copy_to_user(argp, &g, sizeof(g))?-EFAULT:0; } case BLKI2OGRSTRAT: - return put_user(dev->rcache, (int *)arg); + return put_user(dev->rcache, (int __user *)argp); case BLKI2OGWSTRAT: - return put_user(dev->wcache, (int *)arg); + return put_user(dev->wcache, (int __user *)argp); case BLKI2OSRSTRAT: if(arg<0||arg>CACHE_SMARTFETCH) return -EINVAL; diff --git a/drivers/message/i2o/i2o_config.c b/drivers/message/i2o/i2o_config.c index 0c77a2bc9964..773096305b2f 100644 --- a/drivers/message/i2o/i2o_config.c +++ b/drivers/message/i2o/i2o_config.c @@ -194,7 +194,7 @@ struct i2o_handler cfg_handler= 0xffffffff // All classes }; -static ssize_t cfg_write(struct file *file, const char *buf, size_t count, loff_t *ppos) +static ssize_t cfg_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) { printk(KERN_INFO "i2o_config write not yet supported\n"); @@ -202,7 +202,7 @@ static ssize_t cfg_write(struct file *file, const char *buf, size_t count, loff_ } -static ssize_t cfg_read(struct file *file, char *buf, size_t count, loff_t *ptr) +static ssize_t cfg_read(struct file *file, char __user *buf, size_t count, loff_t *ptr) { return 0; } @@ -278,7 +278,7 @@ static int cfg_ioctl(struct inode *inode, struct file *fp, unsigned int cmd, int ioctl_getiops(unsigned long arg) { - u8 *user_iop_table = (u8*)arg; + u8 __user *user_iop_table = (void __user *)arg; struct i2o_controller *c = NULL; int i; u8 foo[MAX_I2O_CONTROLLERS]; @@ -314,7 +314,7 @@ int ioctl_getiops(unsigned long arg) int ioctl_gethrt(unsigned long arg) { struct i2o_controller *c; - struct i2o_cmd_hrtlct *cmd = (struct i2o_cmd_hrtlct*)arg; + struct i2o_cmd_hrtlct __user *cmd = (void __user *)arg; struct i2o_cmd_hrtlct kcmd; i2o_hrt *hrt; int len; @@ -353,7 +353,7 @@ int ioctl_gethrt(unsigned long arg) int ioctl_getlct(unsigned long arg) { struct i2o_controller *c; - struct i2o_cmd_hrtlct *cmd = (struct i2o_cmd_hrtlct*)arg; + struct i2o_cmd_hrtlct __user *cmd = (void __user *)arg; struct i2o_cmd_hrtlct kcmd; i2o_lct *lct; int len; @@ -390,7 +390,7 @@ static int ioctl_parms(unsigned long arg, unsigned int type) { int ret = 0; struct i2o_controller *c; - struct i2o_cmd_psetget *cmd = (struct i2o_cmd_psetget*)arg; + struct i2o_cmd_psetget __user *cmd = (void __user *)arg; struct i2o_cmd_psetget kcmd; u32 reslen; u8 *ops; @@ -460,7 +460,7 @@ static int ioctl_parms(unsigned long arg, unsigned int type) int ioctl_html(unsigned long arg) { - struct i2o_html *cmd = (struct i2o_html*)arg; + struct i2o_html __user *cmd = (void __user *)arg; struct i2o_html kcmd; struct i2o_controller *c; u8 *res = NULL; @@ -573,7 +573,7 @@ int ioctl_html(unsigned long arg) int ioctl_swdl(unsigned long arg) { struct i2o_sw_xfer kxfer; - struct i2o_sw_xfer *pxfer = (struct i2o_sw_xfer *)arg; + struct i2o_sw_xfer __user *pxfer = (void __user *)arg; unsigned char maxfrag = 0, curfrag = 1; unsigned char *buffer; u32 msg[9]; @@ -642,7 +642,7 @@ int ioctl_swdl(unsigned long arg) int ioctl_swul(unsigned long arg) { struct i2o_sw_xfer kxfer; - struct i2o_sw_xfer *pxfer = (struct i2o_sw_xfer *)arg; + struct i2o_sw_xfer __user *pxfer = (void __user *)arg; unsigned char maxfrag = 0, curfrag = 1; unsigned char *buffer; u32 msg[9]; @@ -709,7 +709,8 @@ int ioctl_swul(unsigned long arg) int ioctl_swdel(unsigned long arg) { struct i2o_controller *c; - struct i2o_sw_xfer kxfer, *pxfer = (struct i2o_sw_xfer *)arg; + struct i2o_sw_xfer kxfer; + struct i2o_sw_xfer __user *pxfer = (void __user *)arg; u32 msg[7]; unsigned int swlen; int token; @@ -776,7 +777,7 @@ int ioctl_validate(unsigned long arg) static int ioctl_evt_reg(unsigned long arg, struct file *fp) { u32 msg[5]; - struct i2o_evt_id *pdesc = (struct i2o_evt_id *)arg; + struct i2o_evt_id __user *pdesc = (void __user *)arg; struct i2o_evt_id kdesc; struct i2o_controller *iop; struct i2o_device *d; @@ -813,7 +814,7 @@ static int ioctl_evt_get(unsigned long arg, struct file *fp) { u32 id = (u32)fp->private_data; struct i2o_cfg_info *p = NULL; - struct i2o_evt_get *uget = (struct i2o_evt_get*)arg; + struct i2o_evt_get __user *uget = (void __user *)arg; struct i2o_evt_get kget; unsigned long flags; @@ -842,24 +843,28 @@ static int ioctl_evt_get(unsigned long arg, struct file *fp) static int ioctl_passthru(unsigned long arg) { - struct i2o_cmd_passthru *cmd = (struct i2o_cmd_passthru *) arg; + struct i2o_cmd_passthru __user *cmd = (void __user *) arg; struct i2o_controller *c; u32 msg[MSG_FRAME_SIZE]; - u32 *user_msg = (u32*)cmd->msg; + u32 __user *user_msg; u32 *reply = NULL; - u32 *user_reply = NULL; + u32 __user *user_reply = NULL; u32 size = 0; u32 reply_size = 0; u32 rcode = 0; - ulong sg_list[SG_TABLESIZE]; + void *sg_list[SG_TABLESIZE]; u32 sg_offset = 0; u32 sg_count = 0; int sg_index = 0; u32 i = 0; - ulong p = 0; + void *p = 0; + unsigned int iop; - c = i2o_find_controller(cmd->iop); - if(!c) + if (get_user(iop, &cmd->iop) || get_user(user_msg, &cmd->msg)) + return -EFAULT; + + c = i2o_find_controller(iop); + if (!c) return -ENXIO; memset(&msg, 0, MSG_FRAME_SIZE*4); @@ -873,7 +878,7 @@ static int ioctl_passthru(unsigned long arg) size *= 4; // Convert to bytes /* Copy in the user's I2O command */ - if(copy_from_user((void*)msg, (void*)user_msg, size)) + if(copy_from_user(msg, user_msg, size)) return -EFAULT; if(get_user(reply_size, &user_reply[0]) < 0) return -EFAULT; @@ -916,7 +921,7 @@ static int ioctl_passthru(unsigned long arg) } sg_size = sg[i].flag_count & 0xffffff; /* Allocate memory for the transfer */ - p = (ulong)kmalloc(sg_size, GFP_KERNEL); + p = kmalloc(sg_size, GFP_KERNEL); if (!p) { printk(KERN_DEBUG"%s: Could not allocate SG buffer - size = %d buffer number %d of %d\n", c->name,sg_size,i,sg_count); rcode = -ENOMEM; @@ -926,14 +931,14 @@ static int ioctl_passthru(unsigned long arg) /* Copy in the user's SG buffer if necessary */ if(sg[i].flag_count & 0x04000000 /*I2O_SGL_FLAGS_DIR*/) { // TODO 64bit fix - if (copy_from_user((void*)p,(void*)sg[i].addr_bus, sg_size)) { + if (copy_from_user(p,(void __user *)sg[i].addr_bus, sg_size)) { printk(KERN_DEBUG"%s: Could not copy SG buf %d FROM user\n",c->name,i); rcode = -EFAULT; goto cleanup; } } //TODO 64bit fix - sg[i].addr_bus = (u32)virt_to_bus((void*)p); + sg[i].addr_bus = (u32)virt_to_bus(p); } } @@ -958,7 +963,7 @@ static int ioctl_passthru(unsigned long arg) size = size>>16; size *= 4; /* Copy in the user's I2O command */ - if (copy_from_user ((void*)msg, (void*)user_msg, size)) { + if (copy_from_user (msg, user_msg, size)) { rcode = -EFAULT; goto cleanup; } @@ -971,8 +976,8 @@ static int ioctl_passthru(unsigned long arg) if (!(sg[j].flag_count & 0x4000000 /*I2O_SGL_FLAGS_DIR*/)) { sg_size = sg[j].flag_count & 0xffffff; // TODO 64bit fix - if (copy_to_user((void*)sg[j].addr_bus,(void*)sg_list[j], sg_size)) { - printk(KERN_WARNING"%s: Could not copy %lx TO user %x\n",c->name, sg_list[j], sg[j].addr_bus); + if (copy_to_user((void __user *)sg[j].addr_bus,sg_list[j], sg_size)) { + printk(KERN_WARNING"%s: Could not copy %p TO user %x\n",c->name, sg_list[j], sg[j].addr_bus); rcode = -EFAULT; goto cleanup; } diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index 18cc31d39752..e1be7178b70e 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -378,7 +378,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr chip->state = FL_ERASING; chip->oldstate = FL_READY; printk(KERN_ERR "Chip not ready after erase " - "suspended: status = 0x%x\n", status); + "suspended: status = 0x%llx\n", status); return -EIO; } @@ -963,7 +963,7 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip, So we must check here and reset those bits if they're set. Otherwise we're just pissing in the wind */ if (status & CMD(0x30)) { - printk(KERN_WARNING "SR.4 or SR.5 bits set in buffer write (status %x). Clearing.\n", status); + printk(KERN_WARNING "SR.4 or SR.5 bits set in buffer write (status %llx). Clearing.\n", status); cfi_write(map, CMD(0x50), cmd_adr); cfi_write(map, CMD(0x70), cmd_adr); } diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index df3309048290..cb5fcfcac9f5 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -509,7 +509,7 @@ static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned chip->state = FL_WRITING; adr += chip->start; - DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8x)\n", + DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8llx)\n", __func__, adr, datum ); ENABLE_VPP(map); @@ -645,7 +645,7 @@ static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned __func__ ); printk(KERN_WARNING - "MTD %s(): 0x%.8lx(0x%.8x): 0x%.8x 0x%.8x 0x%.8x 0x%.8x\n", + "MTD %s(): 0x%.8lx(0x%.8llx): 0x%.8x 0x%.8x 0x%.8x 0x%.8x\n", __func__, adr, datum, prev_oldstatus, prev_status, oldstatus, status); @@ -971,7 +971,7 @@ static inline int do_erase_chip(struct map_info *map, struct flchip *chip) __func__ ); printk(KERN_WARNING - "MTD %s(): 0x%.8lx(0x%.8x): 0x%.8x 0x%.8x 0x%.8x 0x%.8x\n", + "MTD %s(): 0x%.8lx(0x%.8llx): 0x%.8x 0x%.8x 0x%.8x 0x%.8x\n", __func__, adr, ones, prev_oldstatus, prev_status, oldstatus, status); @@ -1151,7 +1151,7 @@ static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, u __func__ ); printk(KERN_WARNING - "MTD %s(): 0x%.8lx(0x%.8x): 0x%.8x 0x%.8x 0x%.8x 0x%.8x\n", + "MTD %s(): 0x%.8lx(0x%.8llx): 0x%.8x 0x%.8x 0x%.8x 0x%.8x\n", __func__, adr, ones, prev_oldstatus, prev_status, oldstatus, status); diff --git a/drivers/mtd/chips/cfi_cmdset_0020.c b/drivers/mtd/chips/cfi_cmdset_0020.c index 98e58b426140..074f6905991d 100644 --- a/drivers/mtd/chips/cfi_cmdset_0020.c +++ b/drivers/mtd/chips/cfi_cmdset_0020.c @@ -489,7 +489,7 @@ static inline int do_write_buffer(struct map_info *map, struct flchip *chip, /* Urgh. Chip not yet ready to talk to us. */ if (time_after(jiffies, timeo)) { spin_unlock_bh(chip->mutex); - printk(KERN_ERR "waiting for chip to be ready timed out in buffer write Xstatus = %x, status = %x\n", + printk(KERN_ERR "waiting for chip to be ready timed out in buffer write Xstatus = %x, status = %llx\n", status, cfi_read(map, cmd_adr)); return -EIO; } @@ -859,7 +859,7 @@ retry: if (time_after(jiffies, timeo)) { cfi_write(map, CMD(0x70), adr); chip->state = FL_STATUS; - printk(KERN_ERR "waiting for erase to complete timed out. Xstatus = %x, status = %x.\n", status, cfi_read(map, adr)); + printk(KERN_ERR "waiting for erase to complete timed out. Xstatus = %x, status = %llx.\n", status, cfi_read(map, adr)); DISABLE_VPP(map); spin_unlock_bh(chip->mutex); return -EIO; @@ -1145,7 +1145,7 @@ retry: if (time_after(jiffies, timeo)) { cfi_write(map, CMD(0x70), adr); chip->state = FL_STATUS; - printk(KERN_ERR "waiting for lock to complete timed out. Xstatus = %x, status = %x.\n", status, cfi_read(map, adr)); + printk(KERN_ERR "waiting for lock to complete timed out. Xstatus = %x, status = %llx.\n", status, cfi_read(map, adr)); DISABLE_VPP(map); spin_unlock_bh(chip->mutex); return -EIO; @@ -1294,7 +1294,7 @@ retry: if (time_after(jiffies, timeo)) { cfi_write(map, CMD(0x70), adr); chip->state = FL_STATUS; - printk(KERN_ERR "waiting for unlock to complete timed out. Xstatus = %x, status = %x.\n", status, cfi_read(map, adr)); + printk(KERN_ERR "waiting for unlock to complete timed out. Xstatus = %x, status = %llx.\n", status, cfi_read(map, adr)); DISABLE_VPP(map); spin_unlock_bh(chip->mutex); return -EIO; diff --git a/drivers/mtd/devices/doc2000.c b/drivers/mtd/devices/doc2000.c index 5cb921d2197a..ee961c661f9d 100644 --- a/drivers/mtd/devices/doc2000.c +++ b/drivers/mtd/devices/doc2000.c @@ -53,9 +53,11 @@ static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); static int doc_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf, u_char *eccbuf, int oobsel); + size_t *retlen, u_char *buf, u_char *eccbuf, + struct nand_oobinfo *unused); static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf, u_char *eccbuf, int oobsel); + size_t *retlen, const u_char *buf, u_char *eccbuf, + struct nand_oobinfo *unused); static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, size_t len, size_t *retlen, u_char *buf); static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, size_t len, @@ -601,7 +603,8 @@ static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, } static int doc_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, - size_t * retlen, u_char * buf, u_char * eccbuf, int oobsel) + size_t * retlen, u_char * buf, u_char * eccbuf, + struct nand_oobinfo *unused) { struct DiskOnChip *this = (struct DiskOnChip *) mtd->priv; unsigned long docptr; @@ -750,7 +753,8 @@ static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf, - u_char * eccbuf, int oobsel) + u_char * eccbuf, + struct nand_oobinfo *unused) { struct DiskOnChip *this = (struct DiskOnChip *) mtd->priv; int di; /* Yes, DI is a hangover from when I was disassembling the binary driver */ diff --git a/drivers/mtd/devices/doc2001.c b/drivers/mtd/devices/doc2001.c index 25eea68ad774..223e29189050 100644 --- a/drivers/mtd/devices/doc2001.c +++ b/drivers/mtd/devices/doc2001.c @@ -37,9 +37,12 @@ static int doc_read(struct mtd_info *mtd, loff_t from, size_t len, static int doc_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf); static int doc_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf, u_char *eccbuf, int oobsel); + size_t *retlen, u_char *buf, u_char *eccbuf, + struct nand_oobinfo *unused); static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf, u_char *eccbuf, int oobsel); + size_t *retlen, const u_char *buf, u_char *eccbuf, + struct nand_oobinfo *unused); + static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, size_t len, size_t *retlen, u_char *buf); static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, size_t len, @@ -407,7 +410,8 @@ static int doc_read (struct mtd_info *mtd, loff_t from, size_t len, } static int doc_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf, u_char *eccbuf, int oobsel) + size_t *retlen, u_char *buf, u_char *eccbuf, + struct nand_oobinfo *unused) { int i, ret; volatile char dummy; @@ -533,7 +537,8 @@ static int doc_write (struct mtd_info *mtd, loff_t to, size_t len, } static int doc_write_ecc (struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf, u_char *eccbuf, int oobsel) + size_t *retlen, const u_char *buf, u_char *eccbuf, + struct nand_oobinfo *unused) { int i,ret = 0; volatile char dummy; diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c index 4a0f2ea7c286..e45b3fc99fde 100644 --- a/drivers/mtd/mtd_blkdevs.c +++ b/drivers/mtd/mtd_blkdevs.c @@ -220,7 +220,7 @@ static int blktrans_ioctl(struct inode *inode, struct file *file, return ret; g.start = get_start_sect(inode->i_bdev); - if (copy_to_user((void *)arg, &g, sizeof(g))) + if (copy_to_user((void __user *)arg, &g, sizeof(g))) return -EFAULT; return 0; } /* else */ diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index 801bcc8f08d4..b1a9257b9b75 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c @@ -116,7 +116,7 @@ static int mtd_close(struct inode *inode, struct file *file) */ #define MAX_KMALLOC_SIZE 0x20000 -static ssize_t mtd_read(struct file *file, char *buf, size_t count,loff_t *ppos) +static ssize_t mtd_read(struct file *file, char __user *buf, size_t count,loff_t *ppos) { struct mtd_info *mtd = (struct mtd_info *)file->private_data; size_t retlen=0; @@ -169,7 +169,7 @@ static ssize_t mtd_read(struct file *file, char *buf, size_t count,loff_t *ppos) return total_retlen; } /* mtd_read */ -static ssize_t mtd_write(struct file *file, const char *buf, size_t count,loff_t *ppos) +static ssize_t mtd_write(struct file *file, const char __user *buf, size_t count,loff_t *ppos) { struct mtd_info *mtd = (struct mtd_info *)file->private_data; char *kbuf; @@ -238,6 +238,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, u_int cmd, u_long arg) { struct mtd_info *mtd = (struct mtd_info *)file->private_data; + void __user *argp = (void __user *)arg; int ret = 0; u_long size; @@ -245,17 +246,17 @@ static int mtd_ioctl(struct inode *inode, struct file *file, size = (cmd & IOCSIZE_MASK) >> IOCSIZE_SHIFT; if (cmd & IOC_IN) { - ret = verify_area(VERIFY_READ, (char *)arg, size); + ret = verify_area(VERIFY_READ, argp, size); if (ret) return ret; } if (cmd & IOC_OUT) { - ret = verify_area(VERIFY_WRITE, (char *)arg, size); + ret = verify_area(VERIFY_WRITE, argp, size); if (ret) return ret; } switch (cmd) { case MEMGETREGIONCOUNT: - if (copy_to_user((int *) arg, &(mtd->numeraseregions), sizeof(int))) + if (copy_to_user(argp, &(mtd->numeraseregions), sizeof(int))) return -EFAULT; break; @@ -263,24 +264,19 @@ static int mtd_ioctl(struct inode *inode, struct file *file, { struct region_info_user ur; - if (copy_from_user( &ur, - (struct region_info_user *)arg, - sizeof(struct region_info_user))) { + if (copy_from_user(&ur, argp, sizeof(struct region_info_user))) return -EFAULT; - } if (ur.regionindex >= mtd->numeraseregions) return -EINVAL; - if (copy_to_user((struct mtd_erase_region_info *) arg, - &(mtd->eraseregions[ur.regionindex]), + if (copy_to_user(argp, &(mtd->eraseregions[ur.regionindex]), sizeof(struct mtd_erase_region_info))) return -EFAULT; break; } case MEMGETINFO: - if (copy_to_user((struct mtd_info *)arg, mtd, - sizeof(struct mtd_info_user))) + if (copy_to_user(argp, mtd, sizeof(struct mtd_info_user))) return -EFAULT; break; @@ -301,7 +297,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, init_waitqueue_head(&waitq); memset (erase,0,sizeof(struct erase_info)); - if (copy_from_user(&erase->addr, (u_long *)arg, + if (copy_from_user(&erase->addr, argp, 2 * sizeof(u_long))) { kfree(erase); return -EFAULT; @@ -345,7 +341,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, if(!(file->f_mode & 2)) return -EPERM; - if (copy_from_user(&buf, (struct mtd_oob_buf *)arg, sizeof(struct mtd_oob_buf))) + if (copy_from_user(&buf, argp, sizeof(struct mtd_oob_buf))) return -EFAULT; if (buf.length > 0x4096) @@ -354,7 +350,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, if (!mtd->write_oob) ret = -EOPNOTSUPP; else - ret = verify_area(VERIFY_READ, (char *)buf.ptr, buf.length); + ret = verify_area(VERIFY_READ, buf.ptr, buf.length); if (ret) return ret; @@ -370,7 +366,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, ret = (mtd->write_oob)(mtd, buf.start, buf.length, &retlen, databuf); - if (copy_to_user((void *)arg + sizeof(u_int32_t), &retlen, sizeof(u_int32_t))) + if (copy_to_user(argp + sizeof(u_int32_t), &retlen, sizeof(u_int32_t))) ret = -EFAULT; kfree(databuf); @@ -384,7 +380,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, void *databuf; ssize_t retlen; - if (copy_from_user(&buf, (struct mtd_oob_buf *)arg, sizeof(struct mtd_oob_buf))) + if (copy_from_user(&buf, argp, sizeof(struct mtd_oob_buf))) return -EFAULT; if (buf.length > 0x4096) @@ -393,7 +389,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, if (!mtd->read_oob) ret = -EOPNOTSUPP; else - ret = verify_area(VERIFY_WRITE, (char *)buf.ptr, buf.length); + ret = verify_area(VERIFY_WRITE, buf.ptr, buf.length); if (ret) return ret; @@ -404,7 +400,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, ret = (mtd->read_oob)(mtd, buf.start, buf.length, &retlen, databuf); - if (copy_to_user((void *)arg + sizeof(u_int32_t), &retlen, sizeof(u_int32_t))) + if (copy_to_user(argp + sizeof(u_int32_t), &retlen, sizeof(u_int32_t))) ret = -EFAULT; else if (retlen && copy_to_user(buf.ptr, databuf, retlen)) ret = -EFAULT; @@ -417,7 +413,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, { unsigned long adrs[2]; - if (copy_from_user(adrs ,(void *)arg, 2* sizeof(unsigned long))) + if (copy_from_user(adrs, argp, 2* sizeof(unsigned long))) return -EFAULT; if (!mtd->lock) @@ -431,7 +427,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, { unsigned long adrs[2]; - if (copy_from_user(adrs, (void *)arg, 2* sizeof(unsigned long))) + if (copy_from_user(adrs, argp, 2* sizeof(unsigned long))) return -EFAULT; if (!mtd->unlock) @@ -443,7 +439,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, case MEMSETOOBSEL: { - if (copy_from_user(&mtd->oobinfo ,(void *)arg, sizeof(struct nand_oobinfo))) + if (copy_from_user(&mtd->oobinfo, argp, sizeof(struct nand_oobinfo))) return -EFAULT; break; } diff --git a/drivers/net/dgrs.h b/drivers/net/dgrs.h index c9f99e90f561..c347cd117409 100644 --- a/drivers/net/dgrs.h +++ b/drivers/net/dgrs.h @@ -26,7 +26,7 @@ typedef struct dgrs_ioctl { unsigned short cmd; /* Command to run */ unsigned short len; /* Length of the data buffer */ - unsigned char *data; /* Pointer to the data buffer */ + unsigned char __user *data; /* Pointer to the data buffer */ unsigned short port; /* port number for command, if needed */ unsigned short filter; /* filter number for command, if needed */ } DGRS_IOCTL; diff --git a/drivers/net/ppp_async.c b/drivers/net/ppp_async.c index 0394ee0adcc7..302193ed0e05 100644 --- a/drivers/net/ppp_async.c +++ b/drivers/net/ppp_async.c @@ -238,7 +238,7 @@ ppp_asynctty_close(struct tty_struct *tty) */ static ssize_t ppp_asynctty_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t count) + unsigned char __user *buf, size_t count) { return -EAGAIN; } @@ -249,7 +249,7 @@ ppp_asynctty_read(struct tty_struct *tty, struct file *file, */ static ssize_t ppp_asynctty_write(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t count) + const unsigned char __user *buf, size_t count) { return -EAGAIN; } @@ -260,6 +260,7 @@ ppp_asynctty_ioctl(struct tty_struct *tty, struct file *file, { struct asyncppp *ap = ap_get(tty); int err, val; + int __user *p = (int __user *)arg; if (ap == 0) return -ENXIO; @@ -270,7 +271,7 @@ ppp_asynctty_ioctl(struct tty_struct *tty, struct file *file, if (ap == 0) break; err = -EFAULT; - if (put_user(ppp_channel_index(&ap->chan), (int *) arg)) + if (put_user(ppp_channel_index(&ap->chan), p)) break; err = 0; break; @@ -280,7 +281,7 @@ ppp_asynctty_ioctl(struct tty_struct *tty, struct file *file, if (ap == 0) break; err = -EFAULT; - if (put_user(ppp_unit_number(&ap->chan), (int *) arg)) + if (put_user(ppp_unit_number(&ap->chan), p)) break; err = 0; break; @@ -299,7 +300,7 @@ ppp_asynctty_ioctl(struct tty_struct *tty, struct file *file, case FIONREAD: val = 0; - if (put_user(val, (int *) arg)) + if (put_user(val, p)) break; err = 0; break; @@ -397,6 +398,8 @@ static int ppp_async_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg) { struct asyncppp *ap = chan->private; + void __user *argp = (void __user *)arg; + int __user *p = argp; int err, val; u32 accm[8]; @@ -404,12 +407,12 @@ ppp_async_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg) switch (cmd) { case PPPIOCGFLAGS: val = ap->flags | ap->rbits; - if (put_user(val, (int *) arg)) + if (put_user(val, p)) break; err = 0; break; case PPPIOCSFLAGS: - if (get_user(val, (int *) arg)) + if (get_user(val, p)) break; ap->flags = val & ~SC_RCV_BITS; spin_lock_irq(&ap->recv_lock); @@ -419,34 +422,34 @@ ppp_async_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg) break; case PPPIOCGASYNCMAP: - if (put_user(ap->xaccm[0], (u32 *) arg)) + if (put_user(ap->xaccm[0], (u32 __user *)argp)) break; err = 0; break; case PPPIOCSASYNCMAP: - if (get_user(ap->xaccm[0], (u32 *) arg)) + if (get_user(ap->xaccm[0], (u32 __user *)argp)) break; err = 0; break; case PPPIOCGRASYNCMAP: - if (put_user(ap->raccm, (u32 *) arg)) + if (put_user(ap->raccm, (u32 __user *)argp)) break; err = 0; break; case PPPIOCSRASYNCMAP: - if (get_user(ap->raccm, (u32 *) arg)) + if (get_user(ap->raccm, (u32 __user *)argp)) break; err = 0; break; case PPPIOCGXASYNCMAP: - if (copy_to_user((void __user *) arg, ap->xaccm, sizeof(ap->xaccm))) + if (copy_to_user(argp, ap->xaccm, sizeof(ap->xaccm))) break; err = 0; break; case PPPIOCSXASYNCMAP: - if (copy_from_user(accm, (void __user *) arg, sizeof(accm))) + if (copy_from_user(accm, argp, sizeof(accm))) break; accm[2] &= ~0x40000000U; /* can't escape 0x5e */ accm[3] |= 0x60000000U; /* must escape 0x7d, 0x7e */ @@ -455,12 +458,12 @@ ppp_async_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg) break; case PPPIOCGMRU: - if (put_user(ap->mru, (int *) arg)) + if (put_user(ap->mru, p)) break; err = 0; break; case PPPIOCSMRU: - if (get_user(val, (int *) arg)) + if (get_user(val, p)) break; if (val < PPP_MRU) val = PPP_MRU; diff --git a/drivers/net/ppp_synctty.c b/drivers/net/ppp_synctty.c index b6157c89ba65..f2c73356933a 100644 --- a/drivers/net/ppp_synctty.c +++ b/drivers/net/ppp_synctty.c @@ -288,7 +288,7 @@ ppp_sync_close(struct tty_struct *tty) */ static ssize_t ppp_sync_read(struct tty_struct *tty, struct file *file, - unsigned char *buf, size_t count) + unsigned char __user *buf, size_t count) { return -EAGAIN; } @@ -299,7 +299,7 @@ ppp_sync_read(struct tty_struct *tty, struct file *file, */ static ssize_t ppp_sync_write(struct tty_struct *tty, struct file *file, - const unsigned char *buf, size_t count) + const unsigned char __user *buf, size_t count) { return -EAGAIN; } @@ -309,6 +309,7 @@ ppp_synctty_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg) { struct syncppp *ap = sp_get(tty); + int __user *p = (int __user *)arg; int err, val; if (ap == 0) @@ -320,7 +321,7 @@ ppp_synctty_ioctl(struct tty_struct *tty, struct file *file, if (ap == 0) break; err = -EFAULT; - if (put_user(ppp_channel_index(&ap->chan), (int *) arg)) + if (put_user(ppp_channel_index(&ap->chan), p)) break; err = 0; break; @@ -330,7 +331,7 @@ ppp_synctty_ioctl(struct tty_struct *tty, struct file *file, if (ap == 0) break; err = -EFAULT; - if (put_user(ppp_unit_number(&ap->chan), (int *) arg)) + if (put_user(ppp_unit_number(&ap->chan), p)) break; err = 0; break; @@ -349,7 +350,7 @@ ppp_synctty_ioctl(struct tty_struct *tty, struct file *file, case FIONREAD: val = 0; - if (put_user(val, (int *) arg)) + if (put_user(val, p)) break; err = 0; break; @@ -449,17 +450,19 @@ ppp_sync_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg) struct syncppp *ap = chan->private; int err, val; u32 accm[8]; + void __user *argp = (void __user *)arg; + u32 __user *p = argp; err = -EFAULT; switch (cmd) { case PPPIOCGFLAGS: val = ap->flags | ap->rbits; - if (put_user(val, (int *) arg)) + if (put_user(val, (int __user *) argp)) break; err = 0; break; case PPPIOCSFLAGS: - if (get_user(val, (int *) arg)) + if (get_user(val, (int __user *) argp)) break; ap->flags = val & ~SC_RCV_BITS; spin_lock_irq(&ap->recv_lock); @@ -469,34 +472,34 @@ ppp_sync_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg) break; case PPPIOCGASYNCMAP: - if (put_user(ap->xaccm[0], (u32 *) arg)) + if (put_user(ap->xaccm[0], p)) break; err = 0; break; case PPPIOCSASYNCMAP: - if (get_user(ap->xaccm[0], (u32 *) arg)) + if (get_user(ap->xaccm[0], p)) break; err = 0; break; case PPPIOCGRASYNCMAP: - if (put_user(ap->raccm, (u32 *) arg)) + if (put_user(ap->raccm, p)) break; err = 0; break; case PPPIOCSRASYNCMAP: - if (get_user(ap->raccm, (u32 *) arg)) + if (get_user(ap->raccm, p)) break; err = 0; break; case PPPIOCGXASYNCMAP: - if (copy_to_user((void *) arg, ap->xaccm, sizeof(ap->xaccm))) + if (copy_to_user(argp, ap->xaccm, sizeof(ap->xaccm))) break; err = 0; break; case PPPIOCSXASYNCMAP: - if (copy_from_user(accm, (void *) arg, sizeof(accm))) + if (copy_from_user(accm, argp, sizeof(accm))) break; accm[2] &= ~0x40000000U; /* can't escape 0x5e */ accm[3] |= 0x60000000U; /* must escape 0x7d, 0x7e */ @@ -505,12 +508,12 @@ ppp_sync_ioctl(struct ppp_channel *chan, unsigned int cmd, unsigned long arg) break; case PPPIOCGMRU: - if (put_user(ap->mru, (int *) arg)) + if (put_user(ap->mru, (int __user *) argp)) break; err = 0; break; case PPPIOCSMRU: - if (get_user(val, (int *) arg)) + if (get_user(val, (int __user *) argp)) break; if (val < PPP_MRU) val = PPP_MRU; diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c index 6f4f64da7023..a64c56c0edbf 100644 --- a/drivers/net/pppoe.c +++ b/drivers/net/pppoe.c @@ -691,7 +691,7 @@ static int pppoe_ioctl(struct socket *sock, unsigned int cmd, if (put_user(po->pppoe_dev->mtu - sizeof(struct pppoe_hdr) - PPP_HDRLEN, - (int *) arg)) + (int __user *) arg)) break; err = 0; break; @@ -702,7 +702,7 @@ static int pppoe_ioctl(struct socket *sock, unsigned int cmd, break; err = -EFAULT; - if (get_user(val,(int *) arg)) + if (get_user(val,(int __user *) arg)) break; if (val < (po->pppoe_dev->mtu @@ -715,7 +715,7 @@ static int pppoe_ioctl(struct socket *sock, unsigned int cmd, case PPPIOCSFLAGS: err = -EFAULT; - if (get_user(val, (int *) arg)) + if (get_user(val, (int __user *) arg)) break; err = 0; break; @@ -736,7 +736,7 @@ static int pppoe_ioctl(struct socket *sock, unsigned int cmd, PPPoE address to which frames are forwarded to */ err = -EFAULT; if (copy_from_user(&po->pppoe_relay, - (void*)arg, + (void __user *)arg, sizeof(struct sockaddr_pppox))) break; diff --git a/drivers/net/pppox.c b/drivers/net/pppox.c index 9a29158473d8..0a585bc369c5 100644 --- a/drivers/net/pppox.c +++ b/drivers/net/pppox.c @@ -86,7 +86,7 @@ static int pppox_ioctl(struct socket* sock, unsigned int cmd, rc = -EINVAL; index = ppp_channel_index(&po->chan); - if (put_user(index , (int *) arg)) + if (put_user(index , (int __user *) arg)) break; rc = 0; diff --git a/drivers/net/sk98lin/h/skdrv2nd.h b/drivers/net/sk98lin/h/skdrv2nd.h index dba3d2dd2f40..0790e7b7a5c1 100644 --- a/drivers/net/sk98lin/h/skdrv2nd.h +++ b/drivers/net/sk98lin/h/skdrv2nd.h @@ -170,7 +170,7 @@ struct s_DrvRlmtMbuf { typedef struct s_IOCTL SK_GE_IOCTL; struct s_IOCTL { - char* pData; + char __user * pData; unsigned int Len; }; diff --git a/drivers/net/sunhme.c b/drivers/net/sunhme.c index 6d2c87dcae1c..13fdcca49cff 100644 --- a/drivers/net/sunhme.c +++ b/drivers/net/sunhme.c @@ -528,8 +528,10 @@ static void happy_meal_tcvr_write(struct happy_meal *hp, ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value)); /* Welcome to Sun Microsystems, can I take your order please? */ - if (!(hp->happy_flags & HFLAG_FENABLE)) - return happy_meal_bb_write(hp, tregs, reg, value); + if (!(hp->happy_flags & HFLAG_FENABLE)) { + happy_meal_bb_write(hp, tregs, reg, value); + return; + } /* Would you like fries with that? */ hme_write32(hp, tregs + TCVR_FRAME, diff --git a/drivers/net/wireless/arlan-proc.c b/drivers/net/wireless/arlan-proc.c index 7fa36627dc50..b2e01523cb2b 100644 --- a/drivers/net/wireless/arlan-proc.c +++ b/drivers/net/wireless/arlan-proc.c @@ -399,7 +399,7 @@ static int arlan_setup_card_by_book(struct net_device *dev) static char arlan_drive_info[ARLAN_STR_SIZE] = "A655\n\0"; static int arlan_sysctl_info(ctl_table * ctl, int write, struct file *filp, - void *buffer, size_t * lenp) + void __user *buffer, size_t * lenp) { int i; int retv, pos, devnum; @@ -636,7 +636,7 @@ final: static int arlan_sysctl_info161719(ctl_table * ctl, int write, struct file *filp, - void *buffer, size_t * lenp) + void __user *buffer, size_t * lenp) { int i; int retv, pos, devnum; @@ -670,7 +670,7 @@ final: } static int arlan_sysctl_infotxRing(ctl_table * ctl, int write, struct file *filp, - void *buffer, size_t * lenp) + void __user *buffer, size_t * lenp) { int i; int retv, pos, devnum; @@ -699,7 +699,7 @@ final: } static int arlan_sysctl_inforxRing(ctl_table * ctl, int write, struct file *filp, - void *buffer, size_t * lenp) + void __user *buffer, size_t * lenp) { int i; int retv, pos, devnum; @@ -727,7 +727,7 @@ final: } static int arlan_sysctl_info18(ctl_table * ctl, int write, struct file *filp, - void *buffer, size_t * lenp) + void __user *buffer, size_t * lenp) { int i; int retv, pos, devnum; @@ -763,7 +763,7 @@ final: static char conf_reset_result[200]; static int arlan_configure(ctl_table * ctl, int write, struct file *filp, - void *buffer, size_t * lenp) + void __user *buffer, size_t * lenp) { int pos = 0; int devnum = ctl->procname[6] - '0'; @@ -788,7 +788,7 @@ static int arlan_configure(ctl_table * ctl, int write, struct file *filp, } static int arlan_sysctl_reset(ctl_table * ctl, int write, struct file *filp, - void *buffer, size_t * lenp) + void __user *buffer, size_t * lenp) { int pos = 0; int devnum = ctl->procname[5] - '0'; diff --git a/drivers/net/wireless/atmel.c b/drivers/net/wireless/atmel.c index 67cbbb71a9c1..6f6082d053ad 100644 --- a/drivers/net/wireless/atmel.c +++ b/drivers/net/wireless/atmel.c @@ -2360,7 +2360,7 @@ static const iw_handler atmel_private_handler[] = typedef struct atmel_priv_ioctl { char id[32]; - unsigned char *data; + unsigned char __user *data; unsigned short len; } atmel_priv_ioctl; diff --git a/drivers/net/wireless/orinoco_pci.c b/drivers/net/wireless/orinoco_pci.c index fb1ebf409e27..23222b951d5d 100644 --- a/drivers/net/wireless/orinoco_pci.c +++ b/drivers/net/wireless/orinoco_pci.c @@ -384,7 +384,7 @@ static int __init orinoco_pci_init(void) return pci_module_init(&orinoco_pci_driver); } -extern void __exit orinoco_pci_exit(void) +void __exit orinoco_pci_exit(void) { pci_unregister_driver(&orinoco_pci_driver); } diff --git a/drivers/net/wireless/orinoco_plx.c b/drivers/net/wireless/orinoco_plx.c index 0fcf84689f41..2eedd2d0f839 100644 --- a/drivers/net/wireless/orinoco_plx.c +++ b/drivers/net/wireless/orinoco_plx.c @@ -341,7 +341,7 @@ static int __init orinoco_plx_init(void) return pci_module_init(&orinoco_plx_driver); } -extern void __exit orinoco_plx_exit(void) +void __exit orinoco_plx_exit(void) { pci_unregister_driver(&orinoco_plx_driver); current->state = TASK_UNINTERRUPTIBLE; diff --git a/drivers/net/wireless/orinoco_tmd.c b/drivers/net/wireless/orinoco_tmd.c index 6e5ca46e8fb6..d234cc5a438c 100644 --- a/drivers/net/wireless/orinoco_tmd.c +++ b/drivers/net/wireless/orinoco_tmd.c @@ -219,7 +219,7 @@ static int __init orinoco_tmd_init(void) return pci_module_init(&orinoco_tmd_driver); } -extern void __exit orinoco_tmd_exit(void) +void __exit orinoco_tmd_exit(void) { pci_unregister_driver(&orinoco_tmd_driver); current->state = TASK_UNINTERRUPTIBLE; diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c index 09030a4a383c..ca8e54d57209 100644 --- a/drivers/net/wireless/ray_cs.c +++ b/drivers/net/wireless/ray_cs.c @@ -2854,7 +2854,7 @@ static void raycs_write(const char *name, write_proc_t *w, void *data) } } -static int write_essid(struct file *file, const char *buffer, unsigned long count, void *data) +static int write_essid(struct file *file, const char __user *buffer, unsigned long count, void *data) { static char proc_essid[33]; int len = count; @@ -2868,7 +2868,7 @@ static int write_essid(struct file *file, const char *buffer, unsigned long coun return count; } -static int write_int(struct file *file, const char *buffer, unsigned long count, void *data) +static int write_int(struct file *file, const char __user *buffer, unsigned long count, void *data) { static char proc_number[10]; char *p; diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c index 45a26d94aa40..a26e6590fa38 100644 --- a/drivers/net/wireless/strip.c +++ b/drivers/net/wireless/strip.c @@ -409,12 +409,12 @@ static const MetricomAddress zero_address; static const MetricomAddress broadcast_address = { {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF} }; -static const MetricomKey SIP0Key = { {"SIP0"} }; -static const MetricomKey ARP0Key = { {"ARP0"} }; -static const MetricomKey ATR_Key = { {"ATR "} }; -static const MetricomKey ACK_Key = { {"ACK_"} }; -static const MetricomKey INF_Key = { {"INF_"} }; -static const MetricomKey ERR_Key = { {"ERR_"} }; +static const MetricomKey SIP0Key = { "SIP0" }; +static const MetricomKey ARP0Key = { "ARP0" }; +static const MetricomKey ATR_Key = { "ATR " }; +static const MetricomKey ACK_Key = { "ACK_" }; +static const MetricomKey INF_Key = { "INF_" }; +static const MetricomKey ERR_Key = { "ERR_" }; static const long MaxARPInterval = 60 * HZ; /* One minute */ @@ -2733,14 +2733,14 @@ static int strip_ioctl(struct tty_struct *tty, struct file *file, switch (cmd) { case SIOCGIFNAME: - if(copy_to_user((void *) arg, strip_info->dev->name, strlen(strip_info->dev->name) + 1)) + if(copy_to_user((void __user *) arg, strip_info->dev->name, strlen(strip_info->dev->name) + 1)) return -EFAULT; break; case SIOCSIFHWADDR: { MetricomAddress addr; //printk(KERN_INFO "%s: SIOCSIFHWADDR\n", strip_info->dev->name); - if(copy_from_user(&addr, (void *) arg, sizeof(MetricomAddress))) + if(copy_from_user(&addr, (void __user *) arg, sizeof(MetricomAddress))) return -EFAULT; return set_mac_address(strip_info, &addr); } @@ -2750,7 +2750,7 @@ static int strip_ioctl(struct tty_struct *tty, struct file *file, case TCGETS: case TCGETA: - return n_tty_ioctl(tty, (struct file *) file, cmd, (unsigned long) arg); + return n_tty_ioctl(tty, file, cmd, arg); break; default: return -ENOIOCTLCMD; diff --git a/drivers/oprofile/oprofile_files.c b/drivers/oprofile/oprofile_files.c index 381abef6fc07..b22d4ea3f9b5 100644 --- a/drivers/oprofile/oprofile_files.c +++ b/drivers/oprofile/oprofile_files.c @@ -90,7 +90,7 @@ static struct file_operations dump_fops = { void oprofile_create_files(struct super_block * sb, struct dentry * root) { oprofilefs_create_file(sb, root, "enable", &enable_fops); - oprofilefs_create_file(sb, root, "dump", &dump_fops); + oprofilefs_create_file_perm(sb, root, "dump", &dump_fops, 0666); oprofilefs_create_file(sb, root, "buffer", &event_buffer_fops); oprofilefs_create_ulong(sb, root, "buffer_size", &fs_buffer_size); oprofilefs_create_ulong(sb, root, "buffer_watershed", &fs_buffer_watershed); diff --git a/drivers/oprofile/oprofilefs.c b/drivers/oprofile/oprofilefs.c index 2824c24c7f49..4b394ac31435 100644 --- a/drivers/oprofile/oprofilefs.c +++ b/drivers/oprofile/oprofilefs.c @@ -165,7 +165,8 @@ static struct file_operations ulong_ro_fops = { static struct dentry * __oprofilefs_create_file(struct super_block * sb, - struct dentry * root, char const * name, struct file_operations * fops) + struct dentry * root, char const * name, struct file_operations * fops, + int perm) { struct dentry * dentry; struct inode * inode; @@ -176,7 +177,7 @@ static struct dentry * __oprofilefs_create_file(struct super_block * sb, dentry = d_alloc(root, &qname); if (!dentry) return 0; - inode = oprofilefs_get_inode(sb, S_IFREG | 0644); + inode = oprofilefs_get_inode(sb, S_IFREG | perm); if (!inode) { dput(dentry); return 0; @@ -190,7 +191,8 @@ static struct dentry * __oprofilefs_create_file(struct super_block * sb, int oprofilefs_create_ulong(struct super_block * sb, struct dentry * root, char const * name, unsigned long * val) { - struct dentry * d = __oprofilefs_create_file(sb, root, name, &ulong_fops); + struct dentry * d = __oprofilefs_create_file(sb, root, name, + &ulong_fops, 0644); if (!d) return -EFAULT; @@ -202,7 +204,8 @@ int oprofilefs_create_ulong(struct super_block * sb, struct dentry * root, int oprofilefs_create_ro_ulong(struct super_block * sb, struct dentry * root, char const * name, unsigned long * val) { - struct dentry * d = __oprofilefs_create_file(sb, root, name, &ulong_ro_fops); + struct dentry * d = __oprofilefs_create_file(sb, root, name, + &ulong_ro_fops, 0444); if (!d) return -EFAULT; @@ -227,7 +230,8 @@ static struct file_operations atomic_ro_fops = { int oprofilefs_create_ro_atomic(struct super_block * sb, struct dentry * root, char const * name, atomic_t * val) { - struct dentry * d = __oprofilefs_create_file(sb, root, name, &atomic_ro_fops); + struct dentry * d = __oprofilefs_create_file(sb, root, name, + &atomic_ro_fops, 0444); if (!d) return -EFAULT; @@ -239,7 +243,16 @@ int oprofilefs_create_ro_atomic(struct super_block * sb, struct dentry * root, int oprofilefs_create_file(struct super_block * sb, struct dentry * root, char const * name, struct file_operations * fops) { - if (!__oprofilefs_create_file(sb, root, name, fops)) + if (!__oprofilefs_create_file(sb, root, name, fops, 0644)) + return -EFAULT; + return 0; +} + + +int oprofilefs_create_file_perm(struct super_block * sb, struct dentry * root, + char const * name, struct file_operations * fops, int perm) +{ + if (!__oprofilefs_create_file(sb, root, name, fops, perm)) return -EFAULT; return 0; } diff --git a/drivers/parport/ChangeLog b/drivers/parport/ChangeLog index 692415edb153..db717c1d62a5 100644 --- a/drivers/parport/ChangeLog +++ b/drivers/parport/ChangeLog @@ -1,3 +1,7 @@ +2001-10-11 Tim Waugh <twaugh@redhat.com> + * parport_pc.c, parport_serial.c: Support for NetMos cards. + + Patch originally from Michael Reinelt <reinelt@eunet.at>. + 2002-04-25 Tim Waugh <twaugh@redhat.com> * parport_serial.c, parport_pc.c: Move some SIIG cards around. diff --git a/drivers/parport/parport_pc.c b/drivers/parport/parport_pc.c index 218eb4fd785e..fe4cc866de08 100644 --- a/drivers/parport/parport_pc.c +++ b/drivers/parport/parport_pc.c @@ -2632,6 +2632,10 @@ enum parport_pc_pci_cards { oxsemi_840, aks_0100, mobility_pp, + netmos_9705, + netmos_9805, + netmos_9815, + netmos_9855, }; @@ -2701,6 +2705,10 @@ static struct parport_pc_pci { /* oxsemi_840 */ { 1, { { 0, -1 }, } }, /* aks_0100 */ { 1, { { 0, -1 }, } }, /* mobility_pp */ { 1, { { 0, 1 }, } }, + /* netmos_9705 */ { 1, { { 0, -1 }, } }, /* untested */ + /* netmos_9805 */ { 1, { { 0, -1 }, } }, /* untested */ + /* netmos_9815 */ { 2, { { 0, -1 }, { 2, -1 }, } }, /* untested */ + /* netmos_9855 */ { 2, { { 0, -1 }, { 2, -1 }, } }, /* untested */ }; static struct pci_device_id parport_pc_pci_tbl[] = { @@ -2769,6 +2777,15 @@ static struct pci_device_id parport_pc_pci_tbl[] = { PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_840 }, { PCI_VENDOR_ID_AKS, PCI_DEVICE_ID_AKS_ALADDINCARD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, aks_0100 }, + /* NetMos communication controllers */ + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9705, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9705 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9805, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9805 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9815, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9815 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 }, { 0, } /* terminate list */ }; MODULE_DEVICE_TABLE(pci,parport_pc_pci_tbl); diff --git a/drivers/parport/parport_serial.c b/drivers/parport/parport_serial.c index c29e8ded5fbc..1f17d0124cc7 100644 --- a/drivers/parport/parport_serial.c +++ b/drivers/parport/parport_serial.c @@ -33,6 +33,8 @@ enum parport_pc_pci_cards { titan_110l = 0, titan_210l, + netmos_9735, + netmos_9835, avlab_1s1p, avlab_1s1p_650, avlab_1s1p_850, @@ -71,6 +73,8 @@ static struct parport_pc_pci { } cards[] __devinitdata = { /* titan_110l */ { 1, { { 3, -1 }, } }, /* titan_210l */ { 1, { { 3, -1 }, } }, + /* netmos_9735 (not tested) */ { 1, { { 2, -1 }, } }, + /* netmos_9835 */ { 1, { { 2, -1 }, } }, /* avlab_1s1p */ { 1, { { 1, 2}, } }, /* avlab_1s1p_650 */ { 1, { { 1, 2}, } }, /* avlab_1s1p_850 */ { 1, { { 1, 2}, } }, @@ -93,6 +97,10 @@ static struct pci_device_id parport_serial_pci_tbl[] = { PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l }, { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_210L, PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9735, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9735 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9835 }, /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/ { 0x14db, 0x2110, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p}, { 0x14db, 0x2111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p_650}, @@ -172,6 +180,8 @@ static struct pci_board_no_ids pci_boards[] __devinitdata = { /* titan_110l */ { SPCI_FL_BASE1 | SPCI_FL_BASE_TABLE, 1, 921600 }, /* titan_210l */ { SPCI_FL_BASE1 | SPCI_FL_BASE_TABLE, 2, 921600 }, +/* netmos_9735 (n/t)*/ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 115200 }, +/* netmos_9835 */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 115200 }, /* avlab_1s1p (n/t) */ { SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, /* avlab_1s1p_650 (nt)*/{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, /* avlab_1s1p_850 (nt)*/{ SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 1, 115200 }, diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index b8f764fd210f..03681b915a56 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -3,7 +3,7 @@ # config PCI_USE_VECTOR bool "Vector-based interrupt indexing (MSI)" - depends on (X86_LOCAL_APIC && X86_IO_APIC && !X86_64) || IA64 + depends on (X86_LOCAL_APIC && X86_IO_APIC) || IA64 default n help This replaces the current existing IRQ-based index interrupt scheme diff --git a/drivers/sbus/char/openprom.c b/drivers/sbus/char/openprom.c index c140f63b366b..82bfa900c619 100644 --- a/drivers/sbus/char/openprom.c +++ b/drivers/sbus/char/openprom.c @@ -149,7 +149,6 @@ static int openprom_sunos_ioctl(struct inode * inode, struct file * file, char buffer[OPROMMAXPARAM+1], *buf; struct openpromio *opp; int bufsize, len, error = 0; - extern char saved_command_line[]; static int cnt; if (cmd == OPROMSETOPT) diff --git a/drivers/scsi/scsi_debug.c b/drivers/scsi/scsi_debug.c index 4067ba593d9c..b9509840a87e 100644 --- a/drivers/scsi/scsi_debug.c +++ b/drivers/scsi/scsi_debug.c @@ -484,7 +484,7 @@ int scsi_debug_queuecommand(struct scsi_cmnd * SCpnt, done_funct_t done) return schedule_resp(SCpnt, devip, done, errsts, scsi_debug_delay); } -static int scsi_debug_ioctl(struct scsi_device *dev, int cmd, void *arg) +static int scsi_debug_ioctl(struct scsi_device *dev, int cmd, void __user *arg) { if (SCSI_DEBUG_OPT_NOISE & scsi_debug_opts) { printk(KERN_INFO "scsi_debug: ioctl: cmd=0x%x\n", cmd); diff --git a/drivers/scsi/scsi_debug.h b/drivers/scsi/scsi_debug.h index a6c6ec91216a..965dd5e760c1 100644 --- a/drivers/scsi/scsi_debug.h +++ b/drivers/scsi/scsi_debug.h @@ -7,7 +7,7 @@ static int scsi_debug_slave_configure(struct scsi_device *); static void scsi_debug_slave_destroy(struct scsi_device *); static int scsi_debug_queuecommand(struct scsi_cmnd *, void (*done) (struct scsi_cmnd *)); -static int scsi_debug_ioctl(struct scsi_device *, int, void *); +static int scsi_debug_ioctl(struct scsi_device *, int, void __user *); static int scsi_debug_biosparam(struct scsi_device *, struct block_device *, sector_t, int[]); static int scsi_debug_abort(struct scsi_cmnd *); diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index f5f3e08bf3e9..a6639f467672 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -90,12 +90,12 @@ static struct uart_driver sci_uart_driver; #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB) -static void handle_error(struct sci_port *port) +static void handle_error(struct uart_port *port) { /* Clear error flags */ sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port)); } -static int get_char(struct sci_port *port) +static int get_char(struct uart_port *port) { unsigned long flags; unsigned short status; @@ -332,11 +332,11 @@ static void sci_init_pins_sci(struct uart_port *port, unsigned int cflag) #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF) #if defined(CONFIG_CPU_SH3) -/* For SH7707, SH7709, SH7709A, SH7729 */ +/* For SH7707, SH7709, SH7709A, SH7729, SH7300*/ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) { unsigned int fcr_val = 0; - +#if !defined(CONFIG_CPU_SUBTYPE_SH7300) /* SH7300 doesn't use RTS/CTS */ { unsigned short data; @@ -360,6 +360,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) /* Set /RTS2 (bit6) = 0 */ ctrl_outb(data&0xbf, SCPDR); } +#endif sci_out(port, SCFCR, fcr_val); } @@ -420,7 +421,7 @@ static void sci_transmit_chars(struct uart_port *port) #if !defined(SCI_ONLY) if (port->type == PORT_SCIF) { - txroom = 16 - (sci_in(port, SCFDR)>>8); + txroom = SCIF_TXROOM_MAX - (sci_in(port, SCFDR)>>8); } else { txroom = (sci_in(port, SCxSR) & SCI_TDRE)?1:0; } @@ -488,7 +489,7 @@ static inline void sci_receive_chars(struct uart_port *port, while (1) { #if !defined(SCI_ONLY) if (port->type == PORT_SCIF) { - count = sci_in(port, SCFDR)&0x001f; + count = sci_in(port, SCFDR)&SCIF_RFDC_MASK ; } else { count = (sci_in(port, SCxSR)&SCxSR_RDxF(port))?1:0; } @@ -671,8 +672,7 @@ static inline int sci_handle_breaks(struct uart_port *port) pr_debug("sci: BREAK detected\n"); } -#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_ST40STB1) || \ - defined(CONFIG_CPU_SUBTYPE_SH7760) +#if defined(SCIF_ORER) /* XXX: Handle SCIF overrun error */ if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) { sci_out(port, SCLSR, 0); @@ -726,6 +726,19 @@ static irqreturn_t sci_er_interrupt(int irq, void *ptr, struct pt_regs *regs) sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port)); } } else { +#if defined(SCIF_ORER) + if((sci_in(port, SCLSR) & SCIF_ORER) != 0) { + struct tty_struct *tty = port->info->tty; + + sci_out(port, SCLSR, 0); + if(tty->flip.count<TTY_FLIPBUF_SIZE) { + *tty->flip.flag_buf_ptr++ = TTY_OVERRUN; + tty->flip.count++; + tty_flip_buffer_push(tty); + pr_debug("scif: overrun error\n"); + } + } +#endif sci_rx_interrupt(irq, ptr, regs); } @@ -748,6 +761,30 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr, struct pt_regs *regs) return IRQ_HANDLED; } +static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr, struct pt_regs *regs) +{ + unsigned short ssr_status, scr_status; + struct uart_port *port = ptr; + + ssr_status = sci_in(port,SCxSR); + scr_status = sci_in(port,SCSCR); + + /* Tx Interrupt */ + if ((ssr_status&0x0020) && (scr_status&0x0080)) + sci_tx_interrupt(irq, ptr, regs); + /* Rx Interrupt */ + if ((ssr_status&0x0002) && (scr_status&0x0040)) + sci_rx_interrupt(irq, ptr, regs); + /* Error Interrupt */ + if ((ssr_status&0x0080) && (scr_status&0x0400)) + sci_er_interrupt(irq, ptr, regs); + /* Break Interrupt */ + if ((ssr_status&0x0010) && (scr_status&0x0200)) + sci_br_interrupt(irq, ptr, regs); + + return IRQ_HANDLED; +} + #ifdef CONFIG_CPU_FREQ /* * Here we define a transistion notifier so that we can update all of our @@ -797,14 +834,26 @@ static int sci_request_irq(struct sci_port *port) const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full", "SCI Transmit Data Empty", "SCI Break" }; - for (i = 0; i < ARRAY_SIZE(handlers); i++) { - if (!port->irqs[i]) - continue; - if (request_irq(port->irqs[i], handlers[i], SA_INTERRUPT, - desc[i], port)) { + if (port->irqs[0] == port->irqs[1]) { + if (!port->irqs[0]) { + printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n"); + return -ENODEV; + } + if (request_irq(port->irqs[0], sci_mpxed_interrupt, SA_INTERRUPT, + "sci", port)) { printk(KERN_ERR "sci: Cannot allocate irq.\n"); return -ENODEV; } + } else { + for (i = 0; i < ARRAY_SIZE(handlers); i++) { + if (!port->irqs[i]) + continue; + if (request_irq(port->irqs[i], handlers[i], SA_INTERRUPT, + desc[i], port)) { + printk(KERN_ERR "sci: Cannot allocate irq.\n"); + return -ENODEV; + } + } } return 0; @@ -814,11 +863,18 @@ static void sci_free_irq(struct sci_port *port) { int i; - for (i = 0; i < ARRAY_SIZE(port->irqs); i++) { - if (!port->irqs[i]) - continue; - - free_irq(port->irqs[i], port); + if (port->irqs[0] == port->irqs[1]) { + if (!port->irqs[0]) + printk("sci: sci_free_irq error\n"); + else + free_irq(port->irqs[0], port); + } else { + for (i = 0; i < ARRAY_SIZE(port->irqs); i++) { + if (!port->irqs[i]) + continue; + + free_irq(port->irqs[i], port); + } } } @@ -873,7 +929,7 @@ static void sci_start_rx(struct uart_port *port, unsigned int tty_start) /* Set RIE (Receive Interrupt Enable) bit in SCSCR */ local_irq_save(flags); ctrl = sci_in(port, SCSCR); - ctrl |= SCI_CTRL_FLAGS_RIE; + ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE; sci_out(port, SCSCR, ctrl); local_irq_restore(flags); } @@ -886,7 +942,7 @@ static void sci_stop_rx(struct uart_port *port) /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */ local_irq_save(flags); ctrl = sci_in(port, SCSCR); - ctrl &= ~SCI_CTRL_FLAGS_RIE; + ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE); sci_out(port, SCSCR, ctrl); local_irq_restore(flags); } @@ -976,7 +1032,7 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios, case 38400: t = BPS_38400; break; case 57600: t = BPS_57600; break; case 115200: t = BPS_115200; break; - default: t = BPS_115200; break; + default: t = SCBRR_VALUE(baud); break; } if (t > 0) { @@ -1026,6 +1082,13 @@ static void sci_config_port(struct uart_port *port, int flags) struct sci_port *s = &sci_ports[port->line]; port->type = s->type; + +#if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) + if (port->mapbase == 0) + port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF"); + + port->membase = (void *)port->mapbase; +#endif } static int sci_verify_port(struct uart_port *port, struct serial_struct *ser) @@ -1119,6 +1182,36 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .irqs = SH3_IRDA_IRQS, .init_pins = sci_init_pins_irda, } +#elif defined(CONFIG_CPU_SUBTYPE_SH7300) + { + .port = { + .membase = (void *)0xA4430000, + .mapbase = 0xA4430000, + .iotype = SERIAL_IO_MEM, + .irq = 25, + .ops = &sci_uart_ops, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + }, + .type = PORT_SCIF, + .irqs = SH7300_SCIF0_IRQS, + .init_pins = sci_init_pins_scif, + }, +#elif defined(CONFIG_SH_RTS7751R2D) + { + .port = { + .membase = (void *)0xffe80000, + .mapbase = 0xffe80000, + .iotype = SERIAL_IO_MEM, + .irq = 43, + .ops = &sci_uart_ops, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + }, + .type = PORT_SCIF, + .irqs = SH4_SCIF_IRQS, + .init_pins = sci_init_pins_scif, + }, #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) { .port = { @@ -1220,6 +1313,19 @@ static struct sci_port sci_ports[SCI_NPORTS] = { .irqs = SH4_SCIF_IRQS, .init_pins = sci_init_pins_scif, }, +#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) + { + .port = { + .iotype = SERIAL_IO_MEM, + .irq = 42, + .ops = &sci_uart_ops, + .flags = ASYNC_BOOT_AUTOCONF, + .line = 0, + }, + .type = PORT_SCIF, + .irqs = SH5_SCIF_IRQS, + .init_pins = sci_init_pins_scif, + }, #elif defined(CONFIG_H83007) || defined(CONFIG_H83068) { .port = { @@ -1338,6 +1444,11 @@ static int __init serial_console_setup(struct console *co, char *options) port = &serial_console_port->port; port->type = serial_console_port->type; +#ifdef CONFIG_SUPERH64 + /* This is especially needed on sh64 to remap the SCIF */ + sci_config_port(port, 0); +#endif + /* * We need to set the initial uartclk here, since otherwise it will * only ever be setup at sci_init() time. @@ -1374,18 +1485,7 @@ static struct console serial_console = { static int __init sci_console_init(void) { -#ifdef CONFIG_SH_EARLY_PRINTK - extern void sh_console_unregister(void); - - /* - * Now that the real console is available, unregister the one we - * used while first booting. - */ - sh_console_unregister(); -#endif - register_console(&serial_console); - return 0; } @@ -1452,7 +1552,6 @@ static struct console kgdb_console = { static int __init kgdb_console_init(void) { register_console(&kgdb_console); - return 0; } diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 21312ddb70be..bf248f18a4ed 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h @@ -7,6 +7,7 @@ * Copyright (C) 2000 Greg Banks * Copyright (C) 2002, 2003 Paul Mundt * Modified to support multiple serial ports. Stuart Menefy (May 2000). + * Modified to support SH7300(SH-Mobile) SCIF. Takashi Kusuda (Jun 2003). * Modified to support H8/300 Series Yoshinori Sato (Feb 2004). */ #include <linux/config.h> @@ -36,12 +37,14 @@ #define SH7760_SCIF0_IRQS { 52, 53, 55, 54 } #define SH7760_SCIF1_IRQS { 72, 73, 75, 74 } #define SH7760_SCIF2_IRQS { 76, 77, 79, 78 } +#define SH7300_SCIF0_IRQS {80, 80, 80, 80 } #define H8300H_SCI_IRQS0 {52, 53, 54, 0 } #define H8300H_SCI_IRQS1 {56, 57, 58, 0 } #define H8300H_SCI_IRQS2 {60, 61, 62, 0 } #define H8S_SCI_IRQS0 {88, 89, 90, 0 } #define H8S_SCI_IRQS1 {92, 93, 94, 0 } #define H8S_SCI_IRQS2 {96, 97, 98, 0 } +#define SH5_SCIF_IRQS {39, 40, 42, 0 } #if defined(CONFIG_CPU_SUBTYPE_SH7708) # define SCI_NPORTS 1 @@ -54,6 +57,13 @@ # define SCPDR 0xA4000136 /* 8 bit SCI and SCIF */ # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ # define SCI_AND_SCIF +#elif defined(CONFIG_SH_RTS7751R2D) +# define SCI_NPORTS 1 +# define SCSPTR1 0xffe0001c /* 8 bit SCI */ +# define SCSPTR2 0xFFE80020 /* 16 bit SCIF */ +# define SCIF_ORER 0x0001 /* overrun error bit */ +# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ +# define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) # define SCI_NPORTS 2 # define SCSPTR1 0xffe0001c /* 8 bit SCI */ @@ -68,9 +78,15 @@ # define SCSPTR0 0xfe600000 /* 16 bit SCIF */ # define SCSPTR1 0xfe610000 /* 16 bit SCIF */ # define SCSPTR2 0xfe620000 /* 16 bit SCIF */ -# define SCIF_ORDER 0x0001 /* overrun error bit */ +# define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY +#elif defined(CONFIG_CPU_SUBTYPE_SH7300) +# define SCI_NPORTS 1 +# define SCPCR 0xA4050116 /* 16 bit SCIF */ +# define SCPDR 0xA4050136 /* 16 bit SCIF */ +# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ +# define SCIF_ONLY #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) # define SCI_NPORTS 2 # define SCSPTR1 0xffe00020 /* 16 bit SCIF */ @@ -78,6 +94,22 @@ # define SCIF_ORER 0x0001 /* overrun error bit */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ # define SCIF_ONLY +#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) +# include <asm/hardware.h> +# define SCIF_BASE_ADDR 0x01030000 +# define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR +# define SCIF_PTR2_OFFS 0x0000020 +# define SCIF_LSR2_OFFS 0x0000024 +# define SCI_NPORTS 1 +# define SCI_INIT { \ + { {}, PORT_SCIF, 0, \ + SH5_SCIF_IRQS, sci_init_pins_scif } \ +} +# define SCSPTR2 ((port->mapbase)+SCIF_PTR2_OFFS) /* 16 bit SCIF */ +# define SCLSR2 ((port->mapbase)+SCIF_LSR2_OFFS) /* 16 bit SCIF */ +# define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0, + TE=1,RE=1,REIE=1 */ +# define SCIF_ONLY #elif defined(CONFIG_H83007) || defined(CONFIG_H83068) # define SCI_NPORTS 3 # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ @@ -97,7 +129,11 @@ #define SCI_CTRL_FLAGS_RIE 0x40 /* all */ #define SCI_CTRL_FLAGS_TE 0x20 /* all */ #define SCI_CTRL_FLAGS_RE 0x10 /* all */ -/* SCI_CTRL_FLAGS_REIE 0x08 * 7750 SCIF */ +#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) +#define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */ +#else +#define SCI_CTRL_FLAGS_REIE 0 +#endif /* SCI_CTRL_FLAGS_MPIE 0x08 * 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ /* SCI_CTRL_FLAGS_TEIE 0x04 * 7707 SCI, 7708 SCI, 7709 SCI, 7750 SCI */ /* SCI_CTRL_FLAGS_CKE1 0x02 * all */ @@ -125,7 +161,16 @@ #define SCIF_RDF 0x0002 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */ #define SCIF_DR 0x0001 /* 7707 SCIF, 7709 SCIF, 7750 SCIF */ +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +#define SCIF_ORER 0x0200 +#define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) +#define SCIF_RFDC_MASK 0x007f +#define SCIF_TXROOM_MAX 64 +#else #define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) +#define SCIF_RFDC_MASK 0x001f +#define SCIF_TXROOM_MAX 16 +#endif #if defined(SCI_ONLY) # define SCxSR_TEND(port) SCI_TEND @@ -145,14 +190,25 @@ # define SCxSR_ERRORS(port) SCIF_ERRORS # define SCxSR_RDxF(port) SCIF_RDF # define SCxSR_TDxE(port) SCIF_TDFE +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +# define SCxSR_ORER(port) SCIF_ORER +#else # define SCxSR_ORER(port) 0x0000 +#endif # define SCxSR_FER(port) SCIF_FER # define SCxSR_PER(port) SCIF_PER # define SCxSR_BRK(port) SCIF_BRK +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +# define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc) +# define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73) +# define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf) +# define SCxSR_BREAK_CLEAR(port) (sci_in(port,SCxSR)&0xffe3) +#else # define SCxSR_RDxF_CLEAR(port) 0x00fc # define SCxSR_ERROR_CLEAR(port) 0x0073 # define SCxSR_TDxE_CLEAR(port) 0x00df # define SCxSR_BREAK_CLEAR(port) 0x00e3 +#endif #else # define SCxSR_TEND(port) (((port)->type == PORT_SCI) ? SCI_TEND : SCIF_TEND) # define SCxSR_ERRORS(port) (((port)->type == PORT_SCI) ? SCI_ERRORS : SCIF_ERRORS) @@ -171,6 +227,7 @@ /* SCFCR */ #define SCFCR_RFRST 0x0002 #define SCFCR_TFRST 0x0004 +#define SCFCR_TCRST 0x4000 #define SCFCR_MCE 0x0008 #define SCI_MAJOR 204 @@ -250,12 +307,17 @@ struct sci_port { } #ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +#define SCIF_FNS(name, scif_offset, scif_size) \ + CPU_SCIF_FNS(name, scif_offset, scif_size) +#else #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ h8_sci_offset, h8_sci_size) \ CPU_SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh3_scif_offset, sh3_scif_size) #define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \ CPU_SCIF_FNS(name, sh3_scif_offset, sh3_scif_size) +#endif #elif defined(__H8300H__) || defined(__H8300S__) #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \ sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \ @@ -271,6 +333,19 @@ struct sci_port { CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) #endif +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +SCIF_FNS(SCSMR, 0x00, 16) +SCIF_FNS(SCBRR, 0x04, 8) +SCIF_FNS(SCSCR, 0x08, 16) +SCIF_FNS(SCTDSR, 0x0c, 8) +SCIF_FNS(SCFER, 0x10, 16) +SCIF_FNS(SCxSR, 0x14, 16) +SCIF_FNS(SCFCR, 0x18, 16) +SCIF_FNS(SCFDR, 0x1c, 16) +SCIF_FNS(SCxTDR, 0x20, 8) +SCIF_FNS(SCxRDR, 0x24, 8) +SCIF_FNS(SCLSR, 0x24, 16) +#else /* reg SCI/SH3 SCI/SH4 SCIF/SH3 SCIF/SH4 SCI/H8*/ /* name off sz off sz off sz off sz off sz*/ SCIx_FNS(SCSMR, 0x00, 8, 0x00, 8, 0x00, 8, 0x00, 16, 0x00, 8) @@ -281,8 +356,9 @@ SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8) SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) +SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) SCIF_FNS(SCLSR, 0, 0, 0x24, 16) - +#endif #define sci_in(port, reg) sci_##reg##_in(port) #define sci_out(port, reg, value) sci_##reg##_out(port, value) @@ -369,6 +445,13 @@ static inline int sci_rxd_in(struct uart_port *port) if (port->mapbase == 0xfe620000) return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ } +#elif defined(CONFIG_CPU_SUBTYPE_SH7300) +static inline int sci_rxd_in(struct uart_port *port) +{ + if (port->mapbase == 0xa4430000) + return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCIF0 */ + return 1; +} #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) static inline int sci_rxd_in(struct uart_port *port) { @@ -378,6 +461,11 @@ static inline int sci_rxd_in(struct uart_port *port) return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ } +#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) +static inline int sci_rxd_in(struct uart_port *port) +{ + return sci_in(port, SCSPTR)&0x0001 ? 1 : 0; /* SCIF */ +} #elif defined(__H8300H__) || defined(__H8300S__) static inline int sci_rxd_in(struct uart_port *port) { @@ -420,7 +508,9 @@ static inline int sci_rxd_in(struct uart_port *port) #define PCLK (current_cpu_data.module_clock) -#if !defined(__H8300H__) && !defined(__H8300S__) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +#define SCBRR_VALUE(bps) ((PCLK+16*bps)/(16*bps)-1) +#elif !defined(__H8300H__) && !defined(__H8300S__) #define SCBRR_VALUE(bps) ((PCLK+16*bps)/(32*bps)-1) #else #define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) diff --git a/drivers/usb/class/audio.c b/drivers/usb/class/audio.c index 96a1c025ddf0..648bbb033bb2 100644 --- a/drivers/usb/class/audio.c +++ b/drivers/usb/class/audio.c @@ -212,9 +212,6 @@ #define dprintk(x) -#undef abs -extern int abs(int __x) __attribute_const__; /* Shut up warning */ - /* --------------------------------------------------------------------- */ /* @@ -398,17 +395,6 @@ struct usb_audio_state { /* --------------------------------------------------------------------- */ -/* prevent picking up a bogus abs macro */ -#undef abs -static inline int abs(int x) -{ - if (x < 0) - return -x; - return x; -} - -/* --------------------------------------------------------------------- */ - static inline unsigned ld2(unsigned int x) { unsigned r = 0; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 7c551a2c26ce..d80e806d132a 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -40,7 +40,7 @@ config FB config FB_CIRRUS tristate "Cirrus Logic support" - depends on FB && (AMIGA || PCI) && BROKEN + depends on FB && (AMIGA || PCI) ---help--- This enables support for Cirrus Logic GD542x/543x based boards on Amiga: SD64, Piccolo, Picasso II/II+, Picasso IV, or EGS Spectrum. @@ -424,6 +424,8 @@ config E1355_FB_BASE config FB_RIVA tristate "nVidia Riva support" depends on FB && PCI + select I2C_ALGOBIT if FB_RIVA_I2C + select I2C if FB_RIVA_I2C help This driver supports graphics boards with the nVidia Riva/Geforce chips. @@ -434,8 +436,15 @@ config FB_RIVA config FB_RIVA_I2C bool "Enable DDC Support" - depends on FB_RIVA && I2C + depends on FB_RIVA help + This enables I2C support for nVidia Chipsets. This is used + only for getting EDID information from the attached display + allowing for robust video mode handling and switching. + + Because fbdev-2.6 requires that drivers must be able to + independently validate video mode parameters, you should say Y + here. config FB_I810 tristate "Intel 810/815 support (EXPERIMENTAL)" diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 22644fc8deb8..52e37a0fcda3 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -39,7 +39,7 @@ obj-$(CONFIG_FB_HP300) += hpfb.o cfbfillrect.o cfbimgblt.o obj-$(CONFIG_FB_OF) += offb.o cfbfillrect.o cfbimgblt.o cfbcopyarea.o obj-$(CONFIG_FB_IMSTT) += imsttfb.o cfbimgblt.o obj-$(CONFIG_FB_RETINAZ3) += retz3fb.o -obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o +obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o cfbfillrect.o cfbimgblt.o cfbcopyarea.o obj-$(CONFIG_FB_TRIDENT) += tridentfb.o cfbfillrect.o cfbimgblt.o cfbcopyarea.o obj-$(CONFIG_FB_S3TRIO) += S3triofb.o obj-$(CONFIG_FB_TGA) += tgafb.o cfbfillrect.o cfbcopyarea.o cfbimgblt.o diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c index 237ec2ee50a8..f201c8f77ee7 100644 --- a/drivers/video/cirrusfb.c +++ b/drivers/video/cirrusfb.c @@ -1,10 +1,13 @@ /* - * drivers/video/clgenfb.c - driver for Cirrus Logic chipsets + * drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets * * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com> * * Contributors (thanks, all!) * + * David Eger: + * Overhaul for Linux 2.6 + * * Jeff Rugen: * Major contributions; Motorola PowerStack (PPC and PCI) support, * GD54xx, 1280x1024 mode support, change MCLK based on VCLK. @@ -15,9 +18,9 @@ * Lars Hecking: * Amiga updates and testing. * - * Original clgenfb author: Frank Neumann + * Original cirrusfb author: Frank Neumann * - * Based on retz3fb.c and clgen.c: + * Based on retz3fb.c and cirrusfb.c: * Copyright (C) 1997 Jes Sorensen * Copyright (C) 1996 Frank Neumann * @@ -31,7 +34,7 @@ * */ -#define CLGEN_VERSION "1.9.9.1" +#define CIRRUSFB_VERSION "2.0-pre2" #include <linux/config.h> #include <linux/module.h> @@ -63,15 +66,8 @@ #define isPReP 0 #endif -#include <video/fbcon.h> -#include <video/fbcon-mfb.h> -#include <video/fbcon-cfb8.h> -#include <video/fbcon-cfb16.h> -#include <video/fbcon-cfb24.h> -#include <video/fbcon-cfb32.h> - -#include "clgenfb.h" -#include "vga.h" +#include "video/vga.h" +#include "video/cirrus.h" /***************************************************************** @@ -81,20 +77,20 @@ */ /* enable debug output? */ -/* #define CLGEN_DEBUG 1 */ +/* #define CIRRUSFB_DEBUG 1 */ /* disable runtime assertions? */ -/* #define CLGEN_NDEBUG */ +/* #define CIRRUSFB_NDEBUG */ /* debug output */ -#ifdef CLGEN_DEBUG +#ifdef CIRRUSFB_DEBUG #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) #else #define DPRINTK(fmt, args...) #endif /* debugging assertions */ -#ifndef CLGEN_NDEBUG +#ifndef CIRRUSFB_NDEBUG #define assert(expr) \ if(!(expr)) { \ printk( "Assertion failed! %s,%s,%s,line=%d\n",\ @@ -136,24 +132,25 @@ typedef enum { BT_ALPINE, /* GD543x/4x */ BT_GD5480, BT_LAGUNA, /* GD546x */ -} clgen_board_t; +} cirrusfb_board_t; /* * per-board-type information, used for enumerating and abstracting * chip-specific information - * NOTE: MUST be in the same order as clgen_board_t in order to + * NOTE: MUST be in the same order as cirrusfb_board_t in order to * use direct indexing on this array * NOTE: '__initdata' cannot be used as some of this info * is required at runtime. Maybe separate into an init-only and * a run-time table? */ -static const struct clgen_board_info_rec { - clgen_board_t btype; /* chipset enum, not strictly necessary, as - * clgen_board_info[] is directly indexed +static const struct cirrusfb_board_info_rec { + cirrusfb_board_t btype; /* chipset enum, not strictly necessary, as + * cirrusfb_board_info[] is directly indexed * by this value */ char *name; /* ASCII name of chipset */ - long maxclock; /* maximum video clock */ + long maxclock[5]; /* maximum video clock */ + /* for 1/4bpp, 8bpp 15/16bpp, 24bpp, 32bpp - numbers from xorg code */ unsigned init_sr07 : 1; /* init SR07 during init_vgachip() */ unsigned init_sr1f : 1; /* write SR1F during init_vgachip() */ unsigned scrn_start_bit19 : 1; /* construct bit 19 of screen start address */ @@ -166,11 +163,12 @@ static const struct clgen_board_info_rec { unsigned char sr07_8bpp_mux; unsigned char sr1f; /* SR1F VGA initial register value */ -} clgen_board_info[] = { +} cirrusfb_board_info[] = { { BT_NONE, }, /* dummy record */ { BT_SD64, "CL SD64", - 140000, /* the SD64/P4 have a higher max. videoclock */ + { 140000, 140000, 140000, 140000, 140000, }, /* guess */ + /* the SD64/P4 have a higher max. videoclock */ TRUE, TRUE, TRUE, @@ -182,7 +180,7 @@ static const struct clgen_board_info_rec { 0x20 }, { BT_PICCOLO, "CL Piccolo", - 90000, + { 90000, 90000, 90000, 90000, 90000 }, /* guess */ TRUE, TRUE, FALSE, @@ -194,7 +192,7 @@ static const struct clgen_board_info_rec { 0x22 }, { BT_PICASSO, "CL Picasso", - 90000, + { 90000, 90000, 90000, 90000, 90000, }, /* guess */ TRUE, TRUE, FALSE, @@ -206,7 +204,7 @@ static const struct clgen_board_info_rec { 0x22 }, { BT_SPECTRUM, "CL Spectrum", - 90000, + { 90000, 90000, 90000, 90000, 90000, }, /* guess */ TRUE, TRUE, FALSE, @@ -218,7 +216,7 @@ static const struct clgen_board_info_rec { 0x22 }, { BT_PICASSO4, "CL Picasso4", - 140000, /* the SD64/P4 have a higher max. videoclock */ + { 135100, 135100, 85500, 85500, 0 }, TRUE, FALSE, TRUE, @@ -230,7 +228,7 @@ static const struct clgen_board_info_rec { 0 }, { BT_ALPINE, "CL Alpine", - 110000, /* 135100 for some, 85500 for others */ + { 85500, 85500, 50000, 28500, 0}, /* for the GD5430. GD5446 can do more... */ TRUE, TRUE, TRUE, @@ -242,7 +240,7 @@ static const struct clgen_board_info_rec { 0x1C }, { BT_GD5480, "CL GD5480", - 90000, + { 135100, 200000, 200000, 135100, 135100 }, TRUE, TRUE, TRUE, @@ -254,7 +252,7 @@ static const struct clgen_board_info_rec { 0x1C }, { BT_LAGUNA, "CL Laguna", - 135100, + { 135100, 135100, 135100, 135100, 135100, }, /* guess */ FALSE, FALSE, TRUE, @@ -268,34 +266,34 @@ static const struct clgen_board_info_rec { #ifdef CONFIG_PCI -/* the list of PCI devices for which we probe, and the - * order in which we do it */ -static const struct { - clgen_board_t btype; - const char *nameOverride; /* XXX unused... for now */ - unsigned short device; -} clgen_pci_probe_list[] __initdata = { - { BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5436 }, - { BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5434_8 }, - { BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5434_4 }, - { BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_5430 }, /* GD-5440 has identical id */ - { BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_7543 }, - { BT_ALPINE, NULL, PCI_DEVICE_ID_CIRRUS_7548 }, - { BT_GD5480, NULL, PCI_DEVICE_ID_CIRRUS_5480 }, /* MacPicasso probably */ - { BT_PICASSO4, NULL, PCI_DEVICE_ID_CIRRUS_5446 }, /* Picasso 4 is a GD5446 */ - { BT_LAGUNA, "CL Laguna", PCI_DEVICE_ID_CIRRUS_5462 }, - { BT_LAGUNA, "CL Laguna 3D", PCI_DEVICE_ID_CIRRUS_5464 }, - { BT_LAGUNA, "CL Laguna 3DA", PCI_DEVICE_ID_CIRRUS_5465 }, +#define CHIP(id, btype) \ + { PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_##id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (btype) } + +static struct pci_device_id cirrusfb_pci_table[] = { + CHIP( CIRRUS_5436, BT_ALPINE ), + CHIP( CIRRUS_5434_8, BT_ALPINE ), + CHIP( CIRRUS_5434_4, BT_ALPINE ), + CHIP( CIRRUS_5430, BT_ALPINE ), /* GD-5440 has identical id */ + CHIP( CIRRUS_7543, BT_ALPINE ), + CHIP( CIRRUS_7548, BT_ALPINE ), + CHIP( CIRRUS_5480, BT_GD5480 ), /* MacPicasso probably */ + CHIP( CIRRUS_5446, BT_PICASSO4 ), /* Picasso 4 is a GD5446 */ + CHIP( CIRRUS_5462, BT_LAGUNA ), /* CL Laguna */ + CHIP( CIRRUS_5464, BT_LAGUNA ), /* CL Laguna 3D */ + CHIP( CIRRUS_5465, BT_LAGUNA ), /* CL Laguna 3DA*/ + { 0, } }; +MODULE_DEVICE_TABLE(pci, cirrusfb_pci_table); +#undef CHIP #endif /* CONFIG_PCI */ #ifdef CONFIG_ZORRO static const struct { - clgen_board_t btype; + cirrusfb_board_t btype; zorro_id id, id2; unsigned long size; -} clgen_zorro_probe_list[] __initdata = { +} cirrusfb_zorro_probe_list[] __initdata = { { BT_SD64, ZORRO_PROD_HELFRICH_SD64_RAM, ZORRO_PROD_HELFRICH_SD64_REG, @@ -320,10 +318,7 @@ static const struct { #endif /* CONFIG_ZORRO */ - -struct clgenfb_par { - struct fb_var_screeninfo var; - +struct cirrusfb_regs { __u32 line_length; /* in BYTES! */ __u32 visual; __u32 type; @@ -355,47 +350,36 @@ struct clgenfb_par { -#ifdef CLGEN_DEBUG +#ifdef CIRRUSFB_DEBUG typedef enum { CRT, SEQ -} clgen_dbg_reg_class_t; -#endif /* CLGEN_DEBUG */ +} cirrusfb_dbg_reg_class_t; +#endif /* CIRRUSFB_DEBUG */ /* info about board */ -struct clgenfb_info { - struct fb_info_gen gen; +struct cirrusfb_info { + struct fb_info *info; caddr_t fbmem; - caddr_t regs; + caddr_t regbase; caddr_t mem; unsigned long size; - clgen_board_t btype; - int smallboard; + cirrusfb_board_t btype; unsigned char SFR; /* Shadow of special function register */ unsigned long fbmem_phys; unsigned long fbregs_phys; - struct clgenfb_par currentmode; + struct cirrusfb_regs currentmode; + int blank_mode; + u32 pseudo_palette[17]; struct { u8 red, green, blue, pad; } palette[256]; - union { -#ifdef FBCON_HAS_CFB16 - u16 cfb16[16]; -#endif -#ifdef FBCON_HAS_CFB24 - u32 cfb24[16]; -#endif -#ifdef FBCON_HAS_CFB32 - u32 cfb32[16]; -#endif - } fbcon_cmap; - #ifdef CONFIG_ZORRO unsigned long board_addr, board_size; @@ -407,17 +391,9 @@ struct clgenfb_info { }; - - -static struct display disp; - -static struct clgenfb_info boards[MAX_NUM_BOARDS]; /* the boards */ - -static unsigned clgen_def_mode = 1; +static unsigned cirrusfb_def_mode = 1; static int noaccel = 0; - - /* * Predefined Video Modes */ @@ -425,7 +401,7 @@ static int noaccel = 0; static const struct { const char *name; struct fb_var_screeninfo var; -} clgenfb_predefined[] __initdata = +} cirrusfb_predefined[] = { {"Autodetect", /* autodetect mode */ @@ -473,171 +449,90 @@ static const struct { } }; -#define NUM_TOTAL_MODES ARRAY_SIZE(clgenfb_predefined) -static struct fb_var_screeninfo clgenfb_default; - -/* - * Frame Buffer Name - */ - -static const char *clgenfb_name = "CLgen"; +#define NUM_TOTAL_MODES ARRAY_SIZE(cirrusfb_predefined) /****************************************************************************/ /**** BEGIN PROTOTYPES ******************************************************/ /*--- Interface used by the world ------------------------------------------*/ -int clgenfb_init (void); -int clgenfb_setup (char *options); - -static int clgenfb_open (struct fb_info *info, int user); -static int clgenfb_release (struct fb_info *info, int user); - -static int clgenfb_setcolreg (unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, - struct fb_info *info); +int cirrusfb_init (void); +int cirrusfb_setup (char *options); + +int cirrusfb_open (struct fb_info *info, int user); +int cirrusfb_release (struct fb_info *info, int user); +int cirrusfb_setcolreg (unsigned regno, unsigned red, unsigned green, + unsigned blue, unsigned transp, + struct fb_info *info); +int cirrusfb_check_var (struct fb_var_screeninfo *var, + struct fb_info *info); +int cirrusfb_set_par (struct fb_info *info); +int cirrusfb_pan_display (struct fb_var_screeninfo *var, + struct fb_info *info); +int cirrusfb_blank (int blank_mode, struct fb_info *info); +void cirrusfb_fillrect (struct fb_info *info, const struct fb_fillrect *region); +void cirrusfb_copyarea(struct fb_info *info, const struct fb_copyarea *area); +void cirrusfb_imageblit(struct fb_info *info, const struct fb_image *image); /* function table of the above functions */ -static struct fb_ops clgenfb_ops = { - .owner = THIS_MODULE, - .fb_open = clgenfb_open, - .fb_release = clgenfb_release, - .fb_get_fix = fbgen_get_fix, - .fb_get_var = fbgen_get_var, - .fb_set_var = fbgen_set_var, - .fb_get_cmap = fbgen_get_cmap, - .fb_set_cmap = gen_set_cmap, - .fb_setcolreg = clgenfb_setcolreg, - .fb_pan_display =fbgen_pan_display, - .fb_blank = fbgen_blank, +static struct fb_ops cirrusfb_ops = { + .owner = THIS_MODULE, + .fb_open = cirrusfb_open, + .fb_release = cirrusfb_release, + .fb_setcolreg = cirrusfb_setcolreg, + .fb_check_var = cirrusfb_check_var, + .fb_set_par = cirrusfb_set_par, + .fb_pan_display = cirrusfb_pan_display, + .fb_blank = cirrusfb_blank, + .fb_fillrect = cirrusfb_fillrect, + .fb_copyarea = cirrusfb_copyarea, + .fb_imageblit = cirrusfb_imageblit, + .fb_cursor = soft_cursor, }; /*--- Hardware Specific Routines -------------------------------------------*/ -static void clgen_detect (void); -static int clgen_encode_fix (struct fb_fix_screeninfo *fix, const void *par, - struct fb_info_gen *info); -static int clgen_decode_var (const struct fb_var_screeninfo *var, void *par, - struct fb_info_gen *info); -static int clgen_encode_var (struct fb_var_screeninfo *var, const void *par, - struct fb_info_gen *info); -static void clgen_get_par (void *par, struct fb_info_gen *info); -static void clgen_set_par (const void *par, struct fb_info_gen *info); -static int clgen_getcolreg (unsigned regno, unsigned *red, unsigned *green, - unsigned *blue, unsigned *transp, - struct fb_info *info); -static int clgen_pan_display (const struct fb_var_screeninfo *var, - struct fb_info_gen *info); -static int clgen_blank (int blank_mode, struct fb_info_gen *info); - -static void clgen_set_disp (const void *par, struct display *disp, - struct fb_info_gen *info); - -/* function table of the above functions */ -static struct fbgen_hwswitch clgen_hwswitch = -{ - clgen_detect, - clgen_encode_fix, - clgen_decode_var, - clgen_encode_var, - clgen_get_par, - clgen_set_par, - clgen_getcolreg, - clgen_pan_display, - clgen_blank, - clgen_set_disp -}; - -/* Text console acceleration */ - -#ifdef FBCON_HAS_CFB8 -static void fbcon_clgen8_bmove (struct display *p, int sy, int sx, - int dy, int dx, int height, int width); -static void fbcon_clgen8_clear (struct vc_data *conp, struct display *p, - int sy, int sx, int height, int width); - -static struct display_switch fbcon_clgen_8 = { - .setup = fbcon_cfb8_setup, - .bmove = fbcon_clgen8_bmove, - .clear = fbcon_clgen8_clear, - .putc = fbcon_cfb8_putc, - .putcs = fbcon_cfb8_putcs, - .revc = fbcon_cfb8_revc, - .clear_margins =fbcon_cfb8_clear_margins, - .fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16) -}; -#endif -#ifdef FBCON_HAS_CFB16 -static void fbcon_clgen16_bmove (struct display *p, int sy, int sx, - int dy, int dx, int height, int width); -static void fbcon_clgen16_clear (struct vc_data *conp, struct display *p, - int sy, int sx, int height, int width); -static struct display_switch fbcon_clgen_16 = { - .setup = fbcon_cfb16_setup, - .bmove = fbcon_clgen16_bmove, - .clear = fbcon_clgen16_clear, - .putc = fbcon_cfb16_putc, - .putcs = fbcon_cfb16_putcs, - .revc = fbcon_cfb16_revc, - .clear_margins =fbcon_cfb16_clear_margins, - .fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16) -}; -#endif -#ifdef FBCON_HAS_CFB32 -static void fbcon_clgen32_bmove (struct display *p, int sy, int sx, - int dy, int dx, int height, int width); -static void fbcon_clgen32_clear (struct vc_data *conp, struct display *p, - int sy, int sx, int height, int width); -static struct display_switch fbcon_clgen_32 = { - .setup = fbcon_cfb32_setup, - .bmove = fbcon_clgen32_bmove, - .clear = fbcon_clgen32_clear, - .putc = fbcon_cfb32_putc, - .putcs = fbcon_cfb32_putcs, - .revc = fbcon_cfb32_revc, - .clear_margins =fbcon_cfb32_clear_margins, - .fontwidthmask =FONTWIDTH (4) | FONTWIDTH (8) | FONTWIDTH (12) | FONTWIDTH (16) -}; -#endif - - - +static int cirrusfb_decode_var (const struct fb_var_screeninfo *var, + struct cirrusfb_regs *regs, + const struct fb_info *info); /*--- Internal routines ----------------------------------------------------*/ -static void init_vgachip (struct clgenfb_info *fb_info); -static void switch_monitor (struct clgenfb_info *fb_info, int on); -static void WGen (const struct clgenfb_info *fb_info, +static void init_vgachip (struct cirrusfb_info *cinfo); +static void switch_monitor (struct cirrusfb_info *cinfo, int on); +static void WGen (const struct cirrusfb_info *cinfo, int regnum, unsigned char val); -static unsigned char RGen (const struct clgenfb_info *fb_info, int regnum); -static void AttrOn (const struct clgenfb_info *fb_info); -static void WHDR (const struct clgenfb_info *fb_info, unsigned char val); -static void WSFR (struct clgenfb_info *fb_info, unsigned char val); -static void WSFR2 (struct clgenfb_info *fb_info, unsigned char val); -static void WClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char red, +static unsigned char RGen (const struct cirrusfb_info *cinfo, int regnum); +static void AttrOn (const struct cirrusfb_info *cinfo); +static void WHDR (const struct cirrusfb_info *cinfo, unsigned char val); +static void WSFR (struct cirrusfb_info *cinfo, unsigned char val); +static void WSFR2 (struct cirrusfb_info *cinfo, unsigned char val); +static void WClut (struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char red, unsigned char green, unsigned char blue); #if 0 -static void RClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char *red, +static void RClut (struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char *red, unsigned char *green, unsigned char *blue); #endif -static void clgen_WaitBLT (caddr_t regbase); -static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury, - u_short destx, u_short desty, - u_short width, u_short height, - u_short line_length); -static void clgen_RectFill (struct clgenfb_info *fb_info, u_short x, u_short y, - u_short width, u_short height, - u_char color, u_short line_length); +static void cirrusfb_WaitBLT (caddr_t regbase); +static void cirrusfb_BitBLT (caddr_t regbase, int bits_per_pixel, + u_short curx, u_short cury, + u_short destx, u_short desty, + u_short width, u_short height, + u_short line_length); +static void cirrusfb_RectFill (caddr_t regbase, int bits_per_pixel, + u_short x, u_short y, + u_short width, u_short height, + u_char color, u_short line_length); static void bestclock (long freq, long *best, long *nom, long *den, long *div, long maxfreq); -#ifdef CLGEN_DEBUG -static void clgen_dump (void); -static void clgen_dbg_reg_dump (caddr_t regbase); -static void clgen_dbg_print_regs (caddr_t regbase, clgen_dbg_reg_class_t reg_class,...); -static void clgen_dbg_print_byte (const char *name, unsigned char val); -#endif /* CLGEN_DEBUG */ +#ifdef CIRRUSFB_DEBUG +static void cirrusfb_dump (void); +static void cirrusfb_dbg_reg_dump (caddr_t regbase); +static void cirrusfb_dbg_print_regs (caddr_t regbase, cirrusfb_dbg_reg_class_t reg_class,...); +static void cirrusfb_dbg_print_byte (const char *name, unsigned char val); +#endif /* CIRRUSFB_DEBUG */ /*** END PROTOTYPES ********************************************************/ /*****************************************************************************/ @@ -646,18 +541,18 @@ static void clgen_dbg_print_byte (const char *name, unsigned char val); static int opencount = 0; /*--- Open /dev/fbx ---------------------------------------------------------*/ -static int clgenfb_open (struct fb_info *info, int user) +int cirrusfb_open (struct fb_info *info, int user) { if (opencount++ == 0) - switch_monitor ((struct clgenfb_info *) info, 1); + switch_monitor (info->par, 1); return 0; } /*--- Close /dev/fbx --------------------------------------------------------*/ -static int clgenfb_release (struct fb_info *info, int user) +int cirrusfb_release (struct fb_info *info, int user) { if (--opencount == 0) - switch_monitor ((struct clgenfb_info *) info, 0); + switch_monitor (info->par, 0); return 0; } @@ -665,67 +560,8 @@ static int clgenfb_release (struct fb_info *info, int user) /****************************************************************************/ /**** BEGIN Hardware specific Routines **************************************/ -static void clgen_detect (void) -{ - DPRINTK ("ENTER\n"); - DPRINTK ("EXIT\n"); -} - -static int clgen_encode_fix (struct fb_fix_screeninfo *fix, const void *par, - struct fb_info_gen *info) -{ - struct clgenfb_par *_par = (struct clgenfb_par *) par; - struct clgenfb_info *_info = (struct clgenfb_info *) info; - - DPRINTK ("ENTER\n"); - - memset (fix, 0, sizeof (struct fb_fix_screeninfo)); - strcpy (fix->id, clgenfb_name); - - if (_info->btype == BT_GD5480) { - /* Select proper byte-swapping aperture */ - switch (_par->var.bits_per_pixel) { - case 1: - case 8: - fix->smem_start = _info->fbmem_phys; - break; - case 16: - fix->smem_start = _info->fbmem_phys + 1 * MB_; - break; - case 24: - case 32: - fix->smem_start = _info->fbmem_phys + 2 * MB_; - break; - } - } else { - fix->smem_start = _info->fbmem_phys; - } - - /* monochrome: only 1 memory plane */ - /* 8 bit and above: Use whole memory area */ - fix->smem_len = _par->var.bits_per_pixel == 1 ? _info->size / 4 - : _info->size; - fix->type = _par->type; - fix->type_aux = 0; - fix->visual = _par->visual; - fix->xpanstep = 1; - fix->ypanstep = 1; - fix->ywrapstep = 0; - fix->line_length = _par->line_length; - - /* FIXME: map region at 0xB8000 if available, fill in here */ - fix->mmio_start = 0; - fix->mmio_len = 0; - fix->accel = FB_ACCEL_NONE; - - DPRINTK ("EXIT\n"); - return 0; -} - - - /* Get a good MCLK value */ -static long clgen_get_mclk (long freq, int bpp, long *div) +static long cirrusfb_get_mclk (long freq, int bpp, long *div) { long mclk; @@ -765,227 +601,253 @@ static long clgen_get_mclk (long freq, int bpp, long *div) return mclk; } -static int clgen_decode_var (const struct fb_var_screeninfo *var, void *par, - struct fb_info_gen *info) +int cirrusfb_check_var(struct fb_var_screeninfo *var, + struct fb_info *info) { - long freq; - long maxclock; - int xres, hfront, hsync, hback; - int yres, vfront, vsync, vback; + struct cirrusfb_info *cinfo = info->par; int nom, den; /* translyting from pixels->bytes */ - int i; - static struct { - int xres, yres; - } modes[] = { { - 1600, 1280 - }, { - 1280, 1024 - }, { - 1024, 768 - }, - { - 800, 600 - }, { - 640, 480 - }, { - -1, -1 - } - }; - - struct clgenfb_par *_par = (struct clgenfb_par *) par; - struct clgenfb_info *fb_info = (struct clgenfb_info *) info; - - assert (var != NULL); - assert (par != NULL); - assert (info != NULL); - - DPRINTK ("ENTER\n"); - - DPRINTK ("Requested: %dx%dx%d\n", var->xres, var->yres, var->bits_per_pixel); - DPRINTK (" virtual: %dx%d\n", var->xres_virtual, var->yres_virtual); - DPRINTK (" offset: (%d,%d)\n", var->xoffset, var->yoffset); - DPRINTK ("grayscale: %d\n", var->grayscale); - - memset (par, 0, sizeof (struct clgenfb_par)); - - _par->var = *var; + int yres, i; + static struct { int xres, yres; } modes[] = + { { 1600, 1280 }, + { 1280, 1024 }, + { 1024, 768 }, + { 800, 600 }, + { 640, 480 }, + { -1, -1 } }; switch (var->bits_per_pixel) { - case 1: + case 0 ... 1: + var->bits_per_pixel = 1; nom = 4; den = 8; break; /* 8 pixel per byte, only 1/4th of mem usable */ case 2 ... 8: - _par->var.bits_per_pixel = 8; + var->bits_per_pixel = 8; nom = 1; den = 1; break; /* 1 pixel == 1 byte */ case 9 ... 16: - _par->var.bits_per_pixel = 16; + var->bits_per_pixel = 16; nom = 2; den = 1; break; /* 2 bytes per pixel */ case 17 ... 24: - _par->var.bits_per_pixel = 24; + var->bits_per_pixel = 24; nom = 3; den = 1; break; /* 3 bytes per pixel */ case 25 ... 32: - _par->var.bits_per_pixel = 32; + var->bits_per_pixel = 32; nom = 4; den = 1; break; /* 4 bytes per pixel */ default: - printk ("clgen: mode %dx%dx%d rejected...color depth not supported.\n", + printk ("cirrusfb: mode %dx%dx%d rejected...color depth not supported.\n", var->xres, var->yres, var->bits_per_pixel); DPRINTK ("EXIT - EINVAL error\n"); return -EINVAL; } - if (_par->var.xres * nom / den * _par->var.yres > fb_info->size) { - printk ("clgen: mode %dx%dx%d rejected...resolution too high to fit into video memory!\n", + if (var->xres * nom / den * var->yres > cinfo->size) { + printk ("cirrusfb: mode %dx%dx%d rejected...resolution too high to fit into video memory!\n", var->xres, var->yres, var->bits_per_pixel); DPRINTK ("EXIT - EINVAL error\n"); return -EINVAL; } + /* use highest possible virtual resolution */ - if (_par->var.xres_virtual == -1 && - _par->var.yres_virtual == -1) { - printk ("clgen: using maximum available virtual resolution\n"); + if (var->xres_virtual == -1 && + var->yres_virtual == -1) { + printk ("cirrusfb: using maximum available virtual resolution\n"); for (i = 0; modes[i].xres != -1; i++) { - if (modes[i].xres * nom / den * modes[i].yres < fb_info->size / 2) + if (modes[i].xres * nom / den * modes[i].yres < cinfo->size / 2) break; } if (modes[i].xres == -1) { - printk ("clgen: could not find a virtual resolution that fits into video memory!!\n"); + printk ("cirrusfb: could not find a virtual resolution that fits into video memory!!\n"); DPRINTK ("EXIT - EINVAL error\n"); return -EINVAL; } - _par->var.xres_virtual = modes[i].xres; - _par->var.yres_virtual = modes[i].yres; + var->xres_virtual = modes[i].xres; + var->yres_virtual = modes[i].yres; - printk ("clgen: virtual resolution set to maximum of %dx%d\n", - _par->var.xres_virtual, _par->var.yres_virtual); - } else if (_par->var.xres_virtual == -1) { - /* FIXME: maximize X virtual resolution only */ - } else if (_par->var.yres_virtual == -1) { - /* FIXME: maximize Y virtual resolution only */ + printk ("cirrusfb: virtual resolution set to maximum of %dx%d\n", + var->xres_virtual, var->yres_virtual); } - if (_par->var.xoffset < 0) - _par->var.xoffset = 0; - if (_par->var.yoffset < 0) - _par->var.yoffset = 0; - /* truncate xoffset and yoffset to maximum if too high */ - if (_par->var.xoffset > _par->var.xres_virtual - _par->var.xres) - _par->var.xoffset = _par->var.xres_virtual - _par->var.xres - 1; + if (var->xres_virtual < var->xres) + var->xres_virtual = var->xres; + if (var->yres_virtual < var->yres) + var->yres_virtual = var->yres; + + if (var->xoffset < 0) + var->xoffset = 0; + if (var->yoffset < 0) + var->yoffset = 0; - if (_par->var.yoffset > _par->var.yres_virtual - _par->var.yres) - _par->var.yoffset = _par->var.yres_virtual - _par->var.yres - 1; + /* truncate xoffset and yoffset to maximum if too high */ + if (var->xoffset > var->xres_virtual - var->xres) + var->xoffset = var->xres_virtual - var->xres - 1; + if (var->yoffset > var->yres_virtual - var->yres) + var->yoffset = var->yres_virtual - var->yres - 1; - switch (_par->var.bits_per_pixel) { + switch (var->bits_per_pixel) { case 1: - _par->line_length = _par->var.xres_virtual / 8; - _par->visual = FB_VISUAL_MONO10; break; case 8: - _par->line_length = _par->var.xres_virtual; - _par->visual = FB_VISUAL_PSEUDOCOLOR; - _par->var.red.offset = 0; - _par->var.red.length = 6; - _par->var.green.offset = 0; - _par->var.green.length = 6; - _par->var.blue.offset = 0; - _par->var.blue.length = 6; + var->red.offset = 0; + var->red.length = 6; + var->green.offset = 0; + var->green.length = 6; + var->blue.offset = 0; + var->blue.length = 6; break; case 16: - _par->line_length = _par->var.xres_virtual * 2; - _par->visual = FB_VISUAL_DIRECTCOLOR; if(isPReP) { - _par->var.red.offset = 2; - _par->var.green.offset = -3; - _par->var.blue.offset = 8; + var->red.offset = 2; + var->green.offset = -3; + var->blue.offset = 8; } else { - _par->var.red.offset = 10; - _par->var.green.offset = 5; - _par->var.blue.offset = 0; + var->red.offset = 10; + var->green.offset = 5; + var->blue.offset = 0; } - _par->var.red.length = 5; - _par->var.green.length = 5; - _par->var.blue.length = 5; + var->red.length = 5; + var->green.length = 5; + var->blue.length = 5; break; case 24: - _par->line_length = _par->var.xres_virtual * 3; - _par->visual = FB_VISUAL_DIRECTCOLOR; if(isPReP) { - _par->var.red.offset = 8; - _par->var.green.offset = 16; - _par->var.blue.offset = 24; + var->red.offset = 8; + var->green.offset = 16; + var->blue.offset = 24; } else { - _par->var.red.offset = 16; - _par->var.green.offset = 8; - _par->var.blue.offset = 0; + var->red.offset = 16; + var->green.offset = 8; + var->blue.offset = 0; } - _par->var.red.length = 8; - _par->var.green.length = 8; - _par->var.blue.length = 8; + var->red.length = 8; + var->green.length = 8; + var->blue.length = 8; break; case 32: - _par->line_length = _par->var.xres_virtual * 4; - _par->visual = FB_VISUAL_DIRECTCOLOR; if(isPReP) { - _par->var.red.offset = 8; - _par->var.green.offset = 16; - _par->var.blue.offset = 24; + var->red.offset = 8; + var->green.offset = 16; + var->blue.offset = 24; } else { - _par->var.red.offset = 16; - _par->var.green.offset = 8; - _par->var.blue.offset = 0; + var->red.offset = 16; + var->green.offset = 8; + var->blue.offset = 0; } - _par->var.red.length = 8; - _par->var.green.length = 8; - _par->var.blue.length = 8; + var->red.length = 8; + var->green.length = 8; + var->blue.length = 8; break; default: - DPRINTK("Unsupported bpp size: %d\n", _par->var.bits_per_pixel); + DPRINTK("Unsupported bpp size: %d\n", var->bits_per_pixel); assert (FALSE); /* should never occur */ break; } - _par->var.red.msb_right = - _par->var.green.msb_right = - _par->var.blue.msb_right = - _par->var.transp.offset = - _par->var.transp.length = - _par->var.transp.msb_right = 0; + var->red.msb_right = + var->green.msb_right = + var->blue.msb_right = + var->transp.offset = + var->transp.length = + var->transp.msb_right = 0; + + yres = var->yres; + if (var->vmode & FB_VMODE_DOUBLE) + yres *= 2; + else if (var->vmode & FB_VMODE_INTERLACED) + yres = (yres + 1) / 2; + + if (yres >= 1280) { + printk (KERN_WARNING "cirrusfb: ERROR: VerticalTotal >= 1280; special treatment required! (TODO)\n"); + DPRINTK ("EXIT - EINVAL error\n"); + return -EINVAL; + } - _par->type = FB_TYPE_PACKED_PIXELS; + return 0; +} + +static int cirrusfb_decode_var (const struct fb_var_screeninfo *var, + struct cirrusfb_regs *regs, + const struct fb_info *info) +{ + long freq; + long maxclock; + int maxclockidx = 0; + struct cirrusfb_info *cinfo = info->par; + int xres, hfront, hsync, hback; + int yres, vfront, vsync, vback; + + switch(var->bits_per_pixel) { + case 1: + regs->line_length = var->xres_virtual / 8; + regs->visual = FB_VISUAL_MONO10; + maxclockidx = 0; + break; + + case 8: + regs->line_length = var->xres_virtual; + regs->visual = FB_VISUAL_PSEUDOCOLOR; + maxclockidx = 1; + break; + + case 16: + regs->line_length = var->xres_virtual * 2; + regs->visual = FB_VISUAL_DIRECTCOLOR; + maxclockidx = 2; + break; + + case 24: + regs->line_length = var->xres_virtual * 3; + regs->visual = FB_VISUAL_DIRECTCOLOR; + maxclockidx = 3; + break; + + case 32: + regs->line_length = var->xres_virtual * 4; + regs->visual = FB_VISUAL_DIRECTCOLOR; + maxclockidx = 4; + break; + + default: + DPRINTK("Unsupported bpp size: %d\n", var->bits_per_pixel); + assert (FALSE); + /* should never occur */ + break; + } + + regs->type = FB_TYPE_PACKED_PIXELS; /* convert from ps to kHz */ freq = 1000000000 / var->pixclock; DPRINTK ("desired pixclock: %ld kHz\n", freq); - maxclock = clgen_board_info[fb_info->btype].maxclock; - _par->multiplexing = 0; + maxclock = cirrusfb_board_info[cinfo->btype].maxclock[maxclockidx]; + regs->multiplexing = 0; /* If the frequency is greater than we can support, we might be able * to use multiplexing for the video mode */ if (freq > maxclock) { - switch (fb_info->btype) { + switch (cinfo->btype) { case BT_ALPINE: case BT_GD5480: - _par->multiplexing = 1; + regs->multiplexing = 1; break; default: - printk (KERN_WARNING "clgen: ERROR: Frequency greater than maxclock (%ld kHz)\n", maxclock); + printk (KERN_WARNING "cirrusfb: ERROR: Frequency greater than maxclock (%ld kHz)\n", maxclock); DPRINTK ("EXIT - return -EINVAL\n"); return -EINVAL; } @@ -996,274 +858,256 @@ static int clgen_decode_var (const struct fb_var_screeninfo *var, void *par, switch (var->bits_per_pixel) { case 16: case 32: - if (_par->HorizRes <= 800) + if (regs->HorizRes <= 800) freq /= 2; /* Xbh has this type of clock for 32-bit */ break; } #endif - bestclock (freq, &_par->freq, &_par->nom, &_par->den, &_par->div, + bestclock (freq, ®s->freq, ®s->nom, ®s->den, ®s->div, maxclock); - _par->mclk = clgen_get_mclk (freq, _par->var.bits_per_pixel, &_par->divMCLK); + regs->mclk = cirrusfb_get_mclk (freq, var->bits_per_pixel, ®s->divMCLK); - xres = _par->var.xres; - hfront = _par->var.right_margin; - hsync = _par->var.hsync_len; - hback = _par->var.left_margin; + xres = var->xres; + hfront = var->right_margin; + hsync = var->hsync_len; + hback = var->left_margin; - yres = _par->var.yres; - vfront = _par->var.lower_margin; - vsync = _par->var.vsync_len; - vback = _par->var.upper_margin; + yres = var->yres; + vfront = var->lower_margin; + vsync = var->vsync_len; + vback = var->upper_margin; - if (_par->var.vmode & FB_VMODE_DOUBLE) { + if (var->vmode & FB_VMODE_DOUBLE) { yres *= 2; vfront *= 2; vsync *= 2; vback *= 2; - } else if (_par->var.vmode & FB_VMODE_INTERLACED) { + } else if (var->vmode & FB_VMODE_INTERLACED) { yres = (yres + 1) / 2; vfront = (vfront + 1) / 2; vsync = (vsync + 1) / 2; vback = (vback + 1) / 2; } - _par->HorizRes = xres; - _par->HorizTotal = (xres + hfront + hsync + hback) / 8 - 5; - _par->HorizDispEnd = xres / 8 - 1; - _par->HorizBlankStart = xres / 8; - _par->HorizBlankEnd = _par->HorizTotal + 5; /* does not count with "-5" */ - _par->HorizSyncStart = (xres + hfront) / 8 + 1; - _par->HorizSyncEnd = (xres + hfront + hsync) / 8 + 1; - - _par->VertRes = yres; - _par->VertTotal = yres + vfront + vsync + vback - 2; - _par->VertDispEnd = yres - 1; - _par->VertBlankStart = yres; - _par->VertBlankEnd = _par->VertTotal; - _par->VertSyncStart = yres + vfront - 1; - _par->VertSyncEnd = yres + vfront + vsync - 1; - - if (_par->VertRes >= 1024) { - _par->VertTotal /= 2; - _par->VertSyncStart /= 2; - _par->VertSyncEnd /= 2; - _par->VertDispEnd /= 2; - } - if (_par->multiplexing) { - _par->HorizTotal /= 2; - _par->HorizSyncStart /= 2; - _par->HorizSyncEnd /= 2; - _par->HorizDispEnd /= 2; - } - if (_par->VertRes >= 1280) { - printk (KERN_WARNING "clgen: ERROR: VerticalTotal >= 1280; special treatment required! (TODO)\n"); - DPRINTK ("EXIT - EINVAL error\n"); - return -EINVAL; + regs->HorizRes = xres; + regs->HorizTotal = (xres + hfront + hsync + hback) / 8 - 5; + regs->HorizDispEnd = xres / 8 - 1; + regs->HorizBlankStart = xres / 8; + regs->HorizBlankEnd = regs->HorizTotal + 5; /* does not count with "-5" */ + regs->HorizSyncStart = (xres + hfront) / 8 + 1; + regs->HorizSyncEnd = (xres + hfront + hsync) / 8 + 1; + + regs->VertRes = yres; + regs->VertTotal = yres + vfront + vsync + vback - 2; + regs->VertDispEnd = yres - 1; + regs->VertBlankStart = yres; + regs->VertBlankEnd = regs->VertTotal; + regs->VertSyncStart = yres + vfront - 1; + regs->VertSyncEnd = yres + vfront + vsync - 1; + + if (regs->VertRes >= 1024) { + regs->VertTotal /= 2; + regs->VertSyncStart /= 2; + regs->VertSyncEnd /= 2; + regs->VertDispEnd /= 2; + } + if (regs->multiplexing) { + regs->HorizTotal /= 2; + regs->HorizSyncStart /= 2; + regs->HorizSyncEnd /= 2; + regs->HorizDispEnd /= 2; } - DPRINTK ("EXIT\n"); - return 0; -} - - -static int clgen_encode_var (struct fb_var_screeninfo *var, const void *par, - struct fb_info_gen *info) -{ - DPRINTK ("ENTER\n"); - - *var = ((struct clgenfb_par *) par)->var; - DPRINTK ("EXIT\n"); return 0; } -/* get current video mode */ -static void clgen_get_par (void *par, struct fb_info_gen *info) -{ - struct clgenfb_par *_par = (struct clgenfb_par *) par; - struct clgenfb_info *_info = (struct clgenfb_info *) info; - - DPRINTK ("ENTER\n"); - - *_par = _info->currentmode; - - DPRINTK ("EXIT\n"); -} -static void clgen_set_mclk (const struct clgenfb_info *fb_info, int val, int div) +static void cirrusfb_set_mclk (const struct cirrusfb_info *cinfo, int val, int div) { - assert (fb_info != NULL); + assert (cinfo != NULL); if (div == 2) { /* VCLK = MCLK/2 */ - unsigned char old = vga_rseq (fb_info->regs, CL_SEQR1E); - vga_wseq (fb_info->regs, CL_SEQR1E, old | 0x1); - vga_wseq (fb_info->regs, CL_SEQR1F, 0x40 | (val & 0x3f)); + unsigned char old = vga_rseq (cinfo->regbase, CL_SEQR1E); + vga_wseq (cinfo->regbase, CL_SEQR1E, old | 0x1); + vga_wseq (cinfo->regbase, CL_SEQR1F, 0x40 | (val & 0x3f)); } else if (div == 1) { /* VCLK = MCLK */ - unsigned char old = vga_rseq (fb_info->regs, CL_SEQR1E); - vga_wseq (fb_info->regs, CL_SEQR1E, old & ~0x1); - vga_wseq (fb_info->regs, CL_SEQR1F, 0x40 | (val & 0x3f)); + unsigned char old = vga_rseq (cinfo->regbase, CL_SEQR1E); + vga_wseq (cinfo->regbase, CL_SEQR1E, old & ~0x1); + vga_wseq (cinfo->regbase, CL_SEQR1F, 0x40 | (val & 0x3f)); } else { - vga_wseq (fb_info->regs, CL_SEQR1F, val & 0x3f); + vga_wseq (cinfo->regbase, CL_SEQR1F, val & 0x3f); } } /************************************************************************* - clgen_set_par() + cirrusfb_set_par_foo() actually writes the values for a new video mode into the hardware, **************************************************************************/ -static void clgen_set_par (const void *par, struct fb_info_gen *info) +static int cirrusfb_set_par_foo (struct fb_info *info) { + struct cirrusfb_info *cinfo = info->par; + struct fb_var_screeninfo *var = &info->var; + struct cirrusfb_regs regs; + caddr_t regbase = cinfo->regbase; unsigned char tmp; - int offset = 0; - struct clgenfb_par *_par = (struct clgenfb_par *) par; - struct clgenfb_info *fb_info = (struct clgenfb_info *) info; - const struct clgen_board_info_rec *bi; + int offset = 0, err; + const struct cirrusfb_board_info_rec *bi; DPRINTK ("ENTER\n"); DPRINTK ("Requested mode: %dx%dx%d\n", - _par->var.xres, _par->var.yres, _par->var.bits_per_pixel); - DPRINTK ("pixclock: %d\n", _par->var.pixclock); + var->xres, var->yres, var->bits_per_pixel); + DPRINTK ("pixclock: %d\n", var->pixclock); + + init_vgachip (cinfo); + + err = cirrusfb_decode_var(var, ®s, info); + if(err) { + /* should never happen */ + DPRINTK("mode change aborted. invalid var.\n"); + return -EINVAL; + } - bi = &clgen_board_info[fb_info->btype]; + bi = &cirrusfb_board_info[cinfo->btype]; /* unlock register VGA_CRTC_H_TOTAL..CRT7 */ - vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, 0x20); /* previously: 0x00) */ + vga_wcrt (regbase, VGA_CRTC_V_SYNC_END, 0x20); /* previously: 0x00) */ /* if debugging is enabled, all parameters get output before writing */ - DPRINTK ("CRT0: %ld\n", _par->HorizTotal); - vga_wcrt (fb_info->regs, VGA_CRTC_H_TOTAL, _par->HorizTotal); + DPRINTK ("CRT0: %ld\n", regs.HorizTotal); + vga_wcrt (regbase, VGA_CRTC_H_TOTAL, regs.HorizTotal); - DPRINTK ("CRT1: %ld\n", _par->HorizDispEnd); - vga_wcrt (fb_info->regs, VGA_CRTC_H_DISP, _par->HorizDispEnd); + DPRINTK ("CRT1: %ld\n", regs.HorizDispEnd); + vga_wcrt (regbase, VGA_CRTC_H_DISP, regs.HorizDispEnd); - DPRINTK ("CRT2: %ld\n", _par->HorizBlankStart); - vga_wcrt (fb_info->regs, VGA_CRTC_H_BLANK_START, _par->HorizBlankStart); + DPRINTK ("CRT2: %ld\n", regs.HorizBlankStart); + vga_wcrt (regbase, VGA_CRTC_H_BLANK_START, regs.HorizBlankStart); - DPRINTK ("CRT3: 128+%ld\n", _par->HorizBlankEnd % 32); /* + 128: Compatible read */ - vga_wcrt (fb_info->regs, VGA_CRTC_H_BLANK_END, 128 + (_par->HorizBlankEnd % 32)); + DPRINTK ("CRT3: 128+%ld\n", regs.HorizBlankEnd % 32); /* + 128: Compatible read */ + vga_wcrt (regbase, VGA_CRTC_H_BLANK_END, 128 + (regs.HorizBlankEnd % 32)); - DPRINTK ("CRT4: %ld\n", _par->HorizSyncStart); - vga_wcrt (fb_info->regs, VGA_CRTC_H_SYNC_START, _par->HorizSyncStart); + DPRINTK ("CRT4: %ld\n", regs.HorizSyncStart); + vga_wcrt (regbase, VGA_CRTC_H_SYNC_START, regs.HorizSyncStart); - tmp = _par->HorizSyncEnd % 32; - if (_par->HorizBlankEnd & 32) + tmp = regs.HorizSyncEnd % 32; + if (regs.HorizBlankEnd & 32) tmp += 128; DPRINTK ("CRT5: %d\n", tmp); - vga_wcrt (fb_info->regs, VGA_CRTC_H_SYNC_END, tmp); + vga_wcrt (regbase, VGA_CRTC_H_SYNC_END, tmp); - DPRINTK ("CRT6: %ld\n", _par->VertTotal & 0xff); - vga_wcrt (fb_info->regs, VGA_CRTC_V_TOTAL, (_par->VertTotal & 0xff)); + DPRINTK ("CRT6: %ld\n", regs.VertTotal & 0xff); + vga_wcrt (regbase, VGA_CRTC_V_TOTAL, (regs.VertTotal & 0xff)); tmp = 16; /* LineCompare bit #9 */ - if (_par->VertTotal & 256) + if (regs.VertTotal & 256) tmp |= 1; - if (_par->VertDispEnd & 256) + if (regs.VertDispEnd & 256) tmp |= 2; - if (_par->VertSyncStart & 256) + if (regs.VertSyncStart & 256) tmp |= 4; - if (_par->VertBlankStart & 256) + if (regs.VertBlankStart & 256) tmp |= 8; - if (_par->VertTotal & 512) + if (regs.VertTotal & 512) tmp |= 32; - if (_par->VertDispEnd & 512) + if (regs.VertDispEnd & 512) tmp |= 64; - if (_par->VertSyncStart & 512) + if (regs.VertSyncStart & 512) tmp |= 128; DPRINTK ("CRT7: %d\n", tmp); - vga_wcrt (fb_info->regs, VGA_CRTC_OVERFLOW, tmp); + vga_wcrt (regbase, VGA_CRTC_OVERFLOW, tmp); tmp = 0x40; /* LineCompare bit #8 */ - if (_par->VertBlankStart & 512) + if (regs.VertBlankStart & 512) tmp |= 0x20; - if (_par->var.vmode & FB_VMODE_DOUBLE) + if (var->vmode & FB_VMODE_DOUBLE) tmp |= 0x80; DPRINTK ("CRT9: %d\n", tmp); - vga_wcrt (fb_info->regs, VGA_CRTC_MAX_SCAN, tmp); + vga_wcrt (regbase, VGA_CRTC_MAX_SCAN, tmp); - DPRINTK ("CRT10: %ld\n", _par->VertSyncStart & 0xff); - vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_START, (_par->VertSyncStart & 0xff)); + DPRINTK ("CRT10: %ld\n", regs.VertSyncStart & 0xff); + vga_wcrt (regbase, VGA_CRTC_V_SYNC_START, (regs.VertSyncStart & 0xff)); - DPRINTK ("CRT11: 64+32+%ld\n", _par->VertSyncEnd % 16); - vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, (_par->VertSyncEnd % 16 + 64 + 32)); + DPRINTK ("CRT11: 64+32+%ld\n", regs.VertSyncEnd % 16); + vga_wcrt (regbase, VGA_CRTC_V_SYNC_END, (regs.VertSyncEnd % 16 + 64 + 32)); - DPRINTK ("CRT12: %ld\n", _par->VertDispEnd & 0xff); - vga_wcrt (fb_info->regs, VGA_CRTC_V_DISP_END, (_par->VertDispEnd & 0xff)); + DPRINTK ("CRT12: %ld\n", regs.VertDispEnd & 0xff); + vga_wcrt (regbase, VGA_CRTC_V_DISP_END, (regs.VertDispEnd & 0xff)); - DPRINTK ("CRT15: %ld\n", _par->VertBlankStart & 0xff); - vga_wcrt (fb_info->regs, VGA_CRTC_V_BLANK_START, (_par->VertBlankStart & 0xff)); + DPRINTK ("CRT15: %ld\n", regs.VertBlankStart & 0xff); + vga_wcrt (regbase, VGA_CRTC_V_BLANK_START, (regs.VertBlankStart & 0xff)); - DPRINTK ("CRT16: %ld\n", _par->VertBlankEnd & 0xff); - vga_wcrt (fb_info->regs, VGA_CRTC_V_BLANK_END, (_par->VertBlankEnd & 0xff)); + DPRINTK ("CRT16: %ld\n", regs.VertBlankEnd & 0xff); + vga_wcrt (regbase, VGA_CRTC_V_BLANK_END, (regs.VertBlankEnd & 0xff)); DPRINTK ("CRT18: 0xff\n"); - vga_wcrt (fb_info->regs, VGA_CRTC_LINE_COMPARE, 0xff); + vga_wcrt (regbase, VGA_CRTC_LINE_COMPARE, 0xff); tmp = 0; - if (_par->var.vmode & FB_VMODE_INTERLACED) + if (var->vmode & FB_VMODE_INTERLACED) tmp |= 1; - if (_par->HorizBlankEnd & 64) + if (regs.HorizBlankEnd & 64) tmp |= 16; - if (_par->HorizBlankEnd & 128) + if (regs.HorizBlankEnd & 128) tmp |= 32; - if (_par->VertBlankEnd & 256) + if (regs.VertBlankEnd & 256) tmp |= 64; - if (_par->VertBlankEnd & 512) + if (regs.VertBlankEnd & 512) tmp |= 128; DPRINTK ("CRT1a: %d\n", tmp); - vga_wcrt (fb_info->regs, CL_CRT1A, tmp); + vga_wcrt (regbase, CL_CRT1A, tmp); /* set VCLK0 */ /* hardware RefClock: 14.31818 MHz */ /* formula: VClk = (OSC * N) / (D * (1+P)) */ /* Example: VClk = (14.31818 * 91) / (23 * (1+1)) = 28.325 MHz */ - vga_wseq (fb_info->regs, CL_SEQRB, _par->nom); - tmp = _par->den << 1; - if (_par->div != 0) + vga_wseq (regbase, CL_SEQRB, regs.nom); + tmp = regs.den << 1; + if (regs.div != 0) tmp |= 1; - if ((fb_info->btype == BT_SD64) || - (fb_info->btype == BT_ALPINE) || - (fb_info->btype == BT_GD5480)) + if ((cinfo->btype == BT_SD64) || + (cinfo->btype == BT_ALPINE) || + (cinfo->btype == BT_GD5480)) tmp |= 0x80; /* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */ DPRINTK ("CL_SEQR1B: %ld\n", (long) tmp); - vga_wseq (fb_info->regs, CL_SEQR1B, tmp); + vga_wseq (regbase, CL_SEQR1B, tmp); - if (_par->VertRes >= 1024) + if (regs.VertRes >= 1024) /* 1280x1024 */ - vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc7); + vga_wcrt (regbase, VGA_CRTC_MODE, 0xc7); else /* mode control: VGA_CRTC_START_HI enable, ROTATE(?), 16bit * address wrap, no compat. */ - vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc3); + vga_wcrt (regbase, VGA_CRTC_MODE, 0xc3); -/* HAEH? vga_wcrt (fb_info->regs, VGA_CRTC_V_SYNC_END, 0x20); * previously: 0x00 unlock VGA_CRTC_H_TOTAL..CRT7 */ +/* HAEH? vga_wcrt (regbase, VGA_CRTC_V_SYNC_END, 0x20); * previously: 0x00 unlock VGA_CRTC_H_TOTAL..CRT7 */ /* don't know if it would hurt to also program this if no interlaced */ /* mode is used, but I feel better this way.. :-) */ - if (_par->var.vmode & FB_VMODE_INTERLACED) - vga_wcrt (fb_info->regs, VGA_CRTC_REGS, _par->HorizTotal / 2); + if (var->vmode & FB_VMODE_INTERLACED) + vga_wcrt (regbase, VGA_CRTC_REGS, regs.HorizTotal / 2); else - vga_wcrt (fb_info->regs, VGA_CRTC_REGS, 0x00); /* interlace control */ + vga_wcrt (regbase, VGA_CRTC_REGS, 0x00); /* interlace control */ - vga_wseq (fb_info->regs, VGA_SEQ_CHARACTER_MAP, 0); + vga_wseq (regbase, VGA_SEQ_CHARACTER_MAP, 0); /* adjust horizontal/vertical sync type (low/high) */ tmp = 0x03; /* enable display memory & CRTC I/O address for color mode */ - if (_par->var.sync & FB_SYNC_HOR_HIGH_ACT) + if (var->sync & FB_SYNC_HOR_HIGH_ACT) tmp |= 0x40; - if (_par->var.sync & FB_SYNC_VERT_HIGH_ACT) + if (var->sync & FB_SYNC_VERT_HIGH_ACT) tmp |= 0x80; - WGen (fb_info, VGA_MIS_W, tmp); + WGen (cinfo, VGA_MIS_W, tmp); - vga_wcrt (fb_info->regs, VGA_CRTC_PRESET_ROW, 0); /* Screen A Preset Row-Scan register */ - vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_START, 0); /* text cursor on and start line */ - vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_END, 31); /* text cursor end line */ + vga_wcrt (regbase, VGA_CRTC_PRESET_ROW, 0); /* Screen A Preset Row-Scan register */ + vga_wcrt (regbase, VGA_CRTC_CURSOR_START, 0); /* text cursor on and start line */ + vga_wcrt (regbase, VGA_CRTC_CURSOR_END, 31); /* text cursor end line */ /****************************************************** * @@ -1272,12 +1116,12 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) */ /* programming for different color depths */ - if (_par->var.bits_per_pixel == 1) { - DPRINTK ("clgen: preparing for 1 bit deep display\n"); - vga_wgfx (fb_info->regs, VGA_GFX_MODE, 0); /* mode register */ + if (var->bits_per_pixel == 1) { + DPRINTK ("cirrusfb: preparing for 1 bit deep display\n"); + vga_wgfx (regbase, VGA_GFX_MODE, 0); /* mode register */ /* SR07 */ - switch (fb_info->btype) { + switch (cinfo->btype) { case BT_SD64: case BT_PICCOLO: case BT_PICASSO: @@ -1286,48 +1130,48 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) case BT_ALPINE: case BT_GD5480: DPRINTK (" (for GD54xx)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, - _par->multiplexing ? + vga_wseq (regbase, CL_SEQR7, + regs.multiplexing ? bi->sr07_1bpp_mux : bi->sr07_1bpp); break; case BT_LAGUNA: DPRINTK (" (for GD546x)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, - vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01); + vga_wseq (regbase, CL_SEQR7, + vga_rseq (regbase, CL_SEQR7) & ~0x01); break; default: - printk (KERN_WARNING "clgen: unknown Board\n"); + printk (KERN_WARNING "cirrusfb: unknown Board\n"); break; } /* Extended Sequencer Mode */ - switch (fb_info->btype) { + switch (cinfo->btype) { case BT_SD64: /* setting the SEQRF on SD64 is not necessary (only during init) */ DPRINTK ("(for SD64)\n"); - vga_wseq (fb_info->regs, CL_SEQR1F, 0x1a); /* MCLK select */ + vga_wseq (regbase, CL_SEQR1F, 0x1a); /* MCLK select */ break; case BT_PICCOLO: DPRINTK ("(for Piccolo)\n"); /* ### ueberall 0x22? */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* ##vorher 1c MCLK select */ - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* evtl d0 bei 1 bit? avoid FIFO underruns..? */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* ##vorher 1c MCLK select */ + vga_wseq (regbase, CL_SEQRF, 0xb0); /* evtl d0 bei 1 bit? avoid FIFO underruns..? */ break; case BT_PICASSO: DPRINTK ("(for Picasso)\n"); - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* ##vorher 22 MCLK select */ - vga_wseq (fb_info->regs, CL_SEQRF, 0xd0); /* ## vorher d0 avoid FIFO underruns..? */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* ##vorher 22 MCLK select */ + vga_wseq (regbase, CL_SEQRF, 0xd0); /* ## vorher d0 avoid FIFO underruns..? */ break; case BT_SPECTRUM: DPRINTK ("(for Spectrum)\n"); /* ### ueberall 0x22? */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* ##vorher 1c MCLK select */ - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* evtl d0? avoid FIFO underruns..? */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* ##vorher 1c MCLK select */ + vga_wseq (regbase, CL_SEQRF, 0xb0); /* evtl d0? avoid FIFO underruns..? */ break; case BT_PICASSO4: @@ -1339,18 +1183,18 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) break; default: - printk (KERN_WARNING "clgen: unknown Board\n"); + printk (KERN_WARNING "cirrusfb: unknown Board\n"); break; } - WGen (fb_info, VGA_PEL_MSK, 0x01); /* pixel mask: pass-through for first plane */ - if (_par->multiplexing) - WHDR (fb_info, 0x4a); /* hidden dac reg: 1280x1024 */ + WGen (cinfo, VGA_PEL_MSK, 0x01); /* pixel mask: pass-through for first plane */ + if (regs.multiplexing) + WHDR (cinfo, 0x4a); /* hidden dac reg: 1280x1024 */ else - WHDR (fb_info, 0); /* hidden dac: nothing */ - vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x06); /* memory mode: odd/even, ext. memory */ - vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0x01); /* plane mask: only write to first plane */ - offset = _par->var.xres_virtual / 16; + WHDR (cinfo, 0); /* hidden dac: nothing */ + vga_wseq (regbase, VGA_SEQ_MEMORY_MODE, 0x06); /* memory mode: odd/even, ext. memory */ + vga_wseq (regbase, VGA_SEQ_PLANE_WRITE, 0x01); /* plane mask: only write to first plane */ + offset = var->xres_virtual / 16; } /****************************************************** @@ -1359,9 +1203,9 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) * */ - else if (_par->var.bits_per_pixel == 8) { - DPRINTK ("clgen: preparing for 8 bit deep display\n"); - switch (fb_info->btype) { + else if (var->bits_per_pixel == 8) { + DPRINTK ("cirrusfb: preparing for 8 bit deep display\n"); + switch (cinfo->btype) { case BT_SD64: case BT_PICCOLO: case BT_PICASSO: @@ -1370,52 +1214,52 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) case BT_ALPINE: case BT_GD5480: DPRINTK (" (for GD54xx)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, - _par->multiplexing ? + vga_wseq (regbase, CL_SEQR7, + regs.multiplexing ? bi->sr07_8bpp_mux : bi->sr07_8bpp); break; case BT_LAGUNA: DPRINTK (" (for GD546x)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, - vga_rseq (fb_info->regs, CL_SEQR7) | 0x01); + vga_wseq (regbase, CL_SEQR7, + vga_rseq (regbase, CL_SEQR7) | 0x01); break; default: - printk (KERN_WARNING "clgen: unknown Board\n"); + printk (KERN_WARNING "cirrusfb: unknown Board\n"); break; } - switch (fb_info->btype) { + switch (cinfo->btype) { case BT_SD64: - vga_wseq (fb_info->regs, CL_SEQR1F, 0x1d); /* MCLK select */ + vga_wseq (regbase, CL_SEQR1F, 0x1d); /* MCLK select */ break; case BT_PICCOLO: - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* ### vorher 1c MCLK select */ - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* ### vorher 1c MCLK select */ + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ break; case BT_PICASSO: - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* ### vorher 1c MCLK select */ - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* ### vorher 1c MCLK select */ + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ break; case BT_SPECTRUM: - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* ### vorher 1c MCLK select */ - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* ### vorher 1c MCLK select */ + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ break; case BT_PICASSO4: #ifdef CONFIG_ZORRO - vga_wseq (fb_info->regs, CL_SEQRF, 0xb8); /* ### INCOMPLETE!! */ + vga_wseq (regbase, CL_SEQRF, 0xb8); /* ### INCOMPLETE!! */ #endif -/* vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c); */ +/* vga_wseq (regbase, CL_SEQR1F, 0x1c); */ break; case BT_ALPINE: DPRINTK (" (for GD543x)\n"); - clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK); + cirrusfb_set_mclk (cinfo, regs.mclk, regs.divMCLK); /* We already set SRF and SR1F */ break; @@ -1426,19 +1270,19 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) break; default: - printk (KERN_WARNING "clgen: unknown Board\n"); + printk (KERN_WARNING "cirrusfb: unknown Board\n"); break; } - vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64); /* mode register: 256 color mode */ - WGen (fb_info, VGA_PEL_MSK, 0xff); /* pixel mask: pass-through all planes */ - if (_par->multiplexing) - WHDR (fb_info, 0x4a); /* hidden dac reg: 1280x1024 */ + vga_wgfx (regbase, VGA_GFX_MODE, 64); /* mode register: 256 color mode */ + WGen (cinfo, VGA_PEL_MSK, 0xff); /* pixel mask: pass-through all planes */ + if (regs.multiplexing) + WHDR (cinfo, 0x4a); /* hidden dac reg: 1280x1024 */ else - WHDR (fb_info, 0); /* hidden dac: nothing */ - vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a); /* memory mode: chain4, ext. memory */ - vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff); /* plane mask: enable writing to all 4 planes */ - offset = _par->var.xres_virtual / 8; + WHDR (cinfo, 0); /* hidden dac: nothing */ + vga_wseq (regbase, VGA_SEQ_MEMORY_MODE, 0x0a); /* memory mode: chain4, ext. memory */ + vga_wseq (regbase, VGA_SEQ_PLANE_WRITE, 0xff); /* plane mask: enable writing to all 4 planes */ + offset = var->xres_virtual / 8; } /****************************************************** @@ -1447,74 +1291,74 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) * */ - else if (_par->var.bits_per_pixel == 16) { - DPRINTK ("clgen: preparing for 16 bit deep display\n"); - switch (fb_info->btype) { + else if (var->bits_per_pixel == 16) { + DPRINTK ("cirrusfb: preparing for 16 bit deep display\n"); + switch (cinfo->btype) { case BT_SD64: - vga_wseq (fb_info->regs, CL_SEQR7, 0xf7); /* Extended Sequencer Mode: 256c col. mode */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x1e); /* MCLK select */ + vga_wseq (regbase, CL_SEQR7, 0xf7); /* Extended Sequencer Mode: 256c col. mode */ + vga_wseq (regbase, CL_SEQR1F, 0x1e); /* MCLK select */ break; case BT_PICCOLO: - vga_wseq (fb_info->regs, CL_SEQR7, 0x87); - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* MCLK select */ + vga_wseq (regbase, CL_SEQR7, 0x87); + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* MCLK select */ break; case BT_PICASSO: - vga_wseq (fb_info->regs, CL_SEQR7, 0x27); - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* MCLK select */ + vga_wseq (regbase, CL_SEQR7, 0x27); + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* MCLK select */ break; case BT_SPECTRUM: - vga_wseq (fb_info->regs, CL_SEQR7, 0x87); - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* MCLK select */ + vga_wseq (regbase, CL_SEQR7, 0x87); + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* MCLK select */ break; case BT_PICASSO4: - vga_wseq (fb_info->regs, CL_SEQR7, 0x27); -/* vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c); */ + vga_wseq (regbase, CL_SEQR7, 0x27); +/* vga_wseq (regbase, CL_SEQR1F, 0x1c); */ break; case BT_ALPINE: DPRINTK (" (for GD543x)\n"); - if (_par->HorizRes >= 1024) - vga_wseq (fb_info->regs, CL_SEQR7, 0xa7); + if (regs.HorizRes >= 1024) + vga_wseq (regbase, CL_SEQR7, 0xa7); else - vga_wseq (fb_info->regs, CL_SEQR7, 0xa3); - clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK); + vga_wseq (regbase, CL_SEQR7, 0xa3); + cirrusfb_set_mclk (cinfo, regs.mclk, regs.divMCLK); break; case BT_GD5480: DPRINTK (" (for GD5480)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, 0x17); + vga_wseq (regbase, CL_SEQR7, 0x17); /* We already set SRF and SR1F */ break; case BT_LAGUNA: DPRINTK (" (for GD546x)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, - vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01); + vga_wseq (regbase, CL_SEQR7, + vga_rseq (regbase, CL_SEQR7) & ~0x01); break; default: - printk (KERN_WARNING "CLGEN: unknown Board\n"); + printk (KERN_WARNING "CIRRUSFB: unknown Board\n"); break; } - vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64); /* mode register: 256 color mode */ - WGen (fb_info, VGA_PEL_MSK, 0xff); /* pixel mask: pass-through all planes */ + vga_wgfx (regbase, VGA_GFX_MODE, 64); /* mode register: 256 color mode */ + WGen (cinfo, VGA_PEL_MSK, 0xff); /* pixel mask: pass-through all planes */ #ifdef CONFIG_PCI - WHDR (fb_info, 0xc0); /* Copy Xbh */ + WHDR (cinfo, 0xc0); /* Copy Xbh */ #elif defined(CONFIG_ZORRO) /* FIXME: CONFIG_PCI and CONFIG_ZORRO may be defined both */ - WHDR (fb_info, 0xa0); /* hidden dac reg: nothing special */ + WHDR (cinfo, 0xa0); /* hidden dac reg: nothing special */ #endif - vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a); /* memory mode: chain4, ext. memory */ - vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff); /* plane mask: enable writing to all 4 planes */ - offset = _par->var.xres_virtual / 4; + vga_wseq (regbase, VGA_SEQ_MEMORY_MODE, 0x0a); /* memory mode: chain4, ext. memory */ + vga_wseq (regbase, VGA_SEQ_PLANE_WRITE, 0xff); /* plane mask: enable writing to all 4 planes */ + offset = var->xres_virtual / 4; } /****************************************************** @@ -1523,66 +1367,66 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) * */ - else if (_par->var.bits_per_pixel == 32) { - DPRINTK ("clgen: preparing for 24/32 bit deep display\n"); - switch (fb_info->btype) { + else if (var->bits_per_pixel == 32) { + DPRINTK ("cirrusfb: preparing for 24/32 bit deep display\n"); + switch (cinfo->btype) { case BT_SD64: - vga_wseq (fb_info->regs, CL_SEQR7, 0xf9); /* Extended Sequencer Mode: 256c col. mode */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x1e); /* MCLK select */ + vga_wseq (regbase, CL_SEQR7, 0xf9); /* Extended Sequencer Mode: 256c col. mode */ + vga_wseq (regbase, CL_SEQR1F, 0x1e); /* MCLK select */ break; case BT_PICCOLO: - vga_wseq (fb_info->regs, CL_SEQR7, 0x85); - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* MCLK select */ + vga_wseq (regbase, CL_SEQR7, 0x85); + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* MCLK select */ break; case BT_PICASSO: - vga_wseq (fb_info->regs, CL_SEQR7, 0x25); - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* MCLK select */ + vga_wseq (regbase, CL_SEQR7, 0x25); + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* MCLK select */ break; case BT_SPECTRUM: - vga_wseq (fb_info->regs, CL_SEQR7, 0x85); - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ - vga_wseq (fb_info->regs, CL_SEQR1F, 0x22); /* MCLK select */ + vga_wseq (regbase, CL_SEQR7, 0x85); + vga_wseq (regbase, CL_SEQRF, 0xb0); /* Fast Page-Mode writes */ + vga_wseq (regbase, CL_SEQR1F, 0x22); /* MCLK select */ break; case BT_PICASSO4: - vga_wseq (fb_info->regs, CL_SEQR7, 0x25); -/* vga_wseq (fb_info->regs, CL_SEQR1F, 0x1c); */ + vga_wseq (regbase, CL_SEQR7, 0x25); +/* vga_wseq (regbase, CL_SEQR1F, 0x1c); */ break; case BT_ALPINE: DPRINTK (" (for GD543x)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, 0xa9); - clgen_set_mclk (fb_info, _par->mclk, _par->divMCLK); + vga_wseq (regbase, CL_SEQR7, 0xa9); + cirrusfb_set_mclk (cinfo, regs.mclk, regs.divMCLK); break; case BT_GD5480: DPRINTK (" (for GD5480)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, 0x19); + vga_wseq (regbase, CL_SEQR7, 0x19); /* We already set SRF and SR1F */ break; case BT_LAGUNA: DPRINTK (" (for GD546x)\n"); - vga_wseq (fb_info->regs, CL_SEQR7, - vga_rseq (fb_info->regs, CL_SEQR7) & ~0x01); + vga_wseq (regbase, CL_SEQR7, + vga_rseq (regbase, CL_SEQR7) & ~0x01); break; default: - printk (KERN_WARNING "clgen: unknown Board\n"); + printk (KERN_WARNING "cirrusfb: unknown Board\n"); break; } - vga_wgfx (fb_info->regs, VGA_GFX_MODE, 64); /* mode register: 256 color mode */ - WGen (fb_info, VGA_PEL_MSK, 0xff); /* pixel mask: pass-through all planes */ - WHDR (fb_info, 0xc5); /* hidden dac reg: 8-8-8 mode (24 or 32) */ - vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0a); /* memory mode: chain4, ext. memory */ - vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff); /* plane mask: enable writing to all 4 planes */ - offset = _par->var.xres_virtual / 4; + vga_wgfx (regbase, VGA_GFX_MODE, 64); /* mode register: 256 color mode */ + WGen (cinfo, VGA_PEL_MSK, 0xff); /* pixel mask: pass-through all planes */ + WHDR (cinfo, 0xc5); /* hidden dac reg: 8-8-8 mode (24 or 32) */ + vga_wseq (regbase, VGA_SEQ_MEMORY_MODE, 0x0a); /* memory mode: chain4, ext. memory */ + vga_wseq (regbase, VGA_SEQ_PLANE_WRITE, 0xff); /* plane mask: enable writing to all 4 planes */ + offset = var->xres_virtual / 4; } /****************************************************** @@ -1592,47 +1436,47 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) */ else { - printk (KERN_ERR "clgen: What's this?? requested color depth == %d.\n", - _par->var.bits_per_pixel); + printk (KERN_ERR "cirrusfb: What's this?? requested color depth == %d.\n", + var->bits_per_pixel); } - vga_wcrt (fb_info->regs, VGA_CRTC_OFFSET, offset & 0xff); + vga_wcrt (regbase, VGA_CRTC_OFFSET, offset & 0xff); tmp = 0x22; if (offset & 0x100) tmp |= 0x10; /* offset overflow bit */ - vga_wcrt (fb_info->regs, CL_CRT1B, tmp); /* screen start addr #16-18, fastpagemode cycles */ + vga_wcrt (regbase, CL_CRT1B, tmp); /* screen start addr #16-18, fastpagemode cycles */ - if (fb_info->btype == BT_SD64 || - fb_info->btype == BT_PICASSO4 || - fb_info->btype == BT_ALPINE || - fb_info->btype == BT_GD5480) - vga_wcrt (fb_info->regs, CL_CRT1D, 0x00); /* screen start address bit 19 */ + if (cinfo->btype == BT_SD64 || + cinfo->btype == BT_PICASSO4 || + cinfo->btype == BT_ALPINE || + cinfo->btype == BT_GD5480) + vga_wcrt (regbase, CL_CRT1D, 0x00); /* screen start address bit 19 */ - vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_HI, 0); /* text cursor location high */ - vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_LO, 0); /* text cursor location low */ - vga_wcrt (fb_info->regs, VGA_CRTC_UNDERLINE, 0); /* underline row scanline = at very bottom */ + vga_wcrt (regbase, VGA_CRTC_CURSOR_HI, 0); /* text cursor location high */ + vga_wcrt (regbase, VGA_CRTC_CURSOR_LO, 0); /* text cursor location low */ + vga_wcrt (regbase, VGA_CRTC_UNDERLINE, 0); /* underline row scanline = at very bottom */ - vga_wattr (fb_info->regs, VGA_ATC_MODE, 1); /* controller mode */ - vga_wattr (fb_info->regs, VGA_ATC_OVERSCAN, 0); /* overscan (border) color */ - vga_wattr (fb_info->regs, VGA_ATC_PLANE_ENABLE, 15); /* color plane enable */ - vga_wattr (fb_info->regs, CL_AR33, 0); /* pixel panning */ - vga_wattr (fb_info->regs, VGA_ATC_COLOR_PAGE, 0); /* color select */ + vga_wattr (regbase, VGA_ATC_MODE, 1); /* controller mode */ + vga_wattr (regbase, VGA_ATC_OVERSCAN, 0); /* overscan (border) color */ + vga_wattr (regbase, VGA_ATC_PLANE_ENABLE, 15); /* color plane enable */ + vga_wattr (regbase, CL_AR33, 0); /* pixel panning */ + vga_wattr (regbase, VGA_ATC_COLOR_PAGE, 0); /* color select */ /* [ EGS: SetOffset(); ] */ /* From SetOffset(): Turn on VideoEnable bit in Attribute controller */ - AttrOn (fb_info); + AttrOn (cinfo); - vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, 0); /* set/reset register */ - vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, 0); /* set/reset enable */ - vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_VALUE, 0); /* color compare */ - vga_wgfx (fb_info->regs, VGA_GFX_DATA_ROTATE, 0); /* data rotate */ - vga_wgfx (fb_info->regs, VGA_GFX_PLANE_READ, 0); /* read map select */ - vga_wgfx (fb_info->regs, VGA_GFX_MISC, 1); /* miscellaneous register */ - vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_MASK, 15); /* color don't care */ - vga_wgfx (fb_info->regs, VGA_GFX_BIT_MASK, 255); /* bit mask */ + vga_wgfx (regbase, VGA_GFX_SR_VALUE, 0); /* set/reset register */ + vga_wgfx (regbase, VGA_GFX_SR_ENABLE, 0); /* set/reset enable */ + vga_wgfx (regbase, VGA_GFX_COMPARE_VALUE, 0); /* color compare */ + vga_wgfx (regbase, VGA_GFX_DATA_ROTATE, 0); /* data rotate */ + vga_wgfx (regbase, VGA_GFX_PLANE_READ, 0); /* read map select */ + vga_wgfx (regbase, VGA_GFX_MISC, 1); /* miscellaneous register */ + vga_wgfx (regbase, VGA_GFX_COMPARE_MASK, 15); /* color don't care */ + vga_wgfx (regbase, VGA_GFX_BIT_MASK, 255); /* bit mask */ - vga_wseq (fb_info->regs, CL_SEQR12, 0x0); /* graphics cursor attributes: nothing special */ + vga_wseq (regbase, CL_SEQR12, 0x0); /* graphics cursor attributes: nothing special */ /* finally, turn on everything - turn off "FullBandwidth" bit */ /* also, set "DotClock%2" bit where requested */ @@ -1643,149 +1487,112 @@ static void clgen_set_par (const void *par, struct fb_info_gen *info) tmp |= 0x08; */ - vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, tmp); + vga_wseq (regbase, VGA_SEQ_CLOCK_MODE, tmp); DPRINTK ("CL_SEQR1: %d\n", tmp); - fb_info->currentmode = *_par; + cinfo->currentmode = regs; + info->fix.type = regs.type; + info->fix.visual = regs.visual; + info->fix.line_length = regs.line_length; - DPRINTK ("virtual offset: (%d,%d)\n", _par->var.xoffset, _par->var.yoffset); /* pan to requested offset */ - clgen_pan_display (&fb_info->currentmode.var, (struct fb_info_gen *) fb_info); + cirrusfb_pan_display (var, info); -#ifdef CLGEN_DEBUG - clgen_dump (); +#ifdef CIRRUSFB_DEBUG + cirrusfb_dump (); #endif DPRINTK ("EXIT\n"); - return; + return 0; } - -static int clgen_getcolreg (unsigned regno, unsigned *red, unsigned *green, - unsigned *blue, unsigned *transp, - struct fb_info *info) +/* for some reason incomprehensible to me, cirrusfb requires that you write + * the registers twice for the settings to take..grr. -dte */ +int cirrusfb_set_par (struct fb_info *info) { - struct clgenfb_info *fb_info = (struct clgenfb_info *)info; - - if (regno > 255) - return 1; - *red = fb_info->palette[regno].red; - *green = fb_info->palette[regno].green; - *blue = fb_info->palette[regno].blue; - *transp = 0; - return 0; + cirrusfb_set_par_foo (info); + return cirrusfb_set_par_foo (info); } - -static int clgenfb_setcolreg (unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, - struct fb_info *info) +int cirrusfb_setcolreg (unsigned regno, unsigned red, unsigned green, + unsigned blue, unsigned transp, + struct fb_info *info) { - struct clgenfb_info *fb_info = (struct clgenfb_info *) info; + struct cirrusfb_info *cinfo = info->par; if (regno > 255) return -EINVAL; -#ifdef FBCON_HAS_CFB8 - switch (fb_info->currentmode.var.bits_per_pixel) { - case 8: - /* "transparent" stuff is completely ignored. */ - WClut (fb_info, regno, red >> 10, green >> 10, blue >> 10); - break; - default: - /* do nothing */ - break; - } -#endif /* FBCON_HAS_CFB8 */ - - fb_info->palette[regno].red = red; - fb_info->palette[regno].green = green; - fb_info->palette[regno].blue = blue; - - if (regno >= 16) - return 0; - - switch (fb_info->currentmode.var.bits_per_pixel) { - -#ifdef FBCON_HAS_CFB16 - case 16: - assert (regno < 16); - if(isPReP) { - fb_info->fbcon_cmap.cfb16[regno] = - ((red & 0xf800) >> 9) | - ((green & 0xf800) >> 14) | - ((green & 0xf800) << 2) | - ((blue & 0xf800) >> 3); - } else { - fb_info->fbcon_cmap.cfb16[regno] = - ((red & 0xf800) >> 1) | - ((green & 0xf800) >> 6) | - ((blue & 0xf800) >> 11); + if (info->fix.visual == FB_VISUAL_TRUECOLOR) { + u32 v; + red >>= (16 - info->var.red.length); + green >>= (16 - info->var.green.length); + blue >>= (16 - info->var.blue.length); + + if (regno>=16) + return 1; + v = (red << info->var.red.offset) | + (green << info->var.green.offset) | + (blue << info->var.blue.offset); + + switch (info->var.bits_per_pixel) { + case 8: + ((u8*)(info->pseudo_palette))[regno] = v; + break; + case 16: + ((u16*)(info->pseudo_palette))[regno] = v; + break; + case 24: + case 32: + ((u32*)(info->pseudo_palette))[regno] = v; + break; } -#endif /* FBCON_HAS_CFB16 */ + return 0; + } -#ifdef FBCON_HAS_CFB24 - case 24: - assert (regno < 16); - fb_info->fbcon_cmap.cfb24[regno] = - (red << fb_info->currentmode.var.red.offset) | - (green << fb_info->currentmode.var.green.offset) | - (blue << fb_info->currentmode.var.blue.offset); - break; -#endif /* FBCON_HAS_CFB24 */ + cinfo->palette[regno].red = red; + cinfo->palette[regno].green = green; + cinfo->palette[regno].blue = blue; -#ifdef FBCON_HAS_CFB32 - case 32: - assert (regno < 16); - if(isPReP) { - fb_info->fbcon_cmap.cfb32[regno] = - ((red & 0xff00)) | - ((green & 0xff00) << 8) | - ((blue & 0xff00) << 16); - } else { - fb_info->fbcon_cmap.cfb32[regno] = - ((red & 0xff00) << 8) | - ((green & 0xff00)) | - ((blue & 0xff00) >> 8); - } - break; -#endif /* FBCON_HAS_CFB32 */ - default: - /* do nothing */ - break; + if (info->var.bits_per_pixel == 8) { + WClut (cinfo, regno, red >> 10, green >> 10, blue >> 10); } return 0; + } /************************************************************************* - clgen_pan_display() + cirrusfb_pan_display() performs display panning - provided hardware permits this **************************************************************************/ -static int clgen_pan_display (const struct fb_var_screeninfo *var, - struct fb_info_gen *info) +int cirrusfb_pan_display (struct fb_var_screeninfo *var, + struct fb_info *info) { int xoffset = 0; int yoffset = 0; unsigned long base; unsigned char tmp = 0, tmp2 = 0, xpix; - struct clgenfb_info *fb_info = (struct clgenfb_info *) info; + struct cirrusfb_info *cinfo = info->par; DPRINTK ("ENTER\n"); + DPRINTK ("virtual offset: (%d,%d)\n", var->xoffset, var->yoffset); /* no range checks for xoffset and yoffset, */ - /* as fbgen_pan_display has already done this */ + /* as fb_pan_display has already done this */ + if (var->vmode & FB_VMODE_YWRAP) + return -EINVAL; - fb_info->currentmode.var.xoffset = var->xoffset; - fb_info->currentmode.var.yoffset = var->yoffset; + info->var.xoffset = var->xoffset; + info->var.yoffset = var->yoffset; - xoffset = var->xoffset * fb_info->currentmode.var.bits_per_pixel / 8; + xoffset = var->xoffset * info->var.bits_per_pixel / 8; yoffset = var->yoffset; - base = yoffset * fb_info->currentmode.line_length + xoffset; + base = yoffset * cinfo->currentmode.line_length + xoffset; - if (fb_info->currentmode.var.bits_per_pixel == 1) { + if (info->var.bits_per_pixel == 1) { /* base is already correct */ xpix = (unsigned char) (var->xoffset % 8); } else { @@ -1793,9 +1600,11 @@ static int clgen_pan_display (const struct fb_var_screeninfo *var, xpix = (unsigned char) ((xoffset % 4) * 2); } + cirrusfb_WaitBLT(cinfo->regbase); /* make sure all the BLT's are done */ + /* lower 8 + 8 bits of screen start address */ - vga_wcrt (fb_info->regs, VGA_CRTC_START_LO, (unsigned char) (base & 0xff)); - vga_wcrt (fb_info->regs, VGA_CRTC_START_HI, (unsigned char) (base >> 8)); + vga_wcrt (cinfo->regbase, VGA_CRTC_START_LO, (unsigned char) (base & 0xff)); + vga_wcrt (cinfo->regbase, VGA_CRTC_START_HI, (unsigned char) (base >> 8)); /* construct bits 16, 17 and 18 of screen start address */ if (base & 0x10000) @@ -1805,29 +1614,30 @@ static int clgen_pan_display (const struct fb_var_screeninfo *var, if (base & 0x40000) tmp |= 0x08; - tmp2 = (vga_rcrt (fb_info->regs, CL_CRT1B) & 0xf2) | tmp; /* 0xf2 is %11110010, exclude tmp bits */ - vga_wcrt (fb_info->regs, CL_CRT1B, tmp2); + tmp2 = (vga_rcrt (cinfo->regbase, CL_CRT1B) & 0xf2) | tmp; /* 0xf2 is %11110010, exclude tmp bits */ + vga_wcrt (cinfo->regbase, CL_CRT1B, tmp2); /* construct bit 19 of screen start address */ - if (clgen_board_info[fb_info->btype].scrn_start_bit19) { + if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) { tmp2 = 0; if (base & 0x80000) tmp2 = 0x80; - vga_wcrt (fb_info->regs, CL_CRT1D, tmp2); + vga_wcrt (cinfo->regbase, CL_CRT1D, tmp2); } /* write pixel panning value to AR33; this does not quite work in 8bpp */ /* ### Piccolo..? Will this work? */ - if (fb_info->currentmode.var.bits_per_pixel == 1) - vga_wattr (fb_info->regs, CL_AR33, xpix); + if (info->var.bits_per_pixel == 1) + vga_wattr (cinfo->regbase, CL_AR33, xpix); + cirrusfb_WaitBLT (cinfo->regbase); DPRINTK ("EXIT\n"); return (0); } -static int clgen_blank (int blank_mode, struct fb_info_gen *info) +int cirrusfb_blank (int blank_mode, struct fb_info *info) { /* * Blank the screen if blank_mode != 0, else unblank. If blank == NULL @@ -1840,57 +1650,51 @@ static int clgen_blank (int blank_mode, struct fb_info_gen *info) * blank_mode == 4: powerdown */ unsigned char val; - static int current_mode = 0; - struct clgenfb_info *fb_info = (struct clgenfb_info *) info; + struct cirrusfb_info *cinfo = info->par; + int current_mode = cinfo->blank_mode; DPRINTK ("ENTER, blank mode = %d\n", blank_mode); - if (current_mode == blank_mode) { + if (info->state != FBINFO_STATE_RUNNING || + current_mode == blank_mode) { DPRINTK ("EXIT, returning 0\n"); return 0; } /* Undo current */ - switch (current_mode) { - case 0: /* Screen is normal */ - break; - case 1: /* Screen is blanked */ - val = vga_rseq (fb_info->regs, VGA_SEQ_CLOCK_MODE); - vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, val & 0xdf); /* clear "FullBandwidth" bit */ - break; - case 2: /* vsync suspended */ - case 3: /* hsync suspended */ - case 4: /* sceen is powered down */ - vga_wgfx (fb_info->regs, CL_GRE, 0x00); - break; - default: - DPRINTK ("EXIT, returning 1\n"); - return 1; + if (current_mode != VESA_NO_BLANKING) { + /* unblank the screen */ + val = vga_rseq (cinfo->regbase, VGA_SEQ_CLOCK_MODE); + vga_wseq (cinfo->regbase, VGA_SEQ_CLOCK_MODE, val & 0xdf); /* clear "FullBandwidth" bit */ + /* and undo VESA suspend trickery */ + vga_wgfx (cinfo->regbase, CL_GRE, 0x00); } /* set new */ + if(blank_mode != VESA_NO_BLANKING) { + /* blank the screen */ + val = vga_rseq (cinfo->regbase, VGA_SEQ_CLOCK_MODE); + vga_wseq (cinfo->regbase, VGA_SEQ_CLOCK_MODE, val | 0x20); /* set "FullBandwidth" bit */ + } + switch (blank_mode) { - case 0: /* Unblank screen */ - break; - case 1: /* Blank screen */ - val = vga_rseq (fb_info->regs, VGA_SEQ_CLOCK_MODE); - vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, val | 0x20); /* set "FullBandwidth" bit */ + case VESA_NO_BLANKING: break; - case 2: /* suspend vsync */ - vga_wgfx (fb_info->regs, CL_GRE, 0x04); + case VESA_VSYNC_SUSPEND: + vga_wgfx (cinfo->regbase, CL_GRE, 0x04); break; - case 3: /* suspend hsync */ - vga_wgfx (fb_info->regs, CL_GRE, 0x02); + case VESA_HSYNC_SUSPEND: + vga_wgfx (cinfo->regbase, CL_GRE, 0x02); break; - case 4: /* powerdown */ - vga_wgfx (fb_info->regs, CL_GRE, 0x06); + case VESA_POWERDOWN: + vga_wgfx (cinfo->regbase, CL_GRE, 0x06); break; default: DPRINTK ("EXIT, returning 1\n"); return 1; } - current_mode = blank_mode; + cinfo->blank_mode = blank_mode; DPRINTK ("EXIT, returning 0\n"); return 0; } @@ -1898,45 +1702,45 @@ static int clgen_blank (int blank_mode, struct fb_info_gen *info) /****************************************************************************/ /**** BEGIN Internal Routines ***********************************************/ -static void __init init_vgachip (struct clgenfb_info *fb_info) +static void init_vgachip (struct cirrusfb_info *cinfo) { - const struct clgen_board_info_rec *bi; + const struct cirrusfb_board_info_rec *bi; DPRINTK ("ENTER\n"); - assert (fb_info != NULL); + assert (cinfo != NULL); - bi = &clgen_board_info[fb_info->btype]; + bi = &cirrusfb_board_info[cinfo->btype]; /* reset board globally */ - switch (fb_info->btype) { + switch (cinfo->btype) { case BT_PICCOLO: - WSFR (fb_info, 0x01); + WSFR (cinfo, 0x01); udelay (500); - WSFR (fb_info, 0x51); + WSFR (cinfo, 0x51); udelay (500); break; case BT_PICASSO: - WSFR2 (fb_info, 0xff); + WSFR2 (cinfo, 0xff); udelay (500); break; case BT_SD64: case BT_SPECTRUM: - WSFR (fb_info, 0x1f); + WSFR (cinfo, 0x1f); udelay (500); - WSFR (fb_info, 0x4f); + WSFR (cinfo, 0x4f); udelay (500); break; case BT_PICASSO4: - vga_wcrt (fb_info->regs, CL_CRT51, 0x00); /* disable flickerfixer */ + vga_wcrt (cinfo->regbase, CL_CRT51, 0x00); /* disable flickerfixer */ mdelay (100); - vga_wgfx (fb_info->regs, CL_GR2F, 0x00); /* from Klaus' NetBSD driver: */ - vga_wgfx (fb_info->regs, CL_GR33, 0x00); /* put blitter into 542x compat */ - vga_wgfx (fb_info->regs, CL_GR31, 0x00); /* mode */ + vga_wgfx (cinfo->regbase, CL_GR2F, 0x00); /* from Klaus' NetBSD driver: */ + vga_wgfx (cinfo->regbase, CL_GR33, 0x00); /* put blitter into 542x compat */ + vga_wgfx (cinfo->regbase, CL_GR31, 0x00); /* mode */ break; case BT_GD5480: - vga_wgfx (fb_info->regs, CL_GR2F, 0x00); /* from Klaus' NetBSD driver: */ + vga_wgfx (cinfo->regbase, CL_GR2F, 0x00); /* from Klaus' NetBSD driver: */ break; case BT_ALPINE: @@ -1944,220 +1748,190 @@ static void __init init_vgachip (struct clgenfb_info *fb_info) break; default: - printk (KERN_ERR "clgen: Warning: Unknown board type\n"); + printk (KERN_ERR "cirrusfb: Warning: Unknown board type\n"); break; } - assert (fb_info->size > 0); /* make sure RAM size set by this point */ - - /* assume it's a "large memory" board (2/4 MB) */ - fb_info->smallboard = FALSE; + assert (cinfo->size > 0); /* make sure RAM size set by this point */ /* the P4 is not fully initialized here; I rely on it having been */ /* inited under AmigaOS already, which seems to work just fine */ /* (Klaus advised to do it this way) */ - if (fb_info->btype != BT_PICASSO4) { - WGen (fb_info, CL_VSSM, 0x10); /* EGS: 0x16 */ - WGen (fb_info, CL_POS102, 0x01); - WGen (fb_info, CL_VSSM, 0x08); /* EGS: 0x0e */ + if (cinfo->btype != BT_PICASSO4) { + WGen (cinfo, CL_VSSM, 0x10); /* EGS: 0x16 */ + WGen (cinfo, CL_POS102, 0x01); + WGen (cinfo, CL_VSSM, 0x08); /* EGS: 0x0e */ - if (fb_info->btype != BT_SD64) - WGen (fb_info, CL_VSSM2, 0x01); + if (cinfo->btype != BT_SD64) + WGen (cinfo, CL_VSSM2, 0x01); - vga_wseq (fb_info->regs, CL_SEQR0, 0x03); /* reset sequencer logic */ + vga_wseq (cinfo->regbase, CL_SEQR0, 0x03); /* reset sequencer logic */ - vga_wseq (fb_info->regs, VGA_SEQ_CLOCK_MODE, 0x21); /* FullBandwidth (video off) and 8/9 dot clock */ - WGen (fb_info, VGA_MIS_W, 0xc1); /* polarity (-/-), disable access to display memory, VGA_CRTC_START_HI base address: color */ + vga_wseq (cinfo->regbase, VGA_SEQ_CLOCK_MODE, 0x21); /* FullBandwidth (video off) and 8/9 dot clock */ + WGen (cinfo, VGA_MIS_W, 0xc1); /* polarity (-/-), disable access to display memory, VGA_CRTC_START_HI base address: color */ -/* vga_wgfx (fb_info->regs, CL_GRA, 0xce); "magic cookie" - doesn't make any sense to me.. */ - vga_wseq (fb_info->regs, CL_SEQR6, 0x12); /* unlock all extension registers */ +/* vga_wgfx (cinfo->regbase, CL_GRA, 0xce); "magic cookie" - doesn't make any sense to me.. */ + vga_wseq (cinfo->regbase, CL_SEQR6, 0x12); /* unlock all extension registers */ - vga_wgfx (fb_info->regs, CL_GR31, 0x04); /* reset blitter */ + vga_wgfx (cinfo->regbase, CL_GR31, 0x04); /* reset blitter */ - switch (fb_info->btype) { + switch (cinfo->btype) { case BT_GD5480: - vga_wseq (fb_info->regs, CL_SEQRF, 0x98); + vga_wseq (cinfo->regbase, CL_SEQRF, 0x98); break; case BT_ALPINE: break; case BT_SD64: - vga_wseq (fb_info->regs, CL_SEQRF, 0xb8); + vga_wseq (cinfo->regbase, CL_SEQRF, 0xb8); break; default: - vga_wseq (fb_info->regs, CL_SEQR16, 0x0f); - vga_wseq (fb_info->regs, CL_SEQRF, 0xb0); + vga_wseq (cinfo->regbase, CL_SEQR16, 0x0f); + vga_wseq (cinfo->regbase, CL_SEQRF, 0xb0); break; } } - vga_wseq (fb_info->regs, VGA_SEQ_PLANE_WRITE, 0xff); /* plane mask: nothing */ - vga_wseq (fb_info->regs, VGA_SEQ_CHARACTER_MAP, 0x00); /* character map select: doesn't even matter in gx mode */ - vga_wseq (fb_info->regs, VGA_SEQ_MEMORY_MODE, 0x0e); /* memory mode: chain-4, no odd/even, ext. memory */ + vga_wseq (cinfo->regbase, VGA_SEQ_PLANE_WRITE, 0xff); /* plane mask: nothing */ + vga_wseq (cinfo->regbase, VGA_SEQ_CHARACTER_MAP, 0x00); /* character map select: doesn't even matter in gx mode */ + vga_wseq (cinfo->regbase, VGA_SEQ_MEMORY_MODE, 0x0e); /* memory mode: chain-4, no odd/even, ext. memory */ /* controller-internal base address of video memory */ if (bi->init_sr07) - vga_wseq (fb_info->regs, CL_SEQR7, bi->sr07); + vga_wseq (cinfo->regbase, CL_SEQR7, bi->sr07); - /* vga_wseq (fb_info->regs, CL_SEQR8, 0x00); *//* EEPROM control: shouldn't be necessary to write to this at all.. */ + /* vga_wseq (cinfo->regbase, CL_SEQR8, 0x00); *//* EEPROM control: shouldn't be necessary to write to this at all.. */ - vga_wseq (fb_info->regs, CL_SEQR10, 0x00); /* graphics cursor X position (incomplete; position gives rem. 3 bits */ - vga_wseq (fb_info->regs, CL_SEQR11, 0x00); /* graphics cursor Y position (..."... ) */ - vga_wseq (fb_info->regs, CL_SEQR12, 0x00); /* graphics cursor attributes */ - vga_wseq (fb_info->regs, CL_SEQR13, 0x00); /* graphics cursor pattern address */ + vga_wseq (cinfo->regbase, CL_SEQR10, 0x00); /* graphics cursor X position (incomplete; position gives rem. 3 bits */ + vga_wseq (cinfo->regbase, CL_SEQR11, 0x00); /* graphics cursor Y position (..."... ) */ + vga_wseq (cinfo->regbase, CL_SEQR12, 0x00); /* graphics cursor attributes */ + vga_wseq (cinfo->regbase, CL_SEQR13, 0x00); /* graphics cursor pattern address */ /* writing these on a P4 might give problems.. */ - if (fb_info->btype != BT_PICASSO4) { - vga_wseq (fb_info->regs, CL_SEQR17, 0x00); /* configuration readback and ext. color */ - vga_wseq (fb_info->regs, CL_SEQR18, 0x02); /* signature generator */ + if (cinfo->btype != BT_PICASSO4) { + vga_wseq (cinfo->regbase, CL_SEQR17, 0x00); /* configuration readback and ext. color */ + vga_wseq (cinfo->regbase, CL_SEQR18, 0x02); /* signature generator */ } /* MCLK select etc. */ if (bi->init_sr1f) - vga_wseq (fb_info->regs, CL_SEQR1F, bi->sr1f); - - vga_wcrt (fb_info->regs, VGA_CRTC_PRESET_ROW, 0x00); /* Screen A preset row scan: none */ - vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_START, 0x20); /* Text cursor start: disable text cursor */ - vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_END, 0x00); /* Text cursor end: - */ - vga_wcrt (fb_info->regs, VGA_CRTC_START_HI, 0x00); /* Screen start address high: 0 */ - vga_wcrt (fb_info->regs, VGA_CRTC_START_LO, 0x00); /* Screen start address low: 0 */ - vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_HI, 0x00); /* text cursor location high: 0 */ - vga_wcrt (fb_info->regs, VGA_CRTC_CURSOR_LO, 0x00); /* text cursor location low: 0 */ - - vga_wcrt (fb_info->regs, VGA_CRTC_UNDERLINE, 0x00); /* Underline Row scanline: - */ - vga_wcrt (fb_info->regs, VGA_CRTC_MODE, 0xc3); /* mode control: timing enable, byte mode, no compat modes */ - vga_wcrt (fb_info->regs, VGA_CRTC_LINE_COMPARE, 0x00); /* Line Compare: not needed */ + vga_wseq (cinfo->regbase, CL_SEQR1F, bi->sr1f); + + vga_wcrt (cinfo->regbase, VGA_CRTC_PRESET_ROW, 0x00); /* Screen A preset row scan: none */ + vga_wcrt (cinfo->regbase, VGA_CRTC_CURSOR_START, 0x20); /* Text cursor start: disable text cursor */ + vga_wcrt (cinfo->regbase, VGA_CRTC_CURSOR_END, 0x00); /* Text cursor end: - */ + vga_wcrt (cinfo->regbase, VGA_CRTC_START_HI, 0x00); /* Screen start address high: 0 */ + vga_wcrt (cinfo->regbase, VGA_CRTC_START_LO, 0x00); /* Screen start address low: 0 */ + vga_wcrt (cinfo->regbase, VGA_CRTC_CURSOR_HI, 0x00); /* text cursor location high: 0 */ + vga_wcrt (cinfo->regbase, VGA_CRTC_CURSOR_LO, 0x00); /* text cursor location low: 0 */ + + vga_wcrt (cinfo->regbase, VGA_CRTC_UNDERLINE, 0x00); /* Underline Row scanline: - */ + vga_wcrt (cinfo->regbase, VGA_CRTC_MODE, 0xc3); /* mode control: timing enable, byte mode, no compat modes */ + vga_wcrt (cinfo->regbase, VGA_CRTC_LINE_COMPARE, 0x00); /* Line Compare: not needed */ /* ### add 0x40 for text modes with > 30 MHz pixclock */ - vga_wcrt (fb_info->regs, CL_CRT1B, 0x02); /* ext. display controls: ext.adr. wrap */ - - vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, 0x00); /* Set/Reset registes: - */ - vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, 0x00); /* Set/Reset enable: - */ - vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_VALUE, 0x00); /* Color Compare: - */ - vga_wgfx (fb_info->regs, VGA_GFX_DATA_ROTATE, 0x00); /* Data Rotate: - */ - vga_wgfx (fb_info->regs, VGA_GFX_PLANE_READ, 0x00); /* Read Map Select: - */ - vga_wgfx (fb_info->regs, VGA_GFX_MODE, 0x00); /* Mode: conf. for 16/4/2 color mode, no odd/even, read/write mode 0 */ - vga_wgfx (fb_info->regs, VGA_GFX_MISC, 0x01); /* Miscellaneous: memory map base address, graphics mode */ - vga_wgfx (fb_info->regs, VGA_GFX_COMPARE_MASK, 0x0f); /* Color Don't care: involve all planes */ - vga_wgfx (fb_info->regs, VGA_GFX_BIT_MASK, 0xff); /* Bit Mask: no mask at all */ - if (fb_info->btype == BT_ALPINE) - vga_wgfx (fb_info->regs, CL_GRB, 0x20); /* (5434 can't have bit 3 set for bitblt) */ + vga_wcrt (cinfo->regbase, CL_CRT1B, 0x02); /* ext. display controls: ext.adr. wrap */ + + vga_wgfx (cinfo->regbase, VGA_GFX_SR_VALUE, 0x00); /* Set/Reset registes: - */ + vga_wgfx (cinfo->regbase, VGA_GFX_SR_ENABLE, 0x00); /* Set/Reset enable: - */ + vga_wgfx (cinfo->regbase, VGA_GFX_COMPARE_VALUE, 0x00); /* Color Compare: - */ + vga_wgfx (cinfo->regbase, VGA_GFX_DATA_ROTATE, 0x00); /* Data Rotate: - */ + vga_wgfx (cinfo->regbase, VGA_GFX_PLANE_READ, 0x00); /* Read Map Select: - */ + vga_wgfx (cinfo->regbase, VGA_GFX_MODE, 0x00); /* Mode: conf. for 16/4/2 color mode, no odd/even, read/write mode 0 */ + vga_wgfx (cinfo->regbase, VGA_GFX_MISC, 0x01); /* Miscellaneous: memory map base address, graphics mode */ + vga_wgfx (cinfo->regbase, VGA_GFX_COMPARE_MASK, 0x0f); /* Color Don't care: involve all planes */ + vga_wgfx (cinfo->regbase, VGA_GFX_BIT_MASK, 0xff); /* Bit Mask: no mask at all */ + if (cinfo->btype == BT_ALPINE) + vga_wgfx (cinfo->regbase, CL_GRB, 0x20); /* (5434 can't have bit 3 set for bitblt) */ else - vga_wgfx (fb_info->regs, CL_GRB, 0x28); /* Graphics controller mode extensions: finer granularity, 8byte data latches */ - - vga_wgfx (fb_info->regs, CL_GRC, 0xff); /* Color Key compare: - */ - vga_wgfx (fb_info->regs, CL_GRD, 0x00); /* Color Key compare mask: - */ - vga_wgfx (fb_info->regs, CL_GRE, 0x00); /* Miscellaneous control: - */ - /* vga_wgfx (fb_info->regs, CL_GR10, 0x00); *//* Background color byte 1: - */ -/* vga_wgfx (fb_info->regs, CL_GR11, 0x00); */ - - vga_wattr (fb_info->regs, VGA_ATC_PALETTE0, 0x00); /* Attribute Controller palette registers: "identity mapping" */ - vga_wattr (fb_info->regs, VGA_ATC_PALETTE1, 0x01); - vga_wattr (fb_info->regs, VGA_ATC_PALETTE2, 0x02); - vga_wattr (fb_info->regs, VGA_ATC_PALETTE3, 0x03); - vga_wattr (fb_info->regs, VGA_ATC_PALETTE4, 0x04); - vga_wattr (fb_info->regs, VGA_ATC_PALETTE5, 0x05); - vga_wattr (fb_info->regs, VGA_ATC_PALETTE6, 0x06); - vga_wattr (fb_info->regs, VGA_ATC_PALETTE7, 0x07); - vga_wattr (fb_info->regs, VGA_ATC_PALETTE8, 0x08); - vga_wattr (fb_info->regs, VGA_ATC_PALETTE9, 0x09); - vga_wattr (fb_info->regs, VGA_ATC_PALETTEA, 0x0a); - vga_wattr (fb_info->regs, VGA_ATC_PALETTEB, 0x0b); - vga_wattr (fb_info->regs, VGA_ATC_PALETTEC, 0x0c); - vga_wattr (fb_info->regs, VGA_ATC_PALETTED, 0x0d); - vga_wattr (fb_info->regs, VGA_ATC_PALETTEE, 0x0e); - vga_wattr (fb_info->regs, VGA_ATC_PALETTEF, 0x0f); - - vga_wattr (fb_info->regs, VGA_ATC_MODE, 0x01); /* Attribute Controller mode: graphics mode */ - vga_wattr (fb_info->regs, VGA_ATC_OVERSCAN, 0x00); /* Overscan color reg.: reg. 0 */ - vga_wattr (fb_info->regs, VGA_ATC_PLANE_ENABLE, 0x0f); /* Color Plane enable: Enable all 4 planes */ -/* ### vga_wattr (fb_info->regs, CL_AR33, 0x00); * Pixel Panning: - */ - vga_wattr (fb_info->regs, VGA_ATC_COLOR_PAGE, 0x00); /* Color Select: - */ - - WGen (fb_info, VGA_PEL_MSK, 0xff); /* Pixel mask: no mask */ - - if (fb_info->btype != BT_ALPINE && fb_info->btype != BT_GD5480) - WGen (fb_info, VGA_MIS_W, 0xc3); /* polarity (-/-), enable display mem, VGA_CRTC_START_HI i/o base = color */ - - vga_wgfx (fb_info->regs, CL_GR31, 0x04); /* BLT Start/status: Blitter reset */ - vga_wgfx (fb_info->regs, CL_GR31, 0x00); /* - " - : "end-of-reset" */ - - /* CLUT setup */ - WClut (fb_info, 0, 0x00, 0x00, 0x00); /* background: black */ - WClut (fb_info, 1, 0x3f, 0x3f, 0x3f); /* foreground: white */ - WClut (fb_info, 2, 0x00, 0x20, 0x00); - WClut (fb_info, 3, 0x00, 0x20, 0x20); - WClut (fb_info, 4, 0x20, 0x00, 0x00); - WClut (fb_info, 5, 0x20, 0x00, 0x20); - WClut (fb_info, 6, 0x20, 0x10, 0x00); - WClut (fb_info, 7, 0x20, 0x20, 0x20); - WClut (fb_info, 8, 0x10, 0x10, 0x10); - WClut (fb_info, 9, 0x10, 0x10, 0x30); - WClut (fb_info, 10, 0x10, 0x30, 0x10); - WClut (fb_info, 11, 0x10, 0x30, 0x30); - WClut (fb_info, 12, 0x30, 0x10, 0x10); - WClut (fb_info, 13, 0x30, 0x10, 0x30); - WClut (fb_info, 14, 0x30, 0x30, 0x10); - WClut (fb_info, 15, 0x30, 0x30, 0x30); - - /* the rest a grey ramp */ - { - int i; - - for (i = 16; i < 256; i++) - WClut (fb_info, i, i >> 2, i >> 2, i >> 2); - } - + vga_wgfx (cinfo->regbase, CL_GRB, 0x28); /* Graphics controller mode extensions: finer granularity, 8byte data latches */ + + vga_wgfx (cinfo->regbase, CL_GRC, 0xff); /* Color Key compare: - */ + vga_wgfx (cinfo->regbase, CL_GRD, 0x00); /* Color Key compare mask: - */ + vga_wgfx (cinfo->regbase, CL_GRE, 0x00); /* Miscellaneous control: - */ + /* vga_wgfx (cinfo->regbase, CL_GR10, 0x00); *//* Background color byte 1: - */ +/* vga_wgfx (cinfo->regbase, CL_GR11, 0x00); */ + + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE0, 0x00); /* Attribute Controller palette registers: "identity mapping" */ + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE1, 0x01); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE2, 0x02); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE3, 0x03); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE4, 0x04); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE5, 0x05); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE6, 0x06); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE7, 0x07); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE8, 0x08); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTE9, 0x09); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTEA, 0x0a); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTEB, 0x0b); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTEC, 0x0c); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTED, 0x0d); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTEE, 0x0e); + vga_wattr (cinfo->regbase, VGA_ATC_PALETTEF, 0x0f); + + vga_wattr (cinfo->regbase, VGA_ATC_MODE, 0x01); /* Attribute Controller mode: graphics mode */ + vga_wattr (cinfo->regbase, VGA_ATC_OVERSCAN, 0x00); /* Overscan color reg.: reg. 0 */ + vga_wattr (cinfo->regbase, VGA_ATC_PLANE_ENABLE, 0x0f); /* Color Plane enable: Enable all 4 planes */ +/* ### vga_wattr (cinfo->regbase, CL_AR33, 0x00); * Pixel Panning: - */ + vga_wattr (cinfo->regbase, VGA_ATC_COLOR_PAGE, 0x00); /* Color Select: - */ + + WGen (cinfo, VGA_PEL_MSK, 0xff); /* Pixel mask: no mask */ + + if (cinfo->btype != BT_ALPINE && cinfo->btype != BT_GD5480) + WGen (cinfo, VGA_MIS_W, 0xc3); /* polarity (-/-), enable display mem, VGA_CRTC_START_HI i/o base = color */ + + vga_wgfx (cinfo->regbase, CL_GR31, 0x04); /* BLT Start/status: Blitter reset */ + vga_wgfx (cinfo->regbase, CL_GR31, 0x00); /* - " - : "end-of-reset" */ /* misc... */ - WHDR (fb_info, 0); /* Hidden DAC register: - */ + WHDR (cinfo, 0); /* Hidden DAC register: - */ - printk (KERN_INFO "clgen: This board has %ld bytes of DRAM memory\n", fb_info->size); + printk (KERN_DEBUG "cirrusfb: This board has %ld bytes of DRAM memory\n", cinfo->size); DPRINTK ("EXIT\n"); return; } -static void switch_monitor (struct clgenfb_info *fb_info, int on) +static void switch_monitor (struct cirrusfb_info *cinfo, int on) { #ifdef CONFIG_ZORRO /* only works on Zorro boards */ static int IsOn = 0; /* XXX not ok for multiple boards */ DPRINTK ("ENTER\n"); - if (fb_info->btype == BT_PICASSO4) + if (cinfo->btype == BT_PICASSO4) return; /* nothing to switch */ - if (fb_info->btype == BT_ALPINE) + if (cinfo->btype == BT_ALPINE) return; /* nothing to switch */ - if (fb_info->btype == BT_GD5480) + if (cinfo->btype == BT_GD5480) return; /* nothing to switch */ - if (fb_info->btype == BT_PICASSO) { + if (cinfo->btype == BT_PICASSO) { if ((on && !IsOn) || (!on && IsOn)) - WSFR (fb_info, 0xff); + WSFR (cinfo, 0xff); DPRINTK ("EXIT\n"); return; } if (on) { - switch (fb_info->btype) { + switch (cinfo->btype) { case BT_SD64: - WSFR (fb_info, fb_info->SFR | 0x21); + WSFR (cinfo, cinfo->SFR | 0x21); break; case BT_PICCOLO: - WSFR (fb_info, fb_info->SFR | 0x28); + WSFR (cinfo, cinfo->SFR | 0x28); break; case BT_SPECTRUM: - WSFR (fb_info, 0x6f); + WSFR (cinfo, 0x6f); break; default: /* do nothing */ break; } } else { - switch (fb_info->btype) { + switch (cinfo->btype) { case BT_SD64: - WSFR (fb_info, fb_info->SFR & 0xde); + WSFR (cinfo, cinfo->SFR & 0xde); break; case BT_PICCOLO: - WSFR (fb_info, fb_info->SFR & 0xd7); + WSFR (cinfo, cinfo->SFR & 0xd7); break; case BT_SPECTRUM: - WSFR (fb_info, 0x4f); + WSFR (cinfo, 0x4f); break; default: /* do nothing */ break; } @@ -2167,238 +1941,130 @@ static void switch_monitor (struct clgenfb_info *fb_info, int on) #endif /* CONFIG_ZORRO */ } -static void clgen_set_disp (const void *par, struct display *disp, - struct fb_info_gen *info) -{ - struct clgenfb_par *_par = (struct clgenfb_par *) par; - struct clgenfb_info *fb_info = (struct clgenfb_info *) info; - int accel_text; - - DPRINTK ("ENTER\n"); - - assert (_par != NULL); - assert (fb_info != NULL); - - accel_text = _par->var.accel_flags & FB_ACCELF_TEXT; - - printk ("Cirrus Logic video mode: "); - info->info.screen_base = (char *) fb_info->fbmem; - switch (_par->var.bits_per_pixel) { -#ifdef FBCON_HAS_MFB - case 1: - printk ("monochrome\n"); - if (fb_info->btype == BT_GD5480) - info->info.screen_base = (char *) fb_info->fbmem; - disp->dispsw = &fbcon_mfb; - break; -#endif -#ifdef FBCON_HAS_CFB8 - case 8: - printk ("8 bit color depth\n"); - if (fb_info->btype == BT_GD5480) - info->info.screen_base = (char *) fb_info->fbmem; - if (accel_text) - disp->dispsw = &fbcon_clgen_8; - else - disp->dispsw = &fbcon_cfb8; - break; -#endif -#ifdef FBCON_HAS_CFB16 - case 16: - printk ("16 bit color depth\n"); - if (accel_text) - disp->dispsw = &fbcon_clgen_16; - else - disp->dispsw = &fbcon_cfb16; - if (fb_info->btype == BT_GD5480) - info->info.screen_base = (char *) fb_info->fbmem + 1 * MB_; - disp->dispsw_data = fb_info->fbcon_cmap.cfb16; - break; -#endif -#ifdef FBCON_HAS_CFB24 - case 24: - printk ("24 bit color depth\n"); - disp->dispsw = &fbcon_cfb24; - if (fb_info->btype == BT_GD5480) - info->info.screen_base = (char *) fb_info->fbmem + 2 * MB_; - disp->dispsw_data = fb_info->fbcon_cmap.cfb24; - break; -#endif -#ifdef FBCON_HAS_CFB32 - case 32: - printk ("32 bit color depth\n"); - if (accel_text) - disp->dispsw = &fbcon_clgen_32; - else - disp->dispsw = &fbcon_cfb32; - if (fb_info->btype == BT_GD5480) - info->info.screen_base = (char *) fb_info->fbmem + 2 * MB_; - disp->dispsw_data = fb_info->fbcon_cmap.cfb32; - break; -#endif - - default: - printk ("unsupported color depth\n"); - disp->dispsw = &fbcon_dummy; - disp->dispsw_data = NULL; - break; - } - DPRINTK ("EXIT\n"); -} +/******************************************/ +/* Linux 2.6-style accelerated functions */ +/******************************************/ -#ifdef FBCON_HAS_CFB8 -static void fbcon_clgen8_bmove (struct display *p, int sy, int sx, - int dy, int dx, int height, int width) +static void cirrusfb_prim_fillrect(struct cirrusfb_info *cinfo, + const struct fb_fillrect *region) { - struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info; - - DPRINTK ("ENTER\n"); - - sx *= fontwidth (p); - sy *= fontheight (p); - dx *= fontwidth (p); - dy *= fontheight (p); - width *= fontwidth (p); - height *= fontheight (p); - - clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy, - (unsigned short) dx, (unsigned short) dy, - (unsigned short) width, (unsigned short) height, - fb_info->currentmode.line_length); - - DPRINTK ("EXIT\n"); + int m; /* bytes per pixel */ + if(cinfo->info->var.bits_per_pixel == 1) { + cirrusfb_RectFill(cinfo->regbase, cinfo->info->var.bits_per_pixel, + region->dx / 8, region->dy, + region->width / 8, region->height, + region->color, + cinfo->currentmode.line_length); + } else { + m = ( cinfo->info->var.bits_per_pixel + 7 ) / 8; + cirrusfb_RectFill(cinfo->regbase, cinfo->info->var.bits_per_pixel, + region->dx * m, region->dy, + region->width * m, region->height, + region->color, + cinfo->currentmode.line_length); + } + return; } -static void fbcon_clgen8_clear (struct vc_data *conp, struct display *p, - int sy, int sx, int height, int width) +void cirrusfb_fillrect (struct fb_info *info, const struct fb_fillrect *region) { - struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info; - unsigned short col; - - DPRINTK ("ENTER\n"); - - sx *= fontwidth (p); - sy *= fontheight (p); - width *= fontwidth (p); - height *= fontheight (p); - - col = attr_bgcol_ec (p, conp); - col &= 0xff; + struct cirrusfb_info *cinfo = info->par; + struct fb_fillrect modded; + int vxres, vyres; - clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy, - (unsigned short) width, (unsigned short) height, - col, fb_info->currentmode.line_length); - - DPRINTK ("EXIT\n"); -} - -#endif + if (info->state != FBINFO_STATE_RUNNING) + return; + if (info->flags & FBINFO_HWACCEL_DISABLED) { + cfb_fillrect(info, region); + return; + } -#ifdef FBCON_HAS_CFB16 -static void fbcon_clgen16_bmove (struct display *p, int sy, int sx, - int dy, int dx, int height, int width) -{ - struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info; + vxres = info->var.xres_virtual; + vyres = info->var.yres_virtual; - DPRINTK ("ENTER\n"); + memcpy(&modded, region, sizeof(struct fb_fillrect)); - sx *= fontwidth (p) * 2; /* 2 bytes/pixel */ - sy *= fontheight (p); - dx *= fontwidth (p) * 2; /* 2 bytes/pixel */ - dy *= fontheight (p); - width *= fontwidth (p) * 2; /* 2 bytes/pixel */ - height *= fontheight (p); + if(!modded.width || !modded.height || + modded.dx >= vxres || modded.dy >= vyres) + return; - clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy, - (unsigned short) dx, (unsigned short) dy, - (unsigned short) width, (unsigned short) height, - fb_info->currentmode.line_length); + if(modded.dx + modded.width > vxres) modded.width = vxres - modded.dx; + if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy; - DPRINTK ("EXIT\n"); + cirrusfb_prim_fillrect(cinfo, &modded); } -static void fbcon_clgen16_clear (struct vc_data *conp, struct display *p, - int sy, int sx, int height, int width) +static void cirrusfb_prim_copyarea(struct cirrusfb_info *cinfo, + const struct fb_copyarea *area) { - struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info; - unsigned short col; - - DPRINTK ("ENTER\n"); - - sx *= fontwidth (p) * 2; /* 2 bytes/pixel */ - sy *= fontheight (p); - width *= fontwidth (p) * 2; /* 2 bytes/pixel? */ - height *= fontheight (p); - - col = attr_bgcol_ec (p, conp); - col &= 0xff; - - clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy, - (unsigned short) width, (unsigned short) height, - col, fb_info->currentmode.line_length); - - DPRINTK ("EXIT\n"); + int m; /* bytes per pixel */ + if(cinfo->info->var.bits_per_pixel == 1) { + cirrusfb_BitBLT(cinfo->regbase, cinfo->info->var.bits_per_pixel, + area->sx / 8, area->sy, + area->dx / 8, area->dy, + area->width / 8, area->height, + cinfo->currentmode.line_length); + } else { + m = ( cinfo->info->var.bits_per_pixel + 7 ) / 8; + cirrusfb_BitBLT(cinfo->regbase, cinfo->info->var.bits_per_pixel, + area->sx * m, area->sy, + area->dx * m, area->dy, + area->width * m, area->height, + cinfo->currentmode.line_length); + } + return; } -#endif -#ifdef FBCON_HAS_CFB32 -static void fbcon_clgen32_bmove (struct display *p, int sy, int sx, - int dy, int dx, int height, int width) +void cirrusfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) { - struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info; + struct cirrusfb_info *cinfo = info->par; + struct fb_copyarea modded; + u32 vxres, vyres; + modded.sx = area->sx; + modded.sy = area->sy; + modded.dx = area->dx; + modded.dy = area->dy; + modded.width = area->width; + modded.height = area->height; + + if (info->state != FBINFO_STATE_RUNNING) + return; + if (info->flags & FBINFO_HWACCEL_DISABLED) { + cfb_copyarea(info, area); + return; + } - DPRINTK ("ENTER\n"); + vxres = info->var.xres_virtual; + vyres = info->var.yres_virtual; - sx *= fontwidth (p) * 4; /* 4 bytes/pixel */ - sy *= fontheight (p); - dx *= fontwidth (p) * 4; /* 4 bytes/pixel */ - dy *= fontheight (p); - width *= fontwidth (p) * 4; /* 4 bytes/pixel */ - height *= fontheight (p); + if(!modded.width || !modded.height || + modded.sx >= vxres || modded.sy >= vyres || + modded.dx >= vxres || modded.dy >= vyres) + return; - clgen_BitBLT (fb_info->regs, (unsigned short) sx, (unsigned short) sy, - (unsigned short) dx, (unsigned short) dy, - (unsigned short) width, (unsigned short) height, - fb_info->currentmode.line_length); + if(modded.sx + modded.width > vxres) modded.width = vxres - modded.sx; + if(modded.dx + modded.width > vxres) modded.width = vxres - modded.dx; + if(modded.sy + modded.height > vyres) modded.height = vyres - modded.sy; + if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy; - DPRINTK ("EXIT\n"); + cirrusfb_prim_copyarea(cinfo, &modded); } -static void fbcon_clgen32_clear (struct vc_data *conp, struct display *p, - int sy, int sx, int height, int width) +void cirrusfb_imageblit(struct fb_info *info, const struct fb_image *image) { - struct clgenfb_info *fb_info = (struct clgenfb_info *) p->fb_info; - - unsigned short col; - - DPRINTK ("ENTER\n"); - - sx *= fontwidth (p) * 4; /* 4 bytes/pixel */ - sy *= fontheight (p); - width *= fontwidth (p) * 4; /* 4 bytes/pixel? */ - height *= fontheight (p); - - col = attr_bgcol_ec (p, conp); - col &= 0xff; + struct cirrusfb_info *cinfo = info->par; - clgen_RectFill (fb_info, (unsigned short) sx, (unsigned short) sy, - (unsigned short) width, (unsigned short) height, - col, fb_info->currentmode.line_length); - - DPRINTK ("EXIT\n"); + cirrusfb_WaitBLT(cinfo->regbase); + cfb_imageblit(info, image); } -#endif /* FBCON_HAS_CFB32 */ - - - #ifdef CONFIG_PPC_PREP #define PREP_VIDEO_BASE ((volatile unsigned long) 0xC0000000) #define PREP_IO_BASE ((volatile unsigned char *) 0x80000000) -static void __init get_prep_addrs (unsigned long *display, unsigned long *registers) +static void get_prep_addrs (unsigned long *display, unsigned long *registers) { DPRINTK ("ENTER\n"); @@ -2411,8 +2077,6 @@ static void __init get_prep_addrs (unsigned long *display, unsigned long *regist #endif /* CONFIG_PPC_PREP */ - - #ifdef CONFIG_PCI static int release_io_ports = 0; @@ -2420,7 +2084,7 @@ static int release_io_ports = 0; * based on the DRAM bandwidth bit and DRAM bank switching bit. This * works with 1MB, 2MB and 4MB configurations (which the Motorola boards * seem to have. */ -static unsigned int __init clgen_get_memsize (caddr_t regbase) +static unsigned int cirrusfb_get_memsize (caddr_t regbase) { unsigned long mem; unsigned char SRF; @@ -2443,40 +2107,14 @@ static unsigned int __init clgen_get_memsize (caddr_t regbase) mem *= 2; } /* TODO: Handling of GD5446/5480 (see XF86 sources ...) */ - return mem; DPRINTK ("EXIT\n"); + return mem; } -static struct pci_dev * __init clgen_pci_dev_get (clgen_board_t *btype) -{ - struct pci_dev *pdev; - int i; - - DPRINTK ("ENTER\n"); - - for (i = 0; i < ARRAY_SIZE(clgen_pci_probe_list); i++) { - pdev = NULL; - while ((pdev = pci_find_device (PCI_VENDOR_ID_CIRRUS, - clgen_pci_probe_list[i].device, pdev)) != NULL) { - if (pci_enable_device(pdev) == 0) { - *btype = clgen_pci_probe_list[i].btype; - DPRINTK ("EXIT, returning pdev=%p\n", pdev); - return pdev; - } - } - } - - DPRINTK ("EXIT, returning NULL\n"); - return NULL; -} - - - - -static void __init get_pci_addrs (const struct pci_dev *pdev, +static void get_pci_addrs (const struct pci_dev *pdev, unsigned long *display, unsigned long *registers) { assert (pdev != NULL); @@ -2504,10 +2142,10 @@ static void __init get_pci_addrs (const struct pci_dev *pdev, } -static void __exit clgen_pci_unmap (struct clgenfb_info *info) +static void __devexit cirrusfb_pci_unmap (struct cirrusfb_info *cinfo) { - iounmap (info->fbmem); - release_mem_region(info->fbmem_phys, info->size); + iounmap (cinfo->fbmem); + release_mem_region(cinfo->fbmem_phys, cinfo->size); #if 0 /* if system didn't claim this region, we would... */ release_mem_region(0xA0000, 65535); @@ -2518,79 +2156,78 @@ static void __exit clgen_pci_unmap (struct clgenfb_info *info) } -static int __init clgen_pci_setup (struct clgenfb_info *info, - clgen_board_t *btype) +static struct cirrusfb_info *cirrusfb_pci_setup (struct pci_dev *pdev, + const struct pci_device_id *ent) { - struct pci_dev *pdev; + struct cirrusfb_info *cinfo; + struct fb_info *info; + cirrusfb_board_t btype; unsigned long board_addr, board_size; - DPRINTK ("ENTER\n"); + if (pci_enable_device(pdev) != 0) { + printk(KERN_ERR "cirrusfb: Cannot enable PCI device\n"); + return NULL; + } - pdev = clgen_pci_dev_get (btype); - if (!pdev) { - printk (KERN_INFO "cirrusfb: couldn't find Cirrus Logic PCI device\n"); - DPRINTK ("EXIT, returning 1\n"); - return 1; + info = framebuffer_alloc(sizeof(struct cirrusfb_info), &pdev->dev); + if (!info) { + printk (KERN_ERR "cirrusfb: could not allocate memory\n"); + return NULL; } + + cinfo = info->par; + cinfo->info = info; + cinfo->pdev = pdev; + cinfo->btype = btype = (cirrusfb_board_t) ent->driver_data; + DPRINTK (" Found PCI device, base address 0 is 0x%lx, btype set to %d\n", - pdev->resource[0].start, *btype); + pdev->resource[0].start, btype); DPRINTK (" base address 1 is 0x%lx\n", pdev->resource[1].start); - info->pdev = pdev; - if(isPReP) { - /* Xbh does this, though 0 seems to be the init value */ - pcibios_write_config_dword (0, pdev->devfn, PCI_BASE_ADDRESS_0, - 0x00000000); - + pci_write_config_dword (pdev, PCI_BASE_ADDRESS_0, 0x00000000); #ifdef CONFIG_PPC_PREP - get_prep_addrs (&board_addr, &info->fbregs_phys); + get_prep_addrs (&board_addr, &cinfo->fbregs_phys); #endif + /* PReP dies if we ioremap the IO registers, but it works w/out... */ + cinfo->regbase = (char *) cinfo->fbregs_phys; } else { DPRINTK ("Attempt to get PCI info for Cirrus Graphics Card\n"); - get_pci_addrs (pdev, &board_addr, &info->fbregs_phys); + get_pci_addrs (pdev, &board_addr, &cinfo->fbregs_phys); + cinfo->regbase = 0; /* FIXME: this forces VGA. alternatives? */ } - DPRINTK ("Board address: 0x%lx, register address: 0x%lx\n", board_addr, info->fbregs_phys); + DPRINTK ("Board address: 0x%lx, register address: 0x%lx\n", board_addr, cinfo->fbregs_phys); - if(isPReP) { - /* PReP dies if we ioremap the IO registers, but it works w/out... */ - info->regs = (char *) info->fbregs_phys; - } else - info->regs = 0; /* FIXME: this forces VGA. alternatives? */ - - if (*btype == BT_GD5480) { - board_size = 32 * MB_; - } else { - board_size = clgen_get_memsize (info->regs); - } + board_size = (btype == BT_GD5480) ? + 32 * MB_ : cirrusfb_get_memsize (cinfo->regbase); - if (!request_mem_region(board_addr, board_size, "clgenfb")) { - printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n", + if (!request_mem_region(board_addr, board_size, "cirrusfb")) { + printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, abort\n", board_addr); - return -1; + framebuffer_release (info); + return NULL; } #if 0 /* if the system didn't claim this region, we would... */ - if (!request_mem_region(0xA0000, 65535, "clgenfb")) { - printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n", + if (!request_mem_region(0xA0000, 65535, "cirrusfb")) { + printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, abort\n", 0xA0000L); release_mem_region(board_addr, board_size); - return -1; + framebuffer_release (info); + return NULL; } #endif - if (request_region(0x3C0, 32, "clgenfb")) + if (request_region(0x3C0, 32, "cirrusfb")) release_io_ports = 1; - info->fbmem = ioremap (board_addr, board_size); - info->fbmem_phys = board_addr; - info->size = board_size; - - printk (" RAM (%lu kB) at 0x%lx, ", info->size / KB_, board_addr); + cinfo->fbmem = ioremap (board_addr, board_size); + cinfo->fbmem_phys = board_addr; + cinfo->size = board_size; + printk (" RAM (%lu kB) at 0xx%lx, ", cinfo->size / KB_, board_addr); printk ("Cirrus Logic chipset on PCI bus\n"); - DPRINTK ("EXIT, returning 0\n"); - return 0; + return cinfo; } #endif /* CONFIG_PCI */ @@ -2598,9 +2235,9 @@ static int __init clgen_pci_setup (struct clgenfb_info *info, #ifdef CONFIG_ZORRO -static int __init clgen_zorro_find (struct zorro_dev **z_o, +static int cirrusfb_zorro_find (struct zorro_dev **z_o, struct zorro_dev **z2_o, - clgen_board_t *btype, unsigned long *size) + cirrusfb_board_t *btype, unsigned long *size) { struct zorro_dev *z = NULL; int i; @@ -2608,101 +2245,110 @@ static int __init clgen_zorro_find (struct zorro_dev **z_o, assert (z_o != NULL); assert (btype != NULL); - for (i = 0; i < ARRAY_SIZE(clgen_zorro_probe_list); i++) - if ((z = zorro_find_device(clgen_zorro_probe_list[i].id, NULL))) + for (i = 0; i < ARRAY_SIZE(cirrusfb_zorro_probe_list); i++) + if ((z = zorro_find_device(cirrusfb_zorro_probe_list[i].id, NULL))) break; if (z) { *z_o = z; - if (clgen_zorro_probe_list[i].id2) - *z2_o = zorro_find_device(clgen_zorro_probe_list[i].id2, NULL); + if (cirrusfb_zorro_probe_list[i].id2) + *z2_o = zorro_find_device(cirrusfb_zorro_probe_list[i].id2, NULL); else *z2_o = NULL; - *btype = clgen_zorro_probe_list[i].btype; - *size = clgen_zorro_probe_list[i].size; + *btype = cirrusfb_zorro_probe_list[i].btype; + *size = cirrusfb_zorro_probe_list[i].size; - printk (KERN_INFO "clgen: %s board detected; ", - clgen_board_info[*btype].name); + printk (KERN_INFO "cirrusfb: %s board detected; ", + cirrusfb_board_info[*btype].name); return 0; } - printk (KERN_NOTICE "clgen: no supported board found.\n"); + printk (KERN_NOTICE "cirrusfb: no supported board found.\n"); return -1; } -static void __exit clgen_zorro_unmap (struct clgenfb_info *info) +static void __devexit cirrusfb_zorro_unmap (struct cirrusfb_info *cinfo) { - release_mem_region(info->board_addr, info->board_size); + release_mem_region(cinfo->board_addr, cinfo->board_size); - if (info->btype == BT_PICASSO4) { - iounmap ((void *)info->board_addr); - iounmap ((void *)info->fbmem_phys); + if (cinfo->btype == BT_PICASSO4) { + iounmap ((void *)cinfo->board_addr); + iounmap ((void *)cinfo->fbmem_phys); } else { - if (info->board_addr > 0x01000000) - iounmap ((void *)info->board_addr); + if (cinfo->board_addr > 0x01000000) + iounmap ((void *)cinfo->board_addr); } } -static int __init clgen_zorro_setup (struct clgenfb_info *info, - clgen_board_t *btype) +static struct cirrusfb_info *cirrusfb_zorro_setup () { + struct cirrusfb_info *cinfo; + struct fb_info *info; + cirrusfb_board_t btype; struct zorro_dev *z = NULL, *z2 = NULL; unsigned long board_addr, board_size, size; - assert (info != NULL); - assert (btype != NULL); + if (cirrusfb_zorro_find (&z, &z2, &btype, &size)) + return NULL; - if (clgen_zorro_find (&z, &z2, btype, &size)) - return -1; + info = framebuffer_alloc(sizeof(struct cirrusfb_info), &z->dev); + if (!info) { + printk (KERN_ERR "cirrusfb: could not allocate memory\n"); + return NULL; + } + + cinfo = info->par; + cinfo->info = info; + cinfo->btype = btype; assert (z > 0); assert (z2 >= 0); - assert (*btype != BT_NONE); + assert (btype != BT_NONE); - info->board_addr = board_addr = z->resource.start; - info->board_size = board_size = z->resource.end-z->resource.start+1; - info->size = size; + cinfo->board_addr = board_addr = z->resource.start; + cinfo->board_size = board_size = z->resource.end-z->resource.start+1; + cinfo->size = size; - if (!request_mem_region(board_addr, board_size, "clgenfb")) { - printk(KERN_ERR "clgen: cannot reserve region 0x%lx, abort\n", + if (!request_mem_region(board_addr, board_size, "cirrusfb")) { + printk(KERN_ERR "cirrusfb: cannot reserve region 0x%lx, abort\n", board_addr); return -1; } printk (" RAM (%lu MB) at $%lx, ", board_size / MB_, board_addr); - if (*btype == BT_PICASSO4) { + if (btype == BT_PICASSO4) { printk (" REG at $%lx\n", board_addr + 0x600000); /* To be precise, for the P4 this is not the */ /* begin of the board, but the begin of RAM. */ /* for P4, map in its address space in 2 chunks (### TEST! ) */ /* (note the ugly hardcoded 16M number) */ - info->regs = ioremap (board_addr, 16777216); - DPRINTK ("clgen: Virtual address for board set to: $%p\n", info->regs); - info->regs += 0x600000; - info->fbregs_phys = board_addr + 0x600000; + cinfo->regbase = ioremap (board_addr, 16777216); + DPRINTK ("cirrusfb: Virtual address for board set to: $%p\n", cinfo->regbase); + cinfo->regbase += 0x600000; + cinfo->fbregs_phys = board_addr + 0x600000; - info->fbmem_phys = board_addr + 16777216; - info->fbmem = ioremap (info->fbmem_phys, 16777216); + cinfo->fbmem_phys = board_addr + 16777216; + cinfo->fbmem = ioremap (info->fbmem_phys, 16777216); } else { printk (" REG at $%lx\n", (unsigned long) z2->resource.start); - info->fbmem_phys = board_addr; + cinfo->fbmem_phys = board_addr; if (board_addr > 0x01000000) - info->fbmem = ioremap (board_addr, board_size); + cinfo->fbmem = ioremap (board_addr, board_size); else - info->fbmem = (caddr_t) ZTWO_VADDR (board_addr); + cinfo->fbmem = (caddr_t) ZTWO_VADDR (board_addr); /* set address for REG area of board */ - info->regs = (caddr_t) ZTWO_VADDR (z2->resource.start); - info->fbregs_phys = z2->resource.start; + cinfo->regbase = (caddr_t) ZTWO_VADDR (z2->resource.start); + cinfo->fbregs_phys = z2->resource.start; - DPRINTK ("clgen: Virtual address for board set to: $%p\n", info->regs); + DPRINTK ("cirrusfb: Virtual address for board set to: $%p\n", cinfo->regbase); } printk (KERN_INFO "Cirrus Logic chipset on Zorro bus\n"); @@ -2711,148 +2357,177 @@ static int __init clgen_zorro_setup (struct clgenfb_info *info, } #endif /* CONFIG_ZORRO */ - - -/********************************************************************/ -/* clgenfb_init() - master initialization function */ -/********************************************************************/ -int __init clgenfb_init(void) +static int cirrusfb_set_fbinfo(struct cirrusfb_info *cinfo) { - int err, j, k; - - clgen_board_t btype = BT_NONE; - struct clgenfb_info *fb_info = NULL; - - DPRINTK ("ENTER\n"); - - printk (KERN_INFO "clgen: Driver for Cirrus Logic based graphic boards, v" CLGEN_VERSION "\n"); - - fb_info = &boards[0]; /* FIXME support multiple boards ... */ - -#ifdef CONFIG_PCI - if (clgen_pci_setup (fb_info, &btype)) { /* Also does OF setup */ - DPRINTK ("EXIT, returning -ENXIO\n"); - return -ENXIO; + struct fb_info *info = cinfo->info; + struct fb_var_screeninfo *var = &info->var; + + info->currcon = -1; + info->par = cinfo; + info->pseudo_palette = cinfo->pseudo_palette; + info->flags = FBINFO_DEFAULT + | FBINFO_HWACCEL_XPAN + | FBINFO_HWACCEL_YPAN + | FBINFO_HWACCEL_FILLRECT + | FBINFO_HWACCEL_COPYAREA; + if (noaccel) + info->flags |= FBINFO_HWACCEL_DISABLED; + info->fbops = &cirrusfb_ops; + info->screen_base = cinfo->fbmem; + if (cinfo->btype == BT_GD5480) { + if (var->bits_per_pixel == 16) + info->screen_base += 1 * MB_; + if (var->bits_per_pixel == 24 || var->bits_per_pixel == 32) + info->screen_base += 2 * MB_; } -#elif defined(CONFIG_ZORRO) - /* FIXME: CONFIG_PCI and CONFIG_ZORRO may both be defined */ - if (clgen_zorro_setup (fb_info, &btype)) { - DPRINTK ("EXIT, returning -ENXIO\n"); - return -ENXIO; - } + /* Fill fix common fields */ + strlcpy(info->fix.id, cirrusfb_board_info[cinfo->btype].name, + sizeof(info->fix.id)); -#else -#error This driver requires Zorro or PCI bus. -#endif /* !CONFIG_PCI, !CONFIG_ZORRO */ + /* monochrome: only 1 memory plane */ + /* 8 bit and above: Use whole memory area */ + info->fix.smem_start = cinfo->fbmem_phys; + info->fix.smem_len = (var->bits_per_pixel == 1) ? cinfo->size / 4 : cinfo->size; + info->fix.type = cinfo->currentmode.type; + info->fix.type_aux = 0; + info->fix.visual = cinfo->currentmode.visual; + info->fix.xpanstep = 1; + info->fix.ypanstep = 1; + info->fix.ywrapstep = 0; + info->fix.line_length = cinfo->currentmode.line_length; - /* sanity checks */ - assert (btype != BT_NONE); - assert (btype == clgen_board_info[btype].btype); + /* FIXME: map region at 0xB8000 if available, fill in here */ + info->fix.mmio_start = cinfo->fbregs_phys; + info->fix.mmio_len = 0; + info->fix.accel = FB_ACCEL_NONE; - fb_info->btype = btype; + fb_alloc_cmap(&info->cmap, 256, 0); - DPRINTK ("clgen: (RAM start set to: 0x%p)\n", fb_info->fbmem); + return 0; +} - if (noaccel) - { - printk("clgen: disabling text acceleration support\n"); -#ifdef FBCON_HAS_CFB8 - fbcon_clgen_8.bmove = fbcon_cfb8_bmove; - fbcon_clgen_8.clear = fbcon_cfb8_clear; -#endif -#ifdef FBCON_HAS_CFB16 - fbcon_clgen_16.bmove = fbcon_cfb16_bmove; - fbcon_clgen_16.clear = fbcon_cfb16_clear; -#endif -#ifdef FBCON_HAS_CFB32 - fbcon_clgen_32.bmove = fbcon_cfb32_bmove; - fbcon_clgen_32.clear = fbcon_cfb32_clear; +#if defined(CONFIG_PCI) +#define cirrusfb_unmap cirrusfb_pci_unmap +#define cirrusfb_bus_setup cirrusfb_pci_setup +#elif defined(CONFIG_ZORRO) +#define cirrusfb_unmap cirrusfb_zorro_unmap +#define cirrusfb_bus_setup cirrusfb_zorro_setup #endif - } - init_vgachip (fb_info); - /* set up a few more things, register framebuffer driver etc */ - fb_info->gen.parsize = sizeof (struct clgenfb_par); - fb_info->gen.fbhw = &clgen_hwswitch; +static int cirrusfb_pci_register (struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + struct fb_info *info; + struct cirrusfb_info *cinfo = NULL; + int err; + cirrusfb_board_t btype; - strlcpy (fb_info->gen.info.modename, clgen_board_info[btype].name, - sizeof (fb_info->gen.info.modename)); + DPRINTK ("ENTER\n"); - fb_info->gen.info.fbops = &clgenfb_ops; - fb_info->gen.info.disp = &disp; - fb_info->gen.info.currcon = -1; - fb_info->gen.info.changevar = NULL; - fb_info->gen.info.switch_con = &fbgen_switch; - fb_info->gen.info.updatevar = &fbgen_update_var; - fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT; + printk (KERN_INFO "cirrusfb: Driver for Cirrus Logic based graphic boards, v" CIRRUSFB_VERSION "\n"); - for (j = 0; j < 256; j++) { - if (j < 16) { - k = color_table[j]; - fb_info->palette[j].red = default_red[k]; - fb_info->palette[j].green = default_grn[k]; - fb_info->palette[j].blue = default_blu[k]; - } else { - fb_info->palette[j].red = - fb_info->palette[j].green = - fb_info->palette[j].blue = j; - } - } + cinfo = cirrusfb_bus_setup(pdev, ent); - /* now that we know the board has been registered n' stuff, we */ - /* can finally initialize it to a default mode */ - clgenfb_default = clgenfb_predefined[clgen_def_mode].var; - clgenfb_default.activate = FB_ACTIVATE_NOW; - clgenfb_default.yres_virtual = 480 * 3; /* for fast scrolling (YPAN-Mode) */ - err = fbgen_do_set_var (&clgenfb_default, 1, &fb_info->gen); + if (!cinfo) + return -ENODEV; - if (err) { - DPRINTK ("EXIT, returning -EINVAL\n"); + info = cinfo->info; + btype = cinfo->btype; + + /* sanity checks */ + assert (btype != BT_NONE); + assert (btype == cirrusfb_board_info[btype].btype); + + DPRINTK ("cirrusfb: (RAM start set to: 0x%p)\n", cinfo->fbmem); + + /* Make pretend we've set the var so our structures are in a "good" */ + /* state, even though we haven't written the mode to the hw yet... */ + info->var = cirrusfb_predefined[cirrusfb_def_mode].var; + info->var.activate = FB_ACTIVATE_NOW; + err = cirrusfb_decode_var(&info->var, &cinfo->currentmode, info); + if(err) { + /* should never happen */ + DPRINTK("choking on default var... umm, no good.\n"); + cirrusfb_unmap (cinfo); + framebuffer_release (info); return -EINVAL; } - disp.var = clgenfb_default; - fbgen_set_disp (-1, &fb_info->gen); - do_install_cmap (0, &fb_info->gen.info); + /* set all the vital stuff */ + cirrusfb_set_fbinfo(cinfo); - err = register_framebuffer (&fb_info->gen.info); - if (err) { - printk (KERN_ERR "clgen: ERROR - could not register fb device; err = %d!\n", err); - DPRINTK ("EXIT, returning -EINVAL\n"); + pci_set_drvdata(pdev, info); + + if ((err = register_framebuffer (info)) < 0) { + printk (KERN_ERR "cirrusfb: could not register fb device; err = %d!\n", err); + fb_dealloc_cmap(&info->cmap); + cirrusfb_unmap (cinfo); + framebuffer_release (info); return -EINVAL; } + DPRINTK ("EXIT, returning 0\n"); return 0; } - - /* - * Cleanup (only needed for module) - */ -static void __exit clgenfb_cleanup (struct clgenfb_info *info) +static void __devexit cirrusfb_cleanup (struct fb_info *info) { + struct cirrusfb_info *cinfo = info->par; DPRINTK ("ENTER\n"); #ifdef CONFIG_ZORRO - switch_monitor (info, 0); - - clgen_zorro_unmap (info); -#else - clgen_pci_unmap (info); -#endif /* CONFIG_ZORRO */ + switch_monitor (cinfo, 0); +#endif - unregister_framebuffer ((struct fb_info *) info); + cirrusfb_unmap (cinfo); + fb_dealloc_cmap (&info->cmap); + unregister_framebuffer (info); printk ("Framebuffer unregistered\n"); + framebuffer_release (info); + + DPRINTK ("EXIT\n"); +} + + +void __devexit cirrusfb_pci_unregister (struct pci_dev *pdev) +{ + struct fb_info *info = pci_get_drvdata(pdev); + DPRINTK ("ENTER\n"); + + cirrusfb_cleanup (info); DPRINTK ("EXIT\n"); } +static struct pci_driver cirrusfb_driver = { + .name = "cirrusfb", + .id_table = cirrusfb_pci_table, + .probe = cirrusfb_pci_register, + .remove = __devexit_p(cirrusfb_pci_unregister), +#ifdef CONFIG_PM +#if 0 + .suspend = cirrusfb_pci_suspend, + .resume = cirrusfb_pci_resume, +#endif +#endif +}; + +int __init cirrusfb_init(void) +{ +#ifdef CONFIG_ZORRO + return cirrusfb_pci_register(NULL, NULL); +#else + return pci_module_init(&cirrusfb_driver); +#endif +} + + #ifndef MODULE -int __init clgenfb_setup(char *options) { +int __init cirrusfb_setup(char *options) { char *this_opt, s[32]; int i; @@ -2864,12 +2539,12 @@ int __init clgenfb_setup(char *options) { while ((this_opt = strsep (&options, ",")) != NULL) { if (!*this_opt) continue; - DPRINTK("clgenfb_setup: option '%s'\n", this_opt); + DPRINTK("cirrusfb_setup: option '%s'\n", this_opt); for (i = 0; i < NUM_TOTAL_MODES; i++) { - sprintf (s, "mode:%s", clgenfb_predefined[i].name); + sprintf (s, "mode:%s", cirrusfb_predefined[i].name); if (strcmp (this_opt, s) == 0) - clgen_def_mode = i; + cirrusfb_def_mode = i; } if (!strcmp(this_opt, "noaccel")) noaccel = 1; @@ -2887,19 +2562,15 @@ MODULE_AUTHOR("Copyright 1999,2000 Jeff Garzik <jgarzik@pobox.com>"); MODULE_DESCRIPTION("Accelerated FBDev driver for Cirrus Logic chips"); MODULE_LICENSE("GPL"); -static void __exit clgenfb_exit (void) +void __exit cirrusfb_exit (void) { - DPRINTK ("ENTER\n"); - - clgenfb_cleanup (&boards[0]); /* FIXME: support multiple boards */ - - DPRINTK ("EXIT\n"); + pci_unregister_driver (&cirrusfb_driver); } #ifdef MODULE -module_init(clgenfb_init); +module_init(cirrusfb_init); +module_exit(cirrusfb_exit); #endif -module_exit(clgenfb_exit); /**********************************************************************/ @@ -2910,55 +2581,55 @@ module_exit(clgenfb_exit); /**********************************************************************/ /*** WGen() - write into one of the external/general registers ***/ -static void WGen (const struct clgenfb_info *fb_info, +static void WGen (const struct cirrusfb_info *cinfo, int regnum, unsigned char val) { unsigned long regofs = 0; - if (fb_info->btype == BT_PICASSO) { + if (cinfo->btype == BT_PICASSO) { /* Picasso II specific hack */ /* if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D || regnum == CL_VSSM2) */ if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D) regofs = 0xfff; } - vga_w (fb_info->regs, regofs + regnum, val); + vga_w (cinfo->regbase, regofs + regnum, val); } /*** RGen() - read out one of the external/general registers ***/ -static unsigned char RGen (const struct clgenfb_info *fb_info, int regnum) +static unsigned char RGen (const struct cirrusfb_info *cinfo, int regnum) { unsigned long regofs = 0; - if (fb_info->btype == BT_PICASSO) { + if (cinfo->btype == BT_PICASSO) { /* Picasso II specific hack */ /* if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D || regnum == CL_VSSM2) */ if (regnum == VGA_PEL_IR || regnum == VGA_PEL_D) regofs = 0xfff; } - return vga_r (fb_info->regs, regofs + regnum); + return vga_r (cinfo->regbase, regofs + regnum); } /*** AttrOn() - turn on VideoEnable for Attribute controller ***/ -static void AttrOn (const struct clgenfb_info *fb_info) +static void AttrOn (const struct cirrusfb_info *cinfo) { - assert (fb_info != NULL); + assert (cinfo != NULL); DPRINTK ("ENTER\n"); - if (vga_rcrt (fb_info->regs, CL_CRT24) & 0x80) { + if (vga_rcrt (cinfo->regbase, CL_CRT24) & 0x80) { /* if we're just in "write value" mode, write back the */ /* same value as before to not modify anything */ - vga_w (fb_info->regs, VGA_ATT_IW, - vga_r (fb_info->regs, VGA_ATT_R)); + vga_w (cinfo->regbase, VGA_ATT_IW, + vga_r (cinfo->regbase, VGA_ATT_R)); } /* turn on video bit */ -/* vga_w (fb_info->regs, VGA_ATT_IW, 0x20); */ - vga_w (fb_info->regs, VGA_ATT_IW, 0x33); +/* vga_w (cinfo->regbase, VGA_ATT_IW, 0x20); */ + vga_w (cinfo->regbase, VGA_ATT_IW, 0x33); /* dummy write on Reg0 to be on "write index" mode next time */ - vga_w (fb_info->regs, VGA_ATT_IW, 0x00); + vga_w (cinfo->regbase, VGA_ATT_IW, 0x00); DPRINTK ("EXIT\n"); } @@ -2969,127 +2640,127 @@ static void AttrOn (const struct clgenfb_info *fb_info) * registers of their functional group) here is a specialized routine for * accessing the HDR */ -static void WHDR (const struct clgenfb_info *fb_info, unsigned char val) +static void WHDR (const struct cirrusfb_info *cinfo, unsigned char val) { unsigned char dummy; - if (fb_info->btype == BT_PICASSO) { + if (cinfo->btype == BT_PICASSO) { /* Klaus' hint for correct access to HDR on some boards */ /* first write 0 to pixel mask (3c6) */ - WGen (fb_info, VGA_PEL_MSK, 0x00); + WGen (cinfo, VGA_PEL_MSK, 0x00); udelay (200); /* next read dummy from pixel address (3c8) */ - dummy = RGen (fb_info, VGA_PEL_IW); + dummy = RGen (cinfo, VGA_PEL_IW); udelay (200); } /* now do the usual stuff to access the HDR */ - dummy = RGen (fb_info, VGA_PEL_MSK); + dummy = RGen (cinfo, VGA_PEL_MSK); udelay (200); - dummy = RGen (fb_info, VGA_PEL_MSK); + dummy = RGen (cinfo, VGA_PEL_MSK); udelay (200); - dummy = RGen (fb_info, VGA_PEL_MSK); + dummy = RGen (cinfo, VGA_PEL_MSK); udelay (200); - dummy = RGen (fb_info, VGA_PEL_MSK); + dummy = RGen (cinfo, VGA_PEL_MSK); udelay (200); - WGen (fb_info, VGA_PEL_MSK, val); + WGen (cinfo, VGA_PEL_MSK, val); udelay (200); - if (fb_info->btype == BT_PICASSO) { + if (cinfo->btype == BT_PICASSO) { /* now first reset HDR access counter */ - dummy = RGen (fb_info, VGA_PEL_IW); + dummy = RGen (cinfo, VGA_PEL_IW); udelay (200); /* and at the end, restore the mask value */ /* ## is this mask always 0xff? */ - WGen (fb_info, VGA_PEL_MSK, 0xff); + WGen (cinfo, VGA_PEL_MSK, 0xff); udelay (200); } } /*** WSFR() - write to the "special function register" (SFR) ***/ -static void WSFR (struct clgenfb_info *fb_info, unsigned char val) +static void WSFR (struct cirrusfb_info *cinfo, unsigned char val) { #ifdef CONFIG_ZORRO - assert (fb_info->regs != NULL); - fb_info->SFR = val; - z_writeb (val, fb_info->regs + 0x8000); + assert (cinfo->regbase != NULL); + cinfo->SFR = val; + z_writeb (val, cinfo->regbase + 0x8000); #endif } /* The Picasso has a second register for switching the monitor bit */ -static void WSFR2 (struct clgenfb_info *fb_info, unsigned char val) +static void WSFR2 (struct cirrusfb_info *cinfo, unsigned char val) { #ifdef CONFIG_ZORRO /* writing an arbitrary value to this one causes the monitor switcher */ /* to flip to Amiga display */ - assert (fb_info->regs != NULL); - fb_info->SFR = val; - z_writeb (val, fb_info->regs + 0x9000); + assert (cinfo->regbase != NULL); + cinfo->SFR = val; + z_writeb (val, cinfo->regbase + 0x9000); #endif } /*** WClut - set CLUT entry (range: 0..63) ***/ -static void WClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char red, +static void WClut (struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char red, unsigned char green, unsigned char blue) { unsigned int data = VGA_PEL_D; /* address write mode register is not translated.. */ - vga_w (fb_info->regs, VGA_PEL_IW, regnum); + vga_w (cinfo->regbase, VGA_PEL_IW, regnum); - if (fb_info->btype == BT_PICASSO || fb_info->btype == BT_PICASSO4 || - fb_info->btype == BT_ALPINE || fb_info->btype == BT_GD5480) { + if (cinfo->btype == BT_PICASSO || cinfo->btype == BT_PICASSO4 || + cinfo->btype == BT_ALPINE || cinfo->btype == BT_GD5480) { /* but DAC data register IS, at least for Picasso II */ - if (fb_info->btype == BT_PICASSO) + if (cinfo->btype == BT_PICASSO) data += 0xfff; - vga_w (fb_info->regs, data, red); - vga_w (fb_info->regs, data, green); - vga_w (fb_info->regs, data, blue); + vga_w (cinfo->regbase, data, red); + vga_w (cinfo->regbase, data, green); + vga_w (cinfo->regbase, data, blue); } else { - vga_w (fb_info->regs, data, blue); - vga_w (fb_info->regs, data, green); - vga_w (fb_info->regs, data, red); + vga_w (cinfo->regbase, data, blue); + vga_w (cinfo->regbase, data, green); + vga_w (cinfo->regbase, data, red); } } #if 0 /*** RClut - read CLUT entry (range 0..63) ***/ -static void RClut (struct clgenfb_info *fb_info, unsigned char regnum, unsigned char *red, +static void RClut (struct cirrusfb_info *cinfo, unsigned char regnum, unsigned char *red, unsigned char *green, unsigned char *blue) { unsigned int data = VGA_PEL_D; - vga_w (fb_info->regs, VGA_PEL_IR, regnum); + vga_w (cinfo->regbase, VGA_PEL_IR, regnum); - if (fb_info->btype == BT_PICASSO || fb_info->btype == BT_PICASSO4 || - fb_info->btype == BT_ALPINE || fb_info->btype == BT_GD5480) { - if (fb_info->btype == BT_PICASSO) + if (cinfo->btype == BT_PICASSO || cinfo->btype == BT_PICASSO4 || + cinfo->btype == BT_ALPINE || cinfo->btype == BT_GD5480) { + if (cinfo->btype == BT_PICASSO) data += 0xfff; - *red = vga_r (fb_info->regs, data); - *green = vga_r (fb_info->regs, data); - *blue = vga_r (fb_info->regs, data); + *red = vga_r (cinfo->regbase, data); + *green = vga_r (cinfo->regbase, data); + *blue = vga_r (cinfo->regbase, data); } else { - *blue = vga_r (fb_info->regs, data); - *green = vga_r (fb_info->regs, data); - *red = vga_r (fb_info->regs, data); + *blue = vga_r (cinfo->regbase, data); + *green = vga_r (cinfo->regbase, data); + *red = vga_r (cinfo->regbase, data); } } #endif /******************************************************************* - clgen_WaitBLT() + cirrusfb_WaitBLT() Wait for the BitBLT engine to complete a possible earlier job *********************************************************************/ /* FIXME: use interrupts instead */ -static inline void clgen_WaitBLT (caddr_t regbase) +static void cirrusfb_WaitBLT (caddr_t regbase) { /* now busy-wait until we're done */ while (vga_rgfx (regbase, CL_GR31) & 0x08) @@ -3097,13 +2768,14 @@ static inline void clgen_WaitBLT (caddr_t regbase) } /******************************************************************* - clgen_BitBLT() + cirrusfb_BitBLT() perform accelerated "scrolling" ********************************************************************/ -static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury, u_short destx, u_short desty, - u_short width, u_short height, u_short line_length) +static void cirrusfb_BitBLT (caddr_t regbase, int bits_per_pixel, + u_short curx, u_short cury, u_short destx, u_short desty, + u_short width, u_short height, u_short line_length) { u_short nwidth, nheight; u_long nsrc, ndest; @@ -3134,8 +2806,6 @@ static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury, u_short d ndest = desty * line_length + destx + nheight * line_length + nwidth; } - clgen_WaitBLT(regbase); - /* run-down of registers to be programmed: destination pitch @@ -3149,6 +2819,8 @@ static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury, u_short d start/stop */ + cirrusfb_WaitBLT(regbase); + /* pitch: set to line_length */ vga_wgfx (regbase, CL_GR24, line_length & 0xff); /* dest pitch low */ vga_wgfx (regbase, CL_GR25, (line_length >> 8)); /* dest pitch hi */ @@ -3187,12 +2859,12 @@ static void clgen_BitBLT (caddr_t regbase, u_short curx, u_short cury, u_short d /******************************************************************* - clgen_RectFill() + cirrusfb_RectFill() perform accelerated rectangle fill ********************************************************************/ -static void clgen_RectFill (struct clgenfb_info *fb_info, +static void cirrusfb_RectFill (caddr_t regbase, int bits_per_pixel, u_short x, u_short y, u_short width, u_short height, u_char color, u_short line_length) { @@ -3207,61 +2879,61 @@ static void clgen_RectFill (struct clgenfb_info *fb_info, ndest = (y * line_length) + x; - clgen_WaitBLT(fb_info->regs); + cirrusfb_WaitBLT(regbase); /* pitch: set to line_length */ - vga_wgfx (fb_info->regs, CL_GR24, line_length & 0xff); /* dest pitch low */ - vga_wgfx (fb_info->regs, CL_GR25, (line_length >> 8)); /* dest pitch hi */ - vga_wgfx (fb_info->regs, CL_GR26, line_length & 0xff); /* source pitch low */ - vga_wgfx (fb_info->regs, CL_GR27, (line_length >> 8)); /* source pitch hi */ + vga_wgfx (regbase, CL_GR24, line_length & 0xff); /* dest pitch low */ + vga_wgfx (regbase, CL_GR25, (line_length >> 8)); /* dest pitch hi */ + vga_wgfx (regbase, CL_GR26, line_length & 0xff); /* source pitch low */ + vga_wgfx (regbase, CL_GR27, (line_length >> 8)); /* source pitch hi */ /* BLT width: actual number of pixels - 1 */ - vga_wgfx (fb_info->regs, CL_GR20, nwidth & 0xff); /* BLT width low */ - vga_wgfx (fb_info->regs, CL_GR21, (nwidth >> 8)); /* BLT width hi */ + vga_wgfx (regbase, CL_GR20, nwidth & 0xff); /* BLT width low */ + vga_wgfx (regbase, CL_GR21, (nwidth >> 8)); /* BLT width hi */ /* BLT height: actual number of lines -1 */ - vga_wgfx (fb_info->regs, CL_GR22, nheight & 0xff); /* BLT height low */ - vga_wgfx (fb_info->regs, CL_GR23, (nheight >> 8)); /* BLT width hi */ + vga_wgfx (regbase, CL_GR22, nheight & 0xff); /* BLT height low */ + vga_wgfx (regbase, CL_GR23, (nheight >> 8)); /* BLT width hi */ /* BLT destination */ - vga_wgfx (fb_info->regs, CL_GR28, (u_char) (ndest & 0xff)); /* BLT dest low */ - vga_wgfx (fb_info->regs, CL_GR29, (u_char) (ndest >> 8)); /* BLT dest mid */ - vga_wgfx (fb_info->regs, CL_GR2A, (u_char) (ndest >> 16)); /* BLT dest hi */ + vga_wgfx (regbase, CL_GR28, (u_char) (ndest & 0xff)); /* BLT dest low */ + vga_wgfx (regbase, CL_GR29, (u_char) (ndest >> 8)); /* BLT dest mid */ + vga_wgfx (regbase, CL_GR2A, (u_char) (ndest >> 16)); /* BLT dest hi */ /* BLT source: set to 0 (is a dummy here anyway) */ - vga_wgfx (fb_info->regs, CL_GR2C, 0x00); /* BLT src low */ - vga_wgfx (fb_info->regs, CL_GR2D, 0x00); /* BLT src mid */ - vga_wgfx (fb_info->regs, CL_GR2E, 0x00); /* BLT src hi */ + vga_wgfx (regbase, CL_GR2C, 0x00); /* BLT src low */ + vga_wgfx (regbase, CL_GR2D, 0x00); /* BLT src mid */ + vga_wgfx (regbase, CL_GR2E, 0x00); /* BLT src hi */ /* This is a ColorExpand Blt, using the */ /* same color for foreground and background */ - vga_wgfx (fb_info->regs, VGA_GFX_SR_VALUE, color); /* foreground color */ - vga_wgfx (fb_info->regs, VGA_GFX_SR_ENABLE, color); /* background color */ + vga_wgfx (regbase, VGA_GFX_SR_VALUE, color); /* foreground color */ + vga_wgfx (regbase, VGA_GFX_SR_ENABLE, color); /* background color */ op = 0xc0; - if (fb_info->currentmode.var.bits_per_pixel == 16) { - vga_wgfx (fb_info->regs, CL_GR10, color); /* foreground color */ - vga_wgfx (fb_info->regs, CL_GR11, color); /* background color */ + if (bits_per_pixel == 16) { + vga_wgfx (regbase, CL_GR10, color); /* foreground color */ + vga_wgfx (regbase, CL_GR11, color); /* background color */ op = 0x50; op = 0xd0; - } else if (fb_info->currentmode.var.bits_per_pixel == 32) { - vga_wgfx (fb_info->regs, CL_GR10, color); /* foreground color */ - vga_wgfx (fb_info->regs, CL_GR11, color); /* background color */ - vga_wgfx (fb_info->regs, CL_GR12, color); /* foreground color */ - vga_wgfx (fb_info->regs, CL_GR13, color); /* background color */ - vga_wgfx (fb_info->regs, CL_GR14, 0); /* foreground color */ - vga_wgfx (fb_info->regs, CL_GR15, 0); /* background color */ + } else if (bits_per_pixel == 32) { + vga_wgfx (regbase, CL_GR10, color); /* foreground color */ + vga_wgfx (regbase, CL_GR11, color); /* background color */ + vga_wgfx (regbase, CL_GR12, color); /* foreground color */ + vga_wgfx (regbase, CL_GR13, color); /* background color */ + vga_wgfx (regbase, CL_GR14, 0); /* foreground color */ + vga_wgfx (regbase, CL_GR15, 0); /* background color */ op = 0x50; op = 0xf0; } /* BLT mode: color expand, Enable 8x8 copy (faster?) */ - vga_wgfx (fb_info->regs, CL_GR30, op); /* BLT mode */ + vga_wgfx (regbase, CL_GR30, op); /* BLT mode */ /* BLT ROP: SrcCopy */ - vga_wgfx (fb_info->regs, CL_GR32, 0x0d); /* BLT ROP */ + vga_wgfx (regbase, CL_GR32, 0x0d); /* BLT ROP */ /* and finally: GO! */ - vga_wgfx (fb_info->regs, CL_GR31, 0x02); /* BLT Start/status */ + vga_wgfx (regbase, CL_GR31, 0x02); /* BLT Start/status */ DPRINTK ("EXIT\n"); } @@ -3349,10 +3021,10 @@ static void bestclock (long freq, long *best, long *nom, * ------------------------------------------------------------------------- */ -#ifdef CLGEN_DEBUG +#ifdef CIRRUSFB_DEBUG /** - * clgen_dbg_print_byte + * cirrusfb_dbg_print_byte * @name: name associated with byte value to be displayed * @val: byte value to be displayed * @@ -3363,7 +3035,7 @@ static void bestclock (long freq, long *best, long *nom, */ static -void clgen_dbg_print_byte (const char *name, unsigned char val) +void cirrusfb_dbg_print_byte (const char *name, unsigned char val) { DPRINTK ("%8s = 0x%02X (bits 7-0: %c%c%c%c%c%c%c%c)\n", name, val, @@ -3379,7 +3051,7 @@ void clgen_dbg_print_byte (const char *name, unsigned char val) /** - * clgen_dbg_print_regs + * cirrusfb_dbg_print_regs * @base: If using newmmio, the newmmio base address, otherwise %NULL * @reg_class: type of registers to read: %CRT, or %SEQ * @@ -3390,7 +3062,7 @@ void clgen_dbg_print_byte (const char *name, unsigned char val) */ static -void clgen_dbg_print_regs (caddr_t regbase, clgen_dbg_reg_class_t reg_class,...) +void cirrusfb_dbg_print_regs (caddr_t regbase, cirrusfb_dbg_reg_class_t reg_class,...) { va_list list; unsigned char val = 0; @@ -3416,7 +3088,7 @@ void clgen_dbg_print_regs (caddr_t regbase, clgen_dbg_reg_class_t reg_class,...) break; } - clgen_dbg_print_byte (name, val); + cirrusfb_dbg_print_byte (name, val); name = va_arg (list, char *); } @@ -3426,35 +3098,35 @@ void clgen_dbg_print_regs (caddr_t regbase, clgen_dbg_reg_class_t reg_class,...) /** - * clgen_dump - * @clgeninfo: + * cirrusfb_dump + * @cirrusfbinfo: * * DESCRIPTION: */ static -void clgen_dump (void) +void cirrusfb_dump (void) { - clgen_dbg_reg_dump (NULL); + cirrusfb_dbg_reg_dump (NULL); } /** - * clgen_dbg_reg_dump + * cirrusfb_dbg_reg_dump * @base: If using newmmio, the newmmio base address, otherwise %NULL * * DESCRIPTION: - * Dumps a list of interesting VGA and CLGEN registers. If @base is %NULL, + * Dumps a list of interesting VGA and CIRRUSFB registers. If @base is %NULL, * old-style I/O ports are queried for information, otherwise MMIO is * used at the given @base address to query the information. */ static -void clgen_dbg_reg_dump (caddr_t regbase) +void cirrusfb_dbg_reg_dump (caddr_t regbase) { - DPRINTK ("CLGEN VGA CRTC register dump:\n"); + DPRINTK ("CIRRUSFB VGA CRTC register dump:\n"); - clgen_dbg_print_regs (regbase, CRT, + cirrusfb_dbg_print_regs (regbase, CRT, "CR00", 0x00, "CR01", 0x01, "CR02", 0x02, @@ -3506,9 +3178,9 @@ void clgen_dbg_reg_dump (caddr_t regbase) DPRINTK ("\n"); - DPRINTK ("CLGEN VGA SEQ register dump:\n"); + DPRINTK ("CIRRUSFB VGA SEQ register dump:\n"); - clgen_dbg_print_regs (regbase, SEQ, + cirrusfb_dbg_print_regs (regbase, SEQ, "SR00", 0x00, "SR01", 0x01, "SR02", 0x02, @@ -3540,5 +3212,5 @@ void clgen_dbg_reg_dump (caddr_t regbase) DPRINTK ("\n"); } -#endif /* CLGEN_DEBUG */ +#endif /* CIRRUSFB_DEBUG */ diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index e928f4ed6ae4..58a9b8a8b722 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c @@ -118,6 +118,9 @@ static int fbcon_is_default = 1; /* font data */ static char fontname[40]; +/* current fb_info */ +static int info_idx = -1; + #define REFCOUNT(fd) (((int *)(fd))[-1]) #define FNTSIZE(fd) (((int *)(fd))[-2]) #define FNTCHARCNT(fd) (((int *)(fd))[-3]) @@ -165,6 +168,8 @@ static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch); static int fbcon_font_op(struct vc_data *vc, struct console_font_op *op); static int fbcon_set_palette(struct vc_data *vc, unsigned char *table); static int fbcon_scrolldelta(struct vc_data *vc, int lines); +void accel_clear_margins(struct vc_data *vc, struct fb_info *info, + int bottom_only); /* @@ -177,6 +182,7 @@ static __inline__ void ypan_up(struct vc_data *vc, int count); static __inline__ void ypan_down(struct vc_data *vc, int count); static void fbcon_bmove_rec(struct vc_data *vc, struct display *p, int sy, int sx, int dy, int dx, int height, int width, u_int y_break); +static void fbcon_set_disp(struct fb_info *info, struct vc_data *vc); #ifdef CONFIG_MAC /* @@ -194,9 +200,14 @@ static irqreturn_t fb_vbl_detect(int irq, void *dummy, struct pt_regs *fp) static void fb_flashcursor(void *private) { struct fb_info *info = (struct fb_info *) private; + struct vc_data *vc = NULL; + + if (info->currcon != -1) + vc = vc_cons[info->currcon].d; - if (!info || info->state != FBINFO_STATE_RUNNING || - info->cursor.rop == ROP_COPY) + if (info->state != FBINFO_STATE_RUNNING || + info->cursor.rop == ROP_COPY || !vc || !CON_IS_VISIBLE(vc) + || registered_fb[(int) con2fb_map[vc->vc_num]] != info) return; acquire_console_sem(); info->cursor.enable ^= 1; @@ -218,17 +229,12 @@ static irqreturn_t fb_vbl_handler(int irq, void *dev_id, struct pt_regs *fp) } #endif -static void cursor_timer_handler(unsigned long dev_addr); - -static struct timer_list cursor_timer = - TIMER_INITIALIZER(cursor_timer_handler, 0, 0); - static void cursor_timer_handler(unsigned long dev_addr) { struct fb_info *info = (struct fb_info *) dev_addr; - schedule_work(&info->queue); - mod_timer(&cursor_timer, jiffies + HZ/5); + schedule_work(&info->queue); + mod_timer(&info->cursor_timer, jiffies + HZ/5); } int __init fb_console_setup(char *this_opt) @@ -285,6 +291,28 @@ int __init fb_console_setup(char *this_opt) __setup("fbcon=", fb_console_setup); +static int search_fb_in_map(int idx) +{ + int i; + + for (i = 0; i < MAX_NR_CONSOLES; i++) { + if (con2fb_map[i] == idx) + return 1; + } + return 0; +} + +static int search_for_mapped_con(void) +{ + int i; + + for (i = 0; i < MAX_NR_CONSOLES; i++) { + if (con2fb_map[i] != -1) + return 1; + } + return 0; +} + /** * set_con2fb_map - map console to frame buffer device * @unit: virtual console number to map @@ -296,12 +324,74 @@ __setup("fbcon=", fb_console_setup); int set_con2fb_map(int unit, int newidx) { struct vc_data *vc = vc_cons[unit].d; + int oldidx = con2fb_map[unit]; + struct fb_info *info = registered_fb[newidx]; + struct fb_info *oldinfo = registered_fb[oldidx]; + int found; + + if (!search_for_mapped_con()) { + info_idx = newidx; + fb_console_init(); + return 0; + } + if (oldidx == newidx) + return 0; if (!vc) - return -ENODEV; + return -ENODEV; + found = search_fb_in_map(newidx); + + acquire_console_sem(); con2fb_map[unit] = newidx; - fbcon_is_default = (vc->vc_sw == &fb_con) ? 1 : 0; - return take_over_console(&fb_con, unit, unit, fbcon_is_default); + if (!found) { + if (!try_module_get(info->fbops->owner)) { + release_console_sem(); + return -ENODEV; + } + if (info->fbops->fb_open && info->fbops->fb_open(info, 0)) { + module_put(info->fbops->owner); + release_console_sem(); + return -ENODEV; + } + } + + /* + * If old fb is not mapped to any of the consoles, + * fbcon should release it. + */ + if (oldinfo && !search_fb_in_map(oldidx)) { + int err; + + if (info->queue.func == fb_flashcursor) + del_timer_sync(&oldinfo->cursor_timer); + if (oldinfo->fbops->fb_release) { + err = oldinfo->fbops->fb_release(oldinfo, 0); + if (err) { + con2fb_map[unit] = oldidx; + release_console_sem(); + return err; + } + } + module_put(oldinfo->fbops->owner); + } + info->currcon = -1; + if (!found) { + if (!info->queue.func || info->queue.func == fb_flashcursor) { + if (!info->queue.func) + INIT_WORK(&info->queue, fb_flashcursor, info); + + init_timer(&info->cursor_timer); + info->cursor_timer.function = cursor_timer_handler; + info->cursor_timer.expires = jiffies + HZ / 5; + info->cursor_timer.data = (unsigned long ) info; + add_timer(&info->cursor_timer); + } + } + if (info->fbops->fb_set_par) + info->fbops->fb_set_par(info); + fbcon_set_disp(info, vc); + release_console_sem(); + return 0; } /* @@ -443,9 +533,8 @@ static const char *fbcon_startup(void) struct vc_data *vc = vc_cons[fg_console].d; struct font_desc *font = NULL; struct module *owner; - struct fb_info *info; - static int done = 0; - int cols, rows; + struct fb_info *info = NULL; + int rows, cols; int irqres; irqres = 1; @@ -453,20 +542,24 @@ static const char *fbcon_startup(void) * If num_registered_fb is zero, this is a call for the dummy part. * The frame buffer devices weren't initialized yet. */ - if (!num_registered_fb || done) + if (!num_registered_fb || info_idx == -1) return display_desc; - done = 1; - - info = registered_fb[0]; - if (!info) return NULL; + /* + * Instead of blindly using registered_fb[0], we use info_idx, set by + * fb_console_init(); + */ + info = registered_fb[info_idx]; + if (!info) + return NULL; info->currcon = -1; owner = info->fbops->owner; if (!try_module_get(owner)) return NULL; - if (info->fbops->fb_open && info->fbops->fb_open(info, 0)) + if (info->fbops->fb_open && info->fbops->fb_open(info, 0)) { module_put(owner); - + return NULL; + } if (info->fix.type != FB_TYPE_TEXT) { if (fbcon_softback_size) { if (!softback_buf) { @@ -503,15 +596,8 @@ static const char *fbcon_startup(void) vc->vc_font.charcount = 256; /* FIXME Need to support more fonts */ } - /* - * We must always set the mode. The mode of the previous console - * driver could be in the same resolution but we are using different - * hardware so we have to initialize the hardware. - */ - if (info->fbops->fb_set_par) - info->fbops->fb_set_par(info); - cols = info->var.xres/vc->vc_font.width; - rows = info->var.yres/vc->vc_font.height; + cols = info->var.xres / vc->vc_font.width; + rows = info->var.yres / vc->vc_font.height; vc_resize(vc->vc_num, cols, rows); DPRINTK("mode: %s\n", info->fix.id); @@ -585,10 +671,12 @@ static const char *fbcon_startup(void) * default timer to flash the cursor. */ if (!info->queue.func) { INIT_WORK(&info->queue, fb_flashcursor, info); - - cursor_timer.expires = jiffies + HZ / 5; - cursor_timer.data = (unsigned long ) info; - add_timer(&cursor_timer); + + init_timer(&info->cursor_timer); + info->cursor_timer.function = cursor_timer_handler; + info->cursor_timer.expires = jiffies + HZ / 5; + info->cursor_timer.data = (unsigned long ) info; + add_timer(&info->cursor_timer); } return display_desc; } @@ -599,10 +687,12 @@ static void fbcon_init(struct vc_data *vc, int init) struct vc_data **default_mode = vc->vc_display_fg; struct display *t, *p = &fb_display[vc->vc_num]; int display_fg = (*default_mode)->vc_num; - int logo = 1, rows, cols, charcnt = 256; + int logo = 1, new_rows, new_cols, rows, cols, charcnt = 256; unsigned short *save = NULL, *r, *q; int cap = info->flags; + if (info_idx == -1 || info == NULL) + return; if (vc->vc_num != display_fg || (info->flags & FBINFO_MODULE) || (info->fix.type == FB_TYPE_TEXT)) logo = 0; @@ -612,16 +702,17 @@ static void fbcon_init(struct vc_data *vc, int init) /* If we are not the first console on this fb, copy the font from that console */ t = &fb_display[display_fg]; - vc->vc_font.width = (*default_mode)->vc_font.width; - vc->vc_font.height = (*default_mode)->vc_font.height; - vc->vc_font.data = p->fontdata = t->fontdata; - p->userfont = t->userfont; - if (p->userfont) { - REFCOUNT(p->fontdata)++; - charcnt = FNTCHARCNT(p->fontdata); + if (!vc->vc_font.data) { + vc->vc_font.data = p->fontdata = t->fontdata; + vc->vc_font.width = (*default_mode)->vc_font.width; + vc->vc_font.height = (*default_mode)->vc_font.height; + p->userfont = t->userfont; + if (p->userfont) + REFCOUNT(p->fontdata)++; + con_copy_unimap(vc->vc_num, display_fg); } - con_copy_unimap(vc->vc_num, display_fg); - + if (p->userfont) + charcnt = FNTCHARCNT(p->fontdata); vc->vc_can_do_color = info->var.bits_per_pixel != 1; vc->vc_complement_mask = vc->vc_can_do_color ? 0x7700 : 0x0800; if (charcnt == 256) { @@ -631,12 +722,24 @@ static void fbcon_init(struct vc_data *vc, int init) if (vc->vc_can_do_color) vc->vc_complement_mask <<= 1; } + cols = vc->vc_cols; + rows = vc->vc_rows; + new_cols = info->var.xres / vc->vc_font.width; + new_rows = info->var.yres / vc->vc_font.height; + vc_resize(vc->vc_num, new_cols, new_rows); + /* + * We must always set the mode. The mode of the previous console + * driver could be in the same resolution but we are using different + * hardware so we have to initialize the hardware. + * + * We need to do it in fbcon_init() to prevent screen corruption. + */ + if (CON_IS_VISIBLE(vc) && info->fbops->fb_set_par) + info->fbops->fb_set_par(info); - cols = info->var.xres / vc->vc_font.width; - rows = info->var.yres / vc->vc_font.height; - vc_resize(vc->vc_num, cols, rows); - if ((cap & FBINFO_HWACCEL_COPYAREA) && !(cap & FBINFO_HWACCEL_DISABLED)) + if ((cap & FBINFO_HWACCEL_COPYAREA) && + !(cap & FBINFO_HWACCEL_DISABLED)) p->scrollmode = SCROLL_ACCEL; else /* default to something safe */ p->scrollmode = SCROLL_REDRAW; @@ -646,9 +749,9 @@ static void fbcon_init(struct vc_data *vc, int init) * vc_{cols,rows}, but we must not set those if we are only * resizing the console. */ - if (init) { - vc->vc_cols = cols; - vc->vc_rows = rows; + if (!init) { + vc->vc_cols = new_cols; + vc->vc_rows = new_rows; } if (logo) { @@ -665,14 +768,15 @@ static void fbcon_init(struct vc_data *vc, int init) for (r = q - logo_lines * cols; r < q; r++) if (scr_readw(r) != vc->vc_video_erase_char) break; - if (r != q && rows >= rows + logo_lines) { - save = kmalloc(logo_lines * cols * 2, GFP_KERNEL); + if (r != q && new_rows >= rows + logo_lines) { + save = kmalloc(logo_lines * new_cols * 2, GFP_KERNEL); if (save) { + int i = cols < new_cols ? cols : new_cols; scr_memsetw(save, vc->vc_video_erase_char, - logo_lines * cols * 2); + logo_lines * new_cols * 2); r = q - step; - for (cnt = 0; cnt < logo_lines; cnt++, r += cols) - scr_memcpyw(save + cnt * cols, r, 2 * cols); + for (cnt = 0; cnt < logo_lines; cnt++, r += i) + scr_memcpyw(save + cnt * new_cols, r, 2 * i); r = q; } } @@ -688,19 +792,19 @@ static void fbcon_init(struct vc_data *vc, int init) vc->vc_pos += logo_lines * vc->vc_size_row; } } - scr_memsetw((unsigned short *) vc->vc_origin, - vc->vc_video_erase_char, - vc->vc_size_row * logo_lines); - if (CON_IS_VISIBLE(vc) && vt_cons[vc->vc_num]->vc_mode == KD_TEXT) { accel_clear_margins(vc, info, 0); update_screen(vc->vc_num); } + scr_memsetw((unsigned short *) vc->vc_origin, + vc->vc_video_erase_char, + vc->vc_size_row * logo_lines); + if (save) { q = (unsigned short *) (vc->vc_origin + vc->vc_size_row * rows); - scr_memcpyw(q, save, logo_lines * cols * 2); + scr_memcpyw(q, save, logo_lines * new_cols * 2); vc->vc_y += logo_lines; vc->vc_pos += logo_lines * vc->vc_size_row; kfree(save); @@ -731,6 +835,8 @@ static void fbcon_deinit(struct vc_data *vc) { struct display *p = &fb_display[vc->vc_num]; + if (info_idx != -1) + return; fbcon_free_font(p); } @@ -925,7 +1031,8 @@ static void fbcon_cursor(struct vc_data *vc, int mode) cursor.set |= FB_CUR_SETHOT; } - if ((cursor.set & FB_CUR_SETSIZE) || ((vc->vc_cursor_type & 0x0f) != p->cursor_shape)) { + if ((cursor.set & FB_CUR_SETSIZE) || ((vc->vc_cursor_type & 0x0f) != p->cursor_shape) + || info->cursor.mask == NULL) { char *mask = kmalloc(w*vc->vc_font.height, GFP_ATOMIC); int cur_height, size, i = 0; @@ -984,6 +1091,57 @@ int update_var(int con, struct fb_info *info) return 0; } +static void fbcon_set_disp(struct fb_info *info, struct vc_data *vc) +{ + struct display *p = &fb_display[vc->vc_num], *t; + struct vc_data **default_mode = vc->vc_display_fg; + int display_fg = (*default_mode)->vc_num; + int rows, cols, charcnt = 256; + + info->var.xoffset = info->var.yoffset = p->yscroll = 0; + t = &fb_display[display_fg]; + if (!vc->vc_font.data) { + vc->vc_font.data = p->fontdata = t->fontdata; + vc->vc_font.width = (*default_mode)->vc_font.width; + vc->vc_font.height = (*default_mode)->vc_font.height; + p->userfont = t->userfont; + if (p->userfont) + REFCOUNT(p->fontdata)++; + con_copy_unimap(vc->vc_num, display_fg); + } + if (p->userfont) + charcnt = FNTCHARCNT(p->fontdata); + + vc->vc_can_do_color = info->var.bits_per_pixel != 1; + vc->vc_complement_mask = vc->vc_can_do_color ? 0x7700 : 0x0800; + if (charcnt == 256) { + vc->vc_hi_font_mask = 0; + } else { + vc->vc_hi_font_mask = 0x100; + if (vc->vc_can_do_color) + vc->vc_complement_mask <<= 1; + } + cols = info->var.xres / vc->vc_font.width; + rows = info->var.yres / vc->vc_font.height; + vc_resize(vc->vc_num, cols, rows); + if (CON_IS_VISIBLE(vc)) { + update_screen(vc->vc_num); + if (softback_buf) { + int l = fbcon_softback_size / vc->vc_size_row; + + if (l > 5) + softback_end = softback_buf + l * + vc->vc_size_row; + else { + /* Smaller scrollback makes no sense, and 0 + would screw the operation totally */ + softback_top = 0; + } + } + } + switch_screen(fg_console); +} + static __inline__ void ywrap_up(struct vc_data *vc, int count) { struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]]; @@ -1537,6 +1695,7 @@ static int fbcon_switch(struct vc_data *vc) { struct fb_info *info = registered_fb[(int) con2fb_map[vc->vc_num]]; struct display *p = &fb_display[vc->vc_num]; + int i; if (softback_top) { int l = fbcon_softback_size / vc->vc_size_row; @@ -1563,6 +1722,20 @@ static int fbcon_switch(struct vc_data *vc) } if (info) info->var.yoffset = p->yscroll = 0; + + /* + * FIXME: If we have multiple fbdev's loaded, we need to + * update all info->currcon. Perhaps, we can place this + * in a centralized structure, but this might break some + * drivers. + * + * info->currcon = vc->vc_num; + */ + for (i = 0; i < FB_MAX; i++) { + if (registered_fb[i] != NULL) + registered_fb[i]->currcon = vc->vc_num; + } + fbcon_resize(vc, vc->vc_cols, vc->vc_rows); switch (p->scrollmode) { case SCROLL_WRAP: @@ -1580,8 +1753,6 @@ static int fbcon_switch(struct vc_data *vc) scrollback_max = 0; scrollback_current = 0; - info->currcon = vc->vc_num; - update_var(vc->vc_num, info); fbcon_set_palette(vc, color_table); @@ -2186,6 +2357,57 @@ static void fbcon_resumed(struct fb_info *info) update_screen(vc->vc_num); } + +static void fbcon_modechanged(struct fb_info *info) +{ + struct vc_data *vc = vc_cons[info->currcon].d; + struct display *p; + int rows, cols; + + if (info->currcon < 0 || vt_cons[info->currcon]->vc_mode != + KD_TEXT) + return; + p = &fb_display[vc->vc_num]; + + info->var.xoffset = info->var.yoffset = p->yscroll = 0; + vc->vc_can_do_color = info->var.bits_per_pixel != 1; + vc->vc_complement_mask = vc->vc_can_do_color ? 0x7700 : 0x0800; + + if (CON_IS_VISIBLE(vc)) { + cols = info->var.xres / vc->vc_font.width; + rows = info->var.yres / vc->vc_font.height; + vc_resize(vc->vc_num, cols, rows); + switch (p->scrollmode) { + case SCROLL_WRAP: + scrollback_phys_max = p->vrows - vc->vc_rows; + break; + case SCROLL_PAN: + scrollback_phys_max = p->vrows - 2 * vc->vc_rows; + if (scrollback_phys_max < 0) + scrollback_phys_max = 0; + break; + default: + scrollback_phys_max = 0; + break; + } + scrollback_max = 0; + scrollback_current = 0; + update_var(vc->vc_num, info); + fbcon_set_palette(vc, color_table); + update_screen(vc->vc_num); + if (softback_buf) { + int l = fbcon_softback_size / vc->vc_size_row; + if (l > 5) + softback_end = softback_buf + l * vc->vc_size_row; + else { + /* Smaller scrollback makes no sense, and 0 + would screw the operation totally */ + softback_top = 0; + } + } + } +} + static int fbcon_event_notify(struct notifier_block *self, unsigned long action, void *data) { @@ -2198,7 +2420,11 @@ static int fbcon_event_notify(struct notifier_block *self, case FB_EVENT_RESUME: fbcon_resumed(info); break; + case FB_EVENT_MODE_CHANGE: + fbcon_modechanged(info); + break; } + return 0; } @@ -2229,27 +2455,42 @@ const struct consw fb_con = { .con_resize = fbcon_resize, }; -static struct notifier_block fbcon_event_notifer = { +static struct notifier_block fbcon_event_notifier = { .notifier_call = fbcon_event_notify, }; - static int fbcon_event_notifier_registered; int __init fb_console_init(void) { - int err; + int err, i; + + for (i = 0; i < MAX_NR_CONSOLES; i++) + con2fb_map[i] = -1; if (!num_registered_fb) return -ENODEV; + if (info_idx == -1) { + for (i = 0; i < FB_MAX; i++) { + if (registered_fb[i] != NULL) { + info_idx = i; + break; + } + } + } + for (i = first_fb_vc; i <= last_fb_vc; i++) + con2fb_map[i] = info_idx; err = take_over_console(&fb_con, first_fb_vc, last_fb_vc, fbcon_is_default); - if (err) + if (err) { + for (i = first_fb_vc; i <= last_fb_vc; i++) { + con2fb_map[i] = -1; + } return err; - + } acquire_console_sem(); if (!fbcon_event_notifier_registered) { - fb_register_client(&fbcon_event_notifer); + fb_register_client(&fbcon_event_notifier); fbcon_event_notifier_registered = 1; } release_console_sem(); @@ -2262,7 +2503,7 @@ void __exit fb_console_exit(void) { acquire_console_sem(); if (fbcon_event_notifier_registered) { - fb_unregister_client(&fbcon_event_notifer); + fb_unregister_client(&fbcon_event_notifier); fbcon_event_notifier_registered = 0; } release_console_sem(); diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c index 65a4021cece4..68bf87cd240c 100644 --- a/drivers/video/fbmem.c +++ b/drivers/video/fbmem.c @@ -73,8 +73,8 @@ extern int cyber2000fb_init(void); extern int cyber2000fb_setup(char*); extern int retz3fb_init(void); extern int retz3fb_setup(char*); -extern int clgenfb_init(void); -extern int clgenfb_setup(char*); +extern int cirrusfb_init(void); +extern int cirrusfb_setup(char*); extern int hitfb_init(void); extern int vfb_init(void); extern int vfb_setup(char*); @@ -204,8 +204,8 @@ static struct { #ifdef CONFIG_FB_PM3 { "pm3fb", pm3fb_init, pm3fb_setup }, #endif -#ifdef CONFIG_FB_CLGEN - { "clgenfb", clgenfb_init, clgenfb_setup }, +#ifdef CONFIG_FB_CIRRUS + { "cirrusfb", cirrusfb_init, cirrusfb_setup }, #endif #ifdef CONFIG_FB_ATY { "atyfb", atyfb_init, atyfb_setup }, @@ -721,6 +721,7 @@ int fb_show_logo(struct fb_info *info) u32 *palette = NULL, *saved_pseudo_palette = NULL; unsigned char *logo_new = NULL; struct fb_image image; + struct fb_fillrect rect; int x; /* Return if the frame buffer is not mapped or suspended */ @@ -766,6 +767,12 @@ int fb_show_logo(struct fb_info *info) image.height = fb_logo.logo->height; image.dy = 0; + rect.dx = 0; + rect.dy = 0; + rect.color = 0; + rect.width = info->var.xres; + rect.height = fb_logo.logo->height; + info->fbops->fb_fillrect(info, &rect); for (x = 0; x < num_online_cpus() * (fb_logo.logo->width + 8) && x <= info->var.xres-fb_logo.logo->width; x += (fb_logo.logo->width + 8)) { image.dx = x; @@ -998,7 +1005,11 @@ fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var) fb_set_cmap(&info->cmap, 1, info); - notifier_call_chain(&fb_notifier_list, FB_EVENT_MODE_CHANGE, info); + if (info->flags & FBINFO_MISC_MODECHANGEUSER) { + notifier_call_chain(&fb_notifier_list, + FB_EVENT_MODE_CHANGE, info); + info->flags &= ~FBINFO_MISC_MODECHANGEUSER; + } } } return 0; @@ -1049,7 +1060,9 @@ fb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, if (copy_from_user(&var, (void *) arg, sizeof(var))) return -EFAULT; acquire_console_sem(); + info->flags |= FBINFO_MISC_MODECHANGEUSER; i = fb_set_var(info, &var); + info->flags &= ~FBINFO_MISC_MODECHANGEUSER; release_console_sem(); if (i) return i; if (copy_to_user((void *) arg, &var, sizeof(var))) @@ -1104,11 +1117,10 @@ fb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, #endif /* CONFIG_KMOD */ if (!registered_fb[con2fb.framebuffer]) return -EINVAL; - if (con2fb.console != 0) - set_con2fb_map(con2fb.console-1, con2fb.framebuffer); - else - fb_console_init(); - return 0; + if (con2fb.console > 0 && con2fb.console < MAX_NR_CONSOLES) + return set_con2fb_map(con2fb.console-1, + con2fb.framebuffer); + return -EINVAL; #endif /* CONFIG_FRAMEBUFFER_CONSOLE */ case FBIOBLANK: acquire_console_sem(); diff --git a/fs/affs/amigaffs.c b/fs/affs/amigaffs.c index ddd53ec12a92..17a4bfbb1f58 100644 --- a/fs/affs/amigaffs.c +++ b/fs/affs/amigaffs.c @@ -201,7 +201,7 @@ affs_remove_link(struct dentry *dentry) goto done; } - while ((ino = be32_to_cpu(AFFS_TAIL(sb, bh)->link_chain))) { + while ((ino = be32_to_cpu(AFFS_TAIL(sb, bh)->link_chain)) != 0) { if (ino == link_ino) { ino = AFFS_TAIL(sb, link_bh)->link_chain; AFFS_TAIL(sb, bh)->link_chain = ino; diff --git a/fs/affs/symlink.c b/fs/affs/symlink.c index c01cd4c64a61..4ef626e49381 100644 --- a/fs/affs/symlink.c +++ b/fs/affs/symlink.c @@ -78,7 +78,8 @@ struct address_space_operations affs_symlink_aops = { }; struct inode_operations affs_symlink_inode_operations = { - .readlink = page_readlink, - .follow_link = page_follow_link, + .readlink = generic_readlink, + .follow_link = page_follow_link_light, + .put_link = page_put_link, .setattr = affs_notify_change, }; diff --git a/fs/afs/super.c b/fs/afs/super.c index bcf81d358df0..bdf830191f62 100644 --- a/fs/afs/super.c +++ b/fs/afs/super.c @@ -172,7 +172,7 @@ static int afs_super_parse_options(struct afs_mount_params *params, options[PAGE_SIZE - 1] = 0; ret = 0; - while ((key = strsep(&options, ","))) + while ((key = strsep(&options, ",")) != 0) { value = strchr(key, '='); if (value) diff --git a/fs/autofs/symlink.c b/fs/autofs/symlink.c index 237a6305ab48..f028396f1383 100644 --- a/fs/autofs/symlink.c +++ b/fs/autofs/symlink.c @@ -12,19 +12,14 @@ #include "autofs_i.h" -static int autofs_readlink(struct dentry *dentry, char *buffer, int buflen) -{ - char *s=((struct autofs_symlink *)dentry->d_inode->u.generic_ip)->data; - return vfs_readlink(dentry, buffer, buflen, s); -} - static int autofs_follow_link(struct dentry *dentry, struct nameidata *nd) { char *s=((struct autofs_symlink *)dentry->d_inode->u.generic_ip)->data; - return vfs_follow_link(nd, s); + nd_set_link(nd, s); + return 0; } struct inode_operations autofs_symlink_inode_operations = { - .readlink = autofs_readlink, + .readlink = generic_readlink, .follow_link = autofs_follow_link }; diff --git a/fs/autofs/waitq.c b/fs/autofs/waitq.c index d08b648ccae5..1fcaa1568541 100644 --- a/fs/autofs/waitq.c +++ b/fs/autofs/waitq.c @@ -183,7 +183,7 @@ int autofs_wait_release(struct autofs_sb_info *sbi, autofs_wqt_t wait_queue_toke { struct autofs_wait_queue *wq, **wql; - for ( wql = &sbi->queues ; (wq = *wql) ; wql = &wq->next ) { + for ( wql = &sbi->queues ; (wq = *wql) != 0 ; wql = &wq->next ) { if ( wq->wait_queue_token == wait_queue_token ) break; } diff --git a/fs/autofs4/symlink.c b/fs/autofs4/symlink.c index 9cc355a0812c..c265a66edf0f 100644 --- a/fs/autofs4/symlink.c +++ b/fs/autofs4/symlink.c @@ -12,21 +12,14 @@ #include "autofs_i.h" -static int autofs4_readlink(struct dentry *dentry, char *buffer, int buflen) -{ - struct autofs_info *ino = autofs4_dentry_ino(dentry); - - return vfs_readlink(dentry, buffer, buflen, ino->u.symlink); -} - static int autofs4_follow_link(struct dentry *dentry, struct nameidata *nd) { struct autofs_info *ino = autofs4_dentry_ino(dentry); - - return vfs_follow_link(nd, ino->u.symlink); + nd_set_link(nd, (char *)ino->u.symlink); + return 0; } struct inode_operations autofs4_symlink_inode_operations = { - .readlink = autofs4_readlink, + .readlink = generic_readlink, .follow_link = autofs4_follow_link }; diff --git a/fs/autofs4/waitq.c b/fs/autofs4/waitq.c index caae47fd7a8e..b2f2e885d94b 100644 --- a/fs/autofs4/waitq.c +++ b/fs/autofs4/waitq.c @@ -275,7 +275,7 @@ int autofs4_wait_release(struct autofs_sb_info *sbi, autofs_wqt_t wait_queue_tok struct autofs_wait_queue *wq, **wql; down(&sbi->wq_sem); - for ( wql = &sbi->queues ; (wq = *wql) ; wql = &wq->next ) { + for ( wql = &sbi->queues ; (wq = *wql) != 0 ; wql = &wq->next ) { if ( wq->wait_queue_token == wait_queue_token ) break; } diff --git a/fs/bad_inode.c b/fs/bad_inode.c index c0619d21a00e..3957ad190aa4 100644 --- a/fs/bad_inode.c +++ b/fs/bad_inode.c @@ -13,6 +13,7 @@ #include <linux/stat.h> #include <linux/time.h> #include <linux/smp_lock.h> +#include <linux/namei.h> /* * The follow_link operation is special: it must behave as a no-op @@ -21,7 +22,8 @@ */ static int bad_follow_link(struct dentry *dent, struct nameidata *nd) { - return vfs_follow_link(nd, ERR_PTR(-EIO)); + nd_set_link(nd, ERR_PTR(-EIO)); + return 0; } static int return_EIO(void) diff --git a/fs/befs/linuxvfs.c b/fs/befs/linuxvfs.c index 649d02b03012..49cf3428d511 100644 --- a/fs/befs/linuxvfs.c +++ b/fs/befs/linuxvfs.c @@ -14,6 +14,7 @@ #include <linux/buffer_head.h> #include <linux/vfs.h> #include <linux/parser.h> +#include <linux/namei.h> #include "befs.h" #include "btree.h" @@ -40,8 +41,8 @@ static struct inode *befs_alloc_inode(struct super_block *sb); static void befs_destroy_inode(struct inode *inode); static int befs_init_inodecache(void); static void befs_destroy_inodecache(void); -static int befs_readlink(struct dentry *, char __user *, int); -static int befs_follow_link(struct dentry *, struct nameidata *nd); +static int befs_follow_link(struct dentry *, struct nameidata *); +static void befs_put_link(struct dentry *, struct nameidata *); static int befs_utf2nls(struct super_block *sb, const char *in, int in_len, char **out, int *out_len); static int befs_nls2utf(struct super_block *sb, const char *in, int in_len, @@ -85,8 +86,9 @@ struct address_space_operations befs_aops = { }; static struct inode_operations befs_symlink_inode_operations = { - .readlink = befs_readlink, + .readlink = generic_readlink, .follow_link = befs_follow_link, + .put_link = befs_put_link, }; /* @@ -462,71 +464,40 @@ befs_destroy_inodecache(void) static int befs_follow_link(struct dentry *dentry, struct nameidata *nd) { - struct super_block *sb = dentry->d_sb; befs_inode_info *befs_ino = BEFS_I(dentry->d_inode); char *link; - int res; if (befs_ino->i_flags & BEFS_LONG_SYMLINK) { + struct super_block *sb = dentry->d_sb; befs_data_stream *data = &befs_ino->i_data.ds; - befs_off_t linklen = data->size; + befs_off_t len = data->size; befs_debug(sb, "Follow long symlink"); - link = kmalloc(linklen, GFP_NOFS); - if (link == NULL) - return -ENOMEM; - - if (befs_read_lsymlink(sb, data, link, linklen) != linklen) { + link = kmalloc(len, GFP_NOFS); + if (!link) { + link = ERR_PTR(-ENOMEM); + } else if (befs_read_lsymlink(sb, data, link, len) != len) { kfree(link); befs_error(sb, "Failed to read entire long symlink"); - return -EIO; + link = ERR_PTR(-EIO); } - - res = vfs_follow_link(nd, link); - - kfree(link); } else { link = befs_ino->i_data.symlink; - res = vfs_follow_link(nd, link); } - return res; + nd_set_link(nd, link); + return 0; } -static int -befs_readlink(struct dentry *dentry, char __user *buffer, int buflen) +static void befs_put_link(struct dentry *dentry, struct nameidata *nd) { - struct super_block *sb = dentry->d_sb; befs_inode_info *befs_ino = BEFS_I(dentry->d_inode); - char *link; - int res; - if (befs_ino->i_flags & BEFS_LONG_SYMLINK) { - befs_data_stream *data = &befs_ino->i_data.ds; - befs_off_t linklen = data->size; - - befs_debug(sb, "Read long symlink"); - - link = kmalloc(linklen, GFP_NOFS); - if (link == NULL) - return -ENOMEM; - - if (befs_read_lsymlink(sb, data, link, linklen) != linklen) { - kfree(link); - befs_error(sb, "Failed to read entire long symlink"); - return -EIO; - } - - res = vfs_readlink(dentry, buffer, buflen, link); - - kfree(link); - } else { - link = befs_ino->i_data.symlink; - res = vfs_readlink(dentry, buffer, buflen, link); + char *p = nd_get_link(nd); + if (!IS_ERR(p)) + kfree(p); } - - return res; } /* diff --git a/fs/coda/cnode.c b/fs/coda/cnode.c index 9ef74a31af47..6bf72ebb1c57 100644 --- a/fs/coda/cnode.c +++ b/fs/coda/cnode.c @@ -17,8 +17,9 @@ inline int coda_fideq(struct CodaFid *fid1, struct CodaFid *fid2) } static struct inode_operations coda_symlink_inode_operations = { - .readlink = page_readlink, - .follow_link = page_follow_link, + .readlink = generic_readlink, + .follow_link = page_follow_link_light, + .put_link = page_put_link, .setattr = coda_setattr, }; diff --git a/fs/dcache.c b/fs/dcache.c index 4c632e1261dc..ac36b5c5fdf2 100644 --- a/fs/dcache.c +++ b/fs/dcache.c @@ -32,9 +32,10 @@ #include <linux/swap.h> #include <linux/bootmem.h> -#define DCACHE_PARANOIA 1 /* #define DCACHE_DEBUG 1 */ +int sysctl_vfs_cache_pressure = 100; + spinlock_t dcache_lock __cacheline_aligned_in_smp = SPIN_LOCK_UNLOCKED; seqlock_t rename_lock __cacheline_aligned_in_smp = SEQLOCK_UNLOCKED; @@ -65,9 +66,9 @@ struct dentry_stat_t dentry_stat = { .age_limit = 45, }; -static void d_callback(void *arg) +static void d_callback(struct rcu_head *head) { - struct dentry * dentry = (struct dentry *)arg; + struct dentry * dentry = container_of(head, struct dentry, d_rcu); if (dname_external(dentry)) kfree(dentry->d_name.name); @@ -82,7 +83,7 @@ static void d_free(struct dentry *dentry) { if (dentry->d_op && dentry->d_op->d_release) dentry->d_op->d_release(dentry); - call_rcu(&dentry->d_rcu, d_callback, dentry); + call_rcu(&dentry->d_rcu, d_callback); } /* @@ -664,7 +665,7 @@ static int shrink_dcache_memory(int nr, unsigned int gfp_mask) return -1; prune_dcache(nr); } - return dentry_stat.nr_unused; + return (dentry_stat.nr_unused / 100) * sysctl_vfs_cache_pressure; } /** diff --git a/fs/devfs/base.c b/fs/devfs/base.c index deab8f23ffa1..b0fb34873825 100644 --- a/fs/devfs/base.c +++ b/fs/devfs/base.c @@ -2490,29 +2490,11 @@ static int devfs_mknod(struct inode *dir, struct dentry *dentry, int mode, return 0; } /* End Function devfs_mknod */ -static int devfs_readlink(struct dentry *dentry, char __user *buffer, - int buflen) -{ - int err; - struct devfs_entry *de; - - de = get_devfs_entry_from_vfs_inode(dentry->d_inode); - if (!de) - return -ENODEV; - err = vfs_readlink(dentry, buffer, buflen, de->u.symlink.linkname); - return err; -} /* End Function devfs_readlink */ - static int devfs_follow_link(struct dentry *dentry, struct nameidata *nd) { - int err; - struct devfs_entry *de; - - de = get_devfs_entry_from_vfs_inode(dentry->d_inode); - if (!de) - return -ENODEV; - err = vfs_follow_link(nd, de->u.symlink.linkname); - return err; + struct devfs_entry *p = get_devfs_entry_from_vfs_inode(dentry->d_inode); + nd_set_link(nd, p ? p->u.symlink.linkname : ERR_PTR(-ENODEV)); + return 0; } /* End Function devfs_follow_link */ static struct inode_operations devfs_iops = { @@ -2530,7 +2512,7 @@ static struct inode_operations devfs_dir_iops = { }; static struct inode_operations devfs_symlink_iops = { - .readlink = devfs_readlink, + .readlink = generic_readlink, .follow_link = devfs_follow_link, .setattr = devfs_notify_change, }; diff --git a/fs/dnotify.c b/fs/dnotify.c index daee2edb17cc..2801eb4fdf10 100644 --- a/fs/dnotify.c +++ b/fs/dnotify.c @@ -23,7 +23,6 @@ int dir_notify_enable = 1; -static rwlock_t dn_lock = RW_LOCK_UNLOCKED; static kmem_cache_t *dn_cache; static void redo_inode_mask(struct inode *inode) @@ -46,7 +45,7 @@ void dnotify_flush(struct file *filp, fl_owner_t id) inode = filp->f_dentry->d_inode; if (!S_ISDIR(inode->i_mode)) return; - write_lock(&dn_lock); + spin_lock(&inode->i_lock); prev = &inode->i_dnotify; while ((dn = *prev) != NULL) { if ((dn->dn_owner == id) && (dn->dn_filp == filp)) { @@ -57,7 +56,7 @@ void dnotify_flush(struct file *filp, fl_owner_t id) } prev = &dn->dn_next; } - write_unlock(&dn_lock); + spin_unlock(&inode->i_lock); } int fcntl_dirnotify(int fd, struct file *filp, unsigned long arg) @@ -81,7 +80,7 @@ int fcntl_dirnotify(int fd, struct file *filp, unsigned long arg) dn = kmem_cache_alloc(dn_cache, SLAB_KERNEL); if (dn == NULL) return -ENOMEM; - write_lock(&dn_lock); + spin_lock(&inode->i_lock); prev = &inode->i_dnotify; while ((odn = *prev) != NULL) { if ((odn->dn_owner == id) && (odn->dn_filp == filp)) { @@ -104,12 +103,13 @@ int fcntl_dirnotify(int fd, struct file *filp, unsigned long arg) inode->i_dnotify_mask |= arg & ~DN_MULTISHOT; dn->dn_next = inode->i_dnotify; inode->i_dnotify = dn; -out: - write_unlock(&dn_lock); - return error; + spin_unlock(&inode->i_lock); + return 0; + out_free: + spin_unlock(&inode->i_lock); kmem_cache_free(dn_cache, dn); - goto out; + return error; } void __inode_dir_notify(struct inode *inode, unsigned long event) @@ -119,7 +119,7 @@ void __inode_dir_notify(struct inode *inode, unsigned long event) struct fown_struct * fown; int changed = 0; - write_lock(&dn_lock); + spin_lock(&inode->i_lock); prev = &inode->i_dnotify; while ((dn = *prev) != NULL) { if ((dn->dn_mask & event) == 0) { @@ -138,7 +138,7 @@ void __inode_dir_notify(struct inode *inode, unsigned long event) } if (changed) redo_inode_mask(inode); - write_unlock(&dn_lock); + spin_unlock(&inode->i_lock); } EXPORT_SYMBOL(__inode_dir_notify); diff --git a/fs/eventpoll.c b/fs/eventpoll.c index 86464ead1961..a05a3ce255b8 100644 --- a/fs/eventpoll.c +++ b/fs/eventpoll.c @@ -802,7 +802,7 @@ static void ep_free(struct eventpoll *ep) * write-holding "sem" we can be sure that no file cleanup code will hit * us during this operation. So we can avoid the lock on "ep->lock". */ - while ((rbp = rb_first(&ep->rbr))) { + while ((rbp = rb_first(&ep->rbr)) != 0) { epi = rb_entry(rbp, struct epitem, rbn); ep_remove(ep, epi); } diff --git a/fs/ext2/symlink.c b/fs/ext2/symlink.c index b282670a54bc..4680ea7ecc12 100644 --- a/fs/ext2/symlink.c +++ b/fs/ext2/symlink.c @@ -19,23 +19,19 @@ #include "ext2.h" #include "xattr.h" - -static int -ext2_readlink(struct dentry *dentry, char __user *buffer, int buflen) -{ - struct ext2_inode_info *ei = EXT2_I(dentry->d_inode); - return vfs_readlink(dentry, buffer, buflen, (char *)ei->i_data); -} +#include <linux/namei.h> static int ext2_follow_link(struct dentry *dentry, struct nameidata *nd) { struct ext2_inode_info *ei = EXT2_I(dentry->d_inode); - return vfs_follow_link(nd, (char *)ei->i_data); + nd_set_link(nd, (char *)ei->i_data); + return 0; } struct inode_operations ext2_symlink_inode_operations = { - .readlink = page_readlink, - .follow_link = page_follow_link, + .readlink = generic_readlink, + .follow_link = page_follow_link_light, + .put_link = page_put_link, .setxattr = ext2_setxattr, .getxattr = ext2_getxattr, .listxattr = ext2_listxattr, @@ -43,7 +39,7 @@ struct inode_operations ext2_symlink_inode_operations = { }; struct inode_operations ext2_fast_symlink_inode_operations = { - .readlink = ext2_readlink, + .readlink = generic_readlink, .follow_link = ext2_follow_link, .setxattr = ext2_setxattr, .getxattr = ext2_getxattr, diff --git a/fs/ext3/symlink.c b/fs/ext3/symlink.c index ae092875b62a..867f713a102c 100644 --- a/fs/ext3/symlink.c +++ b/fs/ext3/symlink.c @@ -20,24 +20,20 @@ #include <linux/fs.h> #include <linux/jbd.h> #include <linux/ext3_fs.h> +#include <linux/namei.h> #include "xattr.h" -static int -ext3_readlink(struct dentry *dentry, char __user *buffer, int buflen) -{ - struct ext3_inode_info *ei = EXT3_I(dentry->d_inode); - return vfs_readlink(dentry, buffer, buflen, (char*)ei->i_data); -} - static int ext3_follow_link(struct dentry *dentry, struct nameidata *nd) { struct ext3_inode_info *ei = EXT3_I(dentry->d_inode); - return vfs_follow_link(nd, (char*)ei->i_data); + nd_set_link(nd, (char*)ei->i_data); + return 0; } struct inode_operations ext3_symlink_inode_operations = { - .readlink = page_readlink, - .follow_link = page_follow_link, + .readlink = generic_readlink, + .follow_link = page_follow_link_light, + .put_link = page_put_link, .setxattr = ext3_setxattr, .getxattr = ext3_getxattr, .listxattr = ext3_listxattr, @@ -45,8 +41,8 @@ struct inode_operations ext3_symlink_inode_operations = { }; struct inode_operations ext3_fast_symlink_inode_operations = { - .readlink = ext3_readlink, /* BKL not held. Don't need */ - .follow_link = ext3_follow_link, /* BKL not held. Don't need */ + .readlink = generic_readlink, + .follow_link = ext3_follow_link, .setxattr = ext3_setxattr, .getxattr = ext3_getxattr, .listxattr = ext3_listxattr, diff --git a/fs/freevxfs/vxfs_immed.c b/fs/freevxfs/vxfs_immed.c index be243053a7c1..ac677ab262b2 100644 --- a/fs/freevxfs/vxfs_immed.c +++ b/fs/freevxfs/vxfs_immed.c @@ -32,12 +32,12 @@ */ #include <linux/fs.h> #include <linux/pagemap.h> +#include <linux/namei.h> #include "vxfs.h" #include "vxfs_inode.h" -static int vxfs_immed_readlink(struct dentry *, char __user *, int); static int vxfs_immed_follow_link(struct dentry *, struct nameidata *); static int vxfs_immed_readpage(struct file *, struct page *); @@ -49,7 +49,7 @@ static int vxfs_immed_readpage(struct file *, struct page *); * but do all work directly on the inode. */ struct inode_operations vxfs_immed_symlink_iops = { - .readlink = vxfs_immed_readlink, + .readlink = generic_readlink, .follow_link = vxfs_immed_follow_link, }; @@ -60,28 +60,6 @@ struct address_space_operations vxfs_immed_aops = { .readpage = vxfs_immed_readpage, }; - -/** - * vxfs_immed_readlink - read immed symlink - * @dp: dentry for the link - * @bp: output buffer - * @buflen: length of @bp - * - * Description: - * vxfs_immed_readlink calls vfs_readlink to read the link - * described by @dp into userspace. - * - * Returns: - * Number of bytes successfully copied to userspace. - */ -static int -vxfs_immed_readlink(struct dentry *dp, char __user *bp, int buflen) -{ - struct vxfs_inode_info *vip = VXFS_INO(dp->d_inode); - - return (vfs_readlink(dp, bp, buflen, vip->vii_immed.vi_immed)); -} - /** * vxfs_immed_follow_link - follow immed symlink * @dp: dentry for the link @@ -98,8 +76,8 @@ static int vxfs_immed_follow_link(struct dentry *dp, struct nameidata *np) { struct vxfs_inode_info *vip = VXFS_INO(dp->d_inode); - - return (vfs_follow_link(np, vip->vii_immed.vi_immed)); + nd_set_link(np, vip->vii_immed.vi_immed); + return 0; } /** diff --git a/fs/hfs/super.c b/fs/hfs/super.c index 2b7d0b21d896..345651903fe0 100644 --- a/fs/hfs/super.c +++ b/fs/hfs/super.c @@ -161,7 +161,7 @@ static int parse_options(char *options, struct hfs_sb_info *hsb) if (!options) return 1; - while ((this_char = strsep(&options, ","))) { + while ((this_char = strsep(&options, ",")) != 0) { if (!*this_char) continue; value = strchr(this_char, '='); diff --git a/fs/hfsplus/bnode.c b/fs/hfsplus/bnode.c index ec8cb5dd28c2..5ce5d7713013 100644 --- a/fs/hfsplus/bnode.c +++ b/fs/hfsplus/bnode.c @@ -34,7 +34,7 @@ void hfs_bnode_read(struct hfs_bnode *node, void *buf, int off, int len) memcpy(buf, kmap(*pagep) + off, l); kunmap(*pagep); - while ((len -= l)) { + while ((len -= l) != 0) { buf += l; l = min(len, (int)PAGE_CACHE_SIZE); memcpy(buf, kmap(*++pagep), l); @@ -87,7 +87,7 @@ void hfs_bnode_write(struct hfs_bnode *node, void *buf, int off, int len) set_page_dirty(*pagep); kunmap(*pagep); - while ((len -= l)) { + while ((len -= l) != 0) { buf += l; l = min(len, (int)PAGE_CACHE_SIZE); memcpy(kmap(*++pagep), buf, l); @@ -117,7 +117,7 @@ void hfs_bnode_clear(struct hfs_bnode *node, int off, int len) set_page_dirty(*pagep); kunmap(*pagep); - while ((len -= l)) { + while ((len -= l) != 0) { l = min(len, (int)PAGE_CACHE_SIZE); memset(kmap(*++pagep), 0, l); set_page_dirty(*pagep); @@ -150,7 +150,7 @@ void hfs_bnode_copy(struct hfs_bnode *dst_node, int dst, set_page_dirty(*dst_page); kunmap(*dst_page); - while ((len -= l)) { + while ((len -= l) != 0) { l = min(len, (int)PAGE_CACHE_SIZE); memcpy(kmap(*++dst_page), kmap(*++src_page), l); kunmap(*src_page); @@ -258,7 +258,7 @@ void hfs_bnode_move(struct hfs_bnode *node, int dst, int src, int len) set_page_dirty(*dst_page); kunmap(*dst_page); - while ((len -= l)) { + while ((len -= l) != 0) { l = min(len, (int)PAGE_CACHE_SIZE); memmove(kmap(*++dst_page), kmap(*++src_page), l); kunmap(*src_page); diff --git a/fs/hfsplus/wrapper.c b/fs/hfsplus/wrapper.c index ca595223a07e..777db1122f64 100644 --- a/fs/hfsplus/wrapper.c +++ b/fs/hfsplus/wrapper.c @@ -135,7 +135,7 @@ int hfsplus_read_wrapper(struct super_block *sb) return -EINVAL; HFSPLUS_SB(sb).alloc_blksz = blocksize; HFSPLUS_SB(sb).alloc_blksz_shift = 0; - while (blocksize >>= 1) + while ((blocksize >>= 1) != 0) HFSPLUS_SB(sb).alloc_blksz_shift++; blocksize = min(HFSPLUS_SB(sb).alloc_blksz, (u32)PAGE_SIZE); diff --git a/fs/hpfs/alloc.c b/fs/hpfs/alloc.c index 72ea1412b467..2baa977ffa1d 100644 --- a/fs/hpfs/alloc.c +++ b/fs/hpfs/alloc.c @@ -88,7 +88,7 @@ static secno alloc_in_bmp(struct super_block *s, secno near, unsigned n, unsigne goto rt; }*/ q = nr + n; b = 0; - while ((a = tstbits(bmp, q, n + forward))) { + while ((a = tstbits(bmp, q, n + forward)) != 0) { q += a; if (n != 1) q = ((q-1)&~(n-1))+n; if (!b) { @@ -116,7 +116,7 @@ static secno alloc_in_bmp(struct super_block *s, secno near, unsigned n, unsigne } } if (n != 1) q = ((q-1)&~(n-1))+n; - while ((a = tstbits(bmp, q, n + forward))) { + while ((a = tstbits(bmp, q, n + forward)) != 0) { q += a; if (n != 1) q = ((q-1)&~(n-1))+n; if (q>>5 > i) break; diff --git a/fs/inode.c b/fs/inode.c index e802a3c35fd2..ad1dd009acbc 100644 --- a/fs/inode.c +++ b/fs/inode.c @@ -488,7 +488,7 @@ static int shrink_icache_memory(int nr, unsigned int gfp_mask) if (gfp_mask & __GFP_FS) prune_icache(nr); } - return inodes_stat.nr_unused; + return (inodes_stat.nr_unused / 100) * sysctl_vfs_cache_pressure; } static void __wait_on_freeing_inode(struct inode *inode); diff --git a/fs/jbd/commit.c b/fs/jbd/commit.c index c1eb3c536474..72e56d62c373 100644 --- a/fs/jbd/commit.c +++ b/fs/jbd/commit.c @@ -503,7 +503,7 @@ write_out_data: start_journal_io: for (i = 0; i < bufs; i++) { struct buffer_head *bh = wbuf[i]; - set_buffer_locked(bh); + lock_buffer(bh); clear_buffer_dirty(bh); set_buffer_uptodate(bh); bh->b_end_io = journal_end_buffer_io_sync; diff --git a/fs/jffs2/symlink.c b/fs/jffs2/symlink.c index 46d306cf0df4..d0adaf6fd5df 100644 --- a/fs/jffs2/symlink.c +++ b/fs/jffs2/symlink.c @@ -15,43 +15,31 @@ #include <linux/kernel.h> #include <linux/slab.h> #include <linux/fs.h> +#include <linux/namei.h> #include "nodelist.h" -int jffs2_readlink(struct dentry *dentry, char *buffer, int buflen); -int jffs2_follow_link(struct dentry *dentry, struct nameidata *nd); +static int jffs2_follow_link(struct dentry *dentry, struct nameidata *nd); +static void jffs2_put_link(struct dentry *dentry, struct nameidata *nd); struct inode_operations jffs2_symlink_inode_operations = { - .readlink = jffs2_readlink, + .readlink = generic_readlink, .follow_link = jffs2_follow_link, + .put_link = jffs2_put_link, .setattr = jffs2_setattr }; -int jffs2_readlink(struct dentry *dentry, char *buffer, int buflen) -{ - unsigned char *kbuf; - int ret; - - kbuf = jffs2_getlink(JFFS2_SB_INFO(dentry->d_inode->i_sb), JFFS2_INODE_INFO(dentry->d_inode)); - if (IS_ERR(kbuf)) - return PTR_ERR(kbuf); - - ret = vfs_readlink(dentry, buffer, buflen, kbuf); - kfree(kbuf); - return ret; -} - -int jffs2_follow_link(struct dentry *dentry, struct nameidata *nd) +static int jffs2_follow_link(struct dentry *dentry, struct nameidata *nd) { unsigned char *buf; - int ret; - buf = jffs2_getlink(JFFS2_SB_INFO(dentry->d_inode->i_sb), JFFS2_INODE_INFO(dentry->d_inode)); + nd_set_link(nd, buf); + return 0; +} - if (IS_ERR(buf)) - return PTR_ERR(buf); - - ret = vfs_follow_link(nd, buf); - kfree(buf); - return ret; +static void jffs2_put_link(struct dentry *dentry, struct nameidata *nd) +{ + char *s = nd_get_link(nd); + if (!IS_ERR(s)) + kfree(s); } diff --git a/fs/jfs/jfs_extent.c b/fs/jfs/jfs_extent.c index 399572237f35..2068c4746e02 100644 --- a/fs/jfs/jfs_extent.c +++ b/fs/jfs/jfs_extent.c @@ -533,7 +533,7 @@ extBalloc(struct inode *ip, s64 hint, s64 * nblocks, s64 * blkno) nb = nblks = *nblocks; /* try to allocate blocks */ - while ((rc = dbAlloc(ip, hint, nb, &daddr))) { + while ((rc = dbAlloc(ip, hint, nb, &daddr)) != 0) { /* if something other than an out of space error, * stop and return this error. */ diff --git a/fs/jfs/jfs_logmgr.c b/fs/jfs/jfs_logmgr.c index f4ce4609c43b..83dc99db1e5b 100644 --- a/fs/jfs/jfs_logmgr.c +++ b/fs/jfs/jfs_logmgr.c @@ -2321,7 +2321,7 @@ int jfsIOWait(void *arg) DECLARE_WAITQUEUE(wq, current); spin_lock_irq(&log_redrive_lock); - while ((bp = log_redrive_list)) { + while ((bp = log_redrive_list) != 0) { log_redrive_list = bp->l_redrive_next; bp->l_redrive_next = NULL; spin_unlock_irq(&log_redrive_lock); diff --git a/fs/jfs/jfs_txnmgr.c b/fs/jfs/jfs_txnmgr.c index f48fdeae5eae..7e08dd5025ad 100644 --- a/fs/jfs/jfs_txnmgr.c +++ b/fs/jfs/jfs_txnmgr.c @@ -2580,7 +2580,7 @@ void txFreelock(struct inode *ip) TXN_LOCK(); xtlck = (struct tlock *) &jfs_ip->atlhead; - while ((lid = xtlck->next)) { + while ((lid = xtlck->next) != 0) { tlck = lid_to_tlock(lid); if (tlck->flag & tlckFREELOCK) { xtlck->next = tlck->next; diff --git a/fs/jfs/symlink.c b/fs/jfs/symlink.c index 6e028d912e62..ef4c07ee92b2 100644 --- a/fs/jfs/symlink.c +++ b/fs/jfs/symlink.c @@ -17,23 +17,19 @@ */ #include <linux/fs.h> +#include <linux/namei.h> #include "jfs_incore.h" #include "jfs_xattr.h" static int jfs_follow_link(struct dentry *dentry, struct nameidata *nd) { char *s = JFS_IP(dentry->d_inode)->i_inline; - return vfs_follow_link(nd, s); -} - -static int jfs_readlink(struct dentry *dentry, char __user *buffer, int buflen) -{ - char *s = JFS_IP(dentry->d_inode)->i_inline; - return vfs_readlink(dentry, buffer, buflen, s); + nd_set_link(nd, s); + return 0; } struct inode_operations jfs_symlink_inode_operations = { - .readlink = jfs_readlink, + .readlink = generic_readlink, .follow_link = jfs_follow_link, .setxattr = jfs_setxattr, .getxattr = jfs_getxattr, diff --git a/fs/lockd/host.c b/fs/lockd/host.c index 67f6a5886dc3..6bf6befe6fa3 100644 --- a/fs/lockd/host.c +++ b/fs/lockd/host.c @@ -76,7 +76,7 @@ nlm_lookup_host(int server, struct sockaddr_in *sin, if (time_after_eq(jiffies, next_gc)) nlm_gc_hosts(); - for (hp = &nlm_hosts[hash]; (host = *hp); hp = &host->h_next) { + for (hp = &nlm_hosts[hash]; (host = *hp) != 0; hp = &host->h_next) { if (host->h_proto != proto) continue; if (host->h_version != version) @@ -145,7 +145,7 @@ nlm_find_client(void) down(&nlm_host_sema); for (hash = 0 ; hash < NLM_HOST_NRHASH; hash++) { struct nlm_host *host, **hp; - for (hp = &nlm_hosts[hash]; (host = *hp) ; hp = &host->h_next) { + for (hp = &nlm_hosts[hash]; (host = *hp) != 0; hp = &host->h_next) { if (host->h_server && host->h_killed == 0) { nlm_get_host(host); diff --git a/fs/lockd/svclock.c b/fs/lockd/svclock.c index d96319004853..2addc9200763 100644 --- a/fs/lockd/svclock.c +++ b/fs/lockd/svclock.c @@ -67,7 +67,7 @@ nlmsvc_insert_block(struct nlm_block *block, unsigned long when) while ((b = *bp) && time_before_eq(b->b_when,when) && b->b_when != NLM_NEVER) bp = &b->b_next; } else - while ((b = *bp)) + while ((b = *bp) != 0) bp = &b->b_next; block->b_queued = 1; @@ -86,7 +86,7 @@ nlmsvc_remove_block(struct nlm_block *block) if (!block->b_queued) return 1; - for (bp = &nlm_blocked; (b = *bp); bp = &b->b_next) { + for (bp = &nlm_blocked; (b = *bp) != 0; bp = &b->b_next) { if (b == block) { *bp = block->b_next; block->b_queued = 0; @@ -111,7 +111,7 @@ nlmsvc_lookup_block(struct nlm_file *file, struct nlm_lock *lock, int remove) file, lock->fl.fl_pid, (long long)lock->fl.fl_start, (long long)lock->fl.fl_end, lock->fl.fl_type); - for (head = &nlm_blocked; (block = *head); head = &block->b_next) { + for (head = &nlm_blocked; (block = *head) != 0; head = &block->b_next) { fl = &block->b_call.a_args.lock.fl; dprintk("lockd: check f=%p pd=%d %Ld-%Ld ty=%d cookie=%x\n", block->b_file, fl->fl_pid, @@ -468,7 +468,7 @@ nlmsvc_notify_blocked(struct file_lock *fl) struct nlm_block **bp, *block; dprintk("lockd: VFS unblock notification for block %p\n", fl); - for (bp = &nlm_blocked; (block = *bp); bp = &block->b_next) { + for (bp = &nlm_blocked; (block = *bp) != 0; bp = &block->b_next) { if (nlm_compare_locks(&block->b_call.a_args.lock.fl, fl)) { nlmsvc_insert_block(block, 0); svc_wake_up(block->b_daemon); @@ -653,7 +653,7 @@ nlmsvc_retry_blocked(void) dprintk("nlmsvc_retry_blocked(%p, when=%ld)\n", nlm_blocked, nlm_blocked? nlm_blocked->b_when : 0); - while ((block = nlm_blocked)) { + while ((block = nlm_blocked) != 0) { if (block->b_when == NLM_NEVER) break; if (time_after(block->b_when,jiffies)) diff --git a/fs/lockd/svcshare.c b/fs/lockd/svcshare.c index ef24965f997b..4943fb7836ce 100644 --- a/fs/lockd/svcshare.c +++ b/fs/lockd/svcshare.c @@ -71,7 +71,7 @@ nlmsvc_unshare_file(struct nlm_host *host, struct nlm_file *file, struct nlm_share *share, **shpp; struct xdr_netobj *oh = &argp->lock.oh; - for (shpp = &file->f_shares; (share = *shpp); shpp = &share->s_next) { + for (shpp = &file->f_shares; (share = *shpp) != 0; shpp = &share->s_next) { if (share->s_host == host && nlm_cmp_owner(share, oh)) { *shpp = share->s_next; kfree(share); diff --git a/fs/minix/inode.c b/fs/minix/inode.c index 11dab7f1a008..4b52a2ee41be 100644 --- a/fs/minix/inode.c +++ b/fs/minix/inode.c @@ -343,8 +343,9 @@ static struct address_space_operations minix_aops = { }; static struct inode_operations minix_symlink_inode_operations = { - .readlink = page_readlink, - .follow_link = page_follow_link, + .readlink = generic_readlink, + .follow_link = page_follow_link_light, + .put_link = page_put_link, .getattr = minix_getattr, }; diff --git a/fs/namei.c b/fs/namei.c index efaaf1dd1d7d..d75f455ca772 100644 --- a/fs/namei.c +++ b/fs/namei.c @@ -395,6 +395,8 @@ static struct dentry * real_lookup(struct dentry * parent, struct qstr * name, s return result; } +static inline int __vfs_follow_link(struct nameidata *, const char *); + /* * This limits recursive symlink follows to 8, while * limiting consecutive symlinks to 40. @@ -405,19 +407,30 @@ static struct dentry * real_lookup(struct dentry * parent, struct qstr * name, s static inline int do_follow_link(struct dentry *dentry, struct nameidata *nd) { int err = -ELOOP; - if (current->link_count >= 5) + if (current->link_count >= MAX_NESTED_LINKS) goto loop; if (current->total_link_count >= 40) goto loop; + BUG_ON(nd->depth >= MAX_NESTED_LINKS); cond_resched(); err = security_inode_follow_link(dentry, nd); if (err) goto loop; current->link_count++; current->total_link_count++; + nd->depth++; touch_atime(nd->mnt, dentry); + nd_set_link(nd, NULL); err = dentry->d_inode->i_op->follow_link(dentry, nd); + if (!err) { + char *s = nd_get_link(nd); + if (s) + err = __vfs_follow_link(nd, s); + if (dentry->d_inode->i_op->put_link) + dentry->d_inode->i_op->put_link(dentry, nd); + } current->link_count--; + nd->depth--; return err; loop: path_release(nd); @@ -587,7 +600,7 @@ int fastcall link_path_walk(const char * name, struct nameidata *nd) goto return_reval; inode = nd->dentry->d_inode; - if (current->link_count) + if (nd->depth) lookup_flags = LOOKUP_FOLLOW; /* At this point we know we have a real path component. */ @@ -795,6 +808,7 @@ static int __emul_lookup_dentry(const char *name, struct nameidata *nd) */ nd_root.last_type = LAST_ROOT; nd_root.flags = nd->flags; + nd_root.depth = 0; memcpy(&nd_root.intent, &nd->intent, sizeof(nd_root.intent)); read_lock(¤t->fs->lock); nd_root.mnt = mntget(current->fs->rootmnt); @@ -867,6 +881,7 @@ int fastcall path_lookup(const char *name, unsigned int flags, struct nameidata nd->last_type = LAST_ROOT; /* if there are only slashes... */ nd->flags = flags; + nd->depth = 0; read_lock(¤t->fs->lock); if (*name=='/') { @@ -1385,7 +1400,15 @@ do_link: if (error) goto exit_dput; touch_atime(nd->mnt, dentry); + nd_set_link(nd, NULL); error = dentry->d_inode->i_op->follow_link(dentry, nd); + if (!error) { + char *s = nd_get_link(nd); + if (s) + error = __vfs_follow_link(nd, s); + if (dentry->d_inode->i_op->put_link) + dentry->d_inode->i_op->put_link(dentry, nd); + } dput(dentry); if (error) return error; @@ -2166,6 +2189,23 @@ out: return len; } +/* + * A helper for ->readlink(). This should be used *ONLY* for symlinks that + * have ->follow_link() touching nd only in nd_set_link(). Using (or not + * using) it for any given inode is up to filesystem. + */ +int generic_readlink(struct dentry *dentry, char __user *buffer, int buflen) +{ + struct nameidata nd; + int res = dentry->d_inode->i_op->follow_link(dentry, &nd); + if (!res) { + res = vfs_readlink(dentry, buffer, buflen, nd_get_link(&nd)); + if (dentry->d_inode->i_op->put_link) + dentry->d_inode->i_op->put_link(dentry, &nd); + } + return res; +} + static inline int __vfs_follow_link(struct nameidata *nd, const char *link) { @@ -2182,7 +2222,7 @@ __vfs_follow_link(struct nameidata *nd, const char *link) } res = link_path_walk(link, nd); out: - if (current->link_count || res || nd->last_type!=LAST_NORM) + if (nd->depth || res || nd->last_type!=LAST_NORM) return res; /* * If it is an iterative symlinks resolution in open_namei() we @@ -2242,6 +2282,30 @@ int page_readlink(struct dentry *dentry, char __user *buffer, int buflen) return res; } +int page_follow_link_light(struct dentry *dentry, struct nameidata *nd) +{ + struct page *page; + char *s = page_getlink(dentry, &page); + if (!IS_ERR(s)) { + nd_set_link(nd, s); + s = NULL; + } + return PTR_ERR(s); +} + +void page_put_link(struct dentry *dentry, struct nameidata *nd) +{ + if (!IS_ERR(nd_get_link(nd))) { + struct page *page; + page = find_get_page(dentry->d_inode->i_mapping, 0); + if (!page) + BUG(); + kunmap(page); + page_cache_release(page); + page_cache_release(page); + } +} + int page_follow_link(struct dentry *dentry, struct nameidata *nd) { struct page *page = NULL; @@ -2296,8 +2360,9 @@ fail: } struct inode_operations page_symlink_inode_operations = { - .readlink = page_readlink, - .follow_link = page_follow_link, + .readlink = generic_readlink, + .follow_link = page_follow_link_light, + .put_link = page_put_link, }; EXPORT_SYMBOL(__user_walk); @@ -2310,6 +2375,8 @@ EXPORT_SYMBOL(lookup_create); EXPORT_SYMBOL(lookup_hash); EXPORT_SYMBOL(lookup_one_len); EXPORT_SYMBOL(page_follow_link); +EXPORT_SYMBOL(page_follow_link_light); +EXPORT_SYMBOL(page_put_link); EXPORT_SYMBOL(page_readlink); EXPORT_SYMBOL(page_symlink); EXPORT_SYMBOL(page_symlink_inode_operations); @@ -2329,3 +2396,4 @@ EXPORT_SYMBOL(vfs_rename); EXPORT_SYMBOL(vfs_rmdir); EXPORT_SYMBOL(vfs_symlink); EXPORT_SYMBOL(vfs_unlink); +EXPORT_SYMBOL(generic_readlink); diff --git a/fs/partitions/msdos.c b/fs/partitions/msdos.c index e98505bf803d..100fa7548a42 100644 --- a/fs/partitions/msdos.c +++ b/fs/partitions/msdos.c @@ -422,8 +422,8 @@ int msdos_partition(struct parsed_partitions *state, struct block_device *bdev) * On the second pass look inside *BSD, Unixware and Solaris partitions. */ - state->next = DOS_EXTENDED_PARTITION; - for (slot = 1 ; slot < DOS_EXTENDED_PARTITION ; slot++, p++) { + state->next = 5; + for (slot = 1 ; slot <= 4 ; slot++, p++) { u32 start = START_SECT(p)*sector_size; u32 size = NR_SECTS(p)*sector_size; if (!size) @@ -450,7 +450,7 @@ int msdos_partition(struct parsed_partitions *state, struct block_device *bdev) /* second pass - output for each on a separate line */ p = (struct partition *) (0x1be + data); - for (slot = 1 ; slot < DOS_EXTENDED_PARTITION ; slot++, p++) { + for (slot = 1 ; slot <= 4 ; slot++, p++) { unsigned char id = SYS_IND(p); int n; diff --git a/fs/proc/generic.c b/fs/proc/generic.c index bc3e3e0af651..b16a42d5f682 100644 --- a/fs/proc/generic.c +++ b/fs/proc/generic.c @@ -17,6 +17,7 @@ #include <linux/smp_lock.h> #include <linux/init.h> #include <linux/idr.h> +#include <linux/namei.h> #include <asm/uaccess.h> #include <asm/bitops.h> @@ -321,21 +322,14 @@ static void release_inode_number(unsigned int inum) spin_unlock(&proc_inum_lock); } -static int -proc_readlink(struct dentry *dentry, char __user *buffer, int buflen) -{ - char *s = PDE(dentry->d_inode)->data; - return vfs_readlink(dentry, buffer, buflen, s); -} - static int proc_follow_link(struct dentry *dentry, struct nameidata *nd) { - char *s = PDE(dentry->d_inode)->data; - return vfs_follow_link(nd, s); + nd_set_link(nd, PDE(dentry->d_inode)->data); + return 0; } static struct inode_operations proc_link_inode_operations = { - .readlink = proc_readlink, + .readlink = generic_readlink, .follow_link = proc_follow_link, }; diff --git a/fs/proc/kcore.c b/fs/proc/kcore.c index 1f55db799b51..3b1f58300d36 100644 --- a/fs/proc/kcore.c +++ b/fs/proc/kcore.c @@ -18,6 +18,7 @@ #include <linux/elfcore.h> #include <linux/vmalloc.h> #include <linux/highmem.h> +#include <linux/init.h> #include <asm/uaccess.h> #include <asm/io.h> @@ -84,8 +85,6 @@ kclist_del(void *addr) return 0; } -extern char saved_command_line[]; - static size_t get_kcore_size(int *nphdr, size_t *elf_buflen) { size_t try, size; diff --git a/fs/proc/proc_misc.c b/fs/proc/proc_misc.c index a46bd705e93b..415d6ee489b4 100644 --- a/fs/proc/proc_misc.c +++ b/fs/proc/proc_misc.c @@ -518,7 +518,6 @@ static int filesystems_read_proc(char *page, char **start, off_t off, static int cmdline_read_proc(char *page, char **start, off_t off, int count, int *eof, void *data) { - extern char saved_command_line[]; int len; len = sprintf(page, "%s\n", saved_command_line); diff --git a/fs/quota.c b/fs/quota.c index cf2c31ea8df0..3dd9be6b2377 100644 --- a/fs/quota.c +++ b/fs/quota.c @@ -141,7 +141,7 @@ void sync_dquots(struct super_block *sb, int type) sb->s_qcop->quota_sync(sb, type); } else { - while ((sb = get_super_to_sync(type))) { + while ((sb = get_super_to_sync(type)) != 0) { if (sb->s_qcop->quota_sync) sb->s_qcop->quota_sync(sb, type); drop_super(sb); diff --git a/fs/reiserfs/namei.c b/fs/reiserfs/namei.c index 52d88ae28302..48eb7986166f 100644 --- a/fs/reiserfs/namei.c +++ b/fs/reiserfs/namei.c @@ -1389,8 +1389,9 @@ struct inode_operations reiserfs_dir_inode_operations = { * stuff added */ struct inode_operations reiserfs_symlink_inode_operations = { - .readlink = page_readlink, - .follow_link = page_follow_link, + .readlink = generic_readlink, + .follow_link = page_follow_link_light, + .put_link = page_put_link, .setattr = reiserfs_setattr, .setxattr = reiserfs_setxattr, .getxattr = reiserfs_getxattr, diff --git a/fs/smbfs/proto.h b/fs/smbfs/proto.h index 7266ff5f3d58..e8946c455d8b 100644 --- a/fs/smbfs/proto.h +++ b/fs/smbfs/proto.h @@ -87,7 +87,5 @@ extern int smb_request_send_req(struct smb_request *req); extern int smb_request_send_server(struct smb_sb_info *server); extern int smb_request_recv(struct smb_sb_info *server); /* symlink.c */ -extern int smb_read_link(struct dentry *dentry, char *buffer, int len); extern int smb_symlink(struct inode *inode, struct dentry *dentry, const char *oldname); -extern int smb_follow_link(struct dentry *dentry, struct nameidata *nd); extern struct inode_operations smb_link_inode_operations; diff --git a/fs/smbfs/symlink.c b/fs/smbfs/symlink.c index 44d6f58b0741..8b069e06433d 100644 --- a/fs/smbfs/symlink.c +++ b/fs/smbfs/symlink.c @@ -16,6 +16,7 @@ #include <linux/pagemap.h> #include <linux/smp_lock.h> #include <linux/net.h> +#include <linux/namei.h> #include <asm/uaccess.h> #include <asm/system.h> @@ -26,19 +27,6 @@ #include "smb_debug.h" #include "proto.h" -int smb_read_link(struct dentry *dentry, char *buffer, int len) -{ - char link[256]; /* FIXME: pain ... */ - int r; - DEBUG1("read link buffer len = %d\n", len); - - r = smb_proc_read_link(server_from_dentry(dentry), dentry, link, - sizeof(link) - 1); - if (r < 0) - return -ENOENT; - return vfs_readlink(dentry, buffer, len, link); -} - int smb_symlink(struct inode *inode, struct dentry *dentry, const char *oldname) { DEBUG1("create symlink %s -> %s/%s\n", oldname, DENTRY_PATH(dentry)); @@ -46,24 +34,37 @@ int smb_symlink(struct inode *inode, struct dentry *dentry, const char *oldname) return smb_proc_symlink(server_from_dentry(dentry), dentry, oldname); } -int smb_follow_link(struct dentry *dentry, struct nameidata *nd) +static int smb_follow_link(struct dentry *dentry, struct nameidata *nd) { - char link[256]; /* FIXME: pain ... */ - int len; + char *link = __getname(); DEBUG1("followlink of %s/%s\n", DENTRY_PATH(dentry)); - len = smb_proc_read_link(server_from_dentry(dentry), dentry, link, - sizeof(link) - 1); - if(len < 0) - return -ENOENT; - - link[len] = 0; - return vfs_follow_link(nd, link); + if (!link) { + link = ERR_PTR(-ENOMEM); + } else { + int len = smb_proc_read_link(server_from_dentry(dentry), + dentry, link, PATH_MAX - 1); + if (len < 0) { + putname(link); + link = ERR_PTR(len); + } else { + link[len] = 0; + } + } + nd_set_link(nd, link); + return 0; } +static void smb_put_link(struct dentry *dentry, struct nameidata *nd) +{ + char *s = nd_get_link(nd); + if (!IS_ERR(s)) + putname(s); +} struct inode_operations smb_link_inode_operations = { - .readlink = smb_read_link, + .readlink = generic_readlink, .follow_link = smb_follow_link, + .put_link = smb_put_link, }; diff --git a/fs/sysv/inode.c b/fs/sysv/inode.c index 379d42408f53..960da9b041a4 100644 --- a/fs/sysv/inode.c +++ b/fs/sysv/inode.c @@ -142,8 +142,9 @@ static inline void write3byte(struct sysv_sb_info *sbi, } static struct inode_operations sysv_symlink_inode_operations = { - .readlink = page_readlink, - .follow_link = page_follow_link, + .readlink = generic_readlink, + .follow_link = page_follow_link_light, + .put_link = page_put_link, .getattr = sysv_getattr, }; diff --git a/fs/sysv/symlink.c b/fs/sysv/symlink.c index 97ea7613782c..ed637db2dcb1 100644 --- a/fs/sysv/symlink.c +++ b/fs/sysv/symlink.c @@ -6,20 +6,15 @@ */ #include "sysv.h" - -static int sysv_readlink(struct dentry *dentry, char *buffer, int buflen) -{ - char *s = (char *)SYSV_I(dentry->d_inode)->i_data; - return vfs_readlink(dentry, buffer, buflen, s); -} +#include <linux/namei.h> static int sysv_follow_link(struct dentry *dentry, struct nameidata *nd) { - char *s = (char *)SYSV_I(dentry->d_inode)->i_data; - return vfs_follow_link(nd, s); + nd_set_link(nd, (char *)SYSV_I(dentry->d_inode)->i_data); + return 0; } struct inode_operations sysv_fast_symlink_inode_operations = { - .readlink = sysv_readlink, + .readlink = generic_readlink, .follow_link = sysv_follow_link, }; diff --git a/fs/ufs/symlink.c b/fs/ufs/symlink.c index 245225e0da53..a0e49149098f 100644 --- a/fs/ufs/symlink.c +++ b/fs/ufs/symlink.c @@ -26,21 +26,17 @@ */ #include <linux/fs.h> +#include <linux/namei.h> #include <linux/ufs_fs.h> -static int ufs_readlink(struct dentry *dentry, char *buffer, int buflen) -{ - struct ufs_inode_info *p = UFS_I(dentry->d_inode); - return vfs_readlink(dentry, buffer, buflen, (char*)p->i_u1.i_symlink); -} - static int ufs_follow_link(struct dentry *dentry, struct nameidata *nd) { struct ufs_inode_info *p = UFS_I(dentry->d_inode); - return vfs_follow_link(nd, (char*)p->i_u1.i_symlink); + nd_set_link(nd, (char*)p->i_u1.i_symlink); + return 0; } struct inode_operations ufs_fast_symlink_inode_operations = { - .readlink = ufs_readlink, + .readlink = generic_readlink, .follow_link = ufs_follow_link, }; diff --git a/fs/xfs/linux-2.6/xfs_iops.c b/fs/xfs/linux-2.6/xfs_iops.c index f43f7c370ca7..a76f59645b64 100644 --- a/fs/xfs/linux-2.6/xfs_iops.c +++ b/fs/xfs/linux-2.6/xfs_iops.c @@ -67,6 +67,7 @@ #include "xfs_utils.h" #include <linux/xattr.h> +#include <linux/namei.h> /* @@ -419,13 +420,16 @@ linvfs_follow_link( ASSERT(nd); link = (char *)kmalloc(MAXNAMELEN+1, GFP_KERNEL); - if (!link) - return -ENOMEM; + if (!link) { + nd_set_link(nd, ERR_PTR(-ENOMEM)); + return 0; + } uio = (uio_t *)kmalloc(sizeof(uio_t), GFP_KERNEL); if (!uio) { kfree(link); - return -ENOMEM; + nd_set_link(nd, ERR_PTR(-ENOMEM)); + return 0; } vp = LINVFS_GET_VP(dentry->d_inode); @@ -441,18 +445,22 @@ linvfs_follow_link( VOP_READLINK(vp, uio, 0, NULL, error); if (error) { - kfree(uio); kfree(link); - return -error; + link = ERR_PTR(-error); + } else { + link[MAXNAMELEN - uio->uio_resid] = '\0'; } - - link[MAXNAMELEN - uio->uio_resid] = '\0'; kfree(uio); - /* vfs_follow_link returns (-) errors */ - error = vfs_follow_link(nd, link); - kfree(link); - return error; + nd_set_link(nd, link); + return 0; +} + +static void linvfs_put_link(struct dentry *dentry, struct nameidata *nd) +{ + char *s = nd_get_link(nd); + if (!IS_ERR(s)) + kfree(s); } #ifdef CONFIG_XFS_POSIX_ACL @@ -692,6 +700,7 @@ struct inode_operations linvfs_dir_inode_operations = { struct inode_operations linvfs_symlink_inode_operations = { .readlink = linvfs_readlink, .follow_link = linvfs_follow_link, + .put_link = linvfs_put_link, .permission = linvfs_permission, .getattr = linvfs_getattr, .setattr = linvfs_setattr, diff --git a/include/asm-alpha/checksum.h b/include/asm-alpha/checksum.h index f3e379787ecd..a5c9f08447fb 100644 --- a/include/asm-alpha/checksum.h +++ b/include/asm-alpha/checksum.h @@ -1,6 +1,7 @@ #ifndef _ALPHA_CHECKSUM_H #define _ALPHA_CHECKSUM_H +#include <linux/in6.h> /* * This is a version of ip_compute_csum() optimized for IP headers, diff --git a/include/asm-alpha/cpumask.h b/include/asm-alpha/cpumask.h deleted file mode 100644 index bc3381ad1643..000000000000 --- a/include/asm-alpha/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_ALPHA_CPUMASK_H -#define _ASM_ALPHA_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_ALPHA_CPUMASK_H */ diff --git a/include/asm-alpha/setup.h b/include/asm-alpha/setup.h new file mode 100644 index 000000000000..2e023a4aa317 --- /dev/null +++ b/include/asm-alpha/setup.h @@ -0,0 +1,6 @@ +#ifndef __ALPHA_SETUP_H +#define __ALPHA_SETUP_H + +#define COMMAND_LINE_SIZE 256 + +#endif diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h index d342a017ceb6..cbc173ae45aa 100644 --- a/include/asm-alpha/smp.h +++ b/include/asm-alpha/smp.h @@ -50,9 +50,7 @@ extern cpumask_t cpu_online_map; extern int smp_num_cpus; #define cpu_possible_map cpu_present_mask -#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) - -extern int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, unsigned long cpu); +int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu); #else /* CONFIG_SMP */ diff --git a/include/asm-alpha/system.h b/include/asm-alpha/system.h index 606a0553c688..1e5ac92d2073 100644 --- a/include/asm-alpha/system.h +++ b/include/asm-alpha/system.h @@ -43,7 +43,6 @@ */ #define PARAM ZERO_PGE #define COMMAND_LINE ((char*)(PARAM + 0x0000)) -#define COMMAND_LINE_SIZE 256 #define INITRD_START (*(unsigned long *) (PARAM+0x100)) #define INITRD_SIZE (*(unsigned long *) (PARAM+0x108)) diff --git a/include/asm-arm/cpumask.h b/include/asm-arm/cpumask.h deleted file mode 100644 index e3cf01fdf9c9..000000000000 --- a/include/asm-arm/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_ARM_CPUMASK_H -#define _ASM_ARM_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_ARM_CPUMASK_H */ diff --git a/include/asm-arm26/cpumask.h b/include/asm-arm26/cpumask.h deleted file mode 100644 index d181df4ed512..000000000000 --- a/include/asm-arm26/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_ARM26_CPUMASK_H -#define _ASM_ARM26_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_ARM26_CPUMASK_H */ diff --git a/include/asm-cris/cpumask.h b/include/asm-cris/cpumask.h deleted file mode 100644 index 123b032a6eae..000000000000 --- a/include/asm-cris/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_CRIS_CPUMASK_H -#define _ASM_CRIS_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_CRIS_CPUMASK_H */ diff --git a/include/asm-cris/setup.h b/include/asm-cris/setup.h index 832c197edf48..b90728652d1a 100644 --- a/include/asm-cris/setup.h +++ b/include/asm-cris/setup.h @@ -1,3 +1,6 @@ #ifndef _CRIS_SETUP_H #define _CRIS_SETUP_H + +#define COMMAND_LINE_SIZE 256 + #endif diff --git a/include/asm-generic/bitops.h b/include/asm-generic/bitops.h index 23ac5227b702..ce31b739fd80 100644 --- a/include/asm-generic/bitops.h +++ b/include/asm-generic/bitops.h @@ -42,7 +42,7 @@ extern __inline__ int clear_bit(int nr, long * addr) return retval; } -extern __inline__ int test_bit(int nr, long * addr) +extern __inline__ int test_bit(int nr, const unsigned long * addr) { int mask; diff --git a/include/asm-generic/cpumask.h b/include/asm-generic/cpumask.h deleted file mode 100644 index a5103259d7a9..000000000000 --- a/include/asm-generic/cpumask.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef __ASM_GENERIC_CPUMASK_H -#define __ASM_GENERIC_CPUMASK_H - -#include <linux/config.h> -#include <linux/kernel.h> -#include <linux/threads.h> -#include <linux/types.h> -#include <linux/bitmap.h> - -#if NR_CPUS > BITS_PER_LONG && NR_CPUS != 1 -#define CPU_ARRAY_SIZE BITS_TO_LONGS(NR_CPUS) - -struct cpumask -{ - unsigned long mask[CPU_ARRAY_SIZE]; -}; - -typedef struct cpumask cpumask_t; - -#else -typedef unsigned long cpumask_t; -#endif - -#ifdef CONFIG_SMP -#if NR_CPUS > BITS_PER_LONG -#include <asm-generic/cpumask_array.h> -#else -#include <asm-generic/cpumask_arith.h> -#endif -#else -#include <asm-generic/cpumask_up.h> -#endif - -#if NR_CPUS <= 4*BITS_PER_LONG -#include <asm-generic/cpumask_const_value.h> -#else -#include <asm-generic/cpumask_const_reference.h> -#endif - -#endif /* __ASM_GENERIC_CPUMASK_H */ diff --git a/include/asm-generic/cpumask_arith.h b/include/asm-generic/cpumask_arith.h deleted file mode 100644 index b4d25ac46a9f..000000000000 --- a/include/asm-generic/cpumask_arith.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef __ASM_GENERIC_CPUMASK_ARITH_H -#define __ASM_GENERIC_CPUMASK_ARITH_H - -/* - * Arithmetic type -based cpu bitmaps. A single unsigned long is used - * to contain the whole cpu bitmap. - */ - -#define cpu_set(cpu, map) set_bit(cpu, &(map)) -#define cpu_clear(cpu, map) clear_bit(cpu, &(map)) -#define cpu_isset(cpu, map) test_bit(cpu, &(map)) -#define cpu_test_and_set(cpu, map) test_and_set_bit(cpu, &(map)) - -#define cpus_and(dst,src1,src2) do { dst = (src1) & (src2); } while (0) -#define cpus_or(dst,src1,src2) do { dst = (src1) | (src2); } while (0) -#define cpus_clear(map) do { map = 0; } while (0) -#define cpus_complement(map) do { map = ~(map); } while (0) -#define cpus_equal(map1, map2) ((map1) == (map2)) -#define cpus_empty(map) ((map) == 0) -#define cpus_addr(map) (&(map)) - -#if BITS_PER_LONG == 32 -#define cpus_weight(map) hweight32(map) -#elif BITS_PER_LONG == 64 -#define cpus_weight(map) hweight64(map) -#endif - -#define cpus_shift_right(dst, src, n) do { dst = (src) >> (n); } while (0) -#define cpus_shift_left(dst, src, n) do { dst = (src) << (n); } while (0) - -#define any_online_cpu(map) \ -({ \ - cpumask_t __tmp__; \ - cpus_and(__tmp__, map, cpu_online_map); \ - __tmp__ ? first_cpu(__tmp__) : NR_CPUS; \ -}) - -#define CPU_MASK_ALL (~((cpumask_t)0) >> (8*sizeof(cpumask_t) - NR_CPUS)) -#define CPU_MASK_NONE ((cpumask_t)0) - -/* only ever use this for things that are _never_ used on large boxen */ -#define cpus_coerce(map) ((unsigned long)(map)) -#define cpus_promote(map) ({ map; }) -#define cpumask_of_cpu(cpu) ({ ((cpumask_t)1) << (cpu); }) - -#define first_cpu(map) find_first_bit(&(map), NR_CPUS) -#define next_cpu(cpu, map) find_next_bit(&(map), NR_CPUS, cpu + 1) - -#endif /* __ASM_GENERIC_CPUMASK_ARITH_H */ diff --git a/include/asm-generic/cpumask_array.h b/include/asm-generic/cpumask_array.h deleted file mode 100644 index ddd6e1185dba..000000000000 --- a/include/asm-generic/cpumask_array.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef __ASM_GENERIC_CPUMASK_ARRAY_H -#define __ASM_GENERIC_CPUMASK_ARRAY_H - -/* - * Array-based cpu bitmaps. An array of unsigned longs is used to contain - * the bitmap, and then contained in a structure so it may be passed by - * value. - */ - -#define CPU_ARRAY_SIZE BITS_TO_LONGS(NR_CPUS) - -#define cpu_set(cpu, map) set_bit(cpu, (map).mask) -#define cpu_clear(cpu, map) clear_bit(cpu, (map).mask) -#define cpu_isset(cpu, map) test_bit(cpu, (map).mask) -#define cpu_test_and_set(cpu, map) test_and_set_bit(cpu, (map).mask) - -#define cpus_and(dst,src1,src2) bitmap_and((dst).mask,(src1).mask, (src2).mask, NR_CPUS) -#define cpus_or(dst,src1,src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, NR_CPUS) -#define cpus_clear(map) bitmap_zero((map).mask, NR_CPUS) -#define cpus_complement(map) bitmap_complement((map).mask, NR_CPUS) -#define cpus_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, NR_CPUS) -#define cpus_empty(map) bitmap_empty(map.mask, NR_CPUS) -#define cpus_addr(map) ((map).mask) -#define cpus_weight(map) bitmap_weight((map).mask, NR_CPUS) -#define cpus_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, NR_CPUS) -#define cpus_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, NR_CPUS) -#define first_cpu(map) find_first_bit((map).mask, NR_CPUS) -#define next_cpu(cpu, map) find_next_bit((map).mask, NR_CPUS, cpu + 1) - -/* only ever use this for things that are _never_ used on large boxen */ -#define cpus_coerce(map) ((map).mask[0]) -#define cpus_promote(map) ({ cpumask_t __cpu_mask = CPU_MASK_NONE;\ - __cpu_mask.mask[0] = map; \ - __cpu_mask; \ - }) -#define cpumask_of_cpu(cpu) ({ cpumask_t __cpu_mask = CPU_MASK_NONE;\ - cpu_set(cpu, __cpu_mask); \ - __cpu_mask; \ - }) -#define any_online_cpu(map) \ -({ \ - cpumask_t __tmp__; \ - cpus_and(__tmp__, map, cpu_online_map); \ - find_first_bit(__tmp__.mask, NR_CPUS); \ -}) - - -/* - * um, these need to be usable as static initializers - */ -#define CPU_MASK_ALL ((cpumask_t) { {[0 ... CPU_ARRAY_SIZE-1] = ~0UL} }) -#define CPU_MASK_NONE ((cpumask_t) { {[0 ... CPU_ARRAY_SIZE-1] = 0UL} }) - -#endif /* __ASM_GENERIC_CPUMASK_ARRAY_H */ diff --git a/include/asm-generic/cpumask_const_reference.h b/include/asm-generic/cpumask_const_reference.h deleted file mode 100644 index e98da01bcfdf..000000000000 --- a/include/asm-generic/cpumask_const_reference.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H -#define __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H - -struct cpumask_ref { - const cpumask_t *val; -}; - -typedef const struct cpumask_ref cpumask_const_t; - -#define mk_cpumask_const(map) ((cpumask_const_t){ &(map) }) -#define cpu_isset_const(cpu, map) cpu_isset(cpu, *(map).val) - -#define cpus_and_const(dst,src1,src2) cpus_and(dst,*(src1).val,*(src2).val) -#define cpus_or_const(dst,src1,src2) cpus_or(dst,*(src1).val,*(src2).val) - -#define cpus_equal_const(map1, map2) cpus_equal(*(map1).val, *(map2).val) - -#define cpus_copy_const(map1, map2) bitmap_copy((map1).mask, (map2).val->mask, NR_CPUS) - -#define cpus_empty_const(map) cpus_empty(*(map).val) -#define cpus_weight_const(map) cpus_weight(*(map).val) -#define first_cpu_const(map) first_cpu(*(map).val) -#define next_cpu_const(cpu, map) next_cpu(cpu, *(map).val) - -/* only ever use this for things that are _never_ used on large boxen */ -#define cpus_coerce_const(map) cpus_coerce(*(map).val) -#define any_online_cpu_const(map) any_online_cpu(*(map).val) - -#endif /* __ASM_GENERIC_CPUMASK_CONST_REFERENCE_H */ diff --git a/include/asm-generic/cpumask_const_value.h b/include/asm-generic/cpumask_const_value.h deleted file mode 100644 index 16ca16d286dc..000000000000 --- a/include/asm-generic/cpumask_const_value.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __ASM_GENERIC_CPUMASK_CONST_VALUE_H -#define __ASM_GENERIC_CPUMASK_CONST_VALUE_H - -typedef const cpumask_t cpumask_const_t; - -#define mk_cpumask_const(map) (map) -#define cpu_isset_const(cpu, map) cpu_isset(cpu, map) -#define cpus_and_const(dst,src1,src2) cpus_and(dst, src1, src2) -#define cpus_or_const(dst,src1,src2) cpus_or(dst, src1, src2) -#define cpus_equal_const(map1, map2) cpus_equal(map1, map2) -#define cpus_empty_const(map) cpus_empty(map) -#define cpus_copy_const(map1, map2) do { map1 = (cpumask_t)map2; } while (0) -#define cpus_weight_const(map) cpus_weight(map) -#define first_cpu_const(map) first_cpu(map) -#define next_cpu_const(cpu, map) next_cpu(cpu, map) - -/* only ever use this for things that are _never_ used on large boxen */ -#define cpus_coerce_const(map) cpus_coerce(map) -#define any_online_cpu_const(map) any_online_cpu(map) - -#endif /* __ASM_GENERIC_CPUMASK_CONST_VALUE_H */ diff --git a/include/asm-generic/cpumask_up.h b/include/asm-generic/cpumask_up.h deleted file mode 100644 index f55c265a0e3b..000000000000 --- a/include/asm-generic/cpumask_up.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef __ASM_GENERIC_CPUMASK_UP_H -#define __ASM_GENERIC_CPUMASK_UP_H - -#define cpus_coerce(map) (map) - -#define cpu_set(cpu, map) do { (void)(cpu); cpus_coerce(map) = 1UL; } while (0) -#define cpu_clear(cpu, map) do { (void)(cpu); cpus_coerce(map) = 0UL; } while (0) -#define cpu_isset(cpu, map) ((void)(cpu), cpus_coerce(map) != 0UL) -#define cpu_test_and_set(cpu, map) ((void)(cpu), test_and_set_bit(0, &(map))) - -#define cpus_and(dst, src1, src2) \ - do { \ - if (cpus_coerce(src1) && cpus_coerce(src2)) \ - cpus_coerce(dst) = 1UL; \ - else \ - cpus_coerce(dst) = 0UL; \ - } while (0) - -#define cpus_or(dst, src1, src2) \ - do { \ - if (cpus_coerce(src1) || cpus_coerce(src2)) \ - cpus_coerce(dst) = 1UL; \ - else \ - cpus_coerce(dst) = 0UL; \ - } while (0) - -#define cpus_clear(map) do { cpus_coerce(map) = 0UL; } while (0) - -#define cpus_complement(map) \ - do { \ - cpus_coerce(map) = !cpus_coerce(map); \ - } while (0) - -#define cpus_equal(map1, map2) (cpus_coerce(map1) == cpus_coerce(map2)) -#define cpus_empty(map) (cpus_coerce(map) == 0UL) -#define cpus_addr(map) (&(map)) -#define cpus_weight(map) (cpus_coerce(map) ? 1UL : 0UL) -#define cpus_shift_right(d, s, n) do { cpus_coerce(d) = 0UL; } while (0) -#define cpus_shift_left(d, s, n) do { cpus_coerce(d) = 0UL; } while (0) -#define first_cpu(map) (cpus_coerce(map) ? 0 : 1) -#define next_cpu(cpu, map) 1 - -/* only ever use this for things that are _never_ used on large boxen */ -#define cpus_promote(map) \ - ({ \ - cpumask_t __tmp__; \ - cpus_coerce(__tmp__) = map; \ - __tmp__; \ - }) -#define cpumask_of_cpu(cpu) ((void)(cpu), cpus_promote(1)) -#define any_online_cpu(map) (cpus_coerce(map) ? 0 : 1) - -/* - * um, these need to be usable as static initializers - */ -#define CPU_MASK_ALL 1UL -#define CPU_MASK_NONE 0UL - -#endif /* __ASM_GENERIC_CPUMASK_UP_H */ diff --git a/include/asm-h8300/cpumask.h b/include/asm-h8300/cpumask.h deleted file mode 100644 index 3b403850c043..000000000000 --- a/include/asm-h8300/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_H8300_CPUMASK_H -#define _ASM_H8300_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_H8300_CPUMASK_H */ diff --git a/include/asm-h8300/h8300_ne.h b/include/asm-h8300/h8300_ne.h deleted file mode 100644 index c797603f3819..000000000000 --- a/include/asm-h8300/h8300_ne.h +++ /dev/null @@ -1,20 +0,0 @@ -/****************************************************************************/ - -/* - * h8300_ne.h -- NE2000 in H8/300H Evalution Board. - * - * (C) Copyright 2002, Yoshinori Sato <ysato@users.sourceforge.jp> - */ - -/****************************************************************************/ -#ifndef h8300ne_h -#define h8300ne_h -/****************************************************************************/ - -#define H8300_NE_DEFINE -#include <asm/machine-depend.h> -#define NE2000_IRQ_VECTOR (12 + NE2000_IRQ) -#undef H8300_NE_DEFINE - -/****************************************************************************/ -#endif /* h8300ne_h */ diff --git a/include/asm-h8300/setup.h b/include/asm-h8300/setup.h index 4fc416e80bef..e2c600e96733 100644 --- a/include/asm-h8300/setup.h +++ b/include/asm-h8300/setup.h @@ -1 +1,6 @@ -/* Nothing do */ +#ifndef __H8300_SETUP_H +#define __H8300_SETUP_H + +#define COMMAND_LINE_SIZE 512 + +#endif diff --git a/include/asm-i386/cpumask.h b/include/asm-i386/cpumask.h deleted file mode 100644 index 8bf5a829c528..000000000000 --- a/include/asm-i386/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_I386_CPUMASK_H -#define _ASM_I386_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_I386_CPUMASK_H */ diff --git a/include/asm-i386/genapic.h b/include/asm-i386/genapic.h index d62ac259622c..fc813b2e8274 100644 --- a/include/asm-i386/genapic.h +++ b/include/asm-i386/genapic.h @@ -62,7 +62,7 @@ struct genapic { unsigned (*get_apic_id)(unsigned long x); unsigned long apic_id_mask; - unsigned int (*cpu_mask_to_apicid)(cpumask_const_t cpumask); + unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask); /* ipi */ void (*send_IPI_mask)(cpumask_t mask, int vector); diff --git a/include/asm-i386/mach-bigsmp/mach_apic.h b/include/asm-i386/mach-bigsmp/mach_apic.h index ab60c85a5c08..2339868270ef 100644 --- a/include/asm-i386/mach-bigsmp/mach_apic.h +++ b/include/asm-i386/mach-bigsmp/mach_apic.h @@ -28,11 +28,11 @@ static inline cpumask_t target_cpus(void) static unsigned long cpu = NR_CPUS; do { if (cpu >= NR_CPUS) - cpu = first_cpu_const(cpu_online_map); + cpu = first_cpu(cpu_online_map); else - cpu = next_cpu_const(cpu, cpu_online_map); + cpu = next_cpu(cpu, cpu_online_map); } while (cpu >= NR_CPUS); - return mk_cpumask_const(cpumask_of_cpu(cpu)); + return cpumask_of_cpu(cpu); } #define TARGET_CPUS (target_cpus()) @@ -149,12 +149,12 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) } /* As we are using single CPU as destination, pick only one CPU here */ -static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) { int cpu; int apicid; - cpu = first_cpu_const(cpumask); + cpu = first_cpu(cpumask); apicid = cpu_to_logical_apicid(cpu); return apicid; } diff --git a/include/asm-i386/mach-default/mach_apic.h b/include/asm-i386/mach-default/mach_apic.h index 87f688705979..627f1cd084ba 100644 --- a/include/asm-i386/mach-default/mach_apic.h +++ b/include/asm-i386/mach-default/mach_apic.h @@ -6,12 +6,12 @@ #define APIC_DFR_VALUE (APIC_DFR_FLAT) -static inline cpumask_const_t target_cpus(void) +static inline cpumask_t target_cpus(void) { #ifdef CONFIG_SMP - return mk_cpumask_const(cpu_online_map); + return cpu_online_map; #else - return mk_cpumask_const(cpumask_of_cpu(0)); + return cpumask_of_cpu(0); #endif } #define TARGET_CPUS (target_cpus()) @@ -116,9 +116,9 @@ static inline int apic_id_registered(void) return physid_isset(GET_APIC_ID(apic_read(APIC_ID)), phys_cpu_present_map); } -static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) { - return cpus_coerce_const(cpumask); + return cpus_addr(cpumask)[0]; } static inline void enable_apic_mode(void) diff --git a/include/asm-i386/mach-es7000/mach_apic.h b/include/asm-i386/mach-es7000/mach_apic.h index fd0430c77565..888f7f04262d 100644 --- a/include/asm-i386/mach-es7000/mach_apic.h +++ b/include/asm-i386/mach-es7000/mach_apic.h @@ -88,7 +88,7 @@ static inline void clustered_apic_check(void) int apic = bios_cpu_apicid[smp_processor_id()]; printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", (apic_version[apic] == 0x14) ? - "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_coerce(TARGET_CPUS)); + "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]); } static inline int multi_timer_check(int apic, int irq) @@ -158,14 +158,14 @@ static inline int check_phys_apicid_present(int cpu_physical_apicid) return (1); } -static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) { int num_bits_set; int cpus_found = 0; int cpu; int apicid; - num_bits_set = cpus_weight_const(cpumask); + num_bits_set = cpus_weight(cpumask); /* Return id to all */ if (num_bits_set == NR_CPUS) #if defined CONFIG_ES7000_CLUSTERED_APIC @@ -177,10 +177,10 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) * The cpus in the mask must all be on the apic cluster. If are not * on the same apicid cluster return default value of TARGET_CPUS. */ - cpu = first_cpu_const(cpumask); + cpu = first_cpu(cpumask); apicid = cpu_to_logical_apicid(cpu); while (cpus_found < num_bits_set) { - if (cpu_isset_const(cpu, cpumask)) { + if (cpu_isset(cpu, cpumask)) { int new_apicid = cpu_to_logical_apicid(cpu); if (apicid_cluster(apicid) != apicid_cluster(new_apicid)){ diff --git a/include/asm-i386/mach-es7000/mach_ipi.h b/include/asm-i386/mach-es7000/mach_ipi.h index 6b7a56c1ddd5..cb8a2fdb5c59 100644 --- a/include/asm-i386/mach-es7000/mach_ipi.h +++ b/include/asm-i386/mach-es7000/mach_ipi.h @@ -10,9 +10,8 @@ static inline void send_IPI_mask(cpumask_t mask, int vector) static inline void send_IPI_allbutself(int vector) { - cpumask_t mask = cpumask_of_cpu(smp_processor_id()); - cpus_complement(mask); - cpus_and(mask, mask, cpu_online_map); + cpumask_t mask = cpu_online_map; + cpu_clear(smp_processor_id(), mask); if (!cpus_empty(mask)) send_IPI_mask(mask, vector); } diff --git a/include/asm-i386/mach-numaq/mach_apic.h b/include/asm-i386/mach-numaq/mach_apic.h index b66e78d7b6df..b852593a1c7b 100644 --- a/include/asm-i386/mach-numaq/mach_apic.h +++ b/include/asm-i386/mach-numaq/mach_apic.h @@ -8,8 +8,7 @@ static inline cpumask_t target_cpus(void) { - cpumask_t tmp = CPU_MASK_ALL; - return tmp; + return CPU_MASK_ALL; } #define TARGET_CPUS (target_cpus()) @@ -135,7 +134,7 @@ static inline void enable_apic_mode(void) * We use physical apicids here, not logical, so just return the default * physical broadcast to stop people from breaking us */ -static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) { return (int) 0xF; } diff --git a/include/asm-i386/mach-summit/mach_apic.h b/include/asm-i386/mach-summit/mach_apic.h index 9ea48a79d629..214263a48f71 100644 --- a/include/asm-i386/mach-summit/mach_apic.h +++ b/include/asm-i386/mach-summit/mach_apic.h @@ -19,8 +19,7 @@ static inline cpumask_t target_cpus(void) { - cpumask_t tmp = CPU_MASK_ALL; - return tmp; + return CPU_MASK_ALL; } #define TARGET_CPUS (target_cpus()) @@ -139,14 +138,14 @@ static inline void enable_apic_mode(void) { } -static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) { int num_bits_set; int cpus_found = 0; int cpu; int apicid; - num_bits_set = cpus_weight_const(cpumask); + num_bits_set = cpus_weight(cpumask); /* Return id to all */ if (num_bits_set == NR_CPUS) return (int) 0xFF; @@ -154,10 +153,10 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) * The cpus in the mask must all be on the apic cluster. If are not * on the same apicid cluster return default value of TARGET_CPUS. */ - cpu = first_cpu_const(cpumask); + cpu = first_cpu(cpumask); apicid = cpu_to_logical_apicid(cpu); while (cpus_found < num_bits_set) { - if (cpu_isset_const(cpu, cpumask)) { + if (cpu_isset(cpu, cpumask)) { int new_apicid = cpu_to_logical_apicid(cpu); if (apicid_cluster(apicid) != apicid_cluster(new_apicid)){ diff --git a/include/asm-i386/mach-visws/mach_apic.h b/include/asm-i386/mach-visws/mach_apic.h index 4b92eabb92ff..c367d820f23f 100644 --- a/include/asm-i386/mach-visws/mach_apic.h +++ b/include/asm-i386/mach-visws/mach_apic.h @@ -86,9 +86,9 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); } -static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) { - return cpus_coerce_const(cpumask); + return cpus_addr(cpumask)[0]; } static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) diff --git a/include/asm-i386/mpspec.h b/include/asm-i386/mpspec.h index b2cc2feeb8a4..8170e019af8d 100644 --- a/include/asm-i386/mpspec.h +++ b/include/asm-i386/mpspec.h @@ -53,7 +53,7 @@ typedef struct physid_mask physid_mask_t; #define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS) #define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS) #define physids_clear(map) bitmap_zero((map).mask, MAX_APICS) -#define physids_complement(map) bitmap_complement((map).mask, MAX_APICS) +#define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS) #define physids_empty(map) bitmap_empty((map).mask, MAX_APICS) #define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS) #define physids_weight(map) bitmap_weight((map).mask, MAX_APICS) diff --git a/include/asm-i386/param.h b/include/asm-i386/param.h index e0a47502836d..b6440526e42a 100644 --- a/include/asm-i386/param.h +++ b/include/asm-i386/param.h @@ -18,5 +18,6 @@ #endif #define MAXHOSTNAMELEN 64 /* max length of hostname */ +#define COMMAND_LINE_SIZE 256 #endif diff --git a/include/asm-i386/spinlock.h b/include/asm-i386/spinlock.h index 8bd4f23a562e..d6dbfd469565 100644 --- a/include/asm-i386/spinlock.h +++ b/include/asm-i386/spinlock.h @@ -42,7 +42,6 @@ typedef struct { #define spin_is_locked(x) (*(volatile signed char *)(&(x)->lock) <= 0) #define spin_unlock_wait(x) do { barrier(); } while(spin_is_locked(x)) -#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) #define spin_lock_string \ "\n1:\t" \ @@ -56,6 +55,23 @@ typedef struct { "jmp 1b\n" \ LOCK_SECTION_END +#define spin_lock_string_flags \ + "\n1:\t" \ + "lock ; decb %0\n\t" \ + "js 2f\n\t" \ + LOCK_SECTION_START("") \ + "2:\t" \ + "testl $0x200, %1\n\t" \ + "jz 3f\n\t" \ + "sti\n\t" \ + "3:\t" \ + "rep;nop\n\t" \ + "cmpb $0, %0\n\t" \ + "jle 3b\n\t" \ + "cli\n\t" \ + "jmp 1b\n" \ + LOCK_SECTION_END + /* * This works. Despite all the confusion. * (except on PPro SMP or if we are using OOSTORE) @@ -126,6 +142,20 @@ here: :"=m" (lock->lock) : : "memory"); } +static inline void _raw_spin_lock_flags (spinlock_t *lock, unsigned long flags) +{ +#ifdef CONFIG_DEBUG_SPINLOCK + __label__ here; +here: + if (unlikely(lock->magic != SPINLOCK_MAGIC)) { + printk("eip: %p\n", &&here); + BUG(); + } +#endif + __asm__ __volatile__( + spin_lock_string_flags + :"=m" (lock->lock) : "r" (flags) : "memory"); +} /* * Read-write spinlocks, allowing multiple readers diff --git a/include/asm-ia64/cpumask.h b/include/asm-ia64/cpumask.h deleted file mode 100644 index 7764aef653e8..000000000000 --- a/include/asm-ia64/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_IA64_CPUMASK_H -#define _ASM_IA64_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_IA64_CPUMASK_H */ diff --git a/include/asm-ia64/setup.h b/include/asm-ia64/setup.h new file mode 100644 index 000000000000..ea29b57affcb --- /dev/null +++ b/include/asm-ia64/setup.h @@ -0,0 +1,6 @@ +#ifndef __IA64_SETUP_H +#define __IA64_SETUP_H + +#define COMMAND_LINE_SIZE 512 + +#endif diff --git a/include/asm-m68k/cpumask.h b/include/asm-m68k/cpumask.h deleted file mode 100644 index b12450332e19..000000000000 --- a/include/asm-m68k/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_M68K_CPUMASK_H -#define _ASM_M68K_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_M68K_CPUMASK_H */ diff --git a/include/asm-m68k/setup.h b/include/asm-m68k/setup.h index 47b4627ef846..ce2762822a2b 100644 --- a/include/asm-m68k/setup.h +++ b/include/asm-m68k/setup.h @@ -357,6 +357,7 @@ extern int m68k_is040or060; #define NUM_MEMINFO 4 #define CL_SIZE 256 +#define COMMAND_LINE_SIZE CL_SIZE #ifndef __ASSEMBLY__ extern int m68k_num_memory; /* # of memory blocks found (and used) */ diff --git a/include/asm-m68knommu/cpumask.h b/include/asm-m68knommu/cpumask.h deleted file mode 100644 index cd9cc78af838..000000000000 --- a/include/asm-m68knommu/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_M68KNOMMU_CPUMASK_H -#define _ASM_M68KNOMMU_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_M68KNOMMU_CPUMASK_H */ diff --git a/include/asm-m68knommu/setup.h b/include/asm-m68knommu/setup.h index ff4565ead5d7..d2b0fcce41b2 100644 --- a/include/asm-m68knommu/setup.h +++ b/include/asm-m68knommu/setup.h @@ -1 +1,5 @@ #include <asm-m68k/setup.h> + +/* We have a bigger command line buffer. */ +#undef COMMAND_LINE_SIZE +#define COMMAND_LINE_SIZE 512 diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h index c70f00d83364..37a460aa0378 100644 --- a/include/asm-mips/asmmacro.h +++ b/include/asm-mips/asmmacro.h @@ -9,6 +9,7 @@ #define _ASM_ASMMACRO_H #include <linux/config.h> +#include <asm/hazards.h> #ifdef CONFIG_MIPS32 #include <asm/asmmacro-32.h> @@ -21,6 +22,7 @@ mfc0 \reg, CP0_STATUS ori \reg, \reg, 1 mtc0 \reg, CP0_STATUS + irq_enable_hazard .endm .macro local_irq_disable reg=t0 @@ -28,7 +30,7 @@ ori \reg, \reg, 1 xori \reg, \reg, 1 mtc0 \reg, CP0_STATUS - SSNOP; SSNOP; SSNOP + irq_disable_hazard .endm #ifdef CONFIG_CPU_SB1 diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 1262c6eafb95..c8c6a5a8c5aa 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -9,7 +9,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (C) 1996, 97, 99, 2000, 03 by Ralf Baechle + * Copyright (C) 1996, 97, 99, 2000, 03, 04 by Ralf Baechle */ /* @@ -127,6 +127,32 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) return result; } +/* + * atomic_sub_if_positive - add integer to atomic variable + * @v: pointer of type atomic_t + * + * Atomically test @v and decrement if it is greater than 0. + * The function returns the old value of @v minus 1. + */ +static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) +{ + unsigned long temp, result; + + __asm__ __volatile__( + "1: ll %1, %2 # atomic_sub_if_positive\n" + " subu %0, %1, %3 \n" + " bltz %0, 1f \n" + " sc %0, %2 \n" + " beqz %0, 1b \n" + " sync \n" + "1: \n" + : "=&r" (result), "=&r" (temp), "=m" (v->counter) + : "Ir" (i), "m" (v->counter) + : "memory"); + + return result; +} + #else /* @@ -192,6 +218,28 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) return temp; } +/* + * atomic_sub_if_positive - add integer to atomic variable + * @v: pointer of type atomic_t + * + * Atomically test @v and decrement if it is greater than 0. + * The function returns the old value of @v minus 1. + */ +static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) +{ + unsigned long flags; + int temp; + + spin_lock_irqsave(&atomic_lock, flags); + temp = v->counter; + temp -= i; + if (temp >= 0) + v->counter = temp; + spin_unlock_irqrestore(&atomic_lock, flags); + + return temp; +} + #endif /* CONFIG_CPU_HAS_LLSC */ #define atomic_dec_return(v) atomic_sub_return(1,(v)) @@ -229,6 +277,12 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) /* + * atomic_dec_if_positive - decrement by 1 if old value positive + * @v: pointer of type atomic_t + */ +#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v) + +/* * atomic_inc - increment atomic variable * @v: pointer of type atomic_t * @@ -284,7 +338,7 @@ typedef struct { volatile __s64 counter; } atomic64_t; * * Atomically adds @i to @v. */ -static __inline__ void atomic64_add(int i, atomic64_t * v) +static __inline__ void atomic64_add(long i, atomic64_t * v) { unsigned long temp; @@ -304,7 +358,7 @@ static __inline__ void atomic64_add(int i, atomic64_t * v) * * Atomically subtracts @i from @v. */ -static __inline__ void atomic64_sub(int i, atomic64_t * v) +static __inline__ void atomic64_sub(long i, atomic64_t * v) { unsigned long temp; @@ -320,7 +374,7 @@ static __inline__ void atomic64_sub(int i, atomic64_t * v) /* * Same as above, but return the result value */ -static __inline__ int atomic64_add_return(int i, atomic64_t * v) +static __inline__ long atomic64_add_return(long i, atomic64_t * v) { unsigned long temp, result; @@ -338,7 +392,7 @@ static __inline__ int atomic64_add_return(int i, atomic64_t * v) return result; } -static __inline__ int atomic64_sub_return(int i, atomic64_t * v) +static __inline__ long atomic64_sub_return(long i, atomic64_t * v) { unsigned long temp, result; @@ -356,6 +410,32 @@ static __inline__ int atomic64_sub_return(int i, atomic64_t * v) return result; } +/* + * atomic64_sub_if_positive - add integer to atomic variable + * @v: pointer of type atomic64_t + * + * Atomically test @v and decrement if it is greater than 0. + * The function returns the old value of @v minus 1. + */ +static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) +{ + unsigned long temp, result; + + __asm__ __volatile__( + "1: lld %1, %2 # atomic64_sub_if_positive\n" + " dsubu %0, %1, %3 \n" + " bltz %0, 1f \n" + " scd %0, %2 \n" + " beqz %0, 1b \n" + " sync \n" + "1: \n" + : "=&r" (result), "=&r" (temp), "=m" (v->counter) + : "Ir" (i), "m" (v->counter) + : "memory"); + + return result; +} + #else /* @@ -368,7 +448,7 @@ static __inline__ int atomic64_sub_return(int i, atomic64_t * v) * * Atomically adds @i to @v. */ -static __inline__ void atomic64_add(int i, atomic64_t * v) +static __inline__ void atomic64_add(long i, atomic64_t * v) { unsigned long flags; @@ -384,7 +464,7 @@ static __inline__ void atomic64_add(int i, atomic64_t * v) * * Atomically subtracts @i from @v. */ -static __inline__ void atomic64_sub(int i, atomic64_t * v) +static __inline__ void atomic64_sub(long i, atomic64_t * v) { unsigned long flags; @@ -393,10 +473,10 @@ static __inline__ void atomic64_sub(int i, atomic64_t * v) spin_unlock_irqrestore(&atomic_lock, flags); } -static __inline__ int atomic64_add_return(int i, atomic64_t * v) +static __inline__ long atomic64_add_return(long i, atomic64_t * v) { unsigned long flags; - int temp; + long temp; spin_lock_irqsave(&atomic_lock, flags); temp = v->counter; @@ -407,10 +487,10 @@ static __inline__ int atomic64_add_return(int i, atomic64_t * v) return temp; } -static __inline__ int atomic64_sub_return(int i, atomic64_t * v) +static __inline__ long atomic64_sub_return(long i, atomic64_t * v) { unsigned long flags; - int temp; + long temp; spin_lock_irqsave(&atomic_lock, flags); temp = v->counter; @@ -421,6 +501,28 @@ static __inline__ int atomic64_sub_return(int i, atomic64_t * v) return temp; } +/* + * atomic64_sub_if_positive - add integer to atomic variable + * @v: pointer of type atomic64_t + * + * Atomically test @v and decrement if it is greater than 0. + * The function returns the old value of @v minus 1. + */ +static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) +{ + unsigned long flags; + long temp; + + spin_lock_irqsave(&atomic_lock, flags); + temp = v->counter; + temp -= i; + if (temp >= 0) + v->counter = temp; + spin_unlock_irqrestore(&atomic_lock, flags); + + return temp; +} + #endif /* CONFIG_CPU_HAS_LLDSCD */ #define atomic64_dec_return(v) atomic64_sub_return(1,(v)) @@ -458,6 +560,12 @@ static __inline__ int atomic64_sub_return(int i, atomic64_t * v) #define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0) /* + * atomic64_dec_if_positive - decrement by 1 if old value positive + * @v: pointer of type atomic64_t + */ +#define atomic64_dec_if_positive(v) atomic64_sub_if_positive(1, v) + +/* * atomic64_inc - increment atomic variable * @v: pointer of type atomic64_t * diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h index aacab4d6ebf6..c9c257c201eb 100644 --- a/include/asm-mips/bootinfo.h +++ b/include/asm-mips/bootinfo.h @@ -12,6 +12,7 @@ #define _ASM_BOOTINFO_H #include <linux/types.h> +#include <asm/setup.h> /* * The MACH_GROUP_ IDs are the equivalent to PCI vendor IDs; the remaining @@ -209,7 +210,7 @@ #define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */ #define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */ -#define CL_SIZE (256) +#define CL_SIZE COMMAND_LINE_SIZE const char *get_system_type(void); diff --git a/include/asm-mips/cache.h b/include/asm-mips/cache.h index fda57132db2c..4517bdf20953 100644 --- a/include/asm-mips/cache.h +++ b/include/asm-mips/cache.h @@ -18,4 +18,6 @@ #define SMP_CACHE_SHIFT L1_CACHE_SHIFT #define SMP_CACHE_BYTES L1_CACHE_BYTES +#define ARCH_KMALLOC_MINALIGN 8 + #endif /* _ASM_CACHE_H */ diff --git a/include/asm-mips/cpumask.h b/include/asm-mips/cpumask.h deleted file mode 100644 index cf562af10d6f..000000000000 --- a/include/asm-mips/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_MIPS_CPUMASK_H -#define _ASM_MIPS_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_MIPS_CPUMASK_H */ diff --git a/include/asm-mips/gt64240.h b/include/asm-mips/gt64240.h new file mode 100644 index 000000000000..12964c2c3e34 --- /dev/null +++ b/include/asm-mips/gt64240.h @@ -0,0 +1,1264 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright - Galileo technology. + * Copyright (C) 2004 by Ralf Baechle + */ +#ifndef __ASM_MIPS_MV64240_H +#define __ASM_MIPS_MV64240_H + +#include <asm/addrspace.h> +#include <asm/byteorder.h> + +/* + * CPU Control Registers + */ + +#define CPU_CONFIGURATION 0x000 +#define CPU_MODE 0x120 +#define CPU_READ_RESPONSE_CROSSBAR_LOW 0x170 +#define CPU_READ_RESPONSE_CROSSBAR_HIGH 0x178 + +/* + * Processor Address Space + */ + +/* Sdram's BAR'S */ +#define SCS_0_LOW_DECODE_ADDRESS 0x008 +#define SCS_0_HIGH_DECODE_ADDRESS 0x010 +#define SCS_1_LOW_DECODE_ADDRESS 0x208 +#define SCS_1_HIGH_DECODE_ADDRESS 0x210 +#define SCS_2_LOW_DECODE_ADDRESS 0x018 +#define SCS_2_HIGH_DECODE_ADDRESS 0x020 +#define SCS_3_LOW_DECODE_ADDRESS 0x218 +#define SCS_3_HIGH_DECODE_ADDRESS 0x220 +/* Devices BAR'S */ +#define CS_0_LOW_DECODE_ADDRESS 0x028 +#define CS_0_HIGH_DECODE_ADDRESS 0x030 +#define CS_1_LOW_DECODE_ADDRESS 0x228 +#define CS_1_HIGH_DECODE_ADDRESS 0x230 +#define CS_2_LOW_DECODE_ADDRESS 0x248 +#define CS_2_HIGH_DECODE_ADDRESS 0x250 +#define CS_3_LOW_DECODE_ADDRESS 0x038 +#define CS_3_HIGH_DECODE_ADDRESS 0x040 +#define BOOTCS_LOW_DECODE_ADDRESS 0x238 +#define BOOTCS_HIGH_DECODE_ADDRESS 0x240 + +#define PCI_0I_O_LOW_DECODE_ADDRESS 0x048 +#define PCI_0I_O_HIGH_DECODE_ADDRESS 0x050 +#define PCI_0MEMORY0_LOW_DECODE_ADDRESS 0x058 +#define PCI_0MEMORY0_HIGH_DECODE_ADDRESS 0x060 +#define PCI_0MEMORY1_LOW_DECODE_ADDRESS 0x080 +#define PCI_0MEMORY1_HIGH_DECODE_ADDRESS 0x088 +#define PCI_0MEMORY2_LOW_DECODE_ADDRESS 0x258 +#define PCI_0MEMORY2_HIGH_DECODE_ADDRESS 0x260 +#define PCI_0MEMORY3_LOW_DECODE_ADDRESS 0x280 +#define PCI_0MEMORY3_HIGH_DECODE_ADDRESS 0x288 + +#define PCI_1I_O_LOW_DECODE_ADDRESS 0x090 +#define PCI_1I_O_HIGH_DECODE_ADDRESS 0x098 +#define PCI_1MEMORY0_LOW_DECODE_ADDRESS 0x0a0 +#define PCI_1MEMORY0_HIGH_DECODE_ADDRESS 0x0a8 +#define PCI_1MEMORY1_LOW_DECODE_ADDRESS 0x0b0 +#define PCI_1MEMORY1_HIGH_DECODE_ADDRESS 0x0b8 +#define PCI_1MEMORY2_LOW_DECODE_ADDRESS 0x2a0 +#define PCI_1MEMORY2_HIGH_DECODE_ADDRESS 0x2a8 +#define PCI_1MEMORY3_LOW_DECODE_ADDRESS 0x2b0 +#define PCI_1MEMORY3_HIGH_DECODE_ADDRESS 0x2b8 + +#define INTERNAL_SPACE_DECODE 0x068 + +#define CPU_0_LOW_DECODE_ADDRESS 0x290 +#define CPU_0_HIGH_DECODE_ADDRESS 0x298 +#define CPU_1_LOW_DECODE_ADDRESS 0x2c0 +#define CPU_1_HIGH_DECODE_ADDRESS 0x2c8 + +#define PCI_0I_O_ADDRESS_REMAP 0x0f0 +#define PCI_0MEMORY0_ADDRESS_REMAP 0x0f8 +#define PCI_0MEMORY0_HIGH_ADDRESS_REMAP 0x320 +#define PCI_0MEMORY1_ADDRESS_REMAP 0x100 +#define PCI_0MEMORY1_HIGH_ADDRESS_REMAP 0x328 +#define PCI_0MEMORY2_ADDRESS_REMAP 0x2f8 +#define PCI_0MEMORY2_HIGH_ADDRESS_REMAP 0x330 +#define PCI_0MEMORY3_ADDRESS_REMAP 0x300 +#define PCI_0MEMORY3_HIGH_ADDRESS_REMAP 0x338 + +#define PCI_1I_O_ADDRESS_REMAP 0x108 +#define PCI_1MEMORY0_ADDRESS_REMAP 0x110 +#define PCI_1MEMORY0_HIGH_ADDRESS_REMAP 0x340 +#define PCI_1MEMORY1_ADDRESS_REMAP 0x118 +#define PCI_1MEMORY1_HIGH_ADDRESS_REMAP 0x348 +#define PCI_1MEMORY2_ADDRESS_REMAP 0x310 +#define PCI_1MEMORY2_HIGH_ADDRESS_REMAP 0x350 +#define PCI_1MEMORY3_ADDRESS_REMAP 0x318 +#define PCI_1MEMORY3_HIGH_ADDRESS_REMAP 0x358 + +/* + * CPU Sync Barrier + */ + +#define PCI_0SYNC_BARIER_VIRTUAL_REGISTER 0x0c0 +#define PCI_1SYNC_BARIER_VIRTUAL_REGISTER 0x0c8 + + +/* + * CPU Access Protect + */ + +#define CPU_LOW_PROTECT_ADDRESS_0 0X180 +#define CPU_HIGH_PROTECT_ADDRESS_0 0X188 +#define CPU_LOW_PROTECT_ADDRESS_1 0X190 +#define CPU_HIGH_PROTECT_ADDRESS_1 0X198 +#define CPU_LOW_PROTECT_ADDRESS_2 0X1a0 +#define CPU_HIGH_PROTECT_ADDRESS_2 0X1a8 +#define CPU_LOW_PROTECT_ADDRESS_3 0X1b0 +#define CPU_HIGH_PROTECT_ADDRESS_3 0X1b8 +#define CPU_LOW_PROTECT_ADDRESS_4 0X1c0 +#define CPU_HIGH_PROTECT_ADDRESS_4 0X1c8 +#define CPU_LOW_PROTECT_ADDRESS_5 0X1d0 +#define CPU_HIGH_PROTECT_ADDRESS_5 0X1d8 +#define CPU_LOW_PROTECT_ADDRESS_6 0X1e0 +#define CPU_HIGH_PROTECT_ADDRESS_6 0X1e8 +#define CPU_LOW_PROTECT_ADDRESS_7 0X1f0 +#define CPU_HIGH_PROTECT_ADDRESS_7 0X1f8 + + +/* + * Snoop Control + */ + +#define SNOOP_BASE_ADDRESS_0 0x380 +#define SNOOP_TOP_ADDRESS_0 0x388 +#define SNOOP_BASE_ADDRESS_1 0x390 +#define SNOOP_TOP_ADDRESS_1 0x398 +#define SNOOP_BASE_ADDRESS_2 0x3a0 +#define SNOOP_TOP_ADDRESS_2 0x3a8 +#define SNOOP_BASE_ADDRESS_3 0x3b0 +#define SNOOP_TOP_ADDRESS_3 0x3b8 + +/* + * CPU Error Report + */ + +#define CPU_ERROR_ADDRESS_LOW 0x070 +#define CPU_ERROR_ADDRESS_HIGH 0x078 +#define CPU_ERROR_DATA_LOW 0x128 +#define CPU_ERROR_DATA_HIGH 0x130 +#define CPU_ERROR_PARITY 0x138 +#define CPU_ERROR_CAUSE 0x140 +#define CPU_ERROR_MASK 0x148 + +/* + * Pslave Debug + */ + +#define X_0_ADDRESS 0x360 +#define X_0_COMMAND_ID 0x368 +#define X_1_ADDRESS 0x370 +#define X_1_COMMAND_ID 0x378 +#define WRITE_DATA_LOW 0x3c0 +#define WRITE_DATA_HIGH 0x3c8 +#define WRITE_BYTE_ENABLE 0X3e0 +#define READ_DATA_LOW 0x3d0 +#define READ_DATA_HIGH 0x3d8 +#define READ_ID 0x3e8 + + +/* + * SDRAM and Device Address Space + */ + + +/* + * SDRAM Configuration + */ + +#define SDRAM_CONFIGURATION 0x448 +#define SDRAM_OPERATION_MODE 0x474 +#define SDRAM_ADDRESS_DECODE 0x47C +#define SDRAM_TIMING_PARAMETERS 0x4b4 +#define SDRAM_UMA_CONTROL 0x4a4 +#define SDRAM_CROSS_BAR_CONTROL_LOW 0x4a8 +#define SDRAM_CROSS_BAR_CONTROL_HIGH 0x4ac +#define SDRAM_CROSS_BAR_TIMEOUT 0x4b0 + + +/* + * SDRAM Parameters + */ + +#define SDRAM_BANK0PARAMETERS 0x44C +#define SDRAM_BANK1PARAMETERS 0x450 +#define SDRAM_BANK2PARAMETERS 0x454 +#define SDRAM_BANK3PARAMETERS 0x458 + + +/* + * SDRAM Error Report + */ + +#define SDRAM_ERROR_DATA_LOW 0x484 +#define SDRAM_ERROR_DATA_HIGH 0x480 +#define SDRAM_AND_DEVICE_ERROR_ADDRESS 0x490 +#define SDRAM_RECEIVED_ECC 0x488 +#define SDRAM_CALCULATED_ECC 0x48c +#define SDRAM_ECC_CONTROL 0x494 +#define SDRAM_ECC_ERROR_COUNTER 0x498 + + +/* + * SDunit Debug (for internal use) + */ + +#define X0_ADDRESS 0x500 +#define X0_COMMAND_AND_ID 0x504 +#define X0_WRITE_DATA_LOW 0x508 +#define X0_WRITE_DATA_HIGH 0x50c +#define X0_WRITE_BYTE_ENABLE 0x518 +#define X0_READ_DATA_LOW 0x510 +#define X0_READ_DATA_HIGH 0x514 +#define X0_READ_ID 0x51c +#define X1_ADDRESS 0x520 +#define X1_COMMAND_AND_ID 0x524 +#define X1_WRITE_DATA_LOW 0x528 +#define X1_WRITE_DATA_HIGH 0x52c +#define X1_WRITE_BYTE_ENABLE 0x538 +#define X1_READ_DATA_LOW 0x530 +#define X1_READ_DATA_HIGH 0x534 +#define X1_READ_ID 0x53c +#define X0_SNOOP_ADDRESS 0x540 +#define X0_SNOOP_COMMAND 0x544 +#define X1_SNOOP_ADDRESS 0x548 +#define X1_SNOOP_COMMAND 0x54c + + +/* + * Device Parameters + */ + +#define DEVICE_BANK0PARAMETERS 0x45c +#define DEVICE_BANK1PARAMETERS 0x460 +#define DEVICE_BANK2PARAMETERS 0x464 +#define DEVICE_BANK3PARAMETERS 0x468 +#define DEVICE_BOOT_BANK_PARAMETERS 0x46c +#define DEVICE_CONTROL 0x4c0 +#define DEVICE_CROSS_BAR_CONTROL_LOW 0x4c8 +#define DEVICE_CROSS_BAR_CONTROL_HIGH 0x4cc +#define DEVICE_CROSS_BAR_TIMEOUT 0x4c4 + + +/* + * Device Interrupt + */ + +#define DEVICE_INTERRUPT_CAUSE 0x4d0 +#define DEVICE_INTERRUPT_MASK 0x4d4 +#define DEVICE_ERROR_ADDRESS 0x4d8 + +/* + * DMA Record + */ + +#define CHANNEL0_DMA_BYTE_COUNT 0x800 +#define CHANNEL1_DMA_BYTE_COUNT 0x804 +#define CHANNEL2_DMA_BYTE_COUNT 0x808 +#define CHANNEL3_DMA_BYTE_COUNT 0x80C +#define CHANNEL4_DMA_BYTE_COUNT 0x900 +#define CHANNEL5_DMA_BYTE_COUNT 0x904 +#define CHANNEL6_DMA_BYTE_COUNT 0x908 +#define CHANNEL7_DMA_BYTE_COUNT 0x90C +#define CHANNEL0_DMA_SOURCE_ADDRESS 0x810 +#define CHANNEL1_DMA_SOURCE_ADDRESS 0x814 +#define CHANNEL2_DMA_SOURCE_ADDRESS 0x818 +#define CHANNEL3_DMA_SOURCE_ADDRESS 0x81C +#define CHANNEL4_DMA_SOURCE_ADDRESS 0x910 +#define CHANNEL5_DMA_SOURCE_ADDRESS 0x914 +#define CHANNEL6_DMA_SOURCE_ADDRESS 0x918 +#define CHANNEL7_DMA_SOURCE_ADDRESS 0x91C +#define CHANNEL0_DMA_DESTINATION_ADDRESS 0x820 +#define CHANNEL1_DMA_DESTINATION_ADDRESS 0x824 +#define CHANNEL2_DMA_DESTINATION_ADDRESS 0x828 +#define CHANNEL3_DMA_DESTINATION_ADDRESS 0x82C +#define CHANNEL4_DMA_DESTINATION_ADDRESS 0x920 +#define CHANNEL5_DMA_DESTINATION_ADDRESS 0x924 +#define CHANNEL6_DMA_DESTINATION_ADDRESS 0x928 +#define CHANNEL7_DMA_DESTINATION_ADDRESS 0x92C +#define CHANNEL0NEXT_RECORD_POINTER 0x830 +#define CHANNEL1NEXT_RECORD_POINTER 0x834 +#define CHANNEL2NEXT_RECORD_POINTER 0x838 +#define CHANNEL3NEXT_RECORD_POINTER 0x83C +#define CHANNEL4NEXT_RECORD_POINTER 0x930 +#define CHANNEL5NEXT_RECORD_POINTER 0x934 +#define CHANNEL6NEXT_RECORD_POINTER 0x938 +#define CHANNEL7NEXT_RECORD_POINTER 0x93C +#define CHANNEL0CURRENT_DESCRIPTOR_POINTER 0x870 +#define CHANNEL1CURRENT_DESCRIPTOR_POINTER 0x874 +#define CHANNEL2CURRENT_DESCRIPTOR_POINTER 0x878 +#define CHANNEL3CURRENT_DESCRIPTOR_POINTER 0x87C +#define CHANNEL4CURRENT_DESCRIPTOR_POINTER 0x970 +#define CHANNEL5CURRENT_DESCRIPTOR_POINTER 0x974 +#define CHANNEL6CURRENT_DESCRIPTOR_POINTER 0x978 +#define CHANNEL7CURRENT_DESCRIPTOR_POINTER 0x97C +#define CHANNEL0_DMA_SOURCE_HIGH_PCI_ADDRESS 0x890 +#define CHANNEL1_DMA_SOURCE_HIGH_PCI_ADDRESS 0x894 +#define CHANNEL2_DMA_SOURCE_HIGH_PCI_ADDRESS 0x898 +#define CHANNEL3_DMA_SOURCE_HIGH_PCI_ADDRESS 0x89c +#define CHANNEL4_DMA_SOURCE_HIGH_PCI_ADDRESS 0x990 +#define CHANNEL5_DMA_SOURCE_HIGH_PCI_ADDRESS 0x994 +#define CHANNEL6_DMA_SOURCE_HIGH_PCI_ADDRESS 0x998 +#define CHANNEL7_DMA_SOURCE_HIGH_PCI_ADDRESS 0x99c +#define CHANNEL0_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a0 +#define CHANNEL1_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a4 +#define CHANNEL2_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a8 +#define CHANNEL3_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8ac +#define CHANNEL4_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a0 +#define CHANNEL5_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a4 +#define CHANNEL6_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a8 +#define CHANNEL7_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9ac +#define CHANNEL0_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b0 +#define CHANNEL1_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b4 +#define CHANNEL2_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b8 +#define CHANNEL3_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8bc +#define CHANNEL4_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b0 +#define CHANNEL5_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b4 +#define CHANNEL6_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b8 +#define CHANNEL7_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9bc + +/* + * DMA Channel Control + */ + +#define CHANNEL0CONTROL 0x840 +#define CHANNEL0CONTROL_HIGH 0x880 + +#define CHANNEL1CONTROL 0x844 +#define CHANNEL1CONTROL_HIGH 0x884 + +#define CHANNEL2CONTROL 0x848 +#define CHANNEL2CONTROL_HIGH 0x888 + +#define CHANNEL3CONTROL 0x84C +#define CHANNEL3CONTROL_HIGH 0x88C + +#define CHANNEL4CONTROL 0x940 +#define CHANNEL4CONTROL_HIGH 0x980 + +#define CHANNEL5CONTROL 0x944 +#define CHANNEL5CONTROL_HIGH 0x984 + +#define CHANNEL6CONTROL 0x948 +#define CHANNEL6CONTROL_HIGH 0x988 + +#define CHANNEL7CONTROL 0x94C +#define CHANNEL7CONTROL_HIGH 0x98C + + +/* + * DMA Arbiter + */ + +#define ARBITER_CONTROL_0_3 0x860 +#define ARBITER_CONTROL_4_7 0x960 + + +/* + * DMA Interrupt + */ + +#define CHANELS0_3_INTERRUPT_CAUSE 0x8c0 +#define CHANELS0_3_INTERRUPT_MASK 0x8c4 +#define CHANELS0_3_ERROR_ADDRESS 0x8c8 +#define CHANELS0_3_ERROR_SELECT 0x8cc +#define CHANELS4_7_INTERRUPT_CAUSE 0x9c0 +#define CHANELS4_7_INTERRUPT_MASK 0x9c4 +#define CHANELS4_7_ERROR_ADDRESS 0x9c8 +#define CHANELS4_7_ERROR_SELECT 0x9cc + + +/* + * DMA Debug (for internal use) + */ + +#define DMA_X0_ADDRESS 0x8e0 +#define DMA_X0_COMMAND_AND_ID 0x8e4 +#define DMA_X0_WRITE_DATA_LOW 0x8e8 +#define DMA_X0_WRITE_DATA_HIGH 0x8ec +#define DMA_X0_WRITE_BYTE_ENABLE 0x8f8 +#define DMA_X0_READ_DATA_LOW 0x8f0 +#define DMA_X0_READ_DATA_HIGH 0x8f4 +#define DMA_X0_READ_ID 0x8fc +#define DMA_X1_ADDRESS 0x9e0 +#define DMA_X1_COMMAND_AND_ID 0x9e4 +#define DMA_X1_WRITE_DATA_LOW 0x9e8 +#define DMA_X1_WRITE_DATA_HIGH 0x9ec +#define DMA_X1_WRITE_BYTE_ENABLE 0x9f8 +#define DMA_X1_READ_DATA_LOW 0x9f0 +#define DMA_X1_READ_DATA_HIGH 0x9f4 +#define DMA_X1_READ_ID 0x9fc + +/* + * Timer_Counter + */ + +#define TIMER_COUNTER0 0x850 +#define TIMER_COUNTER1 0x854 +#define TIMER_COUNTER2 0x858 +#define TIMER_COUNTER3 0x85C +#define TIMER_COUNTER_0_3_CONTROL 0x864 +#define TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868 +#define TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c +#define TIMER_COUNTER4 0x950 +#define TIMER_COUNTER5 0x954 +#define TIMER_COUNTER6 0x958 +#define TIMER_COUNTER7 0x95C +#define TIMER_COUNTER_4_7_CONTROL 0x964 +#define TIMER_COUNTER_4_7_INTERRUPT_CAUSE 0x968 +#define TIMER_COUNTER_4_7_INTERRUPT_MASK 0x96c + +/* + * PCI Slave Address Decoding + */ + +#define PCI_0SCS_0_BANK_SIZE 0xc08 +#define PCI_1SCS_0_BANK_SIZE 0xc88 +#define PCI_0SCS_1_BANK_SIZE 0xd08 +#define PCI_1SCS_1_BANK_SIZE 0xd88 +#define PCI_0SCS_2_BANK_SIZE 0xc0c +#define PCI_1SCS_2_BANK_SIZE 0xc8c +#define PCI_0SCS_3_BANK_SIZE 0xd0c +#define PCI_1SCS_3_BANK_SIZE 0xd8c +#define PCI_0CS_0_BANK_SIZE 0xc10 +#define PCI_1CS_0_BANK_SIZE 0xc90 +#define PCI_0CS_1_BANK_SIZE 0xd10 +#define PCI_1CS_1_BANK_SIZE 0xd90 +#define PCI_0CS_2_BANK_SIZE 0xd18 +#define PCI_1CS_2_BANK_SIZE 0xd98 +#define PCI_0CS_3_BANK_SIZE 0xc14 +#define PCI_1CS_3_BANK_SIZE 0xc94 +#define PCI_0CS_BOOT_BANK_SIZE 0xd14 +#define PCI_1CS_BOOT_BANK_SIZE 0xd94 +#define PCI_0P2P_MEM0_BAR_SIZE 0xd1c +#define PCI_1P2P_MEM0_BAR_SIZE 0xd9c +#define PCI_0P2P_MEM1_BAR_SIZE 0xd20 +#define PCI_1P2P_MEM1_BAR_SIZE 0xda0 +#define PCI_0P2P_I_O_BAR_SIZE 0xd24 +#define PCI_1P2P_I_O_BAR_SIZE 0xda4 +#define PCI_0CPU_BAR_SIZE 0xd28 +#define PCI_1CPU_BAR_SIZE 0xda8 +#define PCI_0DAC_SCS_0_BANK_SIZE 0xe00 +#define PCI_1DAC_SCS_0_BANK_SIZE 0xe80 +#define PCI_0DAC_SCS_1_BANK_SIZE 0xe04 +#define PCI_1DAC_SCS_1_BANK_SIZE 0xe84 +#define PCI_0DAC_SCS_2_BANK_SIZE 0xe08 +#define PCI_1DAC_SCS_2_BANK_SIZE 0xe88 +#define PCI_0DAC_SCS_3_BANK_SIZE 0xe0c +#define PCI_1DAC_SCS_3_BANK_SIZE 0xe8c +#define PCI_0DAC_CS_0_BANK_SIZE 0xe10 +#define PCI_1DAC_CS_0_BANK_SIZE 0xe90 +#define PCI_0DAC_CS_1_BANK_SIZE 0xe14 +#define PCI_1DAC_CS_1_BANK_SIZE 0xe94 +#define PCI_0DAC_CS_2_BANK_SIZE 0xe18 +#define PCI_1DAC_CS_2_BANK_SIZE 0xe98 +#define PCI_0DAC_CS_3_BANK_SIZE 0xe1c +#define PCI_1DAC_CS_3_BANK_SIZE 0xe9c +#define PCI_0DAC_BOOTCS_BANK_SIZE 0xe20 +#define PCI_1DAC_BOOTCS_BANK_SIZE 0xea0 +#define PCI_0DAC_P2P_MEM0_BAR_SIZE 0xe24 +#define PCI_1DAC_P2P_MEM0_BAR_SIZE 0xea4 +#define PCI_0DAC_P2P_MEM1_BAR_SIZE 0xe28 +#define PCI_1DAC_P2P_MEM1_BAR_SIZE 0xea8 +#define PCI_0DAC_CPU_BAR_SIZE 0xe2c +#define PCI_1DAC_CPU_BAR_SIZE 0xeac +#define PCI_0EXPANSION_ROM_BAR_SIZE 0xd2c +#define PCI_1EXPANSION_ROM_BAR_SIZE 0xdac +#define PCI_0BASE_ADDRESS_REGISTERS_ENABLE 0xc3c +#define PCI_1BASE_ADDRESS_REGISTERS_ENABLE 0xcbc +#define PCI_0SCS_0_BASE_ADDRESS_REMAP 0xc48 +#define PCI_1SCS_0_BASE_ADDRESS_REMAP 0xcc8 +#define PCI_0SCS_1_BASE_ADDRESS_REMAP 0xd48 +#define PCI_1SCS_1_BASE_ADDRESS_REMAP 0xdc8 +#define PCI_0SCS_2_BASE_ADDRESS_REMAP 0xc4c +#define PCI_1SCS_2_BASE_ADDRESS_REMAP 0xccc +#define PCI_0SCS_3_BASE_ADDRESS_REMAP 0xd4c +#define PCI_1SCS_3_BASE_ADDRESS_REMAP 0xdcc +#define PCI_0CS_0_BASE_ADDRESS_REMAP 0xc50 +#define PCI_1CS_0_BASE_ADDRESS_REMAP 0xcd0 +#define PCI_0CS_1_BASE_ADDRESS_REMAP 0xd50 +#define PCI_1CS_1_BASE_ADDRESS_REMAP 0xdd0 +#define PCI_0CS_2_BASE_ADDRESS_REMAP 0xd58 +#define PCI_1CS_2_BASE_ADDRESS_REMAP 0xdd8 +#define PCI_0CS_3_BASE_ADDRESS_REMAP 0xc54 +#define PCI_1CS_3_BASE_ADDRESS_REMAP 0xcd4 +#define PCI_0CS_BOOTCS_BASE_ADDRESS_REMAP 0xd54 +#define PCI_1CS_BOOTCS_BASE_ADDRESS_REMAP 0xdd4 +#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xd5c +#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xddc +#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xd60 +#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xde0 +#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xd64 +#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xde4 +#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xd68 +#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xde8 +#define PCI_0P2P_I_O_BASE_ADDRESS_REMAP 0xd6c +#define PCI_1P2P_I_O_BASE_ADDRESS_REMAP 0xdec +#define PCI_0CPU_BASE_ADDRESS_REMAP 0xd70 +#define PCI_1CPU_BASE_ADDRESS_REMAP 0xdf0 +#define PCI_0DAC_SCS_0_BASE_ADDRESS_REMAP 0xf00 +#define PCI_1DAC_SCS_0_BASE_ADDRESS_REMAP 0xff0 +#define PCI_0DAC_SCS_1_BASE_ADDRESS_REMAP 0xf04 +#define PCI_1DAC_SCS_1_BASE_ADDRESS_REMAP 0xf84 +#define PCI_0DAC_SCS_2_BASE_ADDRESS_REMAP 0xf08 +#define PCI_1DAC_SCS_2_BASE_ADDRESS_REMAP 0xf88 +#define PCI_0DAC_SCS_3_BASE_ADDRESS_REMAP 0xf0c +#define PCI_1DAC_SCS_3_BASE_ADDRESS_REMAP 0xf8c +#define PCI_0DAC_CS_0_BASE_ADDRESS_REMAP 0xf10 +#define PCI_1DAC_CS_0_BASE_ADDRESS_REMAP 0xf90 +#define PCI_0DAC_CS_1_BASE_ADDRESS_REMAP 0xf14 +#define PCI_1DAC_CS_1_BASE_ADDRESS_REMAP 0xf94 +#define PCI_0DAC_CS_2_BASE_ADDRESS_REMAP 0xf18 +#define PCI_1DAC_CS_2_BASE_ADDRESS_REMAP 0xf98 +#define PCI_0DAC_CS_3_BASE_ADDRESS_REMAP 0xf1c +#define PCI_1DAC_CS_3_BASE_ADDRESS_REMAP 0xf9c +#define PCI_0DAC_BOOTCS_BASE_ADDRESS_REMAP 0xf20 +#define PCI_1DAC_BOOTCS_BASE_ADDRESS_REMAP 0xfa0 +#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xf24 +#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xfa4 +#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xf28 +#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xfa8 +#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xf2c +#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xfac +#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xf30 +#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xfb0 +#define PCI_0DAC_CPU_BASE_ADDRESS_REMAP 0xf34 +#define PCI_1DAC_CPU_BASE_ADDRESS_REMAP 0xfb4 +#define PCI_0EXPANSION_ROM_BASE_ADDRESS_REMAP 0xf38 +#define PCI_1EXPANSION_ROM_BASE_ADDRESS_REMAP 0xfb8 +#define PCI_0ADDRESS_DECODE_CONTROL 0xd3c +#define PCI_1ADDRESS_DECODE_CONTROL 0xdbc + +/* + * PCI Control + */ + +#define PCI_0COMMAND 0xc00 +#define PCI_1COMMAND 0xc80 +#define PCI_0MODE 0xd00 +#define PCI_1MODE 0xd80 +#define PCI_0TIMEOUT_RETRY 0xc04 +#define PCI_1TIMEOUT_RETRY 0xc84 +#define PCI_0READ_BUFFER_DISCARD_TIMER 0xd04 +#define PCI_1READ_BUFFER_DISCARD_TIMER 0xd84 +#define MSI_0TRIGGER_TIMER 0xc38 +#define MSI_1TRIGGER_TIMER 0xcb8 +#define PCI_0ARBITER_CONTROL 0x1d00 +#define PCI_1ARBITER_CONTROL 0x1d80 +/* changing untill here */ +#define PCI_0CROSS_BAR_CONTROL_LOW 0x1d08 +#define PCI_0CROSS_BAR_CONTROL_HIGH 0x1d0c +#define PCI_0CROSS_BAR_TIMEOUT 0x1d04 +#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d18 +#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d1c +#define PCI_0SYNC_BARRIER_VIRTUAL_REGISTER 0x1d10 +#define PCI_0P2P_CONFIGURATION 0x1d14 +#define PCI_0ACCESS_CONTROL_BASE_0_LOW 0x1e00 +#define PCI_0ACCESS_CONTROL_BASE_0_HIGH 0x1e04 +#define PCI_0ACCESS_CONTROL_TOP_0 0x1e08 +#define PCI_0ACCESS_CONTROL_BASE_1_LOW 0c1e10 +#define PCI_0ACCESS_CONTROL_BASE_1_HIGH 0x1e14 +#define PCI_0ACCESS_CONTROL_TOP_1 0x1e18 +#define PCI_0ACCESS_CONTROL_BASE_2_LOW 0c1e20 +#define PCI_0ACCESS_CONTROL_BASE_2_HIGH 0x1e24 +#define PCI_0ACCESS_CONTROL_TOP_2 0x1e28 +#define PCI_0ACCESS_CONTROL_BASE_3_LOW 0c1e30 +#define PCI_0ACCESS_CONTROL_BASE_3_HIGH 0x1e34 +#define PCI_0ACCESS_CONTROL_TOP_3 0x1e38 +#define PCI_0ACCESS_CONTROL_BASE_4_LOW 0c1e40 +#define PCI_0ACCESS_CONTROL_BASE_4_HIGH 0x1e44 +#define PCI_0ACCESS_CONTROL_TOP_4 0x1e48 +#define PCI_0ACCESS_CONTROL_BASE_5_LOW 0c1e50 +#define PCI_0ACCESS_CONTROL_BASE_5_HIGH 0x1e54 +#define PCI_0ACCESS_CONTROL_TOP_5 0x1e58 +#define PCI_0ACCESS_CONTROL_BASE_6_LOW 0c1e60 +#define PCI_0ACCESS_CONTROL_BASE_6_HIGH 0x1e64 +#define PCI_0ACCESS_CONTROL_TOP_6 0x1e68 +#define PCI_0ACCESS_CONTROL_BASE_7_LOW 0c1e70 +#define PCI_0ACCESS_CONTROL_BASE_7_HIGH 0x1e74 +#define PCI_0ACCESS_CONTROL_TOP_7 0x1e78 +#define PCI_1CROSS_BAR_CONTROL_LOW 0x1d88 +#define PCI_1CROSS_BAR_CONTROL_HIGH 0x1d8c +#define PCI_1CROSS_BAR_TIMEOUT 0x1d84 +#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d98 +#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d9c +#define PCI_1SYNC_BARRIER_VIRTUAL_REGISTER 0x1d90 +#define PCI_1P2P_CONFIGURATION 0x1d94 +#define PCI_1ACCESS_CONTROL_BASE_0_LOW 0x1e80 +#define PCI_1ACCESS_CONTROL_BASE_0_HIGH 0x1e84 +#define PCI_1ACCESS_CONTROL_TOP_0 0x1e88 +#define PCI_1ACCESS_CONTROL_BASE_1_LOW 0c1e90 +#define PCI_1ACCESS_CONTROL_BASE_1_HIGH 0x1e94 +#define PCI_1ACCESS_CONTROL_TOP_1 0x1e98 +#define PCI_1ACCESS_CONTROL_BASE_2_LOW 0c1ea0 +#define PCI_1ACCESS_CONTROL_BASE_2_HIGH 0x1ea4 +#define PCI_1ACCESS_CONTROL_TOP_2 0x1ea8 +#define PCI_1ACCESS_CONTROL_BASE_3_LOW 0c1eb0 +#define PCI_1ACCESS_CONTROL_BASE_3_HIGH 0x1eb4 +#define PCI_1ACCESS_CONTROL_TOP_3 0x1eb8 +#define PCI_1ACCESS_CONTROL_BASE_4_LOW 0c1ec0 +#define PCI_1ACCESS_CONTROL_BASE_4_HIGH 0x1ec4 +#define PCI_1ACCESS_CONTROL_TOP_4 0x1ec8 +#define PCI_1ACCESS_CONTROL_BASE_5_LOW 0c1ed0 +#define PCI_1ACCESS_CONTROL_BASE_5_HIGH 0x1ed4 +#define PCI_1ACCESS_CONTROL_TOP_5 0x1ed8 +#define PCI_1ACCESS_CONTROL_BASE_6_LOW 0c1ee0 +#define PCI_1ACCESS_CONTROL_BASE_6_HIGH 0x1ee4 +#define PCI_1ACCESS_CONTROL_TOP_6 0x1ee8 +#define PCI_1ACCESS_CONTROL_BASE_7_LOW 0c1ef0 +#define PCI_1ACCESS_CONTROL_BASE_7_HIGH 0x1ef4 +#define PCI_1ACCESS_CONTROL_TOP_7 0x1ef8 + +/* + * PCI Snoop Control + */ + +#define PCI_0SNOOP_CONTROL_BASE_0_LOW 0x1f00 +#define PCI_0SNOOP_CONTROL_BASE_0_HIGH 0x1f04 +#define PCI_0SNOOP_CONTROL_TOP_0 0x1f08 +#define PCI_0SNOOP_CONTROL_BASE_1_0_LOW 0x1f10 +#define PCI_0SNOOP_CONTROL_BASE_1_0_HIGH 0x1f14 +#define PCI_0SNOOP_CONTROL_TOP_1 0x1f18 +#define PCI_0SNOOP_CONTROL_BASE_2_0_LOW 0x1f20 +#define PCI_0SNOOP_CONTROL_BASE_2_0_HIGH 0x1f24 +#define PCI_0SNOOP_CONTROL_TOP_2 0x1f28 +#define PCI_0SNOOP_CONTROL_BASE_3_0_LOW 0x1f30 +#define PCI_0SNOOP_CONTROL_BASE_3_0_HIGH 0x1f34 +#define PCI_0SNOOP_CONTROL_TOP_3 0x1f38 +#define PCI_1SNOOP_CONTROL_BASE_0_LOW 0x1f80 +#define PCI_1SNOOP_CONTROL_BASE_0_HIGH 0x1f84 +#define PCI_1SNOOP_CONTROL_TOP_0 0x1f88 +#define PCI_1SNOOP_CONTROL_BASE_1_0_LOW 0x1f90 +#define PCI_1SNOOP_CONTROL_BASE_1_0_HIGH 0x1f94 +#define PCI_1SNOOP_CONTROL_TOP_1 0x1f98 +#define PCI_1SNOOP_CONTROL_BASE_2_0_LOW 0x1fa0 +#define PCI_1SNOOP_CONTROL_BASE_2_0_HIGH 0x1fa4 +#define PCI_1SNOOP_CONTROL_TOP_2 0x1fa8 +#define PCI_1SNOOP_CONTROL_BASE_3_0_LOW 0x1fb0 +#define PCI_1SNOOP_CONTROL_BASE_3_0_HIGH 0x1fb4 +#define PCI_1SNOOP_CONTROL_TOP_3 0x1fb8 + +/* + * PCI Configuration Address + */ + +#define PCI_0CONFIGURATION_ADDRESS 0xcf8 +#define PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER 0xcfc +#define PCI_1CONFIGURATION_ADDRESS 0xc78 +#define PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER 0xc7c +#define PCI_0INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xc34 +#define PCI_1INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xcb4 + +/* + * PCI Error Report + */ + +#define PCI_0SERR_MASK 0xc28 +#define PCI_0ERROR_ADDRESS_LOW 0x1d40 +#define PCI_0ERROR_ADDRESS_HIGH 0x1d44 +#define PCI_0ERROR_DATA_LOW 0x1d48 +#define PCI_0ERROR_DATA_HIGH 0x1d4c +#define PCI_0ERROR_COMMAND 0x1d50 +#define PCI_0ERROR_CAUSE 0x1d58 +#define PCI_0ERROR_MASK 0x1d5c + +#define PCI_1SERR_MASK 0xca8 +#define PCI_1ERROR_ADDRESS_LOW 0x1dc0 +#define PCI_1ERROR_ADDRESS_HIGH 0x1dc4 +#define PCI_1ERROR_DATA_LOW 0x1dc8 +#define PCI_1ERROR_DATA_HIGH 0x1dcc +#define PCI_1ERROR_COMMAND 0x1dd0 +#define PCI_1ERROR_CAUSE 0x1dd8 +#define PCI_1ERROR_MASK 0x1ddc + + +/* + * Lslave Debug (for internal use) + */ + +#define L_SLAVE_X0_ADDRESS 0x1d20 +#define L_SLAVE_X0_COMMAND_AND_ID 0x1d24 +#define L_SLAVE_X1_ADDRESS 0x1d28 +#define L_SLAVE_X1_COMMAND_AND_ID 0x1d2c +#define L_SLAVE_WRITE_DATA_LOW 0x1d30 +#define L_SLAVE_WRITE_DATA_HIGH 0x1d34 +#define L_SLAVE_WRITE_BYTE_ENABLE 0x1d60 +#define L_SLAVE_READ_DATA_LOW 0x1d38 +#define L_SLAVE_READ_DATA_HIGH 0x1d3c +#define L_SLAVE_READ_ID 0x1d64 + +#if 0 /* Disabled because PCI_* namespace belongs to PCI subsystem ... */ + +/* + * PCI Configuration Function 0 + */ + +#define PCI_DEVICE_AND_VENDOR_ID 0x000 +#define PCI_STATUS_AND_COMMAND 0x004 +#define PCI_CLASS_CODE_AND_REVISION_ID 0x008 +#define PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C +#define PCI_SCS_0_BASE_ADDRESS 0x010 +#define PCI_SCS_1_BASE_ADDRESS 0x014 +#define PCI_SCS_2_BASE_ADDRESS 0x018 +#define PCI_SCS_3_BASE_ADDRESS 0x01C +#define PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS 0x020 +#define PCI_INTERNAL_REGISTERS_I_OMAPPED_BASE_ADDRESS 0x024 +#define PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02C +#define PCI_EXPANSION_ROM_BASE_ADDRESS_REGISTER 0x030 +#define PCI_CAPABILTY_LIST_POINTER 0x034 +#define PCI_INTERRUPT_PIN_AND_LINE 0x03C +#define PCI_POWER_MANAGEMENT_CAPABILITY 0x040 +#define PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044 +#define PCI_VPD_ADDRESS 0x048 +#define PCI_VPD_DATA 0X04c +#define PCI_MSI_MESSAGE_CONTROL 0x050 +#define PCI_MSI_MESSAGE_ADDRESS 0x054 +#define PCI_MSI_MESSAGE_UPPER_ADDRESS 0x058 +#define PCI_MSI_MESSAGE_DATA 0x05c +#define PCI_COMPACT_PCI_HOT_SWAP_CAPABILITY 0x058 + +/* + * PCI Configuration Function 1 + */ + +#define PCI_CS_0_BASE_ADDRESS 0x110 +#define PCI_CS_1_BASE_ADDRESS 0x114 +#define PCI_CS_2_BASE_ADDRESS 0x118 +#define PCI_CS_3_BASE_ADDRESS 0x11c +#define PCI_BOOTCS_BASE_ADDRESS 0x120 + +/* + * PCI Configuration Function 2 + */ + +#define PCI_P2P_MEM0_BASE_ADDRESS 0x210 +#define PCI_P2P_MEM1_BASE_ADDRESS 0x214 +#define PCI_P2P_I_O_BASE_ADDRESS 0x218 +#define PCI_CPU_BASE_ADDRESS 0x21c + +/* + * PCI Configuration Function 4 + */ + +#define PCI_DAC_SCS_0_BASE_ADDRESS_LOW 0x410 +#define PCI_DAC_SCS_0_BASE_ADDRESS_HIGH 0x414 +#define PCI_DAC_SCS_1_BASE_ADDRESS_LOW 0x418 +#define PCI_DAC_SCS_1_BASE_ADDRESS_HIGH 0x41c +#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_LOW 0x420 +#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_HIGH 0x424 + + +/* + * PCI Configuration Function 5 + */ + +#define PCI_DAC_SCS_2_BASE_ADDRESS_LOW 0x510 +#define PCI_DAC_SCS_2_BASE_ADDRESS_HIGH 0x514 +#define PCI_DAC_SCS_3_BASE_ADDRESS_LOW 0x518 +#define PCI_DAC_SCS_3_BASE_ADDRESS_HIGH 0x51c +#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_LOW 0x520 +#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_HIGH 0x524 + + +/* + * PCI Configuration Function 6 + */ + +#define PCI_DAC_CS_0_BASE_ADDRESS_LOW 0x610 +#define PCI_DAC_CS_0_BASE_ADDRESS_HIGH 0x614 +#define PCI_DAC_CS_1_BASE_ADDRESS_LOW 0x618 +#define PCI_DAC_CS_1_BASE_ADDRESS_HIGH 0x61c +#define PCI_DAC_CS_2_BASE_ADDRESS_LOW 0x620 +#define PCI_DAC_CS_2_BASE_ADDRESS_HIGH 0x624 + +/* + * PCI Configuration Function 7 + */ + +#define PCI_DAC_CS_3_BASE_ADDRESS_LOW 0x710 +#define PCI_DAC_CS_3_BASE_ADDRESS_HIGH 0x714 +#define PCI_DAC_BOOTCS_BASE_ADDRESS_LOW 0x718 +#define PCI_DAC_BOOTCS_BASE_ADDRESS_HIGH 0x71c +#define PCI_DAC_CPU_BASE_ADDRESS_LOW 0x720 +#define PCI_DAC_CPU_BASE_ADDRESS_HIGH 0x724 +#endif + +/* + * Interrupts + */ + +#define LOW_INTERRUPT_CAUSE_REGISTER 0xc18 +#define HIGH_INTERRUPT_CAUSE_REGISTER 0xc68 +#define CPU_INTERRUPT_MASK_REGISTER_LOW 0xc1c +#define CPU_INTERRUPT_MASK_REGISTER_HIGH 0xc6c +#define CPU_SELECT_CAUSE_REGISTER 0xc70 +#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW 0xc24 +#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0xc64 +#define PCI_0SELECT_CAUSE 0xc74 +#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW 0xca4 +#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0xce4 +#define PCI_1SELECT_CAUSE 0xcf4 +#define CPU_INT_0_MASK 0xe60 +#define CPU_INT_1_MASK 0xe64 +#define CPU_INT_2_MASK 0xe68 +#define CPU_INT_3_MASK 0xe6c + +/* + * I20 Support registers + */ + +#define INBOUND_MESSAGE_REGISTER0_PCI0_SIDE 0x010 +#define INBOUND_MESSAGE_REGISTER1_PCI0_SIDE 0x014 +#define OUTBOUND_MESSAGE_REGISTER0_PCI0_SIDE 0x018 +#define OUTBOUND_MESSAGE_REGISTER1_PCI0_SIDE 0x01C +#define INBOUND_DOORBELL_REGISTER_PCI0_SIDE 0x020 +#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE 0x024 +#define INBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE 0x028 +#define OUTBOUND_DOORBELL_REGISTER_PCI0_SIDE 0x02C +#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE 0x030 +#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE 0x034 +#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE 0x040 +#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE 0x044 +#define QUEUE_CONTROL_REGISTER_PCI0_SIDE 0x050 +#define QUEUE_BASE_ADDRESS_REGISTER_PCI0_SIDE 0x054 +#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE 0x060 +#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE 0x064 +#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE 0x068 +#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE 0x06C +#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE 0x070 +#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE 0x074 +#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE 0x0F8 +#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE 0x0FC + +#define INBOUND_MESSAGE_REGISTER0_PCI1_SIDE 0x090 +#define INBOUND_MESSAGE_REGISTER1_PCI1_SIDE 0x094 +#define OUTBOUND_MESSAGE_REGISTER0_PCI1_SIDE 0x098 +#define OUTBOUND_MESSAGE_REGISTER1_PCI1_SIDE 0x09C +#define INBOUND_DOORBELL_REGISTER_PCI1_SIDE 0x0A0 +#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE 0x0A4 +#define INBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE 0x0A8 +#define OUTBOUND_DOORBELL_REGISTER_PCI1_SIDE 0x0AC +#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE 0x0B0 +#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE 0x0B4 +#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE 0x0C0 +#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE 0x0C4 +#define QUEUE_CONTROL_REGISTER_PCI1_SIDE 0x0D0 +#define QUEUE_BASE_ADDRESS_REGISTER_PCI1_SIDE 0x0D4 +#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0E0 +#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0E4 +#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0E8 +#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0EC +#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0F0 +#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0F4 +#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE 0x078 +#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE 0x07C + +#define INBOUND_MESSAGE_REGISTER0_CPU0_SIDE 0X1C10 +#define INBOUND_MESSAGE_REGISTER1_CPU0_SIDE 0X1C14 +#define OUTBOUND_MESSAGE_REGISTER0_CPU0_SIDE 0X1C18 +#define OUTBOUND_MESSAGE_REGISTER1_CPU0_SIDE 0X1C1C +#define INBOUND_DOORBELL_REGISTER_CPU0_SIDE 0X1C20 +#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE 0X1C24 +#define INBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE 0X1C28 +#define OUTBOUND_DOORBELL_REGISTER_CPU0_SIDE 0X1C2C +#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE 0X1C30 +#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE 0X1C34 +#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE 0X1C40 +#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE 0X1C44 +#define QUEUE_CONTROL_REGISTER_CPU0_SIDE 0X1C50 +#define QUEUE_BASE_ADDRESS_REGISTER_CPU0_SIDE 0X1C54 +#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C60 +#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C64 +#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C68 +#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C6C +#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C70 +#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C74 +#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1CF8 +#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1CFC + +#define INBOUND_MESSAGE_REGISTER0_CPU1_SIDE 0X1C90 +#define INBOUND_MESSAGE_REGISTER1_CPU1_SIDE 0X1C94 +#define OUTBOUND_MESSAGE_REGISTER0_CPU1_SIDE 0X1C98 +#define OUTBOUND_MESSAGE_REGISTER1_CPU1_SIDE 0X1C9C +#define INBOUND_DOORBELL_REGISTER_CPU1_SIDE 0X1CA0 +#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE 0X1CA4 +#define INBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE 0X1CA8 +#define OUTBOUND_DOORBELL_REGISTER_CPU1_SIDE 0X1CAC +#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE 0X1CB0 +#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE 0X1CB4 +#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE 0X1CC0 +#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE 0X1CC4 +#define QUEUE_CONTROL_REGISTER_CPU1_SIDE 0X1CD0 +#define QUEUE_BASE_ADDRESS_REGISTER_CPU1_SIDE 0X1CD4 +#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CE0 +#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CE4 +#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CE8 +#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CEC +#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CF0 +#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CF4 +#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1C78 +#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1C7C + +/* + * Communication Unit Registers + */ + +#define ETHERNET_0_ADDRESS_CONTROL_LOW +#define ETHERNET_0_ADDRESS_CONTROL_HIGH 0xf204 +#define ETHERNET_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf208 +#define ETHERNET_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf20c +#define ETHERNET_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf210 +#define ETHERNET_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf214 +#define ETHERNET_0_HASH_TABLE_PCI_HIGH_ADDRESS 0xf218 +#define ETHERNET_1_ADDRESS_CONTROL_LOW 0xf220 +#define ETHERNET_1_ADDRESS_CONTROL_HIGH 0xf224 +#define ETHERNET_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf228 +#define ETHERNET_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf22c +#define ETHERNET_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf230 +#define ETHERNET_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf234 +#define ETHERNET_1_HASH_TABLE_PCI_HIGH_ADDRESS 0xf238 +#define ETHERNET_2_ADDRESS_CONTROL_LOW 0xf240 +#define ETHERNET_2_ADDRESS_CONTROL_HIGH 0xf244 +#define ETHERNET_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf248 +#define ETHERNET_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf24c +#define ETHERNET_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf250 +#define ETHERNET_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf254 +#define ETHERNET_2_HASH_TABLE_PCI_HIGH_ADDRESS 0xf258 +#define MPSC_0_ADDRESS_CONTROL_LOW 0xf280 +#define MPSC_0_ADDRESS_CONTROL_HIGH 0xf284 +#define MPSC_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf288 +#define MPSC_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf28c +#define MPSC_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf290 +#define MPSC_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf294 +#define MPSC_1_ADDRESS_CONTROL_LOW 0xf2a0 +#define MPSC_1_ADDRESS_CONTROL_HIGH 0xf2a4 +#define MPSC_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2a8 +#define MPSC_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2ac +#define MPSC_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2b0 +#define MPSC_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2b4 +#define MPSC_2_ADDRESS_CONTROL_LOW 0xf2c0 +#define MPSC_2_ADDRESS_CONTROL_HIGH 0xf2c4 +#define MPSC_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2c8 +#define MPSC_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2cc +#define MPSC_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d0 +#define MPSC_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d4 +#define SERIAL_INIT_PCI_HIGH_ADDRESS 0xf320 +#define SERIAL_INIT_LAST_DATA 0xf324 +#define SERIAL_INIT_STATUS_AND_CONTROL 0xf328 +#define COMM_UNIT_ARBITER_CONTROL 0xf300 +#define COMM_UNIT_CROSS_BAR_TIMEOUT 0xf304 +#define COMM_UNIT_INTERRUPT_CAUSE 0xf310 +#define COMM_UNIT_INTERRUPT_MASK 0xf314 +#define COMM_UNIT_ERROR_ADDRESS 0xf314 + +/* + * Cunit Debug (for internal use) + */ + +#define CUNIT_ADDRESS 0xf340 +#define CUNIT_COMMAND_AND_ID 0xf344 +#define CUNIT_WRITE_DATA_LOW 0xf348 +#define CUNIT_WRITE_DATA_HIGH 0xf34c +#define CUNIT_WRITE_BYTE_ENABLE 0xf358 +#define CUNIT_READ_DATA_LOW 0xf350 +#define CUNIT_READ_DATA_HIGH 0xf354 +#define CUNIT_READ_ID 0xf35c + +/* + * Fast Ethernet Unit Registers + */ + +/* Ethernet */ + +#define ETHERNET_PHY_ADDRESS_REGISTER 0x2000 +#define ETHERNET_SMI_REGISTER 0x2010 + +/* Ethernet 0 */ + +#define ETHERNET0_PORT_CONFIGURATION_REGISTER 0x2400 +#define ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER 0x2408 +#define ETHERNET0_PORT_COMMAND_REGISTER 0x2410 +#define ETHERNET0_PORT_STATUS_REGISTER 0x2418 +#define ETHERNET0_SERIAL_PARAMETRS_REGISTER 0x2420 +#define ETHERNET0_HASH_TABLE_POINTER_REGISTER 0x2428 +#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2430 +#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2438 +#define ETHERNET0_SDMA_CONFIGURATION_REGISTER 0x2440 +#define ETHERNET0_SDMA_COMMAND_REGISTER 0x2448 +#define ETHERNET0_INTERRUPT_CAUSE_REGISTER 0x2450 +#define ETHERNET0_INTERRUPT_MASK_REGISTER 0x2458 +#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 0x2480 +#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER1 0x2484 +#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER2 0x2488 +#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER3 0x248c +#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 0x24a0 +#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER1 0x24a4 +#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER2 0x24a8 +#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER3 0x24ac +#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0 0x24e0 +#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER1 0x24e4 +#define ETHERNET0_MIB_COUNTER_BASE 0x2500 + +/* Ethernet 1 */ + +#define ETHERNET1_PORT_CONFIGURATION_REGISTER 0x2800 +#define ETHERNET1_PORT_CONFIGURATION_EXTEND_REGISTER 0x2808 +#define ETHERNET1_PORT_COMMAND_REGISTER 0x2810 +#define ETHERNET1_PORT_STATUS_REGISTER 0x2818 +#define ETHERNET1_SERIAL_PARAMETRS_REGISTER 0x2820 +#define ETHERNET1_HASH_TABLE_POINTER_REGISTER 0x2828 +#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2830 +#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2838 +#define ETHERNET1_SDMA_CONFIGURATION_REGISTER 0x2840 +#define ETHERNET1_SDMA_COMMAND_REGISTER 0x2848 +#define ETHERNET1_INTERRUPT_CAUSE_REGISTER 0x2850 +#define ETHERNET1_INTERRUPT_MASK_REGISTER 0x2858 +#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER0 0x2880 +#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER1 0x2884 +#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER2 0x2888 +#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER3 0x288c +#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER0 0x28a0 +#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER1 0x28a4 +#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER2 0x28a8 +#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER3 0x28ac +#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER0 0x28e0 +#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER1 0x28e4 +#define ETHERNET1_MIB_COUNTER_BASE 0x2900 + +/* Ethernet 2 */ + +#define ETHERNET2_PORT_CONFIGURATION_REGISTER 0x2c00 +#define ETHERNET2_PORT_CONFIGURATION_EXTEND_REGISTER 0x2c08 +#define ETHERNET2_PORT_COMMAND_REGISTER 0x2c10 +#define ETHERNET2_PORT_STATUS_REGISTER 0x2c18 +#define ETHERNET2_SERIAL_PARAMETRS_REGISTER 0x2c20 +#define ETHERNET2_HASH_TABLE_POINTER_REGISTER 0x2c28 +#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2c30 +#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2c38 +#define ETHERNET2_SDMA_CONFIGURATION_REGISTER 0x2c40 +#define ETHERNET2_SDMA_COMMAND_REGISTER 0x2c48 +#define ETHERNET2_INTERRUPT_CAUSE_REGISTER 0x2c50 +#define ETHERNET2_INTERRUPT_MASK_REGISTER 0x2c58 +#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER0 0x2c80 +#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER1 0x2c84 +#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER2 0x2c88 +#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER3 0x2c8c +#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER0 0x2ca0 +#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER1 0x2ca4 +#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER2 0x2ca8 +#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER3 0x2cac +#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER0 0x2ce0 +#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER1 0x2ce4 +#define ETHERNET2_MIB_COUNTER_BASE 0x2d00 + +/* + * SDMA Registers + */ + +#define SDMA_GROUP_CONFIGURATION_REGISTER 0xb1f0 +#define CHANNEL0_CONFIGURATION_REGISTER 0x4000 +#define CHANNEL0_COMMAND_REGISTER 0x4008 +#define CHANNEL0_RX_CMD_STATUS 0x4800 +#define CHANNEL0_RX_PACKET_AND_BUFFER_SIZES 0x4804 +#define CHANNEL0_RX_BUFFER_POINTER 0x4808 +#define CHANNEL0_RX_NEXT_POINTER 0x480c +#define CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER 0x4810 +#define CHANNEL0_TX_CMD_STATUS 0x4C00 +#define CHANNEL0_TX_PACKET_SIZE 0x4C04 +#define CHANNEL0_TX_BUFFER_POINTER 0x4C08 +#define CHANNEL0_TX_NEXT_POINTER 0x4C0c +#define CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER 0x4c10 +#define CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER 0x4c14 +#define CHANNEL1_CONFIGURATION_REGISTER 0x6000 +#define CHANNEL1_COMMAND_REGISTER 0x6008 +#define CHANNEL1_RX_CMD_STATUS 0x6800 +#define CHANNEL1_RX_PACKET_AND_BUFFER_SIZES 0x6804 +#define CHANNEL1_RX_BUFFER_POINTER 0x6808 +#define CHANNEL1_RX_NEXT_POINTER 0x680c +#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x6810 +#define CHANNEL1_TX_CMD_STATUS 0x6C00 +#define CHANNEL1_TX_PACKET_SIZE 0x6C04 +#define CHANNEL1_TX_BUFFER_POINTER 0x6C08 +#define CHANNEL1_TX_NEXT_POINTER 0x6C0c +#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x6810 +#define CHANNEL1_CURRENT_TX_DESCRIPTOR_POINTER 0x6c10 +#define CHANNEL1_FIRST_TX_DESCRIPTOR_POINTER 0x6c14 + +/* SDMA Interrupt */ + +#define SDMA_CAUSE 0xb820 +#define SDMA_MASK 0xb8a0 + + +/* + * Baude Rate Generators Registers + */ + +/* BRG 0 */ + +#define BRG0_CONFIGURATION_REGISTER 0xb200 +#define BRG0_BAUDE_TUNING_REGISTER 0xb204 + +/* BRG 1 */ + +#define BRG1_CONFIGURATION_REGISTER 0xb208 +#define BRG1_BAUDE_TUNING_REGISTER 0xb20c + +/* BRG 2 */ + +#define BRG2_CONFIGURATION_REGISTER 0xb210 +#define BRG2_BAUDE_TUNING_REGISTER 0xb214 + +/* BRG Interrupts */ + +#define BRG_CAUSE_REGISTER 0xb834 +#define BRG_MASK_REGISTER 0xb8b4 + +/* MISC */ + +#define MAIN_ROUTING_REGISTER 0xb400 +#define RECEIVE_CLOCK_ROUTING_REGISTER 0xb404 +#define TRANSMIT_CLOCK_ROUTING_REGISTER 0xb408 +#define COMM_UNIT_ARBITER_CONFIGURATION_REGISTER 0xb40c +#define WATCHDOG_CONFIGURATION_REGISTER 0xb410 +#define WATCHDOG_VALUE_REGISTER 0xb414 + + +/* + * Flex TDM Registers + */ + +/* FTDM Port */ + +#define FLEXTDM_TRANSMIT_READ_POINTER 0xa800 +#define FLEXTDM_RECEIVE_READ_POINTER 0xa804 +#define FLEXTDM_CONFIGURATION_REGISTER 0xa808 +#define FLEXTDM_AUX_CHANNELA_TX_REGISTER 0xa80c +#define FLEXTDM_AUX_CHANNELA_RX_REGISTER 0xa810 +#define FLEXTDM_AUX_CHANNELB_TX_REGISTER 0xa814 +#define FLEXTDM_AUX_CHANNELB_RX_REGISTER 0xa818 + +/* FTDM Interrupts */ + +#define FTDM_CAUSE_REGISTER 0xb830 +#define FTDM_MASK_REGISTER 0xb8b0 + + +/* + * GPP Interface Registers + */ + +#define GPP_IO_CONTROL 0xf100 +#define GPP_LEVEL_CONTROL 0xf110 +#define GPP_VALUE 0xf104 +#define GPP_INTERRUPT_CAUSE 0xf108 +#define GPP_INTERRUPT_MASK 0xf10c + +#define MPP_CONTROL0 0xf000 +#define MPP_CONTROL1 0xf004 +#define MPP_CONTROL2 0xf008 +#define MPP_CONTROL3 0xf00c +#define DEBUG_PORT_MULTIPLEX 0xf014 +#define SERIAL_PORT_MULTIPLEX 0xf010 + +/* + * I2C Registers + */ + +#define I2C_SLAVE_ADDRESS 0xc000 +#define I2C_EXTENDED_SLAVE_ADDRESS 0xc040 +#define I2C_DATA 0xc004 +#define I2C_CONTROL 0xc008 +#define I2C_STATUS_BAUDE_RATE 0xc00C +#define I2C_SOFT_RESET 0xc01c + +/* + * MPSC Registers + */ + +/* + * MPSC0 + */ + +#define MPSC0_MAIN_CONFIGURATION_LOW 0x8000 +#define MPSC0_MAIN_CONFIGURATION_HIGH 0x8004 +#define MPSC0_PROTOCOL_CONFIGURATION 0x8008 +#define CHANNEL0_REGISTER1 0x800c +#define CHANNEL0_REGISTER2 0x8010 +#define CHANNEL0_REGISTER3 0x8014 +#define CHANNEL0_REGISTER4 0x8018 +#define CHANNEL0_REGISTER5 0x801c +#define CHANNEL0_REGISTER6 0x8020 +#define CHANNEL0_REGISTER7 0x8024 +#define CHANNEL0_REGISTER8 0x8028 +#define CHANNEL0_REGISTER9 0x802c +#define CHANNEL0_REGISTER10 0x8030 +#define CHANNEL0_REGISTER11 0x8034 + +/* + * MPSC1 + */ + +#define MPSC1_MAIN_CONFIGURATION_LOW 0x9000 +#define MPSC1_MAIN_CONFIGURATION_HIGH 0x9004 +#define MPSC1_PROTOCOL_CONFIGURATION 0x9008 +#define CHANNEL1_REGISTER1 0x900c +#define CHANNEL1_REGISTER2 0x9010 +#define CHANNEL1_REGISTER3 0x9014 +#define CHANNEL1_REGISTER4 0x9018 +#define CHANNEL1_REGISTER5 0x901c +#define CHANNEL1_REGISTER6 0x9020 +#define CHANNEL1_REGISTER7 0x9024 +#define CHANNEL1_REGISTER8 0x9028 +#define CHANNEL1_REGISTER9 0x902c +#define CHANNEL1_REGISTER10 0x9030 +#define CHANNEL1_REGISTER11 0x9034 + +/* + * MPSCs Interupts + */ + +#define MPSC0_CAUSE 0xb804 +#define MPSC0_MASK 0xb884 +#define MPSC1_CAUSE 0xb80c +#define MPSC1_MASK 0xb88c + +extern unsigned long gt64240_base; + +#define GT64240_BASE (gt64240_base) + +/* + * Because of an error/peculiarity in the Galileo chip, we need to swap the + * bytes when running bigendian. + */ +#define __GT_READ(ofs) \ + (*(volatile u32 *)(GT64240_BASE+(ofs))) +#define __GT_WRITE(ofs, data) \ + do { *(volatile u32 *)(GT64240_BASE+(ofs)) = (data); } while (0) + +#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs)) +#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data)) + +#define GT_READ_16(ofs, data) \ + le16_to_cpu(*(volatile u16 *)(GT64240_BASE+(ofs))) +#define GT_WRITE_16(ofs, data) \ + *(volatile u16 *)(GT64240_BASE+(ofs)) = cpu_to_le16(data) + +#define GT_READ_8(ofs, data) \ + *(data) = *(volatile u8 *)(GT64240_BASE+(ofs)) +#define GT_WRITE_8(ofs, data) \ + *(volatile u8 *)(GT64240_BASE+(ofs)) = data + +extern struct pci_ops gt_bus0_pci_ops; +extern struct pci_ops gt_bus1_pci_ops; + +#endif /* __ASM_MIPS_MV64240_H */ diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 4a024fa727cc..f70b9362aa9f 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -12,22 +12,27 @@ #ifdef __ASSEMBLY__ + .macro _ssnop + sll $0, $2, 1 + .endm + /* * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent * use of the JTLB for instructions should not occur for 4 cpu cycles and use * for data translations should not occur for 3 cpu cycles. */ #ifdef CONFIG_CPU_RM9000 + #define mtc0_tlbw_hazard \ .set push; \ .set mips32; \ - ssnop; ssnop; ssnop; ssnop; \ + _ssnop; _ssnop; _ssnop; _ssnop; \ .set pop #define tlbw_eret_hazard \ .set push; \ .set mips32; \ - ssnop; ssnop; ssnop; ssnop; \ + _ssnop; _ssnop; _ssnop; _ssnop; \ .set pop #else @@ -43,6 +48,33 @@ #define tlbw_eret_hazard #endif +/* + * mtc0->mfc0 hazard + * The 24K has a 2 cycle mtc0/mfc0 execution hazard. + * It is a MIPS32R2 processor so ehb will clear the hazard. + */ + +#ifdef CONFIG_CPU_MIPSR2 +/* + * Use a macro for ehb unless explicit support for MIPSR2 is enabled + */ + .macro ehb + sll $0, $0, 3 + .endm + +#define irq_enable_hazard \ + ehb # irq_enable_hazard + +#define irq_disable_hazard \ + ehb # irq_disable_hazard + +#else + +#define irq_enable_hazard +#define irq_disable_hazard + +#endif + #else /* __ASSEMBLY__ */ /* @@ -55,13 +87,13 @@ #define mtc0_tlbw_hazard() \ __asm__ __volatile__( \ ".set\tmips32\n\t" \ - "ssnop; ssnop; ssnop; ssnop\n\t" \ + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ ".set\tmips0") #define tlbw_use_hazard() \ __asm__ __volatile__( \ ".set\tmips32\n\t" \ - "ssnop; ssnop; ssnop; ssnop\n\t" \ + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \ ".set\tmips0") #else @@ -82,6 +114,83 @@ #endif +/* + * mtc0->mfc0 hazard + * The 24K has a 2 cycle mtc0/mfc0 execution hazard. + * It is a MIPS32R2 processor so ehb will clear the hazard. + */ + +#ifdef CONFIG_CPU_MIPSR2 +/* + * Use a macro for ehb unless explicit support for MIPSR2 is enabled + */ +__asm__( + " .macro ehb \n\t" + " sll $0, $0, 3 \n\t" + " .endm \n\t" + " \n\t" + " .macro\tirq_enable_hazard \n\t" + " ehb \n\t" + " .endm \n\t" + " \n\t" + " .macro\tirq_disable_hazard \n\t" + " ehb \n\t" + " .endm"); + +#define irq_enable_hazard() \ + __asm__ __volatile__( \ + "ehb\t\t\t\t# irq_enable_hazard") + +#define irq_disable_hazard() \ + __asm__ __volatile__( \ + "ehb\t\t\t\t# irq_disable_hazard") + +#elif defined(CONFIG_CPU_R10000) + +/* + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. + */ + +__asm__( + " .macro\tirq_enable_hazard \n\t" + " .endm \n\t" + " \n\t" + " .macro\tirq_disable_hazard \n\t" + " .endm"); + +#define irq_enable_hazard() do { } while (0) +#define irq_disable_hazard() do { } while (0) + +#else + +/* + * Default for classic MIPS processors. Assume worst case hazards but don't + * care about the irq_enable_hazard - sooner or later the hardware will + * enable it and we don't care when exactly. + */ + +__asm__( + " .macro _ssnop \n\t" + " sll $0, $2, 1 \n\t" + " .endm \n\t" + " \n\t" + " # \n\t" + " # There is a hazard but we do not care \n\t" + " # \n\t" + " .macro\tirq_enable_hazard \n\t" + " .endm \n\t" + " \n\t" + " .macro\tirq_disable_hazard \n\t" + " _ssnop; _ssnop; _ssnop \n\t" + " .endm"); + +#define irq_enable_hazard() do { } while (0) +#define irq_disable_hazard() \ + __asm__ __volatile__( \ + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard") + +#endif + #endif /* __ASSEMBLY__ */ #endif /* _ASM_HAZARDS_H */ diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h new file mode 100644 index 000000000000..1de5c32a5884 --- /dev/null +++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h @@ -0,0 +1,38 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003, 2004 Ralf Baechle + */ +#ifndef __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H +#define __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H + +/* + * Momentum Jaguar ATX always has the RM9000 processor. + */ +#define cpu_has_watch 1 +#define cpu_has_mips16 0 +#define cpu_has_divec 0 +#define cpu_has_vce 0 +#define cpu_has_cache_cdex_p 0 +#define cpu_has_cache_cdex_s 0 +#define cpu_has_prefetch 1 +#define cpu_has_mcheck 0 +#define cpu_has_ejtag 0 + +#define cpu_has_llsc 1 +#define cpu_has_vtag_icache 0 +#define cpu_has_dc_aliases 0 +#define cpu_has_ic_fills_f_dc 0 + +#define cpu_has_nofpuex 0 +#define cpu_has_64bits 1 + +#define cpu_has_subset_pcaches 0 + +#define cpu_dcache_line_size() 32 +#define cpu_icache_line_size() 32 +#define cpu_scache_line_size() 32 + +#endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 8bdab9794feb..71198779fcd6 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -632,7 +632,7 @@ do { \ } while (0) /* - * On The RM7000 these are use to access cop0 set 1 registers + * On RM7000/RM9000 these are uses to access cop0 set 1 registers */ #define __read_32bit_c0_ctrl_register(source) \ ({ int __res; \ diff --git a/include/asm-mips/mmu_context.h b/include/asm-mips/mmu_context.h index e42794180211..dd7591b48ee1 100644 --- a/include/asm-mips/mmu_context.h +++ b/include/asm-mips/mmu_context.h @@ -45,12 +45,17 @@ extern unsigned long pgd_current[]; #define ASID_INC 0x40 #define ASID_MASK 0xfc0 +#elif defined(CONFIG_CPU_R8000) + +#define ASID_INC 0x10 +#define ASID_MASK 0xff0 + #elif defined(CONFIG_CPU_RM9000) #define ASID_INC 0x1 #define ASID_MASK 0xfff -#else /* FIXME: not correct for R6000, R8000 */ +#else /* FIXME: not correct for R6000 */ #define ASID_INC 0x1 #define ASID_MASK 0xff @@ -78,9 +83,8 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) unsigned long asid = asid_cache(cpu); if (! ((asid += ASID_INC) & ASID_MASK) ) { -#ifdef CONFIG_VTAG_ICACHE - flush_icache_all(); -#endif + if (cpu_has_vtag_icache) + flush_icache_all(); local_flush_tlb_all(); /* start new asid cycle */ if (!asid) /* fix version if needed */ asid = ASID_FIRST_VERSION; diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h index 99635e6b610e..90ee24aad955 100644 --- a/include/asm-mips/module.h +++ b/include/asm-mips/module.h @@ -2,11 +2,14 @@ #define _ASM_MODULE_H #include <linux/config.h> +#include <linux/list.h> +#include <asm/uaccess.h> struct mod_arch_specific { /* Data Bus Error exception tables */ - const struct exception_table_entry *dbe_table_start; - const struct exception_table_entry *dbe_table_end; + struct list_head dbe_list; + const struct exception_table_entry *dbe_start; + const struct exception_table_entry *dbe_end; }; typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ @@ -38,4 +41,16 @@ typedef struct #endif +#ifdef CONFIG_MODULES +/* Given an address, look for it in the exception tables. */ +const struct exception_table_entry*search_module_dbetables(unsigned long addr); +#else +/* Given an address, look for it in the exception tables. */ +static inline const struct exception_table_entry * +search_module_dbetables(unsigned long addr) +{ + return NULL; +} +#endif + #endif /* _ASM_MODULE_H */ diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index 37de18f63b43..47ca67f25e54 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -10,16 +10,20 @@ #define _ASM_PAGE_H #include <linux/config.h> -#include <spaces.h> #ifdef __KERNEL__ +#include <spaces.h> + /* * PAGE_SHIFT determines the page size */ #ifdef CONFIG_PAGE_SIZE_4KB #define PAGE_SHIFT 12 #endif +#ifdef CONFIG_PAGE_SIZE_8KB +#define PAGE_SHIFT 13 +#endif #ifdef CONFIG_PAGE_SIZE_16KB #define PAGE_SHIFT 14 #endif diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h index ba29750e4f1c..1af4e5b600c6 100644 --- a/include/asm-mips/pci.h +++ b/include/asm-mips/pci.h @@ -87,6 +87,9 @@ extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction); +extern void pcibios_resource_to_bus(struct pci_dev *dev, + struct pci_bus_region *region, struct resource *res); + #endif /* __KERNEL__ */ /* implement the pci_ DMA API in terms of the generic device dma_ one */ diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h index 51326d10b880..65bee143ebe3 100644 --- a/include/asm-mips/pgtable-32.h +++ b/include/asm-mips/pgtable-32.h @@ -141,35 +141,8 @@ static inline void pgd_clear(pgd_t *pgdp) { } #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #endif -#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) - -/* - * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset - * into this range: - */ -#define pte_to_pgoff(_pte) \ - ((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 )) - -#define pgoff_to_pte(off) \ - ((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE }) - -#else - -/* - * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset - * into this range: - */ -#define pte_to_pgoff(_pte) \ - ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 )) - -#define pgoff_to_pte(off) \ - ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE }) - -#endif - #define __pgd_offset(address) pgd_index(address) -#define __pmd_offset(address) \ - (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) +#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) /* to find an entry in a kernel page-table-directory */ #define pgd_offset_k(address) pgd_offset(&init_mm, address) @@ -200,17 +173,46 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address) #define pte_unmap(pte) ((void)(pte)) #define pte_unmap_nested(pte) ((void)(pte)) -/* Swap entries must have VALID and GLOBAL bits cleared. */ #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) -#define __swp_type(x) (((x).val >> 1) & 0x7f) -#define __swp_offset(x) ((x).val >> 10) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 10) }) +/* Swap entries must have VALID bit cleared. */ +#define __swp_type(x) (((x).val >> 10) & 0x1f) +#define __swp_offset(x) ((x).val >> 15) +#define __swp_entry(type,offset) \ + ((swp_entry_t) { ((type) << 10) | ((offset) << 15) }) + +/* + * Bits 0, 1, 2, 9 and 10 are taken, split up the 27 bits of offset + * into this range: + */ +#define PTE_FILE_MAX_BITS 27 + +#define pte_to_pgoff(_pte) \ + ((((_pte).pte >> 3) & 0x3f ) + (((_pte).pte >> 11) << 8 )) + +#define pgoff_to_pte(off) \ + ((pte_t) { (((off) & 0x3f) << 3) + (((off) >> 8) << 11) + _PAGE_FILE }) + #else -#define __swp_type(x) (((x).val >> 1) & 0x1f) -#define __swp_offset(x) ((x).val >> 8) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) }) +/* Swap entries must have VALID and GLOBAL bits cleared. */ +#define __swp_type(x) (((x).val >> 8) & 0x1f) +#define __swp_offset(x) ((x).val >> 13) +#define __swp_entry(type,offset) \ + ((swp_entry_t) { ((type) << 8) | ((offset) << 13) }) + +/* + * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset + * into this range: + */ +#define PTE_FILE_MAX_BITS 27 + +#define pte_to_pgoff(_pte) \ + ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 )) + +#define pgoff_to_pte(off) \ + ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE }) + #endif #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h index eba84a79efc9..333d9a8f585f 100644 --- a/include/asm-mips/pgtable-64.h +++ b/include/asm-mips/pgtable-64.h @@ -53,7 +53,11 @@ * We used to implement 41 bits by having an order 1 pmd level but that seemed * rather pointless. * - * For 16kB page size we use a 2 level page tree which permit a total of + * For 8kB page size we use a 3 level page tree which permits a total of + * 8TB of address space. Alternatively a 33-bit / 8GB organization using + * two levels would be easy to implement. + * + * For 16kB page size we use a 2 level page tree which permits a total of * 36 bits of virtual address space. We could add a third leve. but it seems * like at the moment there's no need for this. * @@ -65,6 +69,11 @@ #define PMD_ORDER 1 #define PTE_ORDER 0 #endif +#ifdef CONFIG_PAGE_SIZE_8KB +#define PGD_ORDER 0 +#define PMD_ORDER 0 +#define PTE_ORDER 0 +#endif #ifdef CONFIG_PAGE_SIZE_16KB #define PGD_ORDER 0 #define PMD_ORDER 0 @@ -148,16 +157,6 @@ static inline void pgd_clear(pgd_t *pgdp) #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) #endif -/* - * Bits 0, 1, 2, 7 and 8 are taken, split up the 27 bits of offset - * into this range: - */ -#define pte_to_pgoff(_pte) \ - ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 )) - -#define pgoff_to_pte(off) \ - ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE }) - #define __pgd_offset(address) pgd_index(address) #define page_pte(page) page_pte_prot(page, __pgprot(0)) @@ -215,6 +214,18 @@ static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) /* + * Bits 0, 1, 2, 7 and 8 are taken, split up the 32 bits of offset + * into this range: + */ +#define PTE_FILE_MAX_BITS 32 + +#define pte_to_pgoff(_pte) \ + ((((_pte).pte >> 3) & 0x1f ) + (((_pte).pte >> 9) << 6 )) + +#define pgoff_to_pte(off) \ + ((pte_t) { (((off) & 0x1f) << 3) + (((off) >> 6) << 9) + _PAGE_FILE }) + +/* * Used for the b0rked handling of kernel pagetables on the 64-bit kernel. */ extern pte_t kptbl[(PAGE_SIZE << PGD_ORDER)/sizeof(pte_t)]; diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h index 22d19833a4b4..76c1ae1c7dee 100644 --- a/include/asm-mips/pgtable-bits.h +++ b/include/asm-mips/pgtable-bits.h @@ -60,7 +60,7 @@ #define _PAGE_SILENT_WRITE (1<<8) #define _CACHE_MASK (7<<9) -#if defined(CONFIG_CPU_SB1) +#ifdef CONFIG_CPU_SB1 /* No penalty for being coherent on the SB1, so just use it for "noncoherent" spaces, too. Shouldn't hurt. */ @@ -70,6 +70,20 @@ #define _CACHE_CACHABLE_NONCOHERENT (5<<9) #define _CACHE_UNCACHED_ACCELERATED (7<<9) +#elif defined(CONFIG_CPU_RM9000) + +#define _CACHE_WT (0 << 9) +#define _CACHE_WTWA (1 << 9) +#define _CACHE_UC_B (2 << 9) +#define _CACHE_WB (3 << 9) +#define _CACHE_CWBEA (4 << 9) +#define _CACHE_CWB (5 << 9) +#define _CACHE_UCNB (6 << 9) +#define _CACHE_FPC (7 << 9) + +#define _CACHE_UNCACHED _CACHE_UC_B +#define _CACHE_CACHABLE_NONCOHERENT _CACHE_UC_B + #else #define _CACHE_CACHABLE_NO_WA (0<<9) /* R4600 only */ @@ -93,6 +107,8 @@ #define PAGE_CACHABLE_DEFAULT _CACHE_UNCACHED #elif defined(CONFIG_DMA_NONCOHERENT) #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_NONCOHERENT +#elif defined(CONFIG_CPU_RM9000) +#define PAGE_CACHABLE_DEFAULT _CACHE_CWBEA #else #define PAGE_CACHABLE_DEFAULT _CACHE_CACHABLE_COW #endif diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h index 5b2aa070cfa2..9d5a8fad0949 100644 --- a/include/asm-mips/pgtable.h +++ b/include/asm-mips/pgtable.h @@ -125,8 +125,6 @@ static inline void pte_clear(pte_t *ptep) extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; -#define PTE_FILE_MAX_BITS 27 - /* * The following only work if pte_present() is true. * Undefined behaviour if not.. diff --git a/include/asm-mips/pmon.h b/include/asm-mips/pmon.h index 0162517854d4..7b4f990e152a 100644 --- a/include/asm-mips/pmon.h +++ b/include/asm-mips/pmon.h @@ -17,6 +17,9 @@ struct callvectors { int (*printf) (const char*, ...); /* 20 */ void (*cacheflush) (void); /* 24 */ char* (*gets) (char*); /* 28 */ + int (*cpustart) (int, void *, int, int); /* 32 */ }; +extern struct callvectors *debug_vectors; + #endif /* _ASM_PMON_H */ diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h index 70534af2a59c..8e38389a9915 100644 --- a/include/asm-mips/processor.h +++ b/include/asm-mips/processor.h @@ -280,15 +280,6 @@ unsigned long get_wchan(struct task_struct *p); */ #define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);}) -/* - * For now. The 32-bit cycle counter is screwed up so solving this nicely takes a little - * brainwork ... - */ -static inline unsigned long long sched_clock(void) -{ - return 0ULL; -} - #ifdef CONFIG_CPU_HAS_PREFETCH #define ARCH_HAS_PREFETCH diff --git a/include/asm-mips/semaphore.h b/include/asm-mips/semaphore.h index bab913a90644..ed9a3d774c6a 100644 --- a/include/asm-mips/semaphore.h +++ b/include/asm-mips/semaphore.h @@ -4,61 +4,70 @@ * for more details. * * Copyright (C) 1996 Linus Torvalds - * Copyright (C) 1998, 99, 2000, 01 Ralf Baechle + * Copyright (C) 1998, 99, 2000, 01, 04 Ralf Baechle * Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc. * Copyright (C) 2000, 01 MIPS Technologies, Inc. + * + * In all honesty, little of the old MIPS code left - the PPC64 variant was + * just looking nice and portable so I ripped it. Credits to whoever wrote + * it. */ -#ifndef _ASM_SEMAPHORE_H -#define _ASM_SEMAPHORE_H +#ifndef __ASM_SEMAPHORE_H +#define __ASM_SEMAPHORE_H + +/* + * Remove spinlock-based RW semaphores; RW semaphore definitions are + * now in rwsem.h and we use the generic lib/rwsem.c implementation. + * Rework semaphores to use atomic_dec_if_positive. + * -- Paul Mackerras (paulus@samba.org) + */ + +#ifdef __KERNEL__ -#include <linux/compiler.h> -#include <linux/config.h> -#include <linux/spinlock.h> +#include <asm/atomic.h> +#include <asm/system.h> #include <linux/wait.h> #include <linux/rwsem.h> -#include <asm/atomic.h> struct semaphore { -#ifdef __MIPSEB__ - atomic_t count; - atomic_t waking; -#else - atomic_t waking; + /* + * Note that any negative value of count is equivalent to 0, + * but additionally indicates that some process(es) might be + * sleeping on `wait'. + */ atomic_t count; -#endif wait_queue_head_t wait; -#if WAITQUEUE_DEBUG +#ifdef WAITQUEUE_DEBUG long __magic; #endif -} __attribute__((aligned(8))); +}; -#if WAITQUEUE_DEBUG -# define __SEM_DEBUG_INIT(name) , .__magic = (long)&(name).__magic +#ifdef WAITQUEUE_DEBUG +# define __SEM_DEBUG_INIT(name) \ + , (long)&(name).__magic #else # define __SEM_DEBUG_INIT(name) #endif -#define __SEMAPHORE_INITIALIZER(name,_count) { \ - .count = ATOMIC_INIT(_count), \ - .waking = ATOMIC_INIT(0), \ - .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ - __SEM_DEBUG_INIT(name) \ -} +#define __SEMAPHORE_INITIALIZER(name, count) \ + { ATOMIC_INIT(count), \ + __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \ + __SEM_DEBUG_INIT(name) } -#define __MUTEX_INITIALIZER(name) __SEMAPHORE_INITIALIZER(name, 1) +#define __MUTEX_INITIALIZER(name) \ + __SEMAPHORE_INITIALIZER(name, 1) -#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ - struct semaphore name = __SEMAPHORE_INITIALIZER(name, count) +#define __DECLARE_SEMAPHORE_GENERIC(name, count) \ + struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) -#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1) -#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) +#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name, 1) +#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name, 0) static inline void sema_init (struct semaphore *sem, int val) { atomic_set(&sem->count, val); - atomic_set(&sem->waking, 0); init_waitqueue_head(&sem->wait); -#if WAITQUEUE_DEBUG +#ifdef WAITQUEUE_DEBUG sem->__magic = (long)&sem->__magic; #endif } @@ -73,211 +82,57 @@ static inline void init_MUTEX_LOCKED (struct semaphore *sem) sema_init(sem, 0); } -#ifndef CONFIG_CPU_HAS_LLDSCD -/* - * On machines without lld/scd we need a spinlock to make the manipulation of - * sem->count and sem->waking atomic. - */ -extern spinlock_t semaphore_lock; -#endif - -extern void __down_failed(struct semaphore * sem); -extern int __down_failed_interruptible(struct semaphore * sem); -extern void __up_wakeup(struct semaphore * sem); +extern void __down(struct semaphore * sem); +extern int __down_interruptible(struct semaphore * sem); +extern void __up(struct semaphore * sem); static inline void down(struct semaphore * sem) { - int count; - -#if WAITQUEUE_DEBUG +#ifdef WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif might_sleep(); - count = atomic_dec_return(&sem->count); - if (unlikely(count < 0)) - __down_failed(sem); + + /* + * Try to get the semaphore, take the slow path if we fail. + */ + if (unlikely(atomic_dec_return(&sem->count) < 0)) + __down(sem); } -/* - * Interruptible try to acquire a semaphore. If we obtained - * it, return zero. If we were interrupted, returns -EINTR - */ static inline int down_interruptible(struct semaphore * sem) { - int count; + int ret = 0; -#if WAITQUEUE_DEBUG +#ifdef WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif might_sleep(); - count = atomic_dec_return(&sem->count); - if (unlikely(count < 0)) - return __down_failed_interruptible(sem); - - return 0; -} - -#ifdef CONFIG_CPU_HAS_LLDSCD - -/* - * down_trylock returns 0 on success, 1 if we failed to get the lock. - * - * We must manipulate count and waking simultaneously and atomically. - * Here, we do this by using lld/scd on the pair of 32-bit words. - * - * Pseudocode: - * - * Decrement(sem->count) - * If(sem->count >=0) { - * Return(SUCCESS) // resource is free - * } else { - * If(sem->waking <= 0) { // if no wakeup pending - * Increment(sem->count) // undo decrement - * Return(FAILURE) - * } else { - * Decrement(sem->waking) // otherwise "steal" wakeup - * Return(SUCCESS) - * } - * } - */ -static inline int down_trylock(struct semaphore * sem) -{ - long ret, tmp, tmp2, sub; - -#if WAITQUEUE_DEBUG - CHECK_MAGIC(sem->__magic); -#endif - - __asm__ __volatile__( - " .set mips3 # down_trylock \n" - "0: lld %1, %4 \n" - " dli %3, 0x0000000100000000 # count -= 1 \n" - " dsubu %1, %3 \n" - " li %0, 0 # ret = 0 \n" - " bgez %1, 2f # if count >= 0 \n" - " sll %2, %1, 0 # extract waking \n" - " blez %2, 1f # if waking < 0 -> 1f \n" - " daddiu %1, %1, -1 # waking -= 1 \n" - " b 2f \n" - "1: daddu %1, %1, %3 # count += 1 \n" - " li %0, 1 # ret = 1 \n" - "2: scd %1, %4 \n" - " beqz %1, 0b \n" - " sync \n" - " .set mips0 \n" - : "=&r"(ret), "=&r"(tmp), "=&r"(tmp2), "=&r"(sub) - : "m"(*sem) - : "memory"); + if (unlikely(atomic_dec_return(&sem->count) < 0)) + ret = __down_interruptible(sem); return ret; } -/* - * Note! This is subtle. We jump to wake people up only if - * the semaphore was negative (== somebody was waiting on it). - */ -static inline void up(struct semaphore * sem) -{ - unsigned long tmp, tmp2; - int count; - -#if WAITQUEUE_DEBUG - CHECK_MAGIC(sem->__magic); -#endif - /* - * We must manipulate count and waking simultaneously and atomically. - * Otherwise we have races between up and __down_failed_interruptible - * waking up on a signal. - */ - - __asm__ __volatile__( - " .set mips3 \n" - " sync # up \n" - "1: lld %1, %3 \n" - " dsra32 %0, %1, 0 # extract count to %0 \n" - " daddiu %0, 1 # count += 1 \n" - " slti %2, %0, 1 # %3 = (%0 <= 0) \n" - " daddu %1, %2 # waking += %3 \n" - " dsll32 %1, %1, 0 # zero-extend %1 \n" - " dsrl32 %1, %1, 0 \n" - " dsll32 %2, %0, 0 # Reassemble union \n" - " or %1, %2 # from count and waking \n" - " scd %1, %3 \n" - " beqz %1, 1b \n" - " .set mips0 \n" - : "=&r"(count), "=&r"(tmp), "=&r"(tmp2), "+m"(*sem) - : - : "memory"); - - if (unlikely(count <= 0)) - __up_wakeup(sem); -} - -#else - -/* - * Non-blockingly attempt to down() a semaphore. - * Returns zero if we acquired it - */ static inline int down_trylock(struct semaphore * sem) { - unsigned long flags; - int count, waking; - int ret = 0; - -#if WAITQUEUE_DEBUG +#ifdef WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif - spin_lock_irqsave(&semaphore_lock, flags); - count = atomic_read(&sem->count) - 1; - atomic_set(&sem->count, count); - if (unlikely(count < 0)) { - waking = atomic_read(&sem->waking); - if (waking <= 0) { - atomic_set(&sem->count, count + 1); - ret = 1; - } else { - atomic_set(&sem->waking, waking - 1); - ret = 0; - } - } - spin_unlock_irqrestore(&semaphore_lock, flags); - - return ret; + return atomic_dec_if_positive(&sem->count) < 0; } -/* - * Note! This is subtle. We jump to wake people up only if - * the semaphore was negative (== somebody was waiting on it). - */ static inline void up(struct semaphore * sem) { - unsigned long flags; - int count, waking; - -#if WAITQUEUE_DEBUG +#ifdef WAITQUEUE_DEBUG CHECK_MAGIC(sem->__magic); #endif - /* - * We must manipulate count and waking simultaneously and atomically. - * Otherwise we have races between up and __down_failed_interruptible - * waking up on a signal. - */ - - spin_lock_irqsave(&semaphore_lock, flags); - count = atomic_read(&sem->count) + 1; - waking = atomic_read(&sem->waking); - if (count <= 0) - waking++; - atomic_set(&sem->count, count); - atomic_set(&sem->waking, waking); - spin_unlock_irqrestore(&semaphore_lock, flags); - if (unlikely(count <= 0)) - __up_wakeup(sem); + if (unlikely(atomic_inc_return(&sem->count) <= 0)) + __up(sem); } -#endif /* CONFIG_CPU_HAS_LLDSCD */ +#endif /* __KERNEL__ */ -#endif /* _ASM_SEMAPHORE_H */ +#endif /* __ASM_SEMAPHORE_H */ diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h index ae455b04b31a..83c735adef98 100644 --- a/include/asm-mips/serial.h +++ b/include/asm-mips/serial.h @@ -315,24 +315,6 @@ #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS #endif -#ifdef CONFIG_TITAN_SERIAL -/* 16552 20 MHz crystal */ -#define TITAN_SERIAL_BASE_BAUD ( 20000000 / 16 ) -#define TITAN_SERIAL_IRQ XXX -#define TITAN_SERIAL_BASE 0xffffffff - -#define _TITAN_SERIAL_INIT(int, base) \ - { baud_base: TITAN_SERIAL_BASE_BAUD, irq: int, \ - flags: STD_COM_FLAGS, iomem_base: (u8 *) base, \ - iomem_reg_shift: 2, io_type: SERIAL_IO_MEM \ - } - -#define TITAN_SERIAL_PORT_DEFNS \ - _TITAN_SERIAL_INIT(TITAN_SERIAL_IRQ, TITAN_SERIAL_BASE) -#else -#define TITAN_SERIAL_PORT_DEFNS -#endif - #ifdef CONFIG_DDB5477 #include <asm/ddb5xxx/ddb5477.h> #define DDB5477_SERIAL_PORT_DEFNS \ @@ -371,7 +353,6 @@ MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ - TITAN_SERIAL_PORT_DEFNS \ TXX927_SERIAL_PORT_DEFNS \ AU1000_SERIAL_PORT_DEFNS diff --git a/include/asm-mips/setup.h b/include/asm-mips/setup.h new file mode 100644 index 000000000000..737fa4a6912e --- /dev/null +++ b/include/asm-mips/setup.h @@ -0,0 +1,8 @@ +#ifdef __KERNEL__ +#ifndef _MIPS_SETUP_H +#define _MIPS_SETUP_H + +#define COMMAND_LINE_SIZE 256 + +#endif /* __SETUP_H */ +#endif /* __KERNEL__ */ diff --git a/include/asm-mips/smp.h b/include/asm-mips/smp.h index 4146d42d48fe..f0ef26b43f7e 100644 --- a/include/asm-mips/smp.h +++ b/include/asm-mips/smp.h @@ -51,8 +51,6 @@ extern cpumask_t phys_cpu_present_map; extern cpumask_t cpu_online_map; #define cpu_possible_map phys_cpu_present_map -#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) - extern cpumask_t cpu_callout_map; /* We don't mark CPUs online until __cpu_up(), so we need another measure */ static inline int num_booting_cpus(void) @@ -91,12 +89,6 @@ extern void prom_init_secondary(void); extern void prom_prepare_cpus(unsigned int max_cpus); /* - * Do whatever setup needs to be done for SMP at the board level. Return - * the number of cpus in the system, including this one - */ -extern int prom_setup_smp(void); - -/* * Last chance for the board code to finish SMP initialization before * the CPU is "online". */ diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h index 626a8ab288e1..53a441c3cb3b 100644 --- a/include/asm-mips/stackframe.h +++ b/include/asm-mips/stackframe.h @@ -302,6 +302,7 @@ or t0, t1 xori t0, 0x1f mtc0 t0, CP0_STATUS + irq_disable_hazard .endm /* @@ -314,6 +315,7 @@ or t0, t1 xori t0, 0x1e mtc0 t0, CP0_STATUS + irq_enable_hazard .endm /* @@ -326,6 +328,7 @@ or t0, t1 xori t0, 0x1e mtc0 t0, CP0_STATUS + irq_disable_hazard .endm #endif /* _ASM_STACKFRAME_H */ diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 9b7354b872f1..9bacd119796b 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -19,6 +19,7 @@ #include <asm/addrspace.h> #include <asm/ptrace.h> +#include <asm/hazards.h> __asm__ ( ".macro\tlocal_irq_enable\n\t" @@ -29,6 +30,7 @@ __asm__ ( "ori\t$1,0x1f\n\t" "xori\t$1,0x1e\n\t" "mtc0\t$1,$12\n\t" + "irq_enable_hazard\n\t" ".set\tpop\n\t" ".endm"); @@ -57,9 +59,7 @@ __asm__ ( "xori\t$1,1\n\t" ".set\tnoreorder\n\t" "mtc0\t$1,$12\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" + "irq_disable_hazard\n\t" ".set\tpop\n\t" ".endm"); @@ -80,7 +80,7 @@ __asm__ ( ".set\tpop\n\t" ".endm"); -#define local_save_flags(x) \ +#define local_save_flags(x) \ __asm__ __volatile__( \ "local_save_flags %0" \ : "=r" (x)) @@ -95,9 +95,7 @@ __asm__ ( "xori\t$1, 1\n\t" ".set\tnoreorder\n\t" "mtc0\t$1, $12\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" + "irq_disable_hazard\n\t" ".set\tpop\n\t" ".endm"); @@ -108,7 +106,8 @@ __asm__ __volatile__( \ : /* no inputs */ \ : "memory") -__asm__(".macro\tlocal_irq_restore flags\n\t" +__asm__ ( + ".macro\tlocal_irq_restore flags\n\t" ".set\tnoreorder\n\t" ".set\tnoat\n\t" "mfc0\t$1, $12\n\t" @@ -117,14 +116,12 @@ __asm__(".macro\tlocal_irq_restore flags\n\t" "xori\t$1, 1\n\t" "or\t\\flags, $1\n\t" "mtc0\t\\flags, $12\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" - "sll\t$0, $0, 1\t\t\t# nop\n\t" + "irq_disable_hazard\n\t" ".set\tat\n\t" ".set\treorder\n\t" ".endm"); -#define local_irq_restore(flags) \ +#define local_irq_restore(flags) \ do { \ unsigned long __tmp1; \ \ diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h index 11782520310b..508b32ad330a 100644 --- a/include/asm-mips/thread_info.h +++ b/include/asm-mips/thread_info.h @@ -68,6 +68,9 @@ register struct thread_info *__current_thread_info __asm__("$28"); #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_MIPS64) #define THREAD_SIZE_ORDER (2) #endif +#ifdef CONFIG_PAGE_SIZE_8KB +#define THREAD_SIZE_ORDER (1) +#endif #ifdef CONFIG_PAGE_SIZE_16KB #define THREAD_SIZE_ORDER (0) #endif diff --git a/include/asm-mips/titan_dep.h b/include/asm-mips/titan_dep.h index e25423d39bb5..d820445e8ead 100644 --- a/include/asm-mips/titan_dep.h +++ b/include/asm-mips/titan_dep.h @@ -16,9 +16,6 @@ #include <asm/addrspace.h> /* for KSEG1ADDR() */ #include <asm/byteorder.h> /* for cpu_to_le32() */ -/* Turn on serial */ -#define CONFIG_TITAN_SERIAL - /* PCI */ #define TITAN_PCI_BASE 0xbb000000 @@ -50,8 +47,181 @@ */ #define RM9000x2_HTLINK_REG 0xbb000644 #define RM9000x2_BASE_ADDR 0xbb000000 -#define RM9000x2_OCD_HTCFGA 0x06f8 -#define RM9000x2_OCD_HTCFGD 0x06fc + +#define OCD_BASE 0xfb000000UL +#define OCD_SIZE 0x3000UL + +extern unsigned long ocd_base; + +/* + * OCD Registers + */ +#define RM9000x2_OCD_LKB5 0x0128 /* Ethernet */ +#define RM9000x2_OCD_LKM5 0x012c + +#define RM9000x2_OCD_LKB7 0x0138 /* HT Region 0 */ +#define RM9000x2_OCD_LKM7 0x013c +#define RM9000x2_OCD_LKB8 0x0140 /* HT Region 1 */ +#define RM9000x2_OCD_LKM8 0x0144 + +#define RM9000x2_OCD_LKB9 0x0148 /* Local Bus */ +#define RM9000x2_OCD_LKM9 0x014c +#define RM9000x2_OCD_LKB10 0x0150 +#define RM9000x2_OCD_LKM10 0x0154 +#define RM9000x2_OCD_LKB11 0x0158 +#define RM9000x2_OCD_LKM11 0x015c +#define RM9000x2_OCD_LKB12 0x0160 +#define RM9000x2_OCD_LKM12 0x0164 + +#define RM9000x2_OCD_LKB13 0x0168 /* Scratch RAM */ +#define RM9000x2_OCD_LKM13 0x016c + +#define RM9000x2_OCD_LPD0 0x0200 /* Local Bus */ +#define RM9000x2_OCD_LPD1 0x0210 +#define RM9000x2_OCD_LPD2 0x0220 +#define RM9000x2_OCD_LPD3 0x0230 + +#define RM9000x2_OCD_HTDVID 0x0600 /* HT Device Header */ +#define RM9000x2_OCD_HTSC 0x0604 +#define RM9000x2_OCD_HTCCR 0x0608 +#define RM9000x2_OCD_HTBHL 0x060c +#define RM9000x2_OCD_HTBAR0 0x0610 +#define RM9000x2_OCD_HTBAR1 0x0614 +#define RM9000x2_OCD_HTBAR2 0x0618 +#define RM9000x2_OCD_HTBAR3 0x061c +#define RM9000x2_OCD_HTBAR4 0x0620 +#define RM9000x2_OCD_HTBAR5 0x0624 +#define RM9000x2_OCD_HTCBCPT 0x0628 +#define RM9000x2_OCD_HTSDVID 0x062c +#define RM9000x2_OCD_HTXRA 0x0630 +#define RM9000x2_OCD_HTCAP1 0x0634 +#define RM9000x2_OCD_HTIL 0x063c + +#define RM9000x2_OCD_HTLCC 0x0640 /* HT Capability Block */ +#define RM9000x2_OCD_HTLINK 0x0644 +#define RM9000x2_OCD_HTFQREV 0x0648 + +#define RM9000x2_OCD_HTERCTL 0x0668 /* HT Controller */ +#define RM9000x2_OCD_HTRXDB 0x066c +#define RM9000x2_OCD_HTIMPED 0x0670 +#define RM9000x2_OCD_HTSWIMP 0x0674 +#define RM9000x2_OCD_HTCAL 0x0678 + +#define RM9000x2_OCD_HTBAA30 0x0680 +#define RM9000x2_OCD_HTBAA54 0x0684 +#define RM9000x2_OCD_HTMASK0 0x0688 +#define RM9000x2_OCD_HTMASK1 0x068c +#define RM9000x2_OCD_HTMASK2 0x0690 +#define RM9000x2_OCD_HTMASK3 0x0694 +#define RM9000x2_OCD_HTMASK4 0x0698 +#define RM9000x2_OCD_HTMASK5 0x069c + +#define RM9000x2_OCD_HTIFCTL 0x06a0 +#define RM9000x2_OCD_HTPLL 0x06a4 + +#define RM9000x2_OCD_HTSRI 0x06b0 +#define RM9000x2_OCD_HTRXNUM 0x06b4 +#define RM9000x2_OCD_HTTXNUM 0x06b8 + +#define RM9000x2_OCD_HTTXCNT 0x06c8 + +#define RM9000x2_OCD_HTERROR 0x06d8 +#define RM9000x2_OCD_HTRCRCE 0x06dc +#define RM9000x2_OCD_HTEOI 0x06e0 + +#define RM9000x2_OCD_CRCR 0x06f0 + +#define RM9000x2_OCD_HTCFGA 0x06f8 +#define RM9000x2_OCD_HTCFGD 0x06fc + +#define RM9000x2_OCD_INTMSG 0x0a00 + +#define RM9000x2_OCD_INTPIN0 0x0a40 +#define RM9000x2_OCD_INTPIN1 0x0a44 +#define RM9000x2_OCD_INTPIN2 0x0a48 +#define RM9000x2_OCD_INTPIN3 0x0a4c +#define RM9000x2_OCD_INTPIN4 0x0a50 +#define RM9000x2_OCD_INTPIN5 0x0a54 +#define RM9000x2_OCD_INTPIN6 0x0a58 +#define RM9000x2_OCD_INTPIN7 0x0a5c +#define RM9000x2_OCD_SEM 0x0a60 +#define RM9000x2_OCD_SEMSET 0x0a64 +#define RM9000x2_OCD_SEMCLR 0x0a68 + +#define RM9000x2_OCD_TKT 0x0a70 +#define RM9000x2_OCD_TKTINC 0x0a74 + +#define RM9000x2_OCD_NMICONFIG 0x0ac0 /* Interrupts */ +#define RM9000x2_OCD_INTP0PRI 0x1a80 +#define RM9000x2_OCD_INTP1PRI 0x1a80 +#define RM9000x2_OCD_INTP0STATUS0 0x1b00 +#define RM9000x2_OCD_INTP0MASK0 0x1b04 +#define RM9000x2_OCD_INTP0SET0 0x1b08 +#define RM9000x2_OCD_INTP0CLEAR0 0x1b0c +#define RM9000x2_OCD_INTP0STATUS1 0x1b10 +#define RM9000x2_OCD_INTP0MASK1 0x1b14 +#define RM9000x2_OCD_INTP0SET1 0x1b18 +#define RM9000x2_OCD_INTP0CLEAR1 0x1b1c +#define RM9000x2_OCD_INTP0STATUS2 0x1b20 +#define RM9000x2_OCD_INTP0MASK2 0x1b24 +#define RM9000x2_OCD_INTP0SET2 0x1b28 +#define RM9000x2_OCD_INTP0CLEAR2 0x1b2c +#define RM9000x2_OCD_INTP0STATUS3 0x1b30 +#define RM9000x2_OCD_INTP0MASK3 0x1b34 +#define RM9000x2_OCD_INTP0SET3 0x1b38 +#define RM9000x2_OCD_INTP0CLEAR3 0x1b3c +#define RM9000x2_OCD_INTP0STATUS4 0x1b40 +#define RM9000x2_OCD_INTP0MASK4 0x1b44 +#define RM9000x2_OCD_INTP0SET4 0x1b48 +#define RM9000x2_OCD_INTP0CLEAR4 0x1b4c +#define RM9000x2_OCD_INTP0STATUS5 0x1b50 +#define RM9000x2_OCD_INTP0MASK5 0x1b54 +#define RM9000x2_OCD_INTP0SET5 0x1b58 +#define RM9000x2_OCD_INTP0CLEAR5 0x1b5c +#define RM9000x2_OCD_INTP0STATUS6 0x1b60 +#define RM9000x2_OCD_INTP0MASK6 0x1b64 +#define RM9000x2_OCD_INTP0SET6 0x1b68 +#define RM9000x2_OCD_INTP0CLEAR6 0x1b6c +#define RM9000x2_OCD_INTP0STATUS7 0x1b70 +#define RM9000x2_OCD_INTP0MASK7 0x1b74 +#define RM9000x2_OCD_INTP0SET7 0x1b78 +#define RM9000x2_OCD_INTP0CLEAR7 0x1b7c +#define RM9000x2_OCD_INTP1STATUS0 0x2b00 +#define RM9000x2_OCD_INTP1MASK0 0x2b04 +#define RM9000x2_OCD_INTP1SET0 0x2b08 +#define RM9000x2_OCD_INTP1CLEAR0 0x2b0c +#define RM9000x2_OCD_INTP1STATUS1 0x2b10 +#define RM9000x2_OCD_INTP1MASK1 0x2b14 +#define RM9000x2_OCD_INTP1SET1 0x2b18 +#define RM9000x2_OCD_INTP1CLEAR1 0x2b1c +#define RM9000x2_OCD_INTP1STATUS2 0x2b20 +#define RM9000x2_OCD_INTP1MASK2 0x2b24 +#define RM9000x2_OCD_INTP1SET2 0x2b28 +#define RM9000x2_OCD_INTP1CLEAR2 0x2b2c +#define RM9000x2_OCD_INTP1STATUS3 0x2b30 +#define RM9000x2_OCD_INTP1MASK3 0x2b34 +#define RM9000x2_OCD_INTP1SET3 0x2b38 +#define RM9000x2_OCD_INTP1CLEAR3 0x2b3c +#define RM9000x2_OCD_INTP1STATUS4 0x2b40 +#define RM9000x2_OCD_INTP1MASK4 0x2b44 +#define RM9000x2_OCD_INTP1SET4 0x2b48 +#define RM9000x2_OCD_INTP1CLEAR4 0x2b4c +#define RM9000x2_OCD_INTP1STATUS5 0x2b50 +#define RM9000x2_OCD_INTP1MASK5 0x2b54 +#define RM9000x2_OCD_INTP1SET5 0x2b58 +#define RM9000x2_OCD_INTP1CLEAR5 0x2b5c +#define RM9000x2_OCD_INTP1STATUS6 0x2b60 +#define RM9000x2_OCD_INTP1MASK6 0x2b64 +#define RM9000x2_OCD_INTP1SET6 0x2b68 +#define RM9000x2_OCD_INTP1CLEAR6 0x2b6c +#define RM9000x2_OCD_INTP1STATUS7 0x2b70 +#define RM9000x2_OCD_INTP1MASK7 0x2b74 +#define RM9000x2_OCD_INTP1SET7 0x2b78 +#define RM9000x2_OCD_INTP1CLEAR7 0x2b7c + +#define OCD_READ(reg) (*(volatile unsigned int *)(ocd_base + (reg))) +#define OCD_WRITE(reg, val) \ + do { *(volatile unsigned int *)(ocd_base + (reg)) = (val); } while (0) /* * Hypertransport specific macros @@ -65,4 +235,3 @@ #define RM9K_READ_16(ofs, val) *(val) = *(volatile u16 *)(RM9000x2_BASE_ADDR+ofs) #endif - diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h index 4dfc72bd1b98..7c5a30028776 100644 --- a/include/asm-mips/unistd.h +++ b/include/asm-mips/unistd.h @@ -297,16 +297,17 @@ #define __NR_mq_timedreceive (__NR_Linux + 274) #define __NR_mq_notify (__NR_Linux + 275) #define __NR_mq_getsetattr (__NR_Linux + 276) +#define __NR_vserver (__NR_Linux + 277) /* * Offset of the last Linux o32 flavoured syscall */ -#define __NR_Linux_syscalls 276 +#define __NR_Linux_syscalls 277 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ #define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 276 +#define __NR_O32_Linux_syscalls 277 #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -550,16 +551,17 @@ #define __NR_mq_timedreceive (__NR_Linux + 233) #define __NR_mq_notify (__NR_Linux + 234) #define __NR_mq_getsetattr (__NR_Linux + 235) +#define __NR_vserver (__NR_Linux + 236) /* * Offset of the last Linux flavoured syscall */ -#define __NR_Linux_syscalls 235 +#define __NR_Linux_syscalls 236 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ #define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 235 +#define __NR_64_Linux_syscalls 236 #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -807,16 +809,17 @@ #define __NR_mq_timedreceive (__NR_Linux + 237) #define __NR_mq_notify (__NR_Linux + 238) #define __NR_mq_getsetattr (__NR_Linux + 239) +#define __NR_vserver (__NR_Linux + 240) /* * Offset of the last N32 flavoured syscall */ -#define __NR_Linux_syscalls 239 +#define __NR_Linux_syscalls 240 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ #define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 239 +#define __NR_N32_Linux_syscalls 240 #ifndef __ASSEMBLY__ diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h index 82d9db6cb352..5b55083c5281 100644 --- a/include/asm-mips/vr41xx/capcella.h +++ b/include/asm-mips/vr41xx/capcella.h @@ -1,54 +1,28 @@ /* - * FILE NAME - * include/asm-mips/vr41xx/capcella.h + * capcella.h, Include file for ZAO Networks Capcella. * - * BRIEF MODULE DESCRIPTION - * Include file for ZAO Networks Capcella. + * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Copyright 2002,2003 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __ZAO_CAPCELLA_H #define __ZAO_CAPCELLA_H -#include <asm/addrspace.h> #include <asm/vr41xx/vr41xx.h> /* - * Board specific address mapping - */ -#define VR41XX_PCI_MEM1_BASE 0x10000000 -#define VR41XX_PCI_MEM1_SIZE 0x04000000 -#define VR41XX_PCI_MEM1_MASK 0x7c000000 - -#define VR41XX_PCI_MEM2_BASE 0x14000000 -#define VR41XX_PCI_MEM2_SIZE 0x02000000 -#define VR41XX_PCI_MEM2_MASK 0x7e000000 - -#define VR41XX_PCI_IO_BASE 0x16000000 -#define VR41XX_PCI_IO_SIZE 0x02000000 -#define VR41XX_PCI_IO_MASK 0x7e000000 - -#define VR41XX_PCI_IO_START 0x01000000 -#define VR41XX_PCI_IO_END 0x01ffffff - -#define VR41XX_PCI_MEM_START 0x12000000 -#define VR41XX_PCI_MEM_END 0x15ffffff - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE) -#define IO_PORT_RESOURCE_START 0 -#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE -#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE -#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE) -#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE -#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE) - -/* * General-Purpose I/O Pin Number */ #define PC104PLUS_INTA_PIN 2 diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h index bff9f0aafcce..e6ac3c8e8bae 100644 --- a/include/asm-mips/vr41xx/mpc30x.h +++ b/include/asm-mips/vr41xx/mpc30x.h @@ -1,54 +1,28 @@ /* - * FILE NAME - * include/asm-mips/vr41xx/mpc30x.h + * mpc30x.h, Include file for Victor MP-C303/304. * - * BRIEF MODULE DESCRIPTION - * Include file for Victor MP-C303/304. + * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Copyright 2002,2003 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __VICTOR_MPC30X_H #define __VICTOR_MPC30X_H -#include <asm/addrspace.h> #include <asm/vr41xx/vr41xx.h> /* - * Board specific address mapping - */ -#define VR41XX_PCI_MEM1_BASE 0x10000000 -#define VR41XX_PCI_MEM1_SIZE 0x04000000 -#define VR41XX_PCI_MEM1_MASK 0x7c000000 - -#define VR41XX_PCI_MEM2_BASE 0x14000000 -#define VR41XX_PCI_MEM2_SIZE 0x02000000 -#define VR41XX_PCI_MEM2_MASK 0x7e000000 - -#define VR41XX_PCI_IO_BASE 0x16000000 -#define VR41XX_PCI_IO_SIZE 0x02000000 -#define VR41XX_PCI_IO_MASK 0x7e000000 - -#define VR41XX_PCI_IO_START 0x01000000 -#define VR41XX_PCI_IO_END 0x01ffffff - -#define VR41XX_PCI_MEM_START 0x12000000 -#define VR41XX_PCI_MEM_END 0x15ffffff - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE) -#define IO_PORT_RESOURCE_START 0 -#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE -#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE -#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE) -#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE -#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE) - -/* * General-Purpose I/O Pin Number */ #define VRC4173_PIN 1 diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h new file mode 100644 index 000000000000..273c6392688f --- /dev/null +++ b/include/asm-mips/vr41xx/tb0219.h @@ -0,0 +1,42 @@ +/* + * tb0219.h, Include file for TANBAC TB0219. + * + * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> + * + * Modified for TANBAC TB0219: + * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ +#ifndef __TANBAC_TB0219_H +#define __TANBAC_TB0219_H + +#include <asm/vr41xx/vr41xx.h> + +/* + * General-Purpose I/O Pin Number + */ +#define TB0219_PCI_SLOT1_PIN 2 +#define TB0219_PCI_SLOT2_PIN 3 +#define TB0219_PCI_SLOT3_PIN 4 + +/* + * Interrupt Number + */ +#define TB0219_PCI_SLOT1_IRQ GIU_IRQ(TB0219_PCI_SLOT1_PIN) +#define TB0219_PCI_SLOT2_IRQ GIU_IRQ(TB0219_PCI_SLOT2_PIN) +#define TB0219_PCI_SLOT3_IRQ GIU_IRQ(TB0219_PCI_SLOT3_PIN) + +#endif /* __TANBAC_TB0219_H */ diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h index 97ca8898b763..0ff9a60ecacc 100644 --- a/include/asm-mips/vr41xx/tb0226.h +++ b/include/asm-mips/vr41xx/tb0226.h @@ -1,54 +1,28 @@ /* - * FILE NAME - * include/asm-mips/vr41xx/tb0226.h + * tb0226.h, Include file for TANBAC TB0226. * - * BRIEF MODULE DESCRIPTION - * Include file for TANBAC TB0226. + * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * Copyright 2002,2003 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __TANBAC_TB0226_H #define __TANBAC_TB0226_H -#include <asm/addrspace.h> #include <asm/vr41xx/vr41xx.h> /* - * Board specific address mapping - */ -#define VR41XX_PCI_MEM1_BASE 0x10000000 -#define VR41XX_PCI_MEM1_SIZE 0x04000000 -#define VR41XX_PCI_MEM1_MASK 0x7c000000 - -#define VR41XX_PCI_MEM2_BASE 0x14000000 -#define VR41XX_PCI_MEM2_SIZE 0x02000000 -#define VR41XX_PCI_MEM2_MASK 0x7e000000 - -#define VR41XX_PCI_IO_BASE 0x16000000 -#define VR41XX_PCI_IO_SIZE 0x02000000 -#define VR41XX_PCI_IO_MASK 0x7e000000 - -#define VR41XX_PCI_IO_START 0x01000000 -#define VR41XX_PCI_IO_END 0x01ffffff - -#define VR41XX_PCI_MEM_START 0x12000000 -#define VR41XX_PCI_MEM_END 0x15ffffff - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE) -#define IO_PORT_RESOURCE_START 0 -#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE -#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE -#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE) -#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE -#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE) - -/* * General-Purpose I/O Pin Number */ #define GD82559_1_PIN 2 diff --git a/include/asm-mips/vr41xx/tb0229.h b/include/asm-mips/vr41xx/tb0229.h deleted file mode 100644 index bd8cbc876e49..000000000000 --- a/include/asm-mips/vr41xx/tb0229.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * FILE NAME - * include/asm-mips/vr41xx/tb0229.h - * - * BRIEF MODULE DESCRIPTION - * Include file for TANBAC TB0229 and TB0219. - * - * Copyright 2002,2003 Yoichi Yuasa - * yuasa@hh.iij4u.or.jp - * - * Modified for TANBAC TB0229: - * Copyright 2003 Megasolution Inc. - * matsu@megasolution.jp - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef __TANBAC_TB0229_H -#define __TANBAC_TB0229_H - -#include <asm/addrspace.h> -#include <asm/vr41xx/vr41xx.h> - -/* - * Board specific address mapping - */ -#define VR41XX_PCI_MEM1_BASE 0x10000000 -#define VR41XX_PCI_MEM1_SIZE 0x04000000 -#define VR41XX_PCI_MEM1_MASK 0x7c000000 - -#define VR41XX_PCI_MEM2_BASE 0x14000000 -#define VR41XX_PCI_MEM2_SIZE 0x02000000 -#define VR41XX_PCI_MEM2_MASK 0x7e000000 - -#define VR41XX_PCI_IO_BASE 0x16000000 -#define VR41XX_PCI_IO_SIZE 0x02000000 -#define VR41XX_PCI_IO_MASK 0x7e000000 - -#define VR41XX_PCI_IO_START 0x01000000 -#define VR41XX_PCI_IO_END 0x01ffffff - -#define VR41XX_PCI_MEM_START 0x12000000 -#define VR41XX_PCI_MEM_END 0x15ffffff - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE) -#define IO_PORT_RESOURCE_START 0 -#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE -#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE -#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE) -#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE -#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE) - -/* - * General-Purpose I/O Pin Number - */ -#define TB0219_PCI_SLOT1_PIN 2 -#define TB0219_PCI_SLOT2_PIN 3 -#define TB0219_PCI_SLOT3_PIN 4 - -/* - * Interrupt Number - */ -#define TB0219_PCI_SLOT1_IRQ GIU_IRQ(TB0219_PCI_SLOT1_PIN) -#define TB0219_PCI_SLOT2_IRQ GIU_IRQ(TB0219_PCI_SLOT2_PIN) -#define TB0219_PCI_SLOT3_IRQ GIU_IRQ(TB0219_PCI_SLOT3_PIN) - -#define TB0219_RESET_REGS KSEG1ADDR(0x0a00000e) - -extern void tanbac_tb0229_restart(char *command); - -#endif /* __TANBAC_TB0229_H */ diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h index 53fe1162af7e..c57c8dca6117 100644 --- a/include/asm-mips/vr41xx/vr41xx.h +++ b/include/asm-mips/vr41xx/vr41xx.h @@ -43,12 +43,6 @@ #define PRID_VR4133 0x00000c84 /* - * Memory resource - */ -#define IO_MEM_RESOURCE_START 0UL -#define IO_MEM_RESOURCE_END 0x1fffffffUL - -/* * Bus Control Uint */ extern unsigned long vr41xx_get_vtclock_frequency(void); @@ -136,8 +130,71 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock); extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign); extern int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)); -extern void vr41xx_enable_dsiuint(void); -extern void vr41xx_disable_dsiuint(void); +#define PIUINT_COMMAND 0x0040 +#define PIUINT_DATA 0x0020 +#define PIUINT_PAGE1 0x0010 +#define PIUINT_PAGE0 0x0008 +#define PIUINT_DATALOST 0x0004 +#define PIUINT_STATUSCHANGE 0x0001 + +extern void vr41xx_enable_piuint(uint16_t mask); +extern void vr41xx_disable_piuint(uint16_t mask); + +#define AIUINT_INPUT_DMAEND 0x0800 +#define AIUINT_INPUT_DMAHALT 0x0400 +#define AIUINT_INPUT_DATALOST 0x0200 +#define AIUINT_INPUT_DATA 0x0100 +#define AIUINT_OUTPUT_DMAEND 0x0008 +#define AIUINT_OUTPUT_DMAHALT 0x0004 +#define AIUINT_OUTPUT_NODATA 0x0002 + +extern void vr41xx_enable_aiuint(uint16_t mask); +extern void vr41xx_disable_aiuint(uint16_t mask); + +#define KIUINT_DATALOST 0x0004 +#define KIUINT_DATAREADY 0x0002 +#define KIUINT_SCAN 0x0001 + +extern void vr41xx_enable_kiuint(uint16_t mask); +extern void vr41xx_disable_kiuint(uint16_t mask); + +#define DSIUINT_CTS 0x0800 +#define DSIUINT_RXERR 0x0400 +#define DSIUINT_RX 0x0200 +#define DSIUINT_TX 0x0100 +#define DSIUINT_ALL 0x0f00 + +extern void vr41xx_enable_dsiuint(uint16_t mask); +extern void vr41xx_disable_dsiuint(uint16_t mask); + +#define FIRINT_UNIT 0x0010 +#define FIRINT_RX_DMAEND 0x0008 +#define FIRINT_RX_DMAHALT 0x0004 +#define FIRINT_TX_DMAEND 0x0002 +#define FIRINT_TX_DMAHALT 0x0001 + +extern void vr41xx_enable_firint(uint16_t mask); +extern void vr41xx_disable_firint(uint16_t mask); + +extern void vr41xx_enable_pciint(void); +extern void vr41xx_disable_pciint(void); + +extern void vr41xx_enable_scuint(void); +extern void vr41xx_disable_scuint(void); + +#define CSIINT_TX_DMAEND 0x0040 +#define CSIINT_TX_DMAHALT 0x0020 +#define CSIINT_TX_DATA 0x0010 +#define CSIINT_TX_FIFOEMPTY 0x0008 +#define CSIINT_RX_DMAEND 0x0004 +#define CSIINT_RX_DMAHALT 0x0002 +#define CSIINT_RX_FIFOEMPTY 0x0001 + +extern void vr41xx_enable_csiint(uint16_t mask); +extern void vr41xx_disable_csiint(uint16_t mask); + +extern void vr41xx_enable_bcuint(void); +extern void vr41xx_disable_bcuint(void); /* * Power Management Unit @@ -220,18 +277,71 @@ extern void vr41xx_dsiu_init(void); /* * PCI Control Unit */ -struct vr41xx_pci_address_space { - u32 internal_base; - u32 address_mask; - u32 pci_base; +#define PCI_MASTER_ADDRESS_MASK 0x7fffffffU + +struct pci_master_address_conversion { + uint32_t bus_base_address; + uint32_t address_mask; + uint32_t pci_base_address; +}; + +struct pci_target_address_conversion { + uint32_t address_mask; + uint32_t bus_base_address; +}; + +typedef enum { + CANNOT_LOCK_FROM_DEVICE, + CAN_LOCK_FROM_DEVICE, +} pci_exclusive_access_t; + +struct pci_mailbox_address { + uint32_t base_address; }; -struct vr41xx_pci_address_map { - struct vr41xx_pci_address_space *mem1; - struct vr41xx_pci_address_space *mem2; - struct vr41xx_pci_address_space *io; +struct pci_target_address_window { + uint32_t base_address; +}; + +typedef enum { + PCI_ARBITRATION_MODE_FAIR, + PCI_ARBITRATION_MODE_ALTERNATE_0, + PCI_ARBITRATION_MODE_ALTERNATE_B, +} pci_arbiter_priority_control_t; + +typedef enum { + PCI_TAKE_AWAY_GNT_DISABLE, + PCI_TAKE_AWAY_GNT_ENABLE, +} pci_take_away_gnt_mode_t; + +struct pci_controller_unit_setup { + struct pci_master_address_conversion *master_memory1; + struct pci_master_address_conversion *master_memory2; + + struct pci_target_address_conversion *target_memory1; + struct pci_target_address_conversion *target_memory2; + + struct pci_master_address_conversion *master_io; + + pci_exclusive_access_t exclusive_access; + + uint32_t pci_clock_max; + uint8_t wait_time_limit_from_irdy_to_trdy; /* Only VR4122 is supported */ + + struct pci_mailbox_address *mailbox; + struct pci_target_address_window *target_window1; + struct pci_target_address_window *target_window2; + + uint8_t master_latency_timer; + uint8_t retry_limit; + + pci_arbiter_priority_control_t arbiter_priority_control; + pci_take_away_gnt_mode_t take_away_gnt_mode; + + struct resource *mem_resource; + struct resource *io_resource; }; -extern void vr41xx_pciu_init(struct vr41xx_pci_address_map *map); +extern void vr41xx_pciu_setup(struct pci_controller_unit_setup *setup); #endif /* __NEC_VR41XX_H */ diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h index a8e873c06481..b14ef0377da1 100644 --- a/include/asm-mips/vr41xx/vrc4173.h +++ b/include/asm-mips/vr41xx/vrc4173.h @@ -1,19 +1,24 @@ /* - * FILE NAME - * include/asm-mips/vr41xx/vrc4173.h + * vrc4173.h, Include file for NEC VRC4173. * - * BRIEF MODULE DESCRIPTION - * Include file for NEC VRC4173. + * Copyright (C) 2000 Michael R. McDonald + * Copyright (C) 2001-2003 Montavista Software Inc. + * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> + * Copyright (C) 2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * Copyright (C) 2000 by Michael R. McDonald + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * Copyright 2001-2003 Montavista Software Inc. - * Author: Yoichi Yuasa - * yyuasa@mvista.com or source@mvista.com + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __NEC_VRC4173_H #define __NEC_VRC4173_H @@ -72,35 +77,38 @@ extern unsigned long vrc4173_io_offset; /* * Clock Mask Unit */ -#define VRC4173_PIU_CLOCK 0x0001 -#define VRC4173_KIU_CLOCK 0x0002 -#define VRC4173_AIU_CLOCK 0x0004 -#define VRC4173_PS2CH1_CLOCK 0x0008 -#define VRC4173_PS2CH2_CLOCK 0x0010 -#define VRC4173_USBU_PCI_CLOCK 0x0020 -#define VRC4173_CARDU1_PCI_CLOCK 0x0040 -#define VRC4173_CARDU2_PCI_CLOCK 0x0080 -#define VRC4173_AC97U_PCI_CLOCK 0x0100 -#define VRC4173_USBU_48MHz_CLOCK 0x0400 -#define VRC4173_EXT_48MHz_CLOCK 0x0800 -#define VRC4173_48MHz_CLOCK 0x1000 +typedef enum vrc4173_clock { + VRC4173_PIU_CLOCK, + VRC4173_KIU_CLOCK, + VRC4173_AIU_CLOCK, + VRC4173_PS2_CH1_CLOCK, + VRC4173_PS2_CH2_CLOCK, + VRC4173_USBU_PCI_CLOCK, + VRC4173_CARDU1_PCI_CLOCK, + VRC4173_CARDU2_PCI_CLOCK, + VRC4173_AC97U_PCI_CLOCK, + VRC4173_USBU_48MHz_CLOCK, + VRC4173_EXT_48MHz_CLOCK, + VRC4173_48MHz_CLOCK, +} vrc4173_clock_t; -extern void vrc4173_clock_supply(u16 mask); -extern void vrc4173_clock_mask(u16 mask); +extern void vrc4173_supply_clock(vrc4173_clock_t clock); +extern void vrc4173_mask_clock(vrc4173_clock_t clock); /* * General-Purpose I/O Unit */ -enum { - PS2CH1_SELECT, - PS2CH2_SELECT, - TOUCHPANEL_SELECT, - KIU8_SELECT, - KIU10_SELECT, - KIU12_SELECT, - GPIO_SELECT -}; +typedef enum vrc4173_function { + PS2_CHANNEL1, + PS2_CHANNEL2, + TOUCHPANEL, + KEYBOARD_8SCANLINES, + KEYBOARD_10SCANLINES, + KEYBOARD_12SCANLINES, + GPIO_0_15PINS, + GPIO_16_20PINS, +} vrc4173_function_t; -extern void vrc4173_select_function(int func); +extern void vrc4173_select_function(vrc4173_function_t function); #endif /* __NEC_VRC4173_H */ diff --git a/include/asm-parisc/cpumask.h b/include/asm-parisc/cpumask.h deleted file mode 100644 index 27f4f17fb15a..000000000000 --- a/include/asm-parisc/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_PARISC_CPUMASK_H -#define _ASM_PARISC_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_PARISC_CPUMASK_H */ diff --git a/include/asm-parisc/setup.h b/include/asm-parisc/setup.h index ae25cc4275d3..7da2e5b8747e 100644 --- a/include/asm-parisc/setup.h +++ b/include/asm-parisc/setup.h @@ -1,10 +1,6 @@ -/* - * Just a place holder. We don't want to have to test x86 before - * we include stuff - */ +#ifndef _PARISC_SETUP_H +#define _PARISC_SETUP_H -#ifndef _i386_SETUP_H -#define _i386_SETUP_H +#define COMMAND_LINE_SIZE 1024 - -#endif /* _i386_SETUP_H */ +#endif /* _PARISC_SETUP_H */ diff --git a/include/asm-ppc/cpumask.h b/include/asm-ppc/cpumask.h deleted file mode 100644 index 30901089dd41..000000000000 --- a/include/asm-ppc/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_PPC_CPUMASK_H -#define _ASM_PPC_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_PPC_CPUMASK_H */ diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h index 4ace72fc4e7b..fca154980c17 100644 --- a/include/asm-ppc/machdep.h +++ b/include/asm-ppc/machdep.h @@ -106,7 +106,6 @@ struct machdep_calls { }; extern struct machdep_calls ppc_md; -#define COMMAND_LINE_SIZE 512 extern char cmd_line[COMMAND_LINE_SIZE]; extern void setup_pci_ptrs(void); diff --git a/include/asm-ppc/setup.h b/include/asm-ppc/setup.h index cd458c4f1642..d2d19ee103df 100644 --- a/include/asm-ppc/setup.h +++ b/include/asm-ppc/setup.h @@ -6,6 +6,9 @@ #define m68k_memory memory #include <asm-m68k/setup.h> +/* We have a bigger command line buffer. */ +#undef COMMAND_LINE_SIZE +#define COMMAND_LINE_SIZE 512 #endif /* _PPC_SETUP_H */ #endif /* __KERNEL__ */ diff --git a/include/asm-ppc64/cpumask.h b/include/asm-ppc64/cpumask.h deleted file mode 100644 index 0914511db218..000000000000 --- a/include/asm-ppc64/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_PPC64_CPUMASK_H -#define _ASM_PPC64_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_PPC64_CPUMASK_H */ diff --git a/include/asm-ppc64/machdep.h b/include/asm-ppc64/machdep.h index bb961a029fae..f0b00cc458c7 100644 --- a/include/asm-ppc64/machdep.h +++ b/include/asm-ppc64/machdep.h @@ -11,6 +11,7 @@ #include <linux/config.h> #include <linux/seq_file.h> +#include <linux/init.h> #include <linux/dma-mapping.h> struct pt_regs; @@ -112,9 +113,7 @@ struct machdep_calls { }; extern struct machdep_calls ppc_md; -#define COMMAND_LINE_SIZE 512 extern char cmd_line[COMMAND_LINE_SIZE]; -extern char saved_command_line[COMMAND_LINE_SIZE]; /* Functions to produce codes on the leds. * The SRC code should be unique for the message category and should diff --git a/include/asm-ppc64/prom.h b/include/asm-ppc64/prom.h index c39e115975c0..fdc158a0c658 100644 --- a/include/asm-ppc64/prom.h +++ b/include/asm-ppc64/prom.h @@ -25,7 +25,7 @@ #define LONG_MSW(X) (((unsigned long)X) >> 32) typedef u32 phandle; -typedef void *ihandle; +typedef u32 ihandle; typedef u32 phandle32; typedef u32 ihandle32; diff --git a/include/asm-ppc64/rtas.h b/include/asm-ppc64/rtas.h index e51ebb166d12..4ce9bddc62a2 100644 --- a/include/asm-ppc64/rtas.h +++ b/include/asm-ppc64/rtas.h @@ -37,7 +37,7 @@ * Where n_in is the number of input parameters and * n_out is the number of output parameters * - * If the "string" is invalid on this system, RTAS_UNKOWN_SERVICE + * If the "string" is invalid on this system, RTAS_UNKNOWN_SERVICE * will be returned as a token. rtas_call() does look for this * token and error out gracefully so rtas_call(rtas_token("str"), ...) * may be safely used for one-shot calls to RTAS. @@ -168,7 +168,7 @@ extern struct rtas_t rtas; extern void enter_rtas(unsigned long); extern int rtas_token(const char *service); -extern long rtas_call(int token, int, int, unsigned long *, ...); +extern int rtas_call(int token, int, int, int *, ...); extern void call_rtas_display_status(char); extern void rtas_restart(char *cmd); extern void rtas_power_off(void); diff --git a/include/asm-ppc64/setup.h b/include/asm-ppc64/setup.h index d6e62d15a5dd..b257b8348c73 100644 --- a/include/asm-ppc64/setup.h +++ b/include/asm-ppc64/setup.h @@ -1,6 +1,6 @@ #ifndef _PPC_SETUP_H #define _PPC_SETUP_H -/* This is a place holder include */ +#define COMMAND_LINE_SIZE 512 #endif /* _PPC_SETUP_H */ diff --git a/include/asm-ppc64/smp.h b/include/asm-ppc64/smp.h index 3d7e3d7c7663..3b14c7145546 100644 --- a/include/asm-ppc64/smp.h +++ b/include/asm-ppc64/smp.h @@ -51,8 +51,6 @@ extern cpumask_t cpu_possible_map; extern cpumask_t cpu_available_map; #define cpu_present_at_boot(cpu) cpu_isset(cpu, cpu_present_at_boot) -#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) -#define cpu_possible(cpu) cpu_isset(cpu, cpu_possible_map) #define cpu_available(cpu) cpu_isset(cpu, cpu_available_map) /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. diff --git a/include/asm-ppc64/system.h b/include/asm-ppc64/system.h index 06ecd1bb285d..47c78eef463c 100644 --- a/include/asm-ppc64/system.h +++ b/include/asm-ppc64/system.h @@ -128,8 +128,6 @@ static inline void flush_altivec_to_thread(struct task_struct *t) } #endif -extern int abs(int); - extern struct task_struct *__switch_to(struct task_struct *, struct task_struct *); #define switch_to(prev, next, last) ((last) = __switch_to((prev), (next))) diff --git a/include/asm-s390/cpumask.h b/include/asm-s390/cpumask.h deleted file mode 100644 index 4deef1641ec6..000000000000 --- a/include/asm-s390/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_S390_CPUMASK_H -#define _ASM_S390_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_S390_CPUMASK_H */ diff --git a/include/asm-s390/smp.h b/include/asm-s390/smp.h index 7e613240088e..70d06261bb9e 100644 --- a/include/asm-s390/smp.h +++ b/include/asm-s390/smp.h @@ -31,10 +31,6 @@ typedef struct extern int smp_call_function_on(void (*func) (void *info), void *info, int nonatomic, int wait, int cpu); - -extern cpumask_t cpu_online_map; -extern cpumask_t cpu_possible_map; - #define NO_PROC_ID 0xFF /* No processor magic marker */ /* @@ -51,8 +47,6 @@ extern cpumask_t cpu_possible_map; #define smp_processor_id() (S390_lowcore.cpu_data.cpu_nr) -#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) - extern __inline__ __u16 hard_smp_processor_id(void) { __u16 cpu_address; diff --git a/include/asm-sh/adc.h b/include/asm-sh/adc.h new file mode 100644 index 000000000000..64747dc61899 --- /dev/null +++ b/include/asm-sh/adc.h @@ -0,0 +1,12 @@ +#ifndef __ASM_ADC_H +#define __ASM_ADC_H + +/* + * Copyright (C) 2004 Andriy Skulysh + */ + +#include <asm/cpu/adc.h> + +int adc_single(unsigned int channel); + +#endif /* __ASM_ADC_H */ diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h index 9ceca407fe60..154d774f982f 100644 --- a/include/asm-sh/bugs.h +++ b/include/asm-sh/bugs.h @@ -26,7 +26,7 @@ static void __init check_bugs(void) case CPU_SH7604: *p++ = '2'; break; - case CPU_SH7708 ... CPU_SH7729: + case CPU_SH7705 ... CPU_SH7300: *p++ = '3'; break; case CPU_SH7750 ... CPU_ST40GX1: diff --git a/include/asm-sh/bus-sh.h b/include/asm-sh/bus-sh.h new file mode 100644 index 000000000000..f782a33a98fa --- /dev/null +++ b/include/asm-sh/bus-sh.h @@ -0,0 +1,65 @@ +/* + * include/asm-sh/bus-sh.h + * + * Copyright (C) 2004 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_BUS_SH_H +#define __ASM_SH_BUS_SH_H + +extern struct bus_type sh_bus_types[]; + +struct sh_dev { + struct device dev; + char *name; + unsigned int dev_id; + unsigned int bus_id; + struct resource res; + void *mapbase; + unsigned int irq[6]; + u64 *dma_mask; +}; + +#define to_sh_dev(d) container_of((d), struct sh_dev, dev) + +#define sh_get_drvdata(d) dev_get_drvdata(&(d)->dev) +#define sh_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, (p)) + +struct sh_driver { + struct device_driver drv; + unsigned int dev_id; + unsigned int bus_id; + int (*probe)(struct sh_dev *); + int (*remove)(struct sh_dev *); + int (*suspend)(struct sh_dev *, u32); + int (*resume)(struct sh_dev *); +}; + +#define to_sh_driver(d) container_of((d), struct sh_driver, drv) +#define sh_name(d) ((d)->dev.driver->name) + +/* + * Device ID numbers for bus types + */ +enum { + SH_DEV_ID_USB_OHCI, +}; + +#define SH_NR_BUSES 1 +#define SH_BUS_NAME_VIRT "shbus" + +enum { + SH_BUS_VIRT, +}; + +/* arch/sh/kernel/cpu/bus.c */ +extern int sh_device_register(struct sh_dev *dev); +extern void sh_device_unregister(struct sh_dev *dev); +extern int sh_driver_register(struct sh_driver *drv); +extern void sh_driver_unregister(struct sh_driver *drv); + +#endif /* __ASM_SH_BUS_SH_H */ + diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h index 9decb1ced217..62b2f50fb20b 100644 --- a/include/asm-sh/cache.h +++ b/include/asm-sh/cache.h @@ -28,7 +28,8 @@ struct cache_info { unsigned int sets; unsigned int linesz; - unsigned int way_shift; + unsigned int way_incr; + unsigned int entry_shift; unsigned int entry_mask; diff --git a/include/asm-sh/cpu-sh3/adc.h b/include/asm-sh/cpu-sh3/adc.h new file mode 100644 index 000000000000..b289e3ca19a6 --- /dev/null +++ b/include/asm-sh/cpu-sh3/adc.h @@ -0,0 +1,28 @@ +#ifndef __ASM_CPU_SH3_ADC_H +#define __ASM_CPU_SH3_ADC_H + +/* + * Copyright (C) 2004 Andriy Skulysh + */ + + +#define ADDRAH 0xa4000080 +#define ADDRAL 0xa4000082 +#define ADDRBH 0xa4000084 +#define ADDRBL 0xa4000086 +#define ADDRCH 0xa4000088 +#define ADDRCL 0xa400008a +#define ADDRDH 0xa400008c +#define ADDRDL 0xa400008e +#define ADCSR 0xa4000090 + +#define ADCSR_ADF 0x80 +#define ADCSR_ADIE 0x40 +#define ADCSR_ADST 0x20 +#define ADCSR_MULTI 0x10 +#define ADCSR_CKS 0x08 +#define ADCSR_CH_MASK 0x07 + +#define ADCR 0xa4000092 + +#endif /* __ASM_CPU_SH3_ADC_H */ diff --git a/include/asm-sh/cpu-sh3/dac.h b/include/asm-sh/cpu-sh3/dac.h index 7f4129d25632..05fda8316ebc 100644 --- a/include/asm-sh/cpu-sh3/dac.h +++ b/include/asm-sh/cpu-sh3/dac.h @@ -1,5 +1,5 @@ -#ifndef __ASM_SH_DAC_H -#define __ASM_SH_DAC_H +#ifndef __ASM_CPU_SH3_DAC_H +#define __ASM_CPU_SH3_DAC_H /* * Copyright (C) 2003 Andriy Skulysh @@ -38,5 +38,4 @@ static __inline__ void sh_dac_output(u8 value, int channel) else ctrl_outb(value,DADR0); } -#endif /* __ASM_SH_DAC_H */ - +#endif /* __ASM_CPU_SH3_DAC_H */ diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h index 3ef2d0a54668..e2b91adf821a 100644 --- a/include/asm-sh/cpu-sh4/dma.h +++ b/include/asm-sh/cpu-sh4/dma.h @@ -3,5 +3,15 @@ #define SH_DMAC_BASE 0xffa00000 +#define SAR ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \ + SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30}) +#define DAR ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \ + SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34}) +#define DMATCR ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \ + SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38}) +#define CHCR ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \ + SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c}) +#define DMAOR (SH_DMAC_BASE + 0x40) + #endif /* __ASM_CPU_SH4_DMA_H */ diff --git a/include/asm-sh/cpumask.h b/include/asm-sh/cpumask.h deleted file mode 100644 index deaf3bb85d7e..000000000000 --- a/include/asm-sh/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_SH_CPUMASK_H -#define _ASM_SH_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_SH_CPUMASK_H */ diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h index f3817945edb5..8f149477ee2c 100644 --- a/include/asm-sh/dma-mapping.h +++ b/include/asm-sh/dma-mapping.h @@ -44,6 +44,8 @@ static inline void *dma_alloc_coherent(struct device *dev, size_t size, if (dev && dev->bus == &pci_bus_type) return __pci_alloc_consistent(NULL, size, dma_handle); #endif + if (sh_mv.mv_consistent_alloc) + return sh_mv.mv_consistent_alloc(dev, size, dma_handle, flag); return consistent_alloc(flag, size, dma_handle); } @@ -61,6 +63,11 @@ static inline void dma_free_coherent(struct device *dev, size_t size, } #endif + if (sh_mv.mv_consistent_free) { + sh_mv.mv_consistent_free(dev, size, vaddr, dma_handle); + return; + } + consistent_free(vaddr, size); } @@ -152,6 +159,26 @@ static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, } } +static inline void dma_sync_single_for_cpu(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction dir) + __attribute__ ((alias("dma_sync_single"))); + +static inline void dma_sync_single_for_device(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction dir) + __attribute__ ((alias("dma_sync_single"))); + +static inline void dma_sync_sg_for_cpu(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction dir) + __attribute__ ((alias("dma_sync_sg"))); + +static inline void dma_sync_sg_for_device(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction dir) + __attribute__ ((alias("dma_sync_sg"))); + static inline int dma_get_cache_alignment(void) { /* @@ -161,5 +188,10 @@ static inline int dma_get_cache_alignment(void) return L1_CACHE_BYTES; } +static inline int dma_mapping_error(dma_addr_t dma_addr) +{ + return dma_addr == 0; +} + #endif /* __ASM_SH_DMA_MAPPING_H */ diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h index bc5c3b6a215d..f9b95e2116f5 100644 --- a/include/asm-sh/dma.h +++ b/include/asm-sh/dma.h @@ -1,7 +1,7 @@ /* * include/asm-sh/dma.h * - * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2003, 2004 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -13,6 +13,7 @@ #include <linux/config.h> #include <linux/spinlock.h> #include <linux/wait.h> +#include <linux/sysdev.h> #include <asm/cpu/dma.h> #include <asm/semaphore.h> @@ -29,7 +30,7 @@ # define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) #endif -/* +/* * Read and write modes can mean drastically different things depending on the * channel configuration. Consult your DMAC documentation and module * implementation for further clues. @@ -38,40 +39,69 @@ #define DMA_MODE_WRITE 0x01 #define DMA_MODE_MASK 0x01 +#define DMA_AUTOINIT 0x10 + +/* + * DMAC (dma_info) flags + */ +enum { + DMAC_CHANNELS_CONFIGURED = 0x00, + DMAC_CHANNELS_TEI_CAPABLE = 0x01, +}; + +/* + * DMA channel capabilities / flags + */ +enum { + DMA_CONFIGURED = 0x00, + DMA_TEI_CAPABLE = 0x01, +}; + extern spinlock_t dma_spin_lock; -struct dma_info; +struct dma_channel; struct dma_ops { - const char *name; - - int (*request)(struct dma_info *info); - void (*free)(struct dma_info *info); + int (*request)(struct dma_channel *chan); + void (*free)(struct dma_channel *chan); - int (*get_residue)(struct dma_info *info); - int (*xfer)(struct dma_info *info); - void (*configure)(struct dma_info *info, unsigned long flags); + int (*get_residue)(struct dma_channel *chan); + int (*xfer)(struct dma_channel *chan); + void (*configure)(struct dma_channel *chan, unsigned long flags); }; -struct dma_info { - const char *dev_id; +struct dma_channel { + char dev_id[16]; unsigned int chan; unsigned int mode; unsigned int count; - + unsigned long sar; unsigned long dar; - unsigned int configured:1; - unsigned int tei_capable:1; + unsigned long flags; atomic_t busy; struct semaphore sem; wait_queue_head_t wait_queue; + + struct sys_device dev; +}; + +struct dma_info { + const char *name; + unsigned int nr_channels; + unsigned long flags; + struct dma_ops *ops; + struct dma_channel *channels; + + struct list_head list; }; +#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) + /* arch/sh/drivers/dma/dma-api.c */ extern int dma_xfer(unsigned int chan, unsigned long from, unsigned long to, size_t size, unsigned int mode); @@ -90,17 +120,22 @@ extern int request_dma(unsigned int chan, const char *dev_id); extern void free_dma(unsigned int chan); extern int get_dma_residue(unsigned int chan); extern struct dma_info *get_dma_info(unsigned int chan); +extern struct dma_channel *get_dma_channel(unsigned int chan); extern void dma_wait_for_completion(unsigned int chan); extern void dma_configure_channel(unsigned int chan, unsigned long flags); -extern int register_dmac(struct dma_ops *ops); +extern int register_dmac(struct dma_info *info); +extern void unregister_dmac(struct dma_info *info); -extern struct dma_info dma_info[]; +#ifdef CONFIG_SYSFS +/* arch/sh/drivers/dma/dma-sysfs.c */ +extern int dma_create_sysfs_files(struct dma_channel *); +#endif #ifdef CONFIG_PCI extern int isa_dma_bridge_buggy; #else -#define isa_dma_bridge_buggy (0) +#define isa_dma_bridge_buggy (0) #endif #endif /* __ASM_SH_DMA_H */ diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h new file mode 100644 index 000000000000..509224bdba28 --- /dev/null +++ b/include/asm-sh/fixmap.h @@ -0,0 +1,111 @@ +/* + * fixmap.h: compile-time virtual memory allocation + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1998 Ingo Molnar + * + * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 + */ + +#ifndef _ASM_FIXMAP_H +#define _ASM_FIXMAP_H + +#include <linux/config.h> +#include <linux/kernel.h> +#include <asm/page.h> +#ifdef CONFIG_HIGHMEM +#include <linux/threads.h> +#include <asm/kmap_types.h> +#endif + +/* + * Here we define all the compile-time 'special' virtual + * addresses. The point is to have a constant address at + * compile time, but to set the physical address only + * in the boot process. We allocate these special addresses + * from the end of virtual memory (0xfffff000) backwards. + * Also this lets us do fail-safe vmalloc(), we + * can guarantee that these special addresses and + * vmalloc()-ed addresses never overlap. + * + * these 'compile-time allocated' memory buffers are + * fixed-size 4k pages. (or larger if used with an increment + * highger than 1) use fixmap_set(idx,phys) to associate + * physical memory with fixmap indices. + * + * TLB entries of such buffers will not be flushed across + * task switches. + */ + +/* + * on UP currently we will have no trace of the fixmap mechanizm, + * no page table allocations, etc. This might change in the + * future, say framebuffers for the console driver(s) could be + * fix-mapped? + */ +enum fixed_addresses { +#ifdef CONFIG_HIGHMEM + FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ + FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, +#endif + __end_of_fixed_addresses +}; + +extern void __set_fixmap (enum fixed_addresses idx, + unsigned long phys, pgprot_t flags); + +#define set_fixmap(idx, phys) \ + __set_fixmap(idx, phys, PAGE_KERNEL) +/* + * Some hardware wants to get fixmapped without caching. + */ +#define set_fixmap_nocache(idx, phys) \ + __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) +/* + * used by vmalloc.c. + * + * Leave one empty page between vmalloc'ed areas and + * the start of the fixmap, and leave one page empty + * at the top of mem.. + */ +#define FIXADDR_TOP (P4SEG - PAGE_SIZE) +#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) +#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) + +#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) +#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) + +extern void __this_fixmap_does_not_exist(void); + +/* + * 'index to address' translation. If anyone tries to use the idx + * directly without tranlation, we catch the bug with a NULL-deference + * kernel oops. Illegal ranges of incoming indices are caught too. + */ +static inline unsigned long fix_to_virt(const unsigned int idx) +{ + /* + * this branch gets completely eliminated after inlining, + * except when someone tries to use fixaddr indices in an + * illegal way. (such as mixing up address types or using + * out-of-range indices). + * + * If it doesn't get removed, the linker will complain + * loudly with a reasonably clear error message.. + */ + if (idx >= __end_of_fixed_addresses) + __this_fixmap_does_not_exist(); + + return __fix_to_virt(idx); +} + +static inline unsigned long virt_to_fix(const unsigned long vaddr) +{ + BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); + return __virt_to_fix(vaddr); +} + +#endif diff --git a/include/asm-sh/hp6xx/hp6xx.h b/include/asm-sh/hp6xx/hp6xx.h index 53079d2954da..a26247fd3d87 100644 --- a/include/asm-sh/hp6xx/hp6xx.h +++ b/include/asm-sh/hp6xx/hp6xx.h @@ -5,9 +5,22 @@ * Copyright (C) 2003 Andriy Skulysh */ +#define HP680_TS_IRQ IRQ3_IRQ -#define DAC_LCD_BRIGHTNESS 0 -#define DAC_SPEAKER_VOLUME 1 +#define DAC_LCD_BRIGHTNESS 0 +#define DAC_SPEAKER_VOLUME 1 + +#define PHDR_TS_PEN_DOWN 0x08 + +#define SCPDR_TS_SCAN_ENABLE 0x20 +#define SCPDR_TS_SCAN_Y 0x02 +#define SCPDR_TS_SCAN_X 0x01 + +#define SCPCR_TS_ENABLE 0x405 +#define SCPCR_TS_MASK 0xc0f + +#define ADC_CHANNEL_TS_Y 1 +#define ADC_CHANNEL_TS_X 2 #define HD64461_GPADR_SPEAKER 0x01 #define HD64461_GPADR_PCMCIA0 (0x02|0x08) @@ -16,4 +29,3 @@ #endif /* __ASM_SH_HP6XX_H */ - diff --git a/include/asm-sh/hp6xx/ide.h b/include/asm-sh/hp6xx/ide.h new file mode 100644 index 000000000000..570395a5ebe5 --- /dev/null +++ b/include/asm-sh/hp6xx/ide.h @@ -0,0 +1,8 @@ +#ifndef __ASM_SH_HP6XX_IDE_H +#define __ASM_SH_HP6XX_IDE_H + +#define IRQ_CFCARD 93 +#define IRQ_PCMCIA 94 + +#endif /* __ASM_SH_HP6XX_IDE_H */ + diff --git a/include/asm-sh/hs7751rvoip/hs7751rvoip.h b/include/asm-sh/hs7751rvoip/hs7751rvoip.h new file mode 100644 index 000000000000..5f995f937a44 --- /dev/null +++ b/include/asm-sh/hs7751rvoip/hs7751rvoip.h @@ -0,0 +1,47 @@ +#ifndef __ASM_SH_RENESAS_HS7751RVOIP_H +#define __ASM_SH_RENESAS_HS7751RVOIP_H + +/* + * linux/include/asm-sh/hs7751rvoip/hs7751rvoip.h + * + * Copyright (C) 2000 Atom Create Engineering Co., Ltd. + * + * Renesas Technology Sales HS7751RVoIP support + */ + +/* Box specific addresses. */ + +#define PA_BCR 0xa4000000 /* FPGA */ +#define PA_SLICCNTR1 0xa4000006 /* SLIC PIO Control 1 */ +#define PA_SLICCNTR2 0xa4000008 /* SLIC PIO Control 2 */ +#define PA_DMACNTR 0xa400000a /* USB DMA Control */ +#define PA_INPORTR 0xa400000c /* Input Port Register */ +#define PA_OUTPORTR 0xa400000e /* Output Port Reguster */ +#define PA_VERREG 0xa4000014 /* FPGA Version Register */ + +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ +#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ + +#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ +#define IRLCNTR2 (PA_BCR + 2) /* Interrupt Control Register2 */ +#define IRLCNTR3 (PA_BCR + 4) /* Interrupt Control Register3 */ +#define IRLCNTR4 (PA_BCR + 16) /* Interrupt Control Register4 */ +#define IRLCNTR5 (PA_BCR + 18) /* Interrupt Control Register5 */ + +#define IRQ_PCIETH 6 /* PCI Ethernet IRQ */ +#define IRQ_PCIHUB 7 /* PCI Ethernet Hub IRQ */ +#define IRQ_USBCOM 8 /* USB Comunication IRQ */ +#define IRQ_USBCON 9 /* USB Connect IRQ */ +#define IRQ_USBDMA 10 /* USB DMA IRQ */ +#define IRQ_CFCARD 11 /* CF Card IRQ */ +#define IRQ_PCMCIA 12 /* PCMCIA IRQ */ +#define IRQ_PCISLOT 13 /* PCI Slot #1 IRQ */ +#define IRQ_ONHOOK1 0 /* ON HOOK1 IRQ */ +#define IRQ_OFFHOOK1 1 /* OFF HOOK1 IRQ */ +#define IRQ_ONHOOK2 2 /* ON HOOK2 IRQ */ +#define IRQ_OFFHOOK2 3 /* OFF HOOK2 IRQ */ +#define IRQ_RINGING 4 /* Ringing IRQ */ +#define IRQ_CODEC 5 /* CODEC IRQ */ + +#endif /* __ASM_SH_RENESAS_HS7751RVOIP */ diff --git a/include/asm-sh/hs7751rvoip/ide.h b/include/asm-sh/hs7751rvoip/ide.h new file mode 100644 index 000000000000..65ad1d0f763b --- /dev/null +++ b/include/asm-sh/hs7751rvoip/ide.h @@ -0,0 +1,8 @@ +#ifndef __ASM_SH_HS7751RVOIP_IDE_H +#define __ASM_SH_HS7751RVOIP_IDE_H + +/* Nothing to see here.. */ +#include <asm/hs7751rvoip/hs7751rvoip.h> + +#endif /* __ASM_SH_HS7751RVOIP_IDE_H */ + diff --git a/include/asm-sh/hs7751rvoip/io.h b/include/asm-sh/hs7751rvoip/io.h new file mode 100644 index 000000000000..513c8514001b --- /dev/null +++ b/include/asm-sh/hs7751rvoip/io.h @@ -0,0 +1,39 @@ +/* + * include/asm-sh/hs7751rvoip/hs7751rvoip.h + * + * Modified version of io_se.h for the hs7751rvoip-specific functions. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * IO functions for an Renesas Technology sales HS7751RVOIP + */ + +#ifndef _ASM_SH_IO_HS7751RVOIP_H +#define _ASM_SH_IO_HS7751RVOIP_H + +#include <asm/io_generic.h> + +extern unsigned char hs7751rvoip_inb(unsigned long port); +extern unsigned short hs7751rvoip_inw(unsigned long port); +extern unsigned int hs7751rvoip_inl(unsigned long port); + +extern void hs7751rvoip_outb(unsigned char value, unsigned long port); +extern void hs7751rvoip_outw(unsigned short value, unsigned long port); +extern void hs7751rvoip_outl(unsigned int value, unsigned long port); + +extern unsigned char hs7751rvoip_inb_p(unsigned long port); +extern void hs7751rvoip_outb_p(unsigned char value, unsigned long port); + +extern void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count); +extern void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count); +extern void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count); +extern void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count); +extern void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count); +extern void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count); + +extern void *hs7751rvoip_ioremap(unsigned long offset, unsigned long size); + +extern unsigned long hs7751rvoip_isa_port2addr(unsigned long offset); + +#endif /* _ASM_SH_IO_HS7751RVOIP_H */ diff --git a/include/asm-sh/ide.h b/include/asm-sh/ide.h index 7758b3ec3a47..f42cf3977a57 100644 --- a/include/asm-sh/ide.h +++ b/include/asm-sh/ide.h @@ -15,73 +15,12 @@ #ifdef __KERNEL__ #include <linux/config.h> -#include <asm/machvec.h> #ifndef MAX_HWIFS -/* Should never have less than 2, ide-pci.c(ide_match_hwif) requires it */ -#define MAX_HWIFS 2 +#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS #endif -#define IDE_ARCH_OBSOLETE_DEFAULTS - -static inline int ide_default_irq_hp600(unsigned long base) -{ - switch (base) { - case 0x01f0: return 93; - case 0x0170: return 94; - default: - return 0; - } -} - -static inline int ide_default_irq(unsigned long base) -{ - if (MACH_HP600) { - return ide_default_irq_hp600(base); - } - switch (base) { - case 0x01f0: return 14; - case 0x0170: return 15; - default: - return 0; - } -} - -static inline unsigned long ide_default_io_base_hp600(int index) -{ - switch (index) { - case 0: - return 0x01f0; - case 1: - return 0x0170; - default: - return 0; - } -} - -static inline unsigned long ide_default_io_base(int index) -{ - if (MACH_HP600) { - return ide_default_io_base_hp600(index); - } - switch (index) { - case 0: - return 0x1f0; - case 1: - return 0x170; - default: - return 0; - } -} - -#define IDE_ARCH_OBSOLETE_INIT -#define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */ - -#ifdef CONFIG_PCI -#define ide_init_default_irq(base) (0) -#else -#define ide_init_default_irq(base) ide_default_irq(base) -#endif +#define ide_default_io_ctl(base) (0) #include <asm-generic/ide_iops.h> diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index 7dd2a5ae10b5..58bd8df7a53d 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -15,9 +15,15 @@ #include <asm/machvec.h> #include <asm/ptrace.h> /* for pt_regs */ +#if defined(CONFIG_SH_HP600) || \ + defined(CONFIG_SH_RTS7751R2D) || \ + defined(CONFIG_SH_HS7751RVOIP) +#include <asm/mach/ide.h> +#endif + #if defined(CONFIG_CPU_SH3) -#define INTC_IPRA 0xfffffee2UL -#define INTC_IPRB 0xfffffee4UL +#define INTC_IPRA 0xfffffee2UL +#define INTC_IPRB 0xfffffee4UL #elif defined(CONFIG_CPU_SH4) #define INTC_IPRA 0xffd00004UL #define INTC_IPRB 0xffd00008UL @@ -25,6 +31,15 @@ #define INTC_IPRD 0xffd00010UL #endif +#ifdef CONFIG_IDE +# ifndef IRQ_CFCARD +# define IRQ_CFCARD 14 +# endif +# ifndef IRQ_PCMCIA +# define IRQ_PCMCIA 15 +# endif +#endif + #define TIMER_IRQ 16 #define TIMER_IPR_ADDR INTC_IPRA #define TIMER_IPR_POS 3 @@ -48,6 +63,111 @@ #define DMA_IPR_ADDR INTC_IPRE #define DMA_IPR_POS 3 #define DMA_PRIORITY 7 +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +/* TMU2 */ +#define TIMER2_IRQ 18 +#define TIMER2_IPR_ADDR INTC_IPRA +#define TIMER2_IPR_POS 1 +#define TIMER2_PRIORITY 2 + +/* WDT */ +#define WDT_IRQ 27 +#define WDT_IPR_ADDR INTC_IPRB +#define WDT_IPR_POS 3 +#define WDT_PRIORITY 2 + +/* SIM (SIM Card Module) */ +#define SIM_ERI_IRQ 23 +#define SIM_RXI_IRQ 24 +#define SIM_TXI_IRQ 25 +#define SIM_TEND_IRQ 26 +#define SIM_IPR_ADDR INTC_IPRB +#define SIM_IPR_POS 1 +#define SIM_PRIORITY 2 + +/* VIO (Video I/O) */ +#define VIO_IRQ 52 +#define VIO_IPR_ADDR INTC_IPRE +#define VIO_IPR_POS 2 +#define VIO_PRIORITY 2 + +/* MFI (Multi Functional Interface) */ +#define MFI_IRQ 56 +#define MFI_IPR_ADDR INTC_IPRE +#define MFI_IPR_POS 1 +#define MFI_PRIORITY 2 + +/* VPU (Video Processing Unit) */ +#define VPU_IRQ 60 +#define VPU_IPR_ADDR INTC_IPRE +#define VPU_IPR_POS 0 +#define VPU_PRIORITY 2 + +/* KEY (Key Scan Interface) */ +#define KEY_IRQ 79 +#define KEY_IPR_ADDR INTC_IPRF +#define KEY_IPR_POS 3 +#define KEY_PRIORITY 2 + +/* CMT (Compare Match Timer) */ +#define CMT_IRQ 104 +#define CMT_IPR_ADDR INTC_IPRF +#define CMT_IPR_POS 0 +#define CMT_PRIORITY 2 + +/* DMAC(1) */ +#define DMTE0_IRQ 48 +#define DMTE1_IRQ 49 +#define DMTE2_IRQ 50 +#define DMTE3_IRQ 51 +#define DMA1_IPR_ADDR INTC_IPRE +#define DMA1_IPR_POS 3 +#define DMA1_PRIORITY 7 + +/* DMAC(2) */ +#define DMTE4_IRQ 76 +#define DMTE5_IRQ 77 +#define DMA2_IPR_ADDR INTC_IPRF +#define DMA2_IPR_POS 2 +#define DMA2_PRIORITY 7 + +/* SIOF0 */ +#define SIOF0_IRQ 84 +#define SIOF0_IPR_ADDR INTC_IPRH +#define SIOF0_IPR_POS 3 +#define SIOF0_PRIORITY 3 + +/* FLCTL (Flash Memory Controller) */ +#define FLSTE_IRQ 92 +#define FLTEND_IRQ 93 +#define FLTRQ0_IRQ 94 +#define FLTRQ1_IRQ 95 +#define FLCTL_IPR_ADDR INTC_IPRH +#define FLCTL_IPR_POS 1 +#define FLCTL_PRIORITY 3 + +/* IIC (IIC Bus Interface) */ +#define IIC_ALI_IRQ 96 +#define IIC_TACKI_IRQ 97 +#define IIC_WAITI_IRQ 98 +#define IIC_DTEI_IRQ 99 +#define IIC_IPR_ADDR INTC_IPRH +#define IIC_IPR_POS 0 +#define IIC_PRIORITY 3 + +/* SIO0 */ +#define SIO0_IRQ 88 +#define SIO0_IPR_ADDR INTC_IPRI +#define SIO0_IPR_POS 3 +#define SIO0_PRIORITY 3 + +/* SIU (Sound Interface Unit) */ +#define SIU_IRQ 108 +#define SIU_IPR_ADDR INTC_IPRJ +#define SIU_IPR_POS 1 +#define SIU_PRIORITY 3 + +#endif #elif defined(CONFIG_CPU_SH4) #define DMTE0_IRQ 34 #define DMTE1_IRQ 35 @@ -74,7 +194,14 @@ #define SCI_PRIORITY 3 #endif -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +#define SCIF0_IRQ 80 +#define SCIF0_IPR_ADDR INTC_IPRG +#define SCIF0_IPR_POS 3 +#define SCIF0_PRIORITY 3 +#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) #define SCIF_ERI_IRQ 56 #define SCIF_RXI_IRQ 57 #define SCIF_BRI_IRQ 58 @@ -127,7 +254,8 @@ # define PINT_NR_IRQS 16 # elif defined(CONFIG_CPU_SUBTYPE_SH7708) # define ONCHIP_NR_IRQS 32 -# elif defined(CONFIG_CPU_SUBTYPE_SH7709) +# elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7705) # define ONCHIP_NR_IRQS 64 // Actually 61 # define PINT_NR_IRQS 16 # elif defined(CONFIG_CPU_SUBTYPE_SH7750) @@ -138,6 +266,8 @@ # define ONCHIP_NR_IRQS 110 # elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) # define ONCHIP_NR_IRQS 144 +# elif defined(CONFIG_CPU_SUBTYPE_SH7300) +# define ONCHIP_NR_IRQS 109 # endif #endif @@ -207,7 +337,121 @@ extern void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority); extern void make_imask_irq(unsigned int irq); -#if defined(CONFIG_CPU_SUBTYPE_SH7604) +#if defined(CONFIG_CPU_SUBTYPE_SH7300) +#undef INTC_IPRA +#undef INTC_IPRB +#define INTC_IPRA 0xA414FEE2UL +#define INTC_IPRB 0xA414FEE4UL +#define INTC_IPRC 0xA4140016UL +#define INTC_IPRD 0xA4140018UL +#define INTC_IPRE 0xA414001AUL +#define INTC_IPRF 0xA4080000UL +#define INTC_IPRG 0xA4080002UL +#define INTC_IPRH 0xA4080004UL +#define INTC_IPRI 0xA4080006UL +#define INTC_IPRJ 0xA4080008UL + +#define INTC_IMR0 0xA4080040UL +#define INTC_IMR1 0xA4080042UL +#define INTC_IMR2 0xA4080044UL +#define INTC_IMR3 0xA4080046UL +#define INTC_IMR4 0xA4080048UL +#define INTC_IMR5 0xA408004AUL +#define INTC_IMR6 0xA408004CUL +#define INTC_IMR7 0xA408004EUL +#define INTC_IMR8 0xA4080050UL +#define INTC_IMR9 0xA4080052UL +#define INTC_IMR10 0xA4080054UL + +#define INTC_IMCR0 0xA4080060UL +#define INTC_IMCR1 0xA4080062UL +#define INTC_IMCR2 0xA4080064UL +#define INTC_IMCR3 0xA4080066UL +#define INTC_IMCR4 0xA4080068UL +#define INTC_IMCR5 0xA408006AUL +#define INTC_IMCR6 0xA408006CUL +#define INTC_IMCR7 0xA408006EUL +#define INTC_IMCR8 0xA4080070UL +#define INTC_IMCR9 0xA4080072UL +#define INTC_IMCR10 0xA4080074UL + +#define INTC_ICR0 0xA414FEE0UL +#define INTC_ICR1 0xA4140010UL + +#define INTC_IRR0 0xA4140004UL + +#define PORT_PACR 0xA4050100UL +#define PORT_PBCR 0xA4050102UL +#define PORT_PCCR 0xA4050104UL +#define PORT_PDCR 0xA4050106UL +#define PORT_PECR 0xA4050108UL +#define PORT_PFCR 0xA405010AUL +#define PORT_PGCR 0xA405010CUL +#define PORT_PHCR 0xA405010EUL +#define PORT_PJCR 0xA4050110UL +#define PORT_PKCR 0xA4050112UL +#define PORT_PLCR 0xA4050114UL +#define PORT_SCPCR 0xA4050116UL +#define PORT_PMCR 0xA4050118UL +#define PORT_PNCR 0xA405011AUL +#define PORT_PQCR 0xA405011CUL + +#define PORT_PSELA 0xA4050140UL +#define PORT_PSELB 0xA4050142UL +#define PORT_PSELC 0xA4050144UL + +#define PORT_HIZCRA 0xA4050146UL +#define PORT_HIZCRB 0xA4050148UL +#define PORT_DRVCR 0xA4050150UL + +#define PORT_PADR 0xA4050120UL +#define PORT_PBDR 0xA4050122UL +#define PORT_PCDR 0xA4050124UL +#define PORT_PDDR 0xA4050126UL +#define PORT_PEDR 0xA4050128UL +#define PORT_PFDR 0xA405012AUL +#define PORT_PGDR 0xA405012CUL +#define PORT_PHDR 0xA405012EUL +#define PORT_PJDR 0xA4050130UL +#define PORT_PKDR 0xA4050132UL +#define PORT_PLDR 0xA4050134UL +#define PORT_SCPDR 0xA4050136UL +#define PORT_PMDR 0xA4050138UL +#define PORT_PNDR 0xA405013AUL +#define PORT_PQDR 0xA405013CUL + +#define IRQ0_IRQ 32 +#define IRQ1_IRQ 33 +#define IRQ2_IRQ 34 +#define IRQ3_IRQ 35 +#define IRQ4_IRQ 36 +#define IRQ5_IRQ 37 + +#define IRQ0_IPR_ADDR INTC_IPRC +#define IRQ1_IPR_ADDR INTC_IPRC +#define IRQ2_IPR_ADDR INTC_IPRC +#define IRQ3_IPR_ADDR INTC_IPRC +#define IRQ4_IPR_ADDR INTC_IPRD +#define IRQ5_IPR_ADDR INTC_IPRD + +#define IRQ0_IPR_POS 0 +#define IRQ1_IPR_POS 1 +#define IRQ2_IPR_POS 2 +#define IRQ3_IPR_POS 3 +#define IRQ4_IPR_POS 0 +#define IRQ5_IPR_POS 1 + +#define IRQ0_PRIORITY 1 +#define IRQ1_PRIORITY 1 +#define IRQ2_PRIORITY 1 +#define IRQ3_PRIORITY 1 +#define IRQ4_PRIORITY 1 +#define IRQ5_PRIORITY 1 + +extern int ipr_irq_demux(int irq); +#define __irq_demux(irq) ipr_irq_demux(irq) + +#elif defined(CONFIG_CPU_SUBTYPE_SH7604) #define INTC_IPRA 0xfffffee2UL #define INTC_IPRB 0xfffffe60UL @@ -222,21 +466,27 @@ extern void make_imask_irq(unsigned int irq); #define INTC_VCRDMA1 0xffffffa8UL #define INTC_ICR 0xfffffee0UL -#elif defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) +#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ + defined(CONFIG_CPU_SUBTYPE_SH7707) || \ + defined(CONFIG_CPU_SUBTYPE_SH7709) #define INTC_IRR0 0xa4000004UL #define INTC_IRR1 0xa4000006UL #define INTC_IRR2 0xa4000008UL -#define INTC_ICR0 0xfffffee0UL -#define INTC_ICR1 0xa4000010UL -#define INTC_ICR2 0xa4000012UL -#define INTC_INTER 0xa4000014UL +#define INTC_ICR0 0xfffffee0UL +#define INTC_ICR1 0xa4000010UL +#define INTC_ICR2 0xa4000012UL +#define INTC_INTER 0xa4000014UL -#define INTC_IPRC 0xa4000016UL -#define INTC_IPRD 0xa4000018UL -#define INTC_IPRE 0xa400001aUL +#define INTC_IPRC 0xa4000016UL +#define INTC_IPRD 0xa4000018UL +#define INTC_IPRE 0xa400001aUL #if defined(CONFIG_CPU_SUBTYPE_SH7707) #define INTC_IPRF 0xa400001cUL +#elif defined(CONFIG_CPU_SUBTYPE_SH7705) +#define INTC_IPRF 0xa4080000UL +#define INTC_IPRG 0xa4080002UL +#define INTC_IPRH 0xa4080004UL #endif #define PORT_PACR 0xa4000100UL @@ -307,20 +557,20 @@ extern int ipr_irq_demux(int irq); #ifdef CONFIG_CPU_SUBTYPE_ST40STB1 #define INTC2_FIRST_IRQ 64 #define NR_INTC2_IRQS 25 - + #define INTC2_BASE0 0xfe080000 #define INTC2_INTC2MODE (INTC2_BASE0+0x80) - + #define INTC2_INTPRI_OFFSET 0x00 #define INTC2_INTREQ_OFFSET 0x20 #define INTC2_INTMSK_OFFSET 0x40 #define INTC2_INTMSKCLR_OFFSET 0x60 - + extern void make_intc2_irq(unsigned int irq,unsigned int addr, unsigned int group,int pos,int priority); - -#endif - + +#endif + static inline int generic_irq_demux(int irq) { return irq; diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h index 4953570c961d..8a2e3dcd1779 100644 --- a/include/asm-sh/machvec.h +++ b/include/asm-sh/machvec.h @@ -17,6 +17,7 @@ #include <asm/machtypes.h> #include <asm/machvec_init.h> +struct device; struct timeval; struct sh_machine_vector @@ -62,6 +63,9 @@ struct sh_machine_vector void (*mv_init_pci)(void); void (*mv_heartbeat)(void); + + void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, int); + void (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t); }; extern struct sh_machine_vector sh_mv; diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h index 9b7038442cd6..8a1b3597ff30 100644 --- a/include/asm-sh/pgalloc.h +++ b/include/asm-sh/pgalloc.h @@ -84,71 +84,10 @@ static inline void pte_free(struct page *pte) #define pmd_free(x) do { } while (0) #define __pmd_free_tlb(tlb,x) do { } while (0) #define pgd_populate(mm, pmd, pte) BUG() +#define check_pgt_cache() do { } while (0) -#if defined(CONFIG_CPU_SH4) -#define PG_mapped PG_arch_1 - -/* - * For SH-4, we have our own implementation for ptep_get_and_clear - */ -static inline pte_t ptep_get_and_clear(pte_t *ptep) -{ - pte_t pte = *ptep; - - pte_clear(ptep); - if (!pte_not_present(pte)) { - unsigned long pfn = pte_pfn(pte); - if (pfn_valid(pfn)) { - struct page *page = pfn_to_page(pfn); - struct address_space *mapping = page_mapping(page); - if (!mapping || !mapping_writably_mapped(mapping)) - __clear_bit(PG_mapped, &page->flags); - } - } - return pte; -} -#else -static inline pte_t ptep_get_and_clear(pte_t *ptep) -{ - pte_t pte = *ptep; - pte_clear(ptep); - return pte; -} +#ifdef CONFIG_CPU_SH4 +#define PG_mapped PG_arch_1 #endif -/* - * Following functions are same as generic ones. - */ -static inline int ptep_test_and_clear_young(pte_t *ptep) -{ - pte_t pte = *ptep; - if (!pte_young(pte)) - return 0; - set_pte(ptep, pte_mkold(pte)); - return 1; -} - -static inline int ptep_test_and_clear_dirty(pte_t *ptep) -{ - pte_t pte = *ptep; - if (!pte_dirty(pte)) - return 0; - set_pte(ptep, pte_mkclean(pte)); - return 1; -} - -static inline void ptep_set_wrprotect(pte_t *ptep) -{ - pte_t old_pte = *ptep; - set_pte(ptep, pte_wrprotect(old_pte)); -} - -static inline void ptep_mkdirty(pte_t *ptep) -{ - pte_t old_pte = *ptep; - set_pte(ptep, pte_mkdirty(old_pte)); -} - -#define check_pgt_cache() do { } while (0) - #endif /* __ASM_SH_PGALLOC_H */ diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h index 292511404349..7cbe42971cfb 100644 --- a/include/asm-sh/pgtable.h +++ b/include/asm-sh/pgtable.h @@ -3,7 +3,7 @@ /* * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2002, 2003 Paul Mundt + * Copyright (C) 2002, 2003, 2004 Paul Mundt */ #include <linux/config.h> @@ -16,6 +16,7 @@ #ifndef __ASSEMBLY__ #include <asm/processor.h> #include <asm/addrspace.h> +#include <asm/fixmap.h> #include <linux/threads.h> extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; @@ -51,7 +52,7 @@ extern unsigned long empty_zero_page[1024]; * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c) */ #define VMALLOC_START (P3SEG+0x00100000) -#define VMALLOC_END P4SEG +#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) #define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ #define _PAGE_HW_SHARED 0x002 /* SH-bit : page is shared among processes */ @@ -119,17 +120,20 @@ extern unsigned long empty_zero_page[1024]; #define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_FLAGS_HARD) #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) +#define PAGE_KERNEL_NOCACHE \ + __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) #define PAGE_KERNEL_PCC(slot, type) \ __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_FLAGS_HARD | (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | (type)) #else /* no mmu */ -#define PAGE_NONE __pgprot(0) -#define PAGE_SHARED __pgprot(0) -#define PAGE_COPY __pgprot(0) -#define PAGE_READONLY __pgprot(0) -#define PAGE_KERNEL __pgprot(0) -#define PAGE_KERNEL_RO __pgprot(0) -#define PAGE_KERNEL_PCC __pgprot(0) +#define PAGE_NONE __pgprot(0) +#define PAGE_SHARED __pgprot(0) +#define PAGE_COPY __pgprot(0) +#define PAGE_READONLY __pgprot(0) +#define PAGE_KERNEL __pgprot(0) +#define PAGE_KERNEL_NOCACHE __pgprot(0) +#define PAGE_KERNEL_RO __pgprot(0) +#define PAGE_KERNEL_PCC __pgprot(0) #endif /* @@ -254,25 +258,17 @@ extern void update_mmu_cache(struct vm_area_struct * vma, #define __swp_type(x) ((x).val & 0xff) #define __swp_offset(x) ((x).val >> 10) #define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 10) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) /* * Encode and decode a nonlinear file mapping entry */ #define PTE_FILE_MAX_BITS 29 -#define pte_to_pgoff(pte) (pte_val(pte)) -#define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE }) +#define pte_to_pgoff(pte) (pte_val(pte) >> 1) +#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE }) -/* - * Routines for update of PTE - * - * We just can use generic implementation, as SuperH has no SMP feature. - * (We needed atomic implementation for SMP) - * - */ - -#define pte_same(A,B) (pte_val(A) == pte_val(B)) +typedef pte_t *pte_addr_t; #endif /* !__ASSEMBLY__ */ @@ -289,12 +285,11 @@ extern void update_mmu_cache(struct vm_area_struct * vma, extern unsigned int kobjsize(const void *objp); #endif /* !CONFIG_MMU */ -#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG -#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY +#ifdef CONFIG_CPU_SH4 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR -#define __HAVE_ARCH_PTEP_SET_WRPROTECT -#define __HAVE_ARCH_PTEP_MKDIRTY -#define __HAVE_ARCH_PTE_SAME +extern inline pte_t ptep_get_and_clear(pte_t *ptep); +#endif + #include <asm-generic/pgtable.h> #endif /* __ASM_SH_PAGE_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 786d41c3663c..922c927478c1 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -37,8 +37,8 @@ enum cpu_type { CPU_SH7604, /* SH-3 types */ - CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, CPU_SH7709, - CPU_SH7709A, CPU_SH7729, CPU_SH7300, + CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R, + CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300, /* SH-4 types */ CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, @@ -271,6 +271,7 @@ extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) ((tsk)->thread.pc) #define KSTK_ESP(tsk) ((tsk)->thread.sp) -#define cpu_relax() __asm__ __volatile__ ("sleep" : : : "memory") +#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") +#define cpu_relax() do { } while (0) #endif /* __ASM_SH_PROCESSOR_H */ diff --git a/include/asm-sh/rts7751r2d/ide.h b/include/asm-sh/rts7751r2d/ide.h new file mode 100644 index 000000000000..416f96b407cb --- /dev/null +++ b/include/asm-sh/rts7751r2d/ide.h @@ -0,0 +1,8 @@ +#ifndef __ASM_SH_RTS7751R2D_IDE_H +#define __ASM_SH_RTS7751R2D_IDE_H + +/* Nothing to see here.. */ +#include <asm/rts7751r2d/rts7751r2d.h> + +#endif /* __ASM_SH_RTS7751R2D_IDE_H */ + diff --git a/include/asm-sh/rts7751r2d/io.h b/include/asm-sh/rts7751r2d/io.h new file mode 100644 index 000000000000..241094020567 --- /dev/null +++ b/include/asm-sh/rts7751r2d/io.h @@ -0,0 +1,37 @@ +/* + * include/asm-sh/io_rts7751r2d.h + * + * Modified version of io_se.h for the rts7751r2d-specific functions. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * IO functions for an Renesas Technology sales RTS7751R2D + */ + +#ifndef _ASM_SH_IO_RTS7751R2D_H +#define _ASM_SH_IO_RTS7751R2D_H + +extern unsigned char rts7751r2d_inb(unsigned long port); +extern unsigned short rts7751r2d_inw(unsigned long port); +extern unsigned int rts7751r2d_inl(unsigned long port); + +extern void rts7751r2d_outb(unsigned char value, unsigned long port); +extern void rts7751r2d_outw(unsigned short value, unsigned long port); +extern void rts7751r2d_outl(unsigned int value, unsigned long port); + +extern unsigned char rts7751r2d_inb_p(unsigned long port); +extern void rts7751r2d_outb_p(unsigned char value, unsigned long port); + +extern void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count); +extern void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count); +extern void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count); +extern void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count); +extern void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count); +extern void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count); + +extern void *rts7751r2d_ioremap(unsigned long offset, unsigned long size); + +extern unsigned long rts7751r2d_isa_port2addr(unsigned long offset); + +#endif /* _ASM_SH_IO_RTS7751R2D_H */ diff --git a/include/asm-sh/rts7751r2d/rts7751r2d.h b/include/asm-sh/rts7751r2d/rts7751r2d.h new file mode 100644 index 000000000000..4e09ba597e9a --- /dev/null +++ b/include/asm-sh/rts7751r2d/rts7751r2d.h @@ -0,0 +1,73 @@ +#ifndef __ASM_SH_RENESAS_RTS7751R2D_H +#define __ASM_SH_RENESAS_RTS7751R2D_H + +/* + * linux/include/asm-sh/renesas_rts7751r2d.h + * + * Copyright (C) 2000 Atom Create Engineering Co., Ltd. + * + * Renesas Technology Sales RTS7751R2D support + */ + +/* Box specific addresses. */ + +#define PA_BCR 0xa4000000 /* FPGA */ +#define PA_IRLMON 0xa4000002 /* Interrupt Status control */ +#define PA_CFCTL 0xa4000004 /* CF Timing control */ +#define PA_CFPOW 0xa4000006 /* CF Power control */ +#define PA_DISPCTL 0xa4000008 /* Display Timing control */ +#define PA_SDMPOW 0xa400000a /* SD Power control */ +#define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */ +#define PA_PCICD 0xa400000e /* PCI Extention detect control */ +#define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */ +#if defined(CONFIG_RTS7751R2D_REV11) +#define PA_AXRST 0xa4000022 /* AX_LAN Reset control */ +#define PA_CFRST 0xa4000024 /* CF Reset control */ +#define PA_ADMRTS 0xa4000026 /* SD Reset control */ +#define PA_EXTRST 0xa4000028 /* Extention Reset control */ +#define PA_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */ +#else +#define PA_CFRST 0xa4000022 /* CF Reset control */ +#define PA_ADMRTS 0xa4000024 /* SD Reset control */ +#define PA_EXTRST 0xa4000026 /* Extention Reset control */ +#define PA_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */ +#define PA_KEYCTLCLR 0xa400002a /* Key Interrupt clear */ +#endif +#define PA_POWOFF 0xa4000030 /* Board Power OFF control */ +#define PA_VERREG 0xa4000032 /* FPGA Version Register */ +#define PA_INPORT 0xa4000034 /* KEY Input Port control */ +#define PA_OUTPORT 0xa4000036 /* LED control */ +#define PA_DMPORT 0xa4000038 /* DM270 Output Port control */ + +#define PA_AX88796L 0xaa000400 /* AX88796L Area */ +#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */ +#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ +#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ +#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ +#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ + +#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ + +#if defined(CONFIG_RTS7751R2D_REV11) +#define IRQ_PCIETH 0 /* PCI Ethernet IRQ */ +#define IRQ_CFCARD 1 /* CF Card IRQ */ +#define IRQ_CFINST 2 /* CF Card Insert IRQ */ +#define IRQ_PCMCIA 3 /* PCMCIA IRQ */ +#define IRQ_VOYAGER 4 /* VOYAGER IRQ */ +#define IRQ_ONETH 5 /* On board Ethernet IRQ */ +#else +#define IRQ_KEYIN 0 /* Key Input IRQ */ +#define IRQ_PCIETH 1 /* PCI Ethernet IRQ */ +#define IRQ_CFCARD 2 /* CF Card IRQ */ +#define IRQ_CFINST 3 /* CF Card Insert IRQ */ +#define IRQ_PCMCIA 4 /* PCMCIA IRQ */ +#define IRQ_VOYAGER 5 /* VOYAGER IRQ */ +#endif +#define IRQ_RTCALM 6 /* RTC Alarm IRQ */ +#define IRQ_RTCTIME 7 /* RTC Timer IRQ */ +#define IRQ_SDCARD 8 /* SD Card IRQ */ +#define IRQ_PCISLOT1 9 /* PCI Slot #1 IRQ */ +#define IRQ_PCISLOT2 10 /* PCI Slot #2 IRQ */ +#define IRQ_EXTENTION 11 /* EXTn IRQ */ + +#endif /* __ASM_SH_RENESAS_RTS7751R2D */ diff --git a/include/asm-sh/rts7751r2d/voyagergx_reg.h b/include/asm-sh/rts7751r2d/voyagergx_reg.h new file mode 100644 index 000000000000..f031b5d6cf54 --- /dev/null +++ b/include/asm-sh/rts7751r2d/voyagergx_reg.h @@ -0,0 +1,313 @@ +/* -------------------------------------------------------------------- */ +/* voyagergx_reg.h */ +/* -------------------------------------------------------------------- */ +/* This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + + Copyright 2003 (c) Lineo uSolutions,Inc. +*/ +/* -------------------------------------------------------------------- */ + +#ifndef _VOYAGER_GX_REG_H +#define _VOYAGER_GX_REG_H + +#define VOYAGER_BASE 0xb3e00000 +#define VOYAGER_USBH_BASE (0x40000 + VOYAGER_BASE) +#define VOYAGER_UART_BASE (0x30000 + VOYAGER_BASE) +#define VOYAGER_AC97_BASE (0xa0000 + VOYAGER_BASE) + +#define VOYAGER_IRQ_NUM 32 +#define VOYAGER_IRQ_BASE 50 +#define VOYAGER_USBH_IRQ VOYAGER_IRQ_BASE + 6 +#define VOYAGER_8051_IRQ VOYAGER_IRQ_BASE + 10 +#define VOYAGER_UART0_IRQ VOYAGER_IRQ_BASE + 12 +#define VOYAGER_UART1_IRQ VOYAGER_IRQ_BASE + 13 +#define VOYAGER_AC97_IRQ VOYAGER_IRQ_BASE + 17 + +/* ----- MISC controle register ------------------------------ */ +#define MISC_CTRL (0x000004 + VOYAGER_BASE) +#define MISC_CTRL_USBCLK_48 (3 << 28) +#define MISC_CTRL_USBCLK_96 (2 << 28) +#define MISC_CTRL_USBCLK_CRYSTAL (1 << 28) + +/* ----- GPIO[31:0] register --------------------------------- */ +#define GPIO_MUX_LOW (0x000008 + VOYAGER_BASE) +#define GPIO_MUX_LOW_AC97 0x1F000000 +#define GPIO_MUX_LOW_8051 0x0000ffff +#define GPIO_MUX_LOW_PWM (1 << 29) + +/* ----- GPIO[63:32] register --------------------------------- */ +#define GPIO_MUX_HIGH (0x00000C + VOYAGER_BASE) + +/* ----- DRAM controle register ------------------------------- */ +#define DRAM_CTRL (0x000010 + VOYAGER_BASE) +#define DRAM_CTRL_EMBEDDED (1 << 31) +#define DRAM_CTRL_CPU_BURST_1 (0 << 28) +#define DRAM_CTRL_CPU_BURST_2 (1 << 28) +#define DRAM_CTRL_CPU_BURST_4 (2 << 28) +#define DRAM_CTRL_CPU_BURST_8 (3 << 28) +#define DRAM_CTRL_CPU_CAS_LATENCY (1 << 27) +#define DRAM_CTRL_CPU_SIZE_2 (0 << 24) +#define DRAM_CTRL_CPU_SIZE_4 (1 << 24) +#define DRAM_CTRL_CPU_SIZE_64 (4 << 24) +#define DRAM_CTRL_CPU_SIZE_32 (5 << 24) +#define DRAM_CTRL_CPU_SIZE_16 (6 << 24) +#define DRAM_CTRL_CPU_SIZE_8 (7 << 24) +#define DRAM_CTRL_CPU_COLUMN_SIZE_1024 (0 << 22) +#define DRAM_CTRL_CPU_COLUMN_SIZE_512 (2 << 22) +#define DRAM_CTRL_CPU_COLUMN_SIZE_256 (3 << 22) +#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE (1 << 21) +#define DRAM_CTRL_CPU_RESET (1 << 20) +#define DRAM_CTRL_CPU_BANKS (1 << 19) +#define DRAM_CTRL_CPU_WRITE_PRECHARGE (1 << 18) +#define DRAM_CTRL_BLOCK_WRITE (1 << 17) +#define DRAM_CTRL_REFRESH_COMMAND (1 << 16) +#define DRAM_CTRL_SIZE_4 (0 << 13) +#define DRAM_CTRL_SIZE_8 (1 << 13) +#define DRAM_CTRL_SIZE_16 (2 << 13) +#define DRAM_CTRL_SIZE_32 (3 << 13) +#define DRAM_CTRL_SIZE_64 (4 << 13) +#define DRAM_CTRL_SIZE_2 (5 << 13) +#define DRAM_CTRL_COLUMN_SIZE_256 (0 << 11) +#define DRAM_CTRL_COLUMN_SIZE_512 (2 << 11) +#define DRAM_CTRL_COLUMN_SIZE_1024 (3 << 11) +#define DRAM_CTRL_BLOCK_WRITE_TIME (1 << 10) +#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE (1 << 9) +#define DRAM_CTRL_ACTIVE_PRECHARGE (1 << 8) +#define DRAM_CTRL_RESET (1 << 7) +#define DRAM_CTRL_REMAIN_ACTIVE (1 << 6) +#define DRAM_CTRL_BANKS (1 << 1) +#define DRAM_CTRL_WRITE_PRECHARGE (1 << 0) + +/* ----- Arvitration control register -------------------------- */ +#define ARBITRATION_CTRL (0x000014 + VOYAGER_BASE) +#define ARBITRATION_CTRL_CPUMEM (1 << 29) +#define ARBITRATION_CTRL_INTMEM (1 << 28) +#define ARBITRATION_CTRL_USB_OFF (0 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_1 (1 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_2 (2 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_3 (3 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_4 (4 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_5 (5 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_6 (6 << 24) +#define ARBITRATION_CTRL_USB_PRIORITY_7 (7 << 24) +#define ARBITRATION_CTRL_PANEL_OFF (0 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_1 (1 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_2 (2 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_3 (3 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_4 (4 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_5 (5 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_6 (6 << 20) +#define ARBITRATION_CTRL_PANEL_PRIORITY_7 (7 << 20) +#define ARBITRATION_CTRL_ZVPORT_OFF (0 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_1 (1 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_2 (2 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_3 (3 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_4 (4 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_5 (5 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_6 (6 << 16) +#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_7 (7 << 16) +#define ARBITRATION_CTRL_CMD_INTPR_OFF (0 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_1 (1 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_2 (2 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_3 (3 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_4 (4 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_5 (5 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_6 (6 << 12) +#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_7 (7 << 12) +#define ARBITRATION_CTRL_DMA_OFF (0 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_1 (1 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_2 (2 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_3 (3 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_4 (4 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_5 (5 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_6 (6 << 8) +#define ARBITRATION_CTRL_DMA_PRIORITY_7 (7 << 8) +#define ARBITRATION_CTRL_VIDEO_OFF (0 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_1 (1 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_2 (2 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_3 (3 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_4 (4 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_5 (5 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_6 (6 << 4) +#define ARBITRATION_CTRL_VIDEO_PRIORITY_7 (7 << 4) +#define ARBITRATION_CTRL_CRT_OFF (0 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_1 (1 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_2 (2 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_3 (3 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_4 (4 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_5 (5 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_6 (6 << 0) +#define ARBITRATION_CTRL_CRT_PRIORITY_7 (7 << 0) + +/* ----- Command list status register -------------------------- */ +#define CMD_INTPR_STATUS (0x000024 + VOYAGER_BASE) + +/* ----- Interrupt status register ----------------------------- */ +#define INT_STATUS (0x00002c + VOYAGER_BASE) +#define INT_STATUS_UH (1 << 6) +#define INT_STATUS_MC (1 << 10) +#define INT_STATUS_U0 (1 << 12) +#define INT_STATUS_U1 (1 << 13) +#define INT_STATUS_AC (1 << 17) + +/* ----- Interrupt mask register ------------------------------ */ +#define VOYAGER_INT_MASK (0x000030 + VOYAGER_BASE) +#define VOYAGER_INT_MASK_AC (1 << 17) + +/* ----- Current Gate register ---------------------------------*/ +#define CURRENT_GATE (0x000038 + VOYAGER_BASE) + +/* ----- Power mode 0 gate register --------------------------- */ +#define POWER_MODE0_GATE (0x000040 + VOYAGER_BASE) +#define POWER_MODE0_GATE_G (1 << 6) +#define POWER_MODE0_GATE_U0 (1 << 7) +#define POWER_MODE0_GATE_U1 (1 << 8) +#define POWER_MODE0_GATE_UH (1 << 11) +#define POWER_MODE0_GATE_AC (1 << 18) + +/* ----- Power mode 1 gate register --------------------------- */ +#define POWER_MODE1_GATE (0x000048 + VOYAGER_BASE) +#define POWER_MODE1_GATE_G (1 << 6) +#define POWER_MODE1_GATE_U0 (1 << 7) +#define POWER_MODE1_GATE_U1 (1 << 8) +#define POWER_MODE1_GATE_UH (1 << 11) +#define POWER_MODE1_GATE_AC (1 << 18) + +/* ----- Power mode 0 clock register -------------------------- */ +#define POWER_MODE0_CLOCK (0x000044 + VOYAGER_BASE) + +/* ----- Power mode 1 clock register -------------------------- */ +#define POWER_MODE1_CLOCK (0x00004C + VOYAGER_BASE) + +/* ----- Power mode controll register ------------------------- */ +#define POWER_MODE_CTRL (0x000054 + VOYAGER_BASE) + +/* ----- Miscellaneous Timing register ------------------------ */ +#define SYSTEM_DRAM_CTRL (0x000068 + VOYAGER_BASE) + +/* ----- PWM register ------------------------------------------*/ +#define PWM_0 (0x010020 + VOYAGER_BASE) +#define PWM_0_HC(x) (((x)&0x0fff)<<20) +#define PWM_0_LC(x) (((x)&0x0fff)<<8 ) +#define PWM_0_CLK_DEV(x) (((x)&0x000f)<<4 ) +#define PWM_0_EN (1<<0) + +/* ----- I2C register ----------------------------------------- */ +#define I2C_BYTECOUNT (0x010040 + VOYAGER_BASE) +#define I2C_CONTROL (0x010041 + VOYAGER_BASE) +#define I2C_STATUS (0x010042 + VOYAGER_BASE) +#define I2C_RESET (0x010042 + VOYAGER_BASE) +#define I2C_SADDRESS (0x010043 + VOYAGER_BASE) +#define I2C_DATA (0x010044 + VOYAGER_BASE) + +/* ----- Controle register bits ----------------------------------------- */ +#define I2C_CONTROL_E (1 << 0) +#define I2C_CONTROL_MODE (1 << 1) +#define I2C_CONTROL_STATUS (1 << 2) +#define I2C_CONTROL_INT (1 << 4) +#define I2C_CONTROL_INTACK (1 << 5) +#define I2C_CONTROL_REPEAT (1 << 6) + +/* ----- Status register bits ----------------------------------------- */ +#define I2C_STATUS_BUSY (1 << 0) +#define I2C_STATUS_ACK (1 << 1) +#define I2C_STATUS_ERROR (1 << 2) +#define I2C_STATUS_COMPLETE (1 << 3) + +/* ----- Reset register ---------------------------------------------- */ +#define I2C_RESET_ERROR (1 << 2) + +/* ----- transmission frequencies ------------------------------------- */ +#define I2C_SADDRESS_SELECT (1 << 0) + +/* ----- Display Controll register ----------------------------------------- */ +#define PANEL_DISPLAY_CTRL (0x080000 + VOYAGER_BASE) +#define PANEL_DISPLAY_CTRL_BIAS (1<<26) +#define PANEL_PAN_CTRL (0x080004 + VOYAGER_BASE) +#define PANEL_COLOR_KEY (0x080008 + VOYAGER_BASE) +#define PANEL_FB_ADDRESS (0x08000C + VOYAGER_BASE) +#define PANEL_FB_WIDTH (0x080010 + VOYAGER_BASE) +#define PANEL_WINDOW_WIDTH (0x080014 + VOYAGER_BASE) +#define PANEL_WINDOW_HEIGHT (0x080018 + VOYAGER_BASE) +#define PANEL_PLANE_TL (0x08001C + VOYAGER_BASE) +#define PANEL_PLANE_BR (0x080020 + VOYAGER_BASE) +#define PANEL_HORIZONTAL_TOTAL (0x080024 + VOYAGER_BASE) +#define PANEL_HORIZONTAL_SYNC (0x080028 + VOYAGER_BASE) +#define PANEL_VERTICAL_TOTAL (0x08002C + VOYAGER_BASE) +#define PANEL_VERTICAL_SYNC (0x080030 + VOYAGER_BASE) +#define PANEL_CURRENT_LINE (0x080034 + VOYAGER_BASE) +#define VIDEO_DISPLAY_CTRL (0x080040 + VOYAGER_BASE) +#define VIDEO_FB_0_ADDRESS (0x080044 + VOYAGER_BASE) +#define VIDEO_FB_WIDTH (0x080048 + VOYAGER_BASE) +#define VIDEO_FB_0_LAST_ADDRESS (0x08004C + VOYAGER_BASE) +#define VIDEO_PLANE_TL (0x080050 + VOYAGER_BASE) +#define VIDEO_PLANE_BR (0x080054 + VOYAGER_BASE) +#define VIDEO_SCALE (0x080058 + VOYAGER_BASE) +#define VIDEO_INITIAL_SCALE (0x08005C + VOYAGER_BASE) +#define VIDEO_YUV_CONSTANTS (0x080060 + VOYAGER_BASE) +#define VIDEO_FB_1_ADDRESS (0x080064 + VOYAGER_BASE) +#define VIDEO_FB_1_LAST_ADDRESS (0x080068 + VOYAGER_BASE) +#define VIDEO_ALPHA_DISPLAY_CTRL (0x080080 + VOYAGER_BASE) +#define VIDEO_ALPHA_FB_ADDRESS (0x080084 + VOYAGER_BASE) +#define VIDEO_ALPHA_FB_WIDTH (0x080088 + VOYAGER_BASE) +#define VIDEO_ALPHA_FB_LAST_ADDRESS (0x08008C + VOYAGER_BASE) +#define VIDEO_ALPHA_PLANE_TL (0x080090 + VOYAGER_BASE) +#define VIDEO_ALPHA_PLANE_BR (0x080094 + VOYAGER_BASE) +#define VIDEO_ALPHA_SCALE (0x080098 + VOYAGER_BASE) +#define VIDEO_ALPHA_INITIAL_SCALE (0x08009C + VOYAGER_BASE) +#define VIDEO_ALPHA_CHROMA_KEY (0x0800A0 + VOYAGER_BASE) +#define PANEL_HWC_ADDRESS (0x0800F0 + VOYAGER_BASE) +#define PANEL_HWC_LOCATION (0x0800F4 + VOYAGER_BASE) +#define PANEL_HWC_COLOR_12 (0x0800F8 + VOYAGER_BASE) +#define PANEL_HWC_COLOR_3 (0x0800FC + VOYAGER_BASE) +#define ALPHA_DISPLAY_CTRL (0x080100 + VOYAGER_BASE) +#define ALPHA_FB_ADDRESS (0x080104 + VOYAGER_BASE) +#define ALPHA_FB_WIDTH (0x080108 + VOYAGER_BASE) +#define ALPHA_PLANE_TL (0x08010C + VOYAGER_BASE) +#define ALPHA_PLANE_BR (0x080110 + VOYAGER_BASE) +#define ALPHA_CHROMA_KEY (0x080114 + VOYAGER_BASE) +#define CRT_DISPLAY_CTRL (0x080200 + VOYAGER_BASE) +#define CRT_FB_ADDRESS (0x080204 + VOYAGER_BASE) +#define CRT_FB_WIDTH (0x080208 + VOYAGER_BASE) +#define CRT_HORIZONTAL_TOTAL (0x08020C + VOYAGER_BASE) +#define CRT_HORIZONTAL_SYNC (0x080210 + VOYAGER_BASE) +#define CRT_VERTICAL_TOTAL (0x080214 + VOYAGER_BASE) +#define CRT_VERTICAL_SYNC (0x080218 + VOYAGER_BASE) +#define CRT_SIGNATURE_ANALYZER (0x08021C + VOYAGER_BASE) +#define CRT_CURRENT_LINE (0x080220 + VOYAGER_BASE) +#define CRT_MONITOR_DETECT (0x080224 + VOYAGER_BASE) +#define CRT_HWC_ADDRESS (0x080230 + VOYAGER_BASE) +#define CRT_HWC_LOCATION (0x080234 + VOYAGER_BASE) +#define CRT_HWC_COLOR_12 (0x080238 + VOYAGER_BASE) +#define CRT_HWC_COLOR_3 (0x08023C + VOYAGER_BASE) +#define CRT_PALETTE_RAM (0x080400 + VOYAGER_BASE) +#define PANEL_PALETTE_RAM (0x080800 + VOYAGER_BASE) +#define VIDEO_PALETTE_RAM (0x080C00 + VOYAGER_BASE) + +/* ----- 8051 Controle register ----------------------------------------- */ +#define VOYAGER_8051_BASE (0x000c0000 + VOYAGER_BASE) +#define VOYAGER_8051_RESET (0x000b0000 + VOYAGER_BASE) +#define VOYAGER_8051_SELECT (0x000b0004 + VOYAGER_BASE) +#define VOYAGER_8051_CPU_INT (0x000b000c + VOYAGER_BASE) + +/* ----- AC97 Controle register ----------------------------------------- */ +#define AC97_TX_SLOT0 (0x00000000 + VOYAGER_AC97_BASE) +#define AC97_CONTROL_STATUS (0x00000080 + VOYAGER_AC97_BASE) +#define AC97C_READ (1 << 19) +#define AC97C_WD_BIT (1 << 2) +#define AC97C_INDEX_MASK 0x7f +/* -------------------------------------------------------------------- */ + +#endif /* _VOYAGER_GX_REG_H */ diff --git a/include/asm-sh/se7300/io.h b/include/asm-sh/se7300/io.h new file mode 100644 index 000000000000..c6af85529714 --- /dev/null +++ b/include/asm-sh/se7300/io.h @@ -0,0 +1,29 @@ +/* + * include/asm-sh/se7300/io.h + * + * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> + * IO functions for SH-Mobile(SH7300) SolutionEngine + */ + +#ifndef _ASM_SH_IO_7300SE_H +#define _ASM_SH_IO_7300SE_H + +extern unsigned char sh7300se_inb(unsigned long port); +extern unsigned short sh7300se_inw(unsigned long port); +extern unsigned int sh7300se_inl(unsigned long port); + +extern void sh7300se_outb(unsigned char value, unsigned long port); +extern void sh7300se_outw(unsigned short value, unsigned long port); +extern void sh7300se_outl(unsigned int value, unsigned long port); + +extern unsigned char sh7300se_inb_p(unsigned long port); +extern void sh7300se_outb_p(unsigned char value, unsigned long port); + +extern void sh7300se_insb(unsigned long port, void *addr, unsigned long count); +extern void sh7300se_insw(unsigned long port, void *addr, unsigned long count); +extern void sh7300se_insl(unsigned long port, void *addr, unsigned long count); +extern void sh7300se_outsb(unsigned long port, const void *addr, unsigned long count); +extern void sh7300se_outsw(unsigned long port, const void *addr, unsigned long count); +extern void sh7300se_outsl(unsigned long port, const void *addr, unsigned long count); + +#endif /* _ASM_SH_IO_7300SE_H */ diff --git a/include/asm-sh/se7300/se7300.h b/include/asm-sh/se7300/se7300.h new file mode 100644 index 000000000000..3ec1ded86c97 --- /dev/null +++ b/include/asm-sh/se7300/se7300.h @@ -0,0 +1,61 @@ +#ifndef __ASM_SH_HITACHI_SE7300_H +#define __ASM_SH_HITACHI_SE7300_H + +/* + * linux/include/asm-sh/se/se7300.h + * + * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp> + * + * SH-Mobile SolutionEngine 7300 support + */ + +/* Box specific addresses. */ + +/* Area 0 */ +#define PA_ROM 0x00000000 /* EPROM */ +#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ +#define PA_FROM 0x00400000 /* Flash ROM */ +#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ +#define PA_SRAM 0x00800000 /* SRAM */ +#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ +/* Area 1 */ +#define PA_EXT1 0x04000000 +#define PA_EXT1_SIZE 0x04000000 +/* Area 2 */ +#define PA_EXT2 0x08000000 +#define PA_EXT2_SIZE 0x04000000 +/* Area 3 */ +#define PA_SDRAM 0x0c000000 +#define PA_SDRAM_SIZE 0x04000000 +/* Area 4 */ +#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ +#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ +#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ +#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ +#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ +#define MRSHPC_OPTION (PA_MRSHPC + 6) +#define MRSHPC_CSR (PA_MRSHPC + 8) +#define MRSHPC_ISR (PA_MRSHPC + 10) +#define MRSHPC_ICR (PA_MRSHPC + 12) +#define MRSHPC_CPWCR (PA_MRSHPC + 14) +#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) +#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) +#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) +#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) +#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) +#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) +#define MRSHPC_CDCR (PA_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) +#define PA_LED 0xb0800000 /* LED */ +#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ +#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */ +#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */ +#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */ +/* Area 5 */ +#define PA_EXT5 0x14000000 +#define PA_EXT5_SIZE 0x04000000 +/* Area 6 */ +#define PA_LCD1 0xb8000000 +#define PA_LCD2 0xb8800000 + +#endif /* __ASM_SH_HITACHI_SE7300_H */ diff --git a/include/asm-sh/serial.h b/include/asm-sh/serial.h index 012649927fc5..5474dbdbaa86 100644 --- a/include/asm-sh/serial.h +++ b/include/asm-sh/serial.h @@ -44,8 +44,5 @@ #define SERIAL_PORT_DFNS STD_SERIAL_PORT_DEFNS -/* XXX: This should be moved ino irq.h */ -#define irq_canonicalize(x) (x) - #endif #endif /* _ASM_SERIAL_H */ diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h new file mode 100644 index 000000000000..d19de7c8df4e --- /dev/null +++ b/include/asm-sh/setup.h @@ -0,0 +1,8 @@ +#ifdef __KERNEL__ +#ifndef _SH_SETUP_H +#define _SH_SETUP_H + +#define COMMAND_LINE_SIZE 256 + +#endif /* _SH_SETUP_H */ +#endif /* __KERNEL__ */ diff --git a/include/asm-sh/sigcontext.h b/include/asm-sh/sigcontext.h index 46fbc6feddd4..eb8effba2e80 100644 --- a/include/asm-sh/sigcontext.h +++ b/include/asm-sh/sigcontext.h @@ -1,6 +1,26 @@ #ifndef __ASM_SH_SIGCONTEXT_H #define __ASM_SH_SIGCONTEXT_H -#include <asm/cpu/sigcontext.h> +struct sigcontext { + unsigned long oldmask; + + /* CPU registers */ + unsigned long sc_regs[16]; + unsigned long sc_pc; + unsigned long sc_pr; + unsigned long sc_sr; + unsigned long sc_gbr; + unsigned long sc_mach; + unsigned long sc_macl; + +#if defined(__SH4__) || defined(CONFIG_CPU_SH4) + /* FPU registers */ + unsigned long sc_fpregs[16]; + unsigned long sc_xfpregs[16]; + unsigned int sc_fpscr; + unsigned int sc_fpul; + unsigned int sc_ownedfp; +#endif +}; #endif /* __ASM_SH_SIGCONTEXT_H */ diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h index 412a6496ce95..a42dd7adfb4c 100644 --- a/include/asm-sh/ubc.h +++ b/include/asm-sh/ubc.h @@ -14,7 +14,8 @@ #include <asm/cpu/ubc.h> /* User Break Controller */ -#if defined(CONFIG_CPU_SUBTYPE_SH7709) +#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ + defined(CONFIG_CPU_SUBTYPE_SH7300) #define UBC_TYPE_SH7729 (cpu_data->type == CPU_SH7729) #else #define UBC_TYPE_SH7729 0 diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h index 26ad6dd928ec..a20677454ca9 100644 --- a/include/asm-sh/unistd.h +++ b/include/asm-sh/unistd.h @@ -281,8 +281,17 @@ #define __NR_utimes 271 #define __NR_fadvise64_64 272 #define __NR_vserver 273 +#define __NR_mbind 274 +#define __NR_get_mempolicy 275 +#define __NR_set_mempolicy 276 +#define __NR_mq_open 277 +#define __NR_mq_unlink (__NR_mq_open+1) +#define __NR_mq_timedsend (__NR_mq_open+2) +#define __NR_mq_timedreceive (__NR_mq_open+3) +#define __NR_mq_notify (__NR_mq_open+4) +#define __NR_mq_getsetattr (__NR_mq_open+5) -#define NR_syscalls 274 +#define NR_syscalls 283 /* user-visible error numbers are in the range -1 - -124: see <asm-sh/errno.h> */ @@ -429,6 +438,7 @@ __syscall_return(type,__sc0); \ #include <linux/compiler.h> #include <linux/types.h> +#include <linux/linkage.h> #include <asm/ptrace.h> /* diff --git a/include/asm-sparc/cpumask.h b/include/asm-sparc/cpumask.h deleted file mode 100644 index 272f31de7bc1..000000000000 --- a/include/asm-sparc/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_SPARC_CPUMASK_H -#define _ASM_SPARC_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_SPARC_CPUMASK_H */ diff --git a/include/asm-sparc/setup.h b/include/asm-sparc/setup.h index d8aaa7205345..b3af958a2ad2 100644 --- a/include/asm-sparc/setup.h +++ b/include/asm-sparc/setup.h @@ -5,5 +5,6 @@ #ifndef _SPARC_SETUP_H #define _SPARC_SETUP_H +#define COMMAND_LINE_SIZE 256 #endif /* _SPARC_SETUP_H */ diff --git a/include/asm-sparc64/cpumask.h b/include/asm-sparc64/cpumask.h deleted file mode 100644 index ee60cae3dcd1..000000000000 --- a/include/asm-sparc64/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_SPARC64_CPUMASK_H -#define _ASM_SPARC64_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_SPARC64_CPUMASK_H */ diff --git a/include/asm-sparc64/setup.h b/include/asm-sparc64/setup.h index 97ae5d456702..b356ee2cda92 100644 --- a/include/asm-sparc64/setup.h +++ b/include/asm-sparc64/setup.h @@ -5,5 +5,6 @@ #ifndef _SPARC64_SETUP_H #define _SPARC64_SETUP_H +#define COMMAND_LINE_SIZE 256 #endif /* _SPARC64_SETUP_H */ diff --git a/include/asm-um/cpumask.h b/include/asm-um/cpumask.h deleted file mode 100644 index 90f0d003d74e..000000000000 --- a/include/asm-um/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_UM_CPUMASK_H -#define _ASM_UM_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_UM_CPUMASK_H */ diff --git a/include/asm-um/setup.h b/include/asm-um/setup.h new file mode 100644 index 000000000000..e5787bb80e79 --- /dev/null +++ b/include/asm-um/setup.h @@ -0,0 +1,6 @@ +#ifndef SETUP_H_INCLUDED +#define SETUP_H_INCLUDED + +#define COMMAND_LINE_SIZE 512 + +#endif /* SETUP_H_INCLUDED */ diff --git a/include/asm-v850/cpumask.h b/include/asm-v850/cpumask.h deleted file mode 100644 index 09aebd0c28d7..000000000000 --- a/include/asm-v850/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_V850_CPUMASK_H -#define _ASM_V850_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_V850_CPUMASK_H */ diff --git a/include/asm-v850/setup.h b/include/asm-v850/setup.h new file mode 100644 index 000000000000..c48a9b97d05b --- /dev/null +++ b/include/asm-v850/setup.h @@ -0,0 +1,6 @@ +#ifndef _V850_SETUP_H +#define _V850_SETUP_H + +#define COMMAND_LINE_SIZE 512 + +#endif /* __SETUP_H */ diff --git a/include/asm-x86_64/bootsetup.h b/include/asm-x86_64/bootsetup.h index ee1557748b0e..8fe68a93b798 100644 --- a/include/asm-x86_64/bootsetup.h +++ b/include/asm-x86_64/bootsetup.h @@ -30,7 +30,6 @@ extern char x86_boot_params[2048]; #define EDD_NR (*(unsigned char *) (PARAM+EDDNR)) #define EDD_BUF ((struct edd_info *) (PARAM+EDDBUF)) #define COMMAND_LINE saved_command_line -#define COMMAND_LINE_SIZE 256 #define RAMDISK_IMAGE_START_MASK 0x07FF #define RAMDISK_PROMPT_FLAG 0x8000 diff --git a/include/asm-x86_64/cpumask.h b/include/asm-x86_64/cpumask.h deleted file mode 100644 index d9ea497140a1..000000000000 --- a/include/asm-x86_64/cpumask.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_X86_64_CPUMASK_H -#define _ASM_X86_64_CPUMASK_H - -#include <asm-generic/cpumask.h> - -#endif /* _ASM_X86_64_CPUMASK_H */ diff --git a/include/asm-x86_64/hw_irq.h b/include/asm-x86_64/hw_irq.h index 161edad6afdf..2df689dd6d77 100644 --- a/include/asm-x86_64/hw_irq.h +++ b/include/asm-x86_64/hw_irq.h @@ -78,6 +78,7 @@ struct hw_interrupt_type; #ifndef __ASSEMBLY__ extern u8 irq_vector[NR_IRQ_VECTORS]; #define IO_APIC_VECTOR(irq) (irq_vector[irq]) +#define AUTO_ASSIGN -1 /* * Various low-level irq details needed by irq.c, process.c, diff --git a/include/asm-x86_64/mpspec.h b/include/asm-x86_64/mpspec.h index fd707a6a8bcd..219d40acd489 100644 --- a/include/asm-x86_64/mpspec.h +++ b/include/asm-x86_64/mpspec.h @@ -212,7 +212,7 @@ typedef struct physid_mask physid_mask_t; #define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS) #define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS) #define physids_clear(map) bitmap_zero((map).mask, MAX_APICS) -#define physids_complement(map) bitmap_complement((map).mask, MAX_APICS) +#define physids_complement(dst, src) bitmap_complement((dst).mask, (src).mask, MAX_APICS) #define physids_empty(map) bitmap_empty((map).mask, MAX_APICS) #define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS) #define physids_weight(map) bitmap_weight((map).mask, MAX_APICS) diff --git a/include/asm-x86_64/msi.h b/include/asm-x86_64/msi.h index 727b911f29ca..e0e1e9b3bd87 100644 --- a/include/asm-x86_64/msi.h +++ b/include/asm-x86_64/msi.h @@ -11,11 +11,6 @@ #define LAST_DEVICE_VECTOR 232 #define MSI_DEST_MODE MSI_LOGICAL_MODE #define MSI_TARGET_CPU_SHIFT 12 - -#ifdef CONFIG_SMP -#define MSI_TARGET_CPU logical_smp_processor_id() -#else -#define MSI_TARGET_CPU TARGET_CPUS -#endif +#define MSI_TARGET_CPU TARGET_CPUS #endif /* ASM_MSI_H */ diff --git a/include/asm-x86_64/setup.h b/include/asm-x86_64/setup.h index 7079a136ca8e..985d4e3c79da 100644 --- a/include/asm-x86_64/setup.h +++ b/include/asm-x86_64/setup.h @@ -1,10 +1,6 @@ -/* - * Just a place holder. We don't want to have to test x86 before - * we include stuff - */ - #ifndef _x8664_SETUP_H #define _x8664_SETUP_H +#define COMMAND_LINE_SIZE 256 #endif diff --git a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h index 2878896de037..c210e398a649 100644 --- a/include/asm-x86_64/smp.h +++ b/include/asm-x86_64/smp.h @@ -60,7 +60,6 @@ extern char phys_proc_id[NR_CPUS]; extern cpumask_t cpu_callout_map; #define cpu_possible_map cpu_callout_map -#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) static inline int num_booting_cpus(void) { @@ -105,7 +104,6 @@ static inline int cpu_present_to_apicid(int mps_cpu) return BAD_APICID; } -#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) #endif /* !ASSEMBLY */ #define NO_PROC_ID 0xFF /* No processor magic marker */ @@ -115,9 +113,9 @@ static inline int cpu_present_to_apicid(int mps_cpu) #define TARGET_CPUS 1 #ifndef ASSEMBLY -static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask) +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) { - return cpus_coerce_const(cpumask); + return cpus_addr(cpumask)[0]; } #endif diff --git a/include/asm-x86_64/topology.h b/include/asm-x86_64/topology.h index bb9a99ba2065..9310f9a1c1c5 100644 --- a/include/asm-x86_64/topology.h +++ b/include/asm-x86_64/topology.h @@ -20,9 +20,11 @@ extern cpumask_t node_to_cpumask[]; #define node_to_first_cpu(node) (__ffs(node_to_cpumask[node])) #define node_to_cpumask(node) (node_to_cpumask[node]) -static inline unsigned long pcibus_to_cpumask(int bus) +static inline cpumask_t pcibus_to_cpumask(int bus) { - return mp_bus_to_cpumask[bus] & cpu_online_map; + cpumask_t tmp; + cpus_and(tmp, mp_bus_to_cpumask[bus], cpu_online_map); + return tmp; } #define NODE_BALANCE_RATE 30 /* CHECKME */ diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h index c301d121c8d0..9dadd08e2b53 100644 --- a/include/linux/bitmap.h +++ b/include/linux/bitmap.h @@ -3,49 +3,249 @@ #ifndef __ASSEMBLY__ -#include <linux/config.h> -#include <linux/compiler.h> #include <linux/types.h> -#include <linux/kernel.h> #include <linux/bitops.h> #include <linux/string.h> -int bitmap_empty(const unsigned long *bitmap, int bits); -int bitmap_full(const unsigned long *bitmap, int bits); -int bitmap_equal(const unsigned long *bitmap1, - unsigned long *bitmap2, int bits); -void bitmap_complement(unsigned long *bitmap, int bits); +/* + * bitmaps provide bit arrays that consume one or more unsigned + * longs. The bitmap interface and available operations are listed + * here, in bitmap.h + * + * Function implementations generic to all architectures are in + * lib/bitmap.c. Functions implementations that are architecture + * specific are in various include/asm-<arch>/bitops.h headers + * and other arch/<arch> specific files. + * + * See lib/bitmap.c for more details. + */ -static inline void bitmap_zero(unsigned long *bitmap, int bits) +/* + * The available bitmap operations and their rough meaning in the + * case that the bitmap is a single unsigned long are thus: + * + * bitmap_zero(dst, nbits) *dst = 0UL + * bitmap_fill(dst, nbits) *dst = ~0UL + * bitmap_copy(dst, src, nbits) *dst = *src + * bitmap_and(dst, src1, src2, nbits) *dst = *src1 & *src2 + * bitmap_or(dst, src1, src2, nbits) *dst = *src1 | *src2 + * bitmap_xor(dst, src1, src2, nbits) *dst = *src1 ^ *src2 + * bitmap_andnot(dst, src1, src2, nbits) *dst = *src1 & ~(*src2) + * bitmap_complement(dst, src, nbits) *dst = ~(*src) + * bitmap_equal(src1, src2, nbits) Are *src1 and *src2 equal? + * bitmap_intersects(src1, src2, nbits) Do *src1 and *src2 overlap? + * bitmap_subset(src1, src2, nbits) Is *src1 a subset of *src2? + * bitmap_empty(src, nbits) Are all bits zero in *src? + * bitmap_full(src, nbits) Are all bits set in *src? + * bitmap_weight(src, nbits) Hamming Weight: number set bits + * bitmap_shift_right(dst, src, n, nbits) *dst = *src >> n + * bitmap_shift_left(dst, src, n, nbits) *dst = *src << n + * bitmap_scnprintf(buf, len, src, nbits) Print bitmap src to buf + * bitmap_parse(ubuf, ulen, dst, nbits) Parse bitmap dst from buf + */ + +/* + * Also the following operations in asm/bitops.h apply to bitmaps. + * + * set_bit(bit, addr) *addr |= bit + * clear_bit(bit, addr) *addr &= ~bit + * change_bit(bit, addr) *addr ^= bit + * test_bit(bit, addr) Is bit set in *addr? + * test_and_set_bit(bit, addr) Set bit and return old value + * test_and_clear_bit(bit, addr) Clear bit and return old value + * test_and_change_bit(bit, addr) Change bit and return old value + * find_first_zero_bit(addr, nbits) Position first zero bit in *addr + * find_first_bit(addr, nbits) Position first set bit in *addr + * find_next_zero_bit(addr, nbits, bit) Position next zero bit in *addr >= bit + * find_next_bit(addr, nbits, bit) Position next set bit in *addr >= bit + */ + +/* + * The DECLARE_BITMAP(name,bits) macro, in linux/types.h, can be used + * to declare an array named 'name' of just enough unsigned longs to + * contain all bit positions from 0 to 'bits' - 1. + */ + +/* + * lib/bitmap.c provides these functions: + */ + +extern int __bitmap_empty(const unsigned long *bitmap, int bits); +extern int __bitmap_full(const unsigned long *bitmap, int bits); +extern int __bitmap_equal(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits); +extern void __bitmap_complement(unsigned long *dst, const unsigned long *src, + int bits); +extern void __bitmap_shift_right(unsigned long *dst, + const unsigned long *src, int shift, int bits); +extern void __bitmap_shift_left(unsigned long *dst, + const unsigned long *src, int shift, int bits); +extern void __bitmap_and(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits); +extern void __bitmap_or(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits); +extern void __bitmap_xor(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits); +extern void __bitmap_andnot(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits); +extern int __bitmap_intersects(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits); +extern int __bitmap_subset(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits); +extern int __bitmap_weight(const unsigned long *bitmap, int bits); + +extern int bitmap_scnprintf(char *buf, unsigned int len, + const unsigned long *src, int nbits); +extern int bitmap_parse(const char __user *ubuf, unsigned int ulen, + unsigned long *dst, int nbits); + +#define BITMAP_LAST_WORD_MASK(nbits) \ +( \ + ((nbits) % BITS_PER_LONG) ? \ + (1UL<<((nbits) % BITS_PER_LONG))-1 : ~0UL \ +) + +static inline void bitmap_zero(unsigned long *dst, int nbits) { - memset(bitmap, 0, BITS_TO_LONGS(bits)*sizeof(unsigned long)); + if (nbits <= BITS_PER_LONG) + *dst = 0UL; + else { + int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long); + memset(dst, 0, len); + } } -static inline void bitmap_fill(unsigned long *bitmap, int bits) +static inline void bitmap_fill(unsigned long *dst, int nbits) { - memset(bitmap, 0xff, BITS_TO_LONGS(bits)*sizeof(unsigned long)); + size_t nlongs = BITS_TO_LONGS(nbits); + if (nlongs > 1) { + int len = (nlongs - 1) * sizeof(unsigned long); + memset(dst, 0xff, len); + } + dst[nlongs - 1] = BITMAP_LAST_WORD_MASK(nbits); } -static inline void bitmap_copy(unsigned long *dst, - const unsigned long *src, int bits) +static inline void bitmap_copy(unsigned long *dst, const unsigned long *src, + int nbits) { - int len = BITS_TO_LONGS(bits)*sizeof(unsigned long); - memcpy(dst, src, len); + if (nbits <= BITS_PER_LONG) + *dst = *src; + else { + int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long); + memcpy(dst, src, len); + } } -void bitmap_shift_right(unsigned long *dst, - const unsigned long *src, int shift, int bits); -void bitmap_shift_left(unsigned long *dst, - const unsigned long *src, int shift, int bits); -void bitmap_and(unsigned long *dst, const unsigned long *bitmap1, - const unsigned long *bitmap2, int bits); -void bitmap_or(unsigned long *dst, const unsigned long *bitmap1, - const unsigned long *bitmap2, int bits); -int bitmap_weight(const unsigned long *bitmap, int bits); -int bitmap_scnprintf(char *buf, unsigned int buflen, - const unsigned long *maskp, int bits); -int bitmap_parse(const char __user *ubuf, unsigned int ubuflen, - unsigned long *maskp, int bits); +static inline void bitmap_and(unsigned long *dst, const unsigned long *src1, + const unsigned long *src2, int nbits) +{ + if (nbits <= BITS_PER_LONG) + *dst = *src1 & *src2; + else + __bitmap_and(dst, src1, src2, nbits); +} + +static inline void bitmap_or(unsigned long *dst, const unsigned long *src1, + const unsigned long *src2, int nbits) +{ + if (nbits <= BITS_PER_LONG) + *dst = *src1 | *src2; + else + __bitmap_or(dst, src1, src2, nbits); +} + +static inline void bitmap_xor(unsigned long *dst, const unsigned long *src1, + const unsigned long *src2, int nbits) +{ + if (nbits <= BITS_PER_LONG) + *dst = *src1 ^ *src2; + else + __bitmap_xor(dst, src1, src2, nbits); +} + +static inline void bitmap_andnot(unsigned long *dst, const unsigned long *src1, + const unsigned long *src2, int nbits) +{ + if (nbits <= BITS_PER_LONG) + *dst = *src1 & ~(*src2); + else + __bitmap_andnot(dst, src1, src2, nbits); +} + +static inline void bitmap_complement(unsigned long *dst, const unsigned long *src, + int nbits) +{ + if (nbits <= BITS_PER_LONG) + *dst = ~(*src) & BITMAP_LAST_WORD_MASK(nbits); + else + __bitmap_complement(dst, src, nbits); +} + +static inline int bitmap_equal(const unsigned long *src1, + const unsigned long *src2, int nbits) +{ + if (nbits <= BITS_PER_LONG) + return ! ((*src1 ^ *src2) & BITMAP_LAST_WORD_MASK(nbits)); + else + return __bitmap_equal(src1, src2, nbits); +} + +static inline int bitmap_intersects(const unsigned long *src1, + const unsigned long *src2, int nbits) +{ + if (nbits <= BITS_PER_LONG) + return ((*src1 & *src2) & BITMAP_LAST_WORD_MASK(nbits)) != 0; + else + return __bitmap_intersects(src1, src2, nbits); +} + +static inline int bitmap_subset(const unsigned long *src1, + const unsigned long *src2, int nbits) +{ + if (nbits <= BITS_PER_LONG) + return ! ((*src1 & ~(*src2)) & BITMAP_LAST_WORD_MASK(nbits)); + else + return __bitmap_subset(src1, src2, nbits); +} + +static inline int bitmap_empty(const unsigned long *src, int nbits) +{ + if (nbits <= BITS_PER_LONG) + return ! (*src & BITMAP_LAST_WORD_MASK(nbits)); + else + return __bitmap_empty(src, nbits); +} + +static inline int bitmap_full(const unsigned long *src, int nbits) +{ + if (nbits <= BITS_PER_LONG) + return ! (~(*src) & BITMAP_LAST_WORD_MASK(nbits)); + else + return __bitmap_full(src, nbits); +} + +static inline int bitmap_weight(const unsigned long *src, int nbits) +{ + return __bitmap_weight(src, nbits); +} + +static inline void bitmap_shift_right(unsigned long *dst, + const unsigned long *src, int n, int nbits) +{ + if (nbits <= BITS_PER_LONG) + *dst = *src >> n; + else + __bitmap_shift_right(dst, src, n, nbits); +} + +static inline void bitmap_shift_left(unsigned long *dst, + const unsigned long *src, int n, int nbits) +{ + if (nbits <= BITS_PER_LONG) + *dst = (*src << n) & BITMAP_LAST_WORD_MASK(nbits); + else + __bitmap_shift_left(dst, src, n, nbits); +} #endif /* __ASSEMBLY__ */ diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h index 4293a465d87b..1d06e38480f7 100644 --- a/include/linux/cpumask.h +++ b/include/linux/cpumask.h @@ -1,56 +1,371 @@ #ifndef __LINUX_CPUMASK_H #define __LINUX_CPUMASK_H +/* + * Cpumasks provide a bitmap suitable for representing the + * set of CPU's in a system, one bit position per CPU number. + * + * See detailed comments in the file linux/bitmap.h describing the + * data type on which these cpumasks are based. + * + * For details of cpumask_scnprintf() and cpumask_parse(), + * see bitmap_scnprintf() and bitmap_parse() in lib/bitmap.c. + * + * The available cpumask operations are: + * + * void cpu_set(cpu, mask) turn on bit 'cpu' in mask + * void cpu_clear(cpu, mask) turn off bit 'cpu' in mask + * void cpus_setall(mask) set all bits + * void cpus_clear(mask) clear all bits + * int cpu_isset(cpu, mask) true iff bit 'cpu' set in mask + * int cpu_test_and_set(cpu, mask) test and set bit 'cpu' in mask + * + * void cpus_and(dst, src1, src2) dst = src1 & src2 [intersection] + * void cpus_or(dst, src1, src2) dst = src1 | src2 [union] + * void cpus_xor(dst, src1, src2) dst = src1 ^ src2 + * void cpus_andnot(dst, src1, src2) dst = src1 & ~src2 + * void cpus_complement(dst, src) dst = ~src + * + * int cpus_equal(mask1, mask2) Does mask1 == mask2? + * int cpus_intersects(mask1, mask2) Do mask1 and mask2 intersect? + * int cpus_subset(mask1, mask2) Is mask1 a subset of mask2? + * int cpus_empty(mask) Is mask empty (no bits sets)? + * int cpus_full(mask) Is mask full (all bits sets)? + * int cpus_weight(mask) Hamming weigh - number of set bits + * + * void cpus_shift_right(dst, src, n) Shift right + * void cpus_shift_left(dst, src, n) Shift left + * + * int first_cpu(mask) Number lowest set bit, or NR_CPUS + * int next_cpu(cpu, mask) Next cpu past 'cpu', or NR_CPUS + * + * cpumask_t cpumask_of_cpu(cpu) Return cpumask with bit 'cpu' set + * CPU_MASK_ALL Initializer - all bits set + * CPU_MASK_NONE Initializer - no bits set + * unsigned long *cpus_addr(mask) Array of unsigned long's in mask + * + * int cpumask_scnprintf(buf, len, mask) Format cpumask for printing + * int cpumask_parse(ubuf, ulen, mask) Parse ascii string as cpumask + * + * for_each_cpu_mask(cpu, mask) for-loop cpu over mask + * + * int num_online_cpus() Number of online CPUs + * int num_possible_cpus() Number of all possible CPUs + * int num_present_cpus() Number of present CPUs + * + * int cpu_online(cpu) Is some cpu online? + * int cpu_possible(cpu) Is some cpu possible? + * int cpu_present(cpu) Is some cpu present (can schedule)? + * + * int any_online_cpu(mask) First online cpu in mask + * + * for_each_cpu(cpu) for-loop cpu over cpu_possible_map + * for_each_online_cpu(cpu) for-loop cpu over cpu_online_map + * for_each_present_cpu(cpu) for-loop cpu over cpu_present_map + * + * Subtlety: + * 1) The 'type-checked' form of cpu_isset() causes gcc (3.3.2, anyway) + * to generate slightly worse code. Note for example the additional + * 40 lines of assembly code compiling the "for each possible cpu" + * loops buried in the disk_stat_read() macros calls when compiling + * drivers/block/genhd.c (arch i386, CONFIG_SMP=y). So use a simple + * one-line #define for cpu_isset(), instead of wrapping an inline + * inside a macro, the way we do the other calls. + */ + #include <linux/threads.h> #include <linux/bitmap.h> -#include <asm/cpumask.h> #include <asm/bug.h> -#ifdef CONFIG_SMP +typedef struct { DECLARE_BITMAP(bits, NR_CPUS); } cpumask_t; +extern cpumask_t _unused_cpumask_arg_; -extern cpumask_t cpu_online_map; -extern cpumask_t cpu_possible_map; -extern cpumask_t cpu_present_map; +#define cpu_set(cpu, dst) __cpu_set((cpu), &(dst)) +static inline void __cpu_set(int cpu, volatile cpumask_t *dstp) +{ + set_bit(cpu, dstp->bits); +} + +#define cpu_clear(cpu, dst) __cpu_clear((cpu), &(dst)) +static inline void __cpu_clear(int cpu, volatile cpumask_t *dstp) +{ + clear_bit(cpu, dstp->bits); +} + +#define cpus_setall(dst) __cpus_setall(&(dst), NR_CPUS) +static inline void __cpus_setall(cpumask_t *dstp, int nbits) +{ + bitmap_fill(dstp->bits, nbits); +} + +#define cpus_clear(dst) __cpus_clear(&(dst), NR_CPUS) +static inline void __cpus_clear(cpumask_t *dstp, int nbits) +{ + bitmap_zero(dstp->bits, nbits); +} + +/* No static inline type checking - see Subtlety (1) above. */ +#define cpu_isset(cpu, cpumask) test_bit((cpu), (cpumask).bits) + +#define cpu_test_and_set(cpu, cpumask) __cpu_test_and_set((cpu), &(cpumask)) +static inline int __cpu_test_and_set(int cpu, cpumask_t *addr) +{ + return test_and_set_bit(cpu, addr->bits); +} + +#define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS) +static inline void __cpus_and(cpumask_t *dstp, cpumask_t *src1p, + cpumask_t *src2p, int nbits) +{ + bitmap_and(dstp->bits, src1p->bits, src2p->bits, nbits); +} + +#define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS) +static inline void __cpus_or(cpumask_t *dstp, cpumask_t *src1p, + cpumask_t *src2p, int nbits) +{ + bitmap_or(dstp->bits, src1p->bits, src2p->bits, nbits); +} + +#define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS) +static inline void __cpus_xor(cpumask_t *dstp, cpumask_t *src1p, + cpumask_t *src2p, int nbits) +{ + bitmap_xor(dstp->bits, src1p->bits, src2p->bits, nbits); +} + +#define cpus_andnot(dst, src1, src2) \ + __cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS) +static inline void __cpus_andnot(cpumask_t *dstp, cpumask_t *src1p, + cpumask_t *src2p, int nbits) +{ + bitmap_andnot(dstp->bits, src1p->bits, src2p->bits, nbits); +} + +#define cpus_complement(dst, src) __cpus_complement(&(dst), &(src), NR_CPUS) +static inline void __cpus_complement(cpumask_t *dstp, + cpumask_t *srcp, int nbits) +{ + bitmap_complement(dstp->bits, srcp->bits, nbits); +} + +#define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS) +static inline int __cpus_equal(cpumask_t *src1p, + cpumask_t *src2p, int nbits) +{ + return bitmap_equal(src1p->bits, src2p->bits, nbits); +} + +#define cpus_intersects(src1, src2) __cpus_intersects(&(src1), &(src2), NR_CPUS) +static inline int __cpus_intersects(cpumask_t *src1p, + cpumask_t *src2p, int nbits) +{ + return bitmap_intersects(src1p->bits, src2p->bits, nbits); +} + +#define cpus_subset(src1, src2) __cpus_subset(&(src1), &(src2), NR_CPUS) +static inline int __cpus_subset(cpumask_t *src1p, + cpumask_t *src2p, int nbits) +{ + return bitmap_subset(src1p->bits, src2p->bits, nbits); +} + +#define cpus_empty(src) __cpus_empty(&(src), NR_CPUS) +static inline int __cpus_empty(cpumask_t *srcp, int nbits) +{ + return bitmap_empty(srcp->bits, nbits); +} + +#define cpus_full(cpumask) __cpus_full(&(cpumask), NR_CPUS) +static inline int __cpus_full(cpumask_t *srcp, int nbits) +{ + return bitmap_full(srcp->bits, nbits); +} + +#define cpus_weight(cpumask) __cpus_weight(&(cpumask), NR_CPUS) +static inline int __cpus_weight(cpumask_t *srcp, int nbits) +{ + return bitmap_weight(srcp->bits, nbits); +} -#define num_online_cpus() cpus_weight(cpu_online_map) -#define num_possible_cpus() cpus_weight(cpu_possible_map) -#define num_present_cpus() cpus_weight(cpu_present_map) +#define cpus_shift_right(dst, src, n) \ + __cpus_shift_right(&(dst), &(src), (n), NR_CPUS) +static inline void __cpus_shift_right(cpumask_t *dstp, + cpumask_t *srcp, int n, int nbits) +{ + bitmap_shift_right(dstp->bits, srcp->bits, n, nbits); +} -#define cpu_online(cpu) cpu_isset(cpu, cpu_online_map) -#define cpu_possible(cpu) cpu_isset(cpu, cpu_possible_map) -#define cpu_present(cpu) cpu_isset(cpu, cpu_present_map) +#define cpus_shift_left(dst, src, n) \ + __cpus_shift_left(&(dst), &(src), (n), NR_CPUS) +static inline void __cpus_shift_left(cpumask_t *dstp, + cpumask_t *srcp, int n, int nbits) +{ + bitmap_shift_left(dstp->bits, srcp->bits, n, nbits); +} -#define for_each_cpu_mask(cpu, mask) \ - for (cpu = first_cpu_const(mk_cpumask_const(mask)); \ - cpu < NR_CPUS; \ - cpu = next_cpu_const(cpu, mk_cpumask_const(mask))) +#define first_cpu(src) __first_cpu(&(src), NR_CPUS) +static inline int __first_cpu(cpumask_t *srcp, int nbits) +{ + return find_first_bit(srcp->bits, nbits); +} + +#define next_cpu(n, src) __next_cpu((n), &(src), NR_CPUS) +static inline int __next_cpu(int n, cpumask_t *srcp, int nbits) +{ + return find_next_bit(srcp->bits, nbits, n+1); +} + +#define cpumask_of_cpu(cpu) \ +({ \ + typeof(_unused_cpumask_arg_) m; \ + if (sizeof(m) == sizeof(unsigned long)) { \ + m.bits[0] = 1UL<<(cpu); \ + } else { \ + cpus_clear(m); \ + cpu_set((cpu), m); \ + } \ + m; \ +}) + +#define CPU_MASK_LAST_WORD BITMAP_LAST_WORD_MASK(NR_CPUS) + +#if NR_CPUS <= BITS_PER_LONG + +#define CPU_MASK_ALL \ +((cpumask_t) { { \ + [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ +} }) + +#else + +#define CPU_MASK_ALL \ +((cpumask_t) { { \ + [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \ + [BITS_TO_LONGS(NR_CPUS)-1] = CPU_MASK_LAST_WORD \ +} }) + +#endif + +#define CPU_MASK_NONE \ +((cpumask_t) { { \ + [0 ... BITS_TO_LONGS(NR_CPUS)-1] = 0UL \ +} }) + +#define cpus_addr(src) ((src).bits) + +#define cpumask_scnprintf(buf, len, src) \ + __cpumask_scnprintf((buf), (len), &(src), NR_CPUS) +static inline int __cpumask_scnprintf(char *buf, int len, + cpumask_t *srcp, int nbits) +{ + return bitmap_scnprintf(buf, len, srcp->bits, nbits); +} + +#define cpumask_parse(ubuf, ulen, src) \ + __cpumask_parse((ubuf), (ulen), &(src), NR_CPUS) +static inline int __cpumask_parse(const char __user *buf, int len, + cpumask_t *srcp, int nbits) +{ + return bitmap_parse(buf, len, srcp->bits, nbits); +} + +#if NR_CPUS > 1 +#define for_each_cpu_mask(cpu, mask) \ + for ((cpu) = first_cpu(mask); \ + (cpu) < NR_CPUS; \ + (cpu) = next_cpu((cpu), (mask))) +#else /* NR_CPUS == 1 */ +#define for_each_cpu_mask(cpu, mask) for ((cpu) = 0; (cpu) < 1; (cpu)++) +#endif /* NR_CPUS */ + +/* + * The following particular system cpumasks and operations manage + * possible, present and online cpus. Each of them is a fixed size + * bitmap of size NR_CPUS. + * + * #ifdef CONFIG_HOTPLUG_CPU + * cpu_possible_map - all NR_CPUS bits set + * cpu_present_map - has bit 'cpu' set iff cpu is populated + * cpu_online_map - has bit 'cpu' set iff cpu available to scheduler + * #else + * cpu_possible_map - has bit 'cpu' set iff cpu is populated + * cpu_present_map - copy of cpu_possible_map + * cpu_online_map - has bit 'cpu' set iff cpu available to scheduler + * #endif + * + * In either case, NR_CPUS is fixed at compile time, as the static + * size of these bitmaps. The cpu_possible_map is fixed at boot + * time, as the set of CPU id's that it is possible might ever + * be plugged in at anytime during the life of that system boot. + * The cpu_present_map is dynamic(*), representing which CPUs + * are currently plugged in. And cpu_online_map is the dynamic + * subset of cpu_present_map, indicating those CPUs available + * for scheduling. + * + * If HOTPLUG is enabled, then cpu_possible_map is forced to have + * all NR_CPUS bits set, otherwise it is just the set of CPUs that + * ACPI reports present at boot. + * + * If HOTPLUG is enabled, then cpu_present_map varies dynamically, + * depending on what ACPI reports as currently plugged in, otherwise + * cpu_present_map is just a copy of cpu_possible_map. + * + * (*) Well, cpu_present_map is dynamic in the hotplug case. If not + * hotplug, it's a copy of cpu_possible_map, hence fixed at boot. + * + * Subtleties: + * 1) UP arch's (NR_CPUS == 1, CONFIG_SMP not defined) hardcode + * assumption that their single CPU is online. The UP + * cpu_{online,possible,present}_maps are placebos. Changing them + * will have no useful affect on the following num_*_cpus() + * and cpu_*() macros in the UP case. This ugliness is a UP + * optimization - don't waste any instructions or memory references + * asking if you're online or how many CPUs there are if there is + * only one CPU. + * 2) Most SMP arch's #define some of these maps to be some + * other map specific to that arch. Therefore, the following + * must be #define macros, not inlines. To see why, examine + * the assembly code produced by the following. Note that + * set1() writes phys_x_map, but set2() writes x_map: + * int x_map, phys_x_map; + * #define set1(a) x_map = a + * inline void set2(int a) { x_map = a; } + * #define x_map phys_x_map + * main(){ set1(3); set2(5); } + */ + +extern cpumask_t cpu_possible_map; +extern cpumask_t cpu_online_map; +extern cpumask_t cpu_present_map; -#define for_each_cpu(cpu) for_each_cpu_mask(cpu, cpu_possible_map) -#define for_each_online_cpu(cpu) for_each_cpu_mask(cpu, cpu_online_map) -#define for_each_present_cpu(cpu) for_each_cpu_mask(cpu, cpu_present_map) +#if NR_CPUS > 1 +#define num_online_cpus() cpus_weight(cpu_online_map) +#define num_possible_cpus() cpus_weight(cpu_possible_map) +#define num_present_cpus() cpus_weight(cpu_present_map) +#define cpu_online(cpu) cpu_isset((cpu), cpu_online_map) +#define cpu_possible(cpu) cpu_isset((cpu), cpu_possible_map) +#define cpu_present(cpu) cpu_isset((cpu), cpu_present_map) #else -#define cpu_online_map cpumask_of_cpu(0) -#define cpu_possible_map cpumask_of_cpu(0) -#define cpu_present_map cpumask_of_cpu(0) - -#define num_online_cpus() 1 -#define num_possible_cpus() 1 -#define num_present_cpus() 1 - -#define cpu_online(cpu) ({ BUG_ON((cpu) != 0); 1; }) -#define cpu_possible(cpu) ({ BUG_ON((cpu) != 0); 1; }) -#define cpu_present(cpu) ({ BUG_ON((cpu) != 0); 1; }) - -#define for_each_cpu_mask(cpu, mask) for (cpu = 0; cpu < 1; cpu++) -#define for_each_cpu(cpu) for (cpu = 0; cpu < 1; cpu++) -#define for_each_online_cpu(cpu) for (cpu = 0; cpu < 1; cpu++) -#define for_each_present_cpu(cpu) for (cpu = 0; cpu < 1; cpu++) +#define num_online_cpus() 1 +#define num_possible_cpus() 1 +#define num_present_cpus() 1 +#define cpu_online(cpu) ((cpu) == 0) +#define cpu_possible(cpu) ((cpu) == 0) +#define cpu_present(cpu) ((cpu) == 0) #endif -#define cpumask_scnprintf(buf, buflen, map) \ - bitmap_scnprintf(buf, buflen, cpus_addr(map), NR_CPUS) +#define any_online_cpu(mask) \ +({ \ + int cpu; \ + for_each_cpu_mask(cpu, (mask)) \ + if (cpu_online(cpu)) \ + break; \ + cpu; \ +}) -#define cpumask_parse(buf, buflen, map) \ - bitmap_parse(buf, buflen, cpus_addr(map), NR_CPUS) +#define for_each_cpu(cpu) for_each_cpu_mask((cpu), cpu_possible_map) +#define for_each_online_cpu(cpu) for_each_cpu_mask((cpu), cpu_online_map) +#define for_each_present_cpu(cpu) for_each_cpu_mask((cpu), cpu_present_map) #endif /* __LINUX_CPUMASK_H */ diff --git a/include/linux/dcache.h b/include/linux/dcache.h index 72f48658a7d7..66e27328434b 100644 --- a/include/linux/dcache.h +++ b/include/linux/dcache.h @@ -313,6 +313,8 @@ static inline int d_mountpoint(struct dentry *dentry) extern struct vfsmount *lookup_mnt(struct vfsmount *, struct dentry *); extern struct dentry *lookup_create(struct nameidata *nd, int is_dir); +extern int sysctl_vfs_cache_pressure; + #endif /* __KERNEL__ */ #endif /* __LINUX_DCACHE_H */ diff --git a/include/linux/fb.h b/include/linux/fb.h index cc7f14febf7c..a25a0ae12656 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -530,6 +530,8 @@ struct fb_ops { #define FBINFO_HWACCEL_YPAN 0x2000 /* optional */ #define FBINFO_HWACCEL_YWRAP 0x4000 /* optional */ +#define FBINFO_MISC_MODECHANGEUSER 0x10000 /* mode change request + from userspace */ struct fb_info { int node; @@ -539,6 +541,7 @@ struct fb_info { struct fb_monspecs monspecs; /* Current Monitor specs */ struct fb_cursor cursor; /* Current cursor */ struct work_struct queue; /* Framebuffer event queue */ + struct timer_list cursor_timer; /* Cursor timer */ struct fb_pixmap pixmap; /* Image hardware mapper */ struct fb_pixmap sprite; /* Cursor hardware mapper */ struct fb_cmap cmap; /* Current cmap */ diff --git a/include/linux/fs.h b/include/linux/fs.h index 88337ed4f4f2..27dda18def71 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -902,6 +902,7 @@ struct inode_operations { struct inode *, struct dentry *); int (*readlink) (struct dentry *, char __user *,int); int (*follow_link) (struct dentry *, struct nameidata *); + void (*put_link) (struct dentry *, struct nameidata *); void (*truncate) (struct inode *); int (*permission) (struct inode *, int, struct nameidata *); int (*setattr) (struct dentry *, struct iattr *); @@ -1467,8 +1468,11 @@ extern int vfs_readlink(struct dentry *, char __user *, int, const char *); extern int vfs_follow_link(struct nameidata *, const char *); extern int page_readlink(struct dentry *, char __user *, int); extern int page_follow_link(struct dentry *, struct nameidata *); +extern int page_follow_link_light(struct dentry *, struct nameidata *); +extern void page_put_link(struct dentry *, struct nameidata *); extern int page_symlink(struct inode *inode, const char *symname, int len); extern struct inode_operations page_symlink_inode_operations; +extern int generic_readlink(struct dentry *, char __user *, int); extern void generic_fillattr(struct inode *, struct kstat *); extern int vfs_getattr(struct vfsmount *, struct dentry *, struct kstat *); void inode_add_bytes(struct inode *inode, loff_t bytes); diff --git a/include/linux/i2o-dev.h b/include/linux/i2o-dev.h index c79f39745b6d..9ef82bf1a45d 100644 --- a/include/linux/i2o-dev.h +++ b/include/linux/i2o-dev.h @@ -46,24 +46,24 @@ struct i2o_cmd_passthru { unsigned int iop; /* IOP unit number */ - void *msg; /* message */ + void __user *msg; /* message */ }; struct i2o_cmd_hrtlct { unsigned int iop; /* IOP unit number */ - void *resbuf; /* Buffer for result */ - unsigned int *reslen; /* Buffer length in bytes */ + void __user *resbuf; /* Buffer for result */ + unsigned int __user *reslen; /* Buffer length in bytes */ }; struct i2o_cmd_psetget { unsigned int iop; /* IOP unit number */ unsigned int tid; /* Target device TID */ - void *opbuf; /* Operation List buffer */ + void __user *opbuf; /* Operation List buffer */ unsigned int oplen; /* Operation List buffer length in bytes */ - void *resbuf; /* Result List buffer */ - unsigned int *reslen; /* Result List buffer length in bytes */ + void __user *resbuf; /* Result List buffer */ + unsigned int __user *reslen; /* Result List buffer length in bytes */ }; struct i2o_sw_xfer @@ -72,10 +72,10 @@ struct i2o_sw_xfer unsigned char flags; /* Flags field */ unsigned char sw_type; /* Software type */ unsigned int sw_id; /* Software ID */ - void *buf; /* Pointer to software buffer */ - unsigned int *swlen; /* Length of software data */ - unsigned int *maxfrag; /* Maximum fragment count */ - unsigned int *curfrag; /* Current fragment count */ + void __user *buf; /* Pointer to software buffer */ + unsigned int __user *swlen; /* Length of software data */ + unsigned int __user *maxfrag; /* Maximum fragment count */ + unsigned int __user *curfrag; /* Current fragment count */ }; struct i2o_html @@ -83,9 +83,9 @@ struct i2o_html unsigned int iop; /* IOP unit number */ unsigned int tid; /* Target device ID */ unsigned int page; /* HTML page */ - void *resbuf; /* Buffer for reply HTML page */ - unsigned int *reslen; /* Length in bytes of reply buffer */ - void *qbuf; /* Pointer to HTTP query string */ + void __user *resbuf; /* Buffer for reply HTML page */ + unsigned int __user *reslen; /* Length in bytes of reply buffer */ + void __user *qbuf; /* Pointer to HTTP query string */ unsigned int qlen; /* Length in bytes of query string buffer */ }; diff --git a/include/linux/ide.h b/include/linux/ide.h index 5ae165606a7c..fe54e41439c8 100644 --- a/include/linux/ide.h +++ b/include/linux/ide.h @@ -833,30 +833,14 @@ typedef struct ide_dma_ops_s { #define ide_rq_offset(rq) \ (((rq)->hard_cur_sectors - (rq)->current_nr_sectors) << 9) -/* - * taskfiles really should use hard_cur_sectors as well! - */ -#define task_rq_offset(rq) \ - (((rq)->nr_sectors - (rq)->current_nr_sectors) * SECTOR_SIZE) - static inline void *ide_map_buffer(struct request *rq, unsigned long *flags) { - /* - * fs request - */ - if (rq->bio) - return bio_kmap_irq(rq->bio, flags) + ide_rq_offset(rq); - - /* - * task request - */ - return rq->buffer + task_rq_offset(rq); + return bio_kmap_irq(rq->bio, flags) + ide_rq_offset(rq); } static inline void ide_unmap_buffer(struct request *rq, char *buffer, unsigned long *flags) { - if (rq->bio) - bio_kunmap_irq(buffer, flags); + bio_kunmap_irq(buffer, flags); } #endif /* !CONFIG_IDE_TASKFILE_IO */ @@ -1415,42 +1399,32 @@ extern void atapi_output_bytes(ide_drive_t *, void *, u32); extern void taskfile_input_data(ide_drive_t *, void *, u32); extern void taskfile_output_data(ide_drive_t *, void *, u32); -#ifdef CONFIG_IDE_TASKFILE_IO - #define IDE_PIO_IN 0 #define IDE_PIO_OUT 1 -static inline void task_sectors(ide_drive_t *drive, struct request *rq, - unsigned nsect, int rw) +static inline void __task_sectors(ide_drive_t *drive, char *buf, + unsigned nsect, unsigned rw) { - unsigned long flags; - unsigned int bio_rq; - char *buf; - - /* - * bio_rq flag is needed because we can call - * rq_unmap_buffer() with rq->cbio == NULL - */ - bio_rq = rq->cbio ? 1 : 0; - - if (bio_rq) - buf = rq_map_buffer(rq, &flags); /* fs request */ - else - buf = rq->buffer + blk_rq_offset(rq); /* task request */ - /* * IRQ can happen instantly after reading/writing * last sector of the datablock. */ - process_that_request_first(rq, nsect); - if (rw == IDE_PIO_OUT) taskfile_output_data(drive, buf, nsect * SECTOR_WORDS); else taskfile_input_data(drive, buf, nsect * SECTOR_WORDS); +} + +#ifdef CONFIG_IDE_TASKFILE_IO +static inline void task_bio_sectors(ide_drive_t *drive, struct request *rq, + unsigned nsect, unsigned rw) +{ + unsigned long flags; + char *buf = rq_map_buffer(rq, &flags); - if (bio_rq) - rq_unmap_buffer(buf, &flags); + process_that_request_first(rq, nsect); + __task_sectors(drive, buf, nsect, rw); + rq_unmap_buffer(buf, &flags); } #endif /* CONFIG_IDE_TASKFILE_IO */ diff --git a/include/linux/init.h b/include/linux/init.h index 45069e275b3d..641657ebe067 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -3,6 +3,7 @@ #include <linux/config.h> #include <linux/compiler.h> +#include <asm/setup.h> /* These macros are used to mark some functions or * initialized data (doesn't apply to uninitialized data) @@ -66,6 +67,9 @@ typedef void (*exitcall_t)(void); extern initcall_t __con_initcall_start, __con_initcall_end; extern initcall_t __security_initcall_start, __security_initcall_end; + +/* Defined in init/main.c */ +extern char saved_command_line[COMMAND_LINE_SIZE]; #endif #ifndef MODULE @@ -107,25 +111,33 @@ extern initcall_t __security_initcall_start, __security_initcall_end; struct obs_kernel_param { const char *str; int (*setup_func)(char *); + int early; }; -/* OBSOLETE: see moduleparam.h for the right way. */ -#define __setup_param(str, unique_id, fn) \ +/* Only for really core code. See moduleparam.h for the normal way. */ +#define __setup_param(str, unique_id, fn, early) \ static char __setup_str_##unique_id[] __initdata = str; \ static struct obs_kernel_param __setup_##unique_id \ __attribute_used__ \ __attribute__((__section__(".init.setup"))) \ - = { __setup_str_##unique_id, fn } + = { __setup_str_##unique_id, fn, early } #define __setup_null_param(str, unique_id) \ - __setup_param(str, unique_id, NULL) + __setup_param(str, unique_id, NULL, 0) #define __setup(str, fn) \ - __setup_param(str, fn, fn) + __setup_param(str, fn, fn, 0) #define __obsolete_setup(str) \ __setup_null_param(str, __LINE__) +/* NOTE: fn is as per module_param, not __setup! Emits warning if fn + * returns non-zero. */ +#define early_param(str, fn) \ + __setup_param(str, fn, fn, 1) + +/* Relies on saved_command_line being set */ +void __init parse_early_param(void); #endif /* __ASSEMBLY__ */ /** diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 220f2a8602b4..565321b05213 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -7,6 +7,7 @@ #include <linux/linkage.h> #include <linux/bitops.h> #include <linux/preempt.h> +#include <linux/cpumask.h> #include <asm/atomic.h> #include <asm/hardirq.h> #include <asm/ptrace.h> @@ -35,7 +36,7 @@ typedef int irqreturn_t; struct irqaction { irqreturn_t (*handler)(int, void *, struct pt_regs *); unsigned long flags; - unsigned long mask; + cpumask_t mask; const char *name; void *dev_id; struct irqaction *next; diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 9eb023020b44..d6ed9b926c6f 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -54,6 +54,16 @@ void __might_sleep(char *file, int line); #define might_sleep_if(cond) do {} while (0) #endif +#define abs(x) ({ \ + int __x = (x); \ + (__x < 0) ? -__x : __x; \ + }) + +#define labs(x) ({ \ + long __x = (x); \ + (__x < 0) ? -__x : __x; \ + }) + extern struct notifier_block *panic_notifier_list; NORET_TYPE void panic(const char * fmt, ...) __attribute__ ((NORET_AND format (printf, 1, 2))); @@ -61,7 +71,6 @@ asmlinkage NORET_TYPE void do_exit(long error_code) ATTRIB_NORET; NORET_TYPE void complete_and_exit(struct completion *, long) ATTRIB_NORET; -extern int abs(int); extern unsigned long simple_strtoul(const char *,char **,unsigned int); extern long simple_strtol(const char *,char **,unsigned int); extern unsigned long long simple_strtoull(const char *,char **,unsigned int); diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index 373a13ba6f3f..2f41b635580b 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -118,8 +118,8 @@ struct zone { spinlock_t lru_lock; struct list_head active_list; struct list_head inactive_list; - atomic_t nr_scan_active; - atomic_t nr_scan_inactive; + unsigned long nr_scan_active; + unsigned long nr_scan_inactive; unsigned long nr_active; unsigned long nr_inactive; int all_unreclaimable; /* All pages pinned */ diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 9ac94aaabd3f..d186585b73a4 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -22,7 +22,7 @@ struct erase_info_user { struct mtd_oob_buf { u_int32_t start; u_int32_t length; - unsigned char *ptr; + unsigned char __user *ptr; }; #define MTD_CHAR_MAJOR 90 diff --git a/include/linux/namei.h b/include/linux/namei.h index 4117cd90a345..adcafdec8ee7 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -10,12 +10,16 @@ struct open_intent { int create_mode; }; +enum { MAX_NESTED_LINKS = 5 }; + struct nameidata { struct dentry *dentry; struct vfsmount *mnt; struct qstr last; unsigned int flags; int last_type; + unsigned depth; + char *saved_names[MAX_NESTED_LINKS + 1]; /* Intent data */ union { @@ -67,4 +71,14 @@ extern int follow_up(struct vfsmount **, struct dentry **); extern struct dentry *lock_rename(struct dentry *, struct dentry *); extern void unlock_rename(struct dentry *, struct dentry *); +static inline void nd_set_link(struct nameidata *nd, char *path) +{ + nd->saved_names[nd->depth] = path; +} + +static inline char *nd_get_link(struct nameidata *nd) +{ + return nd->saved_names[nd->depth]; +} + #endif /* _LINUX_NAMEI_H */ diff --git a/include/linux/oprofile.h b/include/linux/oprofile.h index 80cfea0fa65f..f17c89c37c72 100644 --- a/include/linux/oprofile.h +++ b/include/linux/oprofile.h @@ -65,6 +65,9 @@ extern void oprofile_add_sample(unsigned long eip, unsigned int is_kernel, */ int oprofilefs_create_file(struct super_block * sb, struct dentry * root, char const * name, struct file_operations * fops); + +int oprofilefs_create_file_perm(struct super_block * sb, struct dentry * root, + char const * name, struct file_operations * fops, int perm); /** Create a file for read/write access to an unsigned long. */ int oprofilefs_create_ulong(struct super_block * sb, struct dentry * root, diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index 427b696f484b..4da205f3cb26 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -8,6 +8,7 @@ #include <linux/fs.h> #include <linux/list.h> #include <linux/highmem.h> +#include <linux/compiler.h> #include <asm/uaccess.h> #include <linux/gfp.h> @@ -136,7 +137,10 @@ static inline void pagecache_acct(int count) static inline unsigned long get_page_cache_size(void) { - return atomic_read(&nr_pagecache); + int ret = atomic_read(&nr_pagecache); + if (unlikely(ret < 0)) + ret = 0; + return ret; } static inline pgoff_t linear_page_index(struct vm_area_struct *vma, diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 45d805ddeb9e..ba2d0b357306 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2252,8 +2252,12 @@ #define PCI_DEVICE_ID_HOLTEK_6565 0x6565 #define PCI_VENDOR_ID_NETMOS 0x9710 +#define PCI_DEVICE_ID_NETMOS_9705 0x9705 #define PCI_DEVICE_ID_NETMOS_9735 0x9735 +#define PCI_DEVICE_ID_NETMOS_9805 0x9805 +#define PCI_DEVICE_ID_NETMOS_9815 0x9815 #define PCI_DEVICE_ID_NETMOS_9835 0x9835 +#define PCI_DEVICE_ID_NETMOS_9855 0x9855 #define PCI_SUBVENDOR_ID_EXSYS 0xd84d #define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014 diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h index 58048abd7446..10c4b8f24f08 100644 --- a/include/linux/rcupdate.h +++ b/include/linux/rcupdate.h @@ -36,41 +36,37 @@ #ifdef __KERNEL__ #include <linux/cache.h> -#include <linux/list.h> #include <linux/spinlock.h> #include <linux/threads.h> #include <linux/percpu.h> #include <linux/cpumask.h> +#include <linux/seqlock.h> /** * struct rcu_head - callback structure for use with RCU - * @list: list_head to queue the update requests + * @next: next update requests in a list * @func: actual update function to call after the grace period. - * @arg: argument to be passed to the actual update function. */ struct rcu_head { - struct list_head list; - void (*func)(void *obj); - void *arg; + struct rcu_head *next; + void (*func)(struct rcu_head *head); }; -#define RCU_HEAD_INIT(head) \ - { .list = LIST_HEAD_INIT(head.list), .func = NULL, .arg = NULL } +#define RCU_HEAD_INIT(head) { .next = NULL, .func = NULL } #define RCU_HEAD(head) struct rcu_head head = RCU_HEAD_INIT(head) #define INIT_RCU_HEAD(ptr) do { \ - INIT_LIST_HEAD(&(ptr)->list); (ptr)->func = NULL; (ptr)->arg = NULL; \ + (ptr)->next = NULL; (ptr)->func = NULL; \ } while (0) -/* Control variables for rcupdate callback mechanism. */ +/* Global control variables for rcupdate callback mechanism. */ struct rcu_ctrlblk { - spinlock_t mutex; /* Guard this struct */ - long curbatch; /* Current batch number. */ - long maxbatch; /* Max requested batch number. */ - cpumask_t rcu_cpu_mask; /* CPUs that need to switch in order */ - /* for current batch to proceed. */ -}; + long cur; /* Current batch number. */ + long completed; /* Number of the last completed batch */ + int next_pending; /* Is the next batch already waiting? */ + seqcount_t lock; /* For atomic reads of cur and next_pending. */ +} ____cacheline_maxaligned_in_smp; /* Is batch a before batch b ? */ static inline int rcu_batch_before(long a, long b) @@ -90,35 +86,51 @@ static inline int rcu_batch_after(long a, long b) * curlist - current batch for which quiescent cycle started if any */ struct rcu_data { + /* 1) quiescent state handling : */ + long quiescbatch; /* Batch # for grace period */ long qsctr; /* User-mode/idle loop etc. */ long last_qsctr; /* value of qsctr at beginning */ /* of rcu grace period */ + int qs_pending; /* core waits for quiesc state */ + + /* 2) batch handling */ long batch; /* Batch # for current RCU batch */ - struct list_head nxtlist; - struct list_head curlist; + struct rcu_head *nxtlist; + struct rcu_head **nxttail; + struct rcu_head *curlist; }; DECLARE_PER_CPU(struct rcu_data, rcu_data); extern struct rcu_ctrlblk rcu_ctrlblk; +#define RCU_quiescbatch(cpu) (per_cpu(rcu_data, (cpu)).quiescbatch) #define RCU_qsctr(cpu) (per_cpu(rcu_data, (cpu)).qsctr) #define RCU_last_qsctr(cpu) (per_cpu(rcu_data, (cpu)).last_qsctr) +#define RCU_qs_pending(cpu) (per_cpu(rcu_data, (cpu)).qs_pending) #define RCU_batch(cpu) (per_cpu(rcu_data, (cpu)).batch) #define RCU_nxtlist(cpu) (per_cpu(rcu_data, (cpu)).nxtlist) #define RCU_curlist(cpu) (per_cpu(rcu_data, (cpu)).curlist) - -#define RCU_QSCTR_INVALID 0 +#define RCU_nxttail(cpu) (per_cpu(rcu_data, (cpu)).nxttail) static inline int rcu_pending(int cpu) { - if ((!list_empty(&RCU_curlist(cpu)) && - rcu_batch_before(RCU_batch(cpu), rcu_ctrlblk.curbatch)) || - (list_empty(&RCU_curlist(cpu)) && - !list_empty(&RCU_nxtlist(cpu))) || - cpu_isset(cpu, rcu_ctrlblk.rcu_cpu_mask)) + /* This cpu has pending rcu entries and the grace period + * for them has completed. + */ + if (RCU_curlist(cpu) && + !rcu_batch_before(rcu_ctrlblk.completed,RCU_batch(cpu))) + return 1; + + /* This cpu has no pending entries, but there are new entries */ + if (!RCU_curlist(cpu) && RCU_nxtlist(cpu)) + return 1; + + /* The rcu core waits for a quiescent state from the cpu */ + if (RCU_quiescbatch(cpu) != rcu_ctrlblk.cur || RCU_qs_pending(cpu)) return 1; - else - return 0; + + /* nothing to do */ + return 0; } #define rcu_read_lock() preempt_disable() @@ -126,10 +138,11 @@ static inline int rcu_pending(int cpu) extern void rcu_init(void); extern void rcu_check_callbacks(int cpu, int user); +extern void rcu_restart_cpu(int cpu); /* Exported interfaces */ extern void FASTCALL(call_rcu(struct rcu_head *head, - void (*func)(void *arg), void *arg)); + void (*func)(struct rcu_head *head))); extern void synchronize_kernel(void); #endif /* __KERNEL__ */ diff --git a/include/linux/swap.h b/include/linux/swap.h index a748538f3a31..b9edc335a563 100644 --- a/include/linux/swap.h +++ b/include/linux/swap.h @@ -156,7 +156,7 @@ extern void swapin_readahead(swp_entry_t, unsigned long, struct vm_area_struct * /* linux/mm/page_alloc.c */ extern unsigned long totalram_pages; extern unsigned long totalhigh_pages; -extern int nr_swap_pages; /* XXX: shouldn't this be ulong? --hch */ +extern long nr_swap_pages; extern unsigned int nr_free_pages(void); extern unsigned int nr_free_pages_pgdat(pg_data_t *pgdat); extern unsigned int nr_free_buffer_pages(void); @@ -206,7 +206,7 @@ extern struct page * read_swap_cache_async(swp_entry_t, struct vm_area_struct *v unsigned long addr); /* linux/mm/swapfile.c */ -extern int total_swap_pages; +extern long total_swap_pages; extern unsigned int nr_swapfiles; extern struct swap_info_struct swap_info[]; extern void si_swapinfo(struct sysinfo *); diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index f70f7fc14498..38acd5d4b691 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -164,6 +164,7 @@ enum VM_LAPTOP_MODE=23, /* vm laptop mode */ VM_BLOCK_DUMP=24, /* block dump mode */ VM_HUGETLB_GROUP=25, /* permitted hugetlb group */ + VM_VFS_CACHE_PRESSURE=26, /* dcache/icache reclaim pressure */ }; diff --git a/include/linux/wait.h b/include/linux/wait.h index 4a9f996bb6cc..e0f2b2ffc16f 100644 --- a/include/linux/wait.h +++ b/include/linux/wait.h @@ -120,18 +120,15 @@ extern void FASTCALL(__wake_up_sync(wait_queue_head_t *q, unsigned int mode, int #define __wait_event(wq, condition) \ do { \ - wait_queue_t __wait; \ - init_waitqueue_entry(&__wait, current); \ + DEFINE_WAIT(__wait); \ \ - add_wait_queue(&wq, &__wait); \ for (;;) { \ - set_current_state(TASK_UNINTERRUPTIBLE); \ + prepare_to_wait(&wq, &__wait, TASK_UNINTERRUPTIBLE); \ if (condition) \ break; \ schedule(); \ } \ - current->state = TASK_RUNNING; \ - remove_wait_queue(&wq, &__wait); \ + finish_wait(&wq, &__wait); \ } while (0) #define wait_event(wq, condition) \ @@ -143,12 +140,10 @@ do { \ #define __wait_event_interruptible(wq, condition, ret) \ do { \ - wait_queue_t __wait; \ - init_waitqueue_entry(&__wait, current); \ + DEFINE_WAIT(__wait); \ \ - add_wait_queue(&wq, &__wait); \ for (;;) { \ - set_current_state(TASK_INTERRUPTIBLE); \ + prepare_to_wait(&wq, &__wait, TASK_INTERRUPTIBLE); \ if (condition) \ break; \ if (!signal_pending(current)) { \ @@ -158,8 +153,7 @@ do { \ ret = -ERESTARTSYS; \ break; \ } \ - current->state = TASK_RUNNING; \ - remove_wait_queue(&wq, &__wait); \ + finish_wait(&wq, &__wait); \ } while (0) #define wait_event_interruptible(wq, condition) \ @@ -172,12 +166,10 @@ do { \ #define __wait_event_interruptible_timeout(wq, condition, ret) \ do { \ - wait_queue_t __wait; \ - init_waitqueue_entry(&__wait, current); \ + DEFINE_WAIT(__wait); \ \ - add_wait_queue(&wq, &__wait); \ for (;;) { \ - set_current_state(TASK_INTERRUPTIBLE); \ + prepare_to_wait(&wq, &__wait, TASK_INTERRUPTIBLE); \ if (condition) \ break; \ if (!signal_pending(current)) { \ @@ -189,8 +181,7 @@ do { \ ret = -ERESTARTSYS; \ break; \ } \ - current->state = TASK_RUNNING; \ - remove_wait_queue(&wq, &__wait); \ + finish_wait(&wq, &__wait); \ } while (0) #define wait_event_interruptible_timeout(wq, condition, timeout) \ @@ -203,12 +194,11 @@ do { \ #define __wait_event_interruptible_exclusive(wq, condition, ret) \ do { \ - wait_queue_t __wait; \ - init_waitqueue_entry(&__wait, current); \ + DEFINE_WAIT(__wait); \ \ - add_wait_queue_exclusive(&wq, &__wait); \ for (;;) { \ - set_current_state(TASK_INTERRUPTIBLE); \ + prepare_to_wait_exclusive(&wq, &__wait, \ + TASK_INTERRUPTIBLE); \ if (condition) \ break; \ if (!signal_pending(current)) { \ @@ -218,8 +208,7 @@ do { \ ret = -ERESTARTSYS; \ break; \ } \ - current->state = TASK_RUNNING; \ - remove_wait_queue(&wq, &__wait); \ + finish_wait(&wq, &__wait); \ } while (0) #define wait_event_interruptible_exclusive(wq, condition) \ diff --git a/include/net/dst.h b/include/net/dst.h index ed2504c6b4e9..543ff945bb2f 100644 --- a/include/net/dst.h +++ b/include/net/dst.h @@ -183,6 +183,12 @@ static inline void dst_free(struct dst_entry * dst) __dst_free(dst); } +static inline void dst_rcu_free(struct rcu_head *head) +{ + struct dst_entry *dst = container_of(head, struct dst_entry, rcu_head); + dst_free(dst); +} + static inline void dst_confirm(struct dst_entry *dst) { if (dst) diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index abba7b4194b7..21af949cfa58 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -64,7 +64,7 @@ struct scsi_host_template { * * Status: OPTIONAL */ - int (* ioctl)(struct scsi_device *dev, int cmd, void *arg); + int (* ioctl)(struct scsi_device *dev, int cmd, void __user *arg); /* * The queuecommand function is used to queue up a scsi diff --git a/init/Kconfig b/init/Kconfig index 9b727727bcb1..78ee0b3401a2 100644 --- a/init/Kconfig +++ b/init/Kconfig @@ -209,26 +209,20 @@ config IKCONFIG bool "Kernel .config support" ---help--- This option enables the complete Linux kernel ".config" file - contents, information on compiler used to build the kernel, - kernel running when this kernel was built and kernel version - from Makefile to be saved in the kernel. It provides documentation + contents to be saved in the kernel. It provides documentation of which kernel options are used in a running kernel or in an on-disk kernel. This information can be extracted from the kernel image file with the script scripts/extract-ikconfig and used as input to rebuild the current kernel or to build another kernel. It can also be extracted from a running kernel by reading - /proc/config.gz and /proc/config_built_with, if enabled (below). - /proc/config.gz will list the configuration that was used - to build the kernel and /proc/config_built_with will list - information on the compiler and host machine that was used to - build the kernel. + /proc/config.gz if enabled (below). config IKCONFIG_PROC bool "Enable access to .config through /proc/config.gz" depends on IKCONFIG && PROC_FS ---help--- - This option enables access to kernel configuration file and build - information through /proc/config.gz. + This option enables access to the kernel configuration file + through /proc/config.gz. menuconfig EMBEDDED diff --git a/init/main.c b/init/main.c index 1e58b66b2144..4d99b928aeb4 100644 --- a/init/main.c +++ b/init/main.c @@ -111,6 +111,9 @@ extern void time_init(void); void (*late_time_init)(void); extern void softirq_init(void); +/* Untouched command line (eg. for /proc) saved by arch-specific code. */ +char saved_command_line[COMMAND_LINE_SIZE]; + static char *execute_command; /* Setup configured maximum number of CPUs to activate */ @@ -157,8 +160,14 @@ static int __init obsolete_checksetup(char *line) do { int n = strlen(p->str); if (!strncmp(line, p->str, n)) { - if (!p->setup_func) { - printk(KERN_WARNING "Parameter %s is obsolete, ignored\n", p->str); + if (p->early) { + /* Already done in parse_early_param? (Needs + * exact match on param part) */ + if (line[n] == '\0' || line[n] == '=') + return 1; + } else if (!p->setup_func) { + printk(KERN_WARNING "Parameter %s is obsolete," + " ignored\n", p->str); return 1; } else if (p->setup_func(line + n)) return 1; @@ -393,6 +402,38 @@ static void noinline rest_init(void) cpu_idle(); } +/* Check for early params. */ +static int __init do_early_param(char *param, char *val) +{ + struct obs_kernel_param *p; + extern struct obs_kernel_param __setup_start, __setup_end; + + for (p = &__setup_start; p < &__setup_end; p++) { + if (p->early && strcmp(param, p->str) == 0) { + if (p->setup_func(val) != 0) + printk(KERN_WARNING + "Malformed early option '%s'\n", param); + } + } + /* We accept everything at this stage. */ + return 0; +} + +/* Arch code calls this early on, or if not, just before other parsing. */ +void __init parse_early_param(void) +{ + static __initdata int done = 0; + static __initdata char tmp_cmdline[COMMAND_LINE_SIZE]; + + if (done) + return; + + /* All fall through to do_early_param. */ + strlcpy(tmp_cmdline, saved_command_line, COMMAND_LINE_SIZE); + parse_args("early options", tmp_cmdline, NULL, 0, do_early_param); + done = 1; +} + /* * Activate the first processor. */ @@ -400,7 +441,6 @@ static void noinline rest_init(void) asmlinkage void __init start_kernel(void) { char * command_line; - extern char saved_command_line[]; extern struct kernel_param __start___param[], __stop___param[]; /* * Interrupts are still disabled. Do necessary setups, then @@ -428,6 +468,7 @@ asmlinkage void __init start_kernel(void) build_all_zonelists(); page_alloc_init(); printk("Kernel command line: %s\n", saved_command_line); + parse_early_param(); parse_args("Booting kernel", command_line, __start___param, __stop___param - __start___param, &unknown_bootoption); @@ -676,3 +717,16 @@ static int init(void * unused) panic("No init found. Try passing init= option to kernel."); } + +static int early_param_test(char *rest) +{ + printk("early_parm_test: %s\n", rest ?: "(null)"); + return rest ? 0 : -EINVAL; +} +early_param("testsetup", early_param_test); +static int early_setup_test(char *rest) +{ + printk("early_setup_test: %s\n", rest ?: "(null)"); + return 0; +} +__setup("testsetup_long", early_setup_test); diff --git a/ipc/util.c b/ipc/util.c index 81a145eded63..727c33233f5f 100644 --- a/ipc/util.c +++ b/ipc/util.c @@ -333,25 +333,40 @@ void* ipc_rcu_alloc(int size) * Since RCU callback function is called in bh, * we need to defer the vfree to schedule_work */ -static void ipc_schedule_free(void* arg) +static void ipc_schedule_free(struct rcu_head *head) { - struct ipc_rcu_vmalloc *free = arg; + struct ipc_rcu_vmalloc *free = + container_of(head, struct ipc_rcu_vmalloc, rcu); INIT_WORK(&free->work, vfree, free); schedule_work(&free->work); } +/** + * ipc_immediate_free - free ipc + rcu space + * + * Free from the RCU callback context + * + */ +static void ipc_immediate_free(struct rcu_head *head) +{ + struct ipc_rcu_kmalloc *free = + container_of(head, struct ipc_rcu_kmalloc, rcu); + kfree(free); +} + + + void ipc_rcu_free(void* ptr, int size) { if (rcu_use_vmalloc(size)) { struct ipc_rcu_vmalloc *free; free = ptr - sizeof(*free); - call_rcu(&free->rcu, ipc_schedule_free, free); + call_rcu(&free->rcu, ipc_schedule_free); } else { struct ipc_rcu_kmalloc *free; free = ptr - sizeof(*free); - /* kfree takes a "const void *" so gcc warns. So we cast. */ - call_rcu(&free->rcu, (void (*)(void *))kfree, free); + call_rcu(&free->rcu, ipc_immediate_free); } } diff --git a/kernel/Makefile b/kernel/Makefile index 2b7b352b1a38..47f98594e9e5 100644 --- a/kernel/Makefile +++ b/kernel/Makefile @@ -33,23 +33,7 @@ ifneq ($(CONFIG_IA64),y) CFLAGS_sched.o := $(PROFILING) -fno-omit-frame-pointer endif -# configs.o uses generated files - dependecies must be listed explicitly -$(obj)/configs.o: $(obj)/ikconfig.h - -ifdef CONFIG_IKCONFIG_PROC $(obj)/configs.o: $(obj)/config_data.h -endif - -# ikconfig.h contains all the selected config entries - generated -# from top-level Makefile and .config. Info from ikconfig.h can -# be extracted from the kernel binary. - -quiet_cmd_ikconfig = IKCFG $@ - cmd_ikconfig = $(CONFIG_SHELL) $< .config $(srctree)/Makefile > $@ - -targets += ikconfig.h -$(obj)/ikconfig.h: scripts/mkconfigs .config $(srctree)/Makefile FORCE - $(call if_changed,ikconfig) # config_data.h contains the same information as ikconfig.h but gzipped. # Info from config_data can be extracted from /proc/config* @@ -58,7 +42,7 @@ $(obj)/config_data.gz: .config FORCE $(call if_changed,gzip) quiet_cmd_ikconfiggz = IKCFG $@ - cmd_ikconfiggz = cat $< | scripts/bin2c kernel_config_data > $@ + cmd_ikconfiggz = (echo "const char kernel_config_data[] = MAGIC_START"; cat $< | scripts/bin2c; echo "MAGIC_END;") > $@ targets += config_data.h $(obj)/config_data.h: $(obj)/config_data.gz FORCE $(call if_changed,ikconfiggz) diff --git a/kernel/auditsc.c b/kernel/auditsc.c index 342b57141fd9..e688c73f6a9e 100644 --- a/kernel/auditsc.c +++ b/kernel/auditsc.c @@ -177,9 +177,10 @@ static inline int audit_add_rule(struct audit_entry *entry, return 0; } -static void audit_free_rule(void *arg) +static void audit_free_rule(struct rcu_head *head) { - kfree(arg); + struct audit_entry *e = container_of(head, struct audit_entry, rcu); + kfree(e); } /* Note that audit_add_rule and audit_del_rule are called via @@ -195,7 +196,7 @@ static inline int audit_del_rule(struct audit_rule *rule, list_for_each_entry(e, list, list) { if (!audit_compare_rule(rule, &e->rule)) { list_del_rcu(&e->list); - call_rcu(&e->rcu, audit_free_rule, e); + call_rcu(&e->rcu, audit_free_rule); return 0; } } diff --git a/kernel/configs.c b/kernel/configs.c index 326ab7b214f6..d18a944ad249 100644 --- a/kernel/configs.c +++ b/kernel/configs.c @@ -34,13 +34,26 @@ /**************************************************/ /* the actual current config file */ -/* This one is for extraction from the kernel binary file image. */ -#include "ikconfig.h" +/* + * Define kernel_config_data and kernel_config_data_size, which contains the + * wrapped and compressed configuration file. The file is first compressed + * with gzip and then bounded by two eight byte magic numbers to allow + * extraction from a binary kernel image: + * + * IKCFG_ST + * <image> + * IKCFG_ED + */ +#define MAGIC_START "IKCFG_ST" +#define MAGIC_END "IKCFG_ED" +#include "config_data.h" -#ifdef CONFIG_IKCONFIG_PROC -/* This is the data that can be read from /proc/config.gz. */ -#include "config_data.h" +#define MAGIC_SIZE (sizeof(MAGIC_START) - 1) +#define kernel_config_data_size \ + (sizeof(kernel_config_data) - 1 - MAGIC_SIZE * 2) + +#ifdef CONFIG_IKCONFIG_PROC /**************************************************/ /* globals and useful constants */ @@ -58,7 +71,7 @@ ikconfig_read_current(struct file *file, char __user *buf, return 0; count = min(len, (size_t)(kernel_config_data_size - pos)); - if(copy_to_user(buf, kernel_config_data + pos, count)) + if (copy_to_user(buf, kernel_config_data + MAGIC_SIZE + pos, count)) return -EFAULT; *offset += count; diff --git a/kernel/cpu.c b/kernel/cpu.c index 72b984c67eb3..083521327e64 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c @@ -20,14 +20,6 @@ DECLARE_MUTEX(cpucontrol); static struct notifier_block *cpu_chain; -/* - * Represents all cpu's present in the system - * In systems capable of hotplug, this map could dynamically grow - * as new cpu's are detected in the system via any platform specific - * method, such as ACPI for e.g. - */ -cpumask_t cpu_present_map; -EXPORT_SYMBOL(cpu_present_map); /* Need to know about CPUs going up/down? */ int register_cpu_notifier(struct notifier_block *nb) diff --git a/kernel/kmod.c b/kernel/kmod.c index ea62192b7597..579269c38a3b 100644 --- a/kernel/kmod.c +++ b/kernel/kmod.c @@ -154,7 +154,6 @@ static int ____call_usermodehelper(void *data) { struct subprocess_info *sub_info = data; int retval; - cpumask_t mask = CPU_MASK_ALL; /* Unblock all signals. */ flush_signals(current); @@ -165,7 +164,7 @@ static int ____call_usermodehelper(void *data) spin_unlock_irq(¤t->sighand->siglock); /* We can run anywhere, unlike our parent keventd(). */ - set_cpus_allowed(current, mask); + set_cpus_allowed(current, CPU_MASK_ALL); retval = -EPERM; if (current->fs->root) diff --git a/kernel/kthread.c b/kernel/kthread.c index da0ec5b25cdf..5689ebb1a250 100644 --- a/kernel/kthread.c +++ b/kernel/kthread.c @@ -65,7 +65,6 @@ static int kthread(void *_create) void *data; sigset_t blocked; int ret = -EINTR; - cpumask_t mask = CPU_MASK_ALL; kthread_exit_files(); @@ -79,7 +78,7 @@ static int kthread(void *_create) flush_signals(current); /* By default we can run anywhere, unlike keventd. */ - set_cpus_allowed(current, mask); + set_cpus_allowed(current, CPU_MASK_ALL); /* OK, tell user we're spawned, wait for stop or wakeup */ __set_current_state(TASK_INTERRUPTIBLE); diff --git a/kernel/power/process.c b/kernel/power/process.c index 347435415eaf..0d1f63ec7287 100644 --- a/kernel/power/process.c +++ b/kernel/power/process.c @@ -109,7 +109,6 @@ void thaw_processes(void) wake_up_process(p); } else printk(KERN_INFO " Strange, %s not stopped\n", p->comm ); - wake_up_process(p); } while_each_thread(g, p); read_unlock(&tasklist_lock); diff --git a/kernel/rcupdate.c b/kernel/rcupdate.c index 13a1b5a5825f..f35f944abe3d 100644 --- a/kernel/rcupdate.c +++ b/kernel/rcupdate.c @@ -47,8 +47,17 @@ /* Definition for rcupdate control block. */ struct rcu_ctrlblk rcu_ctrlblk = - { .mutex = SPIN_LOCK_UNLOCKED, .curbatch = 1, - .maxbatch = 1, .rcu_cpu_mask = CPU_MASK_NONE }; + { .cur = -300, .completed = -300 , .lock = SEQCNT_ZERO }; + +/* Bookkeeping of the progress of the grace period */ +struct { + spinlock_t mutex; /* Guard this struct and writes to rcu_ctrlblk */ + cpumask_t rcu_cpu_mask; /* CPUs that need to switch in order */ + /* for current batch to proceed. */ +} rcu_state ____cacheline_maxaligned_in_smp = + {.mutex = SPIN_LOCK_UNLOCKED, .rcu_cpu_mask = CPU_MASK_NONE }; + + DEFINE_PER_CPU(struct rcu_data, rcu_data) = { 0L }; /* Fake initialization required by compiler */ @@ -59,23 +68,24 @@ static DEFINE_PER_CPU(struct tasklet_struct, rcu_tasklet) = {NULL}; * call_rcu - Queue an RCU update request. * @head: structure to be used for queueing the RCU updates. * @func: actual update function to be invoked after the grace period - * @arg: argument to be passed to the update function * * The update function will be invoked as soon as all CPUs have performed * a context switch or been seen in the idle loop or in a user process. * The read-side of critical section that use call_rcu() for updation must * be protected by rcu_read_lock()/rcu_read_unlock(). */ -void fastcall call_rcu(struct rcu_head *head, void (*func)(void *arg), void *arg) +void fastcall call_rcu(struct rcu_head *head, + void (*func)(struct rcu_head *rcu)) { int cpu; unsigned long flags; head->func = func; - head->arg = arg; + head->next = NULL; local_irq_save(flags); cpu = smp_processor_id(); - list_add_tail(&head->list, &RCU_nxtlist(cpu)); + *RCU_nxttail(cpu) = head; + RCU_nxttail(cpu) = &head->next; local_irq_restore(flags); } @@ -83,39 +93,70 @@ void fastcall call_rcu(struct rcu_head *head, void (*func)(void *arg), void *arg * Invoke the completed RCU callbacks. They are expected to be in * a per-cpu list. */ -static void rcu_do_batch(struct list_head *list) +static void rcu_do_batch(struct rcu_head *list) { - struct list_head *entry; - struct rcu_head *head; + struct rcu_head *next; - while (!list_empty(list)) { - entry = list->next; - list_del(entry); - head = list_entry(entry, struct rcu_head, list); - head->func(head->arg); + while (list) { + next = list->next; + list->func(list); + list = next; } } /* + * Grace period handling: + * The grace period handling consists out of two steps: + * - A new grace period is started. + * This is done by rcu_start_batch. The start is not broadcasted to + * all cpus, they must pick this up by comparing rcu_ctrlblk.cur with + * RCU_quiescbatch(cpu). All cpus are recorded in the + * rcu_state.rcu_cpu_mask bitmap. + * - All cpus must go through a quiescent state. + * Since the start of the grace period is not broadcasted, at least two + * calls to rcu_check_quiescent_state are required: + * The first call just notices that a new grace period is running. The + * following calls check if there was a quiescent state since the beginning + * of the grace period. If so, it updates rcu_state.rcu_cpu_mask. If + * the bitmap is empty, then the grace period is completed. + * rcu_check_quiescent_state calls rcu_start_batch(0) to start the next grace + * period (if necessary). + */ +/* * Register a new batch of callbacks, and start it up if there is currently no * active batch and the batch to be registered has not already occurred. - * Caller must hold the rcu_ctrlblk lock. + * Caller must hold rcu_state.mutex. */ -static void rcu_start_batch(long newbatch) +static void rcu_start_batch(int next_pending) { - cpumask_t active; - - if (rcu_batch_before(rcu_ctrlblk.maxbatch, newbatch)) { - rcu_ctrlblk.maxbatch = newbatch; + if (next_pending) + rcu_ctrlblk.next_pending = 1; + + if (rcu_ctrlblk.next_pending && + rcu_ctrlblk.completed == rcu_ctrlblk.cur) { + /* Can't change, since spin lock held. */ + cpus_andnot(rcu_state.rcu_cpu_mask, cpu_online_map, + nohz_cpu_mask); + write_seqcount_begin(&rcu_ctrlblk.lock); + rcu_ctrlblk.next_pending = 0; + rcu_ctrlblk.cur++; + write_seqcount_end(&rcu_ctrlblk.lock); } - if (rcu_batch_before(rcu_ctrlblk.maxbatch, rcu_ctrlblk.curbatch) || - !cpus_empty(rcu_ctrlblk.rcu_cpu_mask)) { - return; +} + +/* + * cpu went through a quiescent state since the beginning of the grace period. + * Clear it from the cpu mask and complete the grace period if it was the last + * cpu. Start another grace period if someone has further entries pending + */ +static void cpu_quiet(int cpu) +{ + cpu_clear(cpu, rcu_state.rcu_cpu_mask); + if (cpus_empty(rcu_state.rcu_cpu_mask)) { + /* batch completed ! */ + rcu_ctrlblk.completed = rcu_ctrlblk.cur; + rcu_start_batch(0); } - /* Can't change, since spin lock held. */ - active = nohz_cpu_mask; - cpus_complement(active); - cpus_and(rcu_ctrlblk.rcu_cpu_mask, cpu_online_map, active); } /* @@ -127,7 +168,19 @@ static void rcu_check_quiescent_state(void) { int cpu = smp_processor_id(); - if (!cpu_isset(cpu, rcu_ctrlblk.rcu_cpu_mask)) + if (RCU_quiescbatch(cpu) != rcu_ctrlblk.cur) { + /* new grace period: record qsctr value. */ + RCU_qs_pending(cpu) = 1; + RCU_last_qsctr(cpu) = RCU_qsctr(cpu); + RCU_quiescbatch(cpu) = rcu_ctrlblk.cur; + return; + } + + /* Grace period already completed for this cpu? + * qs_pending is checked instead of the actual bitmap to avoid + * cacheline trashing. + */ + if (!RCU_qs_pending(cpu)) return; /* @@ -135,27 +188,19 @@ static void rcu_check_quiescent_state(void) * we may miss one quiescent state of that CPU. That is * tolerable. So no need to disable interrupts. */ - if (RCU_last_qsctr(cpu) == RCU_QSCTR_INVALID) { - RCU_last_qsctr(cpu) = RCU_qsctr(cpu); - return; - } if (RCU_qsctr(cpu) == RCU_last_qsctr(cpu)) return; + RCU_qs_pending(cpu) = 0; - spin_lock(&rcu_ctrlblk.mutex); - if (!cpu_isset(cpu, rcu_ctrlblk.rcu_cpu_mask)) - goto out_unlock; - - cpu_clear(cpu, rcu_ctrlblk.rcu_cpu_mask); - RCU_last_qsctr(cpu) = RCU_QSCTR_INVALID; - if (!cpus_empty(rcu_ctrlblk.rcu_cpu_mask)) - goto out_unlock; - - rcu_ctrlblk.curbatch++; - rcu_start_batch(rcu_ctrlblk.maxbatch); + spin_lock(&rcu_state.mutex); + /* + * RCU_quiescbatch/batch.cur and the cpu bitmap can come out of sync + * during cpu startup. Ignore the quiescent state. + */ + if (likely(RCU_quiescbatch(cpu) == rcu_ctrlblk.cur)) + cpu_quiet(cpu); -out_unlock: - spin_unlock(&rcu_ctrlblk.mutex); + spin_unlock(&rcu_state.mutex); } @@ -185,25 +230,11 @@ static void rcu_offline_cpu(int cpu) * we can block indefinitely waiting for it, so flush * it here */ - spin_lock_irq(&rcu_ctrlblk.mutex); - if (cpus_empty(rcu_ctrlblk.rcu_cpu_mask)) - goto unlock; - - cpu_clear(cpu, rcu_ctrlblk.rcu_cpu_mask); - if (cpus_empty(rcu_ctrlblk.rcu_cpu_mask)) { - rcu_ctrlblk.curbatch++; - /* We may avoid calling start batch if - * we are starting the batch only - * because of the DEAD CPU (the current - * CPU will start a new batch anyway for - * the callbacks we will move to current CPU). - * However, we will avoid this optimisation - * for now. - */ - rcu_start_batch(rcu_ctrlblk.maxbatch); - } + spin_lock_bh(&rcu_state.mutex); + if (rcu_ctrlblk.cur != rcu_ctrlblk.completed) + cpu_quiet(cpu); unlock: - spin_unlock_irq(&rcu_ctrlblk.mutex); + spin_unlock_bh(&rcu_state.mutex); rcu_move_batch(&RCU_curlist(cpu)); rcu_move_batch(&RCU_nxtlist(cpu)); @@ -213,39 +244,59 @@ unlock: #endif +void rcu_restart_cpu(int cpu) +{ + spin_lock_bh(&rcu_state.mutex); + RCU_quiescbatch(cpu) = rcu_ctrlblk.completed; + RCU_qs_pending(cpu) = 0; + spin_unlock_bh(&rcu_state.mutex); +} + /* * This does the RCU processing work from tasklet context. */ static void rcu_process_callbacks(unsigned long unused) { int cpu = smp_processor_id(); - LIST_HEAD(list); + struct rcu_head *rcu_list = NULL; - if (!list_empty(&RCU_curlist(cpu)) && - rcu_batch_after(rcu_ctrlblk.curbatch, RCU_batch(cpu))) { - __list_splice(&RCU_curlist(cpu), &list); - INIT_LIST_HEAD(&RCU_curlist(cpu)); + if (RCU_curlist(cpu) && + !rcu_batch_before(rcu_ctrlblk.completed, RCU_batch(cpu))) { + rcu_list = RCU_curlist(cpu); + RCU_curlist(cpu) = NULL; } local_irq_disable(); - if (!list_empty(&RCU_nxtlist(cpu)) && list_empty(&RCU_curlist(cpu))) { - __list_splice(&RCU_nxtlist(cpu), &RCU_curlist(cpu)); - INIT_LIST_HEAD(&RCU_nxtlist(cpu)); + if (RCU_nxtlist(cpu) && !RCU_curlist(cpu)) { + int next_pending, seq; + + RCU_curlist(cpu) = RCU_nxtlist(cpu); + RCU_nxtlist(cpu) = NULL; + RCU_nxttail(cpu) = &RCU_nxtlist(cpu); local_irq_enable(); /* * start the next batch of callbacks */ - spin_lock(&rcu_ctrlblk.mutex); - RCU_batch(cpu) = rcu_ctrlblk.curbatch + 1; - rcu_start_batch(RCU_batch(cpu)); - spin_unlock(&rcu_ctrlblk.mutex); + do { + seq = read_seqcount_begin(&rcu_ctrlblk.lock); + /* determine batch number */ + RCU_batch(cpu) = rcu_ctrlblk.cur + 1; + next_pending = rcu_ctrlblk.next_pending; + } while (read_seqcount_retry(&rcu_ctrlblk.lock, seq)); + + if (!next_pending) { + /* and start it/schedule start if it's a new batch */ + spin_lock(&rcu_state.mutex); + rcu_start_batch(1); + spin_unlock(&rcu_state.mutex); + } } else { local_irq_enable(); } rcu_check_quiescent_state(); - if (!list_empty(&list)) - rcu_do_batch(&list); + if (rcu_list) + rcu_do_batch(rcu_list); } void rcu_check_callbacks(int cpu, int user) @@ -261,8 +312,9 @@ static void __devinit rcu_online_cpu(int cpu) { memset(&per_cpu(rcu_data, cpu), 0, sizeof(struct rcu_data)); tasklet_init(&RCU_tasklet(cpu), rcu_process_callbacks, 0UL); - INIT_LIST_HEAD(&RCU_nxtlist(cpu)); - INIT_LIST_HEAD(&RCU_curlist(cpu)); + RCU_nxttail(cpu) = &RCU_nxtlist(cpu); + RCU_quiescbatch(cpu) = rcu_ctrlblk.completed; + RCU_qs_pending(cpu) = 0; } static int __devinit rcu_cpu_notify(struct notifier_block *self, @@ -302,11 +354,18 @@ void __init rcu_init(void) register_cpu_notifier(&rcu_nb); } +struct rcu_synchronize { + struct rcu_head head; + struct completion completion; +}; /* Because of FASTCALL declaration of complete, we use this wrapper */ -static void wakeme_after_rcu(void *completion) +static void wakeme_after_rcu(struct rcu_head *head) { - complete(completion); + struct rcu_synchronize *rcu; + + rcu = container_of(head, struct rcu_synchronize, head); + complete(&rcu->completion); } /** @@ -315,14 +374,14 @@ static void wakeme_after_rcu(void *completion) */ void synchronize_kernel(void) { - struct rcu_head rcu; - DECLARE_COMPLETION(completion); + struct rcu_synchronize rcu; + init_completion(&rcu.completion); /* Will wake me after RCU finished */ - call_rcu(&rcu, wakeme_after_rcu, &completion); + call_rcu(&rcu.head, wakeme_after_rcu); /* Wait for it */ - wait_for_completion(&completion); + wait_for_completion(&rcu.completion); } diff --git a/kernel/sched.c b/kernel/sched.c index 8f49ba1202c3..9e676db0267b 100644 --- a/kernel/sched.c +++ b/kernel/sched.c @@ -696,10 +696,9 @@ static int wake_idle(int cpu, task_t *p) return cpu; cpus_and(tmp, sd->span, cpu_online_map); - for_each_cpu_mask(i, tmp) { - if (!cpu_isset(i, p->cpus_allowed)) - continue; + cpus_and(tmp, tmp, p->cpus_allowed); + for_each_cpu_mask(i, tmp) { if (idle_cpu(i)) return i; } @@ -2941,6 +2940,21 @@ out_unlock: return retval; } +/* + * Represents all cpu's present in the system + * In systems capable of hotplug, this map could dynamically grow + * as new cpu's are detected in the system via any platform specific + * method, such as ACPI for e.g. + */ + +cpumask_t cpu_present_map; +EXPORT_SYMBOL(cpu_present_map); + +#ifndef CONFIG_SMP +cpumask_t cpu_online_map = CPU_MASK_ALL; +cpumask_t cpu_possible_map = CPU_MASK_ALL; +#endif + /** * sys_sched_getaffinity - get the cpu affinity of a process * @pid: pid of the process @@ -3320,7 +3334,7 @@ int set_cpus_allowed(task_t *p, cpumask_t new_mask) runqueue_t *rq; rq = task_rq_lock(p, &flags); - if (any_online_cpu(new_mask) == NR_CPUS) { + if (!cpus_intersects(new_mask, cpu_online_map)) { ret = -EINVAL; goto out; } @@ -3495,8 +3509,7 @@ static void migrate_all_tasks(int src_cpu) if (dest_cpu == NR_CPUS) dest_cpu = any_online_cpu(tsk->cpus_allowed); if (dest_cpu == NR_CPUS) { - cpus_clear(tsk->cpus_allowed); - cpus_complement(tsk->cpus_allowed); + cpus_setall(tsk->cpus_allowed); dest_cpu = any_online_cpu(tsk->cpus_allowed); /* Don't tell them about moving exiting tasks @@ -3558,6 +3571,7 @@ static int migration_call(struct notifier_block *nfb, unsigned long action, p = kthread_create(migration_thread, hcpu, "migration/%d",cpu); if (IS_ERR(p)) return NOTIFY_BAD; + p->flags |= PF_NOFREEZE; kthread_bind(p, cpu); /* Must be high prio: stop_machine expects to yield to it. */ rq = task_rq_lock(p, &flags); @@ -3812,7 +3826,7 @@ void sched_domain_debug(void) int j; char str[NR_CPUS]; struct sched_group *group = sd->groups; - cpumask_t groupmask, tmp; + cpumask_t groupmask; cpumask_scnprintf(str, NR_CPUS, sd->span); cpus_clear(groupmask); @@ -3842,8 +3856,7 @@ void sched_domain_debug(void) if (!cpus_weight(group->cpumask)) printk(" ERROR empty group:"); - cpus_and(tmp, groupmask, group->cpumask); - if (cpus_weight(tmp) > 0) + if (cpus_intersects(groupmask, group->cpumask)) printk(" ERROR repeated CPUs:"); cpus_or(groupmask, groupmask, group->cpumask); @@ -3862,8 +3875,7 @@ void sched_domain_debug(void) sd = sd->parent; if (sd) { - cpus_and(tmp, groupmask, sd->span); - if (!cpus_equal(tmp, groupmask)) + if (!cpus_subset(groupmask, sd->span)) printk(KERN_DEBUG "ERROR parent span is not a superset of domain->span\n"); } @@ -3902,16 +3914,15 @@ void __init sched_init(void) /* Set up an initial dummy domain for early boot */ static struct sched_domain sched_domain_init; static struct sched_group sched_group_init; - cpumask_t cpu_mask_all = CPU_MASK_ALL; memset(&sched_domain_init, 0, sizeof(struct sched_domain)); - sched_domain_init.span = cpu_mask_all; + sched_domain_init.span = CPU_MASK_ALL; sched_domain_init.groups = &sched_group_init; sched_domain_init.last_balance = jiffies; sched_domain_init.balance_interval = INT_MAX; /* Don't balance */ memset(&sched_group_init, 0, sizeof(struct sched_group)); - sched_group_init.cpumask = cpu_mask_all; + sched_group_init.cpumask = CPU_MASK_ALL; sched_group_init.next = &sched_group_init; sched_group_init.cpu_power = SCHED_LOAD_SCALE; #endif diff --git a/kernel/sysctl.c b/kernel/sysctl.c index 7dca63a88ea2..641727bab22f 100644 --- a/kernel/sysctl.c +++ b/kernel/sysctl.c @@ -39,6 +39,8 @@ #include <linux/initrd.h> #include <linux/times.h> #include <linux/limits.h> +#include <linux/dcache.h> + #include <asm/uaccess.h> #ifdef CONFIG_ROOT_NFS @@ -777,6 +779,16 @@ static ctl_table vm_table[] = { .strategy = &sysctl_intvec, .extra1 = &zero, }, + { + .ctl_name = VM_VFS_CACHE_PRESSURE, + .procname = "vfs_cache_pressure", + .data = &sysctl_vfs_cache_pressure, + .maxlen = sizeof(sysctl_vfs_cache_pressure), + .mode = 0644, + .proc_handler = &proc_dointvec, + .strategy = &sysctl_intvec, + .extra1 = &zero, + }, { .ctl_name = 0 } }; diff --git a/lib/bitmap.c b/lib/bitmap.c index 779d30365e46..7eb16be309b5 100644 --- a/lib/bitmap.c +++ b/lib/bitmap.c @@ -12,7 +12,33 @@ #include <asm/bitops.h> #include <asm/uaccess.h> -int bitmap_empty(const unsigned long *bitmap, int bits) +/* + * bitmaps provide an array of bits, implemented using an an + * array of unsigned longs. The number of valid bits in a + * given bitmap does _not_ need to be an exact multiple of + * BITS_PER_LONG. + * + * The possible unused bits in the last, partially used word + * of a bitmap are 'don't care'. The implementation makes + * no particular effort to keep them zero. It ensures that + * their value will not affect the results of any operation. + * The bitmap operations that return Boolean (bitmap_empty, + * for example) or scalar (bitmap_weight, for example) results + * carefully filter out these unused bits from impacting their + * results. + * + * These operations actually hold to a slightly stronger rule: + * if you don't input any bitmaps to these ops that have some + * unused bits set, then they won't output any set unused bits + * in output bitmaps. + * + * The byte ordering of bitmaps is more natural on little + * endian architectures. See the big-endian headers + * include/asm-ppc64/bitops.h and include/asm-s390/bitops.h + * for the best explanations of this ordering. + */ + +int __bitmap_empty(const unsigned long *bitmap, int bits) { int k, lim = bits/BITS_PER_LONG; for (k = 0; k < lim; ++k) @@ -20,14 +46,14 @@ int bitmap_empty(const unsigned long *bitmap, int bits) return 0; if (bits % BITS_PER_LONG) - if (bitmap[k] & ((1UL << (bits % BITS_PER_LONG)) - 1)) + if (bitmap[k] & BITMAP_LAST_WORD_MASK(bits)) return 0; return 1; } -EXPORT_SYMBOL(bitmap_empty); +EXPORT_SYMBOL(__bitmap_empty); -int bitmap_full(const unsigned long *bitmap, int bits) +int __bitmap_full(const unsigned long *bitmap, int bits) { int k, lim = bits/BITS_PER_LONG; for (k = 0; k < lim; ++k) @@ -35,15 +61,15 @@ int bitmap_full(const unsigned long *bitmap, int bits) return 0; if (bits % BITS_PER_LONG) - if (~bitmap[k] & ((1UL << (bits % BITS_PER_LONG)) - 1)) + if (~bitmap[k] & BITMAP_LAST_WORD_MASK(bits)) return 0; return 1; } -EXPORT_SYMBOL(bitmap_full); +EXPORT_SYMBOL(__bitmap_full); -int bitmap_equal(const unsigned long *bitmap1, - unsigned long *bitmap2, int bits) +int __bitmap_equal(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) { int k, lim = bits/BITS_PER_LONG; for (k = 0; k < lim; ++k) @@ -51,26 +77,26 @@ int bitmap_equal(const unsigned long *bitmap1, return 0; if (bits % BITS_PER_LONG) - if ((bitmap1[k] ^ bitmap2[k]) & - ((1UL << (bits % BITS_PER_LONG)) - 1)) + if ((bitmap1[k] ^ bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits)) return 0; return 1; } -EXPORT_SYMBOL(bitmap_equal); +EXPORT_SYMBOL(__bitmap_equal); -void bitmap_complement(unsigned long *bitmap, int bits) +void __bitmap_complement(unsigned long *dst, const unsigned long *src, int bits) { - int k; - int nr = BITS_TO_LONGS(bits); + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + dst[k] = ~src[k]; - for (k = 0; k < nr; ++k) - bitmap[k] = ~bitmap[k]; + if (bits % BITS_PER_LONG) + dst[k] = ~src[k] & BITMAP_LAST_WORD_MASK(bits); } -EXPORT_SYMBOL(bitmap_complement); +EXPORT_SYMBOL(__bitmap_complement); /* - * bitmap_shift_right - logical right shift of the bits in a bitmap + * __bitmap_shift_right - logical right shift of the bits in a bitmap * @dst - destination bitmap * @src - source bitmap * @nbits - shift by this many bits @@ -80,7 +106,7 @@ EXPORT_SYMBOL(bitmap_complement); * direction. Zeros are fed into the vacated MS positions and the * LS bits shifted off the bottom are lost. */ -void bitmap_shift_right(unsigned long *dst, +void __bitmap_shift_right(unsigned long *dst, const unsigned long *src, int shift, int bits) { int k, lim = BITS_TO_LONGS(bits), left = bits % BITS_PER_LONG; @@ -110,10 +136,11 @@ void bitmap_shift_right(unsigned long *dst, if (off) memset(&dst[lim - off], 0, off*sizeof(unsigned long)); } -EXPORT_SYMBOL(bitmap_shift_right); +EXPORT_SYMBOL(__bitmap_shift_right); + /* - * bitmap_shift_left - logical left shift of the bits in a bitmap + * __bitmap_shift_left - logical left shift of the bits in a bitmap * @dst - destination bitmap * @src - source bitmap * @nbits - shift by this many bits @@ -123,7 +150,8 @@ EXPORT_SYMBOL(bitmap_shift_right); * direction. Zeros are fed into the vacated LS bit positions * and those MS bits shifted off the top are lost. */ -void bitmap_shift_left(unsigned long *dst, + +void __bitmap_shift_left(unsigned long *dst, const unsigned long *src, int shift, int bits) { int k, lim = BITS_TO_LONGS(bits), left = bits % BITS_PER_LONG; @@ -149,9 +177,9 @@ void bitmap_shift_left(unsigned long *dst, if (off) memset(dst, 0, off*sizeof(unsigned long)); } -EXPORT_SYMBOL(bitmap_shift_left); +EXPORT_SYMBOL(__bitmap_shift_left); -void bitmap_and(unsigned long *dst, const unsigned long *bitmap1, +void __bitmap_and(unsigned long *dst, const unsigned long *bitmap1, const unsigned long *bitmap2, int bits) { int k; @@ -160,9 +188,9 @@ void bitmap_and(unsigned long *dst, const unsigned long *bitmap1, for (k = 0; k < nr; k++) dst[k] = bitmap1[k] & bitmap2[k]; } -EXPORT_SYMBOL(bitmap_and); +EXPORT_SYMBOL(__bitmap_and); -void bitmap_or(unsigned long *dst, const unsigned long *bitmap1, +void __bitmap_or(unsigned long *dst, const unsigned long *bitmap1, const unsigned long *bitmap2, int bits) { int k; @@ -171,10 +199,62 @@ void bitmap_or(unsigned long *dst, const unsigned long *bitmap1, for (k = 0; k < nr; k++) dst[k] = bitmap1[k] | bitmap2[k]; } -EXPORT_SYMBOL(bitmap_or); +EXPORT_SYMBOL(__bitmap_or); + +void __bitmap_xor(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k; + int nr = BITS_TO_LONGS(bits); + + for (k = 0; k < nr; k++) + dst[k] = bitmap1[k] ^ bitmap2[k]; +} +EXPORT_SYMBOL(__bitmap_xor); + +void __bitmap_andnot(unsigned long *dst, const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k; + int nr = BITS_TO_LONGS(bits); + + for (k = 0; k < nr; k++) + dst[k] = bitmap1[k] & ~bitmap2[k]; +} +EXPORT_SYMBOL(__bitmap_andnot); + +int __bitmap_intersects(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + if (bitmap1[k] & bitmap2[k]) + return 1; + + if (bits % BITS_PER_LONG) + if ((bitmap1[k] & bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits)) + return 1; + return 0; +} +EXPORT_SYMBOL(__bitmap_intersects); + +int __bitmap_subset(const unsigned long *bitmap1, + const unsigned long *bitmap2, int bits) +{ + int k, lim = bits/BITS_PER_LONG; + for (k = 0; k < lim; ++k) + if (bitmap1[k] & ~bitmap2[k]) + return 0; + + if (bits % BITS_PER_LONG) + if ((bitmap1[k] & ~bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits)) + return 0; + return 1; +} +EXPORT_SYMBOL(__bitmap_subset); #if BITS_PER_LONG == 32 -int bitmap_weight(const unsigned long *bitmap, int bits) +int __bitmap_weight(const unsigned long *bitmap, int bits) { int k, w = 0, lim = bits/BITS_PER_LONG; @@ -182,13 +262,12 @@ int bitmap_weight(const unsigned long *bitmap, int bits) w += hweight32(bitmap[k]); if (bits % BITS_PER_LONG) - w += hweight32(bitmap[k] & - ((1UL << (bits % BITS_PER_LONG)) - 1)); + w += hweight32(bitmap[k] & BITMAP_LAST_WORD_MASK(bits)); return w; } #else -int bitmap_weight(const unsigned long *bitmap, int bits) +int __bitmap_weight(const unsigned long *bitmap, int bits) { int k, w = 0, lim = bits/BITS_PER_LONG; @@ -196,13 +275,12 @@ int bitmap_weight(const unsigned long *bitmap, int bits) w += hweight64(bitmap[k]); if (bits % BITS_PER_LONG) - w += hweight64(bitmap[k] & - ((1UL << (bits % BITS_PER_LONG)) - 1)); + w += hweight64(bitmap[k] & BITMAP_LAST_WORD_MASK(bits)); return w; } #endif -EXPORT_SYMBOL(bitmap_weight); +EXPORT_SYMBOL(__bitmap_weight); /* * Bitmap printing & parsing functions: first version by Bill Irwin, @@ -319,7 +397,7 @@ int bitmap_parse(const char __user *ubuf, unsigned int ubuflen, if (nchunks == 0 && chunk == 0) continue; - bitmap_shift_left(maskp, maskp, CHUNKSZ, nmaskbits); + __bitmap_shift_left(maskp, maskp, CHUNKSZ, nmaskbits); *maskp |= chunk; nchunks++; nbits += (nchunks == 1) ? nbits_to_hold_value(chunk) : CHUNKSZ; diff --git a/mm/hugetlb.c b/mm/hugetlb.c index bce0d47a42a2..3dd936d1e7dd 100644 --- a/mm/hugetlb.c +++ b/mm/hugetlb.c @@ -130,27 +130,25 @@ static void update_and_free_page(struct page *page) } #ifdef CONFIG_HIGHMEM -static int try_to_free_low(unsigned long count) +static void try_to_free_low(unsigned long count) { int i; for (i = 0; i < MAX_NUMNODES; ++i) { - struct page *page; - list_for_each_entry(page, &hugepage_freelists[i], lru) { + struct page *page, *next; + list_for_each_entry_safe(page, next, &hugepage_freelists[i], lru) { if (PageHighMem(page)) continue; list_del(&page->lru); update_and_free_page(page); --free_huge_pages; - if (!--count) - return 0; + if (count >= nr_huge_pages) + return; } } - return count; } #else -static inline int try_to_free_low(unsigned long count) +static inline void try_to_free_low(unsigned long count) { - return count; } #endif @@ -170,7 +168,8 @@ static unsigned long set_max_huge_pages(unsigned long count) return nr_huge_pages; spin_lock(&hugetlb_lock); - for (count = try_to_free_low(count); count < nr_huge_pages; --free_huge_pages) { + try_to_free_low(count); + for (; count < nr_huge_pages; --free_huge_pages) { struct page *page = dequeue_huge_page(); if (!page) break; diff --git a/mm/memory.c b/mm/memory.c index 3df1f05e76b8..a91e3837fcaf 100644 --- a/mm/memory.c +++ b/mm/memory.c @@ -407,7 +407,7 @@ static void zap_pte_range(struct mmu_gather *tlb, set_pte(ptep, pgoff_to_pte(page->index)); if (pte_dirty(pte)) set_page_dirty(page); - if (pte_young(pte) && page_mapping(page)) + if (pte_young(pte) && !PageAnon(page)) mark_page_accessed(page); tlb->freed++; page_remove_rmap(page); @@ -718,19 +718,24 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, pte_t *pte; if (write) /* user gate pages are read-only */ return i ? : -EFAULT; - pgd = pgd_offset_k(pg); + pgd = pgd_offset(mm, pg); if (!pgd) return i ? : -EFAULT; pmd = pmd_offset(pgd, pg); if (!pmd) return i ? : -EFAULT; - pte = pte_offset_kernel(pmd, pg); - if (!pte || !pte_present(*pte)) + pte = pte_offset_map(pmd, pg); + if (!pte) return i ? : -EFAULT; + if (!pte_present(*pte)) { + pte_unmap(pte); + return i ? : -EFAULT; + } if (pages) { pages[i] = pte_page(*pte); get_page(pages[i]); } + pte_unmap(pte); if (vmas) vmas[i] = gate_vma; i++; diff --git a/mm/mempolicy.c b/mm/mempolicy.c index 4f1fc840550a..d06eabbf74f0 100644 --- a/mm/mempolicy.c +++ b/mm/mempolicy.c @@ -93,14 +93,12 @@ static struct mempolicy default_policy = { /* Check if all specified nodes are online */ static int nodes_online(unsigned long *nodes) { - DECLARE_BITMAP(offline, MAX_NUMNODES); - - bitmap_copy(offline, node_online_map, MAX_NUMNODES); - if (bitmap_empty(offline, MAX_NUMNODES)) - set_bit(0, offline); - bitmap_complement(offline, MAX_NUMNODES); - bitmap_and(offline, offline, nodes, MAX_NUMNODES); - if (!bitmap_empty(offline, MAX_NUMNODES)) + DECLARE_BITMAP(online2, MAX_NUMNODES); + + bitmap_copy(online2, node_online_map, MAX_NUMNODES); + if (bitmap_empty(online2, MAX_NUMNODES)) + set_bit(0, online2); + if (!bitmap_subset(nodes, online2, MAX_NUMNODES)) return -EINVAL; return 0; } diff --git a/mm/oom_kill.c b/mm/oom_kill.c index 203923cbe15f..a902e51315a7 100644 --- a/mm/oom_kill.c +++ b/mm/oom_kill.c @@ -230,12 +230,6 @@ void out_of_memory(void) static unsigned long first, last, count, lastkill; unsigned long now, since; - /* - * Enough swap space left? Not OOM. - */ - if (nr_swap_pages > 0) - return; - spin_lock(&oom_lock); now = jiffies; since = now - last; diff --git a/mm/page_alloc.c b/mm/page_alloc.c index 16d5c2af94ee..fe55c14bd4dc 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c @@ -38,7 +38,7 @@ DECLARE_BITMAP(node_online_map, MAX_NUMNODES); struct pglist_data *pgdat_list; unsigned long totalram_pages; unsigned long totalhigh_pages; -int nr_swap_pages; +long nr_swap_pages; int numnodes = 1; int sysctl_lower_zone_protection = 0; @@ -293,6 +293,20 @@ void __free_pages_ok(struct page *page, unsigned int order) #define MARK_USED(index, order, area) \ __change_bit((index) >> (1+(order)), (area)->map) +/* + * The order of subdivision here is critical for the IO subsystem. + * Please do not alter this order without good reasons and regression + * testing. Specifically, as large blocks of memory are subdivided, + * the order in which smaller blocks are delivered depends on the order + * they're subdivided in this function. This is the primary factor + * influencing the order in which pages are delivered to the IO + * subsystem according to empirical testing, and this is also justified + * by considering the behavior of a buddy system containing a single + * large block of memory acted on by a series of small allocations. + * This behavior is a critical factor in sglist merging's success. + * + * -- wli + */ static inline struct page * expand(struct zone *zone, struct page *page, unsigned long index, int low, int high, struct free_area *area) @@ -300,14 +314,12 @@ expand(struct zone *zone, struct page *page, unsigned long size = 1 << high; while (high > low) { - BUG_ON(bad_range(zone, page)); area--; high--; size >>= 1; - list_add(&page->lru, &area->free_list); - MARK_USED(index, high, area); - index += size; - page += size; + BUG_ON(bad_range(zone, &page[size])); + list_add(&page[size].lru, &area->free_list); + MARK_USED(index + size, high, area); } return page; } @@ -1482,8 +1494,8 @@ static void __init free_area_init_core(struct pglist_data *pgdat, zone_names[j], realsize, batch); INIT_LIST_HEAD(&zone->active_list); INIT_LIST_HEAD(&zone->inactive_list); - atomic_set(&zone->nr_scan_active, 0); - atomic_set(&zone->nr_scan_inactive, 0); + zone->nr_scan_active = 0; + zone->nr_scan_inactive = 0; zone->nr_active = 0; zone->nr_inactive = 0; if (!size) diff --git a/mm/shmem.c b/mm/shmem.c index 5a6d56a450d8..e59de1a98bda 100644 --- a/mm/shmem.c +++ b/mm/shmem.c @@ -40,6 +40,7 @@ #include <linux/security.h> #include <linux/swapops.h> #include <linux/mempolicy.h> +#include <linux/namei.h> #include <asm/uaccess.h> #include <asm/div64.h> #include <asm/pgtable.h> @@ -1676,51 +1677,45 @@ static int shmem_symlink(struct inode *dir, struct dentry *dentry, const char *s return 0; } -static int shmem_readlink_inline(struct dentry *dentry, char __user *buffer, int buflen) -{ - return vfs_readlink(dentry, buffer, buflen, (const char *)SHMEM_I(dentry->d_inode)); -} - static int shmem_follow_link_inline(struct dentry *dentry, struct nameidata *nd) { - return vfs_follow_link(nd, (const char *)SHMEM_I(dentry->d_inode)); + nd_set_link(nd, (char *)SHMEM_I(dentry->d_inode)); + return 0; } -static int shmem_readlink(struct dentry *dentry, char __user *buffer, int buflen) +static int shmem_follow_link(struct dentry *dentry, struct nameidata *nd) { struct page *page = NULL; int res = shmem_getpage(dentry->d_inode, 0, &page, SGP_READ, NULL); - if (res) - return res; - res = vfs_readlink(dentry, buffer, buflen, kmap(page)); - kunmap(page); - mark_page_accessed(page); - page_cache_release(page); - return res; + nd_set_link(nd, res ? ERR_PTR(res) : kmap(page)); + return 0; } -static int shmem_follow_link(struct dentry *dentry, struct nameidata *nd) +static void shmem_put_link(struct dentry *dentry, struct nameidata *nd) { - struct page *page = NULL; - int res = shmem_getpage(dentry->d_inode, 0, &page, SGP_READ, NULL); - if (res) - return res; - res = vfs_follow_link(nd, kmap(page)); - kunmap(page); - mark_page_accessed(page); - page_cache_release(page); - return res; + if (!IS_ERR(nd_get_link(nd))) { + struct page *page; + + page = find_get_page(dentry->d_inode->i_mapping, 0); + if (!page) + BUG(); + kunmap(page); + mark_page_accessed(page); + page_cache_release(page); + page_cache_release(page); + } } static struct inode_operations shmem_symlink_inline_operations = { - .readlink = shmem_readlink_inline, + .readlink = generic_readlink, .follow_link = shmem_follow_link_inline, }; static struct inode_operations shmem_symlink_inode_operations = { .truncate = shmem_truncate, - .readlink = shmem_readlink, + .readlink = generic_readlink, .follow_link = shmem_follow_link, + .put_link = shmem_put_link, }; static int shmem_parse_options(char *options, int *mode, uid_t *uid, gid_t *gid, unsigned long *blocks, unsigned long *inodes) diff --git a/mm/slab.c b/mm/slab.c index 45c5c0549230..741f6461031f 100644 --- a/mm/slab.c +++ b/mm/slab.c @@ -129,6 +129,10 @@ #define ARCH_KMALLOC_MINALIGN 0 #endif +#ifndef ARCH_KMALLOC_FLAGS +#define ARCH_KMALLOC_FLAGS SLAB_HWCACHE_ALIGN +#endif + /* Legal flag mask for kmem_cache_create(). */ #if DEBUG # define CREATE_MASK (SLAB_DEBUG_INITIAL | SLAB_RED_ZONE | \ @@ -380,12 +384,12 @@ struct kmem_cache_s { * cachep->objsize - 2* BYTES_PER_WORD: redzone word [BYTES_PER_WORD long] * cachep->objsize - 1* BYTES_PER_WORD: last caller address [BYTES_PER_WORD long] */ -static inline int obj_dbghead(kmem_cache_t *cachep) +static int obj_dbghead(kmem_cache_t *cachep) { return cachep->dbghead; } -static inline int obj_reallen(kmem_cache_t *cachep) +static int obj_reallen(kmem_cache_t *cachep) { return cachep->reallen; } @@ -409,30 +413,15 @@ static void **dbg_userword(kmem_cache_t *cachep, void *objp) BUG_ON(!(cachep->flags & SLAB_STORE_USER)); return (void**)(objp+cachep->objsize-BYTES_PER_WORD); } + #else -static inline int obj_dbghead(kmem_cache_t *cachep) -{ - return 0; -} -static inline int obj_reallen(kmem_cache_t *cachep) -{ - return cachep->objsize; -} -static inline unsigned long *dbg_redzone1(kmem_cache_t *cachep, void *objp) -{ - BUG(); - return 0; -} -static inline unsigned long *dbg_redzone2(kmem_cache_t *cachep, void *objp) -{ - BUG(); - return 0; -} -static inline void **dbg_userword(kmem_cache_t *cachep, void *objp) -{ - BUG(); - return 0; -} + +#define obj_dbghead(x) 0 +#define obj_reallen(cachep) (cachep->objsize) +#define dbg_redzone1(cachep, objp) ({BUG(); (unsigned long *)NULL;}) +#define dbg_redzone2(cachep, objp) ({BUG(); (unsigned long *)NULL;}) +#define dbg_userword(cachep, objp) ({BUG(); (void **)NULL;}) + #endif /* @@ -758,7 +747,7 @@ void __init kmem_cache_init(void) * allow tighter packing of the smaller caches. */ sizes->cs_cachep = kmem_cache_create(names->name, sizes->cs_size, ARCH_KMALLOC_MINALIGN, - SLAB_PANIC, NULL, NULL); + (ARCH_KMALLOC_FLAGS | SLAB_PANIC), NULL, NULL); /* Inc off-slab bufctl limit until the ceiling is hit. */ if (!(OFF_SLAB(sizes->cs_cachep))) { @@ -768,7 +757,8 @@ void __init kmem_cache_init(void) sizes->cs_dmacachep = kmem_cache_create(names->name_dma, sizes->cs_size, ARCH_KMALLOC_MINALIGN, - (SLAB_CACHE_DMA | SLAB_PANIC), NULL, NULL); + (ARCH_KMALLOC_FLAGS | SLAB_CACHE_DMA | SLAB_PANIC), + NULL, NULL); sizes++; names++; @@ -874,7 +864,7 @@ static void *kmem_getpages(kmem_cache_t *cachep, int flags, int nodeid) /* * Interface to system's page release. */ -static inline void kmem_freepages(kmem_cache_t *cachep, void *addr) +static void kmem_freepages(kmem_cache_t *cachep, void *addr) { unsigned long i = (1<<cachep->gfporder); struct page *page = virt_to_page(addr); @@ -1116,8 +1106,9 @@ static void slab_destroy (kmem_cache_t *cachep, struct slab *slabp) * %SLAB_NO_REAP - Don't automatically reap this cache when we're under * memory pressure. * - * %SLAB_HWCACHE_ALIGN - This flag has no effect and will be removed soon. - * + * %SLAB_HWCACHE_ALIGN - Align the objects in this cache to a hardware + * cacheline. This can be beneficial if you're counting cycles as closely + * as davem. */ kmem_cache_t * kmem_cache_create (const char *name, size_t size, size_t align, @@ -1407,27 +1398,29 @@ opps: } EXPORT_SYMBOL(kmem_cache_create); -static inline void check_irq_off(void) -{ #if DEBUG +static void check_irq_off(void) +{ BUG_ON(!irqs_disabled()); -#endif } -static inline void check_irq_on(void) +static void check_irq_on(void) { -#if DEBUG BUG_ON(irqs_disabled()); -#endif } -static inline void check_spinlock_acquired(kmem_cache_t *cachep) +static void check_spinlock_acquired(kmem_cache_t *cachep) { #ifdef CONFIG_SMP check_irq_off(); BUG_ON(spin_trylock(&cachep->spinlock)); #endif } +#else +#define check_irq_off() do { } while(0) +#define check_irq_on() do { } while(0) +#define check_spinlock_acquired(x) do { } while(0) +#endif /* * Waits for all CPUs to execute func(). @@ -1590,7 +1583,7 @@ int kmem_cache_destroy (kmem_cache_t * cachep) EXPORT_SYMBOL(kmem_cache_destroy); /* Get the memory for a slab management obj. */ -static inline struct slab* alloc_slabmgmt (kmem_cache_t *cachep, +static struct slab* alloc_slabmgmt (kmem_cache_t *cachep, void *objp, int colour_off, int local_flags) { struct slab *slabp; @@ -1773,15 +1766,16 @@ failed: return 0; } +#if DEBUG + /* * Perform extra freeing checks: * - detect bad pointers. * - POISON/RED_ZONE checking * - destructor calls, for caches with POISON+dtor */ -static inline void kfree_debugcheck(const void *objp) +static void kfree_debugcheck(const void *objp) { -#if DEBUG struct page *page; if (!virt_addr_valid(objp)) { @@ -1794,12 +1788,10 @@ static inline void kfree_debugcheck(const void *objp) printk(KERN_ERR "kfree_debugcheck: bad ptr %lxh.\n", (unsigned long)objp); BUG(); } -#endif } -static inline void *cache_free_debugcheck (kmem_cache_t * cachep, void * objp, void *caller) +static void *cache_free_debugcheck (kmem_cache_t * cachep, void * objp, void *caller) { -#if DEBUG struct page *page; unsigned int objnr; struct slab *slabp; @@ -1861,13 +1853,11 @@ static inline void *cache_free_debugcheck (kmem_cache_t * cachep, void * objp, v poison_obj(cachep, objp, POISON_FREE); #endif } -#endif return objp; } -static inline void check_slabp(kmem_cache_t *cachep, struct slab *slabp) +static void check_slabp(kmem_cache_t *cachep, struct slab *slabp) { -#if DEBUG int i; int entries = 0; @@ -1891,8 +1881,12 @@ bad: printk("\n"); BUG(); } -#endif } +#else +#define kfree_debugcheck(x) do { } while(0) +#define cache_free_debugcheck(x,objp,z) (objp) +#define check_slabp(x,y) do { } while(0) +#endif static void* cache_alloc_refill(kmem_cache_t* cachep, int flags) { @@ -1999,11 +1993,11 @@ cache_alloc_debugcheck_before(kmem_cache_t *cachep, int flags) #endif } -static inline void * +#if DEBUG +static void * cache_alloc_debugcheck_after(kmem_cache_t *cachep, unsigned long flags, void *objp, void *caller) { -#if DEBUG if (!objp) return objp; if (cachep->flags & SLAB_POISON) { @@ -2039,9 +2033,11 @@ cache_alloc_debugcheck_after(kmem_cache_t *cachep, cachep->ctor(objp, cachep, ctor_flags); } -#endif return objp; } +#else +#define cache_alloc_debugcheck_after(a,b,objp,d) (objp) +#endif static inline void * __cache_alloc (kmem_cache_t *cachep, int flags) @@ -2687,7 +2683,7 @@ static void drain_array_locked(kmem_cache_t *cachep, * If we cannot acquire the cache chain semaphore then just give up - we'll * try again next timer interrupt. */ -static inline void cache_reap (void) +static void cache_reap (void) { struct list_head *walk; diff --git a/mm/swapfile.c b/mm/swapfile.c index 6422f1b8d810..714c8339c5f2 100644 --- a/mm/swapfile.c +++ b/mm/swapfile.c @@ -32,7 +32,7 @@ spinlock_t swaplock = SPIN_LOCK_UNLOCKED; unsigned int nr_swapfiles; -int total_swap_pages; +long total_swap_pages; static int swap_overflow; EXPORT_SYMBOL(total_swap_pages); diff --git a/mm/vmscan.c b/mm/vmscan.c index bd852ece0d5b..f142f2f188f6 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c @@ -38,11 +38,52 @@ #include <linux/swapops.h> +/* possible outcome of pageout() */ +typedef enum { + /* failed to write page out, page is locked */ + PAGE_KEEP, + /* move page to the active list, page is locked */ + PAGE_ACTIVATE, + /* page has been sent to the disk successfully, page is unlocked */ + PAGE_SUCCESS, + /* page is clean and locked */ + PAGE_CLEAN, +} pageout_t; + +struct scan_control { + /* Ask refill_inactive_zone, or shrink_cache to scan this many pages */ + unsigned long nr_to_scan; + + /* Incremented by the number of inactive pages that were scanned */ + unsigned long nr_scanned; + + /* Incremented by the number of pages reclaimed */ + unsigned long nr_reclaimed; + + unsigned long nr_mapped; /* From page_state */ + + /* How many pages shrink_cache() should reclaim */ + int nr_to_reclaim; + + /* Ask shrink_caches, or shrink_zone to scan at this priority */ + unsigned int priority; + + /* This context's GFP mask */ + unsigned int gfp_mask; + + int may_writepage; +}; + /* - * From 0 .. 100. Higher means more swappy. + * The list of shrinker callbacks used by to apply pressure to + * ageable caches. */ -int vm_swappiness = 60; -static long total_memory; +struct shrinker { + shrinker_t shrinker; + struct list_head list; + int seeks; /* seeks to recreate an obj */ + long nr; /* objs pending delete */ +}; #define lru_to_page(_head) (list_entry((_head)->prev, struct page, lru)) @@ -66,7 +107,7 @@ static long total_memory; if ((_page)->lru.prev != _base) { \ struct page *prev; \ \ - prev = lru_to_page(&(_page->lru)); \ + prev = lru_to_page(&(_page->lru)); \ prefetchw(&prev->_field); \ } \ } while (0) @@ -75,15 +116,10 @@ static long total_memory; #endif /* - * The list of shrinker callbacks used by to apply pressure to - * ageable caches. + * From 0 .. 100. Higher means more swappy. */ -struct shrinker { - shrinker_t shrinker; - struct list_head list; - int seeks; /* seeks to recreate an obj */ - long nr; /* objs pending delete */ -}; +int vm_swappiness = 60; +static long total_memory; static LIST_HEAD(shrinker_list); static DECLARE_MUTEX(shrinker_sem); @@ -106,7 +142,6 @@ struct shrinker *set_shrinker(int seeks, shrinker_t theshrinker) } return shrinker; } - EXPORT_SYMBOL(set_shrinker); /* @@ -119,7 +154,6 @@ void remove_shrinker(struct shrinker *shrinker) up(&shrinker_sem); kfree(shrinker); } - EXPORT_SYMBOL(remove_shrinker); #define SHRINK_BATCH 128 @@ -239,18 +273,6 @@ static void handle_write_error(struct address_space *mapping, unlock_page(page); } -/* possible outcome of pageout() */ -typedef enum { - /* failed to write page out, page is locked */ - PAGE_KEEP, - /* move page to the active list, page is locked */ - PAGE_ACTIVATE, - /* page has been sent to the disk successfully, page is unlocked */ - PAGE_SUCCESS, - /* page is clean and locked */ - PAGE_CLEAN, -} pageout_t; - /* * pageout is called by shrink_list() for each dirty page. Calls ->writepage(). */ @@ -310,27 +332,6 @@ static pageout_t pageout(struct page *page, struct address_space *mapping) return PAGE_CLEAN; } -struct scan_control { - /* Ask refill_inactive_zone, or shrink_cache to scan this many pages */ - unsigned long nr_to_scan; - - /* Incremented by the number of inactive pages that were scanned */ - unsigned long nr_scanned; - - /* Incremented by the number of pages reclaimed */ - unsigned long nr_reclaimed; - - unsigned long nr_mapped; /* From page_state */ - - /* Ask shrink_caches, or shrink_zone to scan at this priority */ - unsigned int priority; - - /* This context's GFP mask */ - unsigned int gfp_mask; - - int may_writepage; -}; - /* * shrink_list adds the number of reclaimed pages to sc->nr_reclaimed */ @@ -588,6 +589,7 @@ static void shrink_cache(struct zone *zone, struct scan_control *sc) if (current_is_kswapd()) mod_page_state(kswapd_steal, nr_freed); mod_page_state_zone(zone, pgsteal, nr_freed); + sc->nr_to_reclaim -= nr_freed; spin_lock_irq(&zone->lru_lock); /* @@ -791,54 +793,50 @@ refill_inactive_zone(struct zone *zone, struct scan_control *sc) } /* - * Scan `nr_pages' from this zone. Returns the number of reclaimed pages. * This is a basic per-zone page freer. Used by both kswapd and direct reclaim. */ static void shrink_zone(struct zone *zone, struct scan_control *sc) { - unsigned long scan_active, scan_inactive; - int count; - - scan_inactive = (zone->nr_active + zone->nr_inactive) >> sc->priority; + unsigned long nr_active; + unsigned long nr_inactive; /* - * Try to keep the active list 2/3 of the size of the cache. And - * make sure that refill_inactive is given a decent number of pages. - * - * The "scan_active + 1" here is important. With pagecache-intensive - * workloads the inactive list is huge, and `ratio' evaluates to zero - * all the time. Which pins the active list memory. So we add one to - * `scan_active' just to make sure that the kernel will slowly sift - * through the active list. + * Add one to `nr_to_scan' just to make sure that the kernel will + * slowly sift through the active list. */ - if (zone->nr_active >= 4*(zone->nr_inactive*2 + 1)) { - /* Don't scan more than 4 times the inactive list scan size */ - scan_active = 4*scan_inactive; - } else { - unsigned long long tmp; - - /* Cast to long long so the multiply doesn't overflow */ - - tmp = (unsigned long long)scan_inactive * zone->nr_active; - do_div(tmp, zone->nr_inactive*2 + 1); - scan_active = (unsigned long)tmp; - } - - atomic_add(scan_active + 1, &zone->nr_scan_active); - count = atomic_read(&zone->nr_scan_active); - if (count >= SWAP_CLUSTER_MAX) { - atomic_set(&zone->nr_scan_active, 0); - sc->nr_to_scan = count; - refill_inactive_zone(zone, sc); - } + zone->nr_scan_active += (zone->nr_active >> sc->priority) + 1; + nr_active = zone->nr_scan_active; + if (nr_active >= SWAP_CLUSTER_MAX) + zone->nr_scan_active = 0; + else + nr_active = 0; + + zone->nr_scan_inactive += (zone->nr_inactive >> sc->priority) + 1; + nr_inactive = zone->nr_scan_inactive; + if (nr_inactive >= SWAP_CLUSTER_MAX) + zone->nr_scan_inactive = 0; + else + nr_inactive = 0; + + sc->nr_to_reclaim = SWAP_CLUSTER_MAX; + + while (nr_active || nr_inactive) { + if (nr_active) { + sc->nr_to_scan = min(nr_active, + (unsigned long)SWAP_CLUSTER_MAX); + nr_active -= sc->nr_to_scan; + refill_inactive_zone(zone, sc); + } - atomic_add(scan_inactive, &zone->nr_scan_inactive); - count = atomic_read(&zone->nr_scan_inactive); - if (count >= SWAP_CLUSTER_MAX) { - atomic_set(&zone->nr_scan_inactive, 0); - sc->nr_to_scan = count; - shrink_cache(zone, sc); + if (nr_inactive) { + sc->nr_to_scan = min(nr_inactive, + (unsigned long)SWAP_CLUSTER_MAX); + nr_inactive -= sc->nr_to_scan; + shrink_cache(zone, sc); + if (sc->nr_to_reclaim <= 0) + break; + } } } @@ -1099,7 +1097,7 @@ out: * If there are applications that are active memory-allocators * (most normal use), this basically shouldn't matter. */ -int kswapd(void *p) +static int kswapd(void *p) { pg_data_t *pgdat = (pg_data_t*)p; struct task_struct *tsk = current; @@ -1138,6 +1136,7 @@ int kswapd(void *p) balance_pgdat(pgdat, 0); } + return 0; } /* diff --git a/net/bridge/br_if.c b/net/bridge/br_if.c index 20275604941a..6bb2ed24718f 100644 --- a/net/bridge/br_if.c +++ b/net/bridge/br_if.c @@ -75,9 +75,8 @@ static int br_initial_port_cost(struct net_device *dev) return 100; /* assume old 10Mbps */ } -static void destroy_nbp(void *arg) +static void destroy_nbp(struct net_bridge_port *p) { - struct net_bridge_port *p = arg; struct net_device *dev = p->dev; dev->br_port = NULL; @@ -88,6 +87,13 @@ static void destroy_nbp(void *arg) br_sysfs_freeif(p); } +static void destroy_nbp_rcu(struct rcu_head *head) +{ + struct net_bridge_port *p = + container_of(head, struct net_bridge_port, rcu); + destroy_nbp(p); +} + /* called with RTNL */ static void del_nbp(struct net_bridge_port *p) { @@ -108,7 +114,7 @@ static void del_nbp(struct net_bridge_port *p) del_timer_sync(&p->forward_delay_timer); del_timer_sync(&p->hold_timer); - call_rcu(&p->rcu, destroy_nbp, p); + call_rcu(&p->rcu, destroy_nbp_rcu); } /* called with RTNL */ diff --git a/net/decnet/dn_route.c b/net/decnet/dn_route.c index 90d0583f56f4..c181467ddca3 100644 --- a/net/decnet/dn_route.c +++ b/net/decnet/dn_route.c @@ -146,14 +146,14 @@ static __inline__ unsigned dn_hash(unsigned short src, unsigned short dst) static inline void dnrt_free(struct dn_route *rt) { - call_rcu(&rt->u.dst.rcu_head, (void (*)(void *))dst_free, &rt->u.dst); + call_rcu(&rt->u.dst.rcu_head, dst_rcu_free); } static inline void dnrt_drop(struct dn_route *rt) { if (rt) dst_release(&rt->u.dst); - call_rcu(&rt->u.dst.rcu_head, (void (*)(void *))dst_free, &rt->u.dst); + call_rcu(&rt->u.dst.rcu_head, dst_rcu_free); } static void dn_dst_check_expire(unsigned long dummy) diff --git a/net/ipv4/route.c b/net/ipv4/route.c index a570e709f738..46aeef6fa4e1 100644 --- a/net/ipv4/route.c +++ b/net/ipv4/route.c @@ -439,13 +439,13 @@ static struct file_operations rt_cpu_seq_fops = { static __inline__ void rt_free(struct rtable *rt) { - call_rcu(&rt->u.dst.rcu_head, (void (*)(void *))dst_free, &rt->u.dst); + call_rcu(&rt->u.dst.rcu_head, dst_rcu_free); } static __inline__ void rt_drop(struct rtable *rt) { ip_rt_put(rt); - call_rcu(&rt->u.dst.rcu_head, (void (*)(void *))dst_free, &rt->u.dst); + call_rcu(&rt->u.dst.rcu_head, dst_rcu_free); } static __inline__ int rt_fast_clean(struct rtable *rth) diff --git a/net/sched/sch_generic.c b/net/sched/sch_generic.c index 111dad476d2b..db8cab2cf1d5 100644 --- a/net/sched/sch_generic.c +++ b/net/sched/sch_generic.c @@ -411,9 +411,9 @@ void qdisc_reset(struct Qdisc *qdisc) /* this is the rcu callback function to clean up a qdisc when there * are no further references to it */ -static void __qdisc_destroy (void * arg) +static void __qdisc_destroy(struct rcu_head *head) { - struct Qdisc *qdisc = (struct Qdisc *) arg; + struct Qdisc *qdisc = container_of(head, struct Qdisc, q_rcu); struct Qdisc_ops *ops = qdisc->ops; #ifdef CONFIG_NET_ESTIMATOR @@ -448,7 +448,7 @@ void qdisc_destroy(struct Qdisc *qdisc) } } - call_rcu(&qdisc->q_rcu, __qdisc_destroy, qdisc); + call_rcu(&qdisc->q_rcu, __qdisc_destroy); } diff --git a/scripts/extract-ikconfig b/scripts/extract-ikconfig index 8e526d370966..d9f9f34b22ab 100755 --- a/scripts/extract-ikconfig +++ b/scripts/extract-ikconfig @@ -1,9 +1,31 @@ -#! /bin/bash +#!/bin/sh # extracts .config info from a [b]zImage file # uses: binoffset (new), dd, zcat, strings, grep # $arg1 is [b]zImage filename -TMPFILE="" +binoffset="./scripts/binoffset" + +IKCFG_ST="0x49 0x4b 0x43 0x46 0x47 0x5f 0x53 0x54" +IKCFG_ED="0x49 0x4b 0x43 0x46 0x47 0x5f 0x45 0x44" +function dump_config { + typeset file="$1" + + start=`$binoffset $file $IKCFG_ST 2>/dev/null` + [ "$?" != "0" ] && start="-1" + if [ "$start" -eq "-1" ]; then + return + fi + end=`$binoffset $file $IKCFG_ED 2>/dev/null` + + let start="$start + 8" + let size="$end - $start" + + head --bytes="$end" "$file" | tail --bytes="$size" | zcat + + clean_up + exit 0 +} + usage() { @@ -12,8 +34,7 @@ usage() clean_up() { - if [ -z $ISCOMP ] - then + if [ "$TMPFILE" != "" ]; then rm -f $TMPFILE fi } @@ -21,46 +42,36 @@ clean_up() if [ $# -lt 1 ] then usage - exit + exit 1 fi -image=$1 +TMPFILE="/tmp/ikconfig-$$" +image="$1" -# There are two gzip headers, as well as arches which don't compress their -# kernel. -GZHDR="0x1f 0x8b 0x08 0x00" -if [ `binoffset $image $GZHDR >/dev/null 2>&1 ; echo $?` -ne 0 ] -then - GZHDR="0x1f 0x8b 0x08 0x08" - if [ `binoffset $image $GZHDR >/dev/null 2>&1 ; echo $?` -ne 0 ] - then - ISCOMP=0 - fi -fi +# vmlinux: Attempt to dump the configuration from the file directly +dump_config "$image" -PID=$$ +GZHDR1="0x1f 0x8b 0x08 0x00" +GZHDR2="0x1f 0x8b 0x08 0x08" -# Extract and uncompress the kernel image if necessary -if [ -z $ISCOMP ] -then - TMPFILE="/tmp/`basename $image`.vmlin.$PID" - dd if=$image bs=1 skip=`binoffset $image $GZHDR` 2> /dev/null | zcat > $TMPFILE -else - TMPFILE=$image +# vmlinux.gz: Check for a compressed images +off=`$binoffset "$image" $GZHDR1 2>/dev/null` +[ "$?" != "0" ] && off="-1" +if [ "$off" -eq "-1" ]; then + off=`$binoffset "$image" $GZHDR2 2>/dev/null` + [ "$?" != "0" ] && off="-1" fi - -# Look for strings. -strings $TMPFILE | grep "CONFIG_BEGIN=n" > /dev/null -if [ $? -eq 0 ] -then - strings $TMPFILE | awk "/CONFIG_BEGIN=n/,/CONFIG_END=n/" > $image.oldconfig.$PID -else - echo "ERROR: Unable to extract kernel configuration information." - echo " This kernel image may not have the config info." - clean_up - exit 1 +if [ "$off" -eq "0" ]; then + zcat <"$image" >"$TMPFILE" + dump_config "$TMPFILE" +elif [ "$off" -ne "-1" ]; then + (dd ibs="$off" skip=1 count=0 && dd bs=512k) <"$image" 2>/dev/null | \ + zcat >"$TMPFILE" + dump_config "$TMPFILE" fi -echo "Kernel configuration written to $image.oldconfig.$PID" +echo "ERROR: Unable to extract kernel configuration information." +echo " This kernel image may not have the config info." + clean_up -exit 0 +exit 1 diff --git a/scripts/mkconfigs b/scripts/mkconfigs index a3166274ebc3..abf711d367ae 100755 --- a/scripts/mkconfigs +++ b/scripts/mkconfigs @@ -34,10 +34,10 @@ fi config=$1 makefile=$2 -echo "#ifndef _IKCONFIG_H" -echo "#define _IKCONFIG_H" -echo \ -"/* +cat << EOF +#ifndef _IKCONFIG_H +#define _IKCONFIG_H +/* * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -58,10 +58,10 @@ echo \ * * This file is generated automatically by scripts/mkconfigs. Do not edit. * - */" - -echo "static char const ikconfig_config[] __attribute__((unused)) = " -echo "\"CONFIG_BEGIN=n\\n\\" -echo "`cat $config | sed 's/\"/\\\\\"/g' | grep "^#\? \?CONFIG_" | awk '{ print $0 "\\\\n\\\\" }' `" -echo "CONFIG_END=n\\n\";" -echo "#endif /* _IKCONFIG_H */" + */ +static char const ikconfig_config[] __attribute__((unused)) = +"CONFIG_BEGIN=n\\n\\ +$(sed < $config -n 's/"/\\"/g;/^#\? \?CONFIG_/s/.*/&\\n\\/p') +CONFIG_END=n\\n"; +#endif /* _IKCONFIG_H */ +EOF diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c index b2a1418ac28c..e1009456e6d4 100644 --- a/security/selinux/hooks.c +++ b/security/selinux/hooks.c @@ -1389,11 +1389,11 @@ static int selinux_capset_check(struct task_struct *target, kernel_cap_t *effect { int error; - error = task_has_perm(current, target, PROCESS__SETCAP); + error = secondary_ops->capset_check(target, effective, inheritable, permitted); if (error) return error; - return secondary_ops->capset_check(target, effective, inheritable, permitted); + return task_has_perm(current, target, PROCESS__SETCAP); } static void selinux_capset_set(struct task_struct *target, kernel_cap_t *effective, @@ -1427,6 +1427,10 @@ static int selinux_sysctl(ctl_table *table, int op) u32 tsid; int rc; + rc = secondary_ops->sysctl(table, op); + if (rc) + return rc; + tsec = current->security; rc = selinux_proc_get_sid(table->de, (op == 001) ? @@ -1690,7 +1694,7 @@ static int selinux_bprm_set_security(struct linux_binprm *bprm) static int selinux_bprm_check_security (struct linux_binprm *bprm) { - return 0; + return secondary_ops->bprm_check_security(bprm); } @@ -1708,12 +1712,7 @@ static int selinux_bprm_secureexec (struct linux_binprm *bprm) PROCESS__NOATSECURE, NULL, NULL); } - /* Note that we must include the legacy uid/gid test below - to retain it, as the new userland will simply use the - value passed by AT_SECURE to decide whether to enable - secure mode. */ - return ( atsecure || current->euid != current->uid || - current->egid != current->gid); + return (atsecure || secondary_ops->bprm_secureexec(bprm)); } static void selinux_bprm_free_security(struct linux_binprm *bprm) @@ -2058,6 +2057,12 @@ static int selinux_mount(char * dev_name, unsigned long flags, void * data) { + int rc; + + rc = secondary_ops->sb_mount(dev_name, nd, type, flags, data); + if (rc) + return rc; + if (flags & MS_REMOUNT) return superblock_has_perm(current, nd->mnt->mnt_sb, FILESYSTEM__REMOUNT, NULL); @@ -2068,6 +2073,12 @@ static int selinux_mount(char * dev_name, static int selinux_umount(struct vfsmount *mnt, int flags) { + int rc; + + rc = secondary_ops->sb_umount(mnt, flags); + if (rc) + return rc; + return superblock_has_perm(current,mnt->mnt_sb, FILESYSTEM__UNMOUNT,NULL); } @@ -2111,6 +2122,11 @@ static void selinux_inode_post_link(struct dentry *old_dentry, struct inode *ino static int selinux_inode_unlink(struct inode *dir, struct dentry *dentry) { + int rc; + + rc = secondary_ops->inode_unlink(dir, dentry); + if (rc) + return rc; return may_link(dir, dentry, MAY_UNLINK); } @@ -2141,6 +2157,12 @@ static int selinux_inode_rmdir(struct inode *dir, struct dentry *dentry) static int selinux_inode_mknod(struct inode *dir, struct dentry *dentry, int mode, dev_t dev) { + int rc; + + rc = secondary_ops->inode_mknod(dir, dentry, mode, dev); + if (rc) + return rc; + return may_create(dir, dentry, inode_mode_to_security_class(mode)); } @@ -2179,6 +2201,12 @@ static int selinux_inode_follow_link(struct dentry *dentry, struct nameidata *na static int selinux_inode_permission(struct inode *inode, int mask, struct nameidata *nd) { + int rc; + + rc = secondary_ops->inode_permission(inode, mask, nd); + if (rc) + return rc; + if (!mask) { /* No permission to check. Existence test. */ return 0; @@ -2190,6 +2218,12 @@ static int selinux_inode_permission(struct inode *inode, int mask, static int selinux_inode_setattr(struct dentry *dentry, struct iattr *iattr) { + int rc; + + rc = secondary_ops->inode_setattr(dentry, iattr); + if (rc) + return rc; + if (iattr->ia_valid & (ATTR_MODE | ATTR_UID | ATTR_GID | ATTR_ATIME_SET | ATTR_MTIME_SET)) return dentry_has_perm(current, NULL, dentry, FILE__SETATTR); @@ -2456,6 +2490,11 @@ static int selinux_file_ioctl(struct file *file, unsigned int cmd, static int selinux_file_mmap(struct file *file, unsigned long prot, unsigned long flags) { u32 av; + int rc; + + rc = secondary_ops->file_mmap(file, prot, flags); + if (rc) + return rc; if (file) { /* read access is always possible with a mapping */ @@ -2476,6 +2515,12 @@ static int selinux_file_mmap(struct file *file, unsigned long prot, unsigned lon static int selinux_file_mprotect(struct vm_area_struct *vma, unsigned long prot) { + int rc; + + rc = secondary_ops->file_mprotect(vma, prot); + if (rc) + return rc; + return selinux_file_mmap(vma->vm_file, prot, vma->vm_flags); } @@ -2573,6 +2618,12 @@ static int selinux_file_receive(struct file *file) static int selinux_task_create(unsigned long clone_flags) { + int rc; + + rc = secondary_ops->task_create(clone_flags); + if (rc) + return rc; + return task_has_perm(current, current, PROCESS__FORK); } @@ -2648,12 +2699,23 @@ static int selinux_task_setgroups(struct group_info *group_info) static int selinux_task_setnice(struct task_struct *p, int nice) { + int rc; + + rc = secondary_ops->task_setnice(p, nice); + if (rc) + return rc; + return task_has_perm(current,p, PROCESS__SETSCHED); } static int selinux_task_setrlimit(unsigned int resource, struct rlimit *new_rlim) { struct rlimit *old_rlim = current->rlim + resource; + int rc; + + rc = secondary_ops->task_setrlimit(resource, new_rlim); + if (rc) + return rc; /* Control the ability to change the hard limit (whether lowering or raising it), so that the hard limit can @@ -2688,6 +2750,11 @@ static int selinux_task_getscheduler(struct task_struct *p) static int selinux_task_kill(struct task_struct *p, struct siginfo *info, int sig) { u32 perm; + int rc; + + rc = secondary_ops->task_kill(p, info, sig); + if (rc) + return rc; if (info && ((unsigned long)info == 1 || (unsigned long)info == 2 || SI_FROMKERNEL(info))) @@ -3129,6 +3196,10 @@ static int selinux_socket_unix_stream_connect(struct socket *sock, struct avc_audit_data ad; int err; + err = secondary_ops->unix_stream_connect(sock, other, newsk); + if (err) + return err; + isec = SOCK_INODE(sock)->i_security; other_isec = SOCK_INODE(other)->i_security; @@ -3847,6 +3918,11 @@ static int selinux_shm_shmat(struct shmid_kernel *shp, char __user *shmaddr, int shmflg) { u32 perms; + int rc; + + rc = secondary_ops->shm_shmat(shp, shmaddr, shmflg); + if (rc) + return rc; if (shmflg & SHM_RDONLY) perms = SHM__READ; diff --git a/security/selinux/netif.c b/security/selinux/netif.c index 4cbf8f259d93..d23bd7e6345e 100644 --- a/security/selinux/netif.c +++ b/security/selinux/netif.c @@ -134,9 +134,9 @@ out: return netif; } -static void sel_netif_free(void *p) +static void sel_netif_free(struct rcu_head *p) { - struct sel_netif *netif = p; + struct sel_netif *netif = container_of(p, struct sel_netif, rcu_head); DEBUGP("%s: %s\n", __FUNCTION__, netif->nsec.dev->name); kfree(netif); @@ -151,7 +151,7 @@ static void sel_netif_destroy(struct sel_netif *netif) sel_netif_total--; spin_unlock_bh(&sel_netif_lock); - call_rcu(&netif->rcu_head, sel_netif_free, netif); + call_rcu(&netif->rcu_head, sel_netif_free); } void sel_netif_put(struct sel_netif *netif) diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig index 648bccd40806..05f6bc8ecee8 100644 --- a/sound/oss/Kconfig +++ b/sound/oss/Kconfig @@ -186,7 +186,10 @@ config SOUND_VWSND config SOUND_HAL2 tristate "SGI HAL2 sound (EXPERIMENTAL)" - depends on SGI_IP22 && SOUND && EXPERIMENTAL + depends on SOUND_PRIME!=n && SOUND && SGI_IP22 && EXPERIMENTAL + help + Say Y or M if you have an SGI Indy system and want to be able to + use it's on-board A2 audio system. config SOUND_VRC5477 tristate "NEC Vrc5477 AC97 sound" diff --git a/sound/oss/hal2.c b/sound/oss/hal2.c index 6ad89aa8b262..1f49d04242f3 100644 --- a/sound/oss/hal2.c +++ b/sound/oss/hal2.c @@ -1,6 +1,6 @@ /* - * Driver for HAL2 sound processors - * Copyright (c) 2001, 2002 Ladislav Michl <ladis@psi.cz> + * Driver for A2 audio system used in SGI machines + * Copyright (c) 2001, 2002, 2003 Ladislav Michl <ladis@linux-mips.org> * * Based on Ulf Carlsson's code. * @@ -21,22 +21,21 @@ * /dev/dsp standard dsp device, (mostly) OSS compatible * /dev/mixer standard mixer device, (mostly) OSS compatible * - * BUGS: - * + Driver currently supports indigo mode only. - * + Recording doesn't work. I guess that it is caused by PBUS channel - * misconfiguration, but until I get relevant info I'm unable to fix it. */ - +#include <linux/kernel.h> #include <linux/module.h> #include <linux/sched.h> #include <linux/init.h> #include <linux/slab.h> #include <linux/poll.h> +#include <linux/interrupt.h> +#include <linux/dma-mapping.h> #include <linux/sound.h> #include <linux/soundcard.h> + #include <asm/io.h> -#include <asm/uaccess.h> -#include <asm/sgi/sgint23.h> +#include <asm/sgi/hpc3.h> +#include <asm/sgi/ip22.h> #include "hal2.h" @@ -52,61 +51,131 @@ #define DEBUG_MIX(args...) #endif +/* + * Before touching these look how it works. It is a bit unusual I know, + * but it helps to keep things simple. This driver is considered complete + * and I won't add any new features although hardware has many cool + * capabilities. + * (Historical note: HAL2 driver was first written by Ulf Carlsson - ALSA + * 0.3 running with 2.2.x kernel. Then ALSA changed completely and it + * seemed easier to me to write OSS driver from scratch - this one. Now + * when ALSA is official part of 2.6 kernel it's time to write ALSA driver + * using (hopefully) final version of ALSA interface) + */ +#define H2_BLOCK_SIZE 1024 +#define H2_ADC_BUFSIZE 8192 +#define H2_DAC_BUFSIZE 16834 + +struct hal2_pbus { + struct hpc3_pbus_dmacregs *pbus; + int pbusnr; + unsigned int ctrl; /* Current state of pbus->pbdma_ctrl */ +}; + +struct hal2_desc { + struct hpc_dma_desc desc; + u32 cnt; /* don't touch, it is also padding */ +}; + +struct hal2_codec { + unsigned char *buffer; + struct hal2_desc *desc; + int desc_count; + int tail, head; /* tail index, head index */ + struct hal2_pbus pbus; + unsigned int format; /* Audio data format */ + int voices; /* mono/stereo */ + unsigned int sample_rate; + unsigned int master; /* Master frequency */ + unsigned short mod; /* MOD value */ + unsigned short inc; /* INC value */ + + wait_queue_head_t dma_wait; + spinlock_t lock; + struct semaphore sem; + + int usecount; /* recording and playback are + * independent */ +}; + +#define H2_MIX_OUTPUT_ATT 0 +#define H2_MIX_INPUT_GAIN 1 +#define H2_MIXERS 2 +struct hal2_mixer { + int modcnt; + unsigned int master; + unsigned int volume[H2_MIXERS]; +}; + +struct hal2_card { + int dev_dsp; /* audio device */ + int dev_mixer; /* mixer device */ + int dev_midi; /* midi device */ + + struct hal2_ctl_regs *ctl_regs; /* HAL2 ctl registers */ + struct hal2_aes_regs *aes_regs; /* HAL2 aes registers */ + struct hal2_vol_regs *vol_regs; /* HAL2 vol registers */ + struct hal2_syn_regs *syn_regs; /* HAL2 syn registers */ + + struct hal2_codec dac; + struct hal2_codec adc; + struct hal2_mixer mixer; +}; + #define H2_INDIRECT_WAIT(regs) while (regs->isr & H2_ISR_TSTATUS); #define H2_READ_ADDR(addr) (addr | (1<<7)) #define H2_WRITE_ADDR(addr) (addr) -static char *hal2str = "HAL2 audio"; -static int ibuffers = 32; -static int obuffers = 32; +static char *hal2str = "HAL2"; -/* I doubt anyone has a machine with two HAL2 cards. It's possible to +/* + * I doubt anyone has a machine with two HAL2 cards. It's possible to * have two HPC's, so it is probably possible to have two HAL2 cards. * Try to deal with it, but note that it is not tested. */ #define MAXCARDS 2 -static hal2_card_t* hal2_card[MAXCARDS]; +static struct hal2_card* hal2_card[MAXCARDS]; static const struct { unsigned char idx:4, avail:1; } mixtable[SOUND_MIXER_NRDEVICES] = { - [SOUND_MIXER_PCM] = { H2_MIX_OUTPUT_ATT, 1 }, /* voice */ - [SOUND_MIXER_MIC] = { H2_MIX_INPUT_GAIN, 1 }, /* mic */ + [SOUND_MIXER_PCM] = { H2_MIX_OUTPUT_ATT, 1 }, /* voice */ + [SOUND_MIXER_MIC] = { H2_MIX_INPUT_GAIN, 1 }, /* mic */ }; #define H2_SUPPORTED_FORMATS (AFMT_S16_LE | AFMT_S16_BE) -static inline void hal2_isr_write(hal2_card_t *hal2, u32 val) +static inline void hal2_isr_write(struct hal2_card *hal2, u16 val) { hal2->ctl_regs->isr = val; } -static inline u32 hal2_isr_look(hal2_card_t *hal2) +static inline u16 hal2_isr_look(struct hal2_card *hal2) { return hal2->ctl_regs->isr; } -static inline u32 hal2_rev_look(hal2_card_t *hal2) +static inline u16 hal2_rev_look(struct hal2_card *hal2) { return hal2->ctl_regs->rev; } -#if 0 -static u16 hal2_i_look16(hal2_card_t *hal2, u32 addr) +#ifdef HAL2_DUMP_REGS +static u16 hal2_i_look16(struct hal2_card *hal2, u16 addr) { - hal2_ctl_regs_t *regs = hal2->ctl_regs; + struct hal2_ctl_regs *regs = hal2->ctl_regs; regs->iar = H2_READ_ADDR(addr); H2_INDIRECT_WAIT(regs); - return (regs->idr0 & 0xffff); + return regs->idr0; } #endif -static u32 hal2_i_look32(hal2_card_t *hal2, u32 addr) +static u32 hal2_i_look32(struct hal2_card *hal2, u16 addr) { u32 ret; - hal2_ctl_regs_t *regs = hal2->ctl_regs; + struct hal2_ctl_regs *regs = hal2->ctl_regs; regs->iar = H2_READ_ADDR(addr); H2_INDIRECT_WAIT(regs); @@ -117,9 +186,9 @@ static u32 hal2_i_look32(hal2_card_t *hal2, u32 addr) return ret; } -static void hal2_i_write16(hal2_card_t *hal2, u32 addr, u16 val) +static void hal2_i_write16(struct hal2_card *hal2, u16 addr, u16 val) { - hal2_ctl_regs_t *regs = hal2->ctl_regs; + struct hal2_ctl_regs *regs = hal2->ctl_regs; regs->idr0 = val; regs->idr1 = 0; @@ -129,9 +198,9 @@ static void hal2_i_write16(hal2_card_t *hal2, u32 addr, u16 val) H2_INDIRECT_WAIT(regs); } -static void hal2_i_write32(hal2_card_t *hal2, u32 addr, u32 val) +static void hal2_i_write32(struct hal2_card *hal2, u16 addr, u32 val) { - hal2_ctl_regs_t *regs = hal2->ctl_regs; + struct hal2_ctl_regs *regs = hal2->ctl_regs; regs->idr0 = val & 0xffff; regs->idr1 = val >> 16; @@ -141,13 +210,13 @@ static void hal2_i_write32(hal2_card_t *hal2, u32 addr, u32 val) H2_INDIRECT_WAIT(regs); } -static void hal2_i_setbit16(hal2_card_t *hal2, u32 addr, u16 bit) +static void hal2_i_setbit16(struct hal2_card *hal2, u16 addr, u16 bit) { - hal2_ctl_regs_t *regs = hal2->ctl_regs; + struct hal2_ctl_regs *regs = hal2->ctl_regs; regs->iar = H2_READ_ADDR(addr); H2_INDIRECT_WAIT(regs); - regs->idr0 = regs->idr0 | bit; + regs->idr0 = (regs->idr0 & 0xffff) | bit; regs->idr1 = 0; regs->idr2 = 0; regs->idr3 = 0; @@ -155,14 +224,14 @@ static void hal2_i_setbit16(hal2_card_t *hal2, u32 addr, u16 bit) H2_INDIRECT_WAIT(regs); } -static void hal2_i_setbit32(hal2_card_t *hal2, u32 addr, u32 bit) +static void hal2_i_setbit32(struct hal2_card *hal2, u16 addr, u32 bit) { u32 tmp; - hal2_ctl_regs_t *regs = hal2->ctl_regs; + struct hal2_ctl_regs *regs = hal2->ctl_regs; regs->iar = H2_READ_ADDR(addr); H2_INDIRECT_WAIT(regs); - tmp = regs->idr0 | (regs->idr1 << 16) | bit; + tmp = (regs->idr0 & 0xffff) | (regs->idr1 << 16) | bit; regs->idr0 = tmp & 0xffff; regs->idr1 = tmp >> 16; regs->idr2 = 0; @@ -171,13 +240,13 @@ static void hal2_i_setbit32(hal2_card_t *hal2, u32 addr, u32 bit) H2_INDIRECT_WAIT(regs); } -static void hal2_i_clearbit16(hal2_card_t *hal2, u32 addr, u16 bit) +static void hal2_i_clearbit16(struct hal2_card *hal2, u16 addr, u16 bit) { - hal2_ctl_regs_t *regs = hal2->ctl_regs; + struct hal2_ctl_regs *regs = hal2->ctl_regs; regs->iar = H2_READ_ADDR(addr); H2_INDIRECT_WAIT(regs); - regs->idr0 = regs->idr0 & ~bit; + regs->idr0 = (regs->idr0 & 0xffff) & ~bit; regs->idr1 = 0; regs->idr2 = 0; regs->idr3 = 0; @@ -186,14 +255,14 @@ static void hal2_i_clearbit16(hal2_card_t *hal2, u32 addr, u16 bit) } #if 0 -static void hal2_i_clearbit32(hal2_card_t *hal2, u32 addr, u32 bit) +static void hal2_i_clearbit32(struct hal2_card *hal2, u16 addr, u32 bit) { u32 tmp; hal2_ctl_regs_t *regs = hal2->ctl_regs; regs->iar = H2_READ_ADDR(addr); H2_INDIRECT_WAIT(regs); - tmp = (regs->idr0 | (regs->idr1 << 16)) & ~bit; + tmp = ((regs->idr0 & 0xffff) | (regs->idr1 << 16)) & ~bit; regs->idr0 = tmp & 0xffff; regs->idr1 = tmp >> 16; regs->idr2 = 0; @@ -203,33 +272,33 @@ static void hal2_i_clearbit32(hal2_card_t *hal2, u32 addr, u32 bit) } #endif -#ifdef HAL2_DEBUG -static void hal2_dump_regs(hal2_card_t *hal2) +#ifdef HAL2_DUMP_REGS +static void hal2_dump_regs(struct hal2_card *hal2) { - printk("isr: %08hx ", hal2_isr_look(hal2)); - printk("rev: %08hx\n", hal2_rev_look(hal2)); - printk("relay: %04hx\n", hal2_i_look16(hal2, H2I_RELAY_C)); - printk("port en: %04hx ", hal2_i_look16(hal2, H2I_DMA_PORT_EN)); - printk("dma end: %04hx ", hal2_i_look16(hal2, H2I_DMA_END)); - printk("dma drv: %04hx\n", hal2_i_look16(hal2, H2I_DMA_DRV)); - printk("syn ctl: %04hx ", hal2_i_look16(hal2, H2I_SYNTH_C)); - printk("aesrx ctl: %04hx ", hal2_i_look16(hal2, H2I_AESRX_C)); - printk("aestx ctl: %04hx ", hal2_i_look16(hal2, H2I_AESTX_C)); - printk("dac ctl1: %04hx ", hal2_i_look16(hal2, H2I_ADC_C1)); - printk("dac ctl2: %08lx ", hal2_i_look32(hal2, H2I_ADC_C2)); - printk("adc ctl1: %04hx ", hal2_i_look16(hal2, H2I_DAC_C1)); - printk("adc ctl2: %08lx ", hal2_i_look32(hal2, H2I_DAC_C2)); - printk("syn map: %04hx\n", hal2_i_look16(hal2, H2I_SYNTH_MAP_C)); - printk("bres1 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES1_C1)); - printk("bres1 ctl2: %04lx ", hal2_i_look32(hal2, H2I_BRES1_C2)); - printk("bres2 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES2_C1)); - printk("bres2 ctl2: %04lx ", hal2_i_look32(hal2, H2I_BRES2_C2)); - printk("bres3 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES3_C1)); - printk("bres3 ctl2: %04lx\n", hal2_i_look32(hal2, H2I_BRES3_C2)); + DEBUG("isr: %08hx ", hal2_isr_look(hal2)); + DEBUG("rev: %08hx\n", hal2_rev_look(hal2)); + DEBUG("relay: %04hx\n", hal2_i_look16(hal2, H2I_RELAY_C)); + DEBUG("port en: %04hx ", hal2_i_look16(hal2, H2I_DMA_PORT_EN)); + DEBUG("dma end: %04hx ", hal2_i_look16(hal2, H2I_DMA_END)); + DEBUG("dma drv: %04hx\n", hal2_i_look16(hal2, H2I_DMA_DRV)); + DEBUG("syn ctl: %04hx ", hal2_i_look16(hal2, H2I_SYNTH_C)); + DEBUG("aesrx ctl: %04hx ", hal2_i_look16(hal2, H2I_AESRX_C)); + DEBUG("aestx ctl: %04hx ", hal2_i_look16(hal2, H2I_AESTX_C)); + DEBUG("dac ctl1: %04hx ", hal2_i_look16(hal2, H2I_ADC_C1)); + DEBUG("dac ctl2: %08x ", hal2_i_look32(hal2, H2I_ADC_C2)); + DEBUG("adc ctl1: %04hx ", hal2_i_look16(hal2, H2I_DAC_C1)); + DEBUG("adc ctl2: %08x ", hal2_i_look32(hal2, H2I_DAC_C2)); + DEBUG("syn map: %04hx\n", hal2_i_look16(hal2, H2I_SYNTH_MAP_C)); + DEBUG("bres1 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES1_C1)); + DEBUG("bres1 ctl2: %04x ", hal2_i_look32(hal2, H2I_BRES1_C2)); + DEBUG("bres2 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES2_C1)); + DEBUG("bres2 ctl2: %04x ", hal2_i_look32(hal2, H2I_BRES2_C2)); + DEBUG("bres3 ctl1: %04hx ", hal2_i_look16(hal2, H2I_BRES3_C1)); + DEBUG("bres3 ctl2: %04x\n", hal2_i_look32(hal2, H2I_BRES3_C2)); } #endif -static hal2_card_t* hal2_dsp_find_card(int minor) +static struct hal2_card* hal2_dsp_find_card(int minor) { int i; @@ -239,7 +308,7 @@ static hal2_card_t* hal2_dsp_find_card(int minor) return NULL; } -static hal2_card_t* hal2_mixer_find_card(int minor) +static struct hal2_card* hal2_mixer_find_card(int minor) { int i; @@ -249,48 +318,51 @@ static hal2_card_t* hal2_mixer_find_card(int minor) return NULL; } +static void hal2_inc_head(struct hal2_codec *codec) +{ + codec->head++; + if (codec->head == codec->desc_count) + codec->head = 0; +} -static void hal2_dac_interrupt(hal2_codec_t *dac) +static void hal2_inc_tail(struct hal2_codec *codec) +{ + codec->tail++; + if (codec->tail == codec->desc_count) + codec->tail = 0; +} + +static void hal2_dac_interrupt(struct hal2_codec *dac) { int running; spin_lock(&dac->lock); - /* if tail buffer contains zero samples DMA stream was already * stopped */ - running = dac->tail->info.cnt; - dac->tail->info.cnt = 0; - dac->tail->info.desc.cntinfo = HPCDMA_XIE | HPCDMA_EOX; - dma_cache_wback_inv((unsigned long) dac->tail, - sizeof(struct hpc_dma_desc)); + running = dac->desc[dac->tail].cnt; + dac->desc[dac->tail].cnt = 0; + dac->desc[dac->tail].desc.cntinfo = HPCDMA_XIE | HPCDMA_EOX; /* we just proccessed empty buffer, don't update tail pointer */ if (running) - dac->tail = dac->tail->info.next; - + hal2_inc_tail(dac); spin_unlock(&dac->lock); wake_up(&dac->dma_wait); } -static void hal2_adc_interrupt(hal2_codec_t *adc) +static void hal2_adc_interrupt(struct hal2_codec *adc) { int running; - - spin_lock(&adc->lock); + spin_lock(&adc->lock); /* if head buffer contains nonzero samples DMA stream was already * stopped */ - running = !adc->head->info.cnt; - adc->head->info.cnt = H2_BUFFER_SIZE; - adc->head->info.desc.cntinfo = HPCDMA_XIE | HPCDMA_EOX; - dma_cache_wback_inv((unsigned long) adc->head, - sizeof(struct hpc_dma_desc)); + running = !adc->desc[adc->head].cnt; + adc->desc[adc->head].cnt = H2_BLOCK_SIZE; + adc->desc[adc->head].desc.cntinfo = HPCDMA_XIE | HPCDMA_EOR; /* we just proccessed empty buffer, don't update head pointer */ - if (running) { - dma_cache_inv((unsigned long) adc->head->data, H2_BUFFER_SIZE); - adc->head = adc->head->info.next; - } - + if (running) + hal2_inc_head(adc); spin_unlock(&adc->lock); wake_up(&adc->dma_wait); @@ -298,60 +370,48 @@ static void hal2_adc_interrupt(hal2_codec_t *adc) static irqreturn_t hal2_interrupt(int irq, void *dev_id, struct pt_regs *regs) { - hal2_card_t *hal2 = (hal2_card_t*)dev_id; + struct hal2_card *hal2 = (struct hal2_card*)dev_id; + irqreturn_t ret = IRQ_NONE; /* decide what caused this interrupt */ - if (hal2->dac.pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_INT) + if (hal2->dac.pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_INT) { hal2_dac_interrupt(&hal2->dac); - if (hal2->adc.pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_INT) + ret = IRQ_HANDLED; + } + if (hal2->adc.pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_INT) { hal2_adc_interrupt(&hal2->adc); - return IRQ_HANDLED; + ret = IRQ_HANDLED; + } + return ret; } -static int hal2_compute_rate(hal2_codec_t *codec, unsigned int rate) +static int hal2_compute_rate(struct hal2_codec *codec, unsigned int rate) { - unsigned short inc; + unsigned short mod; - /* We default to 44.1 kHz and if it isn't possible to fall back to - * 48.0 kHz with the needed adjustments of real_rate. - */ - DEBUG("rate: %d\n", rate); - /* Refer to CS4216 data sheet */ - if (rate < 4000) - rate = 4000; - if (rate > 50000) - rate = 50000; - - /* Note: This is NOT the way they set up the bresenham clock generators - * in the specification. I've tried to implement that method but it - * doesn't work. It's probably another silly bug in the spec. - * - * I accidently discovered this method while I was testing and it seems - * to work very well with all frequencies, and thee shall follow rule #1 - * of programming :-) - */ - - if (44100 % rate == 0) { - inc = 44100 / rate; - if (inc < 1) inc = 1; + if (rate < 4000) rate = 4000; + else if (rate > 48000) rate = 48000; + + if (44100 % rate < 48000 % rate) { + mod = 4 * 44100 / rate; codec->master = 44100; } else { - inc = 48000 / rate; - if (inc < 1) inc = 1; - rate = 48000 / inc; + mod = 4 * 48000 / rate; codec->master = 48000; } - codec->inc = inc; - codec->mod = 1; - + + codec->inc = 4; + codec->mod = mod; + rate = 4 * codec->master / mod; + DEBUG("real_rate: %d\n", rate); return rate; } -static void hal2_set_dac_rate(hal2_card_t *hal2) +static void hal2_set_dac_rate(struct hal2_card *hal2) { unsigned int master = hal2->dac.master; int inc = hal2->dac.inc; @@ -360,10 +420,10 @@ static void hal2_set_dac_rate(hal2_card_t *hal2) DEBUG("master: %d inc: %d mod: %d\n", master, inc, mod); hal2_i_write16(hal2, H2I_BRES1_C1, (master == 44100) ? 1 : 0); - hal2_i_write32(hal2, H2I_BRES1_C2, ((0xffff & (mod - inc - 1)) << 16) | 1); + hal2_i_write32(hal2, H2I_BRES1_C2, ((0xffff & (inc - mod - 1)) << 16) | inc); } -static void hal2_set_adc_rate(hal2_card_t *hal2) +static void hal2_set_adc_rate(struct hal2_card *hal2) { unsigned int master = hal2->adc.master; int inc = hal2->adc.inc; @@ -372,13 +432,13 @@ static void hal2_set_adc_rate(hal2_card_t *hal2) DEBUG("master: %d inc: %d mod: %d\n", master, inc, mod); hal2_i_write16(hal2, H2I_BRES2_C1, (master == 44100) ? 1 : 0); - hal2_i_write32(hal2, H2I_BRES2_C2, ((0xffff & (mod - inc - 1)) << 16) | 1); + hal2_i_write32(hal2, H2I_BRES2_C2, ((0xffff & (inc - mod - 1)) << 16) | inc); } -static void hal2_setup_dac(hal2_card_t *hal2) +static void hal2_setup_dac(struct hal2_card *hal2) { unsigned int fifobeg, fifoend, highwater, sample_size; - hal2_pbus_t *pbus = &hal2->dac.pbus; + struct hal2_pbus *pbus = &hal2->dac.pbus; DEBUG("hal2_setup_dac\n"); @@ -388,230 +448,215 @@ static void hal2_setup_dac(hal2_card_t *hal2) * endian. The information is written later, on the start call. */ sample_size = 2 * hal2->dac.voices; - /* Fifo should be set to hold exactly four samples. Highwater mark * should be set to two samples. */ highwater = (sample_size * 2) >> 1; /* halfwords */ fifobeg = 0; /* playback is first */ fifoend = (sample_size * 4) >> 3; /* doublewords */ pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_LD | - (highwater << 8) | (fifobeg << 16) | (fifoend << 24); + (highwater << 8) | (fifobeg << 16) | (fifoend << 24) | + (hal2->dac.format & AFMT_S16_LE ? HPC3_PDMACTRL_SEL : 0); /* We disable everything before we do anything at all */ pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD; hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECTX); - hal2_i_clearbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr)); /* Setup the HAL2 for playback */ hal2_set_dac_rate(hal2); + /* Set endianess */ + if (hal2->dac.format & AFMT_S16_LE) + hal2_i_setbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECTX); + else + hal2_i_clearbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECTX); + /* Set DMA bus */ + hal2_i_setbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr)); /* We are using 1st Bresenham clock generator for playback */ hal2_i_write16(hal2, H2I_DAC_C1, (pbus->pbusnr << H2I_C1_DMA_SHIFT) | (1 << H2I_C1_CLKID_SHIFT) | (hal2->dac.voices << H2I_C1_DATAT_SHIFT)); } -static void hal2_setup_adc(hal2_card_t *hal2) +static void hal2_setup_adc(struct hal2_card *hal2) { unsigned int fifobeg, fifoend, highwater, sample_size; - hal2_pbus_t *pbus = &hal2->adc.pbus; + struct hal2_pbus *pbus = &hal2->adc.pbus; DEBUG("hal2_setup_adc\n"); - - sample_size = 2 * hal2->adc.voices; + sample_size = 2 * hal2->adc.voices; highwater = (sample_size * 2) >> 1; /* halfwords */ fifobeg = (4 * 4) >> 3; /* record is second */ fifoend = (4 * 4 + sample_size * 4) >> 3; /* doublewords */ pbus->ctrl = HPC3_PDMACTRL_RT | HPC3_PDMACTRL_RCV | HPC3_PDMACTRL_LD | - (highwater << 8) | (fifobeg << 16) | (fifoend << 24); + (highwater << 8) | (fifobeg << 16) | (fifoend << 24) | + (hal2->adc.format & AFMT_S16_LE ? HPC3_PDMACTRL_SEL : 0); pbus->pbus->pbdma_ctrl = HPC3_PDMACTRL_LD; hal2_i_clearbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECR); - hal2_i_clearbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr)); /* Setup the HAL2 for record */ hal2_set_adc_rate(hal2); + /* Set endianess */ + if (hal2->adc.format & AFMT_S16_LE) + hal2_i_setbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECR); + else + hal2_i_clearbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECR); + /* Set DMA bus */ + hal2_i_setbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr)); /* We are using 2nd Bresenham clock generator for record */ hal2_i_write16(hal2, H2I_ADC_C1, (pbus->pbusnr << H2I_C1_DMA_SHIFT) | (2 << H2I_C1_CLKID_SHIFT) | (hal2->adc.voices << H2I_C1_DATAT_SHIFT)); } -static void hal2_start_dac(hal2_card_t *hal2) +static dma_addr_t hal2_desc_addr(struct hal2_codec *codec, int i) { - hal2_pbus_t *pbus = &hal2->dac.pbus; + if (--i < 0) + i = codec->desc_count - 1; + return codec->desc[i].desc.pnext; +} - DEBUG("hal2_start_dac\n"); - - pbus->pbus->pbdma_dptr = PHYSADDR(hal2->dac.tail); - pbus->pbus->pbdma_ctrl = pbus->ctrl | HPC3_PDMACTRL_ACT; +static void hal2_start_dac(struct hal2_card *hal2) +{ + struct hal2_codec *dac = &hal2->dac; + struct hal2_pbus *pbus = &dac->pbus; - /* set endianess */ - if (hal2->dac.format & AFMT_S16_LE) - hal2_i_setbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECTX); - else - hal2_i_clearbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECTX); - /* set DMA bus */ - hal2_i_setbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr)); + pbus->pbus->pbdma_dptr = hal2_desc_addr(dac, dac->tail); + pbus->pbus->pbdma_ctrl = pbus->ctrl | HPC3_PDMACTRL_ACT; /* enable DAC */ hal2_i_setbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECTX); } -static void hal2_start_adc(hal2_card_t *hal2) +static void hal2_start_adc(struct hal2_card *hal2) { - hal2_pbus_t *pbus = &hal2->adc.pbus; + struct hal2_codec *adc = &hal2->adc; + struct hal2_pbus *pbus = &adc->pbus; - DEBUG("hal2_start_adc\n"); - - pbus->pbus->pbdma_dptr = PHYSADDR(hal2->adc.head); + pbus->pbus->pbdma_dptr = hal2_desc_addr(adc, adc->head); pbus->pbus->pbdma_ctrl = pbus->ctrl | HPC3_PDMACTRL_ACT; - - /* set endianess */ - if (hal2->adc.format & AFMT_S16_LE) - hal2_i_setbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECR); - else - hal2_i_clearbit16(hal2, H2I_DMA_END, H2I_DMA_END_CODECR); - /* set DMA bus */ - hal2_i_setbit16(hal2, H2I_DMA_DRV, (1 << pbus->pbusnr)); /* enable ADC */ hal2_i_setbit16(hal2, H2I_DMA_PORT_EN, H2I_DMA_PORT_EN_CODECR); } -static inline void hal2_stop_dac(hal2_card_t *hal2) +static inline void hal2_stop_dac(struct hal2_card *hal2) { - DEBUG("hal2_stop_dac\n"); - hal2->dac.pbus.pbus->pbdma_ctrl = HPC3_PDMACTRL_LD; /* The HAL2 itself may remain enabled safely */ } -static inline void hal2_stop_adc(hal2_card_t *hal2) +static inline void hal2_stop_adc(struct hal2_card *hal2) { - DEBUG("hal2_stop_adc\n"); - hal2->adc.pbus.pbus->pbdma_ctrl = HPC3_PDMACTRL_LD; } -#define hal2_alloc_dac_dmabuf(hal2) hal2_alloc_dmabuf(hal2, 1) -#define hal2_alloc_adc_dmabuf(hal2) hal2_alloc_dmabuf(hal2, 0) -static int hal2_alloc_dmabuf(hal2_card_t *hal2, int is_dac) +static int hal2_alloc_dmabuf(struct hal2_codec *codec, int size, + int count, int cntinfo, int dir) { - int buffers, cntinfo; - hal2_buf_t *buf, *prev; - hal2_codec_t *codec; - - if (is_dac) { - codec = &hal2->dac; - buffers = obuffers; - cntinfo = HPCDMA_XIE | HPCDMA_EOX; - } else { - codec = &hal2->adc; - buffers = ibuffers; - cntinfo = HPCDMA_XIE | H2_BUFFER_SIZE; - } - - DEBUG("allocating %d DMA buffers.\n", buffers); - - buf = (hal2_buf_t*) get_zeroed_page(GFP_KERNEL); - if (!buf) + struct hal2_desc *desc, *dma_addr; + int i; + + DEBUG("allocating %dk DMA buffer.\n", size / 1024); + + codec->buffer = (unsigned char *)__get_free_pages(GFP_KERNEL | GFP_DMA, + get_order(size)); + if (!codec->buffer) + return -ENOMEM; + desc = dma_alloc_coherent(NULL, count * sizeof(struct hal2_desc), + (dma_addr_t *)&dma_addr, GFP_KERNEL); + if (!desc) { + free_pages((unsigned long)codec->buffer, get_order(size)); return -ENOMEM; - codec->head = buf; - codec->tail = buf; - - while (--buffers) { - buf->info.desc.pbuf = PHYSADDR(&buf->data); - buf->info.desc.cntinfo = cntinfo; - buf->info.cnt = 0; - prev = buf; - buf = (hal2_buf_t*) get_zeroed_page(GFP_KERNEL); - if (!buf) { - printk("HAL2: Not enough memory for DMA buffer.\n"); - buf = codec->head; - while (buf) { - prev = buf; - free_page((unsigned long) buf); - buf = prev->info.next; - } - return -ENOMEM; - } - prev->info.next = buf; - prev->info.desc.pnext = PHYSADDR(buf); - /* The PBUS can prolly not read this stuff when it's in - * the cache so we have to flush it back to main memory - */ - dma_cache_wback_inv((unsigned long) prev, PAGE_SIZE); } - buf->info.desc.pbuf = PHYSADDR(&buf->data); - buf->info.desc.cntinfo = cntinfo; - buf->info.cnt = 0; - buf->info.next = codec->head; - buf->info.desc.pnext = PHYSADDR(codec->head); - dma_cache_wback_inv((unsigned long) buf, PAGE_SIZE); - + codec->desc = desc; + for (i = 0; i < count; i++) { + desc->desc.pbuf = dma_map_single(NULL, + (void *)(codec->buffer + i * H2_BLOCK_SIZE), + H2_BLOCK_SIZE, dir); + desc->desc.cntinfo = cntinfo; + desc->desc.pnext = (i == count - 1) ? + (u32)dma_addr : (u32)(dma_addr + i + 1); + desc->cnt = 0; + desc++; + } + codec->desc_count = count; + codec->head = codec->tail = 0; return 0; } -#define hal2_free_dac_dmabuf(hal2) hal2_free_dmabuf(hal2, 1) -#define hal2_free_adc_dmabuf(hal2) hal2_free_dmabuf(hal2, 0) -static void hal2_free_dmabuf(hal2_card_t *hal2, int is_dac) +static int hal2_alloc_dac_dmabuf(struct hal2_codec *codec) { - hal2_buf_t *buf, *next; - hal2_codec_t *codec = (is_dac) ? &hal2->dac : &hal2->adc; + return hal2_alloc_dmabuf(codec, H2_DAC_BUFSIZE, + H2_DAC_BUFSIZE / H2_BLOCK_SIZE, + HPCDMA_XIE | HPCDMA_EOX, + DMA_TO_DEVICE); +} - if (!codec->head) - return; - - buf = codec->head->info.next; - codec->head->info.next = NULL; - while (buf) { - next = buf->info.next; - free_page((unsigned long) buf); - buf = next; - } - codec->head = codec->tail = NULL; +static int hal2_alloc_adc_dmabuf(struct hal2_codec *codec) +{ + return hal2_alloc_dmabuf(codec, H2_ADC_BUFSIZE, + H2_ADC_BUFSIZE / H2_BLOCK_SIZE, + HPCDMA_XIE | H2_BLOCK_SIZE, + DMA_TO_DEVICE); +} + +static void hal2_free_dmabuf(struct hal2_codec *codec, int size, int dir) +{ + dma_addr_t dma_addr; + int i; + + dma_addr = codec->desc[codec->desc_count - 1].desc.pnext; + for (i = 0; i < codec->desc_count; i++) + dma_unmap_single(NULL, codec->desc[i].desc.pbuf, + H2_BLOCK_SIZE, dir); + dma_free_coherent(NULL, codec->desc_count * sizeof(struct hal2_desc), + (void *)codec->desc, dma_addr); + free_pages((unsigned long)codec->buffer, get_order(size)); +} + +static void hal2_free_dac_dmabuf(struct hal2_codec *codec) +{ + return hal2_free_dmabuf(codec, H2_DAC_BUFSIZE, DMA_TO_DEVICE); +} + +static void hal2_free_adc_dmabuf(struct hal2_codec *codec) +{ + return hal2_free_dmabuf(codec, H2_ADC_BUFSIZE, DMA_FROM_DEVICE); } /* * Add 'count' bytes to 'buffer' from DMA ring buffers. Return number of * bytes added or -EFAULT if copy_from_user failed. */ -static int hal2_get_buffer(hal2_card_t *hal2, char *buffer, int count) +static int hal2_get_buffer(struct hal2_card *hal2, char *buffer, int count) { unsigned long flags; int size, ret = 0; - hal2_codec_t *adc = &hal2->adc; - - spin_lock_irqsave(&adc->lock, flags); - + unsigned char *buf; + struct hal2_desc *tail; + struct hal2_codec *adc = &hal2->adc; + DEBUG("getting %d bytes ", count); + spin_lock_irqsave(&adc->lock, flags); + tail = &adc->desc[adc->tail]; /* enable DMA stream if there are no data */ - if (!(adc->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT) && - adc->tail->info.cnt == 0) + if (!tail->cnt && !(adc->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT)) hal2_start_adc(hal2); - - DEBUG("... "); - - while (adc->tail->info.cnt > 0 && count > 0) { - size = min(adc->tail->info.cnt, count); + while (tail->cnt > 0 && count > 0) { + size = min((int)tail->cnt, count); + buf = &adc->buffer[(adc->tail + 1) * H2_BLOCK_SIZE - tail->cnt]; spin_unlock_irqrestore(&adc->lock, flags); - - if (copy_to_user(buffer, &adc->tail->data[H2_BUFFER_SIZE-size], - size)) { + dma_sync_single(NULL, tail->desc.pbuf, size, DMA_FROM_DEVICE); + if (copy_to_user(buffer, buf, size)) { ret = -EFAULT; goto out; } - spin_lock_irqsave(&adc->lock, flags); - - adc->tail->info.cnt -= size; + tail->cnt -= size; /* buffer is empty, update tail pointer */ - if (adc->tail->info.cnt == 0) { - adc->tail->info.desc.cntinfo = HPCDMA_XIE | - H2_BUFFER_SIZE; - dma_cache_wback_inv((unsigned long) adc->tail, - sizeof(struct hpc_dma_desc)); - adc->tail = adc->tail->info.next; + if (tail->cnt == 0) { + tail->desc.cntinfo = HPCDMA_XIE | H2_BLOCK_SIZE; + hal2_inc_tail(adc); + tail = &adc->desc[adc->tail]; /* enable DMA stream again if needed */ if (!(adc->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT)) hal2_start_adc(hal2); - } buffer += size; ret += size; @@ -620,9 +665,9 @@ static int hal2_get_buffer(hal2_card_t *hal2, char *buffer, int count) DEBUG("(%d) ", size); } spin_unlock_irqrestore(&adc->lock, flags); -out: +out: DEBUG("\n"); - + return ret; } @@ -630,86 +675,81 @@ out: * Add 'count' bytes from 'buffer' to DMA ring buffers. Return number of * bytes added or -EFAULT if copy_from_user failed. */ -static int hal2_add_buffer(hal2_card_t *hal2, char *buffer, int count) +static int hal2_add_buffer(struct hal2_card *hal2, char *buffer, int count) { unsigned long flags; + unsigned char *buf; int size, ret = 0; - hal2_codec_t *dac = &hal2->dac; - - spin_lock_irqsave(&dac->lock, flags); - + struct hal2_desc *head; + struct hal2_codec *dac = &hal2->dac; + DEBUG("adding %d bytes ", count); - while (dac->head->info.cnt == 0 && count > 0) { - size = min((int)H2_BUFFER_SIZE, count); + spin_lock_irqsave(&dac->lock, flags); + head = &dac->desc[dac->head]; + while (head->cnt == 0 && count > 0) { + size = min((int)H2_BLOCK_SIZE, count); + buf = &dac->buffer[dac->head * H2_BLOCK_SIZE]; spin_unlock_irqrestore(&dac->lock, flags); - - if (copy_from_user(dac->head->data, buffer, size)) { + if (copy_from_user(buf, buffer, size)) { ret = -EFAULT; goto out; } + dma_sync_single(NULL, head->desc.pbuf, size, DMA_TO_DEVICE); spin_lock_irqsave(&dac->lock, flags); - - dac->head->info.desc.cntinfo = size | HPCDMA_XIE; - dac->head->info.cnt = size; - dma_cache_wback_inv((unsigned long) dac->head, - size + PAGE_SIZE - H2_BUFFER_SIZE); + head->desc.cntinfo = size | HPCDMA_XIE; + head->cnt = size; buffer += size; ret += size; count -= size; - dac->head = dac->head->info.next; + hal2_inc_head(dac); + head = &dac->desc[dac->head]; DEBUG("(%d) ", size); } if (!(dac->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT) && ret > 0) hal2_start_dac(hal2); - spin_unlock_irqrestore(&dac->lock, flags); -out: +out: DEBUG("\n"); - + return ret; } #define hal2_reset_dac_pointer(hal2) hal2_reset_pointer(hal2, 1) #define hal2_reset_adc_pointer(hal2) hal2_reset_pointer(hal2, 0) -static void hal2_reset_pointer(hal2_card_t *hal2, int is_dac) +static void hal2_reset_pointer(struct hal2_card *hal2, int is_dac) { - hal2_codec_t *codec = (is_dac) ? &hal2->dac : &hal2->adc; - + int i; + struct hal2_codec *codec = (is_dac) ? &hal2->dac : &hal2->adc; + DEBUG("hal2_reset_pointer\n"); - codec->tail = codec->head; - do { - codec->tail->info.desc.cntinfo = HPCDMA_XIE | (is_dac) ? - HPCDMA_EOX : H2_BUFFER_SIZE; - codec->tail->info.cnt = 0; - dma_cache_wback_inv((unsigned long) codec->tail, - sizeof(struct hpc_dma_desc)); - codec->tail = codec->tail->info.next; - } while (codec->tail != codec->head); + for (i = 0; i < codec->desc_count; i++) { + codec->desc[i].cnt = 0; + codec->desc[i].desc.cntinfo = HPCDMA_XIE | (is_dac) ? + HPCDMA_EOX : H2_BLOCK_SIZE; + } + codec->head = codec->tail = 0; } -static int hal2_sync_dac(hal2_card_t *hal2) +static int hal2_sync_dac(struct hal2_card *hal2) { DECLARE_WAITQUEUE(wait, current); - hal2_codec_t *dac = &hal2->dac; + struct hal2_codec *dac = &hal2->dac; int ret = 0; - signed long timeout = 1000 * H2_BUFFER_SIZE * 2 * dac->voices * + unsigned long flags; + signed long timeout = 1000 * H2_BLOCK_SIZE * 2 * dac->voices * HZ / dac->sample_rate / 900; - down(&dac->sem); - while (dac->pbus.pbus->pbdma_ctrl & HPC3_PDMACTRL_ISACT) { add_wait_queue(&dac->dma_wait, &wait); set_current_state(TASK_INTERRUPTIBLE); - if (!schedule_timeout(timeout)) - /* We may get bogus timeout when system is - * heavily loaded */ - if (dac->tail->info.cnt) { - printk("HAL2: timeout...\n"); - ret = -ETIME; - } + schedule_timeout(timeout); + spin_lock_irqsave(&dac->lock, flags); + if (dac->desc[dac->tail].cnt) + ret = -ETIME; + spin_unlock_irqrestore(&dac->lock, flags); if (signal_pending(current)) ret = -ERESTARTSYS; if (ret) { @@ -719,17 +759,15 @@ static int hal2_sync_dac(hal2_card_t *hal2) remove_wait_queue(&dac->dma_wait, &wait); } - up(&dac->sem); - return ret; } -static int hal2_write_mixer(hal2_card_t *hal2, int index, int vol) +static int hal2_write_mixer(struct hal2_card *hal2, int index, int vol) { - unsigned int l, r; + unsigned int l, r, tmp; DEBUG_MIX("mixer %d write\n", index); - + if (index >= SOUND_MIXER_NRDEVICES || !mixtable[index].avail) return -EINVAL; @@ -739,23 +777,22 @@ static int hal2_write_mixer(hal2_card_t *hal2, int index, int vol) l = vol & 0xff; if (l > 100) l = 100; - + hal2->mixer.volume[mixtable[index].idx] = l | (r << 8); switch (mixtable[index].idx) { - case H2_MIX_OUTPUT_ATT: { + case H2_MIX_OUTPUT_ATT: DEBUG_MIX("output attenuator %d,%d\n", l, r); if (r | l) { - unsigned int tmp = hal2_i_look32(hal2, H2I_DAC_C2); - + tmp = hal2_i_look32(hal2, H2I_DAC_C2); tmp &= ~(H2I_C2_L_ATT_M | H2I_C2_R_ATT_M | H2I_C2_MUTE); /* Attenuator has five bits */ - l = (31 * (100 - l) / 99); - r = (31 * (100 - r) / 99); - + l = 31 * (100 - l) / 99; + r = 31 * (100 - r) / 99; + DEBUG_MIX("left: %d, right %d\n", l, r); tmp |= (l << H2I_C2_L_ATT_SHIFT) & H2I_C2_L_ATT_M; @@ -763,30 +800,80 @@ static int hal2_write_mixer(hal2_card_t *hal2, int index, int vol) hal2_i_write32(hal2, H2I_DAC_C2, tmp); } else hal2_i_setbit32(hal2, H2I_DAC_C2, H2I_C2_MUTE); + break; + case H2_MIX_INPUT_GAIN: + + DEBUG_MIX("input gain %d,%d\n", l, r); + + tmp = hal2_i_look32(hal2, H2I_ADC_C2); + tmp &= ~(H2I_C2_L_GAIN_M | H2I_C2_R_GAIN_M); + + /* Gain control has four bits */ + l = 16 * l / 100; + r = 16 * r / 100; + + DEBUG_MIX("left: %d, right %d\n", l, r); + + tmp |= (l << H2I_C2_L_GAIN_SHIFT) & H2I_C2_L_GAIN_M; + tmp |= (r << H2I_C2_R_GAIN_SHIFT) & H2I_C2_R_GAIN_M; + hal2_i_write32(hal2, H2I_ADC_C2, tmp); + + break; } - case H2_MIX_INPUT_GAIN: { - /* TODO */ - } - } + return 0; } -static void hal2_init_mixer(hal2_card_t *hal2) +static void hal2_init_mixer(struct hal2_card *hal2) { int i; for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) - hal2_write_mixer(hal2, i, 100 | (100 << 8)); - + if (mixtable[i].avail) + hal2->mixer.volume[mixtable[i].idx] = 100 | (100 << 8); + + /* disable attenuator */ + hal2_i_write32(hal2, H2I_DAC_C2, 0); + /* set max input gain */ + hal2_i_write32(hal2, H2I_ADC_C2, H2I_C2_MUTE | + (H2I_C2_L_GAIN_M << H2I_C2_L_GAIN_SHIFT) | + (H2I_C2_R_GAIN_M << H2I_C2_R_GAIN_SHIFT)); + /* set max volume */ + hal2->mixer.master = 0xff; + hal2->vol_regs->left = 0xff; + hal2->vol_regs->right = 0xff; } -static int hal2_mixer_ioctl(hal2_card_t *hal2, unsigned int cmd, +/* + * XXX: later i'll implement mixer for main volume which will be disabled + * by default. enabling it users will be allowed to have master volume level + * control on panel in their favourite X desktop + */ +static void hal2_volume_control(int direction) +{ + unsigned int master = hal2_card[0]->mixer.master; + struct hal2_vol_regs *vol = hal2_card[0]->vol_regs; + + /* volume up */ + if (direction > 0 && master < 0xff) + master++; + /* volume down */ + else if (direction < 0 && master > 0) + master--; + /* TODO: mute/unmute */ + vol->left = master; + vol->right = master; + hal2_card[0]->mixer.master = master; +} + +static int hal2_mixer_ioctl(struct hal2_card *hal2, unsigned int cmd, unsigned long arg) { int val; if (cmd == SOUND_MIXER_INFO) { mixer_info info; + memset(&info, 0, sizeof(info)); strlcpy(info.id, hal2str, sizeof(info.id)); strlcpy(info.name, hal2str, sizeof(info.name)); @@ -797,6 +884,7 @@ static int hal2_mixer_ioctl(hal2_card_t *hal2, unsigned int cmd, } if (cmd == SOUND_OLD_MIXER_INFO) { _old_mixer_info info; + memset(&info, 0, sizeof(info)); strlcpy(info.id, hal2str, sizeof(info.id)); strlcpy(info.name, hal2str, sizeof(info.name)); @@ -820,7 +908,7 @@ static int hal2_mixer_ioctl(hal2_card_t *hal2, unsigned int cmd, case SOUND_MIXER_DEVMASK: case SOUND_MIXER_STEREODEVS: { int i; - + for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++) if (mixtable[i].avail) val |= 1 << i; @@ -836,7 +924,7 @@ static int hal2_mixer_ioctl(hal2_card_t *hal2, unsigned int cmd, /* Read a specific mixer */ default: { int i = _IOC_NR(cmd); - + if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].avail) return -EINVAL; val = hal2->mixer.volume[mixtable[i].idx]; @@ -845,10 +933,10 @@ static int hal2_mixer_ioctl(hal2_card_t *hal2, unsigned int cmd, } return put_user(val, (int *)arg); } - + if (_IOC_DIR(cmd) != (_IOC_WRITE|_IOC_READ)) return -EINVAL; - + hal2->mixer.modcnt++; if (get_user(val, (int *)arg)) @@ -867,7 +955,7 @@ static int hal2_mixer_ioctl(hal2_card_t *hal2, unsigned int cmd, static int hal2_open_mixdev(struct inode *inode, struct file *file) { - hal2_card_t *hal2 = hal2_mixer_find_card(iminor(inode)); + struct hal2_card *hal2 = hal2_mixer_find_card(iminor(inode)); if (hal2) { file->private_data = hal2; @@ -884,31 +972,30 @@ static int hal2_release_mixdev(struct inode *inode, struct file *file) static int hal2_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { - return hal2_mixer_ioctl((hal2_card_t *)file->private_data, cmd, arg); + return hal2_mixer_ioctl((struct hal2_card *)file->private_data, cmd, arg); } - static int hal2_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) { int val; - hal2_card_t *hal2 = (hal2_card_t *) file->private_data; + struct hal2_card *hal2 = (struct hal2_card *) file->private_data; switch (cmd) { case OSS_GETVERSION: return put_user(SOUND_VERSION, (int *)arg); - + case SNDCTL_DSP_SYNC: if (file->f_mode & FMODE_WRITE) return hal2_sync_dac(hal2); return 0; - + case SNDCTL_DSP_SETDUPLEX: return 0; case SNDCTL_DSP_GETCAPS: return put_user(DSP_CAP_DUPLEX | DSP_CAP_MULTI, (int *)arg); - + case SNDCTL_DSP_RESET: if (file->f_mode & FMODE_READ) { hal2_stop_adc(hal2); @@ -936,7 +1023,7 @@ static int hal2_ioctl(struct inode *inode, struct file *file, hal2_set_dac_rate(hal2); } return put_user(val, (int *)arg); - + case SNDCTL_DSP_STEREO: if (get_user(val, (int *)arg)) return -EFAULT; @@ -973,10 +1060,10 @@ static int hal2_ioctl(struct inode *inode, struct file *file, if (file->f_mode & FMODE_WRITE) val = hal2->dac.voices; return put_user(val, (int *)arg); - + case SNDCTL_DSP_GETFMTS: /* Returns a mask */ return put_user(H2_SUPPORTED_FORMATS, (int *)arg); - + case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/ if (get_user(val, (int *)arg)) return -EFAULT; @@ -1001,68 +1088,61 @@ static int hal2_ioctl(struct inode *inode, struct file *file, val = hal2->dac.format; } return put_user(val, (int *)arg); - + case SNDCTL_DSP_POST: return 0; case SNDCTL_DSP_GETOSPACE: { - unsigned long flags; audio_buf_info info; - hal2_buf_t *buf; - hal2_codec_t *dac = &hal2->dac; - + int i; + unsigned long flags; + struct hal2_codec *dac = &hal2->dac; + if (!(file->f_mode & FMODE_WRITE)) return -EINVAL; - - spin_lock_irqsave(&dac->lock, flags); info.fragments = 0; - buf = dac->head; - while (buf->info.cnt == 0 && buf != dac->tail) { - info.fragments++; - buf = buf->info.next; - } + spin_lock_irqsave(&dac->lock, flags); + for (i = 0; i < dac->desc_count; i++) + if (dac->desc[i].cnt == 0) + info.fragments++; spin_unlock_irqrestore(&dac->lock, flags); - - info.fragstotal = obuffers; - info.fragsize = H2_BUFFER_SIZE; + info.fragstotal = dac->desc_count; + info.fragsize = H2_BLOCK_SIZE; info.bytes = info.fragsize * info.fragments; return copy_to_user((void *)arg, &info, sizeof(info)) ? -EFAULT : 0; } - + case SNDCTL_DSP_GETISPACE: { - unsigned long flags; audio_buf_info info; - hal2_buf_t *buf; - hal2_codec_t *adc = &hal2->adc; - + int i; + unsigned long flags; + struct hal2_codec *adc = &hal2->adc; + if (!(file->f_mode & FMODE_READ)) return -EINVAL; - - spin_lock_irqsave(&adc->lock, flags); info.fragments = 0; info.bytes = 0; - buf = adc->tail; - while (buf->info.cnt > 0 && buf != adc->head) { - info.fragments++; - info.bytes += buf->info.cnt; - buf = buf->info.next; - } + spin_lock_irqsave(&adc->lock, flags); + for (i = 0; i < adc->desc_count; i++) + if (adc->desc[i].cnt > 0) { + info.fragments++; + info.bytes += adc->desc[i].cnt; + } spin_unlock_irqrestore(&adc->lock, flags); + info.fragstotal = adc->desc_count; + info.fragsize = H2_BLOCK_SIZE; - info.fragstotal = ibuffers; - info.fragsize = H2_BUFFER_SIZE; - return copy_to_user((void *)arg, &info, sizeof(info)) ? -EFAULT : 0; } case SNDCTL_DSP_NONBLOCK: file->f_flags |= O_NONBLOCK; return 0; - + case SNDCTL_DSP_GETBLKSIZE: - return put_user(H2_BUFFER_SIZE, (int *)arg); - + return put_user(H2_BLOCK_SIZE, (int *)arg); + case SNDCTL_DSP_SETFRAGMENT: return 0; @@ -1083,10 +1163,9 @@ static int hal2_ioctl(struct inode *inode, struct file *file, return put_user(val, (int *)arg); case SOUND_PCM_READ_BITS: - val = 16; - return put_user(val, (int *)arg); + return put_user(16, (int *)arg); } - + return hal2_mixer_ioctl(hal2, cmd, arg); } @@ -1094,27 +1173,27 @@ static ssize_t hal2_read(struct file *file, char *buffer, size_t count, loff_t *ppos) { ssize_t err; - hal2_card_t *hal2 = (hal2_card_t *) file->private_data; - hal2_codec_t *adc = &hal2->adc; + struct hal2_card *hal2 = (struct hal2_card *) file->private_data; + struct hal2_codec *adc = &hal2->adc; - if (count == 0) + if (!count) return 0; if (ppos != &file->f_pos) return -ESPIPE; - - down(&adc->sem); - + if (down_interruptible(&adc->sem)) + return -EINTR; if (file->f_flags & O_NONBLOCK) { err = hal2_get_buffer(hal2, buffer, count); err = err == 0 ? -EAGAIN : err; } else { do { /* ~10% longer */ - signed long timeout = 1000 * H2_BUFFER_SIZE * + signed long timeout = 1000 * H2_BLOCK_SIZE * 2 * adc->voices * HZ / adc->sample_rate / 900; + unsigned long flags; DECLARE_WAITQUEUE(wait, current); ssize_t cnt = 0; - + err = hal2_get_buffer(hal2, buffer, count); if (err > 0) { count -= err; @@ -1125,28 +1204,23 @@ static ssize_t hal2_read(struct file *file, char *buffer, if (count > 0 && err >= 0) { add_wait_queue(&adc->dma_wait, &wait); set_current_state(TASK_INTERRUPTIBLE); - /* Well, it is possible, that interrupt already - * arrived. Hmm, shit happens, we have one more - * buffer filled ;) */ - if (!schedule_timeout(timeout)) - /* We may get bogus timeout when system - * is heavily loaded */ - if (!adc->tail->info.cnt) { - printk("HAL2: timeout...\n"); - hal2_stop_adc(hal2); - hal2_reset_adc_pointer(hal2); - err = -EAGAIN; - } + schedule_timeout(timeout); + spin_lock_irqsave(&adc->lock, flags); + if (!adc->desc[adc->tail].cnt) + err = -EAGAIN; + spin_unlock_irqrestore(&adc->lock, flags); if (signal_pending(current)) err = -ERESTARTSYS; remove_wait_queue(&adc->dma_wait, &wait); + if (err < 0) { + hal2_stop_adc(hal2); + hal2_reset_adc_pointer(hal2); + } } } while (count > 0 && err >= 0); - } - up(&adc->sem); - + return err; } @@ -1155,27 +1229,27 @@ static ssize_t hal2_write(struct file *file, const char *buffer, { ssize_t err; char *buf = (char*) buffer; - hal2_card_t *hal2 = (hal2_card_t *) file->private_data; - hal2_codec_t *dac = &hal2->dac; + struct hal2_card *hal2 = (struct hal2_card *) file->private_data; + struct hal2_codec *dac = &hal2->dac; - if (count == 0) + if (!count) return 0; if (ppos != &file->f_pos) return -ESPIPE; - - down(&dac->sem); - + if (down_interruptible(&dac->sem)) + return -EINTR; if (file->f_flags & O_NONBLOCK) { err = hal2_add_buffer(hal2, buf, count); err = err == 0 ? -EAGAIN : err; } else { do { /* ~10% longer */ - signed long timeout = 1000 * H2_BUFFER_SIZE * + signed long timeout = 1000 * H2_BLOCK_SIZE * 2 * dac->voices * HZ / dac->sample_rate / 900; + unsigned long flags; DECLARE_WAITQUEUE(wait, current); ssize_t cnt = 0; - + err = hal2_add_buffer(hal2, buf, count); if (err > 0) { count -= err; @@ -1186,25 +1260,21 @@ static ssize_t hal2_write(struct file *file, const char *buffer, if (count > 0 && err >= 0) { add_wait_queue(&dac->dma_wait, &wait); set_current_state(TASK_INTERRUPTIBLE); - /* Well, it is possible, that interrupt already - * arrived. Hmm, shit happens, we have one more - * buffer free ;) */ - if (!schedule_timeout(timeout)) - /* We may get bogus timeout when system - * is heavily loaded */ - if (dac->head->info.cnt) { - printk("HAL2: timeout...\n"); - hal2_stop_dac(hal2); - hal2_reset_dac_pointer(hal2); - err = -EAGAIN; - } + schedule_timeout(timeout); + spin_lock_irqsave(&dac->lock, flags); + if (dac->desc[dac->head].cnt) + err = -EAGAIN; + spin_unlock_irqrestore(&dac->lock, flags); if (signal_pending(current)) err = -ERESTARTSYS; remove_wait_queue(&dac->dma_wait, &wait); + if (err < 0) { + hal2_stop_dac(hal2); + hal2_reset_dac_pointer(hal2); + } } } while (count > 0 && err >= 0); } - up(&dac->sem); return err; @@ -1214,99 +1284,96 @@ static unsigned int hal2_poll(struct file *file, struct poll_table_struct *wait) { unsigned long flags; unsigned int mask = 0; - hal2_card_t *hal2 = (hal2_card_t *) file->private_data; + struct hal2_card *hal2 = (struct hal2_card *) file->private_data; if (file->f_mode & FMODE_READ) { - hal2_codec_t *adc = &hal2->adc; - - poll_wait(file, &hal2->adc.dma_wait, wait); + struct hal2_codec *adc = &hal2->adc; + + poll_wait(file, &adc->dma_wait, wait); spin_lock_irqsave(&adc->lock, flags); - if (adc->tail->info.cnt > 0) + if (adc->desc[adc->tail].cnt > 0) mask |= POLLIN; spin_unlock_irqrestore(&adc->lock, flags); } - + if (file->f_mode & FMODE_WRITE) { - hal2_codec_t *dac = &hal2->dac; - + struct hal2_codec *dac = &hal2->dac; + poll_wait(file, &dac->dma_wait, wait); spin_lock_irqsave(&dac->lock, flags); - if (dac->head->info.cnt == 0) + if (dac->desc[dac->head].cnt == 0) mask |= POLLOUT; spin_unlock_irqrestore(&dac->lock, flags); } - + return mask; } static int hal2_open(struct inode *inode, struct file *file) { int err; - hal2_card_t *hal2 = hal2_dsp_find_card(iminor(inode)); + struct hal2_card *hal2 = hal2_dsp_find_card(iminor(inode)); - DEBUG("opening audio device.\n"); - - if (!hal2) { - printk("HAL2: Whee?! Open door and go away!\n"); + if (!hal2) return -ENODEV; - } file->private_data = hal2; - if (file->f_mode & FMODE_READ) { - if (hal2->adc.usecount) + struct hal2_codec *adc = &hal2->adc; + + if (adc->usecount) return -EBUSY; - /* OSS spec wanted us to use 8 bit, 8 kHz mono by default, * but HAL2 can't do 8bit audio */ - hal2->adc.format = AFMT_S16_BE; - hal2->adc.voices = 1; - hal2->adc.sample_rate = hal2_compute_rate(&hal2->adc, 8000); + adc->format = AFMT_S16_BE; + adc->voices = 1; + adc->sample_rate = hal2_compute_rate(adc, 8000); hal2_set_adc_rate(hal2); - - /* alloc DMA buffers */ - err = hal2_alloc_adc_dmabuf(hal2); + err = hal2_alloc_adc_dmabuf(adc); if (err) return err; hal2_setup_adc(hal2); - - hal2->adc.usecount++; + adc->usecount++; } - if (file->f_mode & FMODE_WRITE) { - if (hal2->dac.usecount) - return -EBUSY; + struct hal2_codec *dac = &hal2->dac; - hal2->dac.format = AFMT_S16_BE; - hal2->dac.voices = 1; - hal2->dac.sample_rate = hal2_compute_rate(&hal2->dac, 8000); + if (dac->usecount) + return -EBUSY; + dac->format = AFMT_S16_BE; + dac->voices = 1; + dac->sample_rate = hal2_compute_rate(dac, 8000); hal2_set_dac_rate(hal2); - - /* alloc DMA buffers */ - err = hal2_alloc_dac_dmabuf(hal2); + err = hal2_alloc_dac_dmabuf(dac); if (err) return err; hal2_setup_dac(hal2); - - hal2->dac.usecount++; + dac->usecount++; } - + return 0; } static int hal2_release(struct inode *inode, struct file *file) { - hal2_card_t *hal2 = (hal2_card_t *) file->private_data; + struct hal2_card *hal2 = (struct hal2_card *) file->private_data; if (file->f_mode & FMODE_READ) { + struct hal2_codec *adc = &hal2->adc; + + down(&adc->sem); hal2_stop_adc(hal2); - hal2_free_adc_dmabuf(hal2); - hal2->adc.usecount--; + hal2_free_adc_dmabuf(adc); + adc->usecount--; + up(&adc->sem); } - if (file->f_mode & FMODE_WRITE) { + struct hal2_codec *dac = &hal2->dac; + + down(&dac->sem); hal2_sync_dac(hal2); - hal2_free_dac_dmabuf(hal2); - hal2->dac.usecount--; + hal2_free_dac_dmabuf(dac); + dac->usecount--; + up(&dac->sem); } return 0; @@ -1331,159 +1398,155 @@ static struct file_operations hal2_mixer_fops = { .release = hal2_release_mixdev, }; -static int hal2_request_irq(hal2_card_t *hal2, int irq) -{ - unsigned long flags; - int ret = 0; - - save_and_cli(flags); - if (request_irq(irq, hal2_interrupt, SA_SHIRQ, hal2str, hal2)) { - printk(KERN_ERR "HAL2: Can't get irq %d\n", irq); - ret = -EAGAIN; - } - restore_flags(flags); - return ret; -} - -static int hal2_alloc_resources(hal2_card_t *hal2, struct hpc3_regs *hpc3) -{ - hal2_pbus_t *pbus; - - pbus = &hal2->dac.pbus; - pbus->pbusnr = 0; - pbus->pbus = &hpc3->pbdma[pbus->pbusnr]; - /* The spec says that we should write 0x08248844 but that's WRONG. HAL2 - * does 8 bit DMA, not 16 bit even if it generates 16 bit audio. */ - hpc3->pbus_dmacfgs[pbus->pbusnr][0] = 0x08208844; /* Magic :-) */ - - pbus = &hal2->adc.pbus; - pbus->pbusnr = 1; - pbus->pbus = &hpc3->pbdma[pbus->pbusnr]; - hpc3->pbus_dmacfgs[pbus->pbusnr][0] = 0x08208844; /* Magic :-) */ - - return hal2_request_irq(hal2, SGI_HPCDMA_IRQ); -} - -static void hal2_init_codec(hal2_codec_t *codec) +static void hal2_init_codec(struct hal2_codec *codec, struct hpc3_regs *hpc3, + int index) { + codec->pbus.pbusnr = index; + codec->pbus.pbus = &hpc3->pbdma[index]; init_waitqueue_head(&codec->dma_wait); init_MUTEX(&codec->sem); spin_lock_init(&codec->lock); } -static void hal2_free_resources(hal2_card_t *hal2) -{ - free_irq(SGI_HPCDMA_IRQ, hal2); -} - -static int hal2_detect(hal2_card_t *hal2) +static int hal2_detect(struct hal2_card *hal2) { unsigned short board, major, minor; unsigned short rev; /* reset HAL2 */ hal2_isr_write(hal2, 0); - /* release reset */ hal2_isr_write(hal2, H2_ISR_GLOBAL_RESET_N | H2_ISR_CODEC_RESET_N); hal2_i_write16(hal2, H2I_RELAY_C, H2I_RELAY_C_STATE); - - if ((rev = hal2_rev_look(hal2)) & H2_REV_AUDIO_PRESENT) { - DEBUG("HAL2: no device detected, rev: 0x%04hx\n", rev); + if ((rev = hal2_rev_look(hal2)) & H2_REV_AUDIO_PRESENT) return -ENODEV; - } board = (rev & H2_REV_BOARD_M) >> 12; major = (rev & H2_REV_MAJOR_CHIP_M) >> 4; minor = (rev & H2_REV_MINOR_CHIP_M); - printk("SGI HAL2 Processor revision %i.%i.%i detected\n", + printk(KERN_INFO "SGI HAL2 revision %i.%i.%i\n", board, major, minor); - if (board != 4 || major != 1 || minor != 0) - printk( "Other revision than 4.1.0 detected. " - "Your card is probably unsupported\n"); - return 0; } -static int hal2_init_card(hal2_card_t **phal2, struct hpc3_regs *hpc3, - unsigned long hpc3_base) +static int hal2_init_card(struct hal2_card **phal2, struct hpc3_regs *hpc3) { int ret = 0; - hal2_card_t *hal2; - - hal2 = (hal2_card_t *) kmalloc(sizeof(hal2_card_t), GFP_KERNEL); + struct hal2_card *hal2; + + hal2 = (struct hal2_card *) kmalloc(sizeof(struct hal2_card), GFP_KERNEL); if (!hal2) return -ENOMEM; - memset(hal2, 0, sizeof(hal2_card_t)); + memset(hal2, 0, sizeof(struct hal2_card)); - hal2->ctl_regs = (hal2_ctl_regs_t *) KSEG1ADDR(hpc3_base + H2_CTL_PIO); - hal2->aes_regs = (hal2_aes_regs_t *) KSEG1ADDR(hpc3_base + H2_AES_PIO); - hal2->vol_regs = (hal2_vol_regs_t *) KSEG1ADDR(hpc3_base + H2_VOL_PIO); - hal2->syn_regs = (hal2_syn_regs_t *) KSEG1ADDR(hpc3_base + H2_SYN_PIO); + hal2->ctl_regs = (struct hal2_ctl_regs *)hpc3->pbus_extregs[0]; + hal2->aes_regs = (struct hal2_aes_regs *)hpc3->pbus_extregs[1]; + hal2->vol_regs = (struct hal2_vol_regs *)hpc3->pbus_extregs[2]; + hal2->syn_regs = (struct hal2_syn_regs *)hpc3->pbus_extregs[3]; if (hal2_detect(hal2) < 0) { - printk("HAL2 audio processor not found\n"); ret = -ENODEV; - goto fail1; + goto free_card; } - hal2_init_codec(&hal2->dac); - hal2_init_codec(&hal2->adc); + hal2_init_codec(&hal2->dac, hpc3, 0); + hal2_init_codec(&hal2->adc, hpc3, 1); - ret = hal2_alloc_resources(hal2, hpc3); - if (ret) - goto fail1; - - hal2_init_mixer(hal2); + /* + * All DMA channel interfaces in HAL2 are designed to operate with + * PBUS programmed for 2 cycles in D3, 2 cycles in D4 and 2 cycles + * in D5. HAL2 is a 16-bit device which can accept both big and little + * endian format. It assumes that even address bytes are on high + * portion of PBUS (15:8) and assumes that HPC3 is programmed to + * accept a live (unsynchronized) version of P_DREQ_N from HAL2. + */ +#define HAL2_PBUS_DMACFG ((0 << HPC3_DMACFG_D3R_SHIFT) | \ + (2 << HPC3_DMACFG_D4R_SHIFT) | \ + (2 << HPC3_DMACFG_D5R_SHIFT) | \ + (0 << HPC3_DMACFG_D3W_SHIFT) | \ + (2 << HPC3_DMACFG_D4W_SHIFT) | \ + (2 << HPC3_DMACFG_D5W_SHIFT) | \ + HPC3_DMACFG_DS16 | \ + HPC3_DMACFG_EVENHI | \ + HPC3_DMACFG_RTIME | \ + (8 << HPC3_DMACFG_BURST_SHIFT) | \ + HPC3_DMACFG_DRQLIVE) + /* + * Ignore what's mentioned in the specification and write value which + * works in The Real World (TM) + */ + hpc3->pbus_dmacfg[hal2->dac.pbus.pbusnr][0] = 0x8208844; + hpc3->pbus_dmacfg[hal2->adc.pbus.pbusnr][0] = 0x8208844; + + if (request_irq(SGI_HPCDMA_IRQ, hal2_interrupt, SA_SHIRQ, + hal2str, hal2)) { + printk(KERN_ERR "HAL2: Can't get irq %d\n", SGI_HPCDMA_IRQ); + ret = -EAGAIN; + goto free_card; + } hal2->dev_dsp = register_sound_dsp(&hal2_audio_fops, -1); if (hal2->dev_dsp < 0) { ret = hal2->dev_dsp; - goto fail2; + goto free_irq; } hal2->dev_mixer = register_sound_mixer(&hal2_mixer_fops, -1); if (hal2->dev_mixer < 0) { ret = hal2->dev_mixer; - goto fail3; + goto unregister_dsp; } - + + hal2_init_mixer(hal2); + *phal2 = hal2; return 0; -fail3: +unregister_dsp: unregister_sound_dsp(hal2->dev_dsp); -fail2: - hal2_free_resources(hal2); -fail1: +free_irq: + free_irq(SGI_HPCDMA_IRQ, hal2); +free_card: kfree(hal2); - + return ret; } +extern void (*indy_volume_button)(int); + /* - * We are assuming only one HAL2 card. If you ever meet machine with more than - * one, tell immediately about it to someone. Preferably to me. --ladis + * Assuming only one HAL2 card. Mail me if you ever meet machine with + * more than one. */ static int __init init_hal2(void) { - int i; + int i, error; for (i = 0; i < MAXCARDS; i++) hal2_card[i] = NULL; - return hal2_init_card(&hal2_card[0], hpc3c0, HPC3_CHIP0_PBASE); + error = hal2_init_card(&hal2_card[0], hpc3c0); + + /* let Indy's volume buttons work */ + if (!error && !ip22_is_fullhouse()) + indy_volume_button = hal2_volume_control; + + return error; + } static void __exit exit_hal2(void) { int i; + + /* unregister volume butons callback function */ + indy_volume_button = NULL; for (i = 0; i < MAXCARDS; i++) if (hal2_card[i]) { - hal2_free_resources(hal2_card[i]); + free_irq(SGI_HPCDMA_IRQ, hal2_card[i]); unregister_sound_dsp(hal2_card[i]->dev_dsp); unregister_sound_mixer(hal2_card[i]->dev_mixer); kfree(hal2_card[i]); diff --git a/sound/oss/hal2.h b/sound/oss/hal2.h index 256be453d39b..2bd3b52d8a37 100644 --- a/sound/oss/hal2.h +++ b/sound/oss/hal2.h @@ -4,7 +4,7 @@ /* * Driver for HAL2 sound processors * Copyright (c) 1999 Ulf Carlsson <ulfc@bun.falkenberg.se> - * Copyright (c) 2001 Ladislav Michl <ladis@psi.cz> + * Copyright (c) 2001, 2002, 2003 Ladislav Michl <ladis@linux-mips.org> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -22,16 +22,10 @@ */ #include <asm/addrspace.h> -#include <asm/sgi/sgihpc.h> +#include <asm/sgi/hpc3.h> #include <linux/spinlock.h> #include <linux/types.h> -#define H2_HAL2_BASE 0x58000 -#define H2_CTL_PIO (H2_HAL2_BASE + 0 * 0x400) -#define H2_AES_PIO (H2_HAL2_BASE + 1 * 0x400) -#define H2_VOL_PIO (H2_HAL2_BASE + 2 * 0x400) -#define H2_SYN_PIO (H2_HAL2_BASE + 3 * 0x400) - /* Indirect status register */ #define H2_ISR_TSTATUS 0x01 /* RO: transaction status 1=busy */ @@ -207,122 +201,48 @@ #define H2I_UTIME_2_LD 0xffff /* seconds, LSB's */ #define H2I_UTIME_3_LD 0xffff /* seconds, MSB's */ -typedef volatile u32 hal2_reg_t; - -typedef struct stru_hal2_ctl_regs hal2_ctl_regs_t; -struct stru_hal2_ctl_regs { - hal2_reg_t _unused0[4]; - hal2_reg_t isr; /* 0x10 Status Register */ - hal2_reg_t _unused1[3]; - hal2_reg_t rev; /* 0x20 Revision Register */ - hal2_reg_t _unused2[3]; - hal2_reg_t iar; /* 0x30 Indirect Address Register */ - hal2_reg_t _unused3[3]; - hal2_reg_t idr0; /* 0x40 Indirect Data Register 0 */ - hal2_reg_t _unused4[3]; - hal2_reg_t idr1; /* 0x50 Indirect Data Register 1 */ - hal2_reg_t _unused5[3]; - hal2_reg_t idr2; /* 0x60 Indirect Data Register 2 */ - hal2_reg_t _unused6[3]; - hal2_reg_t idr3; /* 0x70 Indirect Data Register 3 */ +struct hal2_ctl_regs { + u32 _unused0[4]; + volatile u32 isr; /* 0x10 Status Register */ + u32 _unused1[3]; + volatile u32 rev; /* 0x20 Revision Register */ + u32 _unused2[3]; + volatile u32 iar; /* 0x30 Indirect Address Register */ + u32 _unused3[3]; + volatile u32 idr0; /* 0x40 Indirect Data Register 0 */ + u32 _unused4[3]; + volatile u32 idr1; /* 0x50 Indirect Data Register 1 */ + u32 _unused5[3]; + volatile u32 idr2; /* 0x60 Indirect Data Register 2 */ + u32 _unused6[3]; + volatile u32 idr3; /* 0x70 Indirect Data Register 3 */ }; -typedef struct stru_hal2_aes_regs hal2_aes_regs_t; -struct stru_hal2_aes_regs { - hal2_reg_t rx_stat[2]; /* Status registers */ - hal2_reg_t rx_cr[2]; /* Control registers */ - hal2_reg_t rx_ud[4]; /* User data window */ - hal2_reg_t rx_st[24]; /* Channel status data */ +struct hal2_aes_regs { + volatile u32 rx_stat[2]; /* Status registers */ + volatile u32 rx_cr[2]; /* Control registers */ + volatile u32 rx_ud[4]; /* User data window */ + volatile u32 rx_st[24]; /* Channel status data */ - hal2_reg_t tx_stat[1]; /* Status register */ - hal2_reg_t tx_cr[3]; /* Control registers */ - hal2_reg_t tx_ud[4]; /* User data window */ - hal2_reg_t tx_st[24]; /* Channel status data */ -}; - -typedef struct stru_hal2_vol_regs hal2_vol_regs_t; -struct stru_hal2_vol_regs { - hal2_reg_t right; /* 0x00 Right volume */ - hal2_reg_t left; /* 0x04 Left volume */ -}; - -typedef struct stru_hal2_syn_regs hal2_syn_regs_t; -struct stru_hal2_syn_regs { - hal2_reg_t _unused0[2]; - hal2_reg_t page; /* DOC Page register */ - hal2_reg_t regsel; /* DOC Register selection */ - hal2_reg_t dlow; /* DOC Data low */ - hal2_reg_t dhigh; /* DOC Data high */ - hal2_reg_t irq; /* IRQ Status */ - hal2_reg_t dram; /* DRAM Access */ -}; - -/* HAL2 specific structures */ - -typedef struct stru_hal2_pbus hal2_pbus_t; -struct stru_hal2_pbus { - struct hpc3_pbus_dmacregs *pbus; - int pbusnr; - unsigned int ctrl; /* Current state of pbus->pbdma_ctrl */ -}; - -typedef struct stru_hal2_binfo hal2_binfo_t; -typedef struct stru_hal2_buffer hal2_buf_t; -struct stru_hal2_binfo { - volatile struct hpc_dma_desc desc; - hal2_buf_t *next; /* pointer to next buffer */ - int cnt; /* bytes in buffer */ -}; -#define H2_BUFFER_SIZE (PAGE_SIZE - \ - ((sizeof(hal2_binfo_t) - 1) / 8 + 1) * 8) -struct stru_hal2_buffer { - hal2_binfo_t info; - char data[H2_BUFFER_SIZE] __attribute__((aligned(8))); + volatile u32 tx_stat[1]; /* Status register */ + volatile u32 tx_cr[3]; /* Control registers */ + volatile u32 tx_ud[4]; /* User data window */ + volatile u32 tx_st[24]; /* Channel status data */ }; -typedef struct stru_hal2_codec hal2_codec_t; -struct stru_hal2_codec { - hal2_buf_t *head; - hal2_buf_t *tail; - hal2_pbus_t pbus; - unsigned int format; /* Audio data format */ - int voices; /* mono/stereo */ - unsigned int sample_rate; - unsigned int master; /* Master frequency */ - unsigned short mod; /* MOD value */ - unsigned short inc; /* INC value */ - - wait_queue_head_t dma_wait; - spinlock_t lock; - struct semaphore sem; - - int usecount; /* recording and playback are - * independent */ +struct hal2_vol_regs { + volatile u32 right; /* Right volume */ + volatile u32 left; /* Left volume */ }; -#define H2_MIX_OUTPUT_ATT 0 -#define H2_MIX_INPUT_GAIN 1 -#define H2_MIXERS 2 -typedef struct stru_hal2_mixer hal2_mixer_t; -struct stru_hal2_mixer { - int modcnt; - unsigned int volume[H2_MIXERS]; -}; - -typedef struct stru_hal2_card hal2_card_t; -struct stru_hal2_card { - int dev_dsp; /* audio device */ - int dev_mixer; /* mixer device */ - int dev_midi; /* midi device */ - - hal2_ctl_regs_t *ctl_regs; /* HAL2 ctl registers */ - hal2_aes_regs_t *aes_regs; /* HAL2 vol registers */ - hal2_vol_regs_t *vol_regs; /* HAL2 aes registers */ - hal2_syn_regs_t *syn_regs; /* HAL2 syn registers */ - - hal2_codec_t dac; - hal2_codec_t adc; - hal2_mixer_t mixer; +struct hal2_syn_regs { + u32 _unused0[2]; + volatile u32 page; /* DOC Page register */ + volatile u32 regsel; /* DOC Register selection */ + volatile u32 dlow; /* DOC Data low */ + volatile u32 dhigh; /* DOC Data high */ + volatile u32 irq; /* IRQ Status */ + volatile u32 dram; /* DRAM Access */ }; -#endif /* __HAL2_H */ +#endif /* __HAL2_H */ diff --git a/sound/pci/nm256/nm256.c b/sound/pci/nm256/nm256.c index ee3b246bbef0..57b7584a7d3b 100644 --- a/sound/pci/nm256/nm256.c +++ b/sound/pci/nm256/nm256.c @@ -1509,6 +1509,10 @@ snd_nm256_create(snd_card_t *card, struct pci_dev *pci, /* this workaround will cause lock-up after suspend/resume on Sony PCG-F305 */ chip->latitude_workaround = 0; } + if (subsystem_vendor == 0x1028 && subsystem_device == 0x0080) { + /* this workaround will cause lock-up after suspend/resume on a Dell laptop */ + chip->latitude_workaround = 0; + } snd_nm256_init_chip(chip); |