diff options
| -rw-r--r-- | drivers/net/dsa/microchip/ksz_common.c | 2 | ||||
| -rw-r--r-- | drivers/net/dsa/microchip/ksz_common.h | 1 | ||||
| -rw-r--r-- | drivers/net/dsa/microchip/ksz_ptp.c | 2 | ||||
| -rw-r--r-- | drivers/net/dsa/microchip/ksz_ptp_reg.h | 3 |
4 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c index 7af008cafccf..cbd918c0add3 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -573,6 +573,7 @@ static const u16 ksz8463_regs[] = { [PTP_RTC_NANOSEC] = 0x0604, [PTP_RTC_SEC] = 0x0608, [PTP_RTC_SUB_NANOSEC] = 0x060C, + [PTP_SUBNANOSEC_RATE] = 0x0610, }; static const u32 ksz8463_masks[] = { @@ -811,6 +812,7 @@ static const u16 ksz9477_regs[] = { [PTP_RTC_SUB_NANOSEC] = 0x0502, [PTP_RTC_NANOSEC] = 0x0504, [PTP_RTC_SEC] = 0x0508, + [PTP_SUBNANOSEC_RATE] = 0x050C, }; static const u32 ksz9477_masks[] = { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/microchip/ksz_common.h index d1baa3ce09b5..16a7600789e3 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -275,6 +275,7 @@ enum ksz_regs { PTP_RTC_NANOSEC, PTP_RTC_SEC, PTP_RTC_SUB_NANOSEC, + PTP_SUBNANOSEC_RATE, }; enum ksz_masks { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchip/ksz_ptp.c index 3766d8bde478..538162e3e456 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -742,7 +742,7 @@ static int ksz_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) if (!negative) data32 |= PTP_RATE_DIR; - ret = ksz_write32(dev, REG_PTP_SUBNANOSEC_RATE, data32); + ret = ksz_write32(dev, regs[PTP_SUBNANOSEC_RATE], data32); if (ret) goto unlock; diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/microchip/ksz_ptp_reg.h index 41891ddadaa3..1e823b1a19da 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -28,8 +28,7 @@ #define PTP_RTC_SUB_NANOSEC_M 0x0007 #define PTP_RTC_0NS 0x00 -#define REG_PTP_SUBNANOSEC_RATE 0x050C - +/* REG_PTP_SUBNANOSEC_RATE */ #define PTP_SUBNANOSEC_M 0x3FFFFFFF #define PTP_RATE_DIR BIT(31) #define PTP_TMP_RATE_ENABLE BIT(30) |
