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-rw-r--r--arch/mips/Kconfig17
-rw-r--r--arch/mips/include/asm/bitops.h8
-rw-r--r--arch/mips/kernel/asm-offsets.c2
3 files changed, 8 insertions, 19 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index caf508f6e9ec..608e01ed6cff 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -51,7 +51,6 @@ config MIPS
select GENERIC_SMP_IDLE_THREAD
select GENERIC_IDLE_POLL_SETUP
select GENERIC_TIME_VSYSCALL
- select GENERIC_VDSO_DATA_STORE
select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
select HAS_IOPORT if !NO_IOPORT_MAP || ISA
select HAVE_ARCH_COMPILER_H
@@ -2223,7 +2222,7 @@ config MIPS_MT_SMP
select SMP
select SMP_UP
select SYS_SUPPORTS_SMP
- select SYS_SUPPORTS_SCHED_SMT
+ select ARCH_SUPPORTS_SCHED_SMT
select MIPS_PERF_SHARED_TC_COUNTERS
help
This is a kernel model which is known as SMVP. This is supported
@@ -2235,18 +2234,6 @@ config MIPS_MT_SMP
config MIPS_MT
bool
-config SCHED_SMT
- bool "SMT (multithreading) scheduler support"
- depends on SYS_SUPPORTS_SCHED_SMT
- default n
- help
- SMT scheduler support improves the CPU scheduler's decision making
- when dealing with MIPS MT enabled cores at a cost of slightly
- increased overhead in some places. If unsure say N here.
-
-config SYS_SUPPORTS_SCHED_SMT
- bool
-
config SYS_SUPPORTS_MULTITHREADING
bool
@@ -2318,7 +2305,7 @@ config MIPS_CPS
select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
select SYS_SUPPORTS_HOTPLUG_CPU
- select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
+ select ARCH_SUPPORTS_SCHED_SMT if CPU_MIPSR6
select SYS_SUPPORTS_SMP
select WEAK_ORDERING
select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 89f73d1a4ea4..42f88452c920 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -327,7 +327,7 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *
* Return the bit position (0..63) of the most significant 1 bit in a word
* Returns -1 if no 1 bit exists
*/
-static __always_inline unsigned long __fls(unsigned long word)
+static __always_inline __attribute_const__ unsigned long __fls(unsigned long word)
{
int num;
@@ -393,7 +393,7 @@ static __always_inline unsigned long __fls(unsigned long word)
* Returns 0..SZLONG-1
* Undefined if no bit exists, so code should check against 0 first.
*/
-static __always_inline unsigned long __ffs(unsigned long word)
+static __always_inline __attribute_const__ unsigned long __ffs(unsigned long word)
{
return __fls(word & -word);
}
@@ -405,7 +405,7 @@ static __always_inline unsigned long __ffs(unsigned long word)
* This is defined the same way as ffs.
* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
*/
-static inline int fls(unsigned int x)
+static inline __attribute_const__ int fls(unsigned int x)
{
int r;
@@ -458,7 +458,7 @@ static inline int fls(unsigned int x)
* the libc and compiler builtin ffs routines, therefore
* differs in spirit from the below ffz (man ffs).
*/
-static inline int ffs(int word)
+static inline __attribute_const__ int ffs(int word)
{
if (!word)
return 0;
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 1e29efcba46e..5debd9a3854a 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -9,6 +9,8 @@
* Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc.
*/
+#define COMPILE_OFFSETS
+
#include <linux/compat.h>
#include <linux/types.h>
#include <linux/sched.h>