diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 79 | 
1 files changed, 76 insertions, 3 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 7681f79f462e..43613569801b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c @@ -50,6 +50,7 @@  #include "amdgpu_ras.h"  #include "amdgpu_xgmi.h"  #include "amdgpu_reset.h" +#include "../amdxcp/amdgpu_xcp_drv.h"  /*   * KMS wrapper. @@ -110,9 +111,11 @@   *   3.52.0 - Add AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD, add device_info fields:   *            tcp_cache_size, num_sqc_per_wgp, sqc_data_cache_size, sqc_inst_cache_size,   *            gl1c_cache_size, gl2c_cache_size, mall_size, enabled_rb_pipes_mask_hi + *   3.53.0 - Support for GFX11 CP GFX shadowing + *   3.54.0 - Add AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS support   */  #define KMS_DRIVER_MAJOR	3 -#define KMS_DRIVER_MINOR	52 +#define KMS_DRIVER_MINOR	54  #define KMS_DRIVER_PATCHLEVEL	0  unsigned int amdgpu_vram_limit = UINT_MAX; @@ -150,7 +153,7 @@ uint amdgpu_pg_mask = 0xffffffff;  uint amdgpu_sdma_phase_quantum = 32;  char *amdgpu_disable_cu;  char *amdgpu_virtual_display; - +bool enforce_isolation;  /*   * OverDrive(bit 14) disabled by default   * GFX DCS(bit 19) disabled by default @@ -191,6 +194,7 @@ int amdgpu_smartshift_bias;  int amdgpu_use_xgmi_p2p = 1;  int amdgpu_vcnfw_log;  int amdgpu_sg_display = -1; /* auto */ +int amdgpu_user_partt_mode = AMDGPU_AUTO_COMPUTE_PARTITION_MODE;  static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work); @@ -820,6 +824,13 @@ module_param_named(no_queue_eviction_on_vm_fault, amdgpu_no_queue_eviction_on_vm  #endif  /** + * DOC: mtype_local (int) + */ +int amdgpu_mtype_local; +MODULE_PARM_DESC(mtype_local, "MTYPE for local memory (0 = MTYPE_RW (default), 1 = MTYPE_NC, 2 = MTYPE_CC)"); +module_param_named(mtype_local, amdgpu_mtype_local, int, 0444); + +/**   * DOC: pcie_p2p (bool)   * Enable PCIe P2P (requires large-BAR). Default value: true (on)   */ @@ -948,6 +959,28 @@ MODULE_PARM_DESC(smu_pptable_id,  	"specify pptable id to be used (-1 = auto(default) value, 0 = use pptable from vbios, > 0 = soft pptable id)");  module_param_named(smu_pptable_id, amdgpu_smu_pptable_id, int, 0444); +/** + * DOC: partition_mode (int) + * Used to override the default SPX mode. + */ +MODULE_PARM_DESC( +	user_partt_mode, +	"specify partition mode to be used (-2 = AMDGPU_AUTO_COMPUTE_PARTITION_MODE(default value) \ +						0 = AMDGPU_SPX_PARTITION_MODE, \ +						1 = AMDGPU_DPX_PARTITION_MODE, \ +						2 = AMDGPU_TPX_PARTITION_MODE, \ +						3 = AMDGPU_QPX_PARTITION_MODE, \ +						4 = AMDGPU_CPX_PARTITION_MODE)"); +module_param_named(user_partt_mode, amdgpu_user_partt_mode, uint, 0444); + + +/** + * DOC: enforce_isolation (bool) + * enforce process isolation between graphics and compute via using the same reserved vmid. + */ +module_param(enforce_isolation, bool, 0444); +MODULE_PARM_DESC(enforce_isolation, "enforce process isolation between graphics and compute . enforce_isolation = on"); +  /* These devices are not supported by amdgpu.   * They are supported by the mach64, r128, radeon drivers   */ @@ -1615,6 +1648,7 @@ static const u16 amdgpu_unsupported_pciidlist[] = {  	0x5874,  	0x5940,  	0x5941, +	0x5b70,  	0x5b72,  	0x5b73,  	0x5b74, @@ -1660,7 +1694,7 @@ static const u16 amdgpu_unsupported_pciidlist[] = {  };  static const struct pci_device_id pciidlist[] = { -#ifdef  CONFIG_DRM_AMDGPU_SI +#ifdef CONFIG_DRM_AMDGPU_SI  	{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},  	{0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},  	{0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI}, @@ -2017,6 +2051,11 @@ static const struct pci_device_id pciidlist[] = {  	  .class_mask = 0xffffff,  	  .driver_data = CHIP_IP_DISCOVERY }, +	{ PCI_DEVICE(0x1002, PCI_ANY_ID), +	  .class = PCI_CLASS_ACCELERATOR_PROCESSING << 8, +	  .class_mask = 0xffffff, +	  .driver_data = CHIP_IP_DISCOVERY }, +  	{0, 0, 0}  }; @@ -2161,6 +2200,10 @@ retry_init:  		goto err_pci;  	} +	ret = amdgpu_xcp_dev_register(adev, ent); +	if (ret) +		goto err_pci; +  	/*  	 * 1. don't init fbdev on hw without DCE  	 * 2. don't init fbdev if there are no connectors @@ -2233,6 +2276,7 @@ amdgpu_pci_remove(struct pci_dev *pdev)  	struct drm_device *dev = pci_get_drvdata(pdev);  	struct amdgpu_device *adev = drm_to_adev(dev); +	amdgpu_xcp_dev_unplug(adev);  	drm_dev_unplug(dev);  	if (adev->pm.rpm_mode != AMDGPU_RUNPM_NONE) { @@ -2818,6 +2862,33 @@ static const struct drm_driver amdgpu_kms_driver = {  	.patchlevel = KMS_DRIVER_PATCHLEVEL,  }; +const struct drm_driver amdgpu_partition_driver = { +	.driver_features = +	    DRIVER_GEM | DRIVER_RENDER | DRIVER_SYNCOBJ | +	    DRIVER_SYNCOBJ_TIMELINE, +	.open = amdgpu_driver_open_kms, +	.postclose = amdgpu_driver_postclose_kms, +	.lastclose = amdgpu_driver_lastclose_kms, +	.ioctls = amdgpu_ioctls_kms, +	.num_ioctls = ARRAY_SIZE(amdgpu_ioctls_kms), +	.dumb_create = amdgpu_mode_dumb_create, +	.dumb_map_offset = amdgpu_mode_dumb_mmap, +	.fops = &amdgpu_driver_kms_fops, +	.release = &amdgpu_driver_release_kms, + +	.prime_handle_to_fd = drm_gem_prime_handle_to_fd, +	.prime_fd_to_handle = drm_gem_prime_fd_to_handle, +	.gem_prime_import = amdgpu_gem_prime_import, +	.gem_prime_mmap = drm_gem_prime_mmap, + +	.name = DRIVER_NAME, +	.desc = DRIVER_DESC, +	.date = DRIVER_DATE, +	.major = KMS_DRIVER_MAJOR, +	.minor = KMS_DRIVER_MINOR, +	.patchlevel = KMS_DRIVER_PATCHLEVEL, +}; +  static struct pci_error_handlers amdgpu_pci_err_handler = {  	.error_detected	= amdgpu_pci_error_detected,  	.mmio_enabled	= amdgpu_pci_mmio_enabled, @@ -2885,9 +2956,11 @@ static void __exit amdgpu_exit(void)  	amdgpu_amdkfd_fini();  	pci_unregister_driver(&amdgpu_kms_pci_driver);  	amdgpu_unregister_atpx_handler(); +	amdgpu_acpi_release();  	amdgpu_sync_fini();  	amdgpu_fence_slab_fini();  	mmu_notifier_synchronize(); +	amdgpu_xcp_drv_release();  }  module_init(amdgpu_init); | 
