diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 30 | 
1 files changed, 26 insertions, 4 deletions
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h index b90e822cebd7..f826945989c7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h @@ -143,19 +143,27 @@ struct  amdgim_pf2vf_info_v2 {  	uint32_t vce_enc_max_pixels_count;  	/* 16x16 pixels/sec, codec independent */  	uint32_t vce_enc_max_bandwidth; +	/* Bad pages block position in BYTE */ +	uint32_t bp_block_offset_L; +	uint32_t bp_block_offset_H; +	/* Bad pages block size in BYTE */ +	uint32_t bp_block_size;  	/* MEC FW position in kb from the start of VF visible frame buffer */ -	uint64_t mecfw_kboffset; +	uint32_t mecfw_kboffset_L; +	uint32_t mecfw_kboffset_H;  	/* MEC FW size in KB */  	uint32_t mecfw_ksize;  	/* UVD FW position in kb from the start of VF visible frame buffer */ -	uint64_t uvdfw_kboffset; +	uint32_t uvdfw_kboffset_L; +	uint32_t uvdfw_kboffset_H;  	/* UVD FW size in KB */  	uint32_t uvdfw_ksize;  	/* VCE FW position in kb from the start of VF visible frame buffer */ -	uint64_t vcefw_kboffset; +	uint32_t vcefw_kboffset_L; +	uint32_t vcefw_kboffset_H;  	/* VCE FW size in KB */  	uint32_t vcefw_ksize; -	uint32_t reserved[AMDGIM_GET_STRUCTURE_RESERVED_SIZE(256, 0, 0, (9 + sizeof(struct amd_sriov_msg_pf2vf_info_header)/sizeof(uint32_t)), 3)]; +	uint32_t reserved[AMDGIM_GET_STRUCTURE_RESERVED_SIZE(256, 0, 0, (18 + sizeof(struct amd_sriov_msg_pf2vf_info_header)/sizeof(uint32_t)), 0)];  } __aligned(4); @@ -254,6 +262,17 @@ typedef struct amdgim_vf2pf_info_v2 amdgim_vf2pf_info ;  		} \  	} while (0) +struct amdgpu_virt_ras_err_handler_data { +	/* point to bad page records array */ +	struct eeprom_table_record *bps; +	/* point to reserved bo array */ +	struct amdgpu_bo **bps_bo; +	/* the count of entries */ +	int count; +	/* last reserved entry's index + 1 */ +	int last_reserved; +}; +  /* GPU virtualization */  struct amdgpu_virt {  	uint32_t			caps; @@ -272,6 +291,8 @@ struct amdgpu_virt {  	uint32_t reg_access_mode;  	int req_init_data_ver;  	bool tdr_debug; +	struct amdgpu_virt_ras_err_handler_data *virt_eh_data; +	bool ras_init_done;  };  #define amdgpu_sriov_enabled(adev) \ @@ -323,6 +344,7 @@ void amdgpu_virt_free_mm_table(struct amdgpu_device *adev);  int amdgpu_virt_fw_reserve_get_checksum(void *obj, unsigned long obj_size,  					unsigned int key,  					unsigned int chksum); +void amdgpu_virt_release_ras_err_handler_data(struct amdgpu_device *adev);  void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev);  void amdgpu_detect_virtualization(struct amdgpu_device *adev); | 
