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path: root/drivers/regulator/qcom-rpmh-regulator.c
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Diffstat (limited to 'drivers/regulator/qcom-rpmh-regulator.c')
-rw-r--r--drivers/regulator/qcom-rpmh-regulator.c1338
1 files changed, 789 insertions, 549 deletions
diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c
index 109f0aae09b1..6e4cb2871fca 100644
--- a/drivers/regulator/qcom-rpmh-regulator.c
+++ b/drivers/regulator/qcom-rpmh-regulator.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
-// Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
+// Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
#define pr_fmt(fmt) "%s: " fmt, __func__
@@ -32,6 +32,34 @@ enum rpmh_regulator_type {
XOB,
};
+/**
+ * enum regulator_hw_type - supported regulator types
+ * @SMPS: Switch mode power supply.
+ * @LDO: Linear Dropout regulator.
+ * @BOB: Buck/Boost type regulator.
+ * @VS: Simple voltage ON/OFF switch.
+ * @NUM_REGULATOR_TYPES: Number of regulator types.
+ */
+enum regulator_hw_type {
+ SMPS,
+ LDO,
+ BOB,
+ VS,
+ NUM_REGULATOR_TYPES,
+};
+
+struct resource_name_formats {
+ const char *rsc_name_fmt;
+ const char *rsc_name_fmt1;
+};
+
+static const struct resource_name_formats vreg_rsc_name_lookup[NUM_REGULATOR_TYPES] = {
+ [SMPS] = {"S%d%s", "smp%s%d"},
+ [LDO] = {"L%d%s", "ldo%s%d"},
+ [BOB] = {"B%d%s", "bob%s%d"},
+ [VS] = {"VS%d%s", "vs%s%d"},
+};
+
#define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0
#define RPMH_REGULATOR_REG_ENABLE 0x4
#define RPMH_REGULATOR_REG_VRM_MODE 0x8
@@ -64,6 +92,12 @@ enum rpmh_regulator_type {
#define PMIC5_BOB_MODE_AUTO 6
#define PMIC5_BOB_MODE_PWM 7
+#define PMIC530_LDO_MODE_RETENTION 3
+#define PMIC530_LDO_MODE_LPM 4
+#define PMIC530_LDO_MODE_OPM 5
+#define PMIC530_LDO_MODE_HPM 7
+
+#define PMIC_ID_LEN 4
/**
* struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
* @regulator_type: RPMh accelerator type used to manage this
@@ -136,17 +170,17 @@ struct rpmh_vreg {
* struct rpmh_vreg_init_data - initialization data for an RPMh regulator
* @name: Name for the regulator which also corresponds
* to the device tree subnode name of the regulator
- * @resource_name: RPMh regulator resource name format string.
- * This must include exactly one field: '%s' which
- * is filled at run-time with the PMIC ID provided
- * by device tree property qcom,pmic-id. Example:
- * "ldo%s1" for RPMh resource "ldoa1".
+ * @index: This is the index number of the regulator present
+ * on the PMIC.
+ * @vreg_hw_type: Regulator HW type enum, this must be BOB, SMPS,
+ * LDO, VS, based on the regulator HW type.
* @supply_name: Parent supply regulator name
* @hw_data: Configuration data for this PMIC regulator type
*/
struct rpmh_vreg_init_data {
const char *name;
- const char *resource_name;
+ enum regulator_hw_type vreg_hw_type;
+ int index;
const char *supply_name;
const struct rpmh_vreg_hw_data *hw_data;
};
@@ -417,6 +451,7 @@ static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
{
struct regulator_config reg_config = {};
char rpmh_resource_name[20] = "";
+ const char *rsc_name;
const struct rpmh_vreg_init_data *rpmh_data;
struct regulator_init_data *init_data;
struct regulator_dev *rdev;
@@ -433,8 +468,16 @@ static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
return -EINVAL;
}
- scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
- rpmh_data->resource_name, pmic_id);
+ if (strnlen(pmic_id, PMIC_ID_LEN) > 1 && strnstr(pmic_id, "_E", PMIC_ID_LEN)) {
+ rsc_name = vreg_rsc_name_lookup[rpmh_data->vreg_hw_type].rsc_name_fmt;
+ scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
+ rsc_name, rpmh_data->index, pmic_id);
+
+ } else {
+ rsc_name = vreg_rsc_name_lookup[rpmh_data->vreg_hw_type].rsc_name_fmt1;
+ scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
+ rsc_name, pmic_id, rpmh_data->index);
+ }
vreg->addr = cmd_db_read_addr(rpmh_resource_name);
if (!vreg->addr) {
@@ -519,6 +562,14 @@ static const int pmic_mode_map_pmic5_ldo_hpm[REGULATOR_MODE_STANDBY + 1] = {
[REGULATOR_MODE_FAST] = -EINVAL,
};
+static const int pmic_mode_map_pmic530_ldo[REGULATOR_MODE_STANDBY + 1] = {
+ [REGULATOR_MODE_INVALID] = -EINVAL,
+ [REGULATOR_MODE_STANDBY] = PMIC530_LDO_MODE_RETENTION,
+ [REGULATOR_MODE_IDLE] = PMIC530_LDO_MODE_LPM,
+ [REGULATOR_MODE_NORMAL] = PMIC530_LDO_MODE_OPM,
+ [REGULATOR_MODE_FAST] = PMIC530_LDO_MODE_HPM,
+};
+
static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
{
unsigned int mode;
@@ -541,6 +592,30 @@ static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
return mode;
}
+static unsigned int rpmh_regulator_pmic530_ldo_of_map_mode(unsigned int rpmh_mode)
+{
+ unsigned int mode;
+
+ switch (rpmh_mode) {
+ case RPMH_REGULATOR_MODE_HPM:
+ mode = REGULATOR_MODE_FAST;
+ break;
+ case RPMH_REGULATOR_MODE_AUTO:
+ mode = REGULATOR_MODE_NORMAL;
+ break;
+ case RPMH_REGULATOR_MODE_LPM:
+ mode = REGULATOR_MODE_IDLE;
+ break;
+ case RPMH_REGULATOR_MODE_RET:
+ mode = REGULATOR_MODE_STANDBY;
+ break;
+ default:
+ mode = REGULATOR_MODE_INVALID;
+ break;
+ }
+ return mode;
+}
+
static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
[REGULATOR_MODE_INVALID] = -EINVAL,
[REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
@@ -904,671 +979,816 @@ static const struct rpmh_vreg_hw_data pmic5_bob = {
.of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
};
-#define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
+static const struct rpmh_vreg_hw_data pmic5_nldo530 = {
+ .regulator_type = VRM,
+ .ops = &rpmh_regulator_vrm_drms_ops,
+ .voltage_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000),
+ },
+ .n_linear_ranges = 1,
+ .n_voltages = 211,
+ .hpm_min_load_uA = 30000,
+ .pmic_mode_map = pmic_mode_map_pmic530_ldo,
+ .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode,
+};
+
+static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp150 = {
+ .regulator_type = VRM,
+ .ops = &rpmh_regulator_vrm_drms_ops,
+ .voltage_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
+ },
+ .n_linear_ranges = 1,
+ .n_voltages = 256,
+ .hpm_min_load_uA = 10000,
+ .pmic_mode_map = pmic_mode_map_pmic530_ldo,
+ .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode,
+};
+
+static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp300 = {
+ .regulator_type = VRM,
+ .ops = &rpmh_regulator_vrm_drms_ops,
+ .voltage_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
+ },
+ .n_linear_ranges = 1,
+ .n_voltages = 256,
+ .hpm_min_load_uA = 20000,
+ .pmic_mode_map = pmic_mode_map_pmic530_ldo,
+ .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode,
+};
+
+static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp600 = {
+ .regulator_type = VRM,
+ .ops = &rpmh_regulator_vrm_drms_ops,
+ .voltage_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
+ },
+ .n_linear_ranges = 1,
+ .n_voltages = 256,
+ .hpm_min_load_uA = 40000,
+ .pmic_mode_map = pmic_mode_map_pmic530_ldo,
+ .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode,
+};
+
+static const struct rpmh_vreg_hw_data pmic5_ftsmps530 = {
+ .regulator_type = VRM,
+ .ops = &rpmh_regulator_vrm_ops,
+ .voltage_ranges = (struct linear_range[]) {
+ REGULATOR_LINEAR_RANGE(252000, 0, 305, 4000),
+ REGULATOR_LINEAR_RANGE(1480000, 306, 464, 8000),
+ },
+ .n_linear_ranges = 2,
+ .n_voltages = 465,
+ .pmic_mode_map = pmic_mode_map_pmic5_smps,
+ .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
+};
+
+#define RPMH_VREG(_name, _vreg_hw_type, _index, _hw_data, _supply_name) \
{ \
.name = _name, \
- .resource_name = _resource_name, \
+ .vreg_hw_type = _vreg_hw_type, \
+ .index = _index, \
.hw_data = _hw_data, \
.supply_name = _supply_name, \
}
static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"),
- RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"),
- RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
- RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
- RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
- RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"),
- RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"),
- RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"),
- RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"),
- RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"),
- RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"),
- RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"),
- RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"),
- RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"),
- RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"),
- RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"),
- RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"),
- RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"),
- RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic4_hfsmps3, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic4_hfsmps3, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic4_hfsmps3, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic4_ftsmps426, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic4_ftsmps426, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic4_ftsmps426, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic4_ftsmps426, "vdd-s9"),
+ RPMH_VREG("smps10", SMPS, 10, &pmic4_ftsmps426, "vdd-s10"),
+ RPMH_VREG("smps11", SMPS, 11, &pmic4_ftsmps426, "vdd-s11"),
+ RPMH_VREG("smps12", SMPS, 12, &pmic4_ftsmps426, "vdd-s12"),
+ RPMH_VREG("smps13", SMPS, 13, &pmic4_ftsmps426, "vdd-s13"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l27"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic4_nldo, "vdd-l2-l8-l17"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic4_nldo, "vdd-l3-l11"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic4_nldo, "vdd-l4-l5"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic4_nldo, "vdd-l4-l5"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic4_pldo, "vdd-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic4_nldo, "vdd-l2-l8-l17"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic4_pldo, "vdd-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic4_pldo, "vdd-l10-l23-l25"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic4_nldo, "vdd-l3-l11"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic4_pldo, "vdd-l13-l19-l21"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic4_pldo, "vdd-l16-l28"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic4_nldo, "vdd-l2-l8-l17"),
+ RPMH_VREG("ldo18", LDO, 18, &pmic4_pldo, "vdd-l18-l22"),
+ RPMH_VREG("ldo19", LDO, 19, &pmic4_pldo, "vdd-l13-l19-l21"),
+ RPMH_VREG("ldo20", LDO, 20, &pmic4_pldo, "vdd-l20-l24"),
+ RPMH_VREG("ldo21", LDO, 21, &pmic4_pldo, "vdd-l13-l19-l21"),
+ RPMH_VREG("ldo22", LDO, 22, &pmic4_pldo, "vdd-l18-l22"),
+ RPMH_VREG("ldo23", LDO, 23, &pmic4_pldo, "vdd-l10-l23-l25"),
+ RPMH_VREG("ldo24", LDO, 24, &pmic4_pldo, "vdd-l20-l24"),
+ RPMH_VREG("ldo25", LDO, 25, &pmic4_pldo, "vdd-l10-l23-l25"),
+ RPMH_VREG("ldo26", LDO, 26, &pmic4_nldo, "vdd-l26"),
+ RPMH_VREG("ldo27", LDO, 27, &pmic4_nldo, "vdd-l1-l27"),
+ RPMH_VREG("ldo28", LDO, 28, &pmic4_pldo, "vdd-l16-l28"),
+ RPMH_VREG("lvs1", VS, 1, &pmic4_lvs, "vin-lvs-1-2"),
+ RPMH_VREG("lvs2", VS, 2, &pmic4_lvs, "vin-lvs-1-2"),
{}
};
static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
{}
};
static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
- RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
+ RPMH_VREG("bob", BOB, 1, &pmic4_bob, "vdd-bob"),
{}
};
static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic4_ftsmps426, "vdd-s4"),
{}
};
static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
- RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
- RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
- RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"),
+ RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l8-l11"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l10"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l1-l8-l11"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l2-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l1-l8-l11"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l13-l16-l17"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16-l17"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l13-l16-l17"),
+ RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
{}
};
static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
- RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l8"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l4-l5-l6"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l4-l5-l6"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l4-l5-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l11"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo_lv, "vdd-l1-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l9-l10"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l9-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l7-l11"),
+ RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"),
{}
};
static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
- RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
- RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
- RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"),
+ RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l8-l11"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l10"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l1-l8-l11"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l2-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l1-l8-l11"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l13-l16-l17"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16-l17"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l13-l16-l17"),
+ RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, "vdd-l3-l4-l5-l18"),
{}
};
static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps527, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps527, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps527, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps527, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps527, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps527, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps527, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps527, "vdd-s8"),
- RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps527, "vdd-s9"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-s9"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-s9"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-s9"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6-l7"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l6-l7"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo515_mv, "vdd-l8-l9"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps527, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps527, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps527, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps527, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps527, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps527, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps527, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps527, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps527, "vdd-s9"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-s9"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-l3"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l2-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-s9"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-s9"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6-l7"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l6-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo515_mv, "vdd-l8-l9"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l8-l9"),
{}
};
static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
- RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
- RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
- RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
- RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"),
+ RPMH_VREG("smps10", SMPS, 10, &pmic5_hfsmps510, "vdd-s10"),
+ RPMH_VREG("smps11", SMPS, 11, &pmic5_hfsmps510, "vdd-s11"),
+ RPMH_VREG("smps12", SMPS, 12, &pmic5_hfsmps510, "vdd-s12"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l4"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l7"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l5"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l1-l4"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l5"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9-l10"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l2-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9-l10"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l6-l9-l10"),
{}
};
static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps515, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
- RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
- RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
- RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps515, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"),
+ RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l12"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo_lv, "vdd-l2-l8"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l6-l9-l11"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo_lv, "vdd-l2-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l6-l9-l11"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l6-l9-l11"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l1-l12"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
+ RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"),
{}
};
static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps520, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps520, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps520, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps520, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps520, "vdd-s6"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"),
{}
};
static const struct rpmh_vreg_init_data pm8550_vreg_data[] = {
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1-l4-l10"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l13-l14"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l1-l4-l10"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l7"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l6-l7"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l8-l9"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo515, "vdd-l1-l4-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo515, "vdd-l11"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l2-l13-l14"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, "vdd-l2-l13-l14"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l17"),
- RPMH_VREG("bob1", "bob%s1", &pmic5_bob, "vdd-bob1"),
- RPMH_VREG("bob2", "bob%s2", &pmic5_bob, "vdd-bob2"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1-l4-l10"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l13-l14"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l1-l4-l10"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l16"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l6-l7"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l6-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, "vdd-l8-l9"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l8-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo515, "vdd-l1-l4-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo515, "vdd-l11"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo515, "vdd-l12"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l2-l13-l14"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, "vdd-l2-l13-l14"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo515, "vdd-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l16"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l17"),
+ RPMH_VREG("bob1", BOB, 1, &pmic5_bob, "vdd-bob1"),
+ RPMH_VREG("bob2", BOB, 2, &pmic5_bob, "vdd-bob2"),
{}
};
static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
{}
};
static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
{}
};
static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
{}
};
static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps515, "vdd-s2"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7"),
{}
};
static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps515_1, "vdd-s2"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7"),
{}
};
static const struct rpmh_vreg_init_data pm8010_vreg_data[] = {
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo502, "vdd-l1-l2"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo502, "vdd-l1-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo502ln, "vdd-l3-l4"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo502ln, "vdd-l3-l4"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo502, "vdd-l5"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo502ln, "vdd-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo502, "vdd-l7"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo502, "vdd-l1-l2"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo502, "vdd-l1-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo502ln, "vdd-l3-l4"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo502ln, "vdd-l3-l4"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo502, "vdd-l5"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo502ln, "vdd-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo502, "vdd-l7"),
};
static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
- RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
- RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4-l7-l8"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l4-l7-l8"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l4-l7-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo_lv, "vdd-l10-l14-l15"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo_lv, "vdd-l11-l12-l13"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l11-l12-l13"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo_lv, "vdd-l11-l12-l13"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l10-l14-l15"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l10-l14-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
+ RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
+ RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
{}
};
static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
- RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l8"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l4-l5-l6"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l4-l5-l6"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l4-l5-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l11"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, "vdd-l1-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l9-l10"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l9-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l7-l11"),
+ RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"),
{}
};
static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, NULL),
- RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, NULL),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, NULL),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, NULL),
/* smps3 - smps5 not configured */
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, NULL),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, NULL),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, NULL),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, NULL),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, NULL),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, NULL),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, NULL),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, NULL),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, NULL),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, NULL),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, NULL),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, NULL),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, NULL),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, NULL),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, NULL),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, NULL),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, NULL),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, NULL),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_nldo, NULL),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, NULL),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, NULL),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo, NULL),
/* ldo17 not configured */
- RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, NULL),
- RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, NULL),
- RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, NULL),
- RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, NULL),
- RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, NULL),
+ RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, NULL),
+ RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo, NULL),
+ RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo, NULL),
+ RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo, NULL),
+ RPMH_VREG("ldo22", LDO, 22, &pmic5_nldo, NULL),
+};
+
+static const struct rpmh_vreg_init_data pmcx0102_vreg_data[] = {
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps530, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps530, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps530, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps530, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps530, "vdd-s9"),
+ RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps530, "vdd-s10"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo530, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l4"),
+ {}
+};
+
+static const struct rpmh_vreg_init_data pmh0101_vreg_data[] = {
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1-l4-l10"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo530_mvp300, "vdd-l2-l13-l14"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3-l11"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l1-l4-l10"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo530_mvp150, "vdd-l5-l16"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo530_mvp300, "vdd-l6-l7"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo530_mvp300, "vdd-l6-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo530_mvp150, "vdd-l8-l9"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo515_mv, "vdd-l8-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo530, "vdd-l1-l4-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo530, "vdd-l3-l11"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo530, "vdd-l12"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo530_mvp150, "vdd-l2-l13-l14"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo530_mvp150, "vdd-l2-l13-l14"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo530, "vdd-l15"),
+ RPMH_VREG("ldo16", LDO, 15, &pmic5_pldo530_mvp600, "vdd-l5-l16"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo515_mv, "vdd-l17"),
+ RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo530, "vdd-l18"),
+ RPMH_VREG("bob1", BOB, 1, &pmic5_bob, "vdd-bob1"),
+ RPMH_VREG("bob2", BOB, 2, &pmic5_bob, "vdd-bob2"),
+ {}
+};
+
+static const struct rpmh_vreg_init_data pmh0104_vreg_data[] = {
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"),
+ {}
+};
+
+static const struct rpmh_vreg_init_data pmh0110_vreg_data[] = {
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps530, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps530, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps530, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps530, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps530, "vdd-s9"),
+ RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps530, "vdd-s10"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo530, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l4"),
+ {}
};
static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l9"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l12"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l3-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10-l11-l13"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l10-l11-l13"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l4-l12"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l10-l11-l13"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_hfsmps510, "vdd-s7"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l9"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4-l12"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7-l8"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l7-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l3-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10-l11-l13"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l10-l11-l13"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l4-l12"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l10-l11-l13"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l16"),
{}
};
static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l18"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6-l16"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6-l16"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8-l9"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l8-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l6-l16"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo, "vdd-l17"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps510, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_hfsmps510, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l18"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6-l16"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6-l16"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8-l9"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l8-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l11-l13"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l12"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l11-l13"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l6-l16"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_nldo, "vdd-l17"),
/* ldo18 not configured */
- RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, "vdd-l19"),
- RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, "vdd-l20"),
- RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, "vdd-l21"),
+ RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo, "vdd-l19"),
+ RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo, "vdd-l20"),
+ RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo, "vdd-l21"),
{}
};
static const struct rpmh_vreg_init_data pmx75_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"),
- RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps525, "vdd-s9"),
- RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps525, "vdd-s10"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-18"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l4-l16"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo_lv, "vdd-l5-l6"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo_lv, "vdd-l5-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l7"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo515, "vdd-l8-l9"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo515, "vdd-l8-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo515, "vdd-l14"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo515, "vdd-l4-l16"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo515, "vdd-l17"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"),
+ RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps525, "vdd-s9"),
+ RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps525, "vdd-s10"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-18"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l4-l16"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo_lv, "vdd-l5-l6"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo_lv, "vdd-l5-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo515, "vdd-l8-l9"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo515, "vdd-l8-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l11-l13"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo515, "vdd-l12"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l11-l13"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo515, "vdd-l14"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo515, "vdd-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo515, "vdd-l4-l16"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_nldo515, "vdd-l17"),
/* ldo18 not configured */
- RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo515, "vdd-l19"),
- RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo515, "vdd-l20-l21"),
- RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo515, "vdd-l20-l21"),
+ RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo515, "vdd-l19"),
+ RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo515, "vdd-l20-l21"),
+ RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo515, "vdd-l20-l21"),
};
static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
- RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"),
- RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
- RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
- RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps520, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps520, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps520, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps520, "vdd-s6"),
+ RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps520, "vdd-s7"),
+ RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l4-l12-l15"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l7"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l1-l4-l12-l15"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9-l10"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l2-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9-l10"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l6-l9-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l1-l4-l12-l15"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_nldo, "vdd-l13"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14-l16"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l1-l4-l12-l15"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo, "vdd-l14-l16"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
+ RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
+ RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
{}
};
static const struct rpmh_vreg_init_data pm7550_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l4-l5"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-l4-l5"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l7"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo515, "vdd-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo515, "vdd-l9-l10"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo515, "vdd-l9-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo515, "vdd-l11"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo515_mv, "vdd-l12-l14"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo515_mv, "vdd-l13-l16"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, "vdd-l12-l14"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
- RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
- RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
- RPMH_VREG("ldo20", "ldo%s20", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
- RPMH_VREG("ldo21", "ldo%s21", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
- RPMH_VREG("ldo22", "ldo%s22", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
- RPMH_VREG("ldo23", "ldo%s23", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
- RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-l3"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l2-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l4-l5"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-l4-l5"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo515, "vdd-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo515, "vdd-l9-l10"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo515, "vdd-l9-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo515, "vdd-l11"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo515_mv, "vdd-l12-l14"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo515_mv, "vdd-l13-l16"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, "vdd-l12-l14"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
+ RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
+ RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
+ RPMH_VREG("ldo20", LDO, 20, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
+ RPMH_VREG("ldo21", LDO, 21, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
+ RPMH_VREG("ldo22", LDO, 22, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
+ RPMH_VREG("ldo23", LDO, 23, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"),
+ RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"),
{}
};
static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps515, "vdd-s3"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps520, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps515, "vdd-s3"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5-l6"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l5-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-bob"),
{}
};
static const struct rpmh_vreg_init_data pmr735b_vreg_data[] = {
- RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l11"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7-l8"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l7-l8"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l9"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo_lv, "vdd-l10"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l11"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l12"),
+ {}
+};
+
+static const struct rpmh_vreg_init_data pmr735d_vreg_data[] = {
+ RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1-l2-l5"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l1-l2-l5"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3-l4"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l3-l4"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-l1-l2-l5"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"),
{}
};
static const struct rpmh_vreg_init_data pm660_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
- RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
- RPMH_VREG("smps6", "smp%s6", &pmic4_hfsmps3, "vdd-s6"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l6-l7"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l3"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l2-l3"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3"),
+ RPMH_VREG("smps4", SMPS, 4, &pmic4_hfsmps3, "vdd-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic4_hfsmps3, "vdd-s5"),
+ RPMH_VREG("smps6", SMPS, 6, &pmic4_hfsmps3, "vdd-s6"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l6-l7"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic4_nldo, "vdd-l2-l3"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic4_nldo, "vdd-l2-l3"),
/* ldo4 is inaccessible on PM660 */
- RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l5"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic4_nldo, "vdd-l1-l6-l7"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic4_nldo, "vdd-l1-l6-l7"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
- RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
- RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
- RPMH_VREG("ldo11", "ldo%s11", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
- RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
- RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
- RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
- RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
- RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
- RPMH_VREG("ldo17", "ldo%s17", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
- RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
- RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic4_nldo, "vdd-l5"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic4_nldo, "vdd-l1-l6-l7"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic4_nldo, "vdd-l1-l6-l7"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
+ RPMH_VREG("ldo9", LDO, 9, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
+ RPMH_VREG("ldo10", LDO, 10, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
+ RPMH_VREG("ldo11", LDO, 11, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
+ RPMH_VREG("ldo12", LDO, 12, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
+ RPMH_VREG("ldo13", LDO, 13, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
+ RPMH_VREG("ldo14", LDO, 14, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
+ RPMH_VREG("ldo15", LDO, 15, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
+ RPMH_VREG("ldo16", LDO, 16, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
+ RPMH_VREG("ldo17", LDO, 17, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
+ RPMH_VREG("ldo18", LDO, 18, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
+ RPMH_VREG("ldo19", LDO, 19, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
{}
};
static const struct rpmh_vreg_init_data pm660l_vreg_data[] = {
- RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
- RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
- RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3-s4"),
- RPMH_VREG("smps5", "smp%s5", &pmic4_ftsmps426, "vdd-s5"),
- RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l9-l10"),
- RPMH_VREG("ldo2", "ldo%s2", &pmic4_pldo, "vdd-l2"),
- RPMH_VREG("ldo3", "ldo%s3", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
- RPMH_VREG("ldo4", "ldo%s4", &pmic4_pldo, "vdd-l4-l6"),
- RPMH_VREG("ldo5", "ldo%s5", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
- RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l4-l6"),
- RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
- RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
- RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
+ RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"),
+ RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"),
+ RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3-s4"),
+ RPMH_VREG("smps5", SMPS, 5, &pmic4_ftsmps426, "vdd-s5"),
+ RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l9-l10"),
+ RPMH_VREG("ldo2", LDO, 2, &pmic4_pldo, "vdd-l2"),
+ RPMH_VREG("ldo3", LDO, 3, &pmic4_pldo, "vdd-l3-l5-l7-l8"),
+ RPMH_VREG("ldo4", LDO, 4, &pmic4_pldo, "vdd-l4-l6"),
+ RPMH_VREG("ldo5", LDO, 5, &pmic4_pldo, "vdd-l3-l5-l7-l8"),
+ RPMH_VREG("ldo6", LDO, 6, &pmic4_pldo, "vdd-l4-l6"),
+ RPMH_VREG("ldo7", LDO, 7, &pmic4_pldo, "vdd-l3-l5-l7-l8"),
+ RPMH_VREG("ldo8", LDO, 8, &pmic4_pldo, "vdd-l3-l5-l7-l8"),
+ RPMH_VREG("bob", BOB, 1, &pmic4_bob, "vdd-bob"),
{}
};
@@ -1690,6 +1910,22 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
.data = pmc8380_vreg_data,
},
{
+ .compatible = "qcom,pmcx0102-rpmh-regulators",
+ .data = pmcx0102_vreg_data,
+ },
+ {
+ .compatible = "qcom,pmh0101-rpmh-regulators",
+ .data = pmh0101_vreg_data,
+ },
+ {
+ .compatible = "qcom,pmh0104-rpmh-regulators",
+ .data = pmh0104_vreg_data,
+ },
+ {
+ .compatible = "qcom,pmh0110-rpmh-regulators",
+ .data = pmh0110_vreg_data,
+ },
+ {
.compatible = "qcom,pmm8155au-rpmh-regulators",
.data = pmm8155au_vreg_data,
},
@@ -1726,6 +1962,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
.data = pmr735b_vreg_data,
},
{
+ .compatible = "qcom,pmr735d-rpmh-regulators",
+ .data = pmr735d_vreg_data,
+ },
+ {
.compatible = "qcom,pm660-rpmh-regulators",
.data = pm660_vreg_data,
},