diff options
Diffstat (limited to 'drivers/usb/dwc2/hcd_intr.c')
| -rw-r--r-- | drivers/usb/dwc2/hcd_intr.c | 96 | 
1 files changed, 48 insertions, 48 deletions
diff --git a/drivers/usb/dwc2/hcd_intr.c b/drivers/usb/dwc2/hcd_intr.c index ed7f05cf4906..c98ae3653086 100644 --- a/drivers/usb/dwc2/hcd_intr.c +++ b/drivers/usb/dwc2/hcd_intr.c @@ -144,7 +144,7 @@ static void dwc2_sof_intr(struct dwc2_hsotg *hsotg)  	enum dwc2_transaction_type tr_type;  	/* Clear interrupt */ -	dwc2_writel(GINTSTS_SOF, hsotg->regs + GINTSTS); +	dwc2_writel(hsotg, GINTSTS_SOF, GINTSTS);  #ifdef DEBUG_SOF  	dev_vdbg(hsotg->dev, "--Start of Frame Interrupt--\n"); @@ -191,7 +191,7 @@ static void dwc2_rx_fifo_level_intr(struct dwc2_hsotg *hsotg)  	if (dbg_perio())  		dev_vdbg(hsotg->dev, "--RxFIFO Level Interrupt--\n"); -	grxsts = dwc2_readl(hsotg->regs + GRXSTSP); +	grxsts = dwc2_readl(hsotg, GRXSTSP);  	chnum = (grxsts & GRXSTS_HCHNUM_MASK) >> GRXSTS_HCHNUM_SHIFT;  	chan = hsotg->hc_ptr_array[chnum];  	if (!chan) { @@ -274,11 +274,11 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,  	dev_vdbg(hsotg->dev, "%s(%p)\n", __func__, hsotg);  	/* Every time when port enables calculate HFIR.FrInterval */ -	hfir = dwc2_readl(hsotg->regs + HFIR); +	hfir = dwc2_readl(hsotg, HFIR);  	hfir &= ~HFIR_FRINT_MASK;  	hfir |= dwc2_calc_frame_interval(hsotg) << HFIR_FRINT_SHIFT &  		HFIR_FRINT_MASK; -	dwc2_writel(hfir, hsotg->regs + HFIR); +	dwc2_writel(hsotg, hfir, HFIR);  	/* Check if we need to adjust the PHY clock speed for low power */  	if (!params->host_support_fs_ls_low_power) { @@ -287,7 +287,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,  		return;  	} -	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); +	usbcfg = dwc2_readl(hsotg, GUSBCFG);  	prtspd = (hprt0 & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT;  	if (prtspd == HPRT0_SPD_LOW_SPEED || prtspd == HPRT0_SPD_FULL_SPEED) { @@ -295,11 +295,11 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,  		if (!(usbcfg & GUSBCFG_PHY_LP_CLK_SEL)) {  			/* Set PHY low power clock select for FS/LS devices */  			usbcfg |= GUSBCFG_PHY_LP_CLK_SEL; -			dwc2_writel(usbcfg, hsotg->regs + GUSBCFG); +			dwc2_writel(hsotg, usbcfg, GUSBCFG);  			do_reset = 1;  		} -		hcfg = dwc2_readl(hsotg->regs + HCFG); +		hcfg = dwc2_readl(hsotg, HCFG);  		fslspclksel = (hcfg & HCFG_FSLSPCLKSEL_MASK) >>  			      HCFG_FSLSPCLKSEL_SHIFT; @@ -312,7 +312,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,  				fslspclksel = HCFG_FSLSPCLKSEL_6_MHZ;  				hcfg &= ~HCFG_FSLSPCLKSEL_MASK;  				hcfg |= fslspclksel << HCFG_FSLSPCLKSEL_SHIFT; -				dwc2_writel(hcfg, hsotg->regs + HCFG); +				dwc2_writel(hsotg, hcfg, HCFG);  				do_reset = 1;  			}  		} else { @@ -323,7 +323,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,  				fslspclksel = HCFG_FSLSPCLKSEL_48_MHZ;  				hcfg &= ~HCFG_FSLSPCLKSEL_MASK;  				hcfg |= fslspclksel << HCFG_FSLSPCLKSEL_SHIFT; -				dwc2_writel(hcfg, hsotg->regs + HCFG); +				dwc2_writel(hsotg, hcfg, HCFG);  				do_reset = 1;  			}  		} @@ -331,14 +331,14 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,  		/* Not low power */  		if (usbcfg & GUSBCFG_PHY_LP_CLK_SEL) {  			usbcfg &= ~GUSBCFG_PHY_LP_CLK_SEL; -			dwc2_writel(usbcfg, hsotg->regs + GUSBCFG); +			dwc2_writel(hsotg, usbcfg, GUSBCFG);  			do_reset = 1;  		}  	}  	if (do_reset) {  		*hprt0_modify |= HPRT0_RST; -		dwc2_writel(*hprt0_modify, hsotg->regs + HPRT0); +		dwc2_writel(hsotg, *hprt0_modify, HPRT0);  		queue_delayed_work(hsotg->wq_otg, &hsotg->reset_work,  				   msecs_to_jiffies(60));  	} else { @@ -359,7 +359,7 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg)  	dev_vdbg(hsotg->dev, "--Port Interrupt--\n"); -	hprt0 = dwc2_readl(hsotg->regs + HPRT0); +	hprt0 = dwc2_readl(hsotg, HPRT0);  	hprt0_modify = hprt0;  	/* @@ -374,7 +374,7 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg)  	 * Set flag and clear if detected  	 */  	if (hprt0 & HPRT0_CONNDET) { -		dwc2_writel(hprt0_modify | HPRT0_CONNDET, hsotg->regs + HPRT0); +		dwc2_writel(hsotg, hprt0_modify | HPRT0_CONNDET, HPRT0);  		dev_vdbg(hsotg->dev,  			 "--Port Interrupt HPRT0=0x%08x Port Connect Detected--\n", @@ -392,7 +392,7 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg)  	 * Clear if detected - Set internal flag if disabled  	 */  	if (hprt0 & HPRT0_ENACHG) { -		dwc2_writel(hprt0_modify | HPRT0_ENACHG, hsotg->regs + HPRT0); +		dwc2_writel(hsotg, hprt0_modify | HPRT0_ENACHG, HPRT0);  		dev_vdbg(hsotg->dev,  			 "  --Port Interrupt HPRT0=0x%08x Port Enable Changed (now %d)--\n",  			 hprt0, !!(hprt0 & HPRT0_ENA)); @@ -406,17 +406,17 @@ static void dwc2_port_intr(struct dwc2_hsotg *hsotg)  				hsotg->params.dma_desc_enable = false;  				hsotg->new_connection = false; -				hcfg = dwc2_readl(hsotg->regs + HCFG); +				hcfg = dwc2_readl(hsotg, HCFG);  				hcfg &= ~HCFG_DESCDMA; -				dwc2_writel(hcfg, hsotg->regs + HCFG); +				dwc2_writel(hsotg, hcfg, HCFG);  			}  		}  	}  	/* Overcurrent Change Interrupt */  	if (hprt0 & HPRT0_OVRCURRCHG) { -		dwc2_writel(hprt0_modify | HPRT0_OVRCURRCHG, -			    hsotg->regs + HPRT0); +		dwc2_writel(hsotg, hprt0_modify | HPRT0_OVRCURRCHG, +			    HPRT0);  		dev_vdbg(hsotg->dev,  			 "  --Port Interrupt HPRT0=0x%08x Port Overcurrent Changed--\n",  			 hprt0); @@ -441,7 +441,7 @@ static u32 dwc2_get_actual_xfer_length(struct dwc2_hsotg *hsotg,  {  	u32 hctsiz, count, length; -	hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); +	hctsiz = dwc2_readl(hsotg, HCTSIZ(chnum));  	if (halt_status == DWC2_HC_XFER_COMPLETE) {  		if (chan->ep_is_in) { @@ -518,7 +518,7 @@ static int dwc2_update_urb_state(struct dwc2_hsotg *hsotg,  		urb->status = 0;  	} -	hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); +	hctsiz = dwc2_readl(hsotg, HCTSIZ(chnum));  	dev_vdbg(hsotg->dev, "DWC_otg: %s: %s, channel %d\n",  		 __func__, (chan->ep_is_in ? "IN" : "OUT"), chnum);  	dev_vdbg(hsotg->dev, "  chan->xfer_len %d\n", chan->xfer_len); @@ -541,7 +541,7 @@ void dwc2_hcd_save_data_toggle(struct dwc2_hsotg *hsotg,  			       struct dwc2_host_chan *chan, int chnum,  			       struct dwc2_qtd *qtd)  { -	u32 hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); +	u32 hctsiz = dwc2_readl(hsotg, HCTSIZ(chnum));  	u32 pid = (hctsiz & TSIZ_SC_MC_PID_MASK) >> TSIZ_SC_MC_PID_SHIFT;  	if (chan->ep_type != USB_ENDPOINT_XFER_CONTROL) { @@ -780,9 +780,9 @@ cleanup:  		}  	} -	haintmsk = dwc2_readl(hsotg->regs + HAINTMSK); +	haintmsk = dwc2_readl(hsotg, HAINTMSK);  	haintmsk &= ~(1 << chan->hc_num); -	dwc2_writel(haintmsk, hsotg->regs + HAINTMSK); +	dwc2_writel(hsotg, haintmsk, HAINTMSK);  	/* Try to queue more transfers now that there's a free channel */  	tr_type = dwc2_hcd_select_transactions(hsotg); @@ -829,9 +829,9 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg,  			 * is enabled so that the non-periodic schedule will  			 * be processed  			 */ -			gintmsk = dwc2_readl(hsotg->regs + GINTMSK); +			gintmsk = dwc2_readl(hsotg, GINTMSK);  			gintmsk |= GINTSTS_NPTXFEMP; -			dwc2_writel(gintmsk, hsotg->regs + GINTMSK); +			dwc2_writel(hsotg, gintmsk, GINTMSK);  		} else {  			dev_vdbg(hsotg->dev, "isoc/intr\n");  			/* @@ -848,9 +848,9 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg,  			 * enabled so that the periodic schedule will be  			 * processed  			 */ -			gintmsk = dwc2_readl(hsotg->regs + GINTMSK); +			gintmsk = dwc2_readl(hsotg, GINTMSK);  			gintmsk |= GINTSTS_PTXFEMP; -			dwc2_writel(gintmsk, hsotg->regs + GINTMSK); +			dwc2_writel(hsotg, gintmsk, GINTMSK);  		}  	}  } @@ -915,7 +915,7 @@ static void dwc2_complete_periodic_xfer(struct dwc2_hsotg *hsotg,  					struct dwc2_qtd *qtd,  					enum dwc2_halt_status halt_status)  { -	u32 hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); +	u32 hctsiz = dwc2_readl(hsotg, HCTSIZ(chnum));  	qtd->error_count = 0; @@ -959,7 +959,7 @@ static int dwc2_xfercomp_isoc_split_in(struct dwc2_hsotg *hsotg,  	qtd->isoc_split_offset += len; -	hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); +	hctsiz = dwc2_readl(hsotg, HCTSIZ(chnum));  	pid = (hctsiz & TSIZ_SC_MC_PID_MASK) >> TSIZ_SC_MC_PID_SHIFT;  	if (frame_desc->actual_length >= frame_desc->length || pid == 0) { @@ -1185,7 +1185,7 @@ static void dwc2_update_urb_state_abn(struct dwc2_hsotg *hsotg,  	urb->actual_length += xfer_length; -	hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); +	hctsiz = dwc2_readl(hsotg, HCTSIZ(chnum));  	dev_vdbg(hsotg->dev, "DWC_otg: %s: %s, channel %d\n",  		 __func__, (chan->ep_is_in ? "IN" : "OUT"), chnum);  	dev_vdbg(hsotg->dev, "  chan->start_pkt_count %d\n", @@ -1561,10 +1561,10 @@ static void dwc2_hc_ahberr_intr(struct dwc2_hsotg *hsotg,  	dwc2_hc_handle_tt_clear(hsotg, chan, qtd); -	hcchar = dwc2_readl(hsotg->regs + HCCHAR(chnum)); -	hcsplt = dwc2_readl(hsotg->regs + HCSPLT(chnum)); -	hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); -	hc_dma = dwc2_readl(hsotg->regs + HCDMA(chnum)); +	hcchar = dwc2_readl(hsotg, HCCHAR(chnum)); +	hcsplt = dwc2_readl(hsotg, HCSPLT(chnum)); +	hctsiz = dwc2_readl(hsotg, HCTSIZ(chnum)); +	hc_dma = dwc2_readl(hsotg, HCDMA(chnum));  	dev_err(hsotg->dev, "AHB ERROR, Channel %d\n", chnum);  	dev_err(hsotg->dev, "  hcchar 0x%08x, hcsplt 0x%08x\n", hcchar, hcsplt); @@ -1776,10 +1776,10 @@ static bool dwc2_halt_status_ok(struct dwc2_hsotg *hsotg,  		 * This code is here only as a check. This condition should  		 * never happen. Ignore the halt if it does occur.  		 */ -		hcchar = dwc2_readl(hsotg->regs + HCCHAR(chnum)); -		hctsiz = dwc2_readl(hsotg->regs + HCTSIZ(chnum)); -		hcintmsk = dwc2_readl(hsotg->regs + HCINTMSK(chnum)); -		hcsplt = dwc2_readl(hsotg->regs + HCSPLT(chnum)); +		hcchar = dwc2_readl(hsotg, HCCHAR(chnum)); +		hctsiz = dwc2_readl(hsotg, HCTSIZ(chnum)); +		hcintmsk = dwc2_readl(hsotg, HCINTMSK(chnum)); +		hcsplt = dwc2_readl(hsotg, HCSPLT(chnum));  		dev_dbg(hsotg->dev,  			"%s: chan->halt_status DWC2_HC_XFER_NO_HALT_STATUS,\n",  			 __func__); @@ -1803,7 +1803,7 @@ static bool dwc2_halt_status_ok(struct dwc2_hsotg *hsotg,  	 * when the halt interrupt occurs. Halt the channel again if it does  	 * occur.  	 */ -	hcchar = dwc2_readl(hsotg->regs + HCCHAR(chnum)); +	hcchar = dwc2_readl(hsotg, HCCHAR(chnum));  	if (hcchar & HCCHAR_CHDIS) {  		dev_warn(hsotg->dev,  			 "%s: hcchar.chdis set unexpectedly, hcchar 0x%08x, trying to halt again\n", @@ -1863,7 +1863,7 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,  		return;  	} -	hcintmsk = dwc2_readl(hsotg->regs + HCINTMSK(chnum)); +	hcintmsk = dwc2_readl(hsotg, HCINTMSK(chnum));  	if (chan->hcint & HCINTMSK_XFERCOMPL) {  		/* @@ -1958,7 +1958,7 @@ static void dwc2_hc_chhltd_intr_dma(struct dwc2_hsotg *hsotg,  				dev_err(hsotg->dev,  					"hcint 0x%08x, intsts 0x%08x\n",  					chan->hcint, -					dwc2_readl(hsotg->regs + GINTSTS)); +					dwc2_readl(hsotg, GINTSTS));  				goto error;  			}  		} @@ -2031,11 +2031,11 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)  	chan = hsotg->hc_ptr_array[chnum]; -	hcint = dwc2_readl(hsotg->regs + HCINT(chnum)); -	hcintmsk = dwc2_readl(hsotg->regs + HCINTMSK(chnum)); +	hcint = dwc2_readl(hsotg, HCINT(chnum)); +	hcintmsk = dwc2_readl(hsotg, HCINTMSK(chnum));  	if (!chan) {  		dev_err(hsotg->dev, "## hc_ptr_array for channel is NULL ##\n"); -		dwc2_writel(hcint, hsotg->regs + HCINT(chnum)); +		dwc2_writel(hsotg, hcint, HCINT(chnum));  		return;  	} @@ -2047,7 +2047,7 @@ static void dwc2_hc_n_intr(struct dwc2_hsotg *hsotg, int chnum)  			 hcint, hcintmsk, hcint & hcintmsk);  	} -	dwc2_writel(hcint, hsotg->regs + HCINT(chnum)); +	dwc2_writel(hsotg, hcint, HCINT(chnum));  	/*  	 * If we got an interrupt after someone called @@ -2182,7 +2182,7 @@ static void dwc2_hc_intr(struct dwc2_hsotg *hsotg)  	int i;  	struct dwc2_host_chan *chan, *chan_tmp; -	haint = dwc2_readl(hsotg->regs + HAINT); +	haint = dwc2_readl(hsotg, HAINT);  	if (dbg_perio()) {  		dev_vdbg(hsotg->dev, "%s()\n", __func__); @@ -2266,8 +2266,8 @@ irqreturn_t dwc2_handle_hcd_intr(struct dwc2_hsotg *hsotg)  				 "DWC OTG HCD Finished Servicing Interrupts\n");  			dev_vdbg(hsotg->dev,  				 "DWC OTG HCD gintsts=0x%08x gintmsk=0x%08x\n", -				 dwc2_readl(hsotg->regs + GINTSTS), -				 dwc2_readl(hsotg->regs + GINTMSK)); +				 dwc2_readl(hsotg, GINTSTS), +				 dwc2_readl(hsotg, GINTMSK));  		}  	}  | 
