diff options
Diffstat (limited to 'drivers')
204 files changed, 12559 insertions, 2018 deletions
diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c index 74e34a07ef72..952c45ca6e48 100644 --- a/drivers/amba/bus.c +++ b/drivers/amba/bus.c @@ -291,15 +291,14 @@ static int amba_probe(struct device *dev) if (ret < 0) break; - ret = dev_pm_domain_attach(dev, PD_FLAG_ATTACH_POWER_ON); + ret = dev_pm_domain_attach(dev, PD_FLAG_ATTACH_POWER_ON | + PD_FLAG_DETACH_POWER_OFF); if (ret) break; ret = amba_get_enable_pclk(pcdev); - if (ret) { - dev_pm_domain_detach(dev, true); + if (ret) break; - } pm_runtime_get_noresume(dev); pm_runtime_set_active(dev); @@ -314,7 +313,6 @@ static int amba_probe(struct device *dev) pm_runtime_put_noidle(dev); amba_put_disable_pclk(pcdev); - dev_pm_domain_detach(dev, true); } while (0); return ret; @@ -336,7 +334,6 @@ static void amba_remove(struct device *dev) pm_runtime_put_noidle(dev); amba_put_disable_pclk(pcdev); - dev_pm_domain_detach(dev, true); } static void amba_shutdown(struct device *dev) diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c index a0225a83f50c..97a8b4fcf471 100644 --- a/drivers/base/power/main.c +++ b/drivers/base/power/main.c @@ -2148,6 +2148,7 @@ static int device_prepare(struct device *dev, pm_message_t state) device_lock(dev); dev->power.wakeup_path = false; + dev->power.out_band_wakeup = false; if (dev->power.no_pm_callbacks) goto unlock; diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c index be1e9e61a7bf..16a8301c25d6 100644 --- a/drivers/base/swnode.c +++ b/drivers/base/swnode.c @@ -535,14 +535,29 @@ software_node_get_reference_args(const struct fwnode_handle *fwnode, ref_array = prop->pointer; ref = &ref_array[index]; - refnode = software_node_fwnode(ref->node); + /* + * A software node can reference other software nodes or firmware + * nodes (which are the abstraction layer sitting on top of them). + * This is done to ensure we can create references to static software + * nodes before they're registered with the firmware node framework. + * At the time the reference is being resolved, we expect the swnodes + * in question to already have been registered and to be backed by + * a firmware node. This is why we use the fwnode API below to read the + * relevant properties and bump the reference count. + */ + + if (ref->swnode) + refnode = software_node_fwnode(ref->swnode); + else if (ref->fwnode) + refnode = ref->fwnode; + else + return -EINVAL; + if (!refnode) return -ENOENT; if (nargs_prop) { - error = property_entry_read_int_array(ref->node->properties, - nargs_prop, sizeof(u32), - &nargs_prop_val, 1); + error = fwnode_property_read_u32(refnode, nargs_prop, &nargs_prop_val); if (error) return error; @@ -555,7 +570,7 @@ software_node_get_reference_args(const struct fwnode_handle *fwnode, if (!args) return 0; - args->fwnode = software_node_get(refnode); + args->fwnode = fwnode_handle_get(refnode); args->nargs = nargs; for (i = 0; i < nargs; i++) @@ -635,7 +650,10 @@ software_node_graph_get_remote_endpoint(const struct fwnode_handle *fwnode) ref = prop->pointer; - return software_node_get(software_node_fwnode(ref[0].node)); + if (!ref->swnode) + return NULL; + + return software_node_get(software_node_fwnode(ref->swnode)); } static struct fwnode_handle * diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index dc11b62399ad..a1d11ecd1ac8 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -219,20 +219,13 @@ static bool __init cpu0_node_has_opp_v2_prop(void) static int __init cpufreq_dt_platdev_init(void) { - struct device_node *np __free(device_node) = of_find_node_by_path("/"); - const struct of_device_id *match; - const void *data = NULL; + const void *data; - if (!np) - return -ENODEV; - - match = of_match_node(allowlist, np); - if (match) { - data = match->data; + data = of_machine_get_match_data(allowlist); + if (data) goto create_pdev; - } - if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np)) + if (cpu0_node_has_opp_v2_prop() && !of_machine_device_match(blocklist)) goto create_pdev; return -ENODEV; diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c index 5d50a231f944..052ca7cd2f4f 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -764,22 +764,14 @@ MODULE_DEVICE_TABLE(of, mtk_cpufreq_machines); static int __init mtk_cpufreq_driver_init(void) { - struct device_node *np; - const struct of_device_id *match; const struct mtk_cpufreq_platform_data *data; int err; - np = of_find_node_by_path("/"); - if (!np) - return -ENODEV; - - match = of_match_node(mtk_cpufreq_machines, np); - of_node_put(np); - if (!match) { + data = of_machine_get_match_data(mtk_cpufreq_machines); + if (!data) { pr_debug("Machine is not compatible with mtk-cpufreq\n"); return -ENODEV; } - data = match->data; err = platform_driver_register(&mtk_cpufreq_platdrv); if (err) diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c index 744312a44279..4fffc8e83692 100644 --- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c +++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c @@ -332,13 +332,6 @@ static const struct of_device_id sun50i_cpufreq_match_list[] = { }; MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list); -static const struct of_device_id *sun50i_cpufreq_match_node(void) -{ - struct device_node *np __free(device_node) = of_find_node_by_path("/"); - - return of_match_node(sun50i_cpufreq_match_list, np); -} - /* * Since the driver depends on nvmem drivers, which may return EPROBE_DEFER, * all the real activity is done in the probe, which may be defered as well. @@ -346,11 +339,9 @@ static const struct of_device_id *sun50i_cpufreq_match_node(void) */ static int __init sun50i_cpufreq_init(void) { - const struct of_device_id *match; int ret; - match = sun50i_cpufreq_match_node(); - if (!match) + if (!of_machine_device_match(sun50i_cpufreq_match_list)) return -ENODEV; ret = platform_driver_register(&sun50i_cpufreq_driver); diff --git a/drivers/cpuidle/cpuidle-big_little.c b/drivers/cpuidle/cpuidle-big_little.c index 4abba42fcc31..08f6bf2f6409 100644 --- a/drivers/cpuidle/cpuidle-big_little.c +++ b/drivers/cpuidle/cpuidle-big_little.c @@ -166,20 +166,11 @@ static const struct of_device_id compatible_machine_match[] = { static int __init bl_idle_init(void) { int ret; - struct device_node *root = of_find_node_by_path("/"); - const struct of_device_id *match_id; - - if (!root) - return -ENODEV; /* * Initialize the driver just for a compliant set of machines */ - match_id = of_match_node(compatible_machine_match, root); - - of_node_put(root); - - if (!match_id) + if (!of_machine_device_match(compatible_machine_match)) return -ENODEV; if (!mcpm_is_available()) diff --git a/drivers/cpuidle/cpuidle-psci.c b/drivers/cpuidle/cpuidle-psci.c index b19bc60cc627..e75d85a8f90d 100644 --- a/drivers/cpuidle/cpuidle-psci.c +++ b/drivers/cpuidle/cpuidle-psci.c @@ -382,8 +382,8 @@ static int psci_idle_init_cpu(struct device *dev, int cpu) drv->states[0].exit_latency = 1; drv->states[0].target_residency = 1; drv->states[0].power_usage = UINT_MAX; - strcpy(drv->states[0].name, "WFI"); - strcpy(drv->states[0].desc, "ARM WFI"); + strscpy(drv->states[0].name, "WFI"); + strscpy(drv->states[0].desc, "ARM WFI"); /* * If no DT idle states are detected (ret == 0) let the driver diff --git a/drivers/firmware/qcom/qcom_scm.c b/drivers/firmware/qcom/qcom_scm.c index e777b7cb9b12..1a6f85e463e0 100644 --- a/drivers/firmware/qcom/qcom_scm.c +++ b/drivers/firmware/qcom/qcom_scm.c @@ -2018,21 +2018,6 @@ static const struct of_device_id qcom_scm_qseecom_allowlist[] __maybe_unused = { { } }; -static bool qcom_scm_qseecom_machine_is_allowed(void) -{ - struct device_node *np; - bool match; - - np = of_find_node_by_path("/"); - if (!np) - return false; - - match = of_match_node(qcom_scm_qseecom_allowlist, np); - of_node_put(np); - - return match; -} - static void qcom_scm_qseecom_free(void *data) { struct platform_device *qseecom_dev = data; @@ -2064,7 +2049,7 @@ static int qcom_scm_qseecom_init(struct qcom_scm *scm) dev_info(scm->dev, "qseecom: found qseecom with version 0x%x\n", version); - if (!qcom_scm_qseecom_machine_is_allowed()) { + if (!of_machine_device_match(qcom_scm_qseecom_allowlist)) { dev_info(scm->dev, "qseecom: untested machine, skipping\n"); return 0; } diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index b8b6537290b0..c74da29253e8 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -45,14 +45,6 @@ config GPIOLIB_IRQCHIP select IRQ_DOMAIN bool -config OF_GPIO_MM_GPIOCHIP - bool - help - This adds support for the legacy 'struct of_mm_gpio_chip' interface - from PowerPC. Existing drivers using this interface need to select - this symbol, but new drivers should use the generic gpio-regmap - infrastructure instead. - config GPIO_SHARED def_bool y depends on HAVE_SHARED_GPIOS || COMPILE_TEST @@ -484,7 +476,6 @@ config GPIO_MENZ127 config GPIO_MM_LANTIQ bool "Lantiq Memory mapped GPIOs" depends on LANTIQ && SOC_XWAY - select OF_GPIO_MM_GPIOCHIP help This enables support for memory mapped GPIOs on the External Bus Unit (EBU) found on Lantiq SoCs. The GPIOs are output only as they are @@ -1421,7 +1412,7 @@ config HTC_EGPIO config GPIO_ELKHARTLAKE tristate "Intel Elkhart Lake PSE GPIO support" - depends on X86 || COMPILE_TEST + depends on INTEL_EHL_PSE_IO select GPIO_TANGIER help Select this option to enable GPIO support for Intel Elkhart Lake @@ -1573,6 +1564,15 @@ config GPIO_PMIC_EIC_SPRD help Say yes here to support Spreadtrum PMIC EIC device. +config GPIO_QIXIS_FPGA + tristate "NXP QIXIS FPGA GPIO support" + depends on MFD_SIMPLE_MFD_I2C || COMPILE_TEST + select GPIO_REGMAP + help + This enables support for the GPIOs found in the QIXIS FPGA which is + integrated on some NXP Layerscape boards such as LX2160ARDB and + LS1046AQDS. + config GPIO_RC5T583 bool "RICOH RC5T583 GPIO" depends on MFD_RC5T583 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index d0020bc70b84..2421a8fd3733 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -147,6 +147,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o obj-$(CONFIG_GPIO_POLARFIRE_SOC) += gpio-mpfs.o obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o +obj-$(CONFIG_GPIO_QIXIS_FPGA) += gpio-qixis-fpga.o obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o diff --git a/drivers/gpio/TODO b/drivers/gpio/TODO index 8ed74e05903a..5acaeab029ec 100644 --- a/drivers/gpio/TODO +++ b/drivers/gpio/TODO @@ -86,17 +86,6 @@ Work items: ------------------------------------------------------------------------------- -Get rid of <linux/gpio/legacy-of-mm-gpiochip.h> - -Work items: - -- Get rid of struct of_mm_gpio_chip altogether: use the generic MMIO - GPIO for all current users (see below). Delete struct of_mm_gpio_chip, - to_of_mm_gpio_chip(), of_mm_gpiochip_add_data(), of_mm_gpiochip_remove(), - CONFIG_OF_GPIO_MM_GPIOCHIP from the kernel. - -------------------------------------------------------------------------------- - Collect drivers Collect GPIO drivers from arch/* and other places that should be placed diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 7953a9c4e36d..2e0ae953dd99 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -24,12 +24,11 @@ /* * These two headers aren't meant to be used by GPIO drivers. We need - * them in order to access gpio_chip_hwgpio() which we need to implement + * them in order to access gpiod_hwgpio() which we need to implement * the aspeed specific API which allows the coprocessor to request * access to some GPIOs and to arbitrate between coprocessor and ARM. */ #include <linux/gpio/consumer.h> -#include "gpiolib.h" /* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) @@ -942,7 +941,7 @@ int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc, { struct gpio_chip *chip = gpiod_to_chip(desc); struct aspeed_gpio *gpio = gpiochip_get_data(chip); - int rc = 0, bindex, offset = gpio_chip_hwgpio(desc); + int rc = 0, bindex, offset = gpiod_hwgpio(desc); const struct aspeed_gpio_bank *bank = to_bank(offset); if (!aspeed_gpio_support_copro(gpio)) @@ -987,7 +986,7 @@ int aspeed_gpio_copro_release_gpio(struct gpio_desc *desc) { struct gpio_chip *chip = gpiod_to_chip(desc); struct aspeed_gpio *gpio = gpiochip_get_data(chip); - int rc = 0, bindex, offset = gpio_chip_hwgpio(desc); + int rc = 0, bindex, offset = gpiod_hwgpio(desc); if (!aspeed_gpio_support_copro(gpio)) return -EOPNOTSUPP; diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c index f40c9472588b..af9287ff5dc4 100644 --- a/drivers/gpio/gpio-brcmstb.c +++ b/drivers/gpio/gpio-brcmstb.c @@ -533,7 +533,6 @@ static void brcmstb_gpio_shutdown(struct platform_device *pdev) brcmstb_gpio_quiesce(&pdev->dev, false); } -#ifdef CONFIG_PM_SLEEP static void brcmstb_gpio_bank_restore(struct brcmstb_gpio_priv *priv, struct brcmstb_gpio_bank *bank) { @@ -572,14 +571,9 @@ static int brcmstb_gpio_resume(struct device *dev) return 0; } -#else -#define brcmstb_gpio_suspend NULL -#define brcmstb_gpio_resume NULL -#endif /* CONFIG_PM_SLEEP */ - static const struct dev_pm_ops brcmstb_gpio_pm_ops = { - .suspend_noirq = brcmstb_gpio_suspend, - .resume_noirq = brcmstb_gpio_resume, + .suspend_noirq = pm_sleep_ptr(brcmstb_gpio_suspend), + .resume_noirq = pm_sleep_ptr(brcmstb_gpio_resume), }; static int brcmstb_gpio_probe(struct platform_device *pdev) @@ -755,7 +749,7 @@ static struct platform_driver brcmstb_gpio_driver = { .driver = { .name = "brcmstb-gpio", .of_match_table = brcmstb_gpio_of_match, - .pm = &brcmstb_gpio_pm_ops, + .pm = pm_sleep_ptr(&brcmstb_gpio_pm_ops), }, .probe = brcmstb_gpio_probe, .remove = brcmstb_gpio_remove, diff --git a/drivers/gpio/gpio-bt8xx.c b/drivers/gpio/gpio-bt8xx.c index 05401da03ca3..324eeb77dbd5 100644 --- a/drivers/gpio/gpio-bt8xx.c +++ b/drivers/gpio/gpio-bt8xx.c @@ -52,10 +52,8 @@ struct bt8xxgpio { struct pci_dev *pdev; struct gpio_chip gpio; -#ifdef CONFIG_PM u32 saved_outen; u32 saved_data; -#endif }; #define bgwrite(dat, adr) writel((dat), bg->mmio+(adr)) @@ -224,9 +222,10 @@ static void bt8xxgpio_remove(struct pci_dev *pdev) pci_disable_device(pdev); } -#ifdef CONFIG_PM -static int bt8xxgpio_suspend(struct pci_dev *pdev, pm_message_t state) + +static int bt8xxgpio_suspend(struct device *dev) { + struct pci_dev *pdev = to_pci_dev(dev); struct bt8xxgpio *bg = pci_get_drvdata(pdev); scoped_guard(spinlock_irqsave, &bg->lock) { @@ -238,23 +237,13 @@ static int bt8xxgpio_suspend(struct pci_dev *pdev, pm_message_t state) bgwrite(0x0, BT848_GPIO_OUT_EN); } - pci_save_state(pdev); - pci_disable_device(pdev); - pci_set_power_state(pdev, pci_choose_state(pdev, state)); - return 0; } -static int bt8xxgpio_resume(struct pci_dev *pdev) +static int bt8xxgpio_resume(struct device *dev) { + struct pci_dev *pdev = to_pci_dev(dev); struct bt8xxgpio *bg = pci_get_drvdata(pdev); - int err; - - pci_set_power_state(pdev, PCI_D0); - err = pci_enable_device(pdev); - if (err) - return err; - pci_restore_state(pdev); guard(spinlock_irqsave)(&bg->lock); @@ -267,10 +256,8 @@ static int bt8xxgpio_resume(struct pci_dev *pdev) return 0; } -#else -#define bt8xxgpio_suspend NULL -#define bt8xxgpio_resume NULL -#endif /* CONFIG_PM */ + +static DEFINE_SIMPLE_DEV_PM_OPS(bt8xxgpio_pm_ops, bt8xxgpio_suspend, bt8xxgpio_resume); static const struct pci_device_id bt8xxgpio_pci_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BT848) }, @@ -286,8 +273,7 @@ static struct pci_driver bt8xxgpio_pci_driver = { .id_table = bt8xxgpio_pci_tbl, .probe = bt8xxgpio_probe, .remove = bt8xxgpio_remove, - .suspend = bt8xxgpio_suspend, - .resume = bt8xxgpio_resume, + .driver.pm = &bt8xxgpio_pm_ops, }; module_pci_driver(bt8xxgpio_pci_driver); diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index b42ff46d292b..4986c465c9a8 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c @@ -79,7 +79,6 @@ struct dwapb_platform_data { unsigned int nports; }; -#ifdef CONFIG_PM_SLEEP /* Store GPIO context across system-wide suspend/resume transitions */ struct dwapb_context { u32 data; @@ -92,7 +91,6 @@ struct dwapb_context { u32 int_deb; u32 wake_en; }; -#endif struct dwapb_gpio_port_irqchip { unsigned int nr_irqs; @@ -103,9 +101,7 @@ struct dwapb_gpio_port { struct gpio_generic_chip chip; struct dwapb_gpio_port_irqchip *pirq; struct dwapb_gpio *gpio; -#ifdef CONFIG_PM_SLEEP struct dwapb_context *ctx; -#endif unsigned int idx; }; @@ -363,7 +359,6 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type) return 0; } -#ifdef CONFIG_PM_SLEEP static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); @@ -378,9 +373,6 @@ static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable) return 0; } -#else -#define dwapb_irq_set_wake NULL -#endif static const struct irq_chip dwapb_irq_chip = { .name = DWAPB_DRIVER_NAME, @@ -390,7 +382,7 @@ static const struct irq_chip dwapb_irq_chip = { .irq_set_type = dwapb_irq_set_type, .irq_enable = dwapb_irq_enable, .irq_disable = dwapb_irq_disable, - .irq_set_wake = dwapb_irq_set_wake, + .irq_set_wake = pm_sleep_ptr(dwapb_irq_set_wake), .flags = IRQCHIP_IMMUTABLE, GPIOCHIP_IRQ_RESOURCE_HELPERS, }; @@ -759,7 +751,6 @@ static int dwapb_gpio_probe(struct platform_device *pdev) return 0; } -#ifdef CONFIG_PM_SLEEP static int dwapb_gpio_suspend(struct device *dev) { struct dwapb_gpio *gpio = dev_get_drvdata(dev); @@ -844,15 +835,14 @@ static int dwapb_gpio_resume(struct device *dev) return 0; } -#endif -static SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, dwapb_gpio_suspend, - dwapb_gpio_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, + dwapb_gpio_suspend, dwapb_gpio_resume); static struct platform_driver dwapb_gpio_driver = { .driver = { .name = DWAPB_DRIVER_NAME, - .pm = &dwapb_gpio_pm_ops, + .pm = pm_sleep_ptr(&dwapb_gpio_pm_ops), .of_match_table = dwapb_of_match, .acpi_match_table = dwapb_acpi_match, }, diff --git a/drivers/gpio/gpio-elkhartlake.c b/drivers/gpio/gpio-elkhartlake.c index 95de52d2cc63..b96e7928b6e5 100644 --- a/drivers/gpio/gpio-elkhartlake.c +++ b/drivers/gpio/gpio-elkhartlake.c @@ -2,43 +2,46 @@ /* * Intel Elkhart Lake PSE GPIO driver * - * Copyright (c) 2023 Intel Corporation. + * Copyright (c) 2023, 2025 Intel Corporation. * * Authors: Pandith N <pandith.n@intel.com> * Raag Jadav <raag.jadav@intel.com> */ +#include <linux/auxiliary_bus.h> #include <linux/device.h> #include <linux/err.h> #include <linux/module.h> -#include <linux/platform_device.h> #include <linux/pm.h> +#include <linux/ehl_pse_io_aux.h> + #include "gpio-tangier.h" /* Each Intel EHL PSE GPIO Controller has 30 GPIO pins */ #define EHL_PSE_NGPIO 30 -static int ehl_gpio_probe(struct platform_device *pdev) +static int ehl_gpio_probe(struct auxiliary_device *adev, const struct auxiliary_device_id *id) { - struct device *dev = &pdev->dev; + struct device *dev = &adev->dev; + struct ehl_pse_io_data *data; struct tng_gpio *priv; - int irq, ret; + int ret; - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; + data = dev_get_platdata(dev); + if (!data) + return -ENODATA; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; - priv->reg_base = devm_platform_ioremap_resource(pdev, 0); + priv->reg_base = devm_ioremap_resource(dev, &data->mem); if (IS_ERR(priv->reg_base)) return PTR_ERR(priv->reg_base); priv->dev = dev; - priv->irq = irq; + priv->irq = data->irq; priv->info.base = -1; priv->info.ngpio = EHL_PSE_NGPIO; @@ -51,25 +54,24 @@ static int ehl_gpio_probe(struct platform_device *pdev) if (ret) return dev_err_probe(dev, ret, "tng_gpio_probe error\n"); - platform_set_drvdata(pdev, priv); + auxiliary_set_drvdata(adev, priv); return 0; } -static const struct platform_device_id ehl_gpio_ids[] = { - { "gpio-elkhartlake" }, +static const struct auxiliary_device_id ehl_gpio_ids[] = { + { EHL_PSE_IO_NAME "." EHL_PSE_GPIO_NAME }, { } }; -MODULE_DEVICE_TABLE(platform, ehl_gpio_ids); +MODULE_DEVICE_TABLE(auxiliary, ehl_gpio_ids); -static struct platform_driver ehl_gpio_driver = { +static struct auxiliary_driver ehl_gpio_driver = { .driver = { - .name = "gpio-elkhartlake", .pm = pm_sleep_ptr(&tng_gpio_pm_ops), }, .probe = ehl_gpio_probe, .id_table = ehl_gpio_ids, }; -module_platform_driver(ehl_gpio_driver); +module_auxiliary_driver(ehl_gpio_driver); MODULE_AUTHOR("Pandith N <pandith.n@intel.com>"); MODULE_AUTHOR("Raag Jadav <raag.jadav@intel.com>"); diff --git a/drivers/gpio/gpio-fxl6408.c b/drivers/gpio/gpio-fxl6408.c index 86ebc66b1104..afc1b8461dab 100644 --- a/drivers/gpio/gpio-fxl6408.c +++ b/drivers/gpio/gpio-fxl6408.c @@ -123,6 +123,8 @@ static int fxl6408_probe(struct i2c_client *client) if (ret) return ret; + i2c_set_clientdata(client, gpio_config.regmap); + /* Disable High-Z of outputs, so that our OUTPUT updates actually take effect. */ ret = regmap_write(gpio_config.regmap, FXL6408_REG_OUTPUT_HIGH_Z, 0); if (ret) @@ -131,6 +133,16 @@ static int fxl6408_probe(struct i2c_client *client) return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config)); } +static int fxl6408_resume(struct device *dev) +{ + struct regmap *regmap = dev_get_drvdata(dev); + + regcache_mark_dirty(regmap); + return regcache_sync(regmap); +} + +static DEFINE_SIMPLE_DEV_PM_OPS(fxl6408_pm_ops, NULL, fxl6408_resume); + static const __maybe_unused struct of_device_id fxl6408_dt_ids[] = { { .compatible = "fcs,fxl6408" }, { } @@ -146,6 +158,7 @@ MODULE_DEVICE_TABLE(i2c, fxl6408_id); static struct i2c_driver fxl6408_driver = { .driver = { .name = "fxl6408", + .pm = pm_sleep_ptr(&fxl6408_pm_ops), .of_match_table = fxl6408_dt_ids, }, .probe = fxl6408_probe, diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c index 0c0f97fa14fc..e4fa84e22726 100644 --- a/drivers/gpio/gpio-grgpio.c +++ b/drivers/gpio/gpio-grgpio.c @@ -46,7 +46,7 @@ /* Structure for an irq of the core - called an underlying irq */ struct grgpio_uirq { - u8 refcnt; /* Reference counter to manage requesting/freeing of uirq */ + atomic_t refcnt; /* Reference counter to manage requesting/freeing of uirq */ u8 uirq; /* Underlying irq of the gpio driver */ }; @@ -242,30 +242,22 @@ static int grgpio_irq_map(struct irq_domain *d, unsigned int irq, irq, offset); gpio_generic_chip_lock_irqsave(&priv->chip, flags); - - /* Request underlying irq if not already requested */ lirq->irq = irq; uirq = &priv->uirqs[lirq->index]; - if (uirq->refcnt == 0) { - /* - * FIXME: This is not how locking works at all, you can't just - * release the lock for a moment to do something that can't - * sleep... - */ - gpio_generic_chip_unlock_irqrestore(&priv->chip, flags); + gpio_generic_chip_unlock_irqrestore(&priv->chip, flags); + + /* Request underlying irq if not already requested */ + if (atomic_fetch_add(1, &uirq->refcnt) == 0) { ret = request_irq(uirq->uirq, grgpio_irq_handler, 0, dev_name(priv->dev), priv); if (ret) { dev_err(priv->dev, "Could not request underlying irq %d\n", uirq->uirq); + atomic_dec(&uirq->refcnt); /* rollback */ return ret; } - gpio_generic_chip_lock_irqsave(&priv->chip, flags); } - uirq->refcnt++; - - gpio_generic_chip_unlock_irqrestore(&priv->chip, flags); /* Setup irq */ irq_set_chip_data(irq, priv); @@ -306,8 +298,7 @@ static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq) if (index >= 0) { uirq = &priv->uirqs[lirq->index]; - uirq->refcnt--; - if (uirq->refcnt == 0) { + if (atomic_dec_and_test(&uirq->refcnt)) { gpio_generic_chip_unlock_irqrestore(&priv->chip, flags); free_irq(uirq->uirq, priv); return; @@ -434,6 +425,7 @@ static int grgpio_probe(struct platform_device *ofdev) continue; } priv->uirqs[lirq->index].uirq = ret; + atomic_set(&priv->uirqs[lirq->index].refcnt, 0); } } diff --git a/drivers/gpio/gpio-htc-egpio.c b/drivers/gpio/gpio-htc-egpio.c index 2eaed83214d8..72935d6dbebf 100644 --- a/drivers/gpio/gpio-htc-egpio.c +++ b/drivers/gpio/gpio-htc-egpio.c @@ -364,21 +364,20 @@ static int __init egpio_probe(struct platform_device *pdev) return 0; } -#ifdef CONFIG_PM -static int egpio_suspend(struct platform_device *pdev, pm_message_t state) +static int egpio_suspend(struct device *dev) { - struct egpio_info *ei = platform_get_drvdata(pdev); + struct egpio_info *ei = dev_get_drvdata(dev); - if (ei->chained_irq && device_may_wakeup(&pdev->dev)) + if (ei->chained_irq && device_may_wakeup(dev)) enable_irq_wake(ei->chained_irq); return 0; } -static int egpio_resume(struct platform_device *pdev) +static int egpio_resume(struct device *dev) { - struct egpio_info *ei = platform_get_drvdata(pdev); + struct egpio_info *ei = dev_get_drvdata(dev); - if (ei->chained_irq && device_may_wakeup(&pdev->dev)) + if (ei->chained_irq && device_may_wakeup(dev)) disable_irq_wake(ei->chained_irq); /* Update registers from the cache, in case @@ -386,19 +385,15 @@ static int egpio_resume(struct platform_device *pdev) egpio_write_cache(ei); return 0; } -#else -#define egpio_suspend NULL -#define egpio_resume NULL -#endif +static DEFINE_SIMPLE_DEV_PM_OPS(egpio_pm_ops, egpio_suspend, egpio_resume); static struct platform_driver egpio_driver = { .driver = { .name = "htc-egpio", .suppress_bind_attrs = true, + .pm = pm_sleep_ptr(&egpio_pm_ops), }, - .suspend = egpio_suspend, - .resume = egpio_resume, }; static int __init egpio_init(void) diff --git a/drivers/gpio/gpio-latch.c b/drivers/gpio/gpio-latch.c index c64aaa896766..452a9ce61488 100644 --- a/drivers/gpio/gpio-latch.c +++ b/drivers/gpio/gpio-latch.c @@ -48,8 +48,6 @@ #include <linux/property.h> #include <linux/delay.h> -#include "gpiolib.h" - struct gpio_latch_priv { struct gpio_chip gc; struct gpio_descs *clk_gpios; diff --git a/drivers/gpio/gpio-loongson-64bit.c b/drivers/gpio/gpio-loongson-64bit.c index 02f181cb219e..77d07e31366f 100644 --- a/drivers/gpio/gpio-loongson-64bit.c +++ b/drivers/gpio/gpio-loongson-64bit.c @@ -312,6 +312,7 @@ static int loongson_gpio_init(struct platform_device *pdev, struct loongson_gpio lgpio->chip.gc.direction_output = loongson_gpio_direction_output; lgpio->chip.gc.set = loongson_gpio_set; lgpio->chip.gc.parent = &pdev->dev; + lgpio->chip.gc.base = -1; spin_lock_init(&lgpio->lock); } @@ -407,11 +408,11 @@ static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data0 = { static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data1 = { .label = "ls2k2000_gpio", - .mode = BIT_CTRL_MODE, - .conf_offset = 0x0, - .in_offset = 0x20, - .out_offset = 0x10, - .inten_offset = 0x30, + .mode = BYTE_CTRL_MODE, + .conf_offset = 0x800, + .in_offset = 0xa00, + .out_offset = 0x900, + .inten_offset = 0xb00, }; static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data2 = { diff --git a/drivers/gpio/gpio-menz127.c b/drivers/gpio/gpio-menz127.c index da2bf9381cc4..52b13c6ae496 100644 --- a/drivers/gpio/gpio-menz127.c +++ b/drivers/gpio/gpio-menz127.c @@ -24,6 +24,11 @@ #define MEN_Z127_ODER 0x1C #define GPIO_TO_DBCNT_REG(gpio) ((gpio * 4) + 0x80) +/* MEN Z127 supported model ids*/ +#define MEN_Z127_ID 0x7f +#define MEN_Z034_ID 0x22 +#define MEN_Z037_ID 0x25 + #define MEN_Z127_DB_MIN_US 50 /* 16 bit compare register. Each bit represents 50us */ #define MEN_Z127_DB_MAX_US (0xffff * MEN_Z127_DB_MIN_US) @@ -140,6 +145,7 @@ static int men_z127_probe(struct mcb_device *mdev, struct men_z127_gpio *men_z127_gpio; struct device *dev = &mdev->dev; int ret; + unsigned long sz; men_z127_gpio = devm_kzalloc(dev, sizeof(struct men_z127_gpio), GFP_KERNEL); @@ -163,9 +169,21 @@ static int men_z127_probe(struct mcb_device *mdev, mcb_set_drvdata(mdev, men_z127_gpio); + switch (mdev->id) { + case MEN_Z127_ID: + sz = 4; + break; + case MEN_Z034_ID: + case MEN_Z037_ID: + sz = 1; + break; + default: + return dev_err_probe(&mdev->dev, -EINVAL, "no size found for id %d", mdev->id); + } + config = (struct gpio_generic_chip_config) { .dev = &mdev->dev, - .sz = 4, + .sz = sz, .dat = men_z127_gpio->reg_base + MEN_Z127_PSR, .set = men_z127_gpio->reg_base + MEN_Z127_CTRL, .dirout = men_z127_gpio->reg_base + MEN_Z127_GPIODR, @@ -186,7 +204,9 @@ static int men_z127_probe(struct mcb_device *mdev, } static const struct mcb_device_id men_z127_ids[] = { - { .device = 0x7f }, + { .device = MEN_Z127_ID }, + { .device = MEN_Z034_ID }, + { .device = MEN_Z037_ID }, { } }; MODULE_DEVICE_TABLE(mcb, men_z127_ids); @@ -201,7 +221,7 @@ static struct mcb_driver men_z127_driver = { module_mcb_driver(men_z127_driver); MODULE_AUTHOR("Andreas Werner <andreas.werner@men.de>"); -MODULE_DESCRIPTION("MEN 16z127 GPIO Controller"); +MODULE_DESCRIPTION("MEN GPIO Controller"); MODULE_LICENSE("GPL v2"); MODULE_ALIAS("mcb:16z127"); MODULE_IMPORT_NS("MCB"); diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c index f6af81bf2b13..6576e5dcb0ee 100644 --- a/drivers/gpio/gpio-ml-ioh.c +++ b/drivers/gpio/gpio-ml-ioh.c @@ -160,7 +160,7 @@ static int ioh_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) /* * Save register configuration and disable interrupts. */ -static void __maybe_unused ioh_gpio_save_reg_conf(struct ioh_gpio *chip) +static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) { int i; @@ -186,7 +186,7 @@ static void __maybe_unused ioh_gpio_save_reg_conf(struct ioh_gpio *chip) /* * This function restores the register configuration of the GPIO device. */ -static void __maybe_unused ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) +static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) { int i; @@ -479,7 +479,7 @@ static int ioh_gpio_probe(struct pci_dev *pdev, return 0; } -static int __maybe_unused ioh_gpio_suspend(struct device *dev) +static int ioh_gpio_suspend(struct device *dev) { struct ioh_gpio *chip = dev_get_drvdata(dev); unsigned long flags; @@ -491,7 +491,7 @@ static int __maybe_unused ioh_gpio_suspend(struct device *dev) return 0; } -static int __maybe_unused ioh_gpio_resume(struct device *dev) +static int ioh_gpio_resume(struct device *dev) { struct ioh_gpio *chip = dev_get_drvdata(dev); unsigned long flags; @@ -505,7 +505,7 @@ static int __maybe_unused ioh_gpio_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(ioh_gpio_pm_ops, ioh_gpio_suspend, ioh_gpio_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(ioh_gpio_pm_ops, ioh_gpio_suspend, ioh_gpio_resume); static const struct pci_device_id ioh_gpio_pcidev_id[] = { { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) }, @@ -518,7 +518,7 @@ static struct pci_driver ioh_gpio_driver = { .id_table = ioh_gpio_pcidev_id, .probe = ioh_gpio_probe, .driver = { - .pm = &ioh_gpio_pm_ops, + .pm = pm_sleep_ptr(&ioh_gpio_pm_ops), }, }; diff --git a/drivers/gpio/gpio-mlxbf2.c b/drivers/gpio/gpio-mlxbf2.c index abffce3894fc..6668686a28ff 100644 --- a/drivers/gpio/gpio-mlxbf2.c +++ b/drivers/gpio/gpio-mlxbf2.c @@ -424,7 +424,7 @@ mlxbf2_gpio_probe(struct platform_device *pdev) return 0; } -static int __maybe_unused mlxbf2_gpio_suspend(struct device *dev) +static int mlxbf2_gpio_suspend(struct device *dev) { struct mlxbf2_gpio_context *gs = dev_get_drvdata(dev); @@ -436,7 +436,7 @@ static int __maybe_unused mlxbf2_gpio_suspend(struct device *dev) return 0; } -static int __maybe_unused mlxbf2_gpio_resume(struct device *dev) +static int mlxbf2_gpio_resume(struct device *dev) { struct mlxbf2_gpio_context *gs = dev_get_drvdata(dev); @@ -447,7 +447,7 @@ static int __maybe_unused mlxbf2_gpio_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(mlxbf2_pm_ops, mlxbf2_gpio_suspend, mlxbf2_gpio_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(mlxbf2_pm_ops, mlxbf2_gpio_suspend, mlxbf2_gpio_resume); static const struct acpi_device_id __maybe_unused mlxbf2_gpio_acpi_match[] = { { "MLNXBF22", 0 }, @@ -459,7 +459,7 @@ static struct platform_driver mlxbf2_gpio_driver = { .driver = { .name = "mlxbf2_gpio", .acpi_match_table = mlxbf2_gpio_acpi_match, - .pm = &mlxbf2_pm_ops, + .pm = pm_sleep_ptr(&mlxbf2_pm_ops), }, .probe = mlxbf2_gpio_probe, }; diff --git a/drivers/gpio/gpio-mm-lantiq.c b/drivers/gpio/gpio-mm-lantiq.c index 8f1405733d98..1bd98c50a459 100644 --- a/drivers/gpio/gpio-mm-lantiq.c +++ b/drivers/gpio/gpio-mm-lantiq.c @@ -10,7 +10,6 @@ #include <linux/platform_device.h> #include <linux/mutex.h> #include <linux/gpio/driver.h> -#include <linux/gpio/legacy-of-mm-gpiochip.h> #include <linux/of.h> #include <linux/io.h> #include <linux/slab.h> @@ -27,7 +26,8 @@ #define LTQ_EBU_WP 0x80000000 /* write protect bit */ struct ltq_mm { - struct of_mm_gpio_chip mmchip; + struct gpio_chip gc; + void __iomem *regs; u16 shadow; /* shadow the latches state */ }; @@ -44,7 +44,7 @@ static void ltq_mm_apply(struct ltq_mm *chip) spin_lock_irqsave(&ebu_lock, flags); ltq_ebu_w32(LTQ_EBU_BUSCON, LTQ_EBU_BUSCON1); - __raw_writew(chip->shadow, chip->mmchip.regs); + __raw_writew(chip->shadow, chip->regs); ltq_ebu_w32(LTQ_EBU_BUSCON | LTQ_EBU_WP, LTQ_EBU_BUSCON1); spin_unlock_irqrestore(&ebu_lock, flags); } @@ -52,8 +52,8 @@ static void ltq_mm_apply(struct ltq_mm *chip) /** * ltq_mm_set() - gpio_chip->set - set gpios. * @gc: Pointer to gpio_chip device structure. - * @gpio: GPIO signal number. - * @val: Value to be written to specified signal. + * @offset: GPIO signal number. + * @value: Value to be written to specified signal. * * Set the shadow value and call ltq_mm_apply. Always returns 0. */ @@ -73,8 +73,8 @@ static int ltq_mm_set(struct gpio_chip *gc, unsigned int offset, int value) /** * ltq_mm_dir_out() - gpio_chip->dir_out - set gpio direction. * @gc: Pointer to gpio_chip device structure. - * @gpio: GPIO signal number. - * @val: Value to be written to specified signal. + * @offset: GPIO signal number. + * @value: Value to be written to specified signal. * * Same as ltq_mm_set, always returns 0. */ @@ -85,21 +85,21 @@ static int ltq_mm_dir_out(struct gpio_chip *gc, unsigned offset, int value) /** * ltq_mm_save_regs() - Set initial values of GPIO pins - * @mm_gc: pointer to memory mapped GPIO chip structure + * @chip: Pointer to our private data structure. */ -static void ltq_mm_save_regs(struct of_mm_gpio_chip *mm_gc) +static void ltq_mm_save_regs(struct ltq_mm *chip) { - struct ltq_mm *chip = - container_of(mm_gc, struct ltq_mm, mmchip); - /* tell the ebu controller which memory address we will be using */ - ltq_ebu_w32(CPHYSADDR(chip->mmchip.regs) | 0x1, LTQ_EBU_ADDRSEL1); + ltq_ebu_w32(CPHYSADDR((__force void *)chip->regs) | 0x1, LTQ_EBU_ADDRSEL1); ltq_mm_apply(chip); } static int ltq_mm_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; + struct gpio_chip *gc; struct ltq_mm *chip; u32 shadow; @@ -107,25 +107,29 @@ static int ltq_mm_probe(struct platform_device *pdev) if (!chip) return -ENOMEM; - platform_set_drvdata(pdev, chip); + gc = &chip->gc; + + gc->base = -1; + gc->ngpio = 16; + gc->direction_output = ltq_mm_dir_out; + gc->set = ltq_mm_set; + gc->parent = dev; + gc->owner = THIS_MODULE; + gc->label = devm_kasprintf(dev, GFP_KERNEL, "%pOF", np); + if (!gc->label) + return -ENOMEM; + + chip->regs = devm_of_iomap(dev, np, 0, NULL); + if (IS_ERR(chip->regs)) + return PTR_ERR(chip->regs); - chip->mmchip.gc.ngpio = 16; - chip->mmchip.gc.direction_output = ltq_mm_dir_out; - chip->mmchip.gc.set = ltq_mm_set; - chip->mmchip.save_regs = ltq_mm_save_regs; + ltq_mm_save_regs(chip); /* store the shadow value if one was passed by the devicetree */ if (!of_property_read_u32(pdev->dev.of_node, "lantiq,shadow", &shadow)) chip->shadow = shadow; - return of_mm_gpiochip_add_data(pdev->dev.of_node, &chip->mmchip, chip); -} - -static void ltq_mm_remove(struct platform_device *pdev) -{ - struct ltq_mm *chip = platform_get_drvdata(pdev); - - of_mm_gpiochip_remove(&chip->mmchip); + return devm_gpiochip_add_data(dev, gc, chip); } static const struct of_device_id ltq_mm_match[] = { @@ -136,7 +140,6 @@ MODULE_DEVICE_TABLE(of, ltq_mm_match); static struct platform_driver ltq_mm_driver = { .probe = ltq_mm_probe, - .remove = ltq_mm_remove, .driver = { .name = "gpio-mm-ltq", .of_match_table = ltq_mm_match, diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c index 7d6dd36cf1ae..b3a26a06260b 100644 --- a/drivers/gpio/gpio-mmio.c +++ b/drivers/gpio/gpio-mmio.c @@ -41,6 +41,7 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.` */ #include <linux/bitops.h> +#include <linux/cleanup.h> #include <linux/compiler.h> #include <linux/err.h> #include <linux/init.h> @@ -61,69 +62,69 @@ o ` ~~~~\___/~~~~ ` controller in FPGA is ,.` #include "gpiolib.h" -static void bgpio_write8(void __iomem *reg, unsigned long data) +static void gpio_mmio_write8(void __iomem *reg, unsigned long data) { writeb(data, reg); } -static unsigned long bgpio_read8(void __iomem *reg) +static unsigned long gpio_mmio_read8(void __iomem *reg) { return readb(reg); } -static void bgpio_write16(void __iomem *reg, unsigned long data) +static void gpio_mmio_write16(void __iomem *reg, unsigned long data) { writew(data, reg); } -static unsigned long bgpio_read16(void __iomem *reg) +static unsigned long gpio_mmio_read16(void __iomem *reg) { return readw(reg); } -static void bgpio_write32(void __iomem *reg, unsigned long data) +static void gpio_mmio_write32(void __iomem *reg, unsigned long data) { writel(data, reg); } -static unsigned long bgpio_read32(void __iomem *reg) +static unsigned long gpio_mmio_read32(void __iomem *reg) { return readl(reg); } #if BITS_PER_LONG >= 64 -static void bgpio_write64(void __iomem *reg, unsigned long data) +static void gpio_mmio_write64(void __iomem *reg, unsigned long data) { writeq(data, reg); } -static unsigned long bgpio_read64(void __iomem *reg) +static unsigned long gpio_mmio_read64(void __iomem *reg) { return readq(reg); } #endif /* BITS_PER_LONG >= 64 */ -static void bgpio_write16be(void __iomem *reg, unsigned long data) +static void gpio_mmio_write16be(void __iomem *reg, unsigned long data) { iowrite16be(data, reg); } -static unsigned long bgpio_read16be(void __iomem *reg) +static unsigned long gpio_mmio_read16be(void __iomem *reg) { return ioread16be(reg); } -static void bgpio_write32be(void __iomem *reg, unsigned long data) +static void gpio_mmio_write32be(void __iomem *reg, unsigned long data) { iowrite32be(data, reg); } -static unsigned long bgpio_read32be(void __iomem *reg) +static unsigned long gpio_mmio_read32be(void __iomem *reg) { return ioread32be(reg); } -static unsigned long bgpio_line2mask(struct gpio_chip *gc, unsigned int line) +static unsigned long gpio_mmio_line2mask(struct gpio_chip *gc, unsigned int line) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); @@ -132,10 +133,10 @@ static unsigned long bgpio_line2mask(struct gpio_chip *gc, unsigned int line) return BIT(line); } -static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_get_set(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - unsigned long pinmask = bgpio_line2mask(gc, gpio); + unsigned long pinmask = gpio_mmio_line2mask(gc, gpio); bool dir = !!(chip->sdir & pinmask); if (dir) @@ -148,8 +149,8 @@ static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) * This assumes that the bits in the GPIO register are in native endianness. * We only assign the function pointer if we have that. */ -static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask, + unsigned long *bits) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); unsigned long get_mask = 0, set_mask = 0; @@ -168,18 +169,18 @@ static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask, return 0; } -static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_get(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - return !!(chip->read_reg(chip->reg_dat) & bgpio_line2mask(gc, gpio)); + return !!(chip->read_reg(chip->reg_dat) & gpio_mmio_line2mask(gc, gpio)); } /* * This only works if the bits in the GPIO register are in native endianness. */ -static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_get_multiple(struct gpio_chip *gc, unsigned long *mask, + unsigned long *bits) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); @@ -192,8 +193,8 @@ static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask, /* * With big endian mirrored bit order it becomes more tedious. */ -static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, + unsigned long *bits) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); unsigned long readmask = 0; @@ -205,7 +206,7 @@ static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, /* Create a mirrored mask */ for_each_set_bit(bit, mask, gc->ngpio) - readmask |= bgpio_line2mask(gc, bit); + readmask |= gpio_mmio_line2mask(gc, bit); /* Read the register */ val = chip->read_reg(chip->reg_dat) & readmask; @@ -215,23 +216,22 @@ static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, * in bit 0 ... line 31 in bit 31 for a 32bit register. */ for_each_set_bit(bit, &val, gc->ngpio) - *bits |= bgpio_line2mask(gc, bit); + *bits |= gpio_mmio_line2mask(gc, bit); return 0; } -static int bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) +static int gpio_mmio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) { return 0; } -static int bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) +static int gpio_mmio_set(struct gpio_chip *gc, unsigned int gpio, int val) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - unsigned long mask = bgpio_line2mask(gc, gpio); - unsigned long flags; + unsigned long mask = gpio_mmio_line2mask(gc, gpio); - raw_spin_lock_irqsave(&chip->lock, flags); + guard(raw_spinlock)(&chip->lock); if (val) chip->sdata |= mask; @@ -240,16 +240,14 @@ static int bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) chip->write_reg(chip->reg_dat, chip->sdata); - raw_spin_unlock_irqrestore(&chip->lock, flags); - return 0; } -static int bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, + int val) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - unsigned long mask = bgpio_line2mask(gc, gpio); + unsigned long mask = gpio_mmio_line2mask(gc, gpio); if (val) chip->write_reg(chip->reg_set, mask); @@ -259,12 +257,12 @@ static int bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, return 0; } -static int bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) +static int gpio_mmio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - unsigned long mask = bgpio_line2mask(gc, gpio), flags; + unsigned long mask = gpio_mmio_line2mask(gc, gpio); - raw_spin_lock_irqsave(&chip->lock, flags); + guard(raw_spinlock)(&chip->lock); if (val) chip->sdata |= mask; @@ -273,15 +271,14 @@ static int bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) chip->write_reg(chip->reg_set, chip->sdata); - raw_spin_unlock_irqrestore(&chip->lock, flags); - return 0; } -static void bgpio_multiple_get_masks(struct gpio_chip *gc, - unsigned long *mask, unsigned long *bits, - unsigned long *set_mask, - unsigned long *clear_mask) +static void gpio_mmio_multiple_get_masks(struct gpio_chip *gc, + unsigned long *mask, + unsigned long *bits, + unsigned long *set_mask, + unsigned long *clear_mask) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); int i; @@ -291,60 +288,58 @@ static void bgpio_multiple_get_masks(struct gpio_chip *gc, for_each_set_bit(i, mask, chip->bits) { if (test_bit(i, bits)) - *set_mask |= bgpio_line2mask(gc, i); + *set_mask |= gpio_mmio_line2mask(gc, i); else - *clear_mask |= bgpio_line2mask(gc, i); + *clear_mask |= gpio_mmio_line2mask(gc, i); } } -static void bgpio_set_multiple_single_reg(struct gpio_chip *gc, - unsigned long *mask, - unsigned long *bits, - void __iomem *reg) +static void gpio_mmio_set_multiple_single_reg(struct gpio_chip *gc, + unsigned long *mask, + unsigned long *bits, + void __iomem *reg) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - unsigned long flags, set_mask, clear_mask; + unsigned long set_mask, clear_mask; - raw_spin_lock_irqsave(&chip->lock, flags); + guard(raw_spinlock)(&chip->lock); - bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); + gpio_mmio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); chip->sdata |= set_mask; chip->sdata &= ~clear_mask; chip->write_reg(reg, chip->sdata); - - raw_spin_unlock_irqrestore(&chip->lock, flags); } -static int bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_set_multiple(struct gpio_chip *gc, unsigned long *mask, + unsigned long *bits) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - bgpio_set_multiple_single_reg(gc, mask, bits, chip->reg_dat); + gpio_mmio_set_multiple_single_reg(gc, mask, bits, chip->reg_dat); return 0; } -static int bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask, + unsigned long *bits) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - bgpio_set_multiple_single_reg(gc, mask, bits, chip->reg_set); + gpio_mmio_set_multiple_single_reg(gc, mask, bits, chip->reg_set); return 0; } -static int bgpio_set_multiple_with_clear(struct gpio_chip *gc, - unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_set_multiple_with_clear(struct gpio_chip *gc, + unsigned long *mask, + unsigned long *bits) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); unsigned long set_mask, clear_mask; - bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); + gpio_mmio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); if (set_mask) chip->write_reg(chip->reg_set, set_mask); @@ -354,7 +349,8 @@ static int bgpio_set_multiple_with_clear(struct gpio_chip *gc, return 0; } -static int bgpio_dir_return(struct gpio_chip *gc, unsigned int gpio, bool dir_out) +static int gpio_mmio_dir_return(struct gpio_chip *gc, unsigned int gpio, + bool dir_out) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); @@ -367,131 +363,125 @@ static int bgpio_dir_return(struct gpio_chip *gc, unsigned int gpio, bool dir_ou return pinctrl_gpio_direction_input(gc, gpio); } -static int bgpio_dir_in_err(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_dir_in_err(struct gpio_chip *gc, unsigned int gpio) { return -EINVAL; } -static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) { - return bgpio_dir_return(gc, gpio, false); + return gpio_mmio_dir_return(gc, gpio, false); } -static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_dir_out_err(struct gpio_chip *gc, unsigned int gpio, + int val) { return -EINVAL; } -static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio, + int val) { gc->set(gc, gpio, val); - return bgpio_dir_return(gc, gpio, true); + return gpio_mmio_dir_return(gc, gpio, true); } -static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_dir_in(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - unsigned long flags; - raw_spin_lock_irqsave(&chip->lock, flags); + scoped_guard(raw_spinlock, &chip->lock) { + chip->sdir &= ~gpio_mmio_line2mask(gc, gpio); - chip->sdir &= ~bgpio_line2mask(gc, gpio); - - if (chip->reg_dir_in) - chip->write_reg(chip->reg_dir_in, ~chip->sdir); - if (chip->reg_dir_out) - chip->write_reg(chip->reg_dir_out, chip->sdir); - - raw_spin_unlock_irqrestore(&chip->lock, flags); + if (chip->reg_dir_in) + chip->write_reg(chip->reg_dir_in, ~chip->sdir); + if (chip->reg_dir_out) + chip->write_reg(chip->reg_dir_out, chip->sdir); + } - return bgpio_dir_return(gc, gpio, false); + return gpio_mmio_dir_return(gc, gpio, false); } -static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_get_dir(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); /* Return 0 if output, 1 if input */ if (chip->dir_unreadable) { - if (chip->sdir & bgpio_line2mask(gc, gpio)) + if (chip->sdir & gpio_mmio_line2mask(gc, gpio)) return GPIO_LINE_DIRECTION_OUT; return GPIO_LINE_DIRECTION_IN; } if (chip->reg_dir_out) { - if (chip->read_reg(chip->reg_dir_out) & bgpio_line2mask(gc, gpio)) + if (chip->read_reg(chip->reg_dir_out) & gpio_mmio_line2mask(gc, gpio)) return GPIO_LINE_DIRECTION_OUT; return GPIO_LINE_DIRECTION_IN; } if (chip->reg_dir_in) - if (!(chip->read_reg(chip->reg_dir_in) & bgpio_line2mask(gc, gpio))) + if (!(chip->read_reg(chip->reg_dir_in) & gpio_mmio_line2mask(gc, gpio))) return GPIO_LINE_DIRECTION_OUT; return GPIO_LINE_DIRECTION_IN; } -static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) +static void gpio_mmio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); - unsigned long flags; - raw_spin_lock_irqsave(&chip->lock, flags); + guard(raw_spinlock)(&chip->lock); - chip->sdir |= bgpio_line2mask(gc, gpio); + chip->sdir |= gpio_mmio_line2mask(gc, gpio); if (chip->reg_dir_in) chip->write_reg(chip->reg_dir_in, ~chip->sdir); if (chip->reg_dir_out) chip->write_reg(chip->reg_dir_out, chip->sdir); - - raw_spin_unlock_irqrestore(&chip->lock, flags); } -static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio, + int val) { - bgpio_dir_out(gc, gpio, val); + gpio_mmio_dir_out(gc, gpio, val); gc->set(gc, gpio, val); - return bgpio_dir_return(gc, gpio, true); + return gpio_mmio_dir_return(gc, gpio, true); } -static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio, + int val) { gc->set(gc, gpio, val); - bgpio_dir_out(gc, gpio, val); - return bgpio_dir_return(gc, gpio, true); + gpio_mmio_dir_out(gc, gpio, val); + return gpio_mmio_dir_return(gc, gpio, true); } -static int bgpio_setup_accessors(struct device *dev, - struct gpio_generic_chip *chip, - bool byte_be) +static int gpio_mmio_setup_accessors(struct device *dev, + struct gpio_generic_chip *chip, + bool byte_be) { switch (chip->bits) { case 8: - chip->read_reg = bgpio_read8; - chip->write_reg = bgpio_write8; + chip->read_reg = gpio_mmio_read8; + chip->write_reg = gpio_mmio_write8; break; case 16: if (byte_be) { - chip->read_reg = bgpio_read16be; - chip->write_reg = bgpio_write16be; + chip->read_reg = gpio_mmio_read16be; + chip->write_reg = gpio_mmio_write16be; } else { - chip->read_reg = bgpio_read16; - chip->write_reg = bgpio_write16; + chip->read_reg = gpio_mmio_read16; + chip->write_reg = gpio_mmio_write16; } break; case 32: if (byte_be) { - chip->read_reg = bgpio_read32be; - chip->write_reg = bgpio_write32be; + chip->read_reg = gpio_mmio_read32be; + chip->write_reg = gpio_mmio_write32be; } else { - chip->read_reg = bgpio_read32; - chip->write_reg = bgpio_write32; + chip->read_reg = gpio_mmio_read32; + chip->write_reg = gpio_mmio_write32; } break; #if BITS_PER_LONG >= 64 @@ -501,8 +491,8 @@ static int bgpio_setup_accessors(struct device *dev, "64 bit big endian byte order unsupported\n"); return -EINVAL; } else { - chip->read_reg = bgpio_read64; - chip->write_reg = bgpio_write64; + chip->read_reg = gpio_mmio_read64; + chip->write_reg = gpio_mmio_write64; } break; #endif /* BITS_PER_LONG >= 64 */ @@ -536,8 +526,8 @@ static int bgpio_setup_accessors(struct device *dev, * - an input direction register (named "dirin") where a 1 bit indicates * the GPIO is an input. */ -static int bgpio_setup_io(struct gpio_generic_chip *chip, - const struct gpio_generic_chip_config *cfg) +static int gpio_mmio_setup_io(struct gpio_generic_chip *chip, + const struct gpio_generic_chip_config *cfg) { struct gpio_chip *gc = &chip->gc; @@ -548,25 +538,25 @@ static int bgpio_setup_io(struct gpio_generic_chip *chip, if (cfg->set && cfg->clr) { chip->reg_set = cfg->set; chip->reg_clr = cfg->clr; - gc->set = bgpio_set_with_clear; - gc->set_multiple = bgpio_set_multiple_with_clear; + gc->set = gpio_mmio_set_with_clear; + gc->set_multiple = gpio_mmio_set_multiple_with_clear; } else if (cfg->set && !cfg->clr) { chip->reg_set = cfg->set; - gc->set = bgpio_set_set; - gc->set_multiple = bgpio_set_multiple_set; + gc->set = gpio_mmio_set_set; + gc->set_multiple = gpio_mmio_set_multiple_set; } else if (cfg->flags & GPIO_GENERIC_NO_OUTPUT) { - gc->set = bgpio_set_none; + gc->set = gpio_mmio_set_none; gc->set_multiple = NULL; } else { - gc->set = bgpio_set; - gc->set_multiple = bgpio_set_multiple; + gc->set = gpio_mmio_set; + gc->set_multiple = gpio_mmio_set_multiple; } if (!(cfg->flags & GPIO_GENERIC_UNREADABLE_REG_SET) && (cfg->flags & GPIO_GENERIC_READ_OUTPUT_REG_SET)) { - gc->get = bgpio_get_set; + gc->get = gpio_mmio_get_set; if (!chip->be_bits) - gc->get_multiple = bgpio_get_set_multiple; + gc->get_multiple = gpio_mmio_get_set_multiple; /* * We deliberately avoid assigning the ->get_multiple() call * for big endian mirrored registers which are ALSO reflecting @@ -575,18 +565,18 @@ static int bgpio_setup_io(struct gpio_generic_chip *chip, * reading each line individually in that fringe case. */ } else { - gc->get = bgpio_get; + gc->get = gpio_mmio_get; if (chip->be_bits) - gc->get_multiple = bgpio_get_multiple_be; + gc->get_multiple = gpio_mmio_get_multiple_be; else - gc->get_multiple = bgpio_get_multiple; + gc->get_multiple = gpio_mmio_get_multiple; } return 0; } -static int bgpio_setup_direction(struct gpio_generic_chip *chip, - const struct gpio_generic_chip_config *cfg) +static int gpio_mmio_setup_direction(struct gpio_generic_chip *chip, + const struct gpio_generic_chip_config *cfg) { struct gpio_chip *gc = &chip->gc; @@ -594,27 +584,27 @@ static int bgpio_setup_direction(struct gpio_generic_chip *chip, chip->reg_dir_out = cfg->dirout; chip->reg_dir_in = cfg->dirin; if (cfg->flags & GPIO_GENERIC_NO_SET_ON_INPUT) - gc->direction_output = bgpio_dir_out_dir_first; + gc->direction_output = gpio_mmio_dir_out_dir_first; else - gc->direction_output = bgpio_dir_out_val_first; - gc->direction_input = bgpio_dir_in; - gc->get_direction = bgpio_get_dir; + gc->direction_output = gpio_mmio_dir_out_val_first; + gc->direction_input = gpio_mmio_dir_in; + gc->get_direction = gpio_mmio_get_dir; } else { if (cfg->flags & GPIO_GENERIC_NO_OUTPUT) - gc->direction_output = bgpio_dir_out_err; + gc->direction_output = gpio_mmio_dir_out_err; else - gc->direction_output = bgpio_simple_dir_out; + gc->direction_output = gpio_mmio_simple_dir_out; if (cfg->flags & GPIO_GENERIC_NO_INPUT) - gc->direction_input = bgpio_dir_in_err; + gc->direction_input = gpio_mmio_dir_in_err; else - gc->direction_input = bgpio_simple_dir_in; + gc->direction_input = gpio_mmio_simple_dir_in; } return 0; } -static int bgpio_request(struct gpio_chip *gc, unsigned int gpio_pin) +static int gpio_mmio_request(struct gpio_chip *gc, unsigned int gpio_pin) { struct gpio_generic_chip *chip = to_gpio_generic_chip(gc); @@ -653,23 +643,23 @@ int gpio_generic_chip_init(struct gpio_generic_chip *chip, gc->parent = dev; gc->label = dev_name(dev); gc->base = -1; - gc->request = bgpio_request; + gc->request = gpio_mmio_request; chip->be_bits = !!(flags & GPIO_GENERIC_BIG_ENDIAN); ret = gpiochip_get_ngpios(gc, dev); if (ret) gc->ngpio = chip->bits; - ret = bgpio_setup_io(chip, cfg); + ret = gpio_mmio_setup_io(chip, cfg); if (ret) return ret; - ret = bgpio_setup_accessors(dev, chip, + ret = gpio_mmio_setup_accessors(dev, chip, flags & GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER); if (ret) return ret; - ret = bgpio_setup_direction(chip, cfg); + ret = gpio_mmio_setup_direction(chip, cfg); if (ret) return ret; @@ -680,7 +670,7 @@ int gpio_generic_chip_init(struct gpio_generic_chip *chip, } chip->sdata = chip->read_reg(chip->reg_dat); - if (gc->set == bgpio_set_set && + if (gc->set == gpio_mmio_set_set && !(flags & GPIO_GENERIC_UNREADABLE_REG_SET)) chip->sdata = chip->read_reg(chip->reg_set); @@ -712,9 +702,8 @@ EXPORT_SYMBOL_GPL(gpio_generic_chip_init); #if IS_ENABLED(CONFIG_GPIO_GENERIC_PLATFORM) -static void __iomem *bgpio_map(struct platform_device *pdev, - const char *name, - resource_size_t sane_sz) +static void __iomem *gpio_mmio_map(struct platform_device *pdev, + const char *name, resource_size_t sane_sz) { struct resource *r; resource_size_t sz; @@ -730,16 +719,16 @@ static void __iomem *bgpio_map(struct platform_device *pdev, return devm_ioremap_resource(&pdev->dev, r); } -static const struct of_device_id bgpio_of_match[] = { +static const struct of_device_id gpio_mmio_of_match[] = { { .compatible = "brcm,bcm6345-gpio" }, { .compatible = "wd,mbl-gpio" }, { .compatible = "ni,169445-nand-gpio" }, { .compatible = "intel,ixp4xx-expansion-bus-mmio-gpio" }, { } }; -MODULE_DEVICE_TABLE(of, bgpio_of_match); +MODULE_DEVICE_TABLE(of, gpio_mmio_of_match); -static int bgpio_pdev_probe(struct platform_device *pdev) +static int gpio_mmio_pdev_probe(struct platform_device *pdev) { struct gpio_generic_chip_config config; struct gpio_generic_chip *gen_gc; @@ -762,23 +751,23 @@ static int bgpio_pdev_probe(struct platform_device *pdev) sz = resource_size(r); - dat = bgpio_map(pdev, "dat", sz); + dat = gpio_mmio_map(pdev, "dat", sz); if (IS_ERR(dat)) return PTR_ERR(dat); - set = bgpio_map(pdev, "set", sz); + set = gpio_mmio_map(pdev, "set", sz); if (IS_ERR(set)) return PTR_ERR(set); - clr = bgpio_map(pdev, "clr", sz); + clr = gpio_mmio_map(pdev, "clr", sz); if (IS_ERR(clr)) return PTR_ERR(clr); - dirout = bgpio_map(pdev, "dirout", sz); + dirout = gpio_mmio_map(pdev, "dirout", sz); if (IS_ERR(dirout)) return PTR_ERR(dirout); - dirin = bgpio_map(pdev, "dirin", sz); + dirin = gpio_mmio_map(pdev, "dirin", sz); if (IS_ERR(dirin)) return PTR_ERR(dirin); @@ -824,25 +813,25 @@ static int bgpio_pdev_probe(struct platform_device *pdev) return devm_gpiochip_add_data(&pdev->dev, &gen_gc->gc, NULL); } -static const struct platform_device_id bgpio_id_table[] = { +static const struct platform_device_id gpio_mmio_id_table[] = { { .name = "basic-mmio-gpio", .driver_data = 0, }, { } }; -MODULE_DEVICE_TABLE(platform, bgpio_id_table); +MODULE_DEVICE_TABLE(platform, gpio_mmio_id_table); -static struct platform_driver bgpio_driver = { +static struct platform_driver gpio_mmio_driver = { .driver = { .name = "basic-mmio-gpio", - .of_match_table = bgpio_of_match, + .of_match_table = gpio_mmio_of_match, }, - .id_table = bgpio_id_table, - .probe = bgpio_pdev_probe, + .id_table = gpio_mmio_id_table, + .probe = gpio_mmio_pdev_probe, }; -module_platform_driver(bgpio_driver); +module_platform_driver(gpio_mmio_driver); #endif /* CONFIG_GPIO_GENERIC_PLATFORM */ diff --git a/drivers/gpio/gpio-mpsse.c b/drivers/gpio/gpio-mpsse.c index 9f42bb30b4ec..ace652ba4df1 100644 --- a/drivers/gpio/gpio-mpsse.c +++ b/drivers/gpio/gpio-mpsse.c @@ -10,6 +10,7 @@ #include <linux/cleanup.h> #include <linux/gpio/driver.h> #include <linux/mutex.h> +#include <linux/spinlock.h> #include <linux/usb.h> struct mpsse_priv { @@ -17,8 +18,10 @@ struct mpsse_priv { struct usb_device *udev; /* USB device encompassing all MPSSEs */ struct usb_interface *intf; /* USB interface for this MPSSE */ u8 intf_id; /* USB interface number for this MPSSE */ - struct work_struct irq_work; /* polling work thread */ + struct list_head workers; /* polling work threads */ struct mutex irq_mutex; /* lock over irq_data */ + struct mutex irq_race; /* race for polling worker teardown */ + raw_spinlock_t irq_spin; /* protects worker list */ atomic_t irq_type[16]; /* pin -> edge detection type */ atomic_t irq_enabled; int id; @@ -26,6 +29,9 @@ struct mpsse_priv { u8 gpio_outputs[2]; /* Output states for GPIOs [L, H] */ u8 gpio_dir[2]; /* Directions for GPIOs [L, H] */ + unsigned long dir_in; /* Bitmask of valid input pins */ + unsigned long dir_out; /* Bitmask of valid output pins */ + u8 *bulk_in_buf; /* Extra recv buffer to grab status bytes */ struct usb_endpoint_descriptor *bulk_in; @@ -34,6 +40,14 @@ struct mpsse_priv { struct mutex io_mutex; /* sync I/O with disconnect */ }; +struct mpsse_worker { + struct mpsse_priv *priv; + struct work_struct work; + atomic_t cancelled; + struct list_head list; /* linked list */ + struct list_head destroy; /* teardown linked list */ +}; + struct bulk_desc { bool tx; /* direction of bulk transfer */ u8 *data; /* input (tx) or output (rx) */ @@ -43,8 +57,27 @@ struct bulk_desc { int timeout; }; +#define MPSSE_NGPIO 16 + +struct mpsse_quirk { + const char *names[MPSSE_NGPIO]; /* Pin names, if applicable */ + unsigned long dir_in; /* Bitmask of valid input pins */ + unsigned long dir_out; /* Bitmask of valid output pins */ +}; + +static struct mpsse_quirk bryx_brik_quirk = { + .names = { + [3] = "Push to Talk", + [5] = "Channel Activity", + }, + .dir_out = BIT(3), /* Push to Talk */ + .dir_in = BIT(5), /* Channel Activity */ +}; + static const struct usb_device_id gpio_mpsse_table[] = { { USB_DEVICE(0x0c52, 0xa064) }, /* SeaLevel Systems, Inc. */ + { USB_DEVICE(0x0403, 0x6988), /* FTDI, assigned to Bryx */ + .driver_info = (kernel_ulong_t)&bryx_brik_quirk}, { } /* Terminating entry */ }; @@ -160,6 +193,32 @@ static int gpio_mpsse_get_bank(struct mpsse_priv *priv, u8 bank) return buf; } +static int mpsse_ensure_supported(struct gpio_chip *chip, + unsigned long mask, int direction) +{ + unsigned long supported, unsupported; + char *type = "input"; + struct mpsse_priv *priv = gpiochip_get_data(chip); + + supported = priv->dir_in; + if (direction == GPIO_LINE_DIRECTION_OUT) { + supported = priv->dir_out; + type = "output"; + } + + /* An invalid bit was in the provided mask */ + unsupported = mask & ~supported; + if (unsupported) { + dev_err(&priv->udev->dev, + "mpsse: GPIO %lu doesn't support %s\n", + find_first_bit(&unsupported, sizeof(unsupported) * 8), + type); + return -EOPNOTSUPP; + } + + return 0; +} + static int gpio_mpsse_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { @@ -167,6 +226,10 @@ static int gpio_mpsse_set_multiple(struct gpio_chip *chip, unsigned long *mask, int ret; struct mpsse_priv *priv = gpiochip_get_data(chip); + ret = mpsse_ensure_supported(chip, *mask, GPIO_LINE_DIRECTION_OUT); + if (ret) + return ret; + guard(mutex)(&priv->io_mutex); for_each_set_clump8(i, bank_mask, mask, chip->ngpio) { bank = i / 8; @@ -194,6 +257,10 @@ static int gpio_mpsse_get_multiple(struct gpio_chip *chip, unsigned long *mask, int ret; struct mpsse_priv *priv = gpiochip_get_data(chip); + ret = mpsse_ensure_supported(chip, *mask, GPIO_LINE_DIRECTION_IN); + if (ret) + return ret; + guard(mutex)(&priv->io_mutex); for_each_set_clump8(i, bank_mask, mask, chip->ngpio) { bank = i / 8; @@ -242,10 +309,15 @@ static int gpio_mpsse_gpio_set(struct gpio_chip *chip, unsigned int offset, static int gpio_mpsse_direction_output(struct gpio_chip *chip, unsigned int offset, int value) { + int ret; struct mpsse_priv *priv = gpiochip_get_data(chip); int bank = (offset & 8) >> 3; int bank_offset = offset & 7; + ret = mpsse_ensure_supported(chip, BIT(offset), GPIO_LINE_DIRECTION_OUT); + if (ret) + return ret; + scoped_guard(mutex, &priv->io_mutex) priv->gpio_dir[bank] |= BIT(bank_offset); @@ -255,15 +327,19 @@ static int gpio_mpsse_direction_output(struct gpio_chip *chip, static int gpio_mpsse_direction_input(struct gpio_chip *chip, unsigned int offset) { + int ret; struct mpsse_priv *priv = gpiochip_get_data(chip); int bank = (offset & 8) >> 3; int bank_offset = offset & 7; + ret = mpsse_ensure_supported(chip, BIT(offset), GPIO_LINE_DIRECTION_IN); + if (ret) + return ret; + guard(mutex)(&priv->io_mutex); priv->gpio_dir[bank] &= ~BIT(bank_offset); - gpio_mpsse_set_bank(priv, bank); - return 0; + return gpio_mpsse_set_bank(priv, bank); } static int gpio_mpsse_get_direction(struct gpio_chip *chip, @@ -284,18 +360,62 @@ static int gpio_mpsse_get_direction(struct gpio_chip *chip, return ret; } -static void gpio_mpsse_poll(struct work_struct *work) +/* + * Stops all workers except `my_worker`. + * Safe to call only when `irq_race` is held. + */ +static void gpio_mpsse_stop_all_except(struct mpsse_priv *priv, + struct mpsse_worker *my_worker) +{ + struct mpsse_worker *worker, *worker_tmp; + struct list_head destructors = LIST_HEAD_INIT(destructors); + + scoped_guard(raw_spinlock_irqsave, &priv->irq_spin) { + list_for_each_entry_safe(worker, worker_tmp, + &priv->workers, list) { + /* Don't stop ourselves */ + if (worker == my_worker) + continue; + + list_del(&worker->list); + + /* Give worker a chance to terminate itself */ + atomic_set(&worker->cancelled, 1); + /* Keep track of stuff to cancel */ + INIT_LIST_HEAD(&worker->destroy); + list_add(&worker->destroy, &destructors); + } + } + + list_for_each_entry_safe(worker, worker_tmp, + &destructors, destroy) { + list_del(&worker->destroy); + cancel_work_sync(&worker->work); + kfree(worker); + } +} + +static void gpio_mpsse_poll(struct work_struct *my_work) { unsigned long pin_mask, pin_states, flags; int irq_enabled, offset, err, value, fire_irq, irq, old_value[16], irq_type[16]; - struct mpsse_priv *priv = container_of(work, struct mpsse_priv, - irq_work); + struct mpsse_worker *my_worker = container_of(my_work, struct mpsse_worker, work); + struct mpsse_priv *priv = my_worker->priv; for (offset = 0; offset < priv->gpio.ngpio; ++offset) old_value[offset] = -1; - while ((irq_enabled = atomic_read(&priv->irq_enabled))) { + /* + * We only want one worker. Workers race to acquire irq_race and tear + * down all other workers. This is a cond guard so that we don't deadlock + * trying to cancel a worker. + */ + scoped_cond_guard(mutex_try, return, &priv->irq_race) + gpio_mpsse_stop_all_except(priv, my_worker); + + while ((irq_enabled = atomic_read(&priv->irq_enabled)) && + !atomic_read(&my_worker->cancelled)) { usleep_range(MPSSE_POLL_INTERVAL, MPSSE_POLL_INTERVAL + 1000); /* Cleanup will trigger at the end of the loop */ guard(mutex)(&priv->irq_mutex); @@ -370,21 +490,45 @@ static int gpio_mpsse_set_irq_type(struct irq_data *irqd, unsigned int type) static void gpio_mpsse_irq_disable(struct irq_data *irqd) { + struct mpsse_worker *worker; struct mpsse_priv *priv = irq_data_get_irq_chip_data(irqd); atomic_and(~BIT(irqd->hwirq), &priv->irq_enabled); gpiochip_disable_irq(&priv->gpio, irqd->hwirq); + + /* + * Can't actually do teardown in IRQ context (it blocks). + * As a result, these workers will stick around until irq is reenabled + * or device gets disconnected + */ + scoped_guard(raw_spinlock_irqsave, &priv->irq_spin) + list_for_each_entry(worker, &priv->workers, list) + atomic_set(&worker->cancelled, 1); } static void gpio_mpsse_irq_enable(struct irq_data *irqd) { + struct mpsse_worker *worker; struct mpsse_priv *priv = irq_data_get_irq_chip_data(irqd); gpiochip_enable_irq(&priv->gpio, irqd->hwirq); /* If no-one else was using the IRQ, enable it */ if (!atomic_fetch_or(BIT(irqd->hwirq), &priv->irq_enabled)) { - INIT_WORK(&priv->irq_work, gpio_mpsse_poll); - schedule_work(&priv->irq_work); + /* + * Can't be devm because it uses a non-raw spinlock (illegal in + * this context, where a raw spinlock is held by our caller) + */ + worker = kzalloc(sizeof(*worker), GFP_NOWAIT); + if (!worker) + return; + + worker->priv = priv; + INIT_LIST_HEAD(&worker->list); + INIT_WORK(&worker->work, gpio_mpsse_poll); + schedule_work(&worker->work); + + scoped_guard(raw_spinlock_irqsave, &priv->irq_spin) + list_add(&worker->list, &priv->workers); } } @@ -404,18 +548,49 @@ static void gpio_mpsse_ida_remove(void *data) ida_free(&gpio_mpsse_ida, priv->id); } +static int mpsse_init_valid_mask(struct gpio_chip *chip, + unsigned long *valid_mask, + unsigned int ngpios) +{ + struct mpsse_priv *priv = gpiochip_get_data(chip); + + if (WARN_ON(priv == NULL)) + return -ENODEV; + + *valid_mask = priv->dir_in | priv->dir_out; + + return 0; +} + +static void mpsse_irq_init_valid_mask(struct gpio_chip *chip, + unsigned long *valid_mask, + unsigned int ngpios) +{ + struct mpsse_priv *priv = gpiochip_get_data(chip); + + if (WARN_ON(priv == NULL)) + return; + + /* Can only use IRQ on input capable pins */ + *valid_mask = priv->dir_in; +} + static int gpio_mpsse_probe(struct usb_interface *interface, const struct usb_device_id *id) { struct mpsse_priv *priv; struct device *dev; + char *serial; int err; + struct mpsse_quirk *quirk = (void *)id->driver_info; dev = &interface->dev; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; + INIT_LIST_HEAD(&priv->workers); + priv->udev = usb_get_dev(interface_to_usbdev(interface)); priv->intf = interface; priv->intf_id = interface->cur_altsetting->desc.bInterfaceNumber; @@ -436,9 +611,21 @@ static int gpio_mpsse_probe(struct usb_interface *interface, if (err) return err; + err = devm_mutex_init(dev, &priv->irq_race); + if (err) + return err; + + raw_spin_lock_init(&priv->irq_spin); + + serial = priv->udev->serial; + if (!serial) + serial = "NONE"; + priv->gpio.label = devm_kasprintf(dev, GFP_KERNEL, - "gpio-mpsse.%d.%d", - priv->id, priv->intf_id); + "MPSSE%04x:%04x.%d.%d.%s", + id->idVendor, id->idProduct, + priv->intf_id, priv->id, + serial); if (!priv->gpio.label) return -ENOMEM; @@ -452,10 +639,20 @@ static int gpio_mpsse_probe(struct usb_interface *interface, priv->gpio.get_multiple = gpio_mpsse_get_multiple; priv->gpio.set_multiple = gpio_mpsse_set_multiple; priv->gpio.base = -1; - priv->gpio.ngpio = 16; + priv->gpio.ngpio = MPSSE_NGPIO; priv->gpio.offset = priv->intf_id * priv->gpio.ngpio; priv->gpio.can_sleep = 1; + if (quirk) { + priv->dir_out = quirk->dir_out; + priv->dir_in = quirk->dir_in; + priv->gpio.names = quirk->names; + priv->gpio.init_valid_mask = mpsse_init_valid_mask; + } else { + priv->dir_in = U16_MAX; + priv->dir_out = U16_MAX; + } + err = usb_find_common_endpoints(interface->cur_altsetting, &priv->bulk_in, &priv->bulk_out, NULL, NULL); @@ -494,6 +691,7 @@ static int gpio_mpsse_probe(struct usb_interface *interface, priv->gpio.irq.parents = NULL; priv->gpio.irq.default_type = IRQ_TYPE_NONE; priv->gpio.irq.handler = handle_simple_irq; + priv->gpio.irq.init_valid_mask = mpsse_irq_init_valid_mask; err = devm_gpiochip_add_data(dev, &priv->gpio, priv); if (err) @@ -506,6 +704,13 @@ static void gpio_mpsse_disconnect(struct usb_interface *intf) { struct mpsse_priv *priv = usb_get_intfdata(intf); + /* + * Lock prevents double-free of worker from here and the teardown + * step at the beginning of gpio_mpsse_poll + */ + scoped_guard(mutex, &priv->irq_race) + gpio_mpsse_stop_all_except(priv, NULL); + priv->intf = NULL; usb_set_intfdata(intf, NULL); usb_put_dev(priv->udev); diff --git a/drivers/gpio/gpio-msc313.c b/drivers/gpio/gpio-msc313.c index b0cccd856840..7345afdc78de 100644 --- a/drivers/gpio/gpio-msc313.c +++ b/drivers/gpio/gpio-msc313.c @@ -694,7 +694,7 @@ static const struct of_device_id msc313_gpio_of_match[] = { * SoC goes into suspend to memory mode so we need to save some * of the register bits before suspending and put it back when resuming */ -static int __maybe_unused msc313_gpio_suspend(struct device *dev) +static int msc313_gpio_suspend(struct device *dev) { struct msc313_gpio *gpio = dev_get_drvdata(dev); int i; @@ -705,7 +705,7 @@ static int __maybe_unused msc313_gpio_suspend(struct device *dev) return 0; } -static int __maybe_unused msc313_gpio_resume(struct device *dev) +static int msc313_gpio_resume(struct device *dev) { struct msc313_gpio *gpio = dev_get_drvdata(dev); int i; @@ -716,13 +716,13 @@ static int __maybe_unused msc313_gpio_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(msc313_gpio_ops, msc313_gpio_suspend, msc313_gpio_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(msc313_gpio_ops, msc313_gpio_suspend, msc313_gpio_resume); static struct platform_driver msc313_gpio_driver = { .driver = { .name = DRIVER_NAME, .of_match_table = msc313_gpio_of_match, - .pm = &msc313_gpio_ops, + .pm = pm_sleep_ptr(&msc313_gpio_ops), }, .probe = msc313_gpio_probe, }; diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index ac799fced950..22c36b79e249 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -573,11 +573,10 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc) for (i = 0; i < mvchip->chip.ngpio; i++) { int irq; - irq = irq_find_mapping(mvchip->domain, i); - if (!(cause & BIT(i))) continue; + irq = irq_find_mapping(mvchip->domain, i); type = irq_get_trigger_type(irq); if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { /* Swap polarity (race with GPIO line) */ diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index a268c76bdca6..e136e81794df 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -1503,7 +1503,7 @@ static void omap_gpio_remove(struct platform_device *pdev) clk_unprepare(bank->dbck); } -static int __maybe_unused omap_gpio_runtime_suspend(struct device *dev) +static int omap_gpio_runtime_suspend(struct device *dev) { struct gpio_bank *bank = dev_get_drvdata(dev); unsigned long flags; @@ -1516,7 +1516,7 @@ static int __maybe_unused omap_gpio_runtime_suspend(struct device *dev) return 0; } -static int __maybe_unused omap_gpio_runtime_resume(struct device *dev) +static int omap_gpio_runtime_resume(struct device *dev) { struct gpio_bank *bank = dev_get_drvdata(dev); unsigned long flags; @@ -1529,7 +1529,7 @@ static int __maybe_unused omap_gpio_runtime_resume(struct device *dev) return 0; } -static int __maybe_unused omap_gpio_suspend(struct device *dev) +static int omap_gpio_suspend(struct device *dev) { struct gpio_bank *bank = dev_get_drvdata(dev); @@ -1541,7 +1541,7 @@ static int __maybe_unused omap_gpio_suspend(struct device *dev) return omap_gpio_runtime_suspend(dev); } -static int __maybe_unused omap_gpio_resume(struct device *dev) +static int omap_gpio_resume(struct device *dev) { struct gpio_bank *bank = dev_get_drvdata(dev); @@ -1554,9 +1554,8 @@ static int __maybe_unused omap_gpio_resume(struct device *dev) } static const struct dev_pm_ops gpio_pm_ops = { - SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume, - NULL) - SET_LATE_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume) + RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume, NULL) + LATE_SYSTEM_SLEEP_PM_OPS(omap_gpio_suspend, omap_gpio_resume) }; static struct platform_driver omap_gpio_driver = { @@ -1564,7 +1563,7 @@ static struct platform_driver omap_gpio_driver = { .remove = omap_gpio_remove, .driver = { .name = "omap_gpio", - .pm = &gpio_pm_ops, + .pm = pm_ptr(&gpio_pm_ops), .of_match_table = omap_gpio_match, }, }; diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index b46927f55038..0a3916cc2772 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -306,7 +306,7 @@ static inline u8 pca953x_get_bit_mask(struct pca953x_chip *chip, unsigned int of * Interrupt mask register 0x40 + 5 * bank_size RW * Interrupt status register 0x40 + 6 * bank_size R * - * - Registers with bit 0x80 set, the AI bit + * - Registers with bit 0x80 set, the AI bit (auto increment) * The bit is cleared and the registers fall into one of the * categories above. */ @@ -854,10 +854,13 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) int level; if (chip->driver_data & PCA_PCAL) { + DECLARE_BITMAP(latched_inputs, MAX_LINE); guard(mutex)(&chip->i2c_lock); - /* Enable latch on interrupt-enabled inputs */ - pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); + /* Enable latch on edge-triggered interrupt-enabled inputs */ + bitmap_or(latched_inputs, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); + bitmap_and(latched_inputs, latched_inputs, chip->irq_mask, gc->ngpio); + pca953x_write_regs(chip, PCAL953X_IN_LATCH, latched_inputs); bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio); @@ -1203,10 +1206,10 @@ static int pca953x_probe(struct i2c_client *client) pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) { - dev_info(dev, "using AI\n"); + dev_info(dev, "using auto increment\n"); regmap_config = &pca953x_ai_i2c_regmap; } else { - dev_info(dev, "using no AI\n"); + dev_info(dev, "using no auto increment\n"); regmap_config = &pca953x_i2c_regmap; } diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index 9925687e05fb..4ffa0955a9e3 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -171,7 +171,7 @@ static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned int nr) /* * Save register configuration and disable interrupts. */ -static void __maybe_unused pch_gpio_save_reg_conf(struct pch_gpio *chip) +static void pch_gpio_save_reg_conf(struct pch_gpio *chip) { chip->pch_gpio_reg.ien_reg = ioread32(&chip->reg->ien); chip->pch_gpio_reg.imask_reg = ioread32(&chip->reg->imask); @@ -187,7 +187,7 @@ static void __maybe_unused pch_gpio_save_reg_conf(struct pch_gpio *chip) /* * This function restores the register configuration of the GPIO device. */ -static void __maybe_unused pch_gpio_restore_reg_conf(struct pch_gpio *chip) +static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) { iowrite32(chip->pch_gpio_reg.ien_reg, &chip->reg->ien); iowrite32(chip->pch_gpio_reg.imask_reg, &chip->reg->imask); @@ -402,7 +402,7 @@ static int pch_gpio_probe(struct pci_dev *pdev, return pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]); } -static int __maybe_unused pch_gpio_suspend(struct device *dev) +static int pch_gpio_suspend(struct device *dev) { struct pch_gpio *chip = dev_get_drvdata(dev); unsigned long flags; @@ -414,7 +414,7 @@ static int __maybe_unused pch_gpio_suspend(struct device *dev) return 0; } -static int __maybe_unused pch_gpio_resume(struct device *dev) +static int pch_gpio_resume(struct device *dev) { struct pch_gpio *chip = dev_get_drvdata(dev); unsigned long flags; @@ -428,7 +428,7 @@ static int __maybe_unused pch_gpio_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(pch_gpio_pm_ops, pch_gpio_suspend, pch_gpio_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(pch_gpio_pm_ops, pch_gpio_suspend, pch_gpio_resume); static const struct pci_device_id pch_gpio_pcidev_id[] = { { PCI_DEVICE_DATA(INTEL, EG20T_PCH, INTEL_EG20T_PCH) }, @@ -444,7 +444,7 @@ static struct pci_driver pch_gpio_driver = { .id_table = pch_gpio_pcidev_id, .probe = pch_gpio_probe, .driver = { - .pm = &pch_gpio_pm_ops, + .pm = pm_sleep_ptr(&pch_gpio_pm_ops), }, }; diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 02e4ffcf5a6f..919cf86fd590 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -37,7 +37,6 @@ #define PL061_GPIO_NR 8 -#ifdef CONFIG_PM struct pl061_context_save_regs { u8 gpio_data; u8 gpio_dir; @@ -46,7 +45,6 @@ struct pl061_context_save_regs { u8 gpio_iev; u8 gpio_ie; }; -#endif struct pl061 { raw_spinlock_t lock; @@ -55,9 +53,7 @@ struct pl061 { struct gpio_chip gc; int parent_irq; -#ifdef CONFIG_PM struct pl061_context_save_regs csave_regs; -#endif }; static int pl061_get_direction(struct gpio_chip *gc, unsigned offset) @@ -367,7 +363,6 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) return 0; } -#ifdef CONFIG_PM static int pl061_suspend(struct device *dev) { struct pl061 *pl061 = dev_get_drvdata(dev); @@ -411,13 +406,7 @@ static int pl061_resume(struct device *dev) return 0; } -static const struct dev_pm_ops pl061_dev_pm_ops = { - .suspend = pl061_suspend, - .resume = pl061_resume, - .freeze = pl061_suspend, - .restore = pl061_resume, -}; -#endif +static DEFINE_SIMPLE_DEV_PM_OPS(pl061_dev_pm_ops, pl061_suspend, pl061_resume); static const struct amba_id pl061_ids[] = { { @@ -431,9 +420,7 @@ MODULE_DEVICE_TABLE(amba, pl061_ids); static struct amba_driver pl061_gpio_driver = { .drv = { .name = "pl061_gpio", -#ifdef CONFIG_PM - .pm = &pl061_dev_pm_ops, -#endif + .pm = pm_sleep_ptr(&pl061_dev_pm_ops), }, .id_table = pl061_ids, .probe = pl061_probe, diff --git a/drivers/gpio/gpio-qixis-fpga.c b/drivers/gpio/gpio-qixis-fpga.c new file mode 100644 index 000000000000..6e67f43ac0bd --- /dev/null +++ b/drivers/gpio/gpio-qixis-fpga.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Layerscape GPIO QIXIS FPGA driver + * + * Copyright 2025 NXP + */ + +#include <linux/device.h> +#include <linux/gpio/driver.h> +#include <linux/gpio/regmap.h> +#include <linux/kernel.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +struct qixis_cpld_gpio_config { + u64 output_lines; +}; + +static const struct qixis_cpld_gpio_config lx2160ardb_sfp_cfg = { + .output_lines = BIT(0), +}; + +static const struct qixis_cpld_gpio_config ls1046aqds_stat_pres2_cfg = { + .output_lines = 0x0, +}; + +static const struct regmap_config regmap_config_8r_8v = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int qixis_cpld_gpio_probe(struct platform_device *pdev) +{ + DECLARE_BITMAP(fixed_direction_output, 8); + const struct qixis_cpld_gpio_config *cfg; + struct gpio_regmap_config config = {0}; + struct regmap *regmap; + void __iomem *reg; + u32 base; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + cfg = device_get_match_data(&pdev->dev); + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return ret; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) { + /* In case there is no regmap configured by the parent device, + * create our own from the MMIO space. + */ + reg = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(reg)) + return PTR_ERR(reg); + + regmap = devm_regmap_init_mmio(&pdev->dev, reg, ®map_config_8r_8v); + if (!regmap) + return -ENODEV; + + /* In this case, the offset of our register is 0 inside the + * regmap area that we just created. + */ + base = 0; + } + config.reg_dat_base = GPIO_REGMAP_ADDR(base); + config.reg_set_base = GPIO_REGMAP_ADDR(base); + + config.drvdata = (void *)cfg; + config.regmap = regmap; + config.parent = &pdev->dev; + config.ngpio_per_reg = 8; + config.ngpio = 8; + + bitmap_from_u64(fixed_direction_output, cfg->output_lines); + config.fixed_direction_output = fixed_direction_output; + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config)); +} + +static const struct of_device_id qixis_cpld_gpio_of_match[] = { + { + .compatible = "fsl,lx2160ardb-fpga-gpio-sfp", + .data = &lx2160ardb_sfp_cfg, + }, + { + .compatible = "fsl,ls1046aqds-fpga-gpio-stat-pres2", + .data = &ls1046aqds_stat_pres2_cfg, + }, + + {} +}; +MODULE_DEVICE_TABLE(of, qixis_cpld_gpio_of_match); + +static struct platform_driver qixis_cpld_gpio_driver = { + .probe = qixis_cpld_gpio_probe, + .driver = { + .name = "gpio-qixis-cpld", + .of_match_table = qixis_cpld_gpio_of_match, + }, +}; +module_platform_driver(qixis_cpld_gpio_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Ioana Ciornei <ioana.ciornei@nxp.com>"); +MODULE_DESCRIPTION("Layerscape GPIO QIXIS FPGA driver"); diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c index f4267af00027..e5ba38e65c10 100644 --- a/drivers/gpio/gpio-regmap.c +++ b/drivers/gpio/gpio-regmap.c @@ -82,7 +82,11 @@ static int gpio_regmap_get(struct gpio_chip *chip, unsigned int offset) if (ret) return ret; - ret = regmap_read(gpio->regmap, reg, &val); + /* ensure we don't spoil any register cache with pin input values */ + if (gpio->reg_dat_base == gpio->reg_set_base) + ret = regmap_read_bypassed(gpio->regmap, reg, &val); + else + ret = regmap_read(gpio->regmap, reg, &val); if (ret) return ret; @@ -94,7 +98,7 @@ static int gpio_regmap_set(struct gpio_chip *chip, unsigned int offset, { struct gpio_regmap *gpio = gpiochip_get_data(chip); unsigned int base = gpio_regmap_addr(gpio->reg_set_base); - unsigned int reg, mask; + unsigned int reg, mask, mask_val; int ret; ret = gpio->reg_mask_xlate(gpio, base, offset, ®, &mask); @@ -102,9 +106,15 @@ static int gpio_regmap_set(struct gpio_chip *chip, unsigned int offset, return ret; if (val) - ret = regmap_update_bits(gpio->regmap, reg, mask, mask); + mask_val = mask; + else + mask_val = 0; + + /* ignore input values which shadow the old output value */ + if (gpio->reg_dat_base == gpio->reg_set_base) + ret = regmap_write_bits(gpio->regmap, reg, mask, mask_val); else - ret = regmap_update_bits(gpio->regmap, reg, mask, 0); + ret = regmap_update_bits(gpio->regmap, reg, mask, mask_val); return ret; } diff --git a/drivers/gpio/gpio-shared-proxy.c b/drivers/gpio/gpio-shared-proxy.c index 3ef2c40ed152..29d7d2e4dfc0 100644 --- a/drivers/gpio/gpio-shared-proxy.c +++ b/drivers/gpio/gpio-shared-proxy.c @@ -322,6 +322,7 @@ MODULE_DEVICE_TABLE(auxiliary, gpio_shared_proxy_id_table); static struct auxiliary_driver gpio_shared_proxy_driver = { .driver = { .name = "gpio-shared-proxy", + .suppress_bind_attrs = true, }, .probe = gpio_shared_proxy_probe, .id_table = gpio_shared_proxy_id_table, diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index 4d3db6e06eeb..b1498b59a921 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2016-2022 NVIDIA Corporation + * Copyright (c) 2016-2025 NVIDIA Corporation * * Author: Thierry Reding <treding@nvidia.com> * Dipen Patel <dpatel@nvidia.com> @@ -69,6 +69,30 @@ #define TEGRA186_GPIO_INTERRUPT_STATUS(x) (0x100 + (x) * 4) +/* Tegra410 GPIOs implemented by the COMPUTE GPIO controller */ +#define TEGRA410_COMPUTE_GPIO_PORT_A 0 +#define TEGRA410_COMPUTE_GPIO_PORT_B 1 +#define TEGRA410_COMPUTE_GPIO_PORT_C 2 +#define TEGRA410_COMPUTE_GPIO_PORT_D 3 +#define TEGRA410_COMPUTE_GPIO_PORT_E 4 + +/* Tegra410 GPIOs implemented by the SYSTEM GPIO controller */ +#define TEGRA410_SYSTEM_GPIO_PORT_A 0 +#define TEGRA410_SYSTEM_GPIO_PORT_B 1 +#define TEGRA410_SYSTEM_GPIO_PORT_C 2 +#define TEGRA410_SYSTEM_GPIO_PORT_D 3 +#define TEGRA410_SYSTEM_GPIO_PORT_E 4 +#define TEGRA410_SYSTEM_GPIO_PORT_I 5 +#define TEGRA410_SYSTEM_GPIO_PORT_J 6 +#define TEGRA410_SYSTEM_GPIO_PORT_K 7 +#define TEGRA410_SYSTEM_GPIO_PORT_L 8 +#define TEGRA410_SYSTEM_GPIO_PORT_M 9 +#define TEGRA410_SYSTEM_GPIO_PORT_N 10 +#define TEGRA410_SYSTEM_GPIO_PORT_P 11 +#define TEGRA410_SYSTEM_GPIO_PORT_Q 12 +#define TEGRA410_SYSTEM_GPIO_PORT_R 13 +#define TEGRA410_SYSTEM_GPIO_PORT_V 14 + struct tegra_gpio_port { const char *name; unsigned int bank; @@ -85,6 +109,7 @@ struct tegra_gpio_soc { const struct tegra_gpio_port *ports; unsigned int num_ports; const char *name; + const char *prefix; unsigned int instance; unsigned int num_irqs_per_bank; @@ -916,8 +941,12 @@ static int tegra186_gpio_probe(struct platform_device *pdev) char *name; for (j = 0; j < port->pins; j++) { - name = devm_kasprintf(gpio->gpio.parent, GFP_KERNEL, - "P%s.%02x", port->name, j); + if (gpio->soc->prefix) + name = devm_kasprintf(gpio->gpio.parent, GFP_KERNEL, "%s-P%s.%02x", + gpio->soc->prefix, port->name, j); + else + name = devm_kasprintf(gpio->gpio.parent, GFP_KERNEL, "P%s.%02x", + port->name, j); if (!name) return -ENOMEM; @@ -1002,14 +1031,17 @@ static int tegra186_gpio_probe(struct platform_device *pdev) return devm_gpiochip_add_data(&pdev->dev, &gpio->gpio, gpio); } -#define TEGRA186_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA186_MAIN_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ +#define TEGRA_GPIO_PORT(_prefix, _name, _bank, _port, _pins) \ + [_prefix##_GPIO_PORT_##_name] = { \ + .name = #_name, \ + .bank = _bank, \ + .port = _port, \ + .pins = _pins, \ } +#define TEGRA186_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA186_MAIN, _name, _bank, _port, _pins) + static const struct tegra_gpio_port tegra186_main_ports[] = { TEGRA186_MAIN_GPIO_PORT( A, 2, 0, 7), TEGRA186_MAIN_GPIO_PORT( B, 3, 0, 7), @@ -1045,13 +1077,8 @@ static const struct tegra_gpio_soc tegra186_main_soc = { .has_vm_support = false, }; -#define TEGRA186_AON_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA186_AON_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ - } +#define TEGRA186_AON_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA186_AON, _name, _bank, _port, _pins) static const struct tegra_gpio_port tegra186_aon_ports[] = { TEGRA186_AON_GPIO_PORT( S, 0, 1, 5), @@ -1073,13 +1100,8 @@ static const struct tegra_gpio_soc tegra186_aon_soc = { .has_vm_support = false, }; -#define TEGRA194_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA194_MAIN_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ - } +#define TEGRA194_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA194_MAIN, _name, _bank, _port, _pins) static const struct tegra_gpio_port tegra194_main_ports[] = { TEGRA194_MAIN_GPIO_PORT( A, 1, 2, 8), @@ -1129,13 +1151,8 @@ static const struct tegra_gpio_soc tegra194_main_soc = { .has_vm_support = true, }; -#define TEGRA194_AON_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA194_AON_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ - } +#define TEGRA194_AON_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA194_AON, _name, _bank, _port, _pins) static const struct tegra_gpio_port tegra194_aon_ports[] = { TEGRA194_AON_GPIO_PORT(AA, 0, 3, 8), @@ -1155,13 +1172,8 @@ static const struct tegra_gpio_soc tegra194_aon_soc = { .has_vm_support = false, }; -#define TEGRA234_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA234_MAIN_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ - } +#define TEGRA234_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA234_MAIN, _name, _bank, _port, _pins) static const struct tegra_gpio_port tegra234_main_ports[] = { TEGRA234_MAIN_GPIO_PORT( A, 0, 0, 8), @@ -1200,13 +1212,8 @@ static const struct tegra_gpio_soc tegra234_main_soc = { .has_vm_support = true, }; -#define TEGRA234_AON_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA234_AON_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ - } +#define TEGRA234_AON_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA234_AON, _name, _bank, _port, _pins) static const struct tegra_gpio_port tegra234_aon_ports[] = { TEGRA234_AON_GPIO_PORT(AA, 0, 4, 8), @@ -1227,13 +1234,8 @@ static const struct tegra_gpio_soc tegra234_aon_soc = { .has_vm_support = false, }; -#define TEGRA241_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA241_MAIN_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ - } +#define TEGRA241_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA241_MAIN, _name, _bank, _port, _pins) static const struct tegra_gpio_port tegra241_main_ports[] = { TEGRA241_MAIN_GPIO_PORT(A, 0, 0, 8), @@ -1258,13 +1260,8 @@ static const struct tegra_gpio_soc tegra241_main_soc = { .has_vm_support = false, }; -#define TEGRA241_AON_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA241_AON_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ - } +#define TEGRA241_AON_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA241_AON, _name, _bank, _port, _pins) static const struct tegra_gpio_port tegra241_aon_ports[] = { TEGRA241_AON_GPIO_PORT(AA, 0, 0, 8), @@ -1280,13 +1277,8 @@ static const struct tegra_gpio_soc tegra241_aon_soc = { .has_vm_support = false, }; -#define TEGRA256_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ - [TEGRA256_MAIN_GPIO_PORT_##_name] = { \ - .name = #_name, \ - .bank = _bank, \ - .port = _port, \ - .pins = _pins, \ - } +#define TEGRA256_MAIN_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA256_MAIN, _name, _bank, _port, _pins) static const struct tegra_gpio_port tegra256_main_ports[] = { TEGRA256_MAIN_GPIO_PORT(A, 0, 0, 8), @@ -1304,6 +1296,56 @@ static const struct tegra_gpio_soc tegra256_main_soc = { .has_vm_support = true, }; +#define TEGRA410_COMPUTE_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA410_COMPUTE, _name, _bank, _port, _pins) + +static const struct tegra_gpio_port tegra410_compute_ports[] = { + TEGRA410_COMPUTE_GPIO_PORT(A, 0, 0, 3), + TEGRA410_COMPUTE_GPIO_PORT(B, 1, 0, 8), + TEGRA410_COMPUTE_GPIO_PORT(C, 1, 1, 3), + TEGRA410_COMPUTE_GPIO_PORT(D, 2, 0, 8), + TEGRA410_COMPUTE_GPIO_PORT(E, 2, 1, 8), +}; + +static const struct tegra_gpio_soc tegra410_compute_soc = { + .num_ports = ARRAY_SIZE(tegra410_compute_ports), + .ports = tegra410_compute_ports, + .name = "tegra410-gpio-compute", + .prefix = "COMPUTE", + .num_irqs_per_bank = 8, + .instance = 0, +}; + +#define TEGRA410_SYSTEM_GPIO_PORT(_name, _bank, _port, _pins) \ + TEGRA_GPIO_PORT(TEGRA410_SYSTEM, _name, _bank, _port, _pins) + +static const struct tegra_gpio_port tegra410_system_ports[] = { + TEGRA410_SYSTEM_GPIO_PORT(A, 0, 0, 7), + TEGRA410_SYSTEM_GPIO_PORT(B, 0, 1, 8), + TEGRA410_SYSTEM_GPIO_PORT(C, 0, 2, 8), + TEGRA410_SYSTEM_GPIO_PORT(D, 0, 3, 8), + TEGRA410_SYSTEM_GPIO_PORT(E, 0, 4, 6), + TEGRA410_SYSTEM_GPIO_PORT(I, 1, 0, 8), + TEGRA410_SYSTEM_GPIO_PORT(J, 1, 1, 7), + TEGRA410_SYSTEM_GPIO_PORT(K, 1, 2, 7), + TEGRA410_SYSTEM_GPIO_PORT(L, 1, 3, 7), + TEGRA410_SYSTEM_GPIO_PORT(M, 2, 0, 7), + TEGRA410_SYSTEM_GPIO_PORT(N, 2, 1, 6), + TEGRA410_SYSTEM_GPIO_PORT(P, 2, 2, 8), + TEGRA410_SYSTEM_GPIO_PORT(Q, 2, 3, 3), + TEGRA410_SYSTEM_GPIO_PORT(R, 2, 4, 2), + TEGRA410_SYSTEM_GPIO_PORT(V, 1, 4, 2), +}; + +static const struct tegra_gpio_soc tegra410_system_soc = { + .num_ports = ARRAY_SIZE(tegra410_system_ports), + .ports = tegra410_system_ports, + .name = "tegra410-gpio-system", + .prefix = "SYSTEM", + .num_irqs_per_bank = 8, + .instance = 0, +}; + static const struct of_device_id tegra186_gpio_of_match[] = { { .compatible = "nvidia,tegra186-gpio", @@ -1339,6 +1381,8 @@ static const struct acpi_device_id tegra186_gpio_acpi_match[] = { { .id = "NVDA0408", .driver_data = (kernel_ulong_t)&tegra194_aon_soc }, { .id = "NVDA0508", .driver_data = (kernel_ulong_t)&tegra241_main_soc }, { .id = "NVDA0608", .driver_data = (kernel_ulong_t)&tegra241_aon_soc }, + { .id = "NVDA0708", .driver_data = (kernel_ulong_t)&tegra410_compute_soc }, + { .id = "NVDA0808", .driver_data = (kernel_ulong_t)&tegra410_system_soc }, {} }; MODULE_DEVICE_TABLE(acpi, tegra186_gpio_acpi_match); diff --git a/drivers/gpio/gpio-tqmx86.c b/drivers/gpio/gpio-tqmx86.c index 27dd09273292..eedfc0e371e3 100644 --- a/drivers/gpio/gpio-tqmx86.c +++ b/drivers/gpio/gpio-tqmx86.c @@ -279,19 +279,18 @@ static void tqmx86_gpio_irq_handler(struct irq_desc *desc) } /* Minimal runtime PM is needed by the IRQ subsystem */ -static int __maybe_unused tqmx86_gpio_runtime_suspend(struct device *dev) +static int tqmx86_gpio_runtime_suspend(struct device *dev) { return 0; } -static int __maybe_unused tqmx86_gpio_runtime_resume(struct device *dev) +static int tqmx86_gpio_runtime_resume(struct device *dev) { return 0; } static const struct dev_pm_ops tqmx86_gpio_dev_pm_ops = { - SET_RUNTIME_PM_OPS(tqmx86_gpio_runtime_suspend, - tqmx86_gpio_runtime_resume, NULL) + RUNTIME_PM_OPS(tqmx86_gpio_runtime_suspend, tqmx86_gpio_runtime_resume, NULL) }; static void tqmx86_init_irq_valid_mask(struct gpio_chip *chip, @@ -425,7 +424,7 @@ out_pm_dis: static struct platform_driver tqmx86_gpio_driver = { .driver = { .name = "tqmx86-gpio", - .pm = &tqmx86_gpio_dev_pm_ops, + .pm = pm_ptr(&tqmx86_gpio_dev_pm_ops), }, .probe = tqmx86_gpio_probe, }; diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index 197bb1d22b3c..0574dde5b5bb 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -426,7 +426,7 @@ static void uniphier_gpio_remove(struct platform_device *pdev) irq_domain_remove(priv->domain); } -static int __maybe_unused uniphier_gpio_suspend(struct device *dev) +static int uniphier_gpio_suspend(struct device *dev) { struct uniphier_gpio_priv *priv = dev_get_drvdata(dev); unsigned int nbanks = uniphier_gpio_get_nbanks(priv->chip.ngpio); @@ -448,7 +448,7 @@ static int __maybe_unused uniphier_gpio_suspend(struct device *dev) return 0; } -static int __maybe_unused uniphier_gpio_resume(struct device *dev) +static int uniphier_gpio_resume(struct device *dev) { struct uniphier_gpio_priv *priv = dev_get_drvdata(dev); unsigned int nbanks = uniphier_gpio_get_nbanks(priv->chip.ngpio); @@ -473,8 +473,7 @@ static int __maybe_unused uniphier_gpio_resume(struct device *dev) } static const struct dev_pm_ops uniphier_gpio_pm_ops = { - SET_LATE_SYSTEM_SLEEP_PM_OPS(uniphier_gpio_suspend, - uniphier_gpio_resume) + LATE_SYSTEM_SLEEP_PM_OPS(uniphier_gpio_suspend, uniphier_gpio_resume) }; static const struct of_device_id uniphier_gpio_match[] = { @@ -489,7 +488,7 @@ static struct platform_driver uniphier_gpio_driver = { .driver = { .name = "uniphier-gpio", .of_match_table = uniphier_gpio_match, - .pm = &uniphier_gpio_pm_ops, + .pm = pm_sleep_ptr(&uniphier_gpio_pm_ops), }, }; module_platform_driver(uniphier_gpio_driver); diff --git a/drivers/gpio/gpio-virtuser.c b/drivers/gpio/gpio-virtuser.c index a10eab7d2617..37f2ce20f1ae 100644 --- a/drivers/gpio/gpio-virtuser.c +++ b/drivers/gpio/gpio-virtuser.c @@ -500,9 +500,7 @@ static int gpio_virtuser_value_set(void *data, u64 val) if (val > 1) return -EINVAL; - gpiod_set_value_cansleep(ld->ad.desc, (int)val); - - return 0; + return gpiod_set_value_cansleep(ld->ad.desc, (int)val); } DEFINE_DEBUGFS_ATTRIBUTE(gpio_virtuser_value_fops, @@ -543,7 +541,7 @@ static void gpio_virtuser_set_value_atomic(struct irq_work *work) struct gpio_virtuser_irq_work_context *ctx = to_gpio_virtuser_irq_work_context(work); - gpiod_set_value(ctx->desc, ctx->val); + ctx->ret = gpiod_set_value(ctx->desc, ctx->val); complete(&ctx->work_completion); } @@ -562,7 +560,7 @@ static int gpio_virtuser_value_atomic_set(void *data, u64 val) gpio_virtuser_irq_work_queue_sync(&ctx); - return 0; + return ctx.ret; } DEFINE_DEBUGFS_ATTRIBUTE(gpio_virtuser_value_atomic_fops, diff --git a/drivers/gpio/gpio-xgene.c b/drivers/gpio/gpio-xgene.c index 4f627de3f56c..809668449dbe 100644 --- a/drivers/gpio/gpio-xgene.c +++ b/drivers/gpio/gpio-xgene.c @@ -130,7 +130,7 @@ static int xgene_gpio_dir_out(struct gpio_chip *gc, return 0; } -static __maybe_unused int xgene_gpio_suspend(struct device *dev) +static int xgene_gpio_suspend(struct device *dev) { struct xgene_gpio *gpio = dev_get_drvdata(dev); unsigned long bank_offset; @@ -143,7 +143,7 @@ static __maybe_unused int xgene_gpio_suspend(struct device *dev) return 0; } -static __maybe_unused int xgene_gpio_resume(struct device *dev) +static int xgene_gpio_resume(struct device *dev) { struct xgene_gpio *gpio = dev_get_drvdata(dev); unsigned long bank_offset; @@ -156,7 +156,7 @@ static __maybe_unused int xgene_gpio_resume(struct device *dev) return 0; } -static SIMPLE_DEV_PM_OPS(xgene_gpio_pm, xgene_gpio_suspend, xgene_gpio_resume); +static DEFINE_SIMPLE_DEV_PM_OPS(xgene_gpio_pm, xgene_gpio_suspend, xgene_gpio_resume); static int xgene_gpio_probe(struct platform_device *pdev) { @@ -204,7 +204,7 @@ static struct platform_driver xgene_gpio_driver = { .name = "xgene-gpio", .of_match_table = xgene_gpio_of_match, .acpi_match_table = ACPI_PTR(xgene_gpio_acpi_match), - .pm = &xgene_gpio_pm, + .pm = pm_sleep_ptr(&xgene_gpio_pm), }, .probe = xgene_gpio_probe, }; diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 83675ac81077..be4b4d730547 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -286,7 +286,7 @@ static void xgpio_free(struct gpio_chip *chip, unsigned int offset) pm_runtime_put(chip->parent); } -static int __maybe_unused xgpio_suspend(struct device *dev) +static int xgpio_suspend(struct device *dev) { struct xgpio_instance *gpio = dev_get_drvdata(dev); struct irq_data *data = irq_get_irq_data(gpio->irq); @@ -327,7 +327,7 @@ static void xgpio_irq_ack(struct irq_data *irq_data) { } -static int __maybe_unused xgpio_resume(struct device *dev) +static int xgpio_resume(struct device *dev) { struct xgpio_instance *gpio = dev_get_drvdata(dev); struct irq_data *data = irq_get_irq_data(gpio->irq); @@ -343,7 +343,7 @@ static int __maybe_unused xgpio_resume(struct device *dev) return 0; } -static int __maybe_unused xgpio_runtime_suspend(struct device *dev) +static int xgpio_runtime_suspend(struct device *dev) { struct xgpio_instance *gpio = dev_get_drvdata(dev); @@ -352,7 +352,7 @@ static int __maybe_unused xgpio_runtime_suspend(struct device *dev) return 0; } -static int __maybe_unused xgpio_runtime_resume(struct device *dev) +static int xgpio_runtime_resume(struct device *dev) { struct xgpio_instance *gpio = dev_get_drvdata(dev); @@ -360,9 +360,8 @@ static int __maybe_unused xgpio_runtime_resume(struct device *dev) } static const struct dev_pm_ops xgpio_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(xgpio_suspend, xgpio_resume) - SET_RUNTIME_PM_OPS(xgpio_runtime_suspend, - xgpio_runtime_resume, NULL) + SYSTEM_SLEEP_PM_OPS(xgpio_suspend, xgpio_resume) + RUNTIME_PM_OPS(xgpio_runtime_suspend, xgpio_runtime_resume, NULL) }; /** @@ -682,7 +681,7 @@ static struct platform_driver xgpio_plat_driver = { .driver = { .name = "gpio-xilinx", .of_match_table = xgpio_of_match, - .pm = &xgpio_dev_pm_ops, + .pm = pm_ptr(&xgpio_dev_pm_ops), }, }; diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c index 0ffd76e8951f..97780c57ab56 100644 --- a/drivers/gpio/gpio-zynq.c +++ b/drivers/gpio/gpio-zynq.c @@ -735,7 +735,7 @@ static void zynq_gpio_restore_context(struct zynq_gpio *gpio) } } -static int __maybe_unused zynq_gpio_suspend(struct device *dev) +static int zynq_gpio_suspend(struct device *dev) { struct zynq_gpio *gpio = dev_get_drvdata(dev); struct irq_data *data = irq_get_irq_data(gpio->irq); @@ -756,7 +756,7 @@ static int __maybe_unused zynq_gpio_suspend(struct device *dev) return 0; } -static int __maybe_unused zynq_gpio_resume(struct device *dev) +static int zynq_gpio_resume(struct device *dev) { struct zynq_gpio *gpio = dev_get_drvdata(dev); struct irq_data *data = irq_get_irq_data(gpio->irq); @@ -779,7 +779,7 @@ static int __maybe_unused zynq_gpio_resume(struct device *dev) return 0; } -static int __maybe_unused zynq_gpio_runtime_suspend(struct device *dev) +static int zynq_gpio_runtime_suspend(struct device *dev) { struct zynq_gpio *gpio = dev_get_drvdata(dev); @@ -788,7 +788,7 @@ static int __maybe_unused zynq_gpio_runtime_suspend(struct device *dev) return 0; } -static int __maybe_unused zynq_gpio_runtime_resume(struct device *dev) +static int zynq_gpio_runtime_resume(struct device *dev) { struct zynq_gpio *gpio = dev_get_drvdata(dev); @@ -814,9 +814,8 @@ static void zynq_gpio_free(struct gpio_chip *chip, unsigned int offset) } static const struct dev_pm_ops zynq_gpio_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(zynq_gpio_suspend, zynq_gpio_resume) - SET_RUNTIME_PM_OPS(zynq_gpio_runtime_suspend, - zynq_gpio_runtime_resume, NULL) + SYSTEM_SLEEP_PM_OPS(zynq_gpio_suspend, zynq_gpio_resume) + RUNTIME_PM_OPS(zynq_gpio_runtime_suspend, zynq_gpio_runtime_resume, NULL) }; static const struct zynq_platform_data versal_gpio_def = { @@ -1022,7 +1021,7 @@ static void zynq_gpio_remove(struct platform_device *pdev) static struct platform_driver zynq_gpio_driver = { .driver = { .name = DRIVER_NAME, - .pm = &zynq_gpio_dev_pm_ops, + .pm = pm_ptr(&zynq_gpio_dev_pm_ops), .of_match_table = zynq_gpio_of_match, }, .probe = zynq_gpio_probe, diff --git a/drivers/gpio/gpiolib-acpi-core.c b/drivers/gpio/gpiolib-acpi-core.c index d441c1236d8c..83dd227dbbec 100644 --- a/drivers/gpio/gpiolib-acpi-core.c +++ b/drivers/gpio/gpiolib-acpi-core.c @@ -1099,7 +1099,7 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address, return AE_BAD_PARAMETER; } - length = min_t(u16, agpio->pin_table_length, pin_index + bits); + length = min(agpio->pin_table_length, pin_index + bits); for (i = pin_index; i < length; ++i) { unsigned int pin = agpio->pin_table[i]; struct acpi_gpio_connection *conn; diff --git a/drivers/gpio/gpiolib-cdev.c b/drivers/gpio/gpiolib-cdev.c index 084656564176..3735c9fe1502 100644 --- a/drivers/gpio/gpiolib-cdev.c +++ b/drivers/gpio/gpiolib-cdev.c @@ -652,7 +652,7 @@ static enum hte_return process_hw_ts_thread(void *p) } le.line_seqno = line->line_seqno; le.seqno = (lr->num_lines == 1) ? le.line_seqno : line->req_seqno; - le.offset = gpio_chip_hwgpio(line->desc); + le.offset = gpiod_hwgpio(line->desc); linereq_put_event(lr, &le); @@ -676,7 +676,7 @@ static enum hte_return process_hw_ts(struct hte_ts_data *ts, void *p) if (READ_ONCE(line->sw_debounced)) { line->total_discard_seq++; line->last_seqno = ts->seq; - mod_delayed_work(system_wq, &line->work, + mod_delayed_work(system_percpu_wq, &line->work, usecs_to_jiffies(READ_ONCE(line->desc->debounce_period_us))); } else { if (unlikely(ts->seq < line->line_seqno)) @@ -769,7 +769,7 @@ static irqreturn_t edge_irq_thread(int irq, void *p) line->line_seqno++; le.line_seqno = line->line_seqno; le.seqno = (lr->num_lines == 1) ? le.line_seqno : line->req_seqno; - le.offset = gpio_chip_hwgpio(line->desc); + le.offset = gpiod_hwgpio(line->desc); linereq_put_event(lr, &le); @@ -817,7 +817,7 @@ static irqreturn_t debounce_irq_handler(int irq, void *p) { struct line *line = p; - mod_delayed_work(system_wq, &line->work, + mod_delayed_work(system_percpu_wq, &line->work, usecs_to_jiffies(READ_ONCE(line->desc->debounce_period_us))); return IRQ_HANDLED; @@ -867,7 +867,7 @@ static void debounce_work_func(struct work_struct *work) lr = line->req; le.timestamp_ns = line_event_timestamp(line); - le.offset = gpio_chip_hwgpio(line->desc); + le.offset = gpiod_hwgpio(line->desc); #ifdef CONFIG_HTE if (edflags & GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE) { /* discard events except the last one */ @@ -1567,7 +1567,7 @@ static void linereq_show_fdinfo(struct seq_file *out, struct file *file) for (i = 0; i < lr->num_lines; i++) seq_printf(out, "gpio-line:\t%d\n", - gpio_chip_hwgpio(lr->lines[i].desc)); + gpiod_hwgpio(lr->lines[i].desc)); } #endif @@ -2220,7 +2220,7 @@ static void gpio_desc_to_lineinfo(struct gpio_desc *desc, return; memset(info, 0, sizeof(*info)); - info->offset = gpio_chip_hwgpio(desc); + info->offset = gpiod_hwgpio(desc); if (desc->name) strscpy(info->name, desc->name, sizeof(info->name)); @@ -2526,7 +2526,7 @@ static int lineinfo_changed_notify(struct notifier_block *nb, struct gpio_desc *desc = data; struct file *fp; - if (!test_bit(gpio_chip_hwgpio(desc), cdev->watched_lines)) + if (!test_bit(gpiod_hwgpio(desc), cdev->watched_lines)) return NOTIFY_DONE; /* Keep the file descriptor alive for the duration of the notification. */ @@ -2804,7 +2804,7 @@ int gpiolib_cdev_register(struct gpio_device *gdev, dev_t devt) if (!gc) return -ENODEV; - chip_dbg(gc, "added GPIO chardev (%d:%d)\n", MAJOR(devt), gdev->id); + gpiochip_dbg(gc, "added GPIO chardev (%d:%d)\n", MAJOR(devt), gdev->id); return 0; } diff --git a/drivers/gpio/gpiolib-legacy.c b/drivers/gpio/gpiolib-legacy.c index 3bc93ccadb5b..ef3f2ef30cf2 100644 --- a/drivers/gpio/gpiolib-legacy.c +++ b/drivers/gpio/gpiolib-legacy.c @@ -34,30 +34,20 @@ EXPORT_SYMBOL_GPL(gpio_free); */ int gpio_request_one(unsigned gpio, unsigned long flags, const char *label) { - struct gpio_desc *desc; int err; - /* Compatibility: assume unavailable "valid" GPIOs will appear later */ - desc = gpio_to_desc(gpio); - if (!desc) - return -EPROBE_DEFER; - - err = gpiod_request(desc, label); + err = gpio_request(gpio, label); if (err) return err; if (flags & GPIOF_IN) - err = gpiod_direction_input(desc); + err = gpio_direction_input(gpio); else - err = gpiod_direction_output_raw(desc, !!(flags & GPIOF_OUT_INIT_HIGH)); + err = gpio_direction_output(gpio, !!(flags & GPIOF_OUT_INIT_HIGH)); if (err) - goto free_gpio; - - return 0; + gpio_free(gpio); - free_gpio: - gpiod_free(desc); return err; } EXPORT_SYMBOL_GPL(gpio_request_one); @@ -78,11 +68,9 @@ int gpio_request(unsigned gpio, const char *label) } EXPORT_SYMBOL_GPL(gpio_request); -static void devm_gpio_release(struct device *dev, void *res) +static void devm_gpio_release(void *gpio) { - unsigned *gpio = res; - - gpio_free(*gpio); + gpio_free((unsigned)(unsigned long)gpio); } /** @@ -100,22 +88,22 @@ static void devm_gpio_release(struct device *dev, void *res) int devm_gpio_request_one(struct device *dev, unsigned gpio, unsigned long flags, const char *label) { - unsigned *dr; int rc; - dr = devres_alloc(devm_gpio_release, sizeof(unsigned), GFP_KERNEL); - if (!dr) - return -ENOMEM; + rc = gpio_request(gpio, label); + if (rc) + return rc; + + if (flags & GPIOF_IN) + rc = gpio_direction_input(gpio); + else + rc = gpio_direction_output(gpio, !!(flags & GPIOF_OUT_INIT_HIGH)); - rc = gpio_request_one(gpio, flags, label); if (rc) { - devres_free(dr); + gpio_free(gpio); return rc; } - *dr = gpio; - devres_add(dev, dr); - - return 0; + return devm_add_action_or_reset(dev, devm_gpio_release, (void *)(unsigned long)gpio); } EXPORT_SYMBOL_GPL(devm_gpio_request_one); diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index fad4edf9cc5c..8657379e9165 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -1031,85 +1031,6 @@ static int of_gpio_threecell_xlate(struct gpio_chip *gc, return gpiospec->args[1]; } -#if IS_ENABLED(CONFIG_OF_GPIO_MM_GPIOCHIP) -#include <linux/gpio/legacy-of-mm-gpiochip.h> -/** - * of_mm_gpiochip_add_data - Add memory mapped GPIO chip (bank) - * @np: device node of the GPIO chip - * @mm_gc: pointer to the of_mm_gpio_chip allocated structure - * @data: driver data to store in the struct gpio_chip - * - * To use this function you should allocate and fill mm_gc with: - * - * 1) In the gpio_chip structure: - * - all the callbacks - * - of_gpio_n_cells - * - of_xlate callback (optional) - * - * 3) In the of_mm_gpio_chip structure: - * - save_regs callback (optional) - * - * If succeeded, this function will map bank's memory and will - * do all necessary work for you. Then you'll able to use .regs - * to manage GPIOs from the callbacks. - * - * Returns: - * 0 on success, or negative errno on failure. - */ -int of_mm_gpiochip_add_data(struct device_node *np, - struct of_mm_gpio_chip *mm_gc, - void *data) -{ - int ret = -ENOMEM; - struct gpio_chip *gc = &mm_gc->gc; - - gc->label = kasprintf(GFP_KERNEL, "%pOF", np); - if (!gc->label) - goto err0; - - mm_gc->regs = of_iomap(np, 0); - if (!mm_gc->regs) - goto err1; - - gc->base = -1; - - if (mm_gc->save_regs) - mm_gc->save_regs(mm_gc); - - fwnode_handle_put(mm_gc->gc.fwnode); - mm_gc->gc.fwnode = fwnode_handle_get(of_fwnode_handle(np)); - - ret = gpiochip_add_data(gc, data); - if (ret) - goto err2; - - return 0; -err2: - of_node_put(np); - iounmap(mm_gc->regs); -err1: - kfree(gc->label); -err0: - pr_err("%pOF: GPIO chip registration failed with status %d\n", np, ret); - return ret; -} -EXPORT_SYMBOL_GPL(of_mm_gpiochip_add_data); - -/** - * of_mm_gpiochip_remove - Remove memory mapped GPIO chip (bank) - * @mm_gc: pointer to the of_mm_gpio_chip allocated structure - */ -void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc) -{ - struct gpio_chip *gc = &mm_gc->gc; - - gpiochip_remove(gc); - iounmap(mm_gc->regs); - kfree(gc->label); -} -EXPORT_SYMBOL_GPL(of_mm_gpiochip_remove); -#endif - #ifdef CONFIG_PINCTRL static int of_gpiochip_add_pin_range(struct gpio_chip *chip) { diff --git a/drivers/gpio/gpiolib-shared.c b/drivers/gpio/gpiolib-shared.c index fa1d16635ea7..8bdd107b1ad1 100644 --- a/drivers/gpio/gpiolib-shared.c +++ b/drivers/gpio/gpiolib-shared.c @@ -49,6 +49,7 @@ struct gpio_shared_entry { unsigned int offset; /* Index in the property value array. */ size_t index; + struct mutex lock; struct gpio_shared_desc *shared_desc; struct kref ref; struct list_head refs; @@ -58,6 +59,7 @@ static LIST_HEAD(gpio_shared_list); static DEFINE_MUTEX(gpio_shared_lock); static DEFINE_IDA(gpio_shared_ida); +#if IS_ENABLED(CONFIG_OF) static struct gpio_shared_entry * gpio_shared_find_entry(struct fwnode_handle *controller_node, unsigned int offset) @@ -72,7 +74,26 @@ gpio_shared_find_entry(struct fwnode_handle *controller_node, return NULL; } -#if IS_ENABLED(CONFIG_OF) +/* Handle all special nodes that we should ignore. */ +static bool gpio_shared_of_node_ignore(struct device_node *node) +{ + /* + * __symbols__ is a special, internal node and should not be considered + * when scanning for shared GPIOs. + */ + if (of_node_name_eq(node, "__symbols__")) + return true; + + /* + * GPIO hogs have a "gpios" property which is not a phandle and can't + * possibly refer to a shared GPIO. + */ + if (of_property_present(node, "gpio-hog")) + return true; + + return false; +} + static int gpio_shared_of_traverse(struct device_node *curr) { struct gpio_shared_entry *entry; @@ -84,6 +105,9 @@ static int gpio_shared_of_traverse(struct device_node *curr) const char *suffix; int ret, count, i; + if (gpio_shared_of_node_ignore(curr)) + return 0; + for_each_property_of_node(curr, prop) { /* * The standard name for a GPIO property is "foo-gpios" @@ -147,6 +171,7 @@ static int gpio_shared_of_traverse(struct device_node *curr) entry->offset = offset; entry->index = count; INIT_LIST_HEAD(&entry->refs); + mutex_init(&entry->lock); list_add_tail(&entry->list, &gpio_shared_list); } @@ -205,7 +230,10 @@ static int gpio_shared_of_traverse(struct device_node *curr) static int gpio_shared_of_scan(void) { - return gpio_shared_of_traverse(of_root); + if (of_root) + return gpio_shared_of_traverse(of_root); + + return 0; } #else static int gpio_shared_of_scan(void) @@ -220,6 +248,7 @@ static void gpio_shared_adev_release(struct device *dev) } static int gpio_shared_make_adev(struct gpio_device *gdev, + struct gpio_shared_entry *entry, struct gpio_shared_ref *ref) { struct auxiliary_device *adev = &ref->adev; @@ -232,6 +261,7 @@ static int gpio_shared_make_adev(struct gpio_device *gdev, adev->id = ref->dev_id; adev->name = "proxy"; adev->dev.parent = gdev->dev.parent; + adev->dev.platform_data = entry; adev->dev.release = gpio_shared_adev_release; ret = auxiliary_device_init(adev); @@ -250,6 +280,84 @@ static int gpio_shared_make_adev(struct gpio_device *gdev, return 0; } +#if IS_ENABLED(CONFIG_RESET_GPIO) +/* + * Special case: reset-gpio is an auxiliary device that's created dynamically + * and put in between the GPIO controller and consumers of shared GPIOs + * referred to by the "reset-gpios" property. + * + * If the supposed consumer of a shared GPIO didn't match any of the mappings + * we created when scanning the firmware nodes, it's still possible that it's + * the reset-gpio device which didn't exist at the time of the scan. + * + * This function verifies it an return true if it's the case. + */ +static bool gpio_shared_dev_is_reset_gpio(struct device *consumer, + struct gpio_shared_entry *entry, + struct gpio_shared_ref *ref) +{ + struct fwnode_handle *reset_fwnode = dev_fwnode(consumer); + struct fwnode_reference_args ref_args, aux_args; + struct device *parent = consumer->parent; + bool match; + int ret; + + /* The reset-gpio device must have a parent AND a firmware node. */ + if (!parent || !reset_fwnode) + return false; + + /* + * FIXME: use device_is_compatible() once the reset-gpio drivers gains + * a compatible string which it currently does not have. + */ + if (!strstarts(dev_name(consumer), "reset.gpio.")) + return false; + + /* + * Parent of the reset-gpio auxiliary device is the GPIO chip whose + * fwnode we stored in the entry structure. + */ + if (!device_match_fwnode(parent, entry->fwnode)) + return false; + + /* + * The device associated with the shared reference's firmware node is + * the consumer of the reset control exposed by the reset-gpio device. + * It must have a "reset-gpios" property that's referencing the entry's + * firmware node. + * + * The reference args must agree between the real consumer and the + * auxiliary reset-gpio device. + */ + ret = fwnode_property_get_reference_args(ref->fwnode, "reset-gpios", + NULL, 2, 0, &ref_args); + if (ret) + return false; + + ret = fwnode_property_get_reference_args(reset_fwnode, "reset-gpios", + NULL, 2, 0, &aux_args); + if (ret) { + fwnode_handle_put(ref_args.fwnode); + return false; + } + + match = ((ref_args.fwnode == entry->fwnode) && + (aux_args.fwnode == entry->fwnode) && + (ref_args.args[0] == aux_args.args[0])); + + fwnode_handle_put(ref_args.fwnode); + fwnode_handle_put(aux_args.fwnode); + return match; +} +#else +static bool gpio_shared_dev_is_reset_gpio(struct device *consumer, + struct gpio_shared_entry *entry, + struct gpio_shared_ref *ref) +{ + return false; +} +#endif /* CONFIG_RESET_GPIO */ + int gpio_shared_add_proxy_lookup(struct device *consumer, unsigned long lflags) { const char *dev_id = dev_name(consumer); @@ -265,7 +373,8 @@ int gpio_shared_add_proxy_lookup(struct device *consumer, unsigned long lflags) list_for_each_entry(entry, &gpio_shared_list, list) { list_for_each_entry(ref, &entry->refs, list) { - if (!device_match_fwnode(consumer, ref->fwnode)) + if (!device_match_fwnode(consumer, ref->fwnode) && + !gpio_shared_dev_is_reset_gpio(consumer, entry, ref)) continue; /* We've already done that on a previous request. */ @@ -356,7 +465,7 @@ int gpio_device_setup_shared(struct gpio_device *gdev) pr_debug("Setting up a shared GPIO entry for %s\n", fwnode_get_name(ref->fwnode)); - ret = gpio_shared_make_adev(gdev, ref); + ret = gpio_shared_make_adev(gdev, entry, ref); if (ret) return ret; } @@ -390,10 +499,11 @@ static void gpio_shared_release(struct kref *kref) { struct gpio_shared_entry *entry = container_of(kref, struct gpio_shared_entry, ref); - struct gpio_shared_desc *shared_desc = entry->shared_desc; + struct gpio_shared_desc *shared_desc; - guard(mutex)(&gpio_shared_lock); + guard(mutex)(&entry->lock); + shared_desc = entry->shared_desc; gpio_device_put(shared_desc->desc->gdev); if (shared_desc->can_sleep) mutex_destroy(&shared_desc->mutex); @@ -416,6 +526,8 @@ gpiod_shared_desc_create(struct gpio_shared_entry *entry) struct gpio_shared_desc *shared_desc; struct gpio_device *gdev; + lockdep_assert_held(&entry->lock); + shared_desc = kzalloc(sizeof(*shared_desc), GFP_KERNEL); if (!shared_desc) return ERR_PTR(-ENOMEM); @@ -436,57 +548,42 @@ gpiod_shared_desc_create(struct gpio_shared_entry *entry) return shared_desc; } -static struct gpio_shared_entry *gpiod_shared_find(struct auxiliary_device *adev) +struct gpio_shared_desc *devm_gpiod_shared_get(struct device *dev) { struct gpio_shared_desc *shared_desc; struct gpio_shared_entry *entry; - struct gpio_shared_ref *ref; - - guard(mutex)(&gpio_shared_lock); + int ret; - list_for_each_entry(entry, &gpio_shared_list, list) { - list_for_each_entry(ref, &entry->refs, list) { - if (adev != &ref->adev) - continue; + lockdep_assert_not_held(&gpio_shared_lock); - if (entry->shared_desc) { - kref_get(&entry->ref); - return entry; - } + entry = dev_get_platdata(dev); + if (WARN_ON(!entry)) + /* Programmer bug */ + return ERR_PTR(-ENOENT); + scoped_guard(mutex, &entry->lock) { + if (entry->shared_desc) { + kref_get(&entry->ref); + shared_desc = entry->shared_desc; + } else { shared_desc = gpiod_shared_desc_create(entry); if (IS_ERR(shared_desc)) return ERR_CAST(shared_desc); kref_init(&entry->ref); entry->shared_desc = shared_desc; - - pr_debug("Device %s acquired a reference to the shared GPIO %u owned by %s\n", - dev_name(&adev->dev), gpio_chip_hwgpio(shared_desc->desc), - gpio_device_get_label(shared_desc->desc->gdev)); - - - return entry; } - } - - return ERR_PTR(-ENOENT); -} - -struct gpio_shared_desc *devm_gpiod_shared_get(struct device *dev) -{ - struct gpio_shared_entry *entry; - int ret; - entry = gpiod_shared_find(to_auxiliary_dev(dev)); - if (IS_ERR(entry)) - return ERR_CAST(entry); + pr_debug("Device %s acquired a reference to the shared GPIO %u owned by %s\n", + dev_name(dev), gpiod_hwgpio(shared_desc->desc), + gpio_device_get_label(shared_desc->desc->gdev)); + } ret = devm_add_action_or_reset(dev, gpiod_shared_put, entry); if (ret) return ERR_PTR(ret); - return entry->shared_desc; + return shared_desc; } EXPORT_SYMBOL_GPL(devm_gpiod_shared_get); @@ -502,6 +599,7 @@ static void gpio_shared_drop_ref(struct gpio_shared_ref *ref) static void gpio_shared_drop_entry(struct gpio_shared_entry *entry) { list_del(&entry->list); + mutex_destroy(&entry->lock); fwnode_handle_put(entry->fwnode); kfree(entry); } diff --git a/drivers/gpio/gpiolib-swnode.c b/drivers/gpio/gpiolib-swnode.c index e3806db1c0e0..b44f35d68459 100644 --- a/drivers/gpio/gpiolib-swnode.c +++ b/drivers/gpio/gpiolib-swnode.c @@ -31,7 +31,7 @@ static struct gpio_device *swnode_get_gpio_device(struct fwnode_handle *fwnode) gdev_node = to_software_node(fwnode); if (!gdev_node || !gdev_node->name) - return ERR_PTR(-EINVAL); + goto fwnode_lookup; /* * Check for a special node that identifies undefined GPIOs, this is @@ -41,6 +41,7 @@ static struct gpio_device *swnode_get_gpio_device(struct fwnode_handle *fwnode) !strcmp(gdev_node->name, GPIOLIB_SWNODE_UNDEFINED_NAME)) return ERR_PTR(-ENOENT); +fwnode_lookup: gdev = gpio_device_find_by_fwnode(fwnode); return gdev ?: ERR_PTR(-EPROBE_DEFER); } diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c index 9a849245b358..cd553acf3055 100644 --- a/drivers/gpio/gpiolib-sysfs.c +++ b/drivers/gpio/gpiolib-sysfs.c @@ -244,7 +244,7 @@ static int gpio_sysfs_request_irq(struct gpiod_data *data, unsigned char flags) * Remove this redundant call (along with the corresponding unlock) * when those drivers have been fixed. */ - ret = gpiochip_lock_as_irq(guard.gc, gpio_chip_hwgpio(desc)); + ret = gpiochip_lock_as_irq(guard.gc, gpiod_hwgpio(desc)); if (ret < 0) goto err_clr_bits; @@ -258,7 +258,7 @@ static int gpio_sysfs_request_irq(struct gpiod_data *data, unsigned char flags) return 0; err_unlock: - gpiochip_unlock_as_irq(guard.gc, gpio_chip_hwgpio(desc)); + gpiochip_unlock_as_irq(guard.gc, gpiod_hwgpio(desc)); err_clr_bits: clear_bit(GPIOD_FLAG_EDGE_RISING, &desc->flags); clear_bit(GPIOD_FLAG_EDGE_FALLING, &desc->flags); @@ -280,7 +280,7 @@ static void gpio_sysfs_free_irq(struct gpiod_data *data) data->irq_flags = 0; free_irq(data->irq, data); - gpiochip_unlock_as_irq(guard.gc, gpio_chip_hwgpio(desc)); + gpiochip_unlock_as_irq(guard.gc, gpiod_hwgpio(desc)); clear_bit(GPIOD_FLAG_EDGE_RISING, &desc->flags); clear_bit(GPIOD_FLAG_EDGE_FALLING, &desc->flags); } @@ -478,10 +478,10 @@ static int export_gpio_desc(struct gpio_desc *desc) if (!guard.gc) return -ENODEV; - offset = gpio_chip_hwgpio(desc); + offset = gpiod_hwgpio(desc); if (!gpiochip_line_is_valid(guard.gc, offset)) { pr_debug_ratelimited("%s: GPIO %d masked\n", __func__, - gpio_chip_hwgpio(desc)); + gpiod_hwgpio(desc)); return -EINVAL; } @@ -823,7 +823,7 @@ int gpiod_export(struct gpio_desc *desc, bool direction_may_change) } desc_data->chip_attr_group.name = kasprintf(GFP_KERNEL, "gpio%u", - gpio_chip_hwgpio(desc)); + gpiod_hwgpio(desc)); if (!desc_data->chip_attr_group.name) { status = -ENOMEM; goto err_put_dirent; @@ -843,7 +843,7 @@ int gpiod_export(struct gpio_desc *desc, bool direction_may_change) if (status) goto err_free_name; - path = kasprintf(GFP_KERNEL, "gpio%u/value", gpio_chip_hwgpio(desc)); + path = kasprintf(GFP_KERNEL, "gpio%u/value", gpiod_hwgpio(desc)); if (!path) { status = -ENOMEM; goto err_remove_groups; @@ -1091,7 +1091,7 @@ static int gpiofind_sysfs_register(struct gpio_chip *gc, const void *data) ret = gpiochip_sysfs_register(gdev); if (ret) - chip_err(gc, "failed to register the sysfs entry: %d\n", ret); + gpiochip_err(gc, "failed to register the sysfs entry: %d\n", ret); return 0; } diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 476fcc897d90..91e0c384f34a 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -236,6 +236,19 @@ int desc_to_gpio(const struct gpio_desc *desc) } EXPORT_SYMBOL_GPL(desc_to_gpio); +/** + * gpiod_hwgpio - Return the GPIO number of the passed descriptor relative to + * its chip. + * @desc: GPIO descriptor + * + * Returns: + * Hardware offset of the GPIO represented by the descriptor. + */ +int gpiod_hwgpio(const struct gpio_desc *desc) +{ + return desc - &desc->gdev->descs[0]; +} +EXPORT_SYMBOL_GPL(gpiod_hwgpio); /** * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs @@ -444,7 +457,7 @@ int gpiod_get_direction(struct gpio_desc *desc) if (!guard.gc) return -ENODEV; - offset = gpio_chip_hwgpio(desc); + offset = gpiod_hwgpio(desc); flags = READ_ONCE(desc->flags); /* @@ -922,8 +935,8 @@ static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog) desc = gpiochip_get_desc(gc, hog->chip_hwnum); if (IS_ERR(desc)) { - chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__, - PTR_ERR(desc)); + gpiochip_err(gc, "%s: unable to get GPIO desc: %ld\n", + __func__, PTR_ERR(desc)); return; } @@ -1125,7 +1138,7 @@ int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, ret = gpiodev_add_to_list_unlocked(gdev); if (ret) { - chip_err(gc, "GPIO integer space overlap, cannot add chip\n"); + gpiochip_err(gc, "GPIO integer space overlap, cannot add chip\n"); goto err_free_label; } } @@ -1537,8 +1550,7 @@ static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, &parent_hwirq, &parent_type); if (ret) { - chip_err(gc, "skip set-up on hwirq %d\n", - i); + gpiochip_err(gc, "skip set-up on hwirq %d\n", i); continue; } @@ -1551,15 +1563,14 @@ static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, ret = irq_domain_alloc_irqs(gc->irq.domain, 1, NUMA_NO_NODE, &fwspec); if (ret < 0) { - chip_err(gc, - "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", - i, parent_hwirq, - ret); + gpiochip_err(gc, + "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", + i, parent_hwirq, ret); } } } - chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); + gpiochip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); return; } @@ -1611,15 +1622,15 @@ static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, if (ret) return ret; - chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); + gpiochip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); ret = girq->child_to_parent_hwirq(gc, hwirq, type, &parent_hwirq, &parent_type); if (ret) { - chip_err(gc, "can't look up hwirq %lu\n", hwirq); + gpiochip_err(gc, "can't look up hwirq %lu\n", hwirq); return ret; } - chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); + gpiochip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); /* * We set handle_bad_irq because the .set_type() should @@ -1640,8 +1651,8 @@ static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, if (ret) return ret; - chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", - irq, parent_hwirq); + gpiochip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", + irq, parent_hwirq); irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec); /* @@ -1651,9 +1662,9 @@ static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) ret = 0; if (ret) - chip_err(gc, - "failed to allocate parent hwirq %d for hwirq %lu\n", - parent_hwirq, hwirq); + gpiochip_err(gc, + "failed to allocate parent hwirq %d for hwirq %lu\n", + parent_hwirq, hwirq); return ret; } @@ -1729,7 +1740,7 @@ static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc) if (!gc->irq.child_to_parent_hwirq || !gc->irq.fwnode) { - chip_err(gc, "missing irqdomain vital data\n"); + gpiochip_err(gc, "missing irqdomain vital data\n"); return ERR_PTR(-EINVAL); } @@ -2002,7 +2013,7 @@ static void gpiochip_set_irq_hooks(struct gpio_chip *gc) if (irqchip->flags & IRQCHIP_IMMUTABLE) return; - chip_warn(gc, "not an immutable chip, please consider fixing it!\n"); + gpiochip_warn(gc, "not an immutable chip, please consider fixing it!\n"); if (!irqchip->irq_request_resources && !irqchip->irq_release_resources) { @@ -2018,8 +2029,8 @@ static void gpiochip_set_irq_hooks(struct gpio_chip *gc) * ...and if so, give a gentle warning that this is bad * practice. */ - chip_info(gc, - "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); + gpiochip_info(gc, + "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); return; } @@ -2048,7 +2059,8 @@ static int gpiochip_irqchip_add_allocated_domain(struct gpio_chip *gc, return -EINVAL; if (gc->to_irq) - chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); + gpiochip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", + __func__); gc->to_irq = gpiochip_to_irq; gc->irq.domain = domain; @@ -2089,7 +2101,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gc, return 0; if (gc->irq.parent_handler && gc->can_sleep) { - chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n"); + gpiochip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n"); return -EINVAL; } @@ -2325,10 +2337,8 @@ int gpiochip_add_pingroup_range(struct gpio_chip *gc, int ret; pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); - if (!pin_range) { - chip_err(gc, "failed to allocate pin ranges\n"); + if (!pin_range) return -ENOMEM; - } /* Use local offset as range ID */ pin_range->range.id = gpio_offset; @@ -2347,7 +2357,7 @@ int gpiochip_add_pingroup_range(struct gpio_chip *gc, pinctrl_add_gpio_range(pctldev, &pin_range->range); - chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n", + gpiochip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n", gpio_offset, gpio_offset + pin_range->range.npins - 1, pinctrl_dev_get_devname(pctldev), pin_group); @@ -2388,10 +2398,8 @@ int gpiochip_add_pin_range_with_pins(struct gpio_chip *gc, int ret; pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); - if (!pin_range) { - chip_err(gc, "failed to allocate pin ranges\n"); + if (!pin_range) return -ENOMEM; - } /* Use local offset as range ID */ pin_range->range.id = gpio_offset; @@ -2405,19 +2413,18 @@ int gpiochip_add_pin_range_with_pins(struct gpio_chip *gc, &pin_range->range); if (IS_ERR(pin_range->pctldev)) { ret = PTR_ERR(pin_range->pctldev); - chip_err(gc, "could not create pin range\n"); + gpiochip_err(gc, "could not create pin range\n"); kfree(pin_range); return ret; } if (pin_range->range.pins) - chip_dbg(gc, "created GPIO range %d->%d ==> %s %d sparse PIN range { %d, ... }", - gpio_offset, gpio_offset + npins - 1, - pinctl_name, npins, pins[0]); + gpiochip_dbg(gc, "created GPIO range %d->%d ==> %s %d sparse PIN range { %d, ... }", + gpio_offset, gpio_offset + npins - 1, + pinctl_name, npins, pins[0]); else - chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n", - gpio_offset, gpio_offset + npins - 1, - pinctl_name, - pin_offset, pin_offset + npins - 1); + gpiochip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n", + gpio_offset, gpio_offset + npins - 1, pinctl_name, + pin_offset, pin_offset + npins - 1); list_add_tail(&pin_range->node, &gdev->pin_ranges); @@ -2461,7 +2468,7 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label) if (test_and_set_bit(GPIOD_FLAG_REQUESTED, &desc->flags)) return -EBUSY; - offset = gpio_chip_hwgpio(desc); + offset = gpiod_hwgpio(desc); if (!gpiochip_line_is_valid(guard.gc, offset)) return -EINVAL; @@ -2523,7 +2530,7 @@ static void gpiod_free_commit(struct gpio_desc *desc) if (guard.gc && test_bit(GPIOD_FLAG_REQUESTED, &flags)) { if (guard.gc->free) - guard.gc->free(guard.gc, gpio_chip_hwgpio(desc)); + guard.gc->free(guard.gc, gpiod_hwgpio(desc)); clear_bit(GPIOD_FLAG_ACTIVE_LOW, &flags); clear_bit(GPIOD_FLAG_REQUESTED, &flags); @@ -2627,7 +2634,7 @@ struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, int ret; if (IS_ERR(desc)) { - chip_err(gc, "failed to get GPIO %s descriptor\n", name); + gpiochip_err(gc, "failed to get GPIO %s descriptor\n", name); return desc; } @@ -2638,7 +2645,7 @@ struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, ret = gpiod_configure_flags(desc, label, lflags, dflags); if (ret) { gpiod_free_commit(desc); - chip_err(gc, "setup of own GPIO %s failed\n", name); + gpiochip_err(gc, "setup of own GPIO %s failed\n", name); return ERR_PTR(ret); } @@ -2683,7 +2690,7 @@ int gpio_do_set_config(struct gpio_desc *desc, unsigned long config) if (!guard.gc->set_config) return -ENOTSUPP; - ret = guard.gc->set_config(guard.gc, gpio_chip_hwgpio(desc), config); + ret = guard.gc->set_config(guard.gc, gpiod_hwgpio(desc), config); if (ret > 0) ret = -EBADE; @@ -2714,7 +2721,7 @@ static int gpio_set_config_with_argument_optional(struct gpio_desc *desc, u32 argument) { struct device *dev = &desc->gdev->dev; - int gpio = gpio_chip_hwgpio(desc); + int gpio = gpiod_hwgpio(desc); int ret; ret = gpio_set_config_with_argument(desc, mode, argument); @@ -2877,9 +2884,9 @@ int gpiod_direction_input_nonotify(struct gpio_desc *desc) */ if (guard.gc->direction_input) { ret = gpiochip_direction_input(guard.gc, - gpio_chip_hwgpio(desc)); + gpiod_hwgpio(desc)); } else if (guard.gc->get_direction) { - dir = gpiochip_get_direction(guard.gc, gpio_chip_hwgpio(desc)); + dir = gpiochip_get_direction(guard.gc, gpiod_hwgpio(desc)); if (dir < 0) return dir; @@ -2938,12 +2945,12 @@ static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) if (guard.gc->direction_output) { ret = gpiochip_direction_output(guard.gc, - gpio_chip_hwgpio(desc), val); + gpiod_hwgpio(desc), val); } else { /* Check that we are in output mode if we can */ if (guard.gc->get_direction) { dir = gpiochip_get_direction(guard.gc, - gpio_chip_hwgpio(desc)); + gpiod_hwgpio(desc)); if (dir < 0) return dir; @@ -2958,7 +2965,7 @@ static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) * If we can't actively set the direction, we are some * output-only chip, so just drive the output as desired. */ - ret = gpiochip_set(guard.gc, gpio_chip_hwgpio(desc), val); + ret = gpiochip_set(guard.gc, gpiod_hwgpio(desc), val); if (ret) return ret; } @@ -3109,7 +3116,7 @@ int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags) } ret = guard.gc->en_hw_timestamp(guard.gc, - gpio_chip_hwgpio(desc), flags); + gpiod_hwgpio(desc), flags); if (ret) gpiod_warn(desc, "%s: hw ts request failed\n", __func__); @@ -3141,7 +3148,7 @@ int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags) return -ENOTSUPP; } - ret = guard.gc->dis_hw_timestamp(guard.gc, gpio_chip_hwgpio(desc), + ret = guard.gc->dis_hw_timestamp(guard.gc, gpiod_hwgpio(desc), flags); if (ret) gpiod_warn(desc, "%s: hw ts release failed\n", __func__); @@ -3272,7 +3279,7 @@ static int gpiochip_get(struct gpio_chip *gc, unsigned int offset) static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc) { - return gc->get ? gpiochip_get(gc, gpio_chip_hwgpio(desc)) : -EIO; + return gc->get ? gpiochip_get(gc, gpiod_hwgpio(desc)) : -EIO; } /* I/O calls are only valid after configuration completed; the relevant @@ -3432,7 +3439,7 @@ int gpiod_get_array_value_complex(bool raw, bool can_sleep, first = i; do { const struct gpio_desc *desc = desc_array[i]; - int hwgpio = gpio_chip_hwgpio(desc); + int hwgpio = gpiod_hwgpio(desc); __set_bit(hwgpio, mask); i++; @@ -3454,7 +3461,7 @@ int gpiod_get_array_value_complex(bool raw, bool can_sleep, for (j = first; j < i; ) { const struct gpio_desc *desc = desc_array[j]; - int hwgpio = gpio_chip_hwgpio(desc); + int hwgpio = gpiod_hwgpio(desc); int value = test_bit(hwgpio, bits); if (!raw && test_bit(GPIOD_FLAG_ACTIVE_LOW, &desc->flags)) @@ -3591,7 +3598,7 @@ EXPORT_SYMBOL_GPL(gpiod_get_array_value); */ static int gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) { - int ret = 0, offset = gpio_chip_hwgpio(desc); + int ret = 0, offset = gpiod_hwgpio(desc); CLASS(gpio_chip_guard, guard)(desc); if (!guard.gc) @@ -3620,7 +3627,7 @@ static int gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) */ static int gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) { - int ret = 0, offset = gpio_chip_hwgpio(desc); + int ret = 0, offset = gpiod_hwgpio(desc); CLASS(gpio_chip_guard, guard)(desc); if (!guard.gc) @@ -3652,7 +3659,7 @@ static int gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) return -ENODEV; trace_gpio_value(desc_to_gpio(desc), 0, value); - return gpiochip_set(guard.gc, gpio_chip_hwgpio(desc), value); + return gpiochip_set(guard.gc, gpiod_hwgpio(desc), value); } /* @@ -3775,7 +3782,7 @@ int gpiod_set_array_value_complex(bool raw, bool can_sleep, do { struct gpio_desc *desc = desc_array[i]; - int hwgpio = gpio_chip_hwgpio(desc); + int hwgpio = gpiod_hwgpio(desc); int value = test_bit(i, value_bitmap); if (unlikely(!test_bit(GPIOD_FLAG_IS_OUT, &desc->flags))) @@ -4035,7 +4042,7 @@ int gpiod_to_irq(const struct gpio_desc *desc) if (!gc) return -ENODEV; - offset = gpio_chip_hwgpio(desc); + offset = gpiod_hwgpio(desc); if (gc->to_irq) { ret = gc->to_irq(gc, offset); if (ret) @@ -4085,8 +4092,8 @@ int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) int dir = gpiod_get_direction(desc); if (dir < 0) { - chip_err(gc, "%s: cannot get GPIO direction\n", - __func__); + gpiochip_err(gc, "%s: cannot get GPIO direction\n", + __func__); return dir; } } @@ -4094,9 +4101,9 @@ int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) /* To be valid for IRQ the line needs to be input or open drain */ if (test_bit(GPIOD_FLAG_IS_OUT, &desc->flags) && !test_bit(GPIOD_FLAG_OPEN_DRAIN, &desc->flags)) { - chip_err(gc, - "%s: tried to flag a GPIO set as output for IRQ\n", - __func__); + gpiochip_err(gc, + "%s: tried to flag a GPIO set as output for IRQ\n", + __func__); return -EIO; } @@ -4173,7 +4180,7 @@ int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset) ret = gpiochip_lock_as_irq(gc, offset); if (ret) { - chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset); + gpiochip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset); module_put(gc->gpiodev->owner); return ret; } @@ -5015,7 +5022,7 @@ int gpiod_hog(struct gpio_desc *desc, const char *name, if (test_and_set_bit(GPIOD_FLAG_IS_HOGGED, &desc->flags)) return 0; - hwnum = gpio_chip_hwgpio(desc); + hwnum = gpiod_hwgpio(desc); local_desc = gpiochip_request_own_desc(guard.gc, hwnum, name, lflags, dflags); @@ -5096,7 +5103,7 @@ struct gpio_descs *__must_check gpiod_get_array(struct device *dev, * If pin hardware number of array member 0 is also 0, select * its chip as a candidate for fast bitmap processing path. */ - if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { + if (descs->ndescs == 0 && gpiod_hwgpio(desc) == 0) { struct gpio_descs *array; bitmap_size = BITS_TO_LONGS(gdev->ngpio > count ? @@ -5141,7 +5148,7 @@ struct gpio_descs *__must_check gpiod_get_array(struct device *dev, * Detect array members which belong to the 'fast' chip * but their pins are not in hardware order. */ - else if (gpio_chip_hwgpio(desc) != descs->ndescs) { + else if (gpiod_hwgpio(desc) != descs->ndescs) { /* * Don't use fast path if all array members processed so * far belong to the same chip as this one but its pin diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index abd870fb4a3b..77f6f2936dc2 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -275,49 +275,30 @@ int gpiochip_get_ngpios(struct gpio_chip *gc, struct device *dev); struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc, unsigned int hwnum); const char *gpiod_get_label(struct gpio_desc *desc); -/* - * Return the GPIO number of the passed descriptor relative to its chip - */ -static inline int gpio_chip_hwgpio(const struct gpio_desc *desc) -{ - return desc - &desc->gdev->descs[0]; -} - /* With descriptor prefix */ -#define gpiod_err(desc, fmt, ...) \ +#define __gpiod_pr(level, desc, fmt, ...) \ do { \ scoped_guard(srcu, &desc->gdev->desc_srcu) { \ - pr_err("gpio-%d (%s): " fmt, desc_to_gpio(desc), \ - gpiod_get_label(desc) ? : "?", ##__VA_ARGS__); \ + pr_##level("gpio-%d (%s): " fmt, desc_to_gpio(desc), \ + gpiod_get_label(desc) ?: "?", ##__VA_ARGS__); \ } \ } while (0) -#define gpiod_warn(desc, fmt, ...) \ -do { \ - scoped_guard(srcu, &desc->gdev->desc_srcu) { \ - pr_warn("gpio-%d (%s): " fmt, desc_to_gpio(desc), \ - gpiod_get_label(desc) ? : "?", ##__VA_ARGS__); \ - } \ -} while (0) +#define gpiod_err(desc, fmt, ...) __gpiod_pr(err, desc, fmt, ##__VA_ARGS__) +#define gpiod_warn(desc, fmt, ...) __gpiod_pr(warn, desc, fmt, ##__VA_ARGS__) +#define gpiod_dbg(desc, fmt, ...) __gpiod_pr(debug, desc, fmt, ##__VA_ARGS__) + +/* With chip prefix */ -#define gpiod_dbg(desc, fmt, ...) \ +#define __gpiochip_pr(level, gc, fmt, ...) \ do { \ - scoped_guard(srcu, &desc->gdev->desc_srcu) { \ - pr_debug("gpio-%d (%s): " fmt, desc_to_gpio(desc), \ - gpiod_get_label(desc) ? : "?", ##__VA_ARGS__); \ - } \ + dev_##level(&gc->gpiodev->dev, "(%s): " fmt, gc->label, ##__VA_ARGS__); \ } while (0) -/* With chip prefix */ - -#define chip_err(gc, fmt, ...) \ - dev_err(&gc->gpiodev->dev, "(%s): " fmt, gc->label, ##__VA_ARGS__) -#define chip_warn(gc, fmt, ...) \ - dev_warn(&gc->gpiodev->dev, "(%s): " fmt, gc->label, ##__VA_ARGS__) -#define chip_info(gc, fmt, ...) \ - dev_info(&gc->gpiodev->dev, "(%s): " fmt, gc->label, ##__VA_ARGS__) -#define chip_dbg(gc, fmt, ...) \ - dev_dbg(&gc->gpiodev->dev, "(%s): " fmt, gc->label, ##__VA_ARGS__) +#define gpiochip_err(gc, fmt, ...) __gpiochip_pr(err, gc, fmt, ##__VA_ARGS__) +#define gpiochip_warn(gc, fmt, ...) __gpiochip_pr(warn, gc, fmt, ##__VA_ARGS__) +#define gpiochip_info(gc, fmt, ...) __gpiochip_pr(info, gc, fmt, ##__VA_ARGS__) +#define gpiochip_dbg(gc, fmt, ...) __gpiochip_pr(dbg, gc, fmt, ##__VA_ARGS__) #endif /* GPIOLIB_H */ diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c index 12adfc3a0547..8724f8de67e2 100644 --- a/drivers/gpu/drm/xe/xe_exec_queue.c +++ b/drivers/gpu/drm/xe/xe_exec_queue.c @@ -394,9 +394,6 @@ void xe_exec_queue_destroy(struct kref *ref) if (q->ufence_syncobj) drm_syncobj_put(q->ufence_syncobj); - if (q->ufence_syncobj) - drm_syncobj_put(q->ufence_syncobj); - if (xe_exec_queue_uses_pxp(q)) xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q); diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig index 04420a713be0..920a64b66b25 100644 --- a/drivers/hid/Kconfig +++ b/drivers/hid/Kconfig @@ -383,6 +383,7 @@ config HID_EVISION help Support for some EVision keyboards. Note that this is needed only when applying customization using userspace programs. + Support for some EVision devices requiring report descriptor fixups. config HID_EZKEY tristate "Ezkey BTC 8193 keyboard" @@ -1318,6 +1319,8 @@ config HID_WINWING help Support for WinWing Orion2 throttle base with the following grips: + * TGRIP-15E + * TGRIP-15EX * TGRIP-16EX * TGRIP-18 diff --git a/drivers/hid/bpf/progs/Huion__Inspiroy-2-M.bpf.c b/drivers/hid/bpf/progs/Huion__Inspiroy-2-M.bpf.c new file mode 100644 index 000000000000..183d408d893a --- /dev/null +++ b/drivers/hid/bpf/progs/Huion__Inspiroy-2-M.bpf.c @@ -0,0 +1,563 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2024 Red Hat, Inc + */ + +#include "vmlinux.h" +#include "hid_bpf.h" +#include "hid_bpf_helpers.h" +#include "hid_report_helpers.h" +#include <bpf/bpf_tracing.h> + +#define VID_HUION 0x256C +#define PID_INSPIROY_2_M 0x0067 + +HID_BPF_CONFIG( + HID_DEVICE(BUS_USB, HID_GROUP_GENERIC, VID_HUION, PID_INSPIROY_2_M), +); + +/* Filled in by udev-hid-bpf */ +char UDEV_PROP_HUION_FIRMWARE_ID[64]; + +/* The prefix of the firmware ID we expect for this device. The full firmware + * string has a date suffix, e.g. HUION_T21j_221221 + */ +char EXPECTED_FIRMWARE_ID[] = "HUION_T21k_"; + +/* How this BPF program works: the tablet has two modes, firmware mode and + * tablet mode. In firmware mode (out of the box) the tablet sends button events + * and the dial as keyboard combinations. In tablet mode it uses a vendor specific + * hid report to report everything instead. + * Depending on the mode some hid reports are never sent and the corresponding + * devices are mute. + * + * To switch the tablet use e.g. https://github.com/whot/huion-switcher + * or one of the tools from the digimend project + * + * This BPF works for both modes. The huion-switcher tool sets the + * HUION_FIRMWARE_ID udev property - if that is set then we disable the firmware + * pad and pen reports (by making them vendor collections that are ignored). + * If that property is not set we fix all hidraw nodes so the tablet works in + * either mode though the drawback is that the device will show up twice if + * you bind it to all event nodes + * + * Default report descriptor for the first exposed hidraw node: + * + * # HUION Huion Tablet_H641P + * # Report descriptor length: 18 bytes + * # 0x06, 0x00, 0xff, // Usage Page (Vendor Defined Page 0xFF00) 0 + * # 0x09, 0x01, // Usage (Vendor Usage 0x01) 3 + * # 0xa1, 0x01, // Collection (Application) 5 + * # 0x85, 0x08, // Report ID (8) 7 + * # 0x75, 0x58, // Report Size (88) 9 + * # 0x95, 0x01, // Report Count (1) 11 + * # 0x09, 0x01, // Usage (Vendor Usage 0x01) 13 + * # 0x81, 0x02, // Input (Data,Var,Abs) 15 + * # 0xc0, // End Collection 17 + * R: 18 06 00 ff 09 01 a1 01 85 08 75 58 95 01 09 01 81 02 c0 + * + * This rdesc does nothing until the tablet is switched to raw mode, see + * https://github.com/whot/huion-switcher + * + * + * Second hidraw node is the Pen. This one sends events until the tablet is + * switched to raw mode, then it's mute. + * + * # Report descriptor length: 93 bytes + * # 0x05, 0x0d, // Usage Page (Digitizers) 0 + * # 0x09, 0x02, // Usage (Pen) 2 + * # 0xa1, 0x01, // Collection (Application) 4 + * # 0x85, 0x0a, // Report ID (10) 6 + * # 0x09, 0x20, // Usage (Stylus) 8 + * # 0xa1, 0x01, // Collection (Application) 10 + * # 0x09, 0x42, // Usage (Tip Switch) 12 + * # 0x09, 0x44, // Usage (Barrel Switch) 14 + * # 0x09, 0x45, // Usage (Eraser) 16 + * # 0x09, 0x3c, // Usage (Invert) 18 <-- has no Invert eraser + * # 0x15, 0x00, // Logical Minimum (0) 20 + * # 0x25, 0x01, // Logical Maximum (1) 22 + * # 0x75, 0x01, // Report Size (1) 24 + * # 0x95, 0x06, // Report Count (6) 26 + * # 0x81, 0x02, // Input (Data,Var,Abs) 28 + * # 0x09, 0x32, // Usage (In Range) 30 + * # 0x75, 0x01, // Report Size (1) 32 + * # 0x95, 0x01, // Report Count (1) 34 + * # 0x81, 0x02, // Input (Data,Var,Abs) 36 + * # 0x81, 0x03, // Input (Cnst,Var,Abs) 38 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 40 + * # 0x09, 0x30, // Usage (X) 42 + * # 0x09, 0x31, // Usage (Y) 44 + * # 0x55, 0x0d, // Unit Exponent (-3) 46 <-- change to -2 + * # 0x65, 0x33, // Unit (EnglishLinear: in³) 48 <-- change in³ to in + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 50 + * # 0x35, 0x00, // Physical Minimum (0) 53 + * # 0x46, 0x00, 0x08, // Physical Maximum (2048) 55 <-- invalid size + * # 0x75, 0x10, // Report Size (16) 58 + * # 0x95, 0x02, // Report Count (2) 60 + * # 0x81, 0x02, // Input (Data,Var,Abs) 62 + * # 0x05, 0x0d, // Usage Page (Digitizers) 64 + * # 0x09, 0x30, // Usage (Tip Pressure) 66 + * # 0x26, 0xff, 0x1f, // Logical Maximum (8191) 68 + * # 0x75, 0x10, // Report Size (16) 71 + * # 0x95, 0x01, // Report Count (1) 73 + * # 0x81, 0x02, // Input (Data,Var,Abs) 75 + * # 0x09, 0x3d, // Usage (X Tilt) 77 <-- No tilt reported + * # 0x09, 0x3e, // Usage (Y Tilt) 79 + * # 0x15, 0x81, // Logical Minimum (-127) 81 + * # 0x25, 0x7f, // Logical Maximum (127) 83 + * # 0x75, 0x08, // Report Size (8) 85 + * # 0x95, 0x02, // Report Count (2) 87 + * # 0x81, 0x02, // Input (Data,Var,Abs) 89 + * # 0xc0, // End Collection 91 + * # 0xc0, // End Collection 92 + * R: 93 05 0d 09 02 a1 01 85 0a 09 20 a1 01 09 42 09 44 09 45 09 3c 15 00 25 01 7501 95 06 81 02 09 32 75 01 95 01 81 02 81 03 05 01 09 30 09 31 55 0d 65 33 26 ff7f 35 00 46 00 08 75 10 95 02 81 02 05 0d 09 30 26 ff 1f 75 10 95 01 81 02 09 3d09 3e 15 81 25 7f 75 08 95 02 81 02 c0 c0 + * + * Third hidraw node is the pad which sends a combination of keyboard shortcuts until + * the tablet is switched to raw mode, then it's mute: + * + * # Report descriptor length: 65 bytes + * # 0x05, 0x01, // Usage Page (Generic Desktop) 0 + * # 0x09, 0x06, // Usage (Keyboard) 2 + * # 0xa1, 0x01, // Collection (Application) 4 + * # 0x85, 0x03, // Report ID (3) 6 + * # 0x05, 0x07, // Usage Page (Keyboard/Keypad) 8 + * # 0x19, 0xe0, // UsageMinimum (224) 10 + * # 0x29, 0xe7, // UsageMaximum (231) 12 + * # 0x15, 0x00, // Logical Minimum (0) 14 + * # 0x25, 0x01, // Logical Maximum (1) 16 + * # 0x75, 0x01, // Report Size (1) 18 + * # 0x95, 0x08, // Report Count (8) 20 + * # 0x81, 0x02, // Input (Data,Var,Abs) 22 + * # 0x05, 0x07, // Usage Page (Keyboard/Keypad) 24 + * # 0x19, 0x00, // UsageMinimum (0) 26 + * # 0x29, 0xff, // UsageMaximum (255) 28 + * # 0x26, 0xff, 0x00, // Logical Maximum (255) 30 + * # 0x75, 0x08, // Report Size (8) 33 + * # 0x95, 0x06, // Report Count (6) 35 + * # 0x81, 0x00, // Input (Data,Arr,Abs) 37 + * # 0xc0, // End Collection 39 + * # 0x05, 0x0c, // Usage Page (Consumer) 40 + * # 0x09, 0x01, // Usage (Consumer Control) 42 + * # 0xa1, 0x01, // Collection (Application) 44 + * # 0x85, 0x04, // Report ID (4) 46 + * # 0x19, 0x00, // UsageMinimum (0) 48 + * # 0x2a, 0x3c, 0x02, // UsageMaximum (572) 50 + * # 0x15, 0x00, // Logical Minimum (0) 53 + * # 0x26, 0x3c, 0x02, // Logical Maximum (572) 55 + * # 0x95, 0x01, // Report Count (1) 58 + * # 0x75, 0x10, // Report Size (16) 60 + * # 0x81, 0x00, // Input (Data,Arr,Abs) 62 + * # 0xc0, // End Collection 64 + * R: 65 05 01 09 06 a1 01 85 03 05 07 19 e0 29 e7 15 00 25 01 75 01 95 08 81 02 0507 19 00 29 ff 26 ff 00 75 08 95 06 81 00 c0 05 0c 09 01 a1 01 85 04 19 00 2a 3c02 15 00 26 3c 02 95 01 75 10 81 00 c0 + * N: HUION Huion Tablet_H641P + */ + +#define PAD_REPORT_DESCRIPTOR_LENGTH 133 +#define PEN_REPORT_DESCRIPTOR_LENGTH 93 +#define VENDOR_REPORT_DESCRIPTOR_LENGTH 36 +#define PAD_REPORT_ID 3 +#define PEN_REPORT_ID 10 +#define VENDOR_REPORT_ID 8 +#define PAD_REPORT_LENGTH 8 +#define PEN_REPORT_LENGTH 10 +#define VENDOR_REPORT_LENGTH 12 + + +__u16 last_button_state; + +static const __u8 fixed_rdesc_pad[] = { + UsagePage_GenericDesktop + Usage_GD_Keypad + CollectionApplication( + // -- Byte 0 in report + ReportId(PAD_REPORT_ID) + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + UsagePage_Digitizers + Usage_Dig_TabletFunctionKeys + CollectionPhysical( + // Byte 1 in report - just exists so we get to be a tablet pad + Usage_Dig_BarrelSwitch // BTN_STYLUS + ReportCount(1) + ReportSize(1) + Input(Var|Abs) + ReportCount(7) // padding + Input(Const) + // Bytes 2/3 in report - just exists so we get to be a tablet pad + UsagePage_GenericDesktop + Usage_GD_X + Usage_GD_Y + ReportCount(2) + ReportSize(8) + Input(Var|Abs) + // Byte 4 in report is the wheel + Usage_GD_Wheel + LogicalMinimum_i8(-1) + LogicalMaximum_i8(1) + ReportCount(1) + ReportSize(8) + Input(Var|Rel) + // Byte 5 is the button state + UsagePage_Button + UsageMinimum_i8(0x1) + UsageMaximum_i8(0x8) + LogicalMinimum_i8(0x1) + LogicalMaximum_i8(0x8) + ReportCount(1) + ReportSize(8) + Input(Arr|Abs) + ) + // Make sure we match our original report length + FixedSizeVendorReport(PAD_REPORT_LENGTH) + ) +}; + +static const __u8 fixed_rdesc_pen[] = { + UsagePage_Digitizers + Usage_Dig_Pen + CollectionApplication( + // -- Byte 0 in report + ReportId(PEN_REPORT_ID) + Usage_Dig_Pen + CollectionPhysical( + // -- Byte 1 in report + Usage_Dig_TipSwitch + Usage_Dig_BarrelSwitch + Usage_Dig_SecondaryBarrelSwitch // maps eraser to BTN_STYLUS2 + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + ReportSize(1) + ReportCount(3) + Input(Var|Abs) + ReportCount(4) // Padding + Input(Const) + Usage_Dig_InRange + ReportCount(1) + Input(Var|Abs) + ReportSize(16) + ReportCount(1) + PushPop( + UsagePage_GenericDesktop + Unit(cm) + UnitExponent(-1) + PhysicalMinimum_i16(0) + PhysicalMaximum_i16(160) + LogicalMinimum_i16(0) + LogicalMaximum_i16(32767) + Usage_GD_X + Input(Var|Abs) // Bytes 2+3 + PhysicalMinimum_i16(0) + PhysicalMaximum_i16(100) + LogicalMinimum_i16(0) + LogicalMaximum_i16(32767) + Usage_GD_Y + Input(Var|Abs) // Bytes 4+5 + ) + UsagePage_Digitizers + Usage_Dig_TipPressure + LogicalMinimum_i16(0) + LogicalMaximum_i16(8191) + Input(Var|Abs) // Byte 6+7 + // Two bytes padding so we don't need to change the report at all + ReportSize(8) + ReportCount(2) + Input(Const) // Byte 6+7 + ) + ) +}; + +static const __u8 fixed_rdesc_vendor[] = { + UsagePage_Digitizers + Usage_Dig_Pen + CollectionApplication( + // Byte 0 + // We leave the pen on the vendor report ID + ReportId(VENDOR_REPORT_ID) + Usage_Dig_Pen + CollectionPhysical( + // Byte 1 are the buttons + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + ReportSize(1) + Usage_Dig_TipSwitch + Usage_Dig_BarrelSwitch + Usage_Dig_SecondaryBarrelSwitch + ReportCount(3) + Input(Var|Abs) + ReportCount(4) // Padding + Input(Const) + Usage_Dig_InRange + ReportCount(1) + Input(Var|Abs) + ReportSize(16) + ReportCount(1) + PushPop( + UsagePage_GenericDesktop + Unit(cm) + UnitExponent(-1) + // Note: reported logical range differs + // from the pen report ID for x and y + LogicalMinimum_i16(0) + LogicalMaximum_i16(32000) + PhysicalMinimum_i16(0) + PhysicalMaximum_i16(160) + // Bytes 2/3 in report + Usage_GD_X + Input(Var|Abs) + LogicalMinimum_i16(0) + LogicalMaximum_i16(20000) + PhysicalMinimum_i16(0) + PhysicalMaximum_i16(100) + // Bytes 4/5 in report + Usage_GD_Y + Input(Var|Abs) + ) + // Bytes 6/7 in report + LogicalMinimum_i16(0) + LogicalMaximum_i16(8192) + Usage_Dig_TipPressure + Input(Var|Abs) + ) + ) + UsagePage_GenericDesktop + Usage_GD_Keypad + CollectionApplication( + // Byte 0 + ReportId(PAD_REPORT_ID) + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + UsagePage_Digitizers + Usage_Dig_TabletFunctionKeys + CollectionPhysical( + // Byte 1 are the buttons + Usage_Dig_BarrelSwitch // BTN_STYLUS, needed so we get to be a tablet pad + ReportCount(1) + ReportSize(1) + Input(Var|Abs) + ReportCount(7) // Padding + Input(Const) + // Bytes 2/3 - x/y just exist so we get to be a tablet pad + UsagePage_GenericDesktop + Usage_GD_X + Usage_GD_Y + ReportCount(2) + ReportSize(8) + Input(Var|Abs) + // Bytes 4 and 5 are the button state + UsagePage_Button + UsageMinimum_i8(0x1) + UsageMaximum_i8(0xa) + LogicalMinimum_i8(0x0) + LogicalMaximum_i8(0x1) + ReportCount(10) + ReportSize(1) + Input(Var|Abs) + Usage_i8(0x31) // maps to BTN_SOUTH + ReportCount(1) + Input(Var|Abs) + ReportCount(5) + Input(Const) + // Byte 6 is the wheel + UsagePage_GenericDesktop + Usage_GD_Wheel + LogicalMinimum_i8(-1) + LogicalMaximum_i8(1) + ReportCount(1) + ReportSize(8) + Input(Var|Rel) + ) + // Make sure we match our original report length + FixedSizeVendorReport(VENDOR_REPORT_LENGTH) + ) +}; + +static const __u8 disabled_rdesc_pen[] = { + FixedSizeVendorReport(PEN_REPORT_LENGTH) +}; + +static const __u8 disabled_rdesc_pad[] = { + FixedSizeVendorReport(PAD_REPORT_LENGTH) +}; + +SEC(HID_BPF_RDESC_FIXUP) +int BPF_PROG(hid_fix_rdesc, struct hid_bpf_ctx *hctx) +{ + __u8 *data = hid_bpf_get_data(hctx, 0 /* offset */, HID_MAX_DESCRIPTOR_SIZE /* size */); + __s32 rdesc_size = hctx->size; + __u8 have_fw_id; + + if (!data) + return 0; /* EPERM check */ + + /* If we have a firmware ID and it matches our expected prefix, we + * disable the default pad/pen nodes. They won't send events + * but cause duplicate devices. + */ + have_fw_id = __builtin_memcmp(UDEV_PROP_HUION_FIRMWARE_ID, + EXPECTED_FIRMWARE_ID, + sizeof(EXPECTED_FIRMWARE_ID) - 1) == 0; + if (rdesc_size == PAD_REPORT_DESCRIPTOR_LENGTH) { + if (have_fw_id) { + __builtin_memcpy(data, disabled_rdesc_pad, sizeof(disabled_rdesc_pad)); + return sizeof(disabled_rdesc_pad); + } + + __builtin_memcpy(data, fixed_rdesc_pad, sizeof(fixed_rdesc_pad)); + return sizeof(fixed_rdesc_pad); + } + if (rdesc_size == PEN_REPORT_DESCRIPTOR_LENGTH) { + if (have_fw_id) { + __builtin_memcpy(data, disabled_rdesc_pen, sizeof(disabled_rdesc_pen)); + return sizeof(disabled_rdesc_pen); + } + + __builtin_memcpy(data, fixed_rdesc_pen, sizeof(fixed_rdesc_pen)); + return sizeof(fixed_rdesc_pen); + } + /* Always fix the vendor mode so the tablet will work even if nothing sets + * the udev property (e.g. huion-switcher run manually) + */ + if (rdesc_size == VENDOR_REPORT_DESCRIPTOR_LENGTH) { + __builtin_memcpy(data, fixed_rdesc_vendor, sizeof(fixed_rdesc_vendor)); + return sizeof(fixed_rdesc_vendor); + } + return 0; +} + +SEC(HID_BPF_DEVICE_EVENT) +int BPF_PROG(inspiroy_2_fix_events, struct hid_bpf_ctx *hctx) +{ + __u8 *data = hid_bpf_get_data(hctx, 0 /* offset */, 10 /* size */); + + if (!data) + return 0; /* EPERM check */ + + /* Only sent if tablet is in default mode */ + if (data[0] == PAD_REPORT_ID) { + /* Nicely enough, this device only supports one button down at a time so + * the reports are easy to match. Buttons numbered from the top + * Button released: 03 00 00 00 00 00 00 00 + * Button 1: 03 00 05 00 00 00 00 00 -> b + * Button 2: 03 07 11 00 00 00 00 00 -> Ctrl Shift N + * Button 3: 03 00 08 00 00 00 00 00 -> e + * Button 4: 03 00 0c 00 00 00 00 00 -> i + * Button 5: 03 00 2c 00 00 00 00 00 -> space + * Button 6: 03 01 08 00 00 00 00 00 -> Ctrl E + * Button 7: 03 01 16 00 00 00 00 00 -> Ctrl S + * Button 8: 03 05 1d 00 00 00 00 00 -> Ctrl Alt Z + * + * Wheel down: 03 01 2d 00 00 00 00 00 -> Ctrl - + * Wheel up: 03 01 2e 00 00 00 00 00 -> Ctrl = + */ + __u8 button = 0; + __u8 wheel = 0; + + switch (data[1] << 8 | data[2]) { + case 0x0000: + break; + case 0x0005: + button = 1; + break; + case 0x0711: + button = 2; + break; + case 0x0008: + button = 3; + break; + case 0x000c: + button = 4; + break; + case 0x002c: + button = 5; + break; + case 0x0108: + button = 6; + break; + case 0x0116: + button = 7; + break; + case 0x051d: + button = 8; + break; + case 0x012d: + wheel = -1; + break; + case 0x012e: + wheel = 1; + break; + } + + __u8 report[6] = {PAD_REPORT_ID, 0x0, 0x0, 0x0, wheel, button}; + + __builtin_memcpy(data, report, sizeof(report)); + return sizeof(report); + } + + /* Nothing to do for the PEN_REPORT_ID, it's already mapped */ + + /* Only sent if tablet is in raw mode */ + if (data[0] == VENDOR_REPORT_ID) { + /* Pad reports */ + if (data[1] & 0x20) { + /* See fixed_rdesc_pad */ + struct pad_report { + __u8 report_id; + __u8 btn_stylus; + __u8 x; + __u8 y; + __u16 buttons; + __u8 wheel; + } __attribute__((packed)) *pad_report; + __u8 wheel = 0; + + /* Wheel report */ + if (data[1] == 0xf1) { + if (data[5] == 2) + wheel = 0xff; + else + wheel = data[5]; + } else { + /* data[4] and data[5] are the buttons, mapped correctly */ + last_button_state = data[4] | (data[5] << 8); + wheel = 0; // wheel + } + + pad_report = (struct pad_report *)data; + + pad_report->report_id = PAD_REPORT_ID; + pad_report->btn_stylus = 0; + pad_report->x = 0; + pad_report->y = 0; + pad_report->buttons = last_button_state; + pad_report->wheel = wheel; + + return sizeof(struct pad_report); + } + + /* Pen reports need nothing done */ + } + + return 0; +} + +HID_BPF_OPS(inspiroy_2) = { + .hid_device_event = (void *)inspiroy_2_fix_events, + .hid_rdesc_fixup = (void *)hid_fix_rdesc, +}; + +SEC("syscall") +int probe(struct hid_bpf_probe_args *ctx) +{ + switch (ctx->rdesc_size) { + case PAD_REPORT_DESCRIPTOR_LENGTH: + case PEN_REPORT_DESCRIPTOR_LENGTH: + case VENDOR_REPORT_DESCRIPTOR_LENGTH: + ctx->retval = 0; + break; + default: + ctx->retval = -EINVAL; + } + + return 0; +} + +char _license[] SEC("license") = "GPL"; diff --git a/drivers/hid/bpf/progs/Huion__Inspiroy-2-S.bpf.c b/drivers/hid/bpf/progs/Huion__Inspiroy-2-S.bpf.c index 13f64fb49800..79453362bf97 100644 --- a/drivers/hid/bpf/progs/Huion__Inspiroy-2-S.bpf.c +++ b/drivers/hid/bpf/progs/Huion__Inspiroy-2-S.bpf.c @@ -163,6 +163,9 @@ char EXPECTED_FIRMWARE_ID[] = "HUION_T21j_"; __u8 last_button_state; +__u8 last_tip_state; +__u8 last_sec_barrel_state; +__u8 force_tip_down_count; static const __u8 fixed_rdesc_pad[] = { UsagePage_GenericDesktop @@ -522,9 +525,31 @@ int BPF_PROG(inspiroy_2_fix_events, struct hid_bpf_ctx *hctx) pad_report->wheel = wheel; return sizeof(struct pad_report); - } + } else if (data[1] & 0x80) { /* Pen reports with InRange 1 */ + __u8 tip_state = data[1] & 0x1; + __u8 sec_barrel_state = data[1] & 0x4; + + if (force_tip_down_count > 0) { + data[1] |= 0x1; + --force_tip_down_count; + if (tip_state) + force_tip_down_count = 0; + } - /* Pen reports need nothing done */ + /* Tip was down and we just pressed or released the + * secondary barrel switch (the physical eraser + * button). The device will send up to 4 + * reports with Tip Switch 0 and sometimes + * this report has Tip Switch 0. + */ + if (last_tip_state && + last_sec_barrel_state != sec_barrel_state) { + force_tip_down_count = 4; + data[1] |= 0x1; + } + last_tip_state = tip_state; + last_sec_barrel_state = sec_barrel_state; + } } return 0; diff --git a/drivers/hid/bpf/progs/Huion__Kamvas-Pro-19.bpf.c b/drivers/hid/bpf/progs/Huion__Kamvas-Pro-19.bpf.c index 489cb4fcc2cd..5f43e4071848 100644 --- a/drivers/hid/bpf/progs/Huion__Kamvas-Pro-19.bpf.c +++ b/drivers/hid/bpf/progs/Huion__Kamvas-Pro-19.bpf.c @@ -9,12 +9,15 @@ #define VID_HUION 0x256C #define PID_KAMVAS_PRO_19 0x006B +#define PID_KAMVAS_PRO_27 0x006c #define NAME_KAMVAS_PRO_19 "HUION Huion Tablet_GT1902" +#define NAME_KAMVAS_PRO_27 "HUION Huion Tablet_GT2701" #define TEST_PREFIX "uhid test " HID_BPF_CONFIG( HID_DEVICE(BUS_USB, HID_GROUP_MULTITOUCH_WIN_8, VID_HUION, PID_KAMVAS_PRO_19), + HID_DEVICE(BUS_USB, HID_GROUP_MULTITOUCH_WIN_8, VID_HUION, PID_KAMVAS_PRO_27), ); bool prev_was_out_of_range; @@ -351,7 +354,8 @@ int probe(struct hid_bpf_probe_args *ctx) if (!__builtin_memcmp(name, TEST_PREFIX, sizeof(TEST_PREFIX) - 1)) name += sizeof(TEST_PREFIX) - 1; - if (__builtin_memcmp(name, NAME_KAMVAS_PRO_19, sizeof(NAME_KAMVAS_PRO_19))) + if (__builtin_memcmp(name, NAME_KAMVAS_PRO_19, sizeof(NAME_KAMVAS_PRO_19)) && + __builtin_memcmp(name, NAME_KAMVAS_PRO_27, sizeof(NAME_KAMVAS_PRO_27))) ctx->retval = -EINVAL; hid_bpf_release_context(hctx); diff --git a/drivers/hid/bpf/progs/Huion__Kamvas13Gen3.bpf.c b/drivers/hid/bpf/progs/Huion__Kamvas13Gen3.bpf.c new file mode 100644 index 000000000000..b63f9a48ea45 --- /dev/null +++ b/drivers/hid/bpf/progs/Huion__Kamvas13Gen3.bpf.c @@ -0,0 +1,1395 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2025 Nicholas LaPointe + */ + +#include "vmlinux.h" +#include "hid_bpf.h" +#include "hid_bpf_helpers.h" +#include "hid_report_helpers.h" +#include <bpf/bpf_tracing.h> + +#define VID_HUION 0x256c +#define PID_KAMVAS13_GEN3 0x2008 + +#define VENDOR_DESCRIPTOR_LENGTH 36 +#define TABLET_DESCRIPTOR_LENGTH 368 +#define WHEEL_DESCRIPTOR_LENGTH 108 + +#define VENDOR_REPORT_ID 8 +#define VENDOR_REPORT_LENGTH 14 + +#define VENDOR_REPORT_SUBTYPE_PEN 0x08 +#define VENDOR_REPORT_SUBTYPE_PEN_OUT 0x00 +#define VENDOR_REPORT_SUBTYPE_BUTTONS 0x0e +#define VENDOR_REPORT_SUBTYPE_WHEELS 0x0f + +/* For the reports that we create ourselves */ +#define CUSTOM_PAD_REPORT_ID 9 + +HID_BPF_CONFIG( + HID_DEVICE(BUS_USB, HID_GROUP_ANY, VID_HUION, PID_KAMVAS13_GEN3), +); + + +/* + * This tablet can send reports using one of two different data formats, + * depending on what "mode" the tablet is in. + * + * By default, the tablet will send reports that can be decoded using its + * included HID descriptors (descriptors 1 and 2, shown below). + * This mode will be called "firmware mode" throughout this file. + * + * The HID descriptor that describes pen events in firmware mode (descriptor 1) + * has multiple bugs: + * * "Secondary Tip Switch" instead of "Secondary Barrel Switch" + * * "Invert" instead of (or potentially shared with) third barrel button + * * Specified tablet area of 2048 in³ instead of 293.8 x 165.2mm + * * Specified tilt range of -90 to +90 instead of -60 to +60 + * + * While these can be easily patched up by editing the descriptor, a larger + * problem with the firmware mode exists: it is impossible to tell which of the + * two wheels are being rotated (or having their central button pressed). + * + * + * By using a tool such as huion-switcher (https://github.com/whot/huion-switcher), + * the tablet can be made to send reports using a proprietary format that is not + * adequately described by its relevant descriptor (descriptor 0, shown below). + * This mode will be called "vendor mode" throughout this file. + * + * The reports sent while in vendor mode allow for proper decoding of the wheels. + * + * For simplicity and maximum functionality, this BPF focuses strictly on + * enabling one to make use of the vendor mode. + */ + +/* + * DESCRIPTORS + * DESCRIPTOR 0 + * # 0x06, 0x00, 0xff, // Usage Page (Vendor Defined Page FF00) 0 + * # 0x09, 0x01, // Usage (Vendor Usage 0x01) 3 + * # 0xa1, 0x01, // Collection (Application) 5 + * # â”… 0x85, 0x08, // Report ID (8) 7 + * # 0x75, 0x68, // Report Size (104) 9 + * # 0x95, 0x01, // Report Count (1) 11 + * # 0x09, 0x01, // Usage (Vendor Usage 0x01) 13 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 15 + * # 0xc0, // End Collection 17 + * # 0x06, 0x00, 0xff, // Usage Page (Vendor Defined Page FF00) 18 + * # 0x09, 0x01, // Usage (Vendor Usage 0x01) 21 + * # 0xa1, 0x01, // Collection (Application) 23 + * # â”… 0x85, 0x16, // Report ID (22) 25 + * # 0x75, 0x08, // Report Size (8) 27 + * # 0x95, 0x07, // Report Count (7) 29 + * # 0x09, 0x01, // Usage (Vendor Usage 0x01) 31 + * # â•‘ 0xb1, 0x02, // Feature (Data,Var,Abs) 33 + * # 0xc0, // End Collection 35 + * R: 36 06 00 ff 09 01 a1 01 85 08 75 68 95 01 09 01 81 02 c0 06 00 ff 09 01 a1 01 85 16 75 08 95 07 09 01 b1 02 c0 + * N: HUION Huion Tablet_GS1333 + * I: 3 256c 2008 + * + * DESCRIPTOR 1 + * # 0x05, 0x0d, // Usage Page (Digitizers) 0 + * # 0x09, 0x02, // Usage (Pen) 2 + * # 0xa1, 0x01, // Collection (Application) 4 + * # â”… 0x85, 0x0a, // Report ID (10) 6 + * # 0x09, 0x20, // Usage (Stylus) 8 + * # 0xa1, 0x01, // Collection (Application) 10 + * # 0x09, 0x42, // Usage (Tip Switch) 12 + * # 0x09, 0x44, // Usage (Barrel Switch) 14 + * # 0x09, 0x43, // Usage (Secondary Tip Switch) 16 + * # 0x09, 0x3c, // Usage (Invert) 18 + * # 0x09, 0x45, // Usage (Eraser) 20 + * # 0x15, 0x00, // Logical Minimum (0) 22 + * # 0x25, 0x01, // Logical Maximum (1) 24 + * # 0x75, 0x01, // Report Size (1) 26 + * # 0x95, 0x06, // Report Count (6) 28 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 30 + * # 0x09, 0x32, // Usage (In Range) 32 + * # 0x75, 0x01, // Report Size (1) 34 + * # 0x95, 0x01, // Report Count (1) 36 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 38 + * # ┇ 0x81, 0x03, // Input (Cnst,Var,Abs) 40 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 42 + * # 0x09, 0x30, // Usage (X) 44 + * # 0x09, 0x31, // Usage (Y) 46 + * # 0x55, 0x0d, // Unit Exponent (-3) 48 + * # 0x65, 0x33, // Unit (EnglishLinear: in³) 50 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 52 + * # 0x35, 0x00, // Physical Minimum (0) 55 + * # 0x46, 0x00, 0x08, // Physical Maximum (2048) 57 + * # 0x75, 0x10, // Report Size (16) 60 + * # 0x95, 0x02, // Report Count (2) 62 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 64 + * # 0x05, 0x0d, // Usage Page (Digitizers) 66 + * # 0x09, 0x30, // Usage (Tip Pressure) 68 + * # 0x26, 0xff, 0x3f, // Logical Maximum (16383) 70 + * # 0x75, 0x10, // Report Size (16) 73 + * # 0x95, 0x01, // Report Count (1) 75 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 77 + * # 0x09, 0x3d, // Usage (X Tilt) 79 + * # 0x09, 0x3e, // Usage (Y Tilt) 81 + * # 0x15, 0xa6, // Logical Minimum (-90) 83 + * # 0x25, 0x5a, // Logical Maximum (90) 85 + * # 0x75, 0x08, // Report Size (8) 87 + * # 0x95, 0x02, // Report Count (2) 89 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 91 + * # 0xc0, // End Collection 93 + * # 0xc0, // End Collection 94 + * # 0x05, 0x0d, // Usage Page (Digitizers) 95 + * # 0x09, 0x04, // Usage (Touch Screen) 97 + * # 0xa1, 0x01, // Collection (Application) 99 + * # â”… 0x85, 0x04, // Report ID (4) 101 + * # 0x09, 0x22, // Usage (Finger) 103 + * # 0xa1, 0x02, // Collection (Logical) 105 + * # 0x05, 0x0d, // Usage Page (Digitizers) 107 + * # 0x95, 0x01, // Report Count (1) 109 + * # 0x75, 0x06, // Report Size (6) 111 + * # 0x09, 0x51, // Usage (Contact Identifier) 113 + * # 0x15, 0x00, // Logical Minimum (0) 115 + * # 0x25, 0x3f, // Logical Maximum (63) 117 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 119 + * # 0x09, 0x42, // Usage (Tip Switch) 121 + * # 0x25, 0x01, // Logical Maximum (1) 123 + * # 0x75, 0x01, // Report Size (1) 125 + * # 0x95, 0x01, // Report Count (1) 127 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 129 + * # 0x75, 0x01, // Report Size (1) 131 + * # 0x95, 0x01, // Report Count (1) 133 + * # ┇ 0x81, 0x03, // Input (Cnst,Var,Abs) 135 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 137 + * # 0x75, 0x10, // Report Size (16) 139 + * # 0x55, 0x0e, // Unit Exponent (-2) 141 + * # 0x65, 0x11, // Unit (SILinear: cm) 143 + * # 0x09, 0x30, // Usage (X) 145 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 147 + * # 0x35, 0x00, // Physical Minimum (0) 150 + * # 0x46, 0x15, 0x0c, // Physical Maximum (3093) 152 + * # ┇ 0x81, 0x42, // Input (Data,Var,Abs,Null) 155 + * # 0x09, 0x31, // Usage (Y) 157 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 159 + * # 0x46, 0xcb, 0x06, // Physical Maximum (1739) 162 + * # ┇ 0x81, 0x42, // Input (Data,Var,Abs,Null) 165 + * # 0x05, 0x0d, // Usage Page (Digitizers) 167 + * # 0x09, 0x30, // Usage (Tip Pressure) 169 + * # 0x26, 0xff, 0x1f, // Logical Maximum (8191) 171 + * # 0x75, 0x10, // Report Size (16) 174 + * # 0x95, 0x01, // Report Count (1) 176 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 178 + * # 0xc0, // End Collection 180 + * # 0x05, 0x0d, // Usage Page (Digitizers) 181 + * # 0x09, 0x22, // Usage (Finger) 183 + * # 0xa1, 0x02, // Collection (Logical) 185 + * # 0x05, 0x0d, // Usage Page (Digitizers) 187 + * # 0x95, 0x01, // Report Count (1) 189 + * # 0x75, 0x06, // Report Size (6) 191 + * # 0x09, 0x51, // Usage (Contact Identifier) 193 + * # 0x15, 0x00, // Logical Minimum (0) 195 + * # 0x25, 0x3f, // Logical Maximum (63) 197 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 199 + * # 0x09, 0x42, // Usage (Tip Switch) 201 + * # 0x25, 0x01, // Logical Maximum (1) 203 + * # 0x75, 0x01, // Report Size (1) 205 + * # 0x95, 0x01, // Report Count (1) 207 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 209 + * # 0x75, 0x01, // Report Size (1) 211 + * # 0x95, 0x01, // Report Count (1) 213 + * # ┇ 0x81, 0x03, // Input (Cnst,Var,Abs) 215 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 217 + * # 0x75, 0x10, // Report Size (16) 219 + * # 0x55, 0x0e, // Unit Exponent (-2) 221 + * # 0x65, 0x11, // Unit (SILinear: cm) 223 + * # 0x09, 0x30, // Usage (X) 225 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 227 + * # 0x35, 0x00, // Physical Minimum (0) 230 + * # 0x46, 0x15, 0x0c, // Physical Maximum (3093) 232 + * # ┇ 0x81, 0x42, // Input (Data,Var,Abs,Null) 235 + * # 0x09, 0x31, // Usage (Y) 237 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 239 + * # 0x46, 0xcb, 0x06, // Physical Maximum (1739) 242 + * # ┇ 0x81, 0x42, // Input (Data,Var,Abs,Null) 245 + * # 0x05, 0x0d, // Usage Page (Digitizers) 247 + * # 0x09, 0x30, // Usage (Tip Pressure) 249 + * # 0x26, 0xff, 0x1f, // Logical Maximum (8191) 251 + * # 0x75, 0x10, // Report Size (16) 254 + * # 0x95, 0x01, // Report Count (1) 256 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 258 + * # 0xc0, // End Collection 260 + * # 0x05, 0x0d, // Usage Page (Digitizers) 261 + * # 0x09, 0x56, // Usage (Scan Time) 263 + * # 0x55, 0x00, // Unit Exponent (0) 265 + * # 0x65, 0x00, // Unit (None) 267 + * # 0x27, 0xff, 0xff, 0xff, 0x7f, // Logical Maximum (2147483647) 269 + * # 0x95, 0x01, // Report Count (1) 274 + * # 0x75, 0x20, // Report Size (32) 276 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 278 + * # 0x09, 0x54, // Usage (Contact Count) 280 + * # 0x25, 0x7f, // Logical Maximum (127) 282 + * # 0x95, 0x01, // Report Count (1) 284 + * # 0x75, 0x08, // Report Size (8) 286 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 288 + * # 0x75, 0x08, // Report Size (8) 290 + * # 0x95, 0x08, // Report Count (8) 292 + * # ┇ 0x81, 0x03, // Input (Cnst,Var,Abs) 294 + * # â”… 0x85, 0x05, // Report ID (5) 296 + * # 0x09, 0x55, // Usage (Contact Count Maximum) 298 + * # 0x25, 0x0a, // Logical Maximum (10) 300 + * # 0x75, 0x08, // Report Size (8) 302 + * # 0x95, 0x01, // Report Count (1) 304 + * # â•‘ 0xb1, 0x02, // Feature (Data,Var,Abs) 306 + * # 0x06, 0x00, 0xff, // Usage Page (Vendor Defined Page FF00) 308 + * # 0x09, 0xc5, // Usage (Vendor Usage 0xc5) 311 + * # â”… 0x85, 0x06, // Report ID (6) 313 + * # 0x15, 0x00, // Logical Minimum (0) 315 + * # 0x26, 0xff, 0x00, // Logical Maximum (255) 317 + * # 0x75, 0x08, // Report Size (8) 320 + * # 0x96, 0x00, 0x01, // Report Count (256) 322 + * # â•‘ 0xb1, 0x02, // Feature (Data,Var,Abs) 325 + * # 0xc0, // End Collection 327 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 328 + * # 0x09, 0x06, // Usage (Keyboard) 330 + * # 0xa1, 0x01, // Collection (Application) 332 + * # â”… 0x85, 0x03, // Report ID (3) 334 + * # 0x05, 0x07, // Usage Page (Keyboard/Keypad) 336 + * # 0x19, 0xe0, // UsageMinimum (224) 338 + * # 0x29, 0xe7, // UsageMaximum (231) 340 + * # 0x15, 0x00, // Logical Minimum (0) 342 + * # 0x25, 0x01, // Logical Maximum (1) 344 + * # 0x75, 0x01, // Report Size (1) 346 + * # 0x95, 0x08, // Report Count (8) 348 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 350 + * # 0x05, 0x07, // Usage Page (Keyboard/Keypad) 352 + * # 0x19, 0x00, // UsageMinimum (0) 354 + * # 0x29, 0xff, // UsageMaximum (255) 356 + * # 0x26, 0xff, 0x00, // Logical Maximum (255) 358 + * # 0x75, 0x08, // Report Size (8) 361 + * # 0x95, 0x06, // Report Count (6) 363 + * # ┇ 0x81, 0x00, // Input (Data,Arr,Abs) 365 + * # 0xc0, // End Collection 367 + * R: 368 05 0d 09 02 a1 01 85 0a 09 20 a1 01 09 42 09 44 09 43 09 3c 09 45 15 00 25 01 75 01 95 06 81 02 09 32 75 01 95 01 81 02 81 03 05 01 09 30 09 31 55 0d 65 33 26 ff 7f 35 00 46 00 08 75 10 95 02 81 02 05 0d 09 30 26 ff 3f 75 10 95 01 81 02 09 3d 09 3e 15 a6 25 5a 75 08 95 02 81 02 c0 c0 05 0d 09 04 a1 01 85 04 09 22 a1 02 05 0d 95 01 75 06 09 51 15 00 25 3f 81 02 09 42 25 01 75 01 95 01 81 02 75 01 95 01 81 03 05 01 75 10 55 0e 65 11 09 30 26 ff 7f 35 00 46 15 0c 81 42 09 31 26 ff 7f 46 cb 06 81 42 05 0d 09 30 26 ff 1f 75 10 95 01 81 02 c0 05 0d 09 22 a1 02 05 0d 95 01 75 06 09 51 15 00 25 3f 81 02 09 42 25 01 75 01 95 01 81 02 75 01 95 01 81 03 05 01 75 10 55 0e 65 11 09 30 26 ff 7f 35 00 46 15 0c 81 42 09 31 26 ff 7f 46 cb 06 81 42 05 0d 09 30 26 ff 1f 75 10 95 01 81 02 c0 05 0d 09 56 55 00 65 00 27 ff ff ff 7f 95 01 75 20 81 02 09 54 25 7f 95 01 75 08 81 02 75 08 95 08 81 03 85 05 09 55 25 0a 75 08 95 01 b1 02 06 00 ff 09 c5 85 06 15 00 26 ff 00 75 08 96 00 01 b1 02 c0 05 01 09 06 a1 01 85 03 05 07 19 e0 29 e7 15 00 25 01 75 01 95 08 81 02 05 07 19 00 29 ff 26 ff 00 75 08 95 06 81 00 c0 + * N: HUION Huion Tablet_GS1333 + * I: 3 256c 2008 + * + * DESCRIPTOR 2 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 0 + * # 0x09, 0x0e, // Usage (System Multi-Axis Controller) 2 + * # 0xa1, 0x01, // Collection (Application) 4 + * # â”… 0x85, 0x11, // Report ID (17) 6 + * # 0x05, 0x0d, // Usage Page (Digitizers) 8 + * # 0x09, 0x21, // Usage (Puck) 10 + * # 0xa1, 0x02, // Collection (Logical) 12 + * # 0x15, 0x00, // Logical Minimum (0) 14 + * # 0x25, 0x01, // Logical Maximum (1) 16 + * # 0x75, 0x01, // Report Size (1) 18 + * # 0x95, 0x01, // Report Count (1) 20 + * # 0xa1, 0x00, // Collection (Physical) 22 + * # 0x05, 0x09, // Usage Page (Button) 24 + * # 0x09, 0x01, // Usage (Button 1) 26 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 28 + * # 0x05, 0x0d, // Usage Page (Digitizers) 30 + * # 0x09, 0x33, // Usage (Touch) 32 + * # ┇ 0x81, 0x02, // Input (Data,Var,Abs) 34 + * # 0x95, 0x06, // Report Count (6) 36 + * # ┇ 0x81, 0x03, // Input (Cnst,Var,Abs) 38 + * # 0xa1, 0x02, // Collection (Logical) 40 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 42 + * # 0x09, 0x37, // Usage (Dial) 44 + * # 0x16, 0x00, 0x80, // Logical Minimum (-32768) 46 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 49 + * # 0x75, 0x10, // Report Size (16) 52 + * # 0x95, 0x01, // Report Count (1) 54 + * # ┇ 0x81, 0x06, // Input (Data,Var,Rel) 56 + * # 0x35, 0x00, // Physical Minimum (0) 58 + * # 0x46, 0x10, 0x0e, // Physical Maximum (3600) 60 + * # 0x15, 0x00, // Logical Minimum (0) 63 + * # 0x26, 0x10, 0x0e, // Logical Maximum (3600) 65 + * # 0x09, 0x48, // Usage (Resolution Multiplier) 68 + * # â•‘ 0xb1, 0x02, // Feature (Data,Var,Abs) 70 + * # 0x45, 0x00, // Physical Maximum (0) 72 + * # 0xc0, // End Collection 74 + * # 0x75, 0x08, // Report Size (8) 75 + * # 0x95, 0x01, // Report Count (1) 77 + * # ┇ 0x81, 0x01, // Input (Cnst,Arr,Abs) 79 + * # 0x75, 0x08, // Report Size (8) 81 + * # 0x95, 0x01, // Report Count (1) 83 + * # ┇ 0x81, 0x01, // Input (Cnst,Arr,Abs) 85 + * # 0x75, 0x08, // Report Size (8) 87 + * # 0x95, 0x01, // Report Count (1) 89 + * # ┇ 0x81, 0x01, // Input (Cnst,Arr,Abs) 91 + * # 0x75, 0x08, // Report Size (8) 93 + * # 0x95, 0x01, // Report Count (1) 95 + * # ┇ 0x81, 0x01, // Input (Cnst,Arr,Abs) 97 + * # 0x75, 0x08, // Report Size (8) 99 + * # 0x95, 0x01, // Report Count (1) 101 + * # ┇ 0x81, 0x01, // Input (Cnst,Arr,Abs) 103 + * # 0xc0, // End Collection 105 + * # 0xc0, // End Collection 106 + * # 0xc0, // End Collection 107 + * R: 108 05 01 09 0e a1 01 85 11 05 0d 09 21 a1 02 15 00 25 01 75 01 95 01 a1 00 05 09 09 01 81 02 05 0d 09 33 81 02 95 06 81 03 a1 02 05 01 09 37 16 00 80 26 ff 7f 75 10 95 01 81 06 35 00 46 10 0e 15 00 26 10 0e 09 48 b1 02 45 00 c0 75 08 95 01 81 01 75 08 95 01 81 01 75 08 95 01 81 01 75 08 95 01 81 01 75 08 95 01 81 01 c0 c0 c0 + * N: HUION Huion Tablet_GS1333 + * I: 3 256c 2008 + * + * + * + * + * + * + * + * + * VENDOR MODE + * HUION_FIRMWARE_ID="HUION_M22c_240606" + * HUION_MAGIC_BYTES="140388e500108100ff3fd8130307008008004010" + * + * MAGIC BYTES + * [LogicalMaximum, X] [LogicalMaximum, Y] [LogicalMaximum, Pressure] [ LPI] + * 14 03 [ 88 e5] 00 [ 10 81] 00 [ ff 3f] [d8 13] 03 07 00 80 08 00 40 10 + * + * + * HIDRAW 0 + * DESCRIPTIONS + * report_subtype = (data[1] >> 4) & 0x0f + * + * REPORT SUBTYPES + * 0x0e Buttons + * (data[4] & 0x01) button 1 + * (data[4] & 0x02) button 2 + * (data[4] & 0x04) button 3 + * (data[4] & 0x08) button 4 + * (data[4] & 0x10) button 5 + * (data[4] & 0x20) button 6 (top wheel button) + * (data[4] & 0x40) button 7 (bottom wheel button) + * + * All tablet buttons release with the same report: + * 08 e0 01 01 00 00 00 00 00 00 00 00 00 00 + * + * Despite data[4] looking like a bit field, only one button + * can be unambiguously tracked at a time. + * (See NOTES ON SIMULTANEOUS BUTTON HOLDS at the end of this + * comment for examples of the confusion this can create.) + * + * All buttons, with the exceptions of 6 and 7, will repeatedly + * report a press event approximately every 225ms while held. + * + * 0x0f Wheels + * data[3] == 1: top wheel + * data[3] == 2: bottom wheel + * data[5] == 1: clockwise + * data[5] == 2: counter-clockwise + * + * 0x08/0x00 Pen + * report_subtype == 0x08: in-range + * report_subtype == 0x00: out-of-range + * For clarity, this is also equivalent to: + * (data[1] & 0x80) in-range + * + * Switches + * (data[1] & 0x01) tip switch + * (data[1] & 0x02) barrel switch + * (data[1] & 0x04) secondary barrel switch + * (data[1] & 0x08) third barrel switch + * + * Unfortunately, I don't have a pen with an eraser, so I can't + * confirm where the invert and eraser bits reside. + * If we guess using the definitions from HID descriptor 1, + * then they might be... + * (data[1] & 0x08) invert (conflicts with third barrel switch) + * (data[1] & 0x10) eraser + * + * data[2], data[3] X (little-endian, maximum 0xe588) + * + * data[4], data[5] Y (little-endian, maximum 0x8110) + * + * data[6], data[7] Pressure (little-endian, maximum 0x3fff) + * + * data[10] X tilt (signed, -60 to +60) + * data[11] Y tilt (signed, -60 to +60, inverted) + * + * + * EXAMPLE REPORTS + * Top wheel button, press, hold, then release + * E: 000000.000040 14 08 e0 01 01 20 00 00 00 00 00 00 00 00 00 + * E: 000001.531559 14 08 e0 01 01 00 00 00 00 00 00 00 00 00 00 + * + * Bottom wheel button, press, hold, then release + * E: 000002.787603 14 08 e0 01 01 40 00 00 00 00 00 00 00 00 00 + * E: 000004.215609 14 08 e0 01 01 00 00 00 00 00 00 00 00 00 00 + * + * + * Top wheel rotation, one detent CW + * E: 000194.003899 14 08 f1 01 01 00 01 00 00 00 00 00 00 00 00 + * + * Top wheel rotation, one detent CCW + * E: 000194.997812 14 08 f1 01 01 00 02 00 00 00 00 00 00 00 00 + * + * Bottom wheel rotation, one detent CW + * E: 000196.693840 14 08 f1 01 02 00 01 00 00 00 00 00 00 00 00 + * + * Bottom wheel rotation, one detent CCW + * E: 000197.757895 14 08 f1 01 02 00 02 00 00 00 00 00 00 00 00 + * + * + * Button 1, press, hold, then release + * E: 000000.000149 14 08 e0 01 01 01 00 00 00 00 00 00 00 00 00 < press + * E: 000000.447598 14 08 e0 01 01 01 00 00 00 00 00 00 00 00 00 < starting to auto-repeat, every ~225ms + * E: 000000.673586 14 08 e0 01 01 01 00 00 00 00 00 00 00 00 00 + * E: 000000.900582 14 08 e0 01 01 01 00 00 00 00 00 00 00 00 00 + * E: 000001.126703 14 08 e0 01 01 01 00 00 00 00 00 00 00 00 00 + * E: 000001.347706 14 08 e0 01 01 01 00 00 00 00 00 00 00 00 00 + * E: 000001.533721 14 08 e0 01 01 00 00 00 00 00 00 00 00 00 00 < release + * + * Button 2, press, hold, then release + * E: 000003.304735 14 08 e0 01 01 02 00 00 00 00 00 00 00 00 00 < press + * E: 000003.746743 14 08 e0 01 01 02 00 00 00 00 00 00 00 00 00 < starting to auto-repeat, every ~225ms + * E: 000003.973741 14 08 e0 01 01 02 00 00 00 00 00 00 00 00 00 + * E: 000004.199832 14 08 e0 01 01 02 00 00 00 00 00 00 00 00 00 + * E: 000004.426732 14 08 e0 01 01 02 00 00 00 00 00 00 00 00 00 + * E: 000004.647738 14 08 e0 01 01 02 00 00 00 00 00 00 00 00 00 + * E: 000004.874733 14 08 e0 01 01 02 00 00 00 00 00 00 00 00 00 + * E: 000004.930713 14 08 e0 01 01 00 00 00 00 00 00 00 00 00 00 < release + * + * Button 3, press, hold, then release + * E: 000006.650346 14 08 e0 01 01 04 00 00 00 00 00 00 00 00 00 < press + * E: 000007.051782 14 08 e0 01 01 04 00 00 00 00 00 00 00 00 00 < starting to auto-repeat, every ~225ms + * E: 000007.273738 14 08 e0 01 01 04 00 00 00 00 00 00 00 00 00 + * E: 000007.499794 14 08 e0 01 01 04 00 00 00 00 00 00 00 00 00 + * E: 000007.726725 14 08 e0 01 01 04 00 00 00 00 00 00 00 00 00 + * E: 000007.947765 14 08 e0 01 01 04 00 00 00 00 00 00 00 00 00 + * E: 000008.174755 14 08 e0 01 01 04 00 00 00 00 00 00 00 00 00 + * E: 000008.328786 14 08 e0 01 01 00 00 00 00 00 00 00 00 00 00 < release + * + * Button 4, press, hold, then release + * E: 000009.893820 14 08 e0 01 01 08 00 00 00 00 00 00 00 00 00 < press + * E: 000010.274781 14 08 e0 01 01 08 00 00 00 00 00 00 00 00 00 < starting to auto-repeat, every ~225ms + * E: 000010.500931 14 08 e0 01 01 08 00 00 00 00 00 00 00 00 00 + * E: 000010.722777 14 08 e0 01 01 08 00 00 00 00 00 00 00 00 00 + * E: 000010.948778 14 08 e0 01 01 08 00 00 00 00 00 00 00 00 00 + * E: 000011.175799 14 08 e0 01 01 08 00 00 00 00 00 00 00 00 00 + * E: 000011.401153 14 08 e0 01 01 08 00 00 00 00 00 00 00 00 00 + * E: 000011.432114 14 08 e0 01 01 00 00 00 00 00 00 00 00 00 00 < release + * + * Button 5, press, hold, then release + * E: 000013.007778 14 08 e0 01 01 10 00 00 00 00 00 00 00 00 00 < press + * E: 000013.424741 14 08 e0 01 01 10 00 00 00 00 00 00 00 00 00 < starting to auto-repeat, every ~225ms + * E: 000013.651715 14 08 e0 01 01 10 00 00 00 00 00 00 00 00 00 + * E: 000013.872763 14 08 e0 01 01 10 00 00 00 00 00 00 00 00 00 + * E: 000014.099789 14 08 e0 01 01 10 00 00 00 00 00 00 00 00 00 + * E: 000014.325734 14 08 e0 01 01 10 00 00 00 00 00 00 00 00 00 + * E: 000014.438080 14 08 e0 01 01 00 00 00 00 00 00 00 00 00 00 < release + * + * + * Pen: Top-left, then out of range + * E: 000368.572184 14 08 80 00 00 00 00 00 00 00 00 fb ed 03 00 + * E: 000368.573030 14 08 00 00 00 00 00 00 00 00 00 fb ed 03 00 + * + * Pen: Bottom-right, then out of range + * E: 000544.433185 14 08 80 88 e5 10 81 00 00 00 00 00 00 03 00 + * E: 000544.434183 14 08 00 88 e5 10 81 00 00 00 00 00 00 03 00 + * + * Pen: Max Y tilt (tip of pen points down) + * E: 000002.231927 14 08 80 f5 5d 6c 36 00 00 00 00 09 3c 03 00 + * + * Pen: Min Y Tilt (tip of pen points up) + * E: 000657.593338 14 08 80 5f 69 fa 2c 00 00 00 00 fe c4 03 00 + * + * Pen: Max X tilt (tip of pen points left) + * E: 000742.246503 14 08 80 2a 4f c4 38 00 00 00 00 3c ed 03 00 + * + * Pen: Min X Tilt (tip of pen points right) + * E: 000776.404446 14 08 00 18 85 7c 3b 00 00 00 00 c4 ed 03 00 + * + * Pen: Tip switch, max pressure, then low pressure + * E: 001138.935675 14 08 81 d2 66 04 40 ff 3f 00 00 00 08 03 00 + * + * E: 001142.403715 14 08 81 9d 69 47 3e 82 04 00 00 00 07 03 00 + * + * Pen: Barrel switch + * E: 001210.645652 14 08 82 0d 72 ea 2b 00 00 00 00 db c4 03 00 + * + * Pen: Secondary barrel switch + * E: 001211.519729 14 08 84 2c 71 51 2b 00 00 00 00 da c4 03 00 + * + * Pen: Third switch + * E: 001212.443722 14 08 88 1d 72 df 2b 00 00 00 00 dc c4 03 00 + * + * + * HIDRAW 1 + * No reports + * + * + * HIDRAW 2 + * No reports + * + * + * + * + * + * + * + * + * FIRMWARE MODE + * HIDRAW 0 + * No reports + * + * + * HIDRAW 1 + * EXAMPLE REPORTS + * Top wheel button, *release* + * E: 000067.043739 8 03 00 00 00 00 00 00 00 + * + * Bottom wheel button, *release* + * E: 000068.219161 8 03 00 00 00 00 00 00 00 + * + * + * Button 1, press, then release + * E: 000163.767870 8 03 00 05 00 00 00 00 00 + * E: 000165.969193 8 03 00 00 00 00 00 00 00 + * + * Button 2, press, then release + * E: 000261.728935 8 03 05 11 00 00 00 00 00 + * E: 000262.956220 8 03 00 00 00 00 00 00 00 + * + * Button 3, press, then release + * E: 000289.127881 8 03 01 16 00 00 00 00 00 + * E: 000290.014594 8 03 00 00 00 00 00 00 00 + * + * Button 4, press, then release + * E: 000303.025839 8 03 00 2c 00 00 00 00 00 + * E: 000303.994479 8 03 00 00 00 00 00 00 00 + * + * Button 5, press, then release + * E: 000315.500835 8 03 05 1d 00 00 00 00 00 + * E: 000316.603274 8 03 00 00 00 00 00 00 00 + * + * BUTTON SUMMARY + * 1 E: 000163.767870 8 03 00 05 00 00 00 00 00 Keyboard: B + * 2 E: 000261.728935 8 03 05 11 00 00 00 00 00 Keyboard: LCtrl+LAlt N + * 3 E: 000289.127881 8 03 01 16 00 00 00 00 00 Keyboard: LCtrl S + * 4 E: 000303.025839 8 03 00 2c 00 00 00 00 00 Keyboard: Space + * 5 E: 000315.500835 8 03 05 1d 00 00 00 00 00 Keyboard: LCtrl+LAlt + * + * All buttons (including the wheel buttons) release the same way: + * 03 00 00 00 00 00 00 00 + * + * + * Pen: Top-left, then out of range + * E: 000063.196828 10 0a c0 00 00 00 00 00 00 00 02 + * E: 000063.197762 10 0a 00 00 00 00 00 00 00 00 02 + * + * Pen: Bottom-right, then out of range + * E: 000197.123138 10 0a c0 ff 7f ff 7f 00 00 00 00 + * E: 000197.124915 10 0a 00 ff 7f ff 7f 00 00 00 00 + * + * Pen: Max Y Tilt (tip of pen points up) + * E: 000291.399541 10 0a c0 19 32 0b 58 00 00 00 3c + * + * Pen: Min Y tilt (tip of pen points down) + * E: 000340.888288 10 0a c0 85 40 89 6e 00 00 17 c4 + * + * Pen: Max X tilt (tip of pen points left) + * E: 000165.575115 10 0a c0 a7 34 99 42 00 00 3c f4 + * + * Pen: Min X Tilt (tip of pen points right) + * E: 000129.507883 10 0a c0 ea 4b 08 40 00 00 c4 1a + * + * Pen: Tip switch, max pressure, then low pressure + * E: 000242.077160 10 0a c1 7e 3c 12 31 ff 3f 03 fd + * + * E: 000339.139188 10 0a c1 ee 3a 9e 32 b5 00 06 f6 + * + * Pen: Barrel switch + * E: 000037.949777 10 0a c2 5c 28 47 2a 00 00 f6 3c + * + * Pen: Secondary barrel switch + * E: 000038.320840 10 0a c4 e4 27 fd 29 00 00 f3 38 + * + * Pen: Third switch + * E: 000038.923822 10 0a c8 97 27 5f 29 00 00 f2 33 + * + * + * HIDRAW 2 + * EXAMPLE REPORTS + * Either wheel rotation, one detent CW + * E: 000097.276573 9 11 00 01 00 00 00 00 00 00 + * + * Either wheel rotation, one detent CCW + * E: 000153.416538 9 11 00 ff ff 00 00 00 00 00 + * + * Either wheel rotation, increasing rotation speed CW + * (Note that the wheels on my particular tablet may be + * damaged, so the false rotation direction changes + * that can be observed might not happen on other units.) + * E: 000210.514925 9 11 00 01 00 00 00 00 00 00 + * E: 000210.725718 9 11 00 01 00 00 00 00 00 00 + * E: 000210.924009 9 11 00 01 00 00 00 00 00 00 + * E: 000211.205629 9 11 00 01 00 00 00 00 00 00 + * E: 000211.280521 9 11 00 0b 00 00 00 00 00 00 + * E: 000211.340121 9 11 00 0e 00 00 00 00 00 00 + * E: 000211.404018 9 11 00 0d 00 00 00 00 00 00 + * E: 000211.462060 9 11 00 0e 00 00 00 00 00 00 + * E: 000211.544886 9 11 00 0a 00 00 00 00 00 00 + * E: 000211.606130 9 11 00 0d 00 00 00 00 00 00 + * E: 000211.674560 9 11 00 0c 00 00 00 00 00 00 + * E: 000211.712039 9 11 00 16 00 00 00 00 00 00 + * E: 000211.748076 9 11 00 17 00 00 00 00 00 00 + * E: 000211.786016 9 11 00 17 00 00 00 00 00 00 + * E: 000211.832960 9 11 00 11 00 00 00 00 00 00 + * E: 000211.874081 9 11 00 14 00 00 00 00 00 00 + * E: 000211.925094 9 11 00 10 00 00 00 00 00 00 + * E: 000211.959048 9 11 00 18 00 00 00 00 00 00 + * E: 000212.006937 9 11 00 11 00 00 00 00 00 00 + * E: 000212.050055 9 11 00 13 00 00 00 00 00 00 + * E: 000212.091947 9 11 00 14 00 00 00 00 00 00 + * E: 000212.122989 9 11 00 1a 00 00 00 00 00 00 + * E: 000212.160866 9 11 00 16 00 00 00 00 00 00 + * E: 000212.194002 9 11 00 19 00 00 00 00 00 00 + * E: 000212.242249 9 11 00 11 00 00 00 00 00 00 + * E: 000212.278061 9 11 00 18 00 00 00 00 00 00 + * E: 000212.328899 9 11 00 10 00 00 00 00 00 00 + * E: 000212.354005 9 11 00 22 00 00 00 00 00 00 + * E: 000212.398995 9 11 00 12 00 00 00 00 00 00 + * E: 000212.432050 9 11 00 19 00 00 00 00 00 00 + * E: 000212.471164 9 11 00 16 00 00 00 00 00 00 + * E: 000212.507047 9 11 00 17 00 00 00 00 00 00 + * E: 000212.540964 9 11 00 19 00 00 00 00 00 00 + * E: 000212.567942 9 11 00 1f 00 00 00 00 00 00 + * E: 000212.610007 9 11 00 14 00 00 00 00 00 00 + * E: 000212.641101 9 11 00 1b 00 00 00 00 00 00 + * E: 000212.674113 9 11 00 19 00 00 00 00 00 00 + * E: 000212.674909 9 11 00 01 00 00 00 00 00 00 + * E: 000212.677062 9 11 00 00 02 00 00 00 00 00 + * E: 000212.679048 9 11 00 55 01 00 00 00 00 00 + * E: 000212.682166 9 11 00 55 01 00 00 00 00 00 + * E: 000212.682788 9 11 00 ff ff 00 00 00 00 00 + * E: 000212.683899 9 11 00 01 00 00 00 00 00 00 + * E: 000212.685827 9 11 00 67 fe 00 00 00 00 00 + * E: 000212.686941 9 11 00 00 08 00 00 00 00 00 + * E: 000212.727840 9 11 00 14 00 00 00 00 00 00 + * E: 000212.772884 9 11 00 13 00 00 00 00 00 00 + * E: 000212.810975 9 11 00 16 00 00 00 00 00 00 + * E: 000212.811793 9 11 00 00 08 00 00 00 00 00 + * E: 000212.812683 9 11 00 01 00 00 00 00 00 00 + * E: 000212.813905 9 11 00 01 00 00 00 00 00 00 + * E: 000212.814909 9 11 00 00 04 00 00 00 00 00 + * E: 000212.816942 9 11 00 01 00 00 00 00 00 00 + * E: 000212.817851 9 11 00 ff ff 00 00 00 00 00 + * E: 000212.818752 9 11 00 01 00 00 00 00 00 00 + * E: 000212.819910 9 11 00 56 fd 00 00 00 00 00 + * E: 000212.820781 9 11 00 ff ff 00 00 00 00 00 + * E: 000212.821811 9 11 00 00 04 00 00 00 00 00 + * E: 000212.822920 9 11 00 00 08 00 00 00 00 00 + * E: 000212.823861 9 11 00 00 02 00 00 00 00 00 + * E: 000212.828781 9 11 00 ba 00 00 00 00 00 00 + * E: 000212.874097 9 11 00 12 00 00 00 00 00 00 + * E: 000212.874872 9 11 00 00 fc 00 00 00 00 00 + * E: 000212.876136 9 11 00 00 fc 00 00 00 00 00 + * E: 000212.877036 9 11 00 00 f8 00 00 00 00 00 + * E: 000212.877993 9 11 00 00 f8 00 00 00 00 00 + * E: 000212.879748 9 11 00 01 00 00 00 00 00 00 + * E: 000212.880728 9 11 00 01 00 00 00 00 00 00 + * E: 000212.881956 9 11 00 00 04 00 00 00 00 00 + * E: 000212.885065 9 11 00 ff ff 00 00 00 00 00 + * E: 000212.917060 9 11 00 1a 00 00 00 00 00 00 + * E: 000212.936458 9 11 00 2d 00 00 00 00 00 00 + * E: 000212.957860 9 11 00 25 00 00 00 00 00 00 + * E: 000212.984019 9 11 00 20 00 00 00 00 00 00 + * E: 000213.017915 9 11 00 19 00 00 00 00 00 00 + * E: 000213.039973 9 11 00 27 00 00 00 00 00 00 + * E: 000213.065933 9 11 00 21 00 00 00 00 00 00 + * E: 000213.085807 9 11 00 28 00 00 00 00 00 00 + * E: 000213.108888 9 11 00 25 00 00 00 00 00 00 + * E: 000213.129726 9 11 00 29 00 00 00 00 00 00 + * E: 000213.172043 9 11 00 14 00 00 00 00 00 00 + * E: 000213.195873 9 11 00 23 00 00 00 00 00 00 + * E: 000213.222884 9 11 00 20 00 00 00 00 00 00 + * E: 000213.243220 9 11 00 2a 00 00 00 00 00 00 + * E: 000213.266778 9 11 00 24 00 00 00 00 00 00 + * E: 000213.285951 9 11 00 2b 00 00 00 00 00 00 + * E: 000213.306045 9 11 00 2a 00 00 00 00 00 00 + * E: 000213.306796 9 11 00 ff ff 00 00 00 00 00 + * E: 000213.307755 9 11 00 ff ff 00 00 00 00 00 + * E: 000213.308820 9 11 00 ff ff 00 00 00 00 00 + * E: 000213.309971 9 11 00 ff ff 00 00 00 00 00 + * E: 000213.310980 9 11 00 01 00 00 00 00 00 00 + * E: 000213.311853 9 11 00 01 00 00 00 00 00 00 + * E: 000213.312861 9 11 00 aa 02 00 00 00 00 00 + * E: 000213.313884 9 11 00 00 f8 00 00 00 00 00 + * E: 000213.315111 9 11 00 ff ff 00 00 00 00 00 + * E: 000213.315992 9 11 00 01 00 00 00 00 00 00 + * E: 000213.316955 9 11 00 00 08 00 00 00 00 00 + * E: 000213.346065 9 11 00 1d 00 00 00 00 00 00 + * E: 000213.346963 9 11 00 ff ff 00 00 00 00 00 + * E: 000213.347874 9 11 00 00 08 00 00 00 00 00 + * E: 000213.348736 9 11 00 00 08 00 00 00 00 00 + * E: 000213.349795 9 11 00 00 04 00 00 00 00 00 + * E: 000213.350791 9 11 00 01 00 00 00 00 00 00 + * E: 000213.351791 9 11 00 01 00 00 00 00 00 00 + * E: 000213.352729 9 11 00 00 f8 00 00 00 00 00 + * E: 000213.353811 9 11 00 01 00 00 00 00 00 00 + * E: 000213.354755 9 11 00 00 f8 00 00 00 00 00 + * E: 000213.355795 9 11 00 00 f8 00 00 00 00 00 + * E: 000213.356813 9 11 00 01 00 00 00 00 00 00 + * E: 000213.357817 9 11 00 00 04 00 00 00 00 00 + * E: 000213.393838 9 11 00 17 00 00 00 00 00 00 + * E: 000213.394719 9 11 00 00 04 00 00 00 00 00 + * E: 000213.395682 9 11 00 00 08 00 00 00 00 00 + * E: 000213.396679 9 11 00 00 04 00 00 00 00 00 + * E: 000213.397651 9 11 00 00 fc 00 00 00 00 00 + * E: 000213.398661 9 11 00 ff ff 00 00 00 00 00 + * E: 000213.400308 9 11 00 56 fd 00 00 00 00 00 + * E: 000213.400909 9 11 00 00 f8 00 00 00 00 00 + * E: 000213.401837 9 11 00 01 00 00 00 00 00 00 + * + * Either wheel rotation, increasing rotation speed CCW + * (Note that the wheels on my particular tablet may be + * damaged, so the false rotation direction changes + * that can be observed might not happen on other units.) + * E: 000040.527820 9 11 00 ff ff 00 00 00 00 00 + * E: 000040.816644 9 11 00 ff ff 00 00 00 00 00 + * E: 000040.880423 9 11 00 f3 ff 00 00 00 00 00 + * E: 000040.882570 9 11 00 ff ff 00 00 00 00 00 + * E: 000040.883381 9 11 00 ff ff 00 00 00 00 00 + * E: 000040.885463 9 11 00 aa 02 00 00 00 00 00 + * E: 000040.924106 9 11 00 ea ff 00 00 00 00 00 + * E: 000041.006155 9 11 00 f6 ff 00 00 00 00 00 + * E: 000041.085799 9 11 00 f6 ff 00 00 00 00 00 + * E: 000041.168492 9 11 00 f6 ff 00 00 00 00 00 + * E: 000041.233453 9 11 00 f3 ff 00 00 00 00 00 + * E: 000041.296641 9 11 00 f3 ff 00 00 00 00 00 + * E: 000041.370302 9 11 00 f5 ff 00 00 00 00 00 + * E: 000041.437410 9 11 00 f4 ff 00 00 00 00 00 + * E: 000041.474514 9 11 00 e9 ff 00 00 00 00 00 + * E: 000041.522171 9 11 00 ef ff 00 00 00 00 00 + * E: 000041.568160 9 11 00 ee ff 00 00 00 00 00 + * E: 000041.608146 9 11 00 ec ff 00 00 00 00 00 + * E: 000041.627132 9 11 00 d3 ff 00 00 00 00 00 + * E: 000041.656151 9 11 00 e3 ff 00 00 00 00 00 + * E: 000041.682264 9 11 00 e0 ff 00 00 00 00 00 + * E: 000041.714186 9 11 00 e6 ff 00 00 00 00 00 + * E: 000041.740339 9 11 00 e0 ff 00 00 00 00 00 + * E: 000041.772087 9 11 00 e5 ff 00 00 00 00 00 + * E: 000041.801093 9 11 00 e3 ff 00 00 00 00 00 + * E: 000041.834051 9 11 00 e7 ff 00 00 00 00 00 + * E: 000041.863094 9 11 00 e3 ff 00 00 00 00 00 + * E: 000041.901016 9 11 00 ea ff 00 00 00 00 00 + * E: 000041.901956 9 11 00 00 04 00 00 00 00 00 + * E: 000041.902837 9 11 00 00 fe 00 00 00 00 00 + * E: 000041.903927 9 11 00 01 00 00 00 00 00 00 + * E: 000041.905066 9 11 00 01 00 00 00 00 00 00 + * E: 000041.907214 9 11 00 00 fe 00 00 00 00 00 + * E: 000041.909011 9 11 00 01 00 00 00 00 00 00 + * E: 000041.909953 9 11 00 01 00 00 00 00 00 00 + * E: 000041.910917 9 11 00 00 08 00 00 00 00 00 + * E: 000041.913280 9 11 00 00 fe 00 00 00 00 00 + * E: 000041.914121 9 11 00 56 fd 00 00 00 00 00 + * E: 000041.915346 9 11 00 ff ff 00 00 00 00 00 + * E: 000041.962101 9 11 00 ee ff 00 00 00 00 00 + * E: 000041.964062 9 11 00 56 fd 00 00 00 00 00 + * E: 000041.964978 9 11 00 00 fc 00 00 00 00 00 + * E: 000041.968058 9 11 00 24 01 00 00 00 00 00 + * E: 000041.968880 9 11 00 56 fd 00 00 00 00 00 + * E: 000041.970977 9 11 00 aa 02 00 00 00 00 00 + * E: 000041.971932 9 11 00 ff ff 00 00 00 00 00 + * E: 000041.972943 9 11 00 01 00 00 00 00 00 00 + * E: 000041.975291 9 11 00 ff ff 00 00 00 00 00 + * E: 000041.978274 9 11 00 01 00 00 00 00 00 00 + * E: 000042.035079 9 11 00 01 00 00 00 00 00 00 + * E: 000042.041283 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.042057 9 11 00 00 04 00 00 00 00 00 + * E: 000042.045169 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.051242 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.056099 9 11 00 63 ff 00 00 00 00 00 + * E: 000042.106329 9 11 00 ef ff 00 00 00 00 00 + * E: 000042.108601 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.116259 9 11 00 6b 00 00 00 00 00 00 + * E: 000042.119140 9 11 00 55 01 00 00 00 00 00 + * E: 000042.126101 9 11 00 88 ff 00 00 00 00 00 + * E: 000042.158009 9 11 00 e6 ff 00 00 00 00 00 + * E: 000042.172108 9 11 00 be ff 00 00 00 00 00 + * E: 000042.207417 9 11 00 e8 ff 00 00 00 00 00 + * E: 000042.223155 9 11 00 cc ff 00 00 00 00 00 + * E: 000042.255185 9 11 00 e6 ff 00 00 00 00 00 + * E: 000042.276280 9 11 00 d7 ff 00 00 00 00 00 + * E: 000042.302128 9 11 00 e0 ff 00 00 00 00 00 + * E: 000042.317423 9 11 00 c8 ff 00 00 00 00 00 + * E: 000042.345226 9 11 00 e1 ff 00 00 00 00 00 + * E: 000042.357243 9 11 00 bc ff 00 00 00 00 00 + * E: 000042.381308 9 11 00 dc ff 00 00 00 00 00 + * E: 000042.383180 9 11 00 dc fe 00 00 00 00 00 + * E: 000042.412288 9 11 00 e3 ff 00 00 00 00 00 + * E: 000042.451216 9 11 00 eb ff 00 00 00 00 00 + * E: 000042.478372 9 11 00 e0 ff 00 00 00 00 00 + * E: 000042.502116 9 11 00 dd ff 00 00 00 00 00 + * E: 000042.520105 9 11 00 d3 ff 00 00 00 00 00 + * E: 000042.540345 9 11 00 d6 ff 00 00 00 00 00 + * E: 000042.541021 9 11 00 00 08 00 00 00 00 00 + * E: 000042.542009 9 11 00 01 00 00 00 00 00 00 + * E: 000042.543045 9 11 00 00 04 00 00 00 00 00 + * E: 000042.544279 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.545097 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.546074 9 11 00 00 08 00 00 00 00 00 + * E: 000042.547237 9 11 00 00 08 00 00 00 00 00 + * E: 000042.548029 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.549304 9 11 00 00 f8 00 00 00 00 00 + * E: 000042.553123 9 11 00 00 ff 00 00 00 00 00 + * E: 000042.581186 9 11 00 e1 ff 00 00 00 00 00 + * E: 000042.582238 9 11 00 00 f8 00 00 00 00 00 + * E: 000042.583150 9 11 00 00 fc 00 00 00 00 00 + * E: 000042.584273 9 11 00 00 f8 00 00 00 00 00 + * E: 000042.585019 9 11 00 00 fc 00 00 00 00 00 + * E: 000042.586059 9 11 00 01 00 00 00 00 00 00 + * E: 000042.589012 9 11 00 67 fe 00 00 00 00 00 + * E: 000042.590066 9 11 00 00 fc 00 00 00 00 00 + * E: 000042.592916 9 11 00 dc fe 00 00 00 00 00 + * E: 000042.621124 9 11 00 e1 ff 00 00 00 00 00 + * E: 000042.622092 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.623069 9 11 00 01 00 00 00 00 00 00 + * E: 000042.624030 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.625006 9 11 00 00 08 00 00 00 00 00 + * E: 000042.626068 9 11 00 00 04 00 00 00 00 00 + * E: 000042.626876 9 11 00 00 08 00 00 00 00 00 + * E: 000042.628392 9 11 00 00 08 00 00 00 00 00 + * E: 000042.628918 9 11 00 01 00 00 00 00 00 00 + * E: 000042.630009 9 11 00 ff ff 00 00 00 00 00 + * E: 000042.631934 9 11 00 00 fe 00 00 00 00 00 + * E: 000042.656285 9 11 00 dd ff 00 00 00 00 00 + * E: 000042.659870 9 11 00 cc 00 00 00 00 00 00 + * E: 000042.666128 9 11 00 9d 00 00 00 00 00 00 + * E: 000042.672458 9 11 00 80 ff 00 00 00 00 00 + * E: 000042.696106 9 11 00 dc ff 00 00 00 00 00 + * E: 000042.705129 9 11 00 61 00 00 00 00 00 00 + * E: 000042.731303 9 11 00 e0 ff 00 00 00 00 00 + * E: 000042.741278 9 11 00 ab ff 00 00 00 00 00 + * E: 000042.788181 9 11 00 ee ff 00 00 00 00 00 + * E: 000042.810441 9 11 00 db ff 00 00 00 00 00 + * E: 000042.838073 9 11 00 e1 ff 00 00 00 00 00 + * E: 000042.852235 9 11 00 c4 ff 00 00 00 00 00 + * E: 000042.882290 9 11 00 e4 ff 00 00 00 00 00 + * + * Either wheel button, press, hold, then release + * E: 000202.084982 9 11 02 00 00 00 00 00 00 00 + * E: 000202.090172 9 11 03 00 00 00 00 00 00 00 + * E: 000202.094139 9 11 03 00 00 00 00 00 00 00 + * E: 000202.099172 9 11 03 00 00 00 00 00 00 00 + * E: 000202.105055 9 11 03 00 00 00 00 00 00 00 + * E: 000202.109132 9 11 03 00 00 00 00 00 00 00 + * E: 000202.114185 9 11 03 00 00 00 00 00 00 00 + * E: 000202.119212 9 11 03 00 00 00 00 00 00 00 + * E: 000202.124264 9 11 03 00 00 00 00 00 00 00 + * E: 000202.130147 9 11 03 00 00 00 00 00 00 00 + * E: 000202.135138 9 11 03 00 00 00 00 00 00 00 + * E: 000202.140072 9 11 03 00 00 00 00 00 00 00 + * E: 000202.145146 9 11 03 00 00 00 00 00 00 00 + * E: 000202.150157 9 11 03 00 00 00 00 00 00 00 + * E: 000202.155339 9 11 03 00 00 00 00 00 00 00 + * E: 000202.160064 9 11 03 00 00 00 00 00 00 00 + * E: 000202.165026 9 11 03 00 00 00 00 00 00 00 + * E: 000202.170037 9 11 03 00 00 00 00 00 00 00 + * E: 000202.175154 9 11 03 00 00 00 00 00 00 00 + * E: 000202.180044 9 11 03 00 00 00 00 00 00 00 + * E: 000202.186280 9 11 03 00 00 00 00 00 00 00 + * E: 000202.191281 9 11 03 00 00 00 00 00 00 00 + * E: 000202.196106 9 11 03 00 00 00 00 00 00 00 + * E: 000202.201083 9 11 03 00 00 00 00 00 00 00 + * E: 000202.206166 9 11 03 00 00 00 00 00 00 00 + * E: 000202.211084 9 11 03 00 00 00 00 00 00 00 + * E: 000202.216175 9 11 03 00 00 00 00 00 00 00 + * E: 000202.221036 9 11 03 00 00 00 00 00 00 00 + * E: 000202.226271 9 11 03 00 00 00 00 00 00 00 + * E: 000202.231150 9 11 03 00 00 00 00 00 00 00 + * E: 000202.235924 9 11 03 00 00 00 00 00 00 00 + * E: 000202.242046 9 11 03 00 00 00 00 00 00 00 + * E: 000202.247164 9 11 03 00 00 00 00 00 00 00 + * E: 000202.252359 9 11 03 00 00 00 00 00 00 00 + * E: 000202.257295 9 11 03 00 00 00 00 00 00 00 + * E: 000202.262167 9 11 03 00 00 00 00 00 00 00 + * E: 000202.267081 9 11 03 00 00 00 00 00 00 00 + * E: 000202.272175 9 11 03 00 00 00 00 00 00 00 + * E: 000202.277085 9 11 03 00 00 00 00 00 00 00 + * E: 000202.282596 9 11 03 00 00 00 00 00 00 00 + * E: 000202.287078 9 11 03 00 00 00 00 00 00 00 + * E: 000202.292191 9 11 03 00 00 00 00 00 00 00 + * E: 000202.298196 9 11 03 00 00 00 00 00 00 00 + * E: 000202.303004 9 11 03 00 00 00 00 00 00 00 + * E: 000202.308113 9 11 03 00 00 00 00 00 00 00 + * E: 000202.313079 9 11 03 00 00 00 00 00 00 00 + * E: 000202.318243 9 11 03 00 00 00 00 00 00 00 + * E: 000202.323309 9 11 03 00 00 00 00 00 00 00 + * E: 000202.328190 9 11 03 00 00 00 00 00 00 00 + * E: 000202.333050 9 11 03 00 00 00 00 00 00 00 + * E: 000202.338162 9 11 03 00 00 00 00 00 00 00 + * E: 000202.343022 9 11 03 00 00 00 00 00 00 00 + * E: 000202.348113 9 11 03 00 00 00 00 00 00 00 + * E: 000202.354133 9 11 03 00 00 00 00 00 00 00 + * E: 000202.359132 9 11 03 00 00 00 00 00 00 00 + * E: 000202.364053 9 11 03 00 00 00 00 00 00 00 + * E: 000202.369034 9 11 03 00 00 00 00 00 00 00 + * E: 000202.374144 9 11 03 00 00 00 00 00 00 00 + * E: 000202.379027 9 11 03 00 00 00 00 00 00 00 + * E: 000202.384238 9 11 03 00 00 00 00 00 00 00 + * E: 000202.389249 9 11 03 00 00 00 00 00 00 00 + * E: 000202.394049 9 11 03 00 00 00 00 00 00 00 + * E: 000202.398949 9 11 03 00 00 00 00 00 00 00 + * E: 000202.404203 9 11 03 00 00 00 00 00 00 00 + * E: 000202.410098 9 11 03 00 00 00 00 00 00 00 + * E: 000202.415237 9 11 00 00 00 00 00 00 00 00 + * + * + * Top wheel button press and release while holding bottom wheel button + * (The reverse action (a bottom wheel button press while holding the top wheel button) is invisible.) + * E: 000071.126966 9 11 03 00 00 00 00 00 00 00 + * E: 000071.133117 9 11 03 00 00 00 00 00 00 00 + * E: 000071.137481 9 11 03 00 00 00 00 00 00 00 + * E: 000071.142036 9 11 03 00 00 00 00 00 00 00 + * E: 000071.147027 9 11 03 00 00 00 00 00 00 00 + * E: 000071.151988 9 11 03 00 00 00 00 00 00 00 + * E: 000071.157945 9 11 03 00 00 00 00 00 00 00 + * E: 000071.163657 9 11 03 00 00 00 00 00 00 00 + * E: 000071.168240 9 11 03 00 00 00 00 00 00 00 + * E: 000071.173109 9 11 02 00 00 00 00 00 00 00 < top wheel button press? + * E: 000071.178119 9 11 03 00 00 00 00 00 00 00 + * E: 000071.183046 9 11 03 00 00 00 00 00 00 00 + * E: 000071.187983 9 11 03 00 00 00 00 00 00 00 + * E: 000071.192996 9 11 03 00 00 00 00 00 00 00 + * E: 000071.198341 9 11 03 00 00 00 00 00 00 00 + * E: 000071.203122 9 11 03 00 00 00 00 00 00 00 + * E: 000071.208998 9 11 03 00 00 00 00 00 00 00 + * E: 000071.214037 9 11 03 00 00 00 00 00 00 00 + * E: 000071.218945 9 11 03 00 00 00 00 00 00 00 + * E: 000071.223835 9 11 03 00 00 00 00 00 00 00 + * E: 000071.228987 9 11 03 00 00 00 00 00 00 00 + * E: 000071.234082 9 11 03 00 00 00 00 00 00 00 + * E: 000071.239028 9 11 03 00 00 00 00 00 00 00 + * E: 000071.244307 9 11 00 00 00 00 00 00 00 00 < top wheel button release? + * E: 000071.245867 9 11 03 00 00 00 00 00 00 00 < continued hold of bottom button + * E: 000071.249959 9 11 03 00 00 00 00 00 00 00 + * E: 000071.255032 9 11 03 00 00 00 00 00 00 00 + * E: 000071.259972 9 11 03 00 00 00 00 00 00 00 + * E: 000071.265409 9 11 03 00 00 00 00 00 00 00 + * E: 000071.270156 9 11 03 00 00 00 00 00 00 00 + * E: 000071.275530 9 11 03 00 00 00 00 00 00 00 + * E: 000071.279975 9 11 03 00 00 00 00 00 00 00 + * E: 000071.285046 9 11 03 00 00 00 00 00 00 00 + * E: 000071.290906 9 11 03 00 00 00 00 00 00 00 + * E: 000071.296146 9 11 03 00 00 00 00 00 00 00 + * E: 000071.301288 9 11 03 00 00 00 00 00 00 00 + * + * Top wheel button hold while top wheel rotate CCW + * (I did not test the other combinations of this) + * E: 000022.253144 9 11 03 00 00 00 00 00 00 00 + * E: 000022.258157 9 11 03 00 00 00 00 00 00 00 + * E: 000022.262011 9 11 00 ff ff 00 00 00 00 00 + * E: 000022.264015 9 11 03 00 00 00 00 00 00 00 + * E: 000022.268976 9 11 03 00 00 00 00 00 00 00 + * + * + * + * + * + * + * + * + * NOTES ON SIMULTANEOUS BUTTON HOLDS + * (applies to vendor mode only) + * Value replacements for ease of reading: + * .7 = 0x40 (button 7, a wheel button) + * .1 = 0x01 (button 1, a pad button) + * rr = 0x00 (no buttons pressed) + * + * Press 7 + * Press 1 + * Release 7 + * Release 1 + * B: 000000.000152 42 08 e0 01 01 .7 00 00 00 00 00 00 00 00 00 + * B: 000000.781784 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000000.869845 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000001.095688 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000001.322635 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000001.543643 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000001.770652 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000001.885659 42 08 e0 01 01 rr 00 00 00 00 00 00 00 00 00 release of 7 + * B: 000001.993620 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000002.220671 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000002.446589 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000002.672559 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000002.765183 42 08 e0 01 01 rr 00 00 00 00 00 00 00 00 00 release of 1 + * + * Press 7 + * Press 1 + * Release 1 + * Release 7 + * B: 000017.071517 42 08 e0 01 01 .7 00 00 00 00 00 00 00 00 00 + * B: 000018.270461 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000018.419486 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000018.646438 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000018.872493 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000019.094422 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000019.320488 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000020.360505 42 08 e0 01 01 rr 00 00 00 00 00 00 00 00 00 release of 1 is not reported until 7 is released, then both are rapidly reported + * B: 000020.361091 42 08 e0 01 01 rr 00 00 00 00 00 00 00 00 00 + * + * Press 1 + * Press 7 + * Release 7 + * Release 1 + * B: 000031.516315 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000031.922299 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000032.144165 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000032.370262 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000032.396242 42 08 e0 01 01 .7 00 00 00 00 00 00 00 00 00 + * B: 000032.597270 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000032.818187 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000033.045143 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000033.267535 42 08 e0 01 01 rr 00 00 00 00 00 00 00 00 00 release of 7 + * B: 000033.272602 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000033.494246 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000033.721266 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000033.947237 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000034.169294 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000034.183585 42 08 e0 01 01 rr 00 00 00 00 00 00 00 00 00 release of 1 + * + * Press 1 + * Press 7 + * Release 1 + * Release 7 + * B: 000056.628429 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000057.046348 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000057.272044 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000057.494434 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000057.601224 42 08 e0 01 01 .7 00 00 00 00 00 00 00 00 00 + * B: 000057.719262 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000057.946941 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000058.172346 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000058.393994 42 08 e0 01 01 .1 00 00 00 00 00 00 00 00 00 + * B: 000059.434576 42 08 e0 01 01 rr 00 00 00 00 00 00 00 00 00 release of 1 is not reported until 7 is released, then both are rapidly reported + * B: 000059.435857 42 08 e0 01 01 rr 00 00 00 00 00 00 00 00 00 + */ + + +/* Filled in by udev-hid-bpf */ +char UDEV_PROP_HUION_FIRMWARE_ID[64]; + +char EXPECTED_FIRMWARE_ID[] = "HUION_M22c_"; + +__u8 last_button_state; + +static const __u8 disabled_rdesc_tablet[] = { + FixedSizeVendorReport(28) /* Input report 4 */ +}; + +static const __u8 disabled_rdesc_wheel[] = { + FixedSizeVendorReport(9) /* Input report 17 */ +}; + +static const __u8 fixed_rdesc_vendor[] = { + UsagePage_Digitizers + Usage_Dig_Pen + CollectionApplication( + ReportId(VENDOR_REPORT_ID) + UsagePage_Digitizers + Usage_Dig_Pen + CollectionPhysical( + /* + * I have only examined the tablet's behavior while using + * the PW600L pen, which does not have an eraser. + * Because of this, I don't know where the Eraser and Invert + * bits will go, or if they work as one would expect. + * + * For the time being, there is no expectation that a pen + * with an eraser will work without modifications here. + */ + ReportSize(1) + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + ReportCount(3) + Usage_Dig_TipSwitch + Usage_Dig_BarrelSwitch + Usage_Dig_SecondaryBarrelSwitch + Input(Var|Abs) + PushPop( + ReportCount(1) + UsagePage_Button + Usage_i8(0x4a) /* (BTN_STYLUS3 + 1) & 0xff */ + Input(Var|Abs) + ) + ReportCount(3) + Input(Const) + ReportCount(1) + Usage_Dig_InRange + Input(Var|Abs) + ReportSize(16) + ReportCount(1) + PushPop( + UsagePage_GenericDesktop + Unit(cm) + UnitExponent(-2) + LogicalMinimum_i16(0) + PhysicalMinimum_i16(0) + /* + * The tablet has a logical maximum of 58760 x 33040 + * and a claimed resolution of 5080 LPI (200 L/mm) + * This works out to a physical maximum of + * 293.8 x 165.2mm, which matches Huion's advertised + * active area dimensions from + * https://www.huion.com/products/pen_display/Kamvas/kamvas-13-gen-3.html + */ + LogicalMaximum_i16(58760) + PhysicalMaximum_i16(2938) + Usage_GD_X + Input(Var|Abs) + LogicalMaximum_i16(33040) + PhysicalMaximum_i16(1652) + Usage_GD_Y + Input(Var|Abs) + ) + LogicalMinimum_i16(0) + LogicalMaximum_i16(16383) + Usage_Dig_TipPressure + Input(Var|Abs) + ReportCount(1) + Input(Const) + ReportSize(8) + ReportCount(2) + PushPop( + Unit(deg) + UnitExponent(0) + LogicalMinimum_i8(-60) + PhysicalMinimum_i8(-60) + LogicalMaximum_i8(60) + PhysicalMaximum_i8(60) + Usage_Dig_XTilt + Usage_Dig_YTilt + Input(Var|Abs) + ) + ) + ) + UsagePage_GenericDesktop + Usage_GD_Keypad + CollectionApplication( + ReportId(CUSTOM_PAD_REPORT_ID) + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + UsagePage_Digitizers + Usage_Dig_TabletFunctionKeys + CollectionPhysical( + /* + * The first 3 bytes are somewhat vestigial and will + * always be set to zero. Their presence here is needed + * to ensure that this device will be detected as a + * tablet pad by software that otherwise wouldn't know + * any better. + */ + /* (data[1] & 0x01) barrel switch */ + ReportSize(1) + ReportCount(1) + Usage_Dig_BarrelSwitch + Input(Var|Abs) + ReportCount(7) + Input(Const) + /* data[2] X */ + /* data[3] Y */ + ReportSize(8) + ReportCount(2) + UsagePage_GenericDesktop + Usage_GD_X + Usage_GD_Y + Input(Var|Abs) + /* + * (data[4] & 0x01) button 1 + * (data[4] & 0x02) button 2 + * (data[4] & 0x04) button 3 + * (data[4] & 0x08) button 4 + * (data[4] & 0x10) button 5 + * (data[4] & 0x20) button 6 (top wheel button) + * (data[4] & 0x40) button 7 (bottom wheel button) + */ + ReportSize(1) + ReportCount(7) + UsagePage_Button + UsageMinimum_i8(1) + UsageMaximum_i8(7) + Input(Var|Abs) + ReportCount(1) + Input(Const) + /* data[5] top wheel (signed, positive clockwise) */ + ReportSize(8) + ReportCount(1) + UsagePage_GenericDesktop + Usage_GD_Wheel + LogicalMinimum_i8(-1) + LogicalMaximum_i8(1) + Input(Var|Rel) + /* data[6] bottom wheel (signed, positive clockwise) */ + UsagePage_Consumer + Usage_Con_ACPan + Input(Var|Rel) + ) + /* + * The kernel will drop reports that are bigger than the + * largest report specified in the HID descriptor. + * Therefore, our modified descriptor needs to have at least one + * HID report that is as long as, or longer than, the largest + * report in the original descriptor. + * + * This macro expands to a no-op report that is padded to the + * provided length. + */ + FixedSizeVendorReport(VENDOR_REPORT_LENGTH) + ) +}; + +SEC(HID_BPF_RDESC_FIXUP) +int BPF_PROG(hid_fix_rdesc_huion_kamvas13_gen3, struct hid_bpf_ctx *hid_ctx) +{ + __u8 *data = hid_bpf_get_data(hid_ctx, 0 /* offset */, HID_MAX_DESCRIPTOR_SIZE /* size */); + __s32 rdesc_size = hid_ctx->size; + __u8 have_fw_id; + + if (!data) + return 0; /* EPERM check */ + + have_fw_id = __builtin_memcmp(UDEV_PROP_HUION_FIRMWARE_ID, + EXPECTED_FIRMWARE_ID, + sizeof(EXPECTED_FIRMWARE_ID) - 1) == 0; + + if (have_fw_id) { + /* + * Tablet should be in vendor mode. + * Disable the unused devices + */ + if (rdesc_size == TABLET_DESCRIPTOR_LENGTH) { + __builtin_memcpy(data, disabled_rdesc_tablet, + sizeof(disabled_rdesc_tablet)); + return sizeof(disabled_rdesc_tablet); + } + + if (rdesc_size == WHEEL_DESCRIPTOR_LENGTH) { + __builtin_memcpy(data, disabled_rdesc_wheel, + sizeof(disabled_rdesc_wheel)); + return sizeof(disabled_rdesc_wheel); + } + } + + /* + * Regardless of which mode the tablet is in, always fix the vendor + * descriptor in case the udev property just happened to not be set + */ + if (rdesc_size == VENDOR_DESCRIPTOR_LENGTH) { + __builtin_memcpy(data, fixed_rdesc_vendor, sizeof(fixed_rdesc_vendor)); + return sizeof(fixed_rdesc_vendor); + } + + return 0; +} + +SEC(HID_BPF_DEVICE_EVENT) +int BPF_PROG(hid_fix_event_huion_kamvas13_gen3, struct hid_bpf_ctx *hid_ctx) +{ + __u8 *data = hid_bpf_get_data(hid_ctx, 0 /* offset */, VENDOR_REPORT_LENGTH /* size */); + + if (!data) + return 0; /* EPERM check */ + + /* Handle vendor reports only */ + if (hid_ctx->size != VENDOR_REPORT_LENGTH) + return 0; + if (data[0] != VENDOR_REPORT_ID) + return 0; + + __u8 report_subtype = (data[1] >> 4) & 0x0f; + + if (report_subtype == VENDOR_REPORT_SUBTYPE_PEN || + report_subtype == VENDOR_REPORT_SUBTYPE_PEN_OUT) { + /* Invert Y tilt */ + data[11] = -data[11]; + + } else if (report_subtype == VENDOR_REPORT_SUBTYPE_BUTTONS || + report_subtype == VENDOR_REPORT_SUBTYPE_WHEELS) { + struct pad_report { + __u8 report_id; + __u8 btn_stylus:1; + __u8 padding:7; + __u8 x; + __u8 y; + __u8 buttons; + __s8 top_wheel; + __s8 bottom_wheel; + } __attribute__((packed)) *pad_report; + + __s8 top_wheel = 0; + __s8 bottom_wheel = 0; + + switch (report_subtype) { + case VENDOR_REPORT_SUBTYPE_WHEELS: + /* + * The wheel direction byte is 1 for clockwise rotation + * and 2 for counter-clockwise. + * Change it to 1 and -1, respectively. + */ + switch (data[3]) { + case 1: + top_wheel = (data[5] == 1) ? 1 : -1; + break; + case 2: + bottom_wheel = (data[5] == 1) ? 1 : -1; + break; + } + break; + + case VENDOR_REPORT_SUBTYPE_BUTTONS: + /* + * If a button is already being held, ignore any new + * button event unless it's a release. + * + * The tablet only cleanly handles one button being held + * at a time, and trying to hold multiple buttons + * (particularly wheel+pad buttons) can result in sequences + * of reports that look like imaginary presses and releases. + * + * This is an imperfect way to filter out some of these + * reports. + */ + if (last_button_state != 0x00 && data[4] != 0x00) + break; + + last_button_state = data[4]; + break; + } + + + pad_report = (struct pad_report *)data; + + pad_report->report_id = CUSTOM_PAD_REPORT_ID; + pad_report->btn_stylus = 0; + pad_report->x = 0; + pad_report->y = 0; + pad_report->buttons = last_button_state; + pad_report->top_wheel = top_wheel; + pad_report->bottom_wheel = bottom_wheel; + + return sizeof(struct pad_report); + } + + return 0; +} + +HID_BPF_OPS(huion_kamvas13_gen3) = { + .hid_device_event = (void *)hid_fix_event_huion_kamvas13_gen3, + .hid_rdesc_fixup = (void *)hid_fix_rdesc_huion_kamvas13_gen3, +}; + +SEC("syscall") +int probe(struct hid_bpf_probe_args *ctx) +{ + switch (ctx->rdesc_size) { + case VENDOR_DESCRIPTOR_LENGTH: + case TABLET_DESCRIPTOR_LENGTH: + case WHEEL_DESCRIPTOR_LENGTH: + ctx->retval = 0; + break; + default: + ctx->retval = -EINVAL; + } + + return 0; +} + +char _license[] SEC("license") = "GPL"; diff --git a/drivers/hid/bpf/progs/Huion__Kamvas16Gen3.bpf.c b/drivers/hid/bpf/progs/Huion__Kamvas16Gen3.bpf.c new file mode 100644 index 000000000000..ac66c6e65eb4 --- /dev/null +++ b/drivers/hid/bpf/progs/Huion__Kamvas16Gen3.bpf.c @@ -0,0 +1,724 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2025 Nicholas LaPointe + * Copyright (c) 2025 Higgins Dragon + */ + +#include "vmlinux.h" +#include "hid_bpf.h" +#include "hid_bpf_helpers.h" +#include "hid_report_helpers.h" +#include <bpf/bpf_tracing.h> + +#define VID_HUION 0x256c +#define PID_KAMVAS16_GEN3 0x2009 + +#define VENDOR_DESCRIPTOR_LENGTH 36 +#define TABLET_DESCRIPTOR_LENGTH 328 +#define WHEEL_DESCRIPTOR_LENGTH 200 + +#define VENDOR_REPORT_ID 8 +#define VENDOR_REPORT_LENGTH 14 + +#define VENDOR_REPORT_SUBTYPE_PEN 0x08 +#define VENDOR_REPORT_SUBTYPE_PEN_OUT 0x00 +#define VENDOR_REPORT_SUBTYPE_BUTTONS 0x0e +#define VENDOR_REPORT_SUBTYPE_WHEELS 0x0f + +/* For the reports that we create ourselves */ +#define CUSTOM_PAD_REPORT_ID 9 + +HID_BPF_CONFIG( + HID_DEVICE(BUS_USB, HID_GROUP_ANY, VID_HUION, PID_KAMVAS16_GEN3), +); + +/* + * This tablet can send reports using one of two different data formats, + * depending on what "mode" the tablet is in. + * + * By default, the tablet will send reports that can be decoded using its + * included HID descriptors (descriptors 1 and 2, shown below). + * This mode will be called "firmware mode" throughout this file. + * + * The HID descriptor that describes pen events in firmware mode (descriptor 1) + * has multiple bugs: + * * "Secondary Tip Switch" instead of "Secondary Barrel Switch" + * * "Invert" instead of (or potentially shared with) third barrel button + * * Specified tablet area of 2048 in³ instead of 293.8 x 165.2mm + * * Specified tilt range of -90 to +90 instead of -60 to +60 + * + * While these can be easily patched up by editing the descriptor, a larger + * problem with the firmware mode exists: it is impossible to tell which of the + * two wheels are being rotated (or having their central button pressed). + * + * + * By using a tool such as huion-switcher (https://github.com/whot/huion-switcher), + * the tablet can be made to send reports using a proprietary format that is not + * adequately described by its relevant descriptor (descriptor 0, shown below). + * This mode will be called "vendor mode" throughout this file. + * + * The reports sent while in vendor mode allow for proper decoding of the wheels. + * + * For simplicity and maximum functionality, this BPF focuses strictly on + * enabling one to make use of the vendor mode. + */ + +/* + * DESCRIPTORS + * DESCRIPTOR 0 + * # 0x06, 0x00, 0xff, // Usage Page (Vendor Defined Page 1) 0 + * # 0x09, 0x01, // Usage (Vendor Usage 1) 3 + * # 0xa1, 0x01, // Collection (Application) 5 + * # 0x85, 0x08, // Report ID (8) 7 + * # 0x75, 0x68, // Report Size (104) 9 + * # 0x95, 0x01, // Report Count (1) 11 + * # 0x09, 0x01, // Usage (Vendor Usage 1) 13 + * # 0x81, 0x02, // Input (Data,Var,Abs) 15 + * # 0xc0, // End Collection 17 + * # 0x06, 0x00, 0xff, // Usage Page (Vendor Defined Page 1) 18 + * # 0x09, 0x01, // Usage (Vendor Usage 1) 21 + * # 0xa1, 0x01, // Collection (Application) 23 + * # 0x85, 0x16, // Report ID (22) 25 + * # 0x75, 0x08, // Report Size (8) 27 + * # 0x95, 0x07, // Report Count (7) 29 + * # 0x09, 0x01, // Usage (Vendor Usage 1) 31 + * # 0xb1, 0x02, // Feature (Data,Var,Abs) 33 + * # 0xc0, // End Collection 35 + * # + * R: 36 06 00 ff 09 01 a1 01 85 08 75 68 95 01 09 01 81 02 c0 06 00 ff 09 01 a1 01 85 16 75 08 95 07 09 01 b1 02 c0 + * N: HUION Huion Tablet_GS1563 + * I: 3 256c 2009 + * + * + * DESCRIPTOR 1 + * # 0x05, 0x0d, // Usage Page (Digitizers) 0 + * # 0x09, 0x02, // Usage (Pen) 2 + * # 0xa1, 0x01, // Collection (Application) 4 + * # 0x85, 0x0a, // Report ID (10) 6 + * # 0x09, 0x20, // Usage (Stylus) 8 + * # 0xa1, 0x01, // Collection (Application) 10 + * # 0x09, 0x42, // Usage (Tip Switch) 12 + * # 0x09, 0x44, // Usage (Barrel Switch) 14 + * # 0x09, 0x43, // Usage (Secondary Tip Switch) 16 + * # 0x09, 0x3c, // Usage (Invert) 18 + * # 0x09, 0x45, // Usage (Eraser) 20 + * # 0x15, 0x00, // Logical Minimum (0) 22 + * # 0x25, 0x01, // Logical Maximum (1) 24 + * # 0x75, 0x01, // Report Size (1) 26 + * # 0x95, 0x06, // Report Count (6) 28 + * # 0x81, 0x02, // Input (Data,Var,Abs) 30 + * # 0x09, 0x32, // Usage (In Range) 32 + * # 0x75, 0x01, // Report Size (1) 34 + * # 0x95, 0x01, // Report Count (1) 36 + * # 0x81, 0x02, // Input (Data,Var,Abs) 38 + * # 0x81, 0x03, // Input (Cnst,Var,Abs) 40 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 42 + * # 0x09, 0x30, // Usage (X) 44 + * # 0x09, 0x31, // Usage (Y) 46 + * # 0x55, 0x0d, // Unit Exponent (-3) 48 + * # 0x65, 0x33, // Unit (EnglishLinear: in³) 50 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 52 + * # 0x35, 0x00, // Physical Minimum (0) 55 + * # 0x46, 0x00, 0x08, // Physical Maximum (2048) 57 + * # 0x75, 0x10, // Report Size (16) 60 + * # 0x95, 0x02, // Report Count (2) 62 + * # 0x81, 0x02, // Input (Data,Var,Abs) 64 + * # 0x05, 0x0d, // Usage Page (Digitizers) 66 + * # 0x09, 0x30, // Usage (Tip Pressure) 68 + * # 0x26, 0xff, 0x3f, // Logical Maximum (16383) 70 + * # 0x75, 0x10, // Report Size (16) 73 + * # 0x95, 0x01, // Report Count (1) 75 + * # 0x81, 0x02, // Input (Data,Var,Abs) 77 + * # 0x09, 0x3d, // Usage (X Tilt) 79 + * # 0x09, 0x3e, // Usage (Y Tilt) 81 + * # 0x15, 0xa6, // Logical Minimum (-90) 83 + * # 0x25, 0x5a, // Logical Maximum (90) 85 + * # 0x75, 0x08, // Report Size (8) 87 + * # 0x95, 0x02, // Report Count (2) 89 + * # 0x81, 0x02, // Input (Data,Var,Abs) 91 + * # 0xc0, // End Collection 93 + * # 0xc0, // End Collection 94 + * # 0x05, 0x0d, // Usage Page (Digitizers) 95 + * # 0x09, 0x04, // Usage (Touch Screen) 97 + * # 0xa1, 0x01, // Collection (Application) 99 + * # 0x85, 0x04, // Report ID (4) 101 + * # 0x09, 0x22, // Usage (Finger) 103 + * # 0xa1, 0x02, // Collection (Logical) 105 + * # 0x05, 0x0d, // Usage Page (Digitizers) 107 + * # 0x95, 0x01, // Report Count (1) 109 + * # 0x75, 0x06, // Report Size (6) 111 + * # 0x09, 0x51, // Usage (Contact Id) 113 + * # 0x15, 0x00, // Logical Minimum (0) 115 + * # 0x25, 0x3f, // Logical Maximum (63) 117 + * # 0x81, 0x02, // Input (Data,Var,Abs) 119 + * # 0x09, 0x42, // Usage (Tip Switch) 121 + * # 0x25, 0x01, // Logical Maximum (1) 123 + * # 0x75, 0x01, // Report Size (1) 125 + * # 0x95, 0x01, // Report Count (1) 127 + * # 0x81, 0x02, // Input (Data,Var,Abs) 129 + * # 0x75, 0x01, // Report Size (1) 131 + * # 0x95, 0x01, // Report Count (1) 133 + * # 0x81, 0x03, // Input (Cnst,Var,Abs) 135 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 137 + * # 0x75, 0x10, // Report Size (16) 139 + * # 0x55, 0x0e, // Unit Exponent (-2) 141 + * # 0x65, 0x11, // Unit (SILinear: cm) 143 + * # 0x09, 0x30, // Usage (X) 145 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 147 + * # 0x35, 0x00, // Physical Minimum (0) 150 + * # 0x46, 0x15, 0x0c, // Physical Maximum (3093) 152 + * # 0x81, 0x42, // Input (Data,Var,Abs,Null) 155 + * # 0x09, 0x31, // Usage (Y) 157 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 159 + * # 0x46, 0xcb, 0x06, // Physical Maximum (1739) 162 + * # 0x81, 0x42, // Input (Data,Var,Abs,Null) 165 + * # 0x05, 0x0d, // Usage Page (Digitizers) 167 + * # 0x09, 0x30, // Usage (Tip Pressure) 169 + * # 0x26, 0xff, 0x1f, // Logical Maximum (8191) 171 + * # 0x75, 0x10, // Report Size (16) 174 + * # 0x95, 0x01, // Report Count (1) 176 + * # 0x81, 0x02, // Input (Data,Var,Abs) 178 + * # 0xc0, // End Collection 180 + * # 0x05, 0x0d, // Usage Page (Digitizers) 181 + * # 0x09, 0x22, // Usage (Finger) 183 + * # 0xa1, 0x02, // Collection (Logical) 185 + * # 0x05, 0x0d, // Usage Page (Digitizers) 187 + * # 0x95, 0x01, // Report Count (1) 189 + * # 0x75, 0x06, // Report Size (6) 191 + * # 0x09, 0x51, // Usage (Contact Id) 193 + * # 0x15, 0x00, // Logical Minimum (0) 195 + * # 0x25, 0x3f, // Logical Maximum (63) 197 + * # 0x81, 0x02, // Input (Data,Var,Abs) 199 + * # 0x09, 0x42, // Usage (Tip Switch) 201 + * # 0x25, 0x01, // Logical Maximum (1) 203 + * # 0x75, 0x01, // Report Size (1) 205 + * # 0x95, 0x01, // Report Count (1) 207 + * # 0x81, 0x02, // Input (Data,Var,Abs) 209 + * # 0x75, 0x01, // Report Size (1) 211 + * # 0x95, 0x01, // Report Count (1) 213 + * # 0x81, 0x03, // Input (Cnst,Var,Abs) 215 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 217 + * # 0x75, 0x10, // Report Size (16) 219 + * # 0x55, 0x0e, // Unit Exponent (-2) 221 + * # 0x65, 0x11, // Unit (SILinear: cm) 223 + * # 0x09, 0x30, // Usage (X) 225 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 227 + * # 0x35, 0x00, // Physical Minimum (0) 230 + * # 0x46, 0x15, 0x0c, // Physical Maximum (3093) 232 + * # 0x81, 0x42, // Input (Data,Var,Abs,Null) 235 + * # 0x09, 0x31, // Usage (Y) 237 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 239 + * # 0x46, 0xcb, 0x06, // Physical Maximum (1739) 242 + * # 0x81, 0x42, // Input (Data,Var,Abs,Null) 245 + * # 0x05, 0x0d, // Usage Page (Digitizers) 247 + * # 0x09, 0x30, // Usage (Tip Pressure) 249 + * # 0x26, 0xff, 0x1f, // Logical Maximum (8191) 251 + * # 0x75, 0x10, // Report Size (16) 254 + * # 0x95, 0x01, // Report Count (1) 256 + * # 0x81, 0x02, // Input (Data,Var,Abs) 258 + * # 0xc0, // End Collection 260 + * # 0x05, 0x0d, // Usage Page (Digitizers) 261 + * # 0x09, 0x56, // Usage (Scan Time) 263 + * # 0x55, 0x00, // Unit Exponent (0) 265 + * # 0x65, 0x00, // Unit (None) 267 + * # 0x27, 0xff, 0xff, 0xff, 0x7f, // Logical Maximum (2147483647) 269 + * # 0x95, 0x01, // Report Count (1) 274 + * # 0x75, 0x20, // Report Size (32) 276 + * # 0x81, 0x02, // Input (Data,Var,Abs) 278 + * # 0x09, 0x54, // Usage (Contact Count) 280 + * # 0x25, 0x7f, // Logical Maximum (127) 282 + * # 0x95, 0x01, // Report Count (1) 284 + * # 0x75, 0x08, // Report Size (8) 286 + * # 0x81, 0x02, // Input (Data,Var,Abs) 288 + * # 0x75, 0x08, // Report Size (8) 290 + * # 0x95, 0x08, // Report Count (8) 292 + * # 0x81, 0x03, // Input (Cnst,Var,Abs) 294 + * # 0x85, 0x05, // Report ID (5) 296 + * # 0x09, 0x55, // Usage (Contact Max) 298 + * # 0x25, 0x0a, // Logical Maximum (10) 300 + * # 0x75, 0x08, // Report Size (8) 302 + * # 0x95, 0x01, // Report Count (1) 304 + * # 0xb1, 0x02, // Feature (Data,Var,Abs) 306 + * # 0x06, 0x00, 0xff, // Usage Page (Vendor Defined Page 1) 308 + * # 0x09, 0xc5, // Usage (Vendor Usage 0xc5) 311 + * # 0x85, 0x06, // Report ID (6) 313 + * # 0x15, 0x00, // Logical Minimum (0) 315 + * # 0x26, 0xff, 0x00, // Logical Maximum (255) 317 + * # 0x75, 0x08, // Report Size (8) 320 + * # 0x96, 0x00, 0x01, // Report Count (256) 322 + * # 0xb1, 0x02, // Feature (Data,Var,Abs) 325 + * # 0xc0, // End Collection 327 + * # + * R: 328 05 0d 09 02 a1 01 85 0a 09 20 a1 01 09 42 09 44 09 43 09 3c 09 45 15 00 25 01 75 01 95 06 81 02 09 32 75 01 95 01 81 02 81 03 05 01 09 30 09 31 55 0d 65 33 26 ff 7f 35 00 46 00 08 75 10 95 02 81 02 05 0d 09 30 26 ff 3f 75 10 95 01 81 02 09 3d 09 3e 15 a6 25 5a 75 08 95 02 81 02 c0 c0 05 0d 09 04 a1 01 85 04 09 22 a1 02 05 0d 95 01 75 06 09 51 15 00 25 3f 81 02 09 42 25 01 75 01 95 01 81 02 75 01 95 01 81 03 05 01 75 10 55 0e 65 11 09 30 26 ff 7f 35 00 46 15 0c 81 42 09 31 26 ff 7f 46 cb 06 81 42 05 0d 09 30 26 ff 1f 75 10 95 01 81 02 c0 05 0d 09 22 a1 02 05 0d 95 01 75 06 09 51 15 00 25 3f 81 02 09 42 25 01 75 01 95 01 81 02 75 01 95 01 81 03 05 01 75 10 55 0e 65 11 09 30 26 ff 7f 35 00 46 15 0c 81 42 09 31 26 ff 7f 46 cb 06 81 42 05 0d 09 30 26 ff 1f 75 10 95 01 81 02 c0 05 0d 09 56 55 00 65 00 27 ff ff ff 7f 95 01 75 20 81 02 09 54 25 7f 95 01 75 08 81 02 75 08 95 08 81 03 85 05 09 55 25 0a 75 08 95 01 b1 02 06 00 ff 09 c5 85 06 15 00 26 ff 00 75 08 96 00 01 b1 02 c0 + * N: HUION Huion Tablet_GS1563 + * I: 3 256c 2009 + * + * DESCRIPTOR 2 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 0 + * # 0x09, 0x0e, // Usage (System Multi-Axis Controller) 2 + * # 0xa1, 0x01, // Collection (Application) 4 + * # 0x85, 0x11, // Report ID (17) 6 + * # 0x05, 0x0d, // Usage Page (Digitizers) 8 + * # 0x09, 0x21, // Usage (Puck) 10 + * # 0xa1, 0x02, // Collection (Logical) 12 + * # 0x15, 0x00, // Logical Minimum (0) 14 + * # 0x25, 0x01, // Logical Maximum (1) 16 + * # 0x75, 0x01, // Report Size (1) 18 + * # 0x95, 0x01, // Report Count (1) 20 + * # 0xa1, 0x00, // Collection (Physical) 22 + * # 0x05, 0x09, // Usage Page (Button) 24 + * # 0x09, 0x01, // Usage (Vendor Usage 0x01) 26 + * # 0x81, 0x02, // Input (Data,Var,Abs) 28 + * # 0x05, 0x0d, // Usage Page (Digitizers) 30 + * # 0x09, 0x33, // Usage (Touch) 32 + * # 0x81, 0x02, // Input (Data,Var,Abs) 34 + * # 0x95, 0x06, // Report Count (6) 36 + * # 0x81, 0x03, // Input (Cnst,Var,Abs) 38 + * # 0xa1, 0x02, // Collection (Logical) 40 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 42 + * # 0x09, 0x37, // Usage (Dial) 44 + * # 0x16, 0x00, 0x80, // Logical Minimum (-32768) 46 + * # 0x26, 0xff, 0x7f, // Logical Maximum (32767) 49 + * # 0x75, 0x10, // Report Size (16) 52 + * # 0x95, 0x01, // Report Count (1) 54 + * # 0x81, 0x06, // Input (Data,Var,Rel) 56 + * # 0x35, 0x00, // Physical Minimum (0) 58 + * # 0x46, 0x10, 0x0e, // Physical Maximum (3600) 60 + * # 0x15, 0x00, // Logical Minimum (0) 63 + * # 0x26, 0x10, 0x0e, // Logical Maximum (3600) 65 + * # 0x09, 0x48, // Usage (Resolution Multiplier) 68 + * # 0xb1, 0x02, // Feature (Data,Var,Abs) 70 + * # 0x45, 0x00, // Physical Maximum (0) 72 + * # 0xc0, // End Collection 74 + * # 0x75, 0x08, // Report Size (8) 75 + * # 0x95, 0x01, // Report Count (1) 77 + * # 0x81, 0x01, // Input (Cnst,Arr,Abs) 79 + * # 0x75, 0x08, // Report Size (8) 81 + * # 0x95, 0x01, // Report Count (1) 83 + * # 0x81, 0x01, // Input (Cnst,Arr,Abs) 85 + * # 0x75, 0x08, // Report Size (8) 87 + * # 0x95, 0x01, // Report Count (1) 89 + * # 0x81, 0x01, // Input (Cnst,Arr,Abs) 91 + * # 0x75, 0x08, // Report Size (8) 93 + * # 0x95, 0x01, // Report Count (1) 95 + * # 0x81, 0x01, // Input (Cnst,Arr,Abs) 97 + * # 0x75, 0x08, // Report Size (8) 99 + * # 0x95, 0x01, // Report Count (1) 101 + * # 0x81, 0x01, // Input (Cnst,Arr,Abs) 103 + * # 0xc0, // End Collection 105 + * # 0xc0, // End Collection 106 + * # 0xc0, // End Collection 107 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 108 + * # 0x09, 0x06, // Usage (Keyboard) 110 + * # 0xa1, 0x01, // Collection (Application) 112 + * # 0x85, 0x03, // Report ID (3) 114 + * # 0x05, 0x07, // Usage Page (Keyboard) 116 + * # 0x19, 0xe0, // Usage Minimum (224) 118 + * # 0x29, 0xe7, // Usage Maximum (231) 120 + * # 0x15, 0x00, // Logical Minimum (0) 122 + * # 0x25, 0x01, // Logical Maximum (1) 124 + * # 0x75, 0x01, // Report Size (1) 126 + * # 0x95, 0x08, // Report Count (8) 128 + * # 0x81, 0x02, // Input (Data,Var,Abs) 130 + * # 0x05, 0x07, // Usage Page (Keyboard) 132 + * # 0x19, 0x00, // Usage Minimum (0) 134 + * # 0x29, 0xff, // Usage Maximum (255) 136 + * # 0x26, 0xff, 0x00, // Logical Maximum (255) 138 + * # 0x75, 0x08, // Report Size (8) 141 + * # 0x95, 0x06, // Report Count (6) 143 + * # 0x81, 0x00, // Input (Data,Arr,Abs) 145 + * # 0xc0, // End Collection 147 + * # 0x05, 0x0c, // Usage Page (Consumer Devices) 148 + * # 0x09, 0x01, // Usage (Consumer Control) 150 + * # 0xa1, 0x01, // Collection (Application) 152 + * # 0x85, 0x04, // Report ID (4) 154 + * # 0x19, 0x01, // Usage Minimum (1) 156 + * # 0x2a, 0x9c, 0x02, // Usage Maximum (668) 158 + * # 0x15, 0x01, // Logical Minimum (1) 161 + * # 0x26, 0x9c, 0x02, // Logical Maximum (668) 163 + * # 0x95, 0x01, // Report Count (1) 166 + * # 0x75, 0x10, // Report Size (16) 168 + * # 0x81, 0x00, // Input (Data,Arr,Abs) 170 + * # 0xc0, // End Collection 172 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 173 + * # 0x09, 0x80, // Usage (System Control) 175 + * # 0xa1, 0x01, // Collection (Application) 177 + * # 0x85, 0x05, // Report ID (5) 179 + * # 0x19, 0x81, // Usage Minimum (129) 181 + * # 0x29, 0x83, // Usage Maximum (131) 183 + * # 0x15, 0x00, // Logical Minimum (0) 185 + * # 0x25, 0x01, // Logical Maximum (1) 187 + * # 0x75, 0x01, // Report Size (1) 189 + * # 0x95, 0x03, // Report Count (3) 191 + * # 0x81, 0x02, // Input (Data,Var,Abs) 193 + * # 0x95, 0x05, // Report Count (5) 195 + * # 0x81, 0x01, // Input (Cnst,Arr,Abs) 197 + * # 0xc0, // End Collection 199 + * # + * R: 200 05 01 09 0e a1 01 85 11 05 0d 09 21 a1 02 15 00 25 01 75 01 95 01 a1 00 05 09 09 01 81 02 05 0d 09 33 81 02 95 06 81 03 a1 02 05 01 09 37 16 00 80 26 ff 7f 75 10 95 01 81 06 35 00 46 10 0e 15 00 26 10 0e 09 48 b1 02 45 00 c0 75 08 95 01 81 01 75 08 95 01 81 01 75 08 95 01 81 01 75 08 95 01 81 01 75 08 95 01 81 01 c0 c0 c0 05 01 09 06 a1 01 85 03 05 07 19 e0 29 e7 15 00 25 01 75 01 95 08 81 02 05 07 19 00 29 ff 26 ff 00 75 08 95 06 81 00 c0 05 0c 09 01 a1 01 85 04 19 01 2a 9c 02 15 01 26 9c 02 95 01 75 10 81 00 c0 05 01 09 80 a1 01 85 05 19 81 29 83 15 00 25 01 75 01 95 03 81 02 95 05 81 01 c0 + * N: HUION Huion Tablet_GS1563 + * I: 3 256c 2009 + * + * + * + * VENDOR MODE + * HUION_FIRMWARE_ID="HUION_M22d_241101" + * HUION_MAGIC_BYTES="1403201101ac9900ff3fd81305080080083c4010" + * + * MAGIC BYTES + * [LogicalMaximum, X ] [LogicalMaximum, Y ] [LogicalMaximum, Pressure] [ LPI] + * 14 03 [ 20 11 01] [ ac 99 00] [ ff 3f] [d8 13] 05 08 00 80 08 3c 40 10 + * + * See Huion__Kamvas13Gen3.bpf.c for more details on detailed button/dial reports and caveats. It's very + * similar to the Kamvas 16 Gen 3. + */ + + +/* Filled in by udev-hid-bpf */ +char UDEV_PROP_HUION_FIRMWARE_ID[64]; + +char EXPECTED_FIRMWARE_ID[] = "HUION_M22d_"; + +__u8 last_button_state; + +static const __u8 disabled_rdesc_tablet[] = { + FixedSizeVendorReport(28) /* Input report 4 */ +}; + +static const __u8 disabled_rdesc_wheel[] = { + FixedSizeVendorReport(9) /* Input report 17 */ +}; + +static const __u8 fixed_rdesc_vendor[] = { + UsagePage_Digitizers + Usage_Dig_Pen + CollectionApplication( + ReportId(VENDOR_REPORT_ID) + UsagePage_Digitizers + Usage_Dig_Pen + CollectionPhysical( + /* + * I have only examined the tablet's behavior while using + * the PW600L pen, which does not have an eraser. + * Because of this, I don't know where the Eraser and Invert + * bits will go, or if they work as one would expect. + * + * For the time being, there is no expectation that a pen + * with an eraser will work without modifications here. + */ + ReportSize(1) + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + ReportCount(3) + Usage_Dig_TipSwitch + Usage_Dig_BarrelSwitch + Usage_Dig_SecondaryBarrelSwitch + Input(Var|Abs) + PushPop( + ReportCount(1) + UsagePage_Button + Usage_i8(0x4a) /* (BTN_STYLUS3 + 1) & 0xff */ + Input(Var|Abs) + ) + ReportCount(3) + Input(Const) + ReportCount(1) + Usage_Dig_InRange + Input(Var|Abs) + ReportSize(16) + ReportCount(1) + PushPop( + UsagePage_GenericDesktop + Unit(cm) + UnitExponent(-2) + LogicalMinimum_i16(0) + PhysicalMinimum_i16(0) + /* + * The tablet has a logical maximum of 69920 x 39340 + * and a claimed resolution of 5080 LPI (200 L/mm) + * This works out to a physical maximum of + * 349.6 x 196.7mm, which matches Huion's advertised + * (rounded) active area dimensions from + * https://www.huion.com/products/pen_display/Kamvas/kamvas-16-gen-3.html + * + * The Kamvas uses data[8] for the 3rd byte of the X-axis, and adding + * that after data[2] and data[3] makes a contiguous little-endian + * 24-bit value. (See BPF_PROG below) + */ + ReportSize(24) + LogicalMaximum_i32(69920) + PhysicalMaximum_i16(3496) + Usage_GD_X + Input(Var|Abs) + ReportSize(16) + LogicalMaximum_i16(39340) + PhysicalMaximum_i16(1967) + Usage_GD_Y + Input(Var|Abs) + ) + ReportSize(16) + LogicalMinimum_i16(0) + LogicalMaximum_i16(16383) + Usage_Dig_TipPressure + Input(Var|Abs) + ReportSize(8) + ReportCount(1) + Input(Const) + ReportCount(2) + PushPop( + Unit(deg) + UnitExponent(0) + LogicalMinimum_i8(-60) + PhysicalMinimum_i8(-60) + LogicalMaximum_i8(60) + PhysicalMaximum_i8(60) + Usage_Dig_XTilt + Usage_Dig_YTilt + Input(Var|Abs) + ) + ) + ) + UsagePage_GenericDesktop + Usage_GD_Keypad + CollectionApplication( + ReportId(CUSTOM_PAD_REPORT_ID) + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + UsagePage_Digitizers + Usage_Dig_TabletFunctionKeys + CollectionPhysical( + /* + * The first 3 bytes are somewhat vestigial and will + * always be set to zero. Their presence here is needed + * to ensure that this device will be detected as a + * tablet pad by software that otherwise wouldn't know + * any better. + */ + /* (data[1] & 0x01) barrel switch */ + ReportSize(1) + ReportCount(1) + Usage_Dig_BarrelSwitch + Input(Var|Abs) + ReportCount(7) + Input(Const) + /* data[2] X */ + /* data[3] Y */ + ReportSize(8) + ReportCount(2) + UsagePage_GenericDesktop + Usage_GD_X + Usage_GD_Y + Input(Var|Abs) + /* + * (data[4] & 0x01) button 1 + * (data[4] & 0x02) button 2 + * (data[4] & 0x04) button 3 + * (data[4] & 0x08) button 4 + * (data[4] & 0x10) button 5 + * (data[4] & 0x20) button 6 + * (data[4] & 0x40) button 7 (top wheel button) + * (data[4] & 0x80) button 8 (bottom wheel button) + */ + ReportSize(1) + ReportCount(8) + UsagePage_Button + UsageMinimum_i8(1) + UsageMaximum_i8(8) + Input(Var|Abs) + /* data[5] top wheel (signed, positive clockwise) */ + ReportSize(8) + ReportCount(1) + UsagePage_GenericDesktop + Usage_GD_Wheel + LogicalMinimum_i8(-1) + LogicalMaximum_i8(1) + Input(Var|Rel) + /* data[6] bottom wheel (signed, positive clockwise) */ + UsagePage_Consumer + Usage_Con_ACPan + Input(Var|Rel) + ) + /* + * The kernel will drop reports that are bigger than the + * largest report specified in the HID descriptor. + * Therefore, our modified descriptor needs to have at least one + * HID report that is as long as, or longer than, the largest + * report in the original descriptor. + * + * This macro expands to a no-op report that is padded to the + * provided length. + */ + FixedSizeVendorReport(VENDOR_REPORT_LENGTH) + ) +}; + +SEC(HID_BPF_RDESC_FIXUP) +int BPF_PROG(hid_fix_rdesc_huion_kamvas16_gen3, struct hid_bpf_ctx *hid_ctx) +{ + __u8 *data = hid_bpf_get_data(hid_ctx, 0 /* offset */, HID_MAX_DESCRIPTOR_SIZE /* size */); + __s32 rdesc_size = hid_ctx->size; + __u8 have_fw_id; + + if (!data) + return 0; /* EPERM check */ + + have_fw_id = __builtin_memcmp(UDEV_PROP_HUION_FIRMWARE_ID, + EXPECTED_FIRMWARE_ID, + sizeof(EXPECTED_FIRMWARE_ID) - 1) == 0; + + if (have_fw_id) { + /* + * Tablet should be in vendor mode. + * Disable the unused devices + */ + if (rdesc_size == TABLET_DESCRIPTOR_LENGTH) { + __builtin_memcpy(data, disabled_rdesc_tablet, + sizeof(disabled_rdesc_tablet)); + return sizeof(disabled_rdesc_tablet); + } + + if (rdesc_size == WHEEL_DESCRIPTOR_LENGTH) { + __builtin_memcpy(data, disabled_rdesc_wheel, + sizeof(disabled_rdesc_wheel)); + return sizeof(disabled_rdesc_wheel); + } + } + + /* + * Regardless of which mode the tablet is in, always fix the vendor + * descriptor in case the udev property just happened to not be set + */ + if (rdesc_size == VENDOR_DESCRIPTOR_LENGTH) { + __builtin_memcpy(data, fixed_rdesc_vendor, sizeof(fixed_rdesc_vendor)); + return sizeof(fixed_rdesc_vendor); + } + + return 0; +} + +SEC(HID_BPF_DEVICE_EVENT) +int BPF_PROG(hid_fix_event_huion_kamvas16_gen3, struct hid_bpf_ctx *hid_ctx) +{ + __u8 *data = hid_bpf_get_data(hid_ctx, 0 /* offset */, VENDOR_REPORT_LENGTH /* size */); + + if (!data) + return 0; /* EPERM check */ + + /* Handle vendor reports only */ + if (hid_ctx->size != VENDOR_REPORT_LENGTH) + return 0; + if (data[0] != VENDOR_REPORT_ID) + return 0; + + __u8 report_subtype = (data[1] >> 4) & 0x0f; + + if (report_subtype == VENDOR_REPORT_SUBTYPE_PEN || + report_subtype == VENDOR_REPORT_SUBTYPE_PEN_OUT) { + /* Invert Y tilt */ + data[11] = -data[11]; + + /* + * Rearrange the bytes of the report so that + * [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13] + * will be arranged as + * [0, 1, 2, 3, 8, 4, 5, 6, 7, 9, 10, 11, 12, 13] + */ + __u8 x_24 = data[8]; + + data[8] = data[7]; + data[7] = data[6]; + data[6] = data[5]; + data[5] = data[4]; + + data[4] = x_24; + + } else if (report_subtype == VENDOR_REPORT_SUBTYPE_BUTTONS || + report_subtype == VENDOR_REPORT_SUBTYPE_WHEELS) { + struct pad_report { + __u8 report_id; + __u8 btn_stylus:1; + __u8 padding:7; + __u8 x; + __u8 y; + __u8 buttons; + __s8 top_wheel; + __s8 bottom_wheel; + } __attribute__((packed)) *pad_report; + + __s8 top_wheel = 0; + __s8 bottom_wheel = 0; + + switch (report_subtype) { + case VENDOR_REPORT_SUBTYPE_WHEELS: + /* + * The wheel direction byte is 1 for clockwise rotation + * and 2 for counter-clockwise. + * Change it to 1 and -1, respectively. + */ + switch (data[3]) { + case 1: + top_wheel = (data[5] == 1) ? 1 : -1; + break; + case 2: + bottom_wheel = (data[5] == 1) ? 1 : -1; + break; + } + break; + + case VENDOR_REPORT_SUBTYPE_BUTTONS: + /* + * If a button is already being held, ignore any new + * button event unless it's a release. + * + * The tablet only cleanly handles one button being held + * at a time, and trying to hold multiple buttons + * (particularly wheel+pad buttons) can result in sequences + * of reports that look like imaginary presses and releases. + * + * This is an imperfect way to filter out some of these + * reports. + */ + if (last_button_state != 0x00 && data[4] != 0x00) + break; + + last_button_state = data[4]; + break; + } + + pad_report = (struct pad_report *)data; + + pad_report->report_id = CUSTOM_PAD_REPORT_ID; + pad_report->btn_stylus = 0; + pad_report->x = 0; + pad_report->y = 0; + pad_report->buttons = last_button_state; + pad_report->top_wheel = top_wheel; + pad_report->bottom_wheel = bottom_wheel; + + return sizeof(struct pad_report); + } + + return 0; +} + +HID_BPF_OPS(huion_kamvas16_gen3) = { + .hid_device_event = (void *)hid_fix_event_huion_kamvas16_gen3, + .hid_rdesc_fixup = (void *)hid_fix_rdesc_huion_kamvas16_gen3, +}; + +SEC("syscall") +int probe(struct hid_bpf_probe_args *ctx) +{ + switch (ctx->rdesc_size) { + case VENDOR_DESCRIPTOR_LENGTH: + case TABLET_DESCRIPTOR_LENGTH: + case WHEEL_DESCRIPTOR_LENGTH: + ctx->retval = 0; + break; + default: + ctx->retval = -EINVAL; + } + + return 0; +} + +char _license[] SEC("license") = "GPL"; diff --git a/drivers/hid/bpf/progs/Logitech__SpaceNavigator.bpf.c b/drivers/hid/bpf/progs/Logitech__SpaceNavigator.bpf.c new file mode 100644 index 000000000000..b17719d6d9c7 --- /dev/null +++ b/drivers/hid/bpf/progs/Logitech__SpaceNavigator.bpf.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2025 Curran Muhlberger + */ + +#include "vmlinux.h" +#include "hid_bpf.h" +#include "hid_bpf_helpers.h" +#include <bpf/bpf_tracing.h> + +#define VID_LOGITECH 0x046D +#define PID_SPACENAVIGATOR 0xC626 + +HID_BPF_CONFIG( + HID_DEVICE(BUS_USB, HID_GROUP_ANY, VID_LOGITECH, PID_SPACENAVIGATOR) +); + +/* + * The 3Dconnexion SpaceNavigator 3D Mouse is a multi-axis controller with 6 + * axes (grouped as X,Y,Z and Rx,Ry,Rz). Axis data is absolute, but the report + * descriptor erroneously declares it to be relative. We fix the report + * descriptor to mark both axis collections as absolute. + * + * The kernel attempted to fix this in commit 24985cf68612 (HID: support + * Logitech/3DConnexion SpaceTraveler and SpaceNavigator), but the descriptor + * data offsets are incorrect for at least some SpaceNavigator units. + */ + +SEC(HID_BPF_RDESC_FIXUP) +int BPF_PROG(hid_fix_rdesc, struct hid_bpf_ctx *hctx) +{ + __u8 *data = hid_bpf_get_data(hctx, 0 /* offset */, 4096 /* size */); + + if (!data) + return 0; /* EPERM check */ + + /* Offset of Input item in X,Y,Z and Rx,Ry,Rz collections for all known + * firmware variants. + * - 2009 model: X,Y,Z @ 32-33, Rx,Ry,Rz @ 49-50 (fixup originally + * applied in kernel) + * - 2016 model (size==228): X,Y,Z @ 36-37, Rx,Ry,Rz @ 53-54 + * + * The descriptor size of the 2009 model is not known, and there is evidence + * for at least two other variants (with sizes 202 & 217) besides the 2016 + * model, so we try all known offsets regardless of descriptor size. + */ + const u8 offsets[] = {32, 36, 49, 53}; + + for (size_t idx = 0; idx < ARRAY_SIZE(offsets); idx++) { + u8 offset = offsets[idx]; + + /* if Input (Data,Var,Rel) , make it Input (Data,Var,Abs) */ + if (data[offset] == 0x81 && data[offset + 1] == 0x06) + data[offset + 1] = 0x02; + } + + return 0; +} + +HID_BPF_OPS(logitech_spacenavigator) = { + .hid_rdesc_fixup = (void *)hid_fix_rdesc, +}; + +SEC("syscall") +int probe(struct hid_bpf_probe_args *ctx) +{ + /* Ensure report descriptor size matches one of the known variants. */ + if (ctx->rdesc_size != 202 && + ctx->rdesc_size != 217 && + ctx->rdesc_size != 228) { + ctx->retval = -EINVAL; + return 0; + } + + /* Check whether the kernel has already applied the fix. */ + if ((ctx->rdesc[32] == 0x81 && ctx->rdesc[33] == 0x02 && + ctx->rdesc[49] == 0x81 && ctx->rdesc[50] == 0x02) || + (ctx->rdesc[36] == 0x81 && ctx->rdesc[37] == 0x02 && + ctx->rdesc[53] == 0x81 && ctx->rdesc[54] == 0x02)) + ctx->retval = -EINVAL; + else + ctx->retval = 0; + + return 0; +} + +char _license[] SEC("license") = "GPL"; diff --git a/drivers/hid/bpf/progs/WALTOP__Batteryless-Tablet.bpf.c b/drivers/hid/bpf/progs/WALTOP__Batteryless-Tablet.bpf.c new file mode 100644 index 000000000000..156d75af516d --- /dev/null +++ b/drivers/hid/bpf/progs/WALTOP__Batteryless-Tablet.bpf.c @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2025 Red Hat + */ + +#include "vmlinux.h" +#include "hid_bpf.h" +#include "hid_bpf_helpers.h" +#include <bpf/bpf_tracing.h> + +#define VID_WALTOP 0x172F +#define PID_BATTERYLESS_TABLET 0x0505 + +HID_BPF_CONFIG( + HID_DEVICE(BUS_USB, HID_GROUP_ANY, VID_WALTOP, PID_BATTERYLESS_TABLET) +); + +#define EXPECTED_RDESC_SIZE 335 +#define PEN_REPORT_ID 16 + +#define TIP_SWITCH BIT(0) +#define BARREL_SWITCH BIT(1) +#define SECONDARY_BARREL_SWITCH BIT(5) + +static __u8 last_button_state; + +static const __u8 fixed_rdesc[] = { + 0x05, 0x01, // Usage Page (Generic Desktop) + 0x09, 0x02, // Usage (Mouse) + 0xa1, 0x01, // Collection (Application) + 0x85, 0x01, // Report ID (1) + 0x09, 0x01, // Usage (Pointer) + 0xa1, 0x00, // Collection (Physical) + 0x05, 0x09, // Usage Page (Button) + 0x19, 0x01, // Usage Minimum (1) + 0x29, 0x05, // Usage Maximum (5) + 0x15, 0x00, // Logical Minimum (0) + 0x25, 0x01, // Logical Maximum (1) + 0x75, 0x01, // Report Size (1) + 0x95, 0x05, // Report Count (5) + 0x81, 0x02, // Input (Data,Var,Abs) + 0x75, 0x03, // Report Size (3) + 0x95, 0x01, // Report Count (1) + 0x81, 0x03, // Input (Cnst,Var,Abs) + 0x05, 0x01, // Usage Page (Generic Desktop) + 0x09, 0x30, // Usage (X) + 0x09, 0x31, // Usage (Y) + 0x09, 0x38, // Usage (Wheel) + 0x15, 0x81, // Logical Minimum (-127) + 0x25, 0x7f, // Logical Maximum (127) + 0x75, 0x08, // Report Size (8) + 0x95, 0x03, // Report Count (3) + 0x81, 0x06, // Input (Data,Var,Rel) + 0x05, 0x0c, // Usage Page (Consumer) + 0x15, 0x81, // Logical Minimum (-127) + 0x25, 0x7f, // Logical Maximum (127) + 0x75, 0x08, // Report Size (8) + 0x95, 0x01, // Report Count (1) + 0x0a, 0x38, 0x02, // Usage (AC Pan) + 0x81, 0x06, // Input (Data,Var,Rel) + 0xc0, // End Collection + 0xc0, // End Collection + 0x05, 0x0d, // Usage Page (Digitizers) + 0x09, 0x02, // Usage (Pen) + 0xa1, 0x01, // Collection (Application) + 0x85, 0x02, // Report ID (2) + 0x09, 0x20, // Usage (Stylus) + 0xa1, 0x00, // Collection (Physical) + 0x09, 0x00, // Usage (0x0000) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0xff, 0x00, // Logical Maximum (255) + 0x75, 0x08, // Report Size (8) + 0x95, 0x09, // Report Count (9) + 0x81, 0x02, // Input (Data,Var,Abs) + 0x09, 0x3f, // Usage (Azimuth) + 0x09, 0x40, // Usage (Altitude) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0xff, 0x00, // Logical Maximum (255) + 0x75, 0x08, // Report Size (8) + 0x95, 0x02, // Report Count (2) + 0xb1, 0x02, // Feature (Data,Var,Abs) + 0xc0, // End Collection + 0x85, 0x05, // Report ID (5) + 0x05, 0x0d, // Usage Page (Digitizers) + 0x09, 0x20, // Usage (Stylus) + 0xa1, 0x00, // Collection (Physical) + 0x09, 0x00, // Usage (0x0000) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0xff, 0x00, // Logical Maximum (255) + 0x75, 0x08, // Report Size (8) + 0x95, 0x07, // Report Count (7) + 0x81, 0x02, // Input (Data,Var,Abs) + 0xc0, // End Collection + 0x85, 0x0a, // Report ID (10) + 0x05, 0x0d, // Usage Page (Digitizers) + 0x09, 0x20, // Usage (Stylus) + 0xa1, 0x00, // Collection (Physical) + 0x09, 0x00, // Usage (0x0000) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0xff, 0x00, // Logical Maximum (255) + 0x75, 0x08, // Report Size (8) + 0x95, 0x07, // Report Count (7) + 0x81, 0x02, // Input (Data,Var,Abs) + 0xc0, // End Collection + 0x85, 0x10, // Report ID (16) + 0x09, 0x20, // Usage (Stylus) + 0xa1, 0x00, // Collection (Physical) + 0x09, 0x42, // Usage (Tip Switch) + 0x09, 0x44, // Usage (Barrel Switch) + 0x09, 0x3c, // Usage (Invert) + 0x09, 0x45, // Usage (Eraser) + 0x09, 0x32, // Usage (In Range) + 0x09, 0x5a, // Usage (Secondary Barrel Switch) <-- added + 0x15, 0x00, // Logical Minimum (0) + 0x25, 0x01, // Logical Maximum (1) + 0x75, 0x01, // Report Size (1) + 0x95, 0x06, // Report Count (6) <--- changed from 5 + 0x81, 0x02, // Input (Data,Var,Abs) + 0x95, 0x02, // Report Count (2) <--- changed from 3 + 0x81, 0x03, // Input (Cnst,Var,Abs) + 0x05, 0x01, // Usage Page (Generic Desktop) + 0x09, 0x30, // Usage (X) + 0x75, 0x10, // Report Size (16) + 0x95, 0x01, // Report Count (1) + 0xa4, // Push + 0x55, 0x0d, // Unit Exponent (-3) + 0x65, 0x33, // Unit (EnglishLinear: in³) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0x00, 0x7d, // Logical Maximum (32000) + 0x35, 0x00, // Physical Minimum (0) + 0x46, 0x00, 0x7d, // Physical Maximum (32000) + 0x81, 0x02, // Input (Data,Var,Abs) + 0x09, 0x31, // Usage (Y) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0x20, 0x4e, // Logical Maximum (20000) + 0x35, 0x00, // Physical Minimum (0) + 0x46, 0x20, 0x4e, // Physical Maximum (20000) + 0x81, 0x02, // Input (Data,Var,Abs) + 0x05, 0x0d, // Usage Page (Digitizers) + 0x09, 0x30, // Usage (Tip Pressure) + 0x15, 0x00, // Logical Minimum (0) + 0x26, 0xff, 0x07, // Logical Maximum (2047) + 0x35, 0x00, // Physical Minimum (0) + 0x46, 0xff, 0x07, // Physical Maximum (2047) + 0x81, 0x02, // Input (Data,Var,Abs) + 0x05, 0x0d, // Usage Page (Digitizers) + 0x09, 0x3d, // Usage (X Tilt) + 0x09, 0x3e, // Usage (Y Tilt) + 0x15, 0xc4, // Logical Minimum (-60) <- changed from -127 + 0x25, 0x3c, // Logical Maximum (60) <- changed from 127 + 0x75, 0x08, // Report Size (8) + 0x95, 0x02, // Report Count (2) + 0x81, 0x02, // Input (Data,Var,Abs) + 0xc0, // End Collection + 0xc0, // End Collection + 0x05, 0x01, // Usage Page (Generic Desktop) + 0x09, 0x06, // Usage (Keyboard) + 0xa1, 0x01, // Collection (Application) + 0x85, 0x0d, // Report ID (13) + 0x05, 0x07, // Usage Page (Keyboard/Keypad) + 0x19, 0xe0, // Usage Minimum (224) + 0x29, 0xe7, // Usage Maximum (231) + 0x15, 0x00, // Logical Minimum (0) + 0x25, 0x01, // Logical Maximum (1) + 0x75, 0x01, // Report Size (1) + 0x95, 0x08, // Report Count (8) + 0x81, 0x02, // Input (Data,Var,Abs) + 0x75, 0x08, // Report Size (8) + 0x95, 0x01, // Report Count (1) + 0x81, 0x01, // Input (Cnst,Arr,Abs) + 0x05, 0x07, // Usage Page (Keyboard/Keypad) + 0x19, 0x00, // Usage Minimum (0) + 0x29, 0x65, // Usage Maximum (101) + 0x15, 0x00, // Logical Minimum (0) + 0x25, 0x65, // Logical Maximum (101) + 0x75, 0x08, // Report Size (8) + 0x95, 0x05, // Report Count (5) + 0x81, 0x00, // Input (Data,Arr,Abs) + 0xc0, // End Collection + 0x05, 0x0c, // Usage Page (Consumer) + 0x09, 0x01, // Usage (Consumer Control) + 0xa1, 0x01, // Collection (Application) + 0x85, 0x0c, // Report ID (12) + 0x09, 0xe9, // Usage (Volume Increment) + 0x09, 0xea, // Usage (Volume Decrement) + 0x09, 0xe2, // Usage (Mute) + 0x15, 0x00, // Logical Minimum (0) + 0x25, 0x01, // Logical Maximum (1) + 0x75, 0x01, // Report Size (1) + 0x95, 0x03, // Report Count (3) + 0x81, 0x06, // Input (Data,Var,Rel) + 0x75, 0x05, // Report Size (5) + 0x95, 0x01, // Report Count (1) + 0x81, 0x07, // Input (Cnst,Var,Rel) + 0xc0, // End Collection +}; + +static inline unsigned int bitwidth32(__u32 x) +{ + return 32 - __builtin_clzg(x, 32); +} + +static inline unsigned int floor_log2_32(__u32 x) +{ + return bitwidth32(x) - 1; +} + +/* Maps the interval [0, 2047] to itself using a scaled + * approximation of the function log2(x+1). + */ +static unsigned int scaled_log2(__u16 v) +{ + const unsigned int XMAX = 2047; + const unsigned int YMAX = 11; /* log2(2048) = 11 */ + + unsigned int x = v + 1; + unsigned int n = floor_log2_32(x); + unsigned int b = 1 << n; + + /* Fixed-point fraction in [0, 1), linearly + * interpolated using delta-y = 1 and + * delta-x = (2b - b) = b. + */ + unsigned int frac = (x - b) << YMAX; + unsigned int lerp = frac / b; + unsigned int log2 = (n << YMAX) + lerp; + + return ((log2 * XMAX) / YMAX) >> YMAX; +} + +SEC(HID_BPF_RDESC_FIXUP) +int BPF_PROG(hid_fix_rdesc, struct hid_bpf_ctx *hctx) +{ + __u8 *data = hid_bpf_get_data(hctx, 0 /* offset */, 4096 /* size */); + + if (!data) + return 0; /* EPERM check */ + + __builtin_memcpy(data, fixed_rdesc, sizeof(fixed_rdesc)); + + return sizeof(fixed_rdesc); +} + +SEC(HID_BPF_DEVICE_EVENT) +int BPF_PROG(waltop_fix_events, struct hid_bpf_ctx *hctx) +{ + __u8 *data = hid_bpf_get_data(hctx, 0 /* offset */, 10 /* size */); + + if (!data) + return 0; /* EPERM check */ + + __u8 report_id = data[0]; + + if (report_id != PEN_REPORT_ID) + return 0; + + /* On this tablet if the secondary barrel switch is pressed, + * the tablet sends tip down and barrel down. Change this to + * just secondary barrel down when there is no ambiguity. + * + * It's possible that there is a bug in the firmware and the + * device intends to set invert + eraser instead (i.e. the + * pysical button is an eraser button) but since + * the pressure is always zero, said eraser button + * would be useless anyway. + * + * So let's just change the button to secondary barrel down. + */ + + __u8 tip_switch = data[1] & TIP_SWITCH; + __u8 barrel_switch = data[1] & BARREL_SWITCH; + + __u8 tip_held = last_button_state & TIP_SWITCH; + __u8 barrel_held = last_button_state & BARREL_SWITCH; + + if (tip_switch && barrel_switch && !tip_held && !barrel_held) { + data[1] &= ~(TIP_SWITCH | BARREL_SWITCH); /* release tip and barrel */ + data[1] |= SECONDARY_BARREL_SWITCH; /* set secondary barrel switch */ + } + + last_button_state = data[1]; + + /* The pressure sensor on this tablet maps around half of the + * logical pressure range into the interval [0-100]. Further + * pressure causes the sensor value to increase exponentially + * up to a maximum value of 2047. + * + * The values 12 and 102 were chosen to have an integer slope + * with smooth transition between the two curves around the + * value 100. + */ + + __u16 pressure = (((__u16)data[6]) << 0) | (((__u16)data[7]) << 8); + + if (pressure <= 102) + pressure *= 12; + else + pressure = scaled_log2(pressure); + + data[6] = pressure >> 0; + data[7] = pressure >> 8; + + return 0; +} + +HID_BPF_OPS(waltop_batteryless) = { + .hid_device_event = (void *)waltop_fix_events, + .hid_rdesc_fixup = (void *)hid_fix_rdesc, +}; + +SEC("syscall") +int probe(struct hid_bpf_probe_args *ctx) +{ + if (ctx->rdesc_size == EXPECTED_RDESC_SIZE) + ctx->retval = 0; + else + ctx->retval = -EINVAL; + + return 0; +} + +char _license[] SEC("license") = "GPL"; diff --git a/drivers/hid/bpf/progs/XPPen__Deco01V3.bpf.c b/drivers/hid/bpf/progs/XPPen__Deco01V3.bpf.c new file mode 100644 index 000000000000..2502fcc9ede6 --- /dev/null +++ b/drivers/hid/bpf/progs/XPPen__Deco01V3.bpf.c @@ -0,0 +1,305 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (c) 2025 Red Hat + */ + +#include "vmlinux.h" +#include "hid_bpf.h" +#include "hid_bpf_helpers.h" +#include "hid_report_helpers.h" +#include <bpf/bpf_tracing.h> + +#define VID_UGEE 0x28BD /* VID is shared with SinoWealth and Glorious and prob others */ +#define PID_DECO_01_V3 0x0947 + +HID_BPF_CONFIG( + HID_DEVICE(BUS_USB, HID_GROUP_GENERIC, VID_UGEE, PID_DECO_01_V3), +); + +/* + * Default report descriptor reports: + * - a report descriptor for the pad buttons, reported as key sequences + * - a report descriptor for the pen + * - a vendor-specific report descriptor + * + * The Pad report descriptor, see + * https://gitlab.freedesktop.org/libevdev/udev-hid-bpf/-/issues/54 + * + * # Report descriptor length: 102 bytes + * 0x05, 0x01, // Usage Page (Generic Desktop) 0 + * 0x09, 0x02, // Usage (Mouse) 2 + * 0xa1, 0x01, // Collection (Application) 4 + * 0x85, 0x09, // Report ID (9) 6 + * 0x09, 0x01, // Usage (Pointer) 8 + * 0xa1, 0x00, // Collection (Physical) 10 + * 0x05, 0x09, // Usage Page (Button) 12 + * 0x19, 0x01, // UsageMinimum (1) 14 + * 0x29, 0x03, // UsageMaximum (3) 16 + * 0x15, 0x00, // Logical Minimum (0) 18 + * 0x25, 0x01, // Logical Maximum (1) 20 + * 0x95, 0x03, // Report Count (3) 22 + * 0x75, 0x01, // Report Size (1) 24 + * 0x81, 0x02, // Input (Data,Var,Abs) 26 + * 0x95, 0x05, // Report Count (5) 28 + * 0x81, 0x01, // Input (Cnst,Arr,Abs) 30 + * 0x05, 0x01, // Usage Page (Generic Desktop) 32 + * 0x09, 0x30, // Usage (X) 34 + * 0x09, 0x31, // Usage (Y) 36 + * 0x26, 0xff, 0x7f, // Logical Maximum (32767) 38 + * 0x95, 0x02, // Report Count (2) 41 + * 0x75, 0x10, // Report Size (16) 43 + * 0x81, 0x02, // Input (Data,Var,Abs) 45 + * 0x05, 0x0d, // Usage Page (Digitizers) 47 + * 0x09, 0x30, // Usage (Tip Pressure) 49 + * 0x26, 0xff, 0x07, // Logical Maximum (2047) 51 + * 0x95, 0x01, // Report Count (1) 54 + * 0x75, 0x10, // Report Size (16) 56 + * 0x81, 0x02, // Input (Data,Var,Abs) 58 + * 0xc0, // End Collection 60 + * 0xc0, // End Collection 61 + * 0x05, 0x01, // Usage Page (Generic Desktop) 62 + * 0x09, 0x06, // Usage (Keyboard) 64 + * 0xa1, 0x01, // Collection (Application) 66 + * 0x85, 0x06, // Report ID (6) 68 + * 0x05, 0x07, // Usage Page (Keyboard/Keypad) 70 + * 0x19, 0xe0, // UsageMinimum (224) 72 + * 0x29, 0xe7, // UsageMaximum (231) 74 + * 0x15, 0x00, // Logical Minimum (0) 76 + * 0x25, 0x01, // Logical Maximum (1) 78 + * 0x75, 0x01, // Report Size (1) 80 + * 0x95, 0x08, // Report Count (8) 82 + * 0x81, 0x02, // Input (Data,Var,Abs) 84 + * 0x05, 0x07, // Usage Page (Keyboard/Keypad) 86 + * 0x19, 0x00, // UsageMinimum (0) 88 + * 0x29, 0xff, // UsageMaximum (255) 90 + * 0x26, 0xff, 0x00, // Logical Maximum (255) 92 + * 0x75, 0x08, // Report Size (8) 95 + * 0x95, 0x06, // Report Count (6) 97 + * 0x81, 0x00, // Input (Data,Arr,Abs) 99 + * 0xc0, // End Collection 101 + * + * And key events for buttons top->bottom are: + * Buttons released: 06 00 00 00 00 00 00 00 + * Button1: 06 00 05 00 00 00 00 00 -> b + * Button2: 06 00 08 00 00 00 00 00 -> e + * Button3: 06 04 00 00 00 00 00 00 -> LAlt + * Button4: 06 00 2c 00 00 00 00 00 -> Space + * Button5: 06 01 16 00 00 00 00 00 -> LControl + s + * Button6: 06 01 1d 00 00 00 00 00 -> LControl + z + * Button7: 06 01 57 00 00 00 00 00 -> LControl + Keypad Plus + * Button8: 06 01 56 00 00 00 00 00 -> LControl + Keypad Dash + * + * When multiple buttons are pressed at the same time, the values used to + * identify the buttons are identical, but they appear in different bytes of the + * record. For example, when button 2 (0x08) and button 1 (0x05) are pressed, + * this is the report: + * + * Buttons 2 and 1: 06 00 08 05 00 00 00 00 -> e + b + * + * Buttons 1, 2, 4, 5 and 6 can be matched by finding their values in the + * report. + * + * Button 3 is pressed when the 3rd bit is 1. For example, pressing buttons 3 + * and 5 generates this report: + * + * Buttons 3 and 5: 06 05 16 00 00 00 00 00 -> LControl + LAlt + s + * -- -- + * | | + * | `- Button 5 (0x16) + * `- 0x05 = 0101. Button 3 is pressed + * ^ + * + * pad_buttons contains a list of buttons that can be matched in + * HID_BPF_DEVICE_EVENT. Button 3 as it has a dedicated bit. + * + * + * The Pen report descriptor announces a wrong tilt range: + * + * Report descriptor length: 109 bytes + * 0x05, 0x0d, // Usage Page (Digitizers) 0 + * 0x09, 0x02, // Usage (Pen) 2 + * 0xa1, 0x01, // Collection (Application) 4 + * 0x85, 0x07, // Report ID (7) 6 + * 0x09, 0x20, // Usage (Stylus) 8 + * 0xa1, 0x01, // Collection (Application) 10 + * 0x09, 0x42, // Usage (Tip Switch) 12 + * 0x09, 0x44, // Usage (Barrel Switch) 14 + * 0x09, 0x45, // Usage (Eraser) 16 + * 0x09, 0x3c, // Usage (Invert) 18 + * 0x15, 0x00, // Logical Minimum (0) 20 + * 0x25, 0x01, // Logical Maximum (1) 22 + * 0x75, 0x01, // Report Size (1) 24 + * 0x95, 0x04, // Report Count (4) 26 + * 0x81, 0x02, // Input (Data,Var,Abs) 28 + * 0x95, 0x01, // Report Count (1) 30 + * 0x81, 0x03, // Input (Cnst,Var,Abs) 32 + * 0x09, 0x32, // Usage (In Range) 34 + * 0x95, 0x01, // Report Count (1) 36 + * 0x81, 0x02, // Input (Data,Var,Abs) 38 + * 0x95, 0x02, // Report Count (2) 40 + * 0x81, 0x03, // Input (Cnst,Var,Abs) 42 + * 0x75, 0x10, // Report Size (16) 44 + * 0x95, 0x01, // Report Count (1) 46 + * 0x35, 0x00, // Physical Minimum (0) 48 + * 0xa4, // Push 50 + * 0x05, 0x01, // Usage Page (Generic Desktop) 51 + * 0x09, 0x30, // Usage (X) 53 + * 0x65, 0x13, // Unit (EnglishLinear: in) 55 + * 0x55, 0x0d, // Unit Exponent (-3) 57 + * 0x46, 0x10, 0x27, // Physical Maximum (10000) 59 + * 0x26, 0xff, 0x7f, // Logical Maximum (32767) 62 + * 0x81, 0x02, // Input (Data,Var,Abs) 65 + * 0x09, 0x31, // Usage (Y) 67 + * 0x46, 0x6a, 0x18, // Physical Maximum (6250) 69 + * 0x26, 0xff, 0x7f, // Logical Maximum (32767) 72 + * 0x81, 0x02, // Input (Data,Var,Abs) 75 + * 0xb4, // Pop 77 + * 0x09, 0x30, // Usage (X) 78 + * 0x45, 0x00, // Physical Maximum (0) 80 + * 0x26, 0xff, 0x3f, // Logical Maximum (16383) 82 + * 0x81, 0x42, // Input (Data,Var,Abs,Null) 85 + * 0x09, 0x3d, // Usage (Start) 87 + * 0x15, 0x81, // Logical Minimum (-127) 89 <- Change from -127 to -60 + * 0x25, 0x7f, // Logical Maximum (127) 91 <- Change from 127 to 60 + * 0x75, 0x08, // Report Size (8) 93 + * 0x95, 0x01, // Report Count (1) 95 + * 0x81, 0x02, // Input (Data,Var,Abs) 97 + * 0x09, 0x3e, // Usage (Select) 99 + * 0x15, 0x81, // Logical Minimum (-127) 101 <- Change from -127 to -60 + * 0x25, 0x7f, // Logical Maximum (127) 103 <- Change from 127 to 60 + * 0x81, 0x02, // Input (Data,Var,Abs) 105 + * 0xc0, // End Collection 107 + * 0xc0, // End Collection 108 + */ + +#define PEN_REPORT_DESCRIPTOR_LENGTH 109 +#define PAD_REPORT_DESCRIPTOR_LENGTH 102 +#define PAD_REPORT_LENGTH 8 +#define PAD_REPORT_ID 6 +#define PAD_NUM_BUTTONS 8 + +static const __u8 fixed_rdesc_pad[] = { + UsagePage_GenericDesktop + Usage_GD_Keypad + CollectionApplication( + // Byte 0 in report is the report ID + ReportId(PAD_REPORT_ID) + ReportCount(1) + ReportSize(8) + UsagePage_Digitizers + Usage_Dig_TabletFunctionKeys + CollectionPhysical( + // Byte 1 is the button state + UsagePage_Button + UsageMinimum_i8(0x01) + UsageMaximum_i8(PAD_NUM_BUTTONS) + LogicalMinimum_i8(0x0) + LogicalMaximum_i8(0x1) + ReportCount(PAD_NUM_BUTTONS) + ReportSize(1) + Input(Var|Abs) + // Byte 2 in report - just exists so we get to be a tablet pad + UsagePage_Digitizers + Usage_Dig_BarrelSwitch // BTN_STYLUS + ReportCount(1) + ReportSize(1) + Input(Var|Abs) + ReportCount(7) // padding + Input(Const) + // Bytes 3/4 in report - just exists so we get to be a tablet pad + UsagePage_GenericDesktop + Usage_GD_X + Usage_GD_Y + ReportCount(2) + ReportSize(8) + Input(Var|Abs) + // Byte 5-7 are padding so we match the original report lengtth + ReportCount(3) + ReportSize(8) + Input(Const) + ) + ) +}; + +SEC(HID_BPF_RDESC_FIXUP) +int BPF_PROG(xppen_deco01v3_rdesc_fixup, struct hid_bpf_ctx *hctx) +{ + __u8 *data = hid_bpf_get_data(hctx, 0 /* offset */, HID_MAX_DESCRIPTOR_SIZE /* size */); + + const __u8 wrong_logical_range[] = {0x15, 0x81, 0x25, 0x7f}; + const __u8 correct_logical_range[] = {0x15, 0xc4, 0x25, 0x3c}; + + if (!data) + return 0; /* EPERM check */ + + switch (hctx->size) { + case PAD_REPORT_DESCRIPTOR_LENGTH: + __builtin_memcpy(data, fixed_rdesc_pad, sizeof(fixed_rdesc_pad)); + return sizeof(fixed_rdesc_pad); + case PEN_REPORT_DESCRIPTOR_LENGTH: + if (__builtin_memcmp(&data[89], wrong_logical_range, + sizeof(wrong_logical_range)) == 0) + __builtin_memcpy(&data[89], correct_logical_range, + sizeof(correct_logical_range)); + if (__builtin_memcmp(&data[101], wrong_logical_range, + sizeof(wrong_logical_range)) == 0) + __builtin_memcpy(&data[101], correct_logical_range, + sizeof(correct_logical_range)); + break; + } + + return 0; +} + +SEC(HID_BPF_DEVICE_EVENT) +int BPF_PROG(xppen_deco01v3_device_event, struct hid_bpf_ctx *hctx) +{ + static const __u8 pad_buttons[] = { 0x05, 0x08, 0x00, 0x2c, 0x16, 0x1d, 0x57, 0x56 }; + __u8 *data = hid_bpf_get_data(hctx, 0 /* offset */, PAD_REPORT_LENGTH /* size */); + + if (!data) + return 0; /* EPERM check */ + + if (data[0] == PAD_REPORT_ID) { + __u8 button_mask = 0; + size_t d, b; + + /* data[1] stores the status of BTN_2 in the 3rd bit*/ + if (data[1] & BIT(2)) + button_mask |= BIT(2); + + /* The rest of the descriptor stores the buttons as in pad_buttons */ + for (d = 2; d < 8; d++) { + for (b = 0; b < sizeof(pad_buttons); b++) { + if (data[d] != 0 && data[d] == pad_buttons[b]) + button_mask |= BIT(b); + } + } + + __u8 report[8] = {PAD_REPORT_ID, button_mask, 0x00}; + + __builtin_memcpy(data, report, sizeof(report)); + } + return 0; +} + +HID_BPF_OPS(xppen_deco01v3) = { + .hid_rdesc_fixup = (void *)xppen_deco01v3_rdesc_fixup, + .hid_device_event = (void *)xppen_deco01v3_device_event, +}; + +SEC("syscall") +int probe(struct hid_bpf_probe_args *ctx) +{ + switch (ctx->rdesc_size) { + case PAD_REPORT_DESCRIPTOR_LENGTH: + case PEN_REPORT_DESCRIPTOR_LENGTH: + ctx->retval = 0; + break; + default: + ctx->retval = -EINVAL; + } + + return 0; +} + +char _license[] SEC("license") = "GPL"; diff --git a/drivers/hid/bpf/progs/XPPen__Deco02.bpf.c b/drivers/hid/bpf/progs/XPPen__Deco02.bpf.c new file mode 100644 index 000000000000..4b2549031e56 --- /dev/null +++ b/drivers/hid/bpf/progs/XPPen__Deco02.bpf.c @@ -0,0 +1,359 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include "vmlinux.h" +#include "hid_bpf.h" +#include "hid_bpf_helpers.h" +#include "hid_report_helpers.h" +#include <bpf/bpf_tracing.h> + +#define VID_UGEE 0x28BD +#define PID_DECO_02 0x0803 + +HID_BPF_CONFIG( + HID_DEVICE(BUS_USB, HID_GROUP_GENERIC, VID_UGEE, PID_DECO_02), +); + +/* + * Devices are: + * - Pad input, including pen (This is the only one we are interested in) + * - Pen input as mouse + * - Vendor + * + * Descriptors on main device are: + * - 7: Pen + * - 6: Vendor settings? Unclear + * - 3: Keyboard (This is what we want to modify) + * - 5: Feature report + * + * This creates three event nodes: + * - XP-PEN DECO 02 Stylus + * - XP-PEN DECO 02 + * - XP-PEN DECO 02 Keyboard (Again, what we want to modify) + * + * # Report descriptor length: 188 bytes + * # 0x05, 0x0d, // Usage Page (Digitizers) 0 + * # 0x09, 0x02, // Usage (Pen) 2 + * # 0xa1, 0x01, // Collection (Application) 4 + * # 0x85, 0x07, // Report ID (7) 6 + * # 0x09, 0x20, // Usage (Stylus) 8 + * # 0xa1, 0x00, // Collection (Physical) 10 + * # 0x09, 0x42, // Usage (Tip Switch) 12 + * # 0x09, 0x44, // Usage (Barrel Switch) 14 + * # 0x09, 0x45, // Usage (Eraser) 16 + * # 0x09, 0x3c, // Usage (Invert) 18 + * # 0x09, 0x32, // Usage (In Range) 20 + * # 0x15, 0x00, // Logical Minimum (0) 22 + * # 0x25, 0x01, // Logical Maximum (1) 24 + * # 0x75, 0x01, // Report Size (1) 26 + * # 0x95, 0x05, // Report Count (5) 28 + * # 0x81, 0x02, // Input (Data,Var,Abs) 30 + * # 0x95, 0x03, // Report Count (3) 32 + * # 0x81, 0x03, // Input (Cnst,Var,Abs) 34 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 36 + * # 0x09, 0x30, // Usage (X) 38 + * # 0x15, 0x00, // Logical Minimum (0) 40 + * # 0x26, 0x50, 0x57, // Logical Maximum (22352) 42 + * # 0x55, 0x0d, // Unit Exponent (-3) 45 + * # 0x65, 0x13, // Unit (EnglishLinear: in) 47 + * # 0x35, 0x00, // Physical Minimum (0) 49 + * # 0x46, 0x50, 0x57, // Physical Maximum (22352) 51 + * # 0x75, 0x10, // Report Size (16) 54 + * # 0x95, 0x01, // Report Count (1) 56 + * # 0x81, 0x02, // Input (Data,Var,Abs) 58 + * # 0x09, 0x31, // Usage (Y) 60 + * # 0x15, 0x00, // Logical Minimum (0) 62 + * # 0x26, 0x92, 0x36, // Logical Maximum (13970) 64 + * # 0x55, 0x0d, // Unit Exponent (-3) 67 + * # 0x65, 0x13, // Unit (EnglishLinear: in) 69 + * # 0x35, 0x00, // Physical Minimum (0) 71 + * # 0x46, 0x92, 0x36, // Physical Maximum (13970) 73 + * # 0x75, 0x10, // Report Size (16) 76 + * # 0x95, 0x01, // Report Count (1) 78 + * # 0x81, 0x02, // Input (Data,Var,Abs) 80 + * # 0x05, 0x0d, // Usage Page (Digitizers) 82 + * # 0x09, 0x30, // Usage (Tip Pressure) 84 + * # 0x15, 0x00, // Logical Minimum (0) 86 + * # 0x26, 0xff, 0x1f, // Logical Maximum (8191) 88 + * # 0x75, 0x10, // Report Size (16) 91 + * # 0x95, 0x01, // Report Count (1) 93 + * # 0x81, 0x02, // Input (Data,Var,Abs) 95 + * # 0xc0, // End Collection 97 + * # 0xc0, // End Collection 98 + * # 0x09, 0x0e, // Usage (Device Configuration) 99 + * # 0xa1, 0x01, // Collection (Application) 101 + * # 0x85, 0x05, // Report ID (5) 103 + * # 0x09, 0x23, // Usage (Device Settings) 105 + * # 0xa1, 0x02, // Collection (Logical) 107 + * # 0x09, 0x52, // Usage (Inputmode) 109 + * # 0x09, 0x53, // Usage (Device Index) 111 + * # 0x25, 0x0a, // Logical Maximum (10) 113 + * # 0x75, 0x08, // Report Size (8) 115 + * # 0x95, 0x02, // Report Count (2) 117 + * # 0xb1, 0x02, // Feature (Data,Var,Abs) 119 + * # 0xc0, // End Collection 121 + * # 0xc0, // End Collection 122 + * # 0x05, 0x0c, // Usage Page (Consumer Devices) 123 + * # 0x09, 0x36, // Usage (Function Buttons) 125 + * # 0xa1, 0x00, // Collection (Physical) 127 + * # 0x85, 0x06, // Report ID (6) 129 + * # 0x05, 0x09, // Usage Page (Button) 131 + * # 0x19, 0x01, // Usage Minimum (1) 133 + * # 0x29, 0x20, // Usage Maximum (32) 135 + * # 0x15, 0x00, // Logical Minimum (0) 137 + * # 0x25, 0x01, // Logical Maximum (1) 139 + * # 0x95, 0x20, // Report Count (32) 141 + * # 0x75, 0x01, // Report Size (1) 143 + * # 0x81, 0x02, // Input (Data,Var,Abs) 145 + * # 0xc0, // End Collection 147 + * # 0x05, 0x01, // Usage Page (Generic Desktop) 148 + * # 0x09, 0x06, // Usage (Keyboard) 150 + * # 0xa1, 0x01, // Collection (Application) 152 + * # 0x85, 0x03, // Report ID (3) 154 + * # 0x05, 0x07, // Usage Page (Keyboard) 156 + * # 0x19, 0xe0, // Usage Minimum (224) 158 + * # 0x29, 0xe7, // Usage Maximum (231) 160 + * # 0x15, 0x00, // Logical Minimum (0) 162 + * # 0x25, 0x01, // Logical Maximum (1) 164 + * # 0x75, 0x01, // Report Size (1) 166 + * # 0x95, 0x08, // Report Count (8) 168 + * # 0x81, 0x02, // Input (Data,Var,Abs) 170 + * # 0x05, 0x07, // Usage Page (Keyboard) 172 + * # 0x19, 0x00, // Usage Minimum (0) 174 + * # 0x29, 0xff, // Usage Maximum (255) 176 + * # 0x26, 0xff, 0x00, // Logical Maximum (255) 178 + * # 0x75, 0x08, // Report Size (8) 181 + * # 0x95, 0x06, // Report Count (6) 183 + * # 0x81, 0x00, // Input (Data,Arr,Abs) 185 + * # 0xc0, // End Collection 187 + * + * Key events; top to bottom: + * Buttons released: 03 00 00 00 00 00 00 00 + * Button1: 03 00 05 00 00 00 00 00 -> 'b and B' + * Button2: 03 00 2c 00 00 00 00 00 -> 'Spacebar' + * Button3: 03 00 08 00 00 00 00 00 -> 'e and E' + * Button4: 03 00 0c 00 00 00 00 00 -> 'i and I' + * Button5: 03 05 1d 00 00 00 00 00 -> LeftControl + LeftAlt + 'z and Z' + * Button6: 03 01 16 00 00 00 00 00 -> LeftControl + 's and S' + * + * Dial Events: + * Clockwise: 03 01 2e 00 00 00 00 00 -> LeftControl + '= and +' + * Anticlockwise: 03 01 2d 00 00 00 00 00 -> LeftControl + '- and (underscore)' + * + * NOTE: Input event descriptions begin at byte 2, and progressively build + * towards byte 7 as each new key is pressed maintaining the press order. + * For example: + * BTN1 followed by BTN2 is 03 00 05 2c 00 00 00 00 + * BTN2 followed by BTN1 is 03 00 2c 05 00 00 00 00 + * + * Releasing a button causes its byte to be freed, and the next item in the list + * is pushed forwards. Dial events are released immediately after an event is + * registered (i.e. after each "click"), so will continually appear pushed + * backwards in the report. + * + * When a button with a modifier key is pressed, the button identifier stacks in + * an abnormal way, where the highest modifier byte always supersedes others. + * In these cases, the button with the higher modifier is always last. + * For example: + * BTN6 followed by BTN5 is 03 05 1d 16 00 00 00 00 + * BTN5 followed by BTN6 is 03 05 1d 16 00 00 00 00 + * BTN5 followed by BTN1 is 03 05 05 1d 00 00 00 00 + * + * For three button presses in order, demonstrating strictly above rules: + * BTN6, BTN1, BTN5 is 03 05 05 1d 16 00 00 00 + * BTN5, BTN1, BTN6 is 03 05 05 1d 16 00 00 00 + * + * In short, when BTN5/6 are pressed, the order of operations is lost, as they + * will always float to the end when pressed in combination with others. + * + * Fortunately, all states are recorded in the same way, with no overlaps. + * Byte 1 can be used as a spare for the wheel, since this is for mod keys. + */ + +#define RDESC_SIZE_PAD 188 +#define REPORT_SIZE_PAD 8 +#define REPORT_ID_BUTTONS 3 +#define PAD_BUTTON_COUNT 6 +#define RDESC_KEYBOARD_OFFSET 148 + +static const __u8 fixed_rdesc_pad[] = { + /* Copy of pen descriptor to avoid losing functionality */ + UsagePage_Digitizers + Usage_Dig_Pen + CollectionApplication( + ReportId(7) + Usage_Dig_Stylus + CollectionPhysical( + Usage_Dig_TipSwitch + Usage_Dig_BarrelSwitch + Usage_Dig_Eraser + Usage_Dig_Invert + Usage_Dig_InRange + LogicalMinimum_i8(0) + LogicalMaximum_i8(1) + ReportSize(1) + ReportCount(5) + Input(Var|Abs) + ReportCount(3) + Input(Const) /* Input (Const, Var, Abs) */ + UsagePage_GenericDesktop + Usage_GD_X + LogicalMinimum_i16(0) + LogicalMaximum_i16(22352) + UnitExponent(-3) + Unit(in) /* (EnglishLinear: in) */ + PhysicalMinimum_i16(0) + PhysicalMaximum_i16(22352) + ReportSize(16) + ReportCount(1) + Input(Var|Abs) + Usage_GD_Y + LogicalMinimum_i16(0) + LogicalMaximum_i16(13970) + UnitExponent(-3) + Unit(in) /* (EnglishLinear: in) */ + PhysicalMinimum_i16(0) + PhysicalMaximum_i16(13970) + ReportSize(16) + ReportCount(1) + Input(Var|Abs) + UsagePage_Digitizers + Usage_Dig_TipPressure + LogicalMinimum_i16(0) + LogicalMaximum_i16(8191) + ReportSize(16) + ReportCount(1) + Input(Var|Abs) + ) + ) + + /* FIXES BEGIN */ + UsagePage_GenericDesktop + Usage_GD_Keypad + CollectionApplication( + ReportId(REPORT_ID_BUTTONS) /* Retain original ID on byte 0 */ + ReportCount(1) + ReportSize(REPORT_SIZE_PAD) + UsagePage_Digitizers + Usage_Dig_TabletFunctionKeys + CollectionPhysical( + /* Byte 1: Dial state */ + UsagePage_GenericDesktop + Usage_GD_Dial + LogicalMinimum_i8(-1) + LogicalMaximum_i8(1) + ReportCount(1) + ReportSize(REPORT_SIZE_PAD) + Input(Var|Rel) + /* Byte 2: Button state */ + UsagePage_Button + ReportSize(1) + ReportCount(PAD_BUTTON_COUNT) + UsageMinimum_i8(0x01) + UsageMaximum_i8(PAD_BUTTON_COUNT) /* Number of buttons */ + LogicalMinimum_i8(0x0) + LogicalMaximum_i8(0x1) + Input(Var|Abs) + /* Byte 3: Exists to be tablet pad */ + UsagePage_Digitizers + Usage_Dig_BarrelSwitch + ReportCount(1) + ReportSize(1) + Input(Var|Abs) + ReportCount(7) /* Padding, to fill full report space */ + Input(Const) + /* Byte 4/5: Exists to be a tablet pad */ + UsagePage_GenericDesktop + Usage_GD_X + Usage_GD_Y + ReportCount(2) + ReportSize(8) + Input(Var|Abs) + /* Bytes 6/7: Padding, to match original length */ + ReportCount(2) + ReportSize(8) + Input(Const) + ) + FixedSizeVendorReport(RDESC_SIZE_PAD) + ) +}; + +SEC(HID_BPF_RDESC_FIXUP) +int BPF_PROG(xppen_deco02_rdesc_fixup, struct hid_bpf_ctx *hctx) +{ + __u8 *data = hid_bpf_get_data(hctx, 0, HID_MAX_DESCRIPTOR_SIZE); + + if (!data) + return 0; /* EPERM Check */ + + if (hctx->size == RDESC_SIZE_PAD) { + __builtin_memcpy(data, fixed_rdesc_pad, sizeof(fixed_rdesc_pad)); + return sizeof(fixed_rdesc_pad); + } + + return 0; +} + +SEC(HID_BPF_DEVICE_EVENT) +int BPF_PROG(xppen_deco02_device_event, struct hid_bpf_ctx *hctx) +{ + __u8 *data = hid_bpf_get_data(hctx, 0, REPORT_SIZE_PAD); + + if (!data || data[0] != REPORT_ID_BUTTONS) + return 0; /* EPERM or wrong report */ + + __u8 dial_code = 0; + __u8 button_mask = 0; + size_t d; + + /* Start from 2; 0 is report ID, 1 is modifier keys, replaced by dial */ + for (d = 2; d < 8; d++) { + switch (data[d]) { + case 0x2e: + dial_code = 1; + break; + case 0x2d: + dial_code = -1; + break; + /* below are buttons, top to bottom */ + case 0x05: + button_mask |= BIT(0); + break; + case 0x2c: + button_mask |= BIT(1); + break; + case 0x08: + button_mask |= BIT(2); + break; + case 0x0c: + button_mask |= BIT(3); + break; + case 0x1d: + button_mask |= BIT(4); + break; + case 0x16: + button_mask |= BIT(05); + break; + default: + break; + } + } + + __u8 report[8] = { REPORT_ID_BUTTONS, dial_code, button_mask, 0x00 }; + + __builtin_memcpy(data, report, sizeof(report)); + return 0; +} + +HID_BPF_OPS(xppen_deco02) = { + .hid_rdesc_fixup = (void *)xppen_deco02_rdesc_fixup, + .hid_device_event = (void *)xppen_deco02_device_event, +}; + +SEC("syscall") +int probe(struct hid_bpf_probe_args *ctx) +{ + ctx->retval = ctx->rdesc_size != RDESC_SIZE_PAD ? -EINVAL : 0; + return 0; +} + +char _license[] SEC("license") = "GPL"; diff --git a/drivers/hid/bpf/progs/hid_report_helpers.h b/drivers/hid/bpf/progs/hid_report_helpers.h index 9b2a48e4a311..9944ff54d31d 100644 --- a/drivers/hid/bpf/progs/hid_report_helpers.h +++ b/drivers/hid/bpf/progs/hid_report_helpers.h @@ -143,8 +143,11 @@ * report with Report ID 0xac of the given size in bytes. * The size is inclusive of the 1 byte Report ID prefix. * - * HID-BPF requires that at least one report has - * the same size as the original report from the device. + * The kernel discards any HID reports that are larger + * than the largest report in a HID report descriptor. + * Thus at least one report must have (at least) + * the same size as the largest original report from + * the device. * The easy way to ensure that is to add this * macro as the last element of your CollectionApplication * other reports can be of any size less than this. @@ -295,6 +298,7 @@ #define Usage_GD_SystemSpeakerMute Usage_i8(0xa7) #define Usage_GD_SystemHibernate Usage_i8(0xa8) #define Usage_GD_SystemMicrophoneMute Usage_i8(0xa9) +#define Usage_GD_SystemAccessibilityBinding Usage_i8(0xaa) #define Usage_GD_SystemDisplayInvert Usage_i8(0xb0) #define Usage_GD_SystemDisplayInternal Usage_i8(0xb1) #define Usage_GD_SystemDisplayExternal Usage_i8(0xb2) @@ -2669,7 +2673,7 @@ #define Usage_BS_iDeviceName Usage_i8(0x88) #define Usage_BS_iDeviceChemistry Usage_i8(0x89) #define Usage_BS_ManufacturerData Usage_i8(0x8a) -#define Usage_BS_Rechargable Usage_i8(0x8b) +#define Usage_BS_Rechargeable Usage_i8(0x8b) #define Usage_BS_WarningCapacityLimit Usage_i8(0x8c) #define Usage_BS_CapacityGranularity1 Usage_i8(0x8d) #define Usage_BS_CapacityGranularity2 Usage_i8(0x8e) diff --git a/drivers/hid/hid-evision.c b/drivers/hid/hid-evision.c index bb5997078491..3e7f43ab80bb 100644 --- a/drivers/hid/hid-evision.c +++ b/drivers/hid/hid-evision.c @@ -18,6 +18,10 @@ static int evision_input_mapping(struct hid_device *hdev, struct hid_input *hi, struct hid_field *field, struct hid_usage *usage, unsigned long **bit, int *max) { + /* mapping only applies to USB_DEVICE_ID_EVISION_ICL01 */ + if (hdev->product != USB_DEVICE_ID_EVISION_ICL01) + return 0; + if ((usage->hid & HID_USAGE_PAGE) != HID_UP_CONSUMER) return 0; @@ -37,8 +41,24 @@ static int evision_input_mapping(struct hid_device *hdev, struct hid_input *hi, return 0; } +#define REP_DSC_SIZE 236 +#define USAGE_MAX_INDEX 59 + +static const __u8 *evision_report_fixup(struct hid_device *hdev, __u8 *rdesc, + unsigned int *rsize) +{ + if (hdev->product == USB_DEVICE_ID_EV_TELINK_RECEIVER && + *rsize == REP_DSC_SIZE && rdesc[USAGE_MAX_INDEX] == 0x29 && + rdesc[USAGE_MAX_INDEX + 1] == 3) { + hid_info(hdev, "fixing EVision:TeLink Receiver report descriptor\n"); + rdesc[USAGE_MAX_INDEX + 1] = 5; // change usage max from 3 to 5 + } + return rdesc; +} + static const struct hid_device_id evision_devices[] = { { HID_USB_DEVICE(USB_VENDOR_ID_EVISION, USB_DEVICE_ID_EVISION_ICL01) }, + { HID_USB_DEVICE(USB_VENDOR_ID_EVISION, USB_DEVICE_ID_EV_TELINK_RECEIVER) }, { } }; MODULE_DEVICE_TABLE(hid, evision_devices); @@ -47,6 +67,7 @@ static struct hid_driver evision_driver = { .name = "evision", .id_table = evision_devices, .input_mapping = evision_input_mapping, + .report_fixup = evision_report_fixup, }; module_hid_driver(evision_driver); diff --git a/drivers/hid/hid-generic.c b/drivers/hid/hid-generic.c index 9e04c6d0fcc8..c2de916747de 100644 --- a/drivers/hid/hid-generic.c +++ b/drivers/hid/hid-generic.c @@ -70,6 +70,14 @@ static int hid_generic_probe(struct hid_device *hdev, return hid_hw_start(hdev, HID_CONNECT_DEFAULT); } +static int hid_generic_reset_resume(struct hid_device *hdev) +{ + if (hdev->claimed & HID_CLAIMED_INPUT) + hidinput_reset_resume(hdev); + + return 0; +} + static const struct hid_device_id hid_table[] = { { HID_DEVICE(HID_BUS_ANY, HID_GROUP_ANY, HID_ANY_ID, HID_ANY_ID) }, { } @@ -81,6 +89,7 @@ static struct hid_driver hid_generic = { .id_table = hid_table, .match = hid_generic_match, .probe = hid_generic_probe, + .reset_resume = hid_generic_reset_resume, }; module_hid_driver(hid_generic); diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index c4589075a5ed..d31711f1aaec 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h @@ -477,6 +477,7 @@ #define USB_DEVICE_ID_EMS_TRIO_LINKER_PLUS_II 0x0118 #define USB_VENDOR_ID_EVISION 0x320f +#define USB_DEVICE_ID_EV_TELINK_RECEIVER 0x226f #define USB_DEVICE_ID_EVISION_ICL01 0x5041 #define USB_VENDOR_ID_FFBEAST 0x045b @@ -881,6 +882,7 @@ #define USB_DEVICE_ID_LOGITECH_DUAL_ACTION 0xc216 #define USB_DEVICE_ID_LOGITECH_RUMBLEPAD2 0xc218 #define USB_DEVICE_ID_LOGITECH_RUMBLEPAD2_2 0xc219 +#define USB_DEVICE_ID_LOGITECH_G13 0xc21c #define USB_DEVICE_ID_LOGITECH_G15_LCD 0xc222 #define USB_DEVICE_ID_LOGITECH_G11 0xc225 #define USB_DEVICE_ID_LOGITECH_G15_V2_LCD 0xc227 @@ -916,6 +918,8 @@ #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1 0xc539 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_1 0xc53f #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_2 0xc543 +#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_3 0xc547 +#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_4 0xc54d #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_POWERPLAY 0xc53a #define USB_DEVICE_ID_LOGITECH_BOLT_RECEIVER 0xc548 #define USB_DEVICE_ID_SPACETRAVELLER 0xc623 @@ -1421,6 +1425,7 @@ #define USB_DEVICE_ID_UGEE_XPPEN_TABLET_DECO_PRO_SW 0x0933 #define USB_DEVICE_ID_UGEE_XPPEN_TABLET_STAR06 0x0078 #define USB_DEVICE_ID_UGEE_XPPEN_TABLET_22R_PRO 0x091b +#define USB_DEVICE_ID_UGEE_XPPEN_TABLET_24_PRO 0x092d #define USB_DEVICE_ID_UGEE_TABLET_G5 0x0074 #define USB_DEVICE_ID_UGEE_TABLET_EX07S 0x0071 #define USB_DEVICE_ID_UGEE_TABLET_RAINBOW_CV720 0x0055 diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c index 2bbb645c2ff4..2633fcd8f910 100644 --- a/drivers/hid/hid-input.c +++ b/drivers/hid/hid-input.c @@ -878,7 +878,7 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel switch (usage->hid) { /* These usage IDs map directly to the usage codes. */ - case HID_GD_X: case HID_GD_Y: case HID_GD_Z: + case HID_GD_X: case HID_GD_Y: case HID_GD_RX: case HID_GD_RY: case HID_GD_RZ: if (field->flags & HID_MAIN_ITEM_RELATIVE) map_rel(usage->hid & 0xf); @@ -886,6 +886,22 @@ static void hidinput_configure_usage(struct hid_input *hidinput, struct hid_fiel map_abs_clear(usage->hid & 0xf); break; + case HID_GD_Z: + /* HID_GD_Z is mapped to ABS_DISTANCE for stylus/pen */ + if (field->flags & HID_MAIN_ITEM_RELATIVE) { + map_rel(usage->hid & 0xf); + } else { + if (field->application == HID_DG_PEN || + field->physical == HID_DG_PEN || + field->logical == HID_DG_STYLUS || + field->physical == HID_DG_STYLUS || + field->application == HID_DG_DIGITIZER) + map_abs_clear(ABS_DISTANCE); + else + map_abs_clear(usage->hid & 0xf); + } + break; + case HID_GD_WHEEL: if (field->flags & HID_MAIN_ITEM_RELATIVE) { set_bit(REL_WHEEL, input->relbit); @@ -2400,6 +2416,13 @@ void hidinput_disconnect(struct hid_device *hid) } EXPORT_SYMBOL_GPL(hidinput_disconnect); +void hidinput_reset_resume(struct hid_device *hid) +{ + /* renegotiate host-device shared state after reset */ + hidinput_change_resolution_multipliers(hid); +} +EXPORT_SYMBOL_GPL(hidinput_reset_resume); + #ifdef CONFIG_HID_KUNIT_TEST #include "hid-input-test.c" #endif diff --git a/drivers/hid/hid-lg-g15.c b/drivers/hid/hid-lg-g15.c index f8605656257b..1a88bc44ada4 100644 --- a/drivers/hid/hid-lg-g15.c +++ b/drivers/hid/hid-lg-g15.c @@ -26,7 +26,24 @@ #define LG_G510_FEATURE_BACKLIGHT_RGB 0x05 #define LG_G510_FEATURE_POWER_ON_RGB 0x06 +#define LG_G510_INPUT_MACRO_KEYS 0x03 +#define LG_G510_INPUT_KBD_BACKLIGHT 0x04 + +#define LG_G13_INPUT_REPORT 0x01 +#define LG_G13_FEATURE_M_KEYS_LEDS 0x05 +#define LG_G13_FEATURE_BACKLIGHT_RGB 0x07 +#define LG_G13_BACKLIGHT_HW_ON_BIT 23 + +/** + * g13_input_report.keybits[] is not 32-bit aligned, so we can't use the bitops macros. + * + * @ary: Pointer to array of u8s + * @b: Bit index into ary, LSB first. Not range checked. + */ +#define TEST_BIT(ary, b) ((1 << ((b) & 7)) & (ary)[(b) >> 3]) + enum lg_g15_model { + LG_G13, LG_G15, LG_G15_V2, LG_G510, @@ -45,6 +62,12 @@ enum lg_g15_led_type { LG_G15_LED_MAX }; +struct g13_input_report { + u8 report_id; /* Report ID is always set to 1. */ + u8 joy_x, joy_y; + u8 keybits[5]; +}; + struct lg_g15_led { union { struct led_classdev cdev; @@ -63,12 +86,188 @@ struct lg_g15_data { struct mutex mutex; struct work_struct work; struct input_dev *input; + struct input_dev *input_js; /* Separate joystick device for G13. */ struct hid_device *hdev; enum lg_g15_model model; struct lg_g15_led leds[LG_G15_LED_MAX]; bool game_mode_enabled; + bool backlight_disabled; /* true == HW backlight toggled *OFF* */ }; +/********* G13 LED functions ***********/ +/* + * G13 retains no state across power cycles, and always powers up with the backlight on, + * color #5AFF6E, all macro key LEDs off. + */ +static int lg_g13_get_leds_state(struct lg_g15_data *g15) +{ + u8 * const tbuf = g15->transfer_buf; + int ret, high; + + /* RGB backlight. */ + ret = hid_hw_raw_request(g15->hdev, LG_G13_FEATURE_BACKLIGHT_RGB, + tbuf, 5, + HID_FEATURE_REPORT, HID_REQ_GET_REPORT); + if (ret != 5) { + hid_err(g15->hdev, "Error getting backlight brightness: %d\n", ret); + return (ret < 0) ? ret : -EIO; + } + + /* Normalize RGB intensities against the highest component. */ + high = max3(tbuf[1], tbuf[2], tbuf[3]); + if (high) { + g15->leds[LG_G15_KBD_BRIGHTNESS].red = + DIV_ROUND_CLOSEST(tbuf[1] * 255, high); + g15->leds[LG_G15_KBD_BRIGHTNESS].green = + DIV_ROUND_CLOSEST(tbuf[2] * 255, high); + g15->leds[LG_G15_KBD_BRIGHTNESS].blue = + DIV_ROUND_CLOSEST(tbuf[3] * 255, high); + g15->leds[LG_G15_KBD_BRIGHTNESS].brightness = high; + } else { + g15->leds[LG_G15_KBD_BRIGHTNESS].red = 255; + g15->leds[LG_G15_KBD_BRIGHTNESS].green = 255; + g15->leds[LG_G15_KBD_BRIGHTNESS].blue = 255; + g15->leds[LG_G15_KBD_BRIGHTNESS].brightness = 0; + } + + /* Macro LEDs. */ + ret = hid_hw_raw_request(g15->hdev, LG_G13_FEATURE_M_KEYS_LEDS, + tbuf, 5, + HID_FEATURE_REPORT, HID_REQ_GET_REPORT); + if (ret != 5) { + hid_err(g15->hdev, "Error getting macro LED brightness: %d\n", ret); + return (ret < 0) ? ret : -EIO; + } + + for (int i = LG_G15_MACRO_PRESET1; i < LG_G15_LED_MAX; ++i) + g15->leds[i].brightness = !!(tbuf[1] & (1 << (i - LG_G15_MACRO_PRESET1))); + + /* + * Bit 23 of g13_input_report.keybits[] contains the backlight's + * current HW toggle state. Retrieve it from the device. + */ + ret = hid_hw_raw_request(g15->hdev, LG_G13_INPUT_REPORT, + tbuf, sizeof(struct g13_input_report), + HID_INPUT_REPORT, HID_REQ_GET_REPORT); + if (ret != sizeof(struct g13_input_report)) { + hid_err(g15->hdev, "Error getting backlight on/off state: %d\n", ret); + return (ret < 0) ? ret : -EIO; + } + g15->backlight_disabled = + !TEST_BIT(((struct g13_input_report *) tbuf)->keybits, + LG_G13_BACKLIGHT_HW_ON_BIT); + + return 0; +} + +static int lg_g13_kbd_led_write(struct lg_g15_data *g15, + struct lg_g15_led *g15_led, + enum led_brightness brightness) +{ + struct mc_subled const * const subleds = g15_led->mcdev.subled_info; + u8 * const tbuf = g15->transfer_buf; + int ret; + + guard(mutex)(&g15->mutex); + + led_mc_calc_color_components(&g15_led->mcdev, brightness); + + tbuf[0] = 5; + tbuf[1] = subleds[0].brightness; + tbuf[2] = subleds[1].brightness; + tbuf[3] = subleds[2].brightness; + tbuf[4] = 0; + + ret = hid_hw_raw_request(g15->hdev, LG_G13_FEATURE_BACKLIGHT_RGB, + tbuf, 5, + HID_FEATURE_REPORT, HID_REQ_SET_REPORT); + if (ret != 5) { + hid_err(g15->hdev, "Error setting backlight brightness: %d\n", ret); + return (ret < 0) ? ret : -EIO; + } + + g15_led->brightness = brightness; + return 0; +} + +static int lg_g13_kbd_led_set(struct led_classdev *led_cdev, enum led_brightness brightness) +{ + struct led_classdev_mc *mc = lcdev_to_mccdev(led_cdev); + struct lg_g15_led *g15_led = + container_of(mc, struct lg_g15_led, mcdev); + struct lg_g15_data *g15 = dev_get_drvdata(led_cdev->dev->parent); + + /* Ignore LED off on unregister / keyboard unplug */ + if (led_cdev->flags & LED_UNREGISTERING) + return 0; + + return lg_g13_kbd_led_write(g15, g15_led, brightness); +} + +static enum led_brightness lg_g13_kbd_led_get(struct led_classdev *led_cdev) +{ + struct led_classdev_mc const * const mc = lcdev_to_mccdev(led_cdev); + struct lg_g15_led const *g15_led = + container_of(mc, struct lg_g15_led, mcdev); + + return g15_led->brightness; +} + +static int lg_g13_mkey_led_set(struct led_classdev *led_cdev, enum led_brightness brightness) +{ + struct lg_g15_led *g15_led = + container_of(led_cdev, struct lg_g15_led, cdev); + struct lg_g15_data *g15 = dev_get_drvdata(led_cdev->dev->parent); + int i, ret; + u8 * const tbuf = g15->transfer_buf; + u8 val, mask = 0; + + /* Ignore LED off on unregister / keyboard unplug */ + if (led_cdev->flags & LED_UNREGISTERING) + return 0; + + guard(mutex)(&g15->mutex); + + for (i = LG_G15_MACRO_PRESET1; i < LG_G15_LED_MAX; ++i) { + if (i == g15_led->led) + val = brightness; + else + val = g15->leds[i].brightness; + + if (val) + mask |= 1 << (i - LG_G15_MACRO_PRESET1); + } + + tbuf[0] = 5; + tbuf[1] = mask; + tbuf[2] = 0; + tbuf[3] = 0; + tbuf[4] = 0; + + ret = hid_hw_raw_request(g15->hdev, LG_G13_FEATURE_M_KEYS_LEDS, + tbuf, 5, + HID_FEATURE_REPORT, HID_REQ_SET_REPORT); + if (ret != 5) { + hid_err(g15->hdev, "Error setting LED brightness: %d\n", ret); + return (ret < 0) ? ret : -EIO; + } + + g15_led->brightness = brightness; + return 0; +} + +static enum led_brightness lg_g13_mkey_led_get(struct led_classdev *led_cdev) +{ + /* + * G13 doesn't change macro key LEDs behind our back, so they're + * whatever we last set them to. + */ + struct lg_g15_led *g15_led = + container_of(led_cdev, struct lg_g15_led, cdev); + + return g15_led->brightness; +} + /******** G15 and G15 v2 LED functions ********/ static int lg_g15_update_led_brightness(struct lg_g15_data *g15) @@ -227,6 +426,20 @@ static int lg_g510_get_initial_led_brightness(struct lg_g15_data *g15, int i) g15->leds[i].brightness = 0; } + if (i) + return 0; + + ret = hid_hw_raw_request(g15->hdev, LG_G510_INPUT_KBD_BACKLIGHT, + g15->transfer_buf, 2, + HID_INPUT_REPORT, HID_REQ_GET_REPORT); + if (ret != 2) { + /* This can happen when a KVM switch is used, so only warn. */ + hid_warn(g15->hdev, "Error getting backlight state: %d\n", ret); + return 0; + } + + g15->backlight_disabled = g15->transfer_buf[1] & 0x04; + return 0; } @@ -390,6 +603,8 @@ static int lg_g15_get_initial_led_brightness(struct lg_g15_data *g15) int ret; switch (g15->model) { + case LG_G13: + return lg_g13_get_leds_state(g15); case LG_G15: case LG_G15_V2: return lg_g15_update_led_brightness(g15); @@ -417,6 +632,108 @@ static int lg_g15_get_initial_led_brightness(struct lg_g15_data *g15) /******** Input functions ********/ +/* Table mapping keybits[] bit positions to event codes. */ +/* Note: Indices are discontinuous to aid readability. */ +static const u16 g13_keys_for_bits[] = { + /* Main keypad - keys G1 - G22 */ + [0] = KEY_MACRO1, + [1] = KEY_MACRO2, + [2] = KEY_MACRO3, + [3] = KEY_MACRO4, + [4] = KEY_MACRO5, + [5] = KEY_MACRO6, + [6] = KEY_MACRO7, + [7] = KEY_MACRO8, + [8] = KEY_MACRO9, + [9] = KEY_MACRO10, + [10] = KEY_MACRO11, + [11] = KEY_MACRO12, + [12] = KEY_MACRO13, + [13] = KEY_MACRO14, + [14] = KEY_MACRO15, + [15] = KEY_MACRO16, + [16] = KEY_MACRO17, + [17] = KEY_MACRO18, + [18] = KEY_MACRO19, + [19] = KEY_MACRO20, + [20] = KEY_MACRO21, + [21] = KEY_MACRO22, + + /* LCD menu buttons. */ + [24] = KEY_KBD_LCD_MENU5, /* "Next page" button */ + [25] = KEY_KBD_LCD_MENU1, /* Left-most */ + [26] = KEY_KBD_LCD_MENU2, + [27] = KEY_KBD_LCD_MENU3, + [28] = KEY_KBD_LCD_MENU4, /* Right-most */ + + /* Macro preset and record buttons; have red LEDs under them. */ + [29] = KEY_MACRO_PRESET1, + [30] = KEY_MACRO_PRESET2, + [31] = KEY_MACRO_PRESET3, + [32] = KEY_MACRO_RECORD_START, + + /* 33-35 handled by joystick device. */ + + /* Backlight toggle. */ + [37] = KEY_LIGHTS_TOGGLE, +}; + +#define G13_JS_KEYBITS_OFFSET 33 + +static const u16 g13_keys_for_bits_js[] = { + /* Joystick buttons */ + /* These keybits are at bit indices 33, 34, and 35. */ + BTN_BASE, /* Left side */ + BTN_BASE2, /* Bottom side */ + BTN_THUMB, /* Stick depress */ +}; + +static int lg_g13_event(struct lg_g15_data *g15, u8 const *data) +{ + struct g13_input_report const * const rep = (struct g13_input_report *) data; + int i, val; + bool backlight_disabled; + + /* + * Main macropad and menu keys. + * Emit key events defined for each bit position. + */ + for (i = 0; i < ARRAY_SIZE(g13_keys_for_bits); ++i) { + if (g13_keys_for_bits[i]) { + val = TEST_BIT(rep->keybits, i); + input_report_key(g15->input, g13_keys_for_bits[i], val); + } + } + input_sync(g15->input); + + /* + * Joystick. + * Emit button and deflection events. + */ + for (i = 0; i < ARRAY_SIZE(g13_keys_for_bits_js); ++i) { + val = TEST_BIT(rep->keybits, i + G13_JS_KEYBITS_OFFSET); + input_report_key(g15->input_js, g13_keys_for_bits_js[i], val); + } + input_report_abs(g15->input_js, ABS_X, rep->joy_x); + input_report_abs(g15->input_js, ABS_Y, rep->joy_y); + input_sync(g15->input_js); + + /* + * Bit 23 of keybits[] reports the current backlight on/off state. If + * it has changed from the last cached value, apply an update. + */ + backlight_disabled = !TEST_BIT(rep->keybits, LG_G13_BACKLIGHT_HW_ON_BIT); + if (backlight_disabled ^ g15->backlight_disabled) { + led_classdev_notify_brightness_hw_changed( + &g15->leds[LG_G15_KBD_BRIGHTNESS].mcdev.led_cdev, + backlight_disabled + ? 0 : g15->leds[LG_G15_KBD_BRIGHTNESS].brightness); + g15->backlight_disabled = backlight_disabled; + } + + return 0; +} + /* On the G15 Mark I Logitech has been quite creative with which bit is what */ static void lg_g15_handle_lcd_menu_keys(struct lg_g15_data *g15, u8 *data) { @@ -549,14 +866,24 @@ static int lg_g510_event(struct lg_g15_data *g15, u8 *data) static int lg_g510_leds_event(struct lg_g15_data *g15, u8 *data) { + struct lg_g15_led *g15_led = &g15->leds[LG_G15_KBD_BRIGHTNESS]; bool backlight_disabled; + backlight_disabled = data[1] & 0x04; + if (backlight_disabled == g15->backlight_disabled) + return 0; + + led_classdev_notify_brightness_hw_changed( + &g15_led->mcdev.led_cdev, + backlight_disabled ? 0 : g15_led->brightness); + + g15->backlight_disabled = backlight_disabled; + /* * The G510 ignores backlight updates when the backlight is turned off * through the light toggle button on the keyboard, to work around this * we queue a workitem to sync values when the backlight is turned on. */ - backlight_disabled = data[1] & 0x04; if (!backlight_disabled) schedule_work(&g15->work); @@ -572,6 +899,10 @@ static int lg_g15_raw_event(struct hid_device *hdev, struct hid_report *report, return 0; switch (g15->model) { + case LG_G13: + if (data[0] == 0x01 && size == sizeof(struct g13_input_report)) + return lg_g13_event(g15, data); + break; case LG_G15: if (data[0] == 0x02 && size == 9) return lg_g15_event(g15, data); @@ -588,9 +919,9 @@ static int lg_g15_raw_event(struct hid_device *hdev, struct hid_report *report, break; case LG_G510: case LG_G510_USB_AUDIO: - if (data[0] == 0x03 && size == 5) + if (data[0] == LG_G510_INPUT_MACRO_KEYS && size == 5) return lg_g510_event(g15, data); - if (data[0] == 0x04 && size == 2) + if (data[0] == LG_G510_INPUT_KBD_BACKLIGHT && size == 2) return lg_g510_leds_event(g15, data); break; } @@ -616,13 +947,24 @@ static void lg_g15_setup_led_rgb(struct lg_g15_data *g15, int index) { int i; struct mc_subled *subled_info; - - g15->leds[index].mcdev.led_cdev.brightness_set_blocking = - lg_g510_kbd_led_set; - g15->leds[index].mcdev.led_cdev.brightness_get = - lg_g510_kbd_led_get; - g15->leds[index].mcdev.led_cdev.max_brightness = 255; - g15->leds[index].mcdev.num_colors = 3; + struct lg_g15_led * const gled = &g15->leds[index]; + + if (g15->model == LG_G13) { + gled->mcdev.led_cdev.brightness_set_blocking = + lg_g13_kbd_led_set; + gled->mcdev.led_cdev.brightness_get = + lg_g13_kbd_led_get; + gled->mcdev.led_cdev.flags = LED_BRIGHT_HW_CHANGED; + } else { + gled->mcdev.led_cdev.brightness_set_blocking = + lg_g510_kbd_led_set; + gled->mcdev.led_cdev.brightness_get = + lg_g510_kbd_led_get; + if (index == LG_G15_KBD_BRIGHTNESS) + g15->leds[index].mcdev.led_cdev.flags = LED_BRIGHT_HW_CHANGED; + } + gled->mcdev.led_cdev.max_brightness = 255; + gled->mcdev.num_colors = 3; subled_info = devm_kcalloc(&g15->hdev->dev, 3, sizeof(*subled_info), GFP_KERNEL); if (!subled_info) @@ -632,20 +974,20 @@ static void lg_g15_setup_led_rgb(struct lg_g15_data *g15, int index) switch (i + 1) { case LED_COLOR_ID_RED: subled_info[i].color_index = LED_COLOR_ID_RED; - subled_info[i].intensity = g15->leds[index].red; + subled_info[i].intensity = gled->red; break; case LED_COLOR_ID_GREEN: subled_info[i].color_index = LED_COLOR_ID_GREEN; - subled_info[i].intensity = g15->leds[index].green; + subled_info[i].intensity = gled->green; break; case LED_COLOR_ID_BLUE: subled_info[i].color_index = LED_COLOR_ID_BLUE; - subled_info[i].intensity = g15->leds[index].blue; + subled_info[i].intensity = gled->blue; break; } subled_info[i].channel = i; } - g15->leds[index].mcdev.subled_info = subled_info; + gled->mcdev.subled_info = subled_info; } static int lg_g15_register_led(struct lg_g15_data *g15, int i, const char *name) @@ -656,6 +998,23 @@ static int lg_g15_register_led(struct lg_g15_data *g15, int i, const char *name) g15->leds[i].cdev.name = name; switch (g15->model) { + case LG_G13: + if (i < LG_G15_BRIGHTNESS_MAX) { + /* RGB backlight. */ + lg_g15_setup_led_rgb(g15, i); + ret = devm_led_classdev_multicolor_register_ext(&g15->hdev->dev, + &g15->leds[i].mcdev, + NULL); + } else { + /* Macro keys */ + g15->leds[i].cdev.brightness_set_blocking = lg_g13_mkey_led_set; + g15->leds[i].cdev.brightness_get = lg_g13_mkey_led_get; + g15->leds[i].cdev.max_brightness = 1; + + ret = devm_led_classdev_register(&g15->hdev->dev, + &g15->leds[i].cdev); + } + break; case LG_G15: case LG_G15_V2: g15->leds[i].cdev.brightness_get = lg_g15_led_get; @@ -702,11 +1061,9 @@ static int lg_g15_register_led(struct lg_g15_data *g15, int i, const char *name) } /* Common input device init code shared between keyboards and Z-10 speaker handling */ -static void lg_g15_init_input_dev(struct hid_device *hdev, struct input_dev *input, - const char *name) +static void lg_g15_init_input_dev_core(struct hid_device *hdev, struct input_dev *input, + char const *name) { - int i; - input->name = name; input->phys = hdev->phys; input->uniq = hdev->uniq; @@ -717,12 +1074,42 @@ static void lg_g15_init_input_dev(struct hid_device *hdev, struct input_dev *inp input->dev.parent = &hdev->dev; input->open = lg_g15_input_open; input->close = lg_g15_input_close; +} + +static void lg_g15_init_input_dev(struct hid_device *hdev, struct input_dev *input, + const char *name) +{ + int i; + + lg_g15_init_input_dev_core(hdev, input, name); /* Keys below the LCD, intended for controlling a menu on the LCD */ for (i = 0; i < 5; i++) input_set_capability(input, EV_KEY, KEY_KBD_LCD_MENU1 + i); } +static void lg_g13_init_input_dev(struct hid_device *hdev, + struct input_dev *input, const char *name, + struct input_dev *input_js, const char *name_js) +{ + /* Macropad. */ + lg_g15_init_input_dev_core(hdev, input, name); + for (int i = 0; i < ARRAY_SIZE(g13_keys_for_bits); ++i) { + if (g13_keys_for_bits[i]) + input_set_capability(input, EV_KEY, g13_keys_for_bits[i]); + } + + /* OBTW, we're a joystick, too... */ + lg_g15_init_input_dev_core(hdev, input_js, name_js); + for (int i = 0; i < ARRAY_SIZE(g13_keys_for_bits_js); ++i) + input_set_capability(input_js, EV_KEY, g13_keys_for_bits_js[i]); + + input_set_capability(input_js, EV_ABS, ABS_X); + input_set_abs_params(input_js, ABS_X, 0, 255, 0, 0); + input_set_capability(input_js, EV_ABS, ABS_Y); + input_set_abs_params(input_js, ABS_Y, 0, 255, 0, 0); +} + static int lg_g15_probe(struct hid_device *hdev, const struct hid_device_id *id) { static const char * const led_names[] = { @@ -739,7 +1126,7 @@ static int lg_g15_probe(struct hid_device *hdev, const struct hid_device_id *id) unsigned int connect_mask = 0; bool has_ff000000 = false; struct lg_g15_data *g15; - struct input_dev *input; + struct input_dev *input, *input_js; struct hid_report *rep; int ret, i, gkeys = 0; @@ -778,6 +1165,25 @@ static int lg_g15_probe(struct hid_device *hdev, const struct hid_device_id *id) hid_set_drvdata(hdev, (void *)g15); switch (g15->model) { + case LG_G13: + /* + * The G13 has an analog thumbstick with nearby buttons. Some + * libraries and applications are known to ignore devices that + * don't "look like" a joystick, and a device with two ABS axes + * and 25+ macro keys would confuse them. + * + * Create an additional input device dedicated to appear as a + * simplified joystick (two ABS axes, three BTN buttons). + */ + input_js = devm_input_allocate_device(&hdev->dev); + if (!input_js) + return -ENOMEM; + g15->input_js = input_js; + input_set_drvdata(input_js, hdev); + + connect_mask = HID_CONNECT_HIDRAW; + gkeys = 25; + break; case LG_G15: INIT_WORK(&g15->work, lg_g15_leds_changed_work); /* @@ -859,6 +1265,38 @@ static int lg_g15_probe(struct hid_device *hdev, const struct hid_device_id *id) goto error_hw_stop; return 0; /* All done */ + } else if (g15->model == LG_G13) { + static char const * const g13_led_names[] = { + /* Backlight is shared between LCD and keys. */ + "g13:rgb:kbd_backlight", + NULL, /* Keep in sync with led_type enum */ + "g13:red:macro_preset_1", + "g13:red:macro_preset_2", + "g13:red:macro_preset_3", + "g13:red:macro_record", + }; + lg_g13_init_input_dev(hdev, + input, "Logitech G13 Gaming Keypad", + input_js, "Logitech G13 Thumbstick"); + ret = input_register_device(input); + if (ret) + goto error_hw_stop; + ret = input_register_device(input_js); + if (ret) + goto error_hw_stop; + + for (i = 0; i < ARRAY_SIZE(g13_led_names); ++i) { + if (g13_led_names[i]) { + ret = lg_g15_register_led(g15, i, g13_led_names[i]); + if (ret) + goto error_hw_stop; + } + } + led_classdev_notify_brightness_hw_changed( + &g15->leds[LG_G15_KBD_BRIGHTNESS].mcdev.led_cdev, + g15->backlight_disabled + ? 0 : g15->leds[LG_G15_KBD_BRIGHTNESS].brightness); + return 0; } /* Setup and register input device */ @@ -903,6 +1341,13 @@ error_hw_stop: } static const struct hid_device_id lg_g15_devices[] = { + /* + * The G13 is a macropad-only device with an LCD, LED backlighing, + * and joystick. + */ + { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, + USB_DEVICE_ID_LOGITECH_G13), + .driver_data = LG_G13 }, /* The G11 is a G15 without the LCD, treat it as a G15 */ { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_G11), diff --git a/drivers/hid/hid-logitech-dj.c b/drivers/hid/hid-logitech-dj.c index cce54dd9884a..44b716697510 100644 --- a/drivers/hid/hid-logitech-dj.c +++ b/drivers/hid/hid-logitech-dj.c @@ -116,6 +116,7 @@ enum recvr_type { recvr_type_dj, recvr_type_hidpp, recvr_type_gaming_hidpp, + recvr_type_gaming_hidpp_ls_1_3, recvr_type_mouse_only, recvr_type_27mhz, recvr_type_bluetooth, @@ -148,6 +149,7 @@ struct dj_receiver_dev { struct kfifo notif_fifo; unsigned long last_query; /* in jiffies */ bool ready; + bool dj_mode; enum recvr_type type; unsigned int unnumbered_application; spinlock_t lock; @@ -211,6 +213,44 @@ static const char kbd_descriptor[] = { 0xC0 }; +/* Gaming Keyboard descriptor (1) */ +static const char kbd_lightspeed_1_3_descriptor[] = { + 0x05, 0x01, /* Usage Page (Generic Desktop) */ + 0x09, 0x06, /* Usage (Keyboard) */ + 0xA1, 0x01, /* Collection (Application) */ + 0x85, 0x01, /* Report ID (1) */ + 0x05, 0x07, /* Usage Page (Kbrd/Keypad) */ + 0x19, 0xE0, /* Usage Minimum (0xE0) */ + 0x29, 0xE7, /* Usage Maximum (0xE7) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x25, 0x01, /* Logical Maximum (1) */ + 0x75, 0x01, /* Report Size (1) */ + 0x95, 0x08, /* Report Count (8) */ + 0x81, 0x02, /* Input (Data,Var) */ + 0x95, 0x70, /* Report Count (112) */ + 0x19, 0x04, /* Usage Minimum (0x04) */ + 0x29, 0x73, /* Usage Maximum (0x73) */ + 0x81, 0x02, /* Input (Data,Var,Abs) */ + 0x95, 0x05, /* Report Count (5) */ + 0x19, 0x87, /* Usage Minimum (0x87) */ + 0x29, 0x8B, /* Usage Maximum (0x8B) */ + 0x81, 0x02, /* Input (Data,Var,Abs) */ + 0x95, 0x03, /* Report Count (3) */ + 0x19, 0x90, /* Usage Minimum (0x90) */ + 0x29, 0x92, /* Usage Maximum (0x92) */ + 0x81, 0x02, /* Input (Data,Var,Abs) */ + 0x95, 0x05, /* Report Count (5) */ + 0x85, 0x0E, /* Report ID (14) */ + 0x05, 0x08, /* Usage Page (LEDs) */ + 0x19, 0x01, /* Usage Minimum (Num Lock) */ + 0x29, 0x05, /* Usage Maximum (Kana) */ + 0x91, 0x02, /* Output (Data,Var,Abs) */ + 0x95, 0x01, /* Report Count (1) */ + 0x75, 0x03, /* Report Size (3) */ + 0x91, 0x03, /* Output (Const,Var,Abs) */ + 0xC0, /* End Collection */ +}; + /* Mouse descriptor (2) */ static const char mse_descriptor[] = { 0x05, 0x01, /* USAGE_PAGE (Generic Desktop) */ @@ -415,6 +455,51 @@ static const char mse_high_res_descriptor[] = { 0xC0, /* END_COLLECTION */ }; +/* Gaming Mouse descriptor with vendor data (2) */ +static const char mse_high_res_ls_1_3_descriptor[] = { + 0x05, 0x01, /* Usage Page (Generic Desktop) */ + 0x09, 0x02, /* Usage (Mouse) */ + 0xA1, 0x01, /* Collection (Application) */ + 0x85, 0x02, /* Report ID (2) */ + 0x09, 0x01, /* Usage (Pointer) */ + 0xA1, 0x00, /* Collection (Physical) */ + 0x95, 0x10, /* Report Count (16) */ + 0x75, 0x01, /* Report Size (1) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x25, 0x01, /* Logical Maximum (1) */ + 0x05, 0x09, /* Usage Page (Button) */ + 0x19, 0x01, /* Usage Minimum (0x01) */ + 0x29, 0x10, /* Usage Maximum (0x10) */ + 0x81, 0x02, /* Input (Data,Var,Abs) */ + 0x95, 0x02, /* Report Count (2) */ + 0x75, 0x10, /* Report Size (16) */ + 0x16, 0x01, 0x80, /* Logical Minimum (-32767) */ + 0x26, 0xFF, 0x7F, /* Logical Maximum (32767) */ + 0x05, 0x01, /* Usage Page (Generic Desktop) */ + 0x09, 0x30, /* Usage (X) */ + 0x09, 0x31, /* Usage (Y) */ + 0x81, 0x06, /* Input (Data,Var,Rel) */ + 0x95, 0x01, /* Report Count (1) */ + 0x75, 0x08, /* Report Size (8) */ + 0x15, 0x81, /* Logical Minimum (-127) */ + 0x25, 0x7F, /* Logical Maximum (127) */ + 0x09, 0x38, /* Usage (Wheel) */ + 0x81, 0x06, /* Input (Data,Var,Rel) */ + 0x95, 0x01, /* Report Count (1) */ + 0x05, 0x0C, /* Usage Page (Consumer) */ + 0x0A, 0x38, 0x02, /* Usage (AC Pan) */ + 0x81, 0x06, /* Input (Data,Var,Rel) */ + 0xC0, /* End Collection */ + 0x06, 0x00, 0xFF, /* Usage Page (Vendor Defined 0xFF00) */ + 0x09, 0xF1, /* Usage (0xF1) */ + 0x75, 0x08, /* Report Size (8) */ + 0x95, 0x05, /* Report Count (5) */ + 0x15, 0x00, /* Logical Minimum (0) */ + 0x26, 0xFF, 0x00, /* Logical Maximum (255) */ + 0x81, 0x00, /* Input (Data,Array,Abs) */ + 0xC0, /* End Collection */ +}; + /* Consumer Control descriptor (3) */ static const char consumer_descriptor[] = { 0x05, 0x0C, /* USAGE_PAGE (Consumer Devices) */ @@ -520,9 +605,9 @@ static const char hidpp_descriptor[] = { /* Maximum size of all defined hid reports in bytes (including report id) */ #define MAX_REPORT_SIZE 8 -/* Make sure all descriptors are present here */ +/* Make sure the largest of each descriptor type is present here */ #define MAX_RDESC_SIZE \ - (sizeof(kbd_descriptor) + \ + (sizeof(kbd_lightspeed_1_3_descriptor) +\ sizeof(mse_bluetooth_descriptor) + \ sizeof(mse5_bluetooth_descriptor) + \ sizeof(consumer_descriptor) + \ @@ -557,6 +642,8 @@ static const u8 hid_reportid_size_map[NUMBER_OF_HID_REPORTS] = { static const struct hid_ll_driver logi_dj_ll_driver; static int logi_dj_recv_query_paired_devices(struct dj_receiver_dev *djrcv_dev); +static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, + unsigned int timeout); static void delayedwork_callback(struct work_struct *work); static LIST_HEAD(dj_hdev_list); @@ -805,7 +892,6 @@ static void delayedwork_callback(struct work_struct *work) struct dj_workitem workitem; unsigned long flags; int count; - int retval; dbg_hid("%s\n", __func__); @@ -842,11 +928,10 @@ static void delayedwork_callback(struct work_struct *work) logi_dj_recv_destroy_djhid_device(djrcv_dev, &workitem); break; case WORKITEM_TYPE_UNKNOWN: - retval = logi_dj_recv_query_paired_devices(djrcv_dev); - if (retval) { - hid_err(djrcv_dev->hidpp, "%s: logi_dj_recv_query_paired_devices error: %d\n", - __func__, retval); - } + if (!djrcv_dev->dj_mode) + logi_dj_recv_switch_to_dj_mode(djrcv_dev, 0); + + logi_dj_recv_query_paired_devices(djrcv_dev); break; case WORKITEM_TYPE_EMPTY: dbg_hid("%s: device list is empty\n", __func__); @@ -1239,8 +1324,13 @@ static int logi_dj_recv_query_paired_devices(struct dj_receiver_dev *djrcv_dev) djrcv_dev->last_query = jiffies; - if (djrcv_dev->type != recvr_type_dj) - return logi_dj_recv_query_hidpp_devices(djrcv_dev); + if (!djrcv_dev->dj_mode) + return 0; + + if (djrcv_dev->type != recvr_type_dj) { + retval = logi_dj_recv_query_hidpp_devices(djrcv_dev); + goto out; + } dj_report = kzalloc(sizeof(struct dj_report), GFP_KERNEL); if (!dj_report) @@ -1250,6 +1340,10 @@ static int logi_dj_recv_query_paired_devices(struct dj_receiver_dev *djrcv_dev) dj_report->report_type = REPORT_TYPE_CMD_GET_PAIRED_DEVICES; retval = logi_dj_recv_send_report(djrcv_dev, dj_report); kfree(dj_report); +out: + if (retval < 0) + hid_err(djrcv_dev->hidpp, "%s error:%d\n", __func__, retval); + return retval; } @@ -1275,6 +1369,8 @@ static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, (u8)timeout; retval = logi_dj_recv_send_report(djrcv_dev, dj_report); + if (retval) + goto out; /* * Ugly sleep to work around a USB 3.0 bug when the receiver is @@ -1283,11 +1379,6 @@ static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, * 50 msec should gives enough time to the receiver to be ready. */ msleep(50); - - if (retval) { - kfree(dj_report); - return retval; - } } /* @@ -1313,7 +1404,13 @@ static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, HIDPP_REPORT_SHORT_LENGTH, HID_OUTPUT_REPORT, HID_REQ_SET_REPORT); +out: kfree(dj_report); + + if (retval < 0) + hid_err(hdev, "%s error:%d\n", __func__, retval); + + djrcv_dev->dj_mode = retval >= 0; return retval; } @@ -1374,12 +1471,19 @@ static int logi_dj_ll_raw_request(struct hid_device *hid, return -EINVAL; if (djrcv_dev->type != recvr_type_dj && count >= 2) { + unsigned char led_report_id = 0; + if (!djrcv_dev->keyboard) { hid_warn(hid, "Received REPORT_TYPE_LEDS request before the keyboard interface was enumerated\n"); return 0; } + + /* This Lightspeed receiver expects LED reports with report ID 1 */ + if (djrcv_dev->type == recvr_type_gaming_hidpp_ls_1_3) + led_report_id = 1; + /* usbhid overrides the report ID and ignores the first byte */ - return hid_hw_raw_request(djrcv_dev->keyboard, 0, buf, count, + return hid_hw_raw_request(djrcv_dev->keyboard, led_report_id, buf, count, report_type, reqtype); } @@ -1426,7 +1530,11 @@ static int logi_dj_ll_parse(struct hid_device *hid) if (djdev->reports_supported & STD_KEYBOARD) { dbg_hid("%s: sending a kbd descriptor, reports_supported: %llx\n", __func__, djdev->reports_supported); - rdcat(rdesc, &rsize, kbd_descriptor, sizeof(kbd_descriptor)); + if (djdev->dj_receiver_dev->type == recvr_type_gaming_hidpp_ls_1_3) + rdcat(rdesc, &rsize, kbd_lightspeed_1_3_descriptor, + sizeof(kbd_lightspeed_1_3_descriptor)); + else + rdcat(rdesc, &rsize, kbd_descriptor, sizeof(kbd_descriptor)); } if (djdev->reports_supported & STD_MOUSE) { @@ -1436,6 +1544,9 @@ static int logi_dj_ll_parse(struct hid_device *hid) djdev->dj_receiver_dev->type == recvr_type_mouse_only) rdcat(rdesc, &rsize, mse_high_res_descriptor, sizeof(mse_high_res_descriptor)); + else if (djdev->dj_receiver_dev->type == recvr_type_gaming_hidpp_ls_1_3) + rdcat(rdesc, &rsize, mse_high_res_ls_1_3_descriptor, + sizeof(mse_high_res_ls_1_3_descriptor)); else if (djdev->dj_receiver_dev->type == recvr_type_27mhz) rdcat(rdesc, &rsize, mse_27mhz_descriptor, sizeof(mse_27mhz_descriptor)); @@ -1695,11 +1806,12 @@ static int logi_dj_raw_event(struct hid_device *hdev, } /* * Mouse-only receivers send unnumbered mouse data. The 27 MHz - * receiver uses 6 byte packets, the nano receiver 8 bytes. + * receiver uses 6 byte packets, the nano receiver 8 bytes, + * the lightspeed receiver (Pro X Superlight) 13 bytes. */ if (djrcv_dev->unnumbered_application == HID_GD_MOUSE && - size <= 8) { - u8 mouse_report[9]; + size <= 13){ + u8 mouse_report[14]; /* Prepend report id */ mouse_report[0] = REPORT_TYPE_MOUSE; @@ -1776,6 +1888,7 @@ static int logi_dj_probe(struct hid_device *hdev, case recvr_type_dj: no_dj_interfaces = 3; break; case recvr_type_hidpp: no_dj_interfaces = 2; break; case recvr_type_gaming_hidpp: no_dj_interfaces = 3; break; + case recvr_type_gaming_hidpp_ls_1_3: no_dj_interfaces = 3; break; case recvr_type_mouse_only: no_dj_interfaces = 2; break; case recvr_type_27mhz: no_dj_interfaces = 2; break; case recvr_type_bluetooth: no_dj_interfaces = 2; break; @@ -1834,12 +1947,11 @@ static int logi_dj_probe(struct hid_device *hdev, } if (has_hidpp) { - retval = logi_dj_recv_switch_to_dj_mode(djrcv_dev, 0); - if (retval < 0) { - hid_err(hdev, "%s: logi_dj_recv_switch_to_dj_mode returned error:%d\n", - __func__, retval); - goto switch_to_dj_mode_fail; - } + /* + * This can fail with a KVM. Ignore errors to let the probe + * succeed, logi_dj_recv_queue_unknown_work will retry later. + */ + logi_dj_recv_switch_to_dj_mode(djrcv_dev, 0); } /* This is enabling the polling urb on the IN endpoint */ @@ -1857,21 +1969,13 @@ static int logi_dj_probe(struct hid_device *hdev, spin_lock_irqsave(&djrcv_dev->lock, flags); djrcv_dev->ready = true; spin_unlock_irqrestore(&djrcv_dev->lock, flags); - retval = logi_dj_recv_query_paired_devices(djrcv_dev); - if (retval < 0) { - hid_err(hdev, "%s: logi_dj_recv_query_paired_devices error:%d\n", - __func__, retval); - /* - * This can happen with a KVM, let the probe succeed, - * logi_dj_recv_queue_unknown_work will retry later. - */ - } + /* This too can fail with a KVM, ignore errors. */ + logi_dj_recv_query_paired_devices(djrcv_dev); } return 0; llopen_failed: -switch_to_dj_mode_fail: hid_hw_stop(hdev); hid_hw_start_fail: @@ -1882,18 +1986,12 @@ hid_hw_start_fail: #ifdef CONFIG_PM static int logi_dj_reset_resume(struct hid_device *hdev) { - int retval; struct dj_receiver_dev *djrcv_dev = hid_get_drvdata(hdev); if (!djrcv_dev || djrcv_dev->hidpp != hdev) return 0; - retval = logi_dj_recv_switch_to_dj_mode(djrcv_dev, 0); - if (retval < 0) { - hid_err(hdev, "%s: logi_dj_recv_switch_to_dj_mode returned error:%d\n", - __func__, retval); - } - + logi_dj_recv_switch_to_dj_mode(djrcv_dev, 0); return 0; } #endif @@ -1987,6 +2085,14 @@ static const struct hid_device_id logi_dj_receivers[] = { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_2), .driver_data = recvr_type_gaming_hidpp}, + { /* Logitech lightspeed receiver (0xc547) */ + HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, + USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_3), + .driver_data = recvr_type_gaming_hidpp_ls_1_3}, + { /* Logitech lightspeed receiver (0xc54d) */ + HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, + USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_4), + .driver_data = recvr_type_gaming_hidpp_ls_1_3}, { /* Logitech 27 MHz HID++ 1.0 receiver (0xc513) */ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_MX3000_RECEIVER), diff --git a/drivers/hid/hid-logitech-hidpp.c b/drivers/hid/hid-logitech-hidpp.c index 5e763de4b94f..d5011a5d0890 100644 --- a/drivers/hid/hid-logitech-hidpp.c +++ b/drivers/hid/hid-logitech-hidpp.c @@ -352,10 +352,15 @@ static int hidpp_send_message_sync(struct hidpp_device *hidpp, do { ret = __do_hidpp_send_message_sync(hidpp, message, response); - if (ret != HIDPP20_ERROR_BUSY) + if (response->report_id == REPORT_ID_HIDPP_SHORT && + ret != HIDPP_ERROR_BUSY) + break; + if ((response->report_id == REPORT_ID_HIDPP_LONG || + response->report_id == REPORT_ID_HIDPP_VERY_LONG) && + ret != HIDPP20_ERROR_BUSY) break; - dbg_hid("%s:got busy hidpp 2.0 error %02X, retrying\n", __func__, ret); + dbg_hid("%s:got busy hidpp error %02X, retrying\n", __func__, ret); } while (--max_retries); mutex_unlock(&hidpp->send_mutex); @@ -971,7 +976,8 @@ static int hidpp_root_get_protocol_version(struct hidpp_device *hidpp) } /* the device might not be connected */ - if (ret == HIDPP_ERROR_RESOURCE_ERROR) + if (ret == HIDPP_ERROR_RESOURCE_ERROR || + ret == HIDPP_ERROR_UNKNOWN_DEVICE) return -EIO; if (ret > 0) { diff --git a/drivers/hid/hid-nintendo.c b/drivers/hid/hid-nintendo.c index c2849a541f65..7ac9217d9096 100644 --- a/drivers/hid/hid-nintendo.c +++ b/drivers/hid/hid-nintendo.c @@ -819,7 +819,7 @@ static void joycon_wait_for_input_report(struct joycon_ctlr *ctlr) #define JC_INPUT_REPORT_MAX_DELTA 17 #define JC_SUBCMD_TX_OFFSET_MS 4 #define JC_SUBCMD_VALID_DELTA_REQ 3 -#define JC_SUBCMD_RATE_MAX_ATTEMPTS 500 +#define JC_SUBCMD_RATE_MAX_ATTEMPTS 25 #define JC_SUBCMD_RATE_LIMITER_USB_MS 20 #define JC_SUBCMD_RATE_LIMITER_BT_MS 60 #define JC_SUBCMD_RATE_LIMITER_MS(ctlr) ((ctlr)->hdev->bus == BUS_USB ? JC_SUBCMD_RATE_LIMITER_USB_MS : JC_SUBCMD_RATE_LIMITER_BT_MS) @@ -2648,7 +2648,8 @@ static int nintendo_hid_probe(struct hid_device *hdev, init_waitqueue_head(&ctlr->wait); spin_lock_init(&ctlr->lock); ctlr->rumble_queue = alloc_workqueue("hid-nintendo-rumble_wq", - WQ_FREEZABLE | WQ_MEM_RECLAIM, 0); + WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU, + 0); if (!ctlr->rumble_queue) { ret = -ENOMEM; goto err; diff --git a/drivers/hid/hid-uclogic-core.c b/drivers/hid/hid-uclogic-core.c index 34fb03ae8ee2..90ebb81041ea 100644 --- a/drivers/hid/hid-uclogic-core.c +++ b/drivers/hid/hid-uclogic-core.c @@ -362,6 +362,23 @@ static int uclogic_raw_event_pen(struct uclogic_drvdata *drvdata, data[8] = pressure_low_byte; data[9] = pressure_high_byte; } + if (size == 12 && pen->fragmented_hires2) { + // 00 00 when on the left side, 01 00 in the right + // we move these to the end of the x coord (u16) to create a correct x coord (u32) + u8 lsb_low_byte = data[10]; + u8 lsb_high_byte = data[11]; + + // shift everything right by 2 bytes, to make space for the moved lsb + data[11] = data[9]; + data[10] = data[8]; + data[9] = data[7]; + data[8] = data[6]; + data[7] = data[5]; + data[6] = data[4]; + + data[4] = lsb_low_byte; + data[5] = lsb_high_byte; + } /* If we need to emulate in-range detection */ if (pen->inrange == UCLOGIC_PARAMS_PEN_INRANGE_NONE) { /* Set in-range bit */ @@ -604,6 +621,8 @@ static const struct hid_device_id uclogic_devices[] = { USB_DEVICE_ID_UGEE_XPPEN_TABLET_STAR06) }, { HID_USB_DEVICE(USB_VENDOR_ID_UGEE, USB_DEVICE_ID_UGEE_XPPEN_TABLET_22R_PRO) }, + { HID_USB_DEVICE(USB_VENDOR_ID_UGEE, + USB_DEVICE_ID_UGEE_XPPEN_TABLET_24_PRO) }, { } }; MODULE_DEVICE_TABLE(hid, uclogic_devices); diff --git a/drivers/hid/hid-uclogic-params.c b/drivers/hid/hid-uclogic-params.c index 4c4bac6f792b..e28176d9d9c9 100644 --- a/drivers/hid/hid-uclogic-params.c +++ b/drivers/hid/hid-uclogic-params.c @@ -1123,6 +1123,9 @@ static int uclogic_params_parse_ugee_v2_desc(const __u8 *str_desc, return -EINVAL; pen_x_lm = get_unaligned_le16(str_desc + 2); + if (str_desc_size > 12) + pen_x_lm += (u8)str_desc[12] << 16; + pen_y_lm = get_unaligned_le16(str_desc + 4); frame_num_buttons = str_desc[6]; *frame_type = str_desc[7]; @@ -1534,7 +1537,7 @@ cleanup: } /* - * uclogic_params_init_ugee_xppen_pro_22r() - Initializes a UGEE XP-Pen Pro 22R tablet device. + * uclogic_params_init_ugee_xppen_pro() - Initializes a UGEE XP-Pen Pro tablet device. * * @hdev: The HID device of the tablet interface to initialize and get * parameters from. Cannot be NULL. @@ -1545,15 +1548,17 @@ cleanup: * Returns: * Zero, if successful. A negative errno code on error. */ -static int uclogic_params_init_ugee_xppen_pro_22r(struct uclogic_params *params, - struct hid_device *hdev, - const u8 rdesc_frame_arr[], - const size_t rdesc_frame_size) +static int uclogic_params_init_ugee_xppen_pro(struct uclogic_params *params, + struct hid_device *hdev, + const u8 rdesc_pen_arr[], + const size_t rdesc_pen_size, + const u8 rdesc_frame_arr[], + const size_t rdesc_frame_size, + size_t str_desc_len) { int rc = 0; struct usb_interface *iface; __u8 bInterfaceNumber; - const int str_desc_len = 12; u8 *str_desc = NULL; __u8 *rdesc_pen = NULL; s32 desc_params[UCLOGIC_RDESC_PH_ID_NUM]; @@ -1616,8 +1621,8 @@ static int uclogic_params_init_ugee_xppen_pro_22r(struct uclogic_params *params, /* Initialize the pen interface */ rdesc_pen = uclogic_rdesc_template_apply( - uclogic_rdesc_ugee_v2_pen_template_arr, - uclogic_rdesc_ugee_v2_pen_template_size, + rdesc_pen_arr, + rdesc_pen_size, desc_params, ARRAY_SIZE(desc_params)); if (!rdesc_pen) { rc = -ENOMEM; @@ -1625,7 +1630,7 @@ static int uclogic_params_init_ugee_xppen_pro_22r(struct uclogic_params *params, } p.pen.desc_ptr = rdesc_pen; - p.pen.desc_size = uclogic_rdesc_ugee_v2_pen_template_size; + p.pen.desc_size = rdesc_pen_size; p.pen.id = 0x02; p.pen.subreport_list[0].value = 0xf0; p.pen.subreport_list[0].id = UCLOGIC_RDESC_V1_FRAME_ID; @@ -1972,10 +1977,30 @@ int uclogic_params_init(struct uclogic_params *params, break; case VID_PID(USB_VENDOR_ID_UGEE, USB_DEVICE_ID_UGEE_XPPEN_TABLET_22R_PRO): - rc = uclogic_params_init_ugee_xppen_pro_22r(&p, + rc = uclogic_params_init_ugee_xppen_pro(&p, hdev, + uclogic_rdesc_ugee_v2_pen_template_arr, + uclogic_rdesc_ugee_v2_pen_template_size, uclogic_rdesc_xppen_artist_22r_pro_frame_arr, - uclogic_rdesc_xppen_artist_22r_pro_frame_size); + uclogic_rdesc_xppen_artist_22r_pro_frame_size, + 12); + if (rc != 0) + goto cleanup; + + break; + case VID_PID(USB_VENDOR_ID_UGEE, + USB_DEVICE_ID_UGEE_XPPEN_TABLET_24_PRO): + rc = uclogic_params_init_ugee_xppen_pro(&p, + hdev, + uclogic_rdesc_xppen_artist_24_pro_pen_template_arr, + uclogic_rdesc_xppen_artist_24_pro_pen_template_size, + uclogic_rdesc_xppen_artist_24_pro_frame_arr, + uclogic_rdesc_xppen_artist_24_pro_frame_size, + 14); + + // The 24 Pro has a fragmented X Coord. + p.pen.fragmented_hires2 = true; + if (rc != 0) goto cleanup; diff --git a/drivers/hid/hid-uclogic-params.h b/drivers/hid/hid-uclogic-params.h index 6ec8643d2ee5..c84ff17fb5d5 100644 --- a/drivers/hid/hid-uclogic-params.h +++ b/drivers/hid/hid-uclogic-params.h @@ -103,6 +103,11 @@ struct uclogic_params_pen { * Only valid if "id" is not zero. */ bool tilt_y_flipped; + /* + * True, if reports include fragmented high resolution X coords. + * This moves bytes 10-11 to the LSB of the X coordinate. + */ + bool fragmented_hires2; }; /* diff --git a/drivers/hid/hid-uclogic-rdesc.c b/drivers/hid/hid-uclogic-rdesc.c index 08a89c6aae3b..a1b31511b625 100644 --- a/drivers/hid/hid-uclogic-rdesc.c +++ b/drivers/hid/hid-uclogic-rdesc.c @@ -1237,6 +1237,131 @@ const __u8 uclogic_rdesc_xppen_artist_22r_pro_frame_arr[] = { const size_t uclogic_rdesc_xppen_artist_22r_pro_frame_size = sizeof(uclogic_rdesc_xppen_artist_22r_pro_frame_arr); +/* Fixed report descriptor template for XP-PEN 24 Pro reports + * Mostly identical to uclogic_rdesc_ugee_v2_pen_template_arr except that the X coordinate has to be + * 32-bits instead of 16-bits. + */ +const __u8 uclogic_rdesc_xppen_artist_24_pro_pen_template_arr[] = { + 0x05, 0x0d, /* Usage Page (Digitizers), */ + 0x09, 0x01, /* Usage (Digitizer), */ + 0xa1, 0x01, /* Collection (Application), */ + 0x85, 0x02, /* Report ID (2), */ + 0x09, 0x20, /* Usage (Stylus), */ + 0xa1, 0x00, /* Collection (Physical), */ + 0x09, 0x42, /* Usage (Tip Switch), */ + 0x09, 0x44, /* Usage (Barrel Switch), */ + 0x09, 0x46, /* Usage (Tablet Pick), */ + 0x75, 0x01, /* Report Size (1), */ + 0x95, 0x03, /* Report Count (3), */ + 0x14, /* Logical Minimum (0), */ + 0x25, 0x01, /* Logical Maximum (1), */ + 0x81, 0x02, /* Input (Variable), */ + 0x95, 0x02, /* Report Count (2), */ + 0x81, 0x03, /* Input (Constant, Variable), */ + 0x09, 0x32, /* Usage (In Range), */ + 0x95, 0x01, /* Report Count (1), */ + 0x81, 0x02, /* Input (Variable), */ + 0x95, 0x02, /* Report Count (2), */ + 0x81, 0x03, /* Input (Constant, Variable), */ + 0x75, 0x10, /* Report Size (16), */ + 0x95, 0x01, /* Report Count (1), */ + 0x35, 0x00, /* Physical Minimum (0), */ + 0xa4, /* Push, */ + 0x05, 0x01, /* Usage Page (Desktop), */ + 0x09, 0x30, /* Usage (X), */ + 0x65, 0x13, /* Unit (Inch), */ + 0x55, 0x0d, /* Unit Exponent (-3), */ + 0x27, UCLOGIC_RDESC_PEN_PH(X_LM), + /* Logical Maximum (PLACEHOLDER), */ + 0x47, UCLOGIC_RDESC_PEN_PH(X_PM), + /* Physical Maximum (PLACEHOLDER), */ + 0x75, 0x20, /* Report Size (32), */ + 0x81, 0x02, /* Input (Variable), */ + 0x75, 0x10, /* Report Size (16), */ + 0x09, 0x31, /* Usage (Y), */ + 0x27, UCLOGIC_RDESC_PEN_PH(Y_LM), + /* Logical Maximum (PLACEHOLDER), */ + 0x47, UCLOGIC_RDESC_PEN_PH(Y_PM), + /* Physical Maximum (PLACEHOLDER), */ + 0x81, 0x02, /* Input (Variable), */ + 0xb4, /* Pop, */ + 0x09, 0x30, /* Usage (Tip Pressure), */ + 0x45, 0x00, /* Physical Maximum (0), */ + 0x27, UCLOGIC_RDESC_PEN_PH(PRESSURE_LM), + /* Logical Maximum (PLACEHOLDER), */ + 0x75, 0x0D, /* Report Size (13), */ + 0x95, 0x01, /* Report Count (1), */ + 0x81, 0x02, /* Input (Variable), */ + 0x75, 0x01, /* Report Size (1), */ + 0x95, 0x03, /* Report Count (3), */ + 0x81, 0x01, /* Input (Constant), */ + 0x09, 0x3d, /* Usage (X Tilt), */ + 0x35, 0xC3, /* Physical Minimum (-61), */ + 0x45, 0x3C, /* Physical Maximum (60), */ + 0x15, 0xC3, /* Logical Minimum (-61), */ + 0x25, 0x3C, /* Logical Maximum (60), */ + 0x75, 0x08, /* Report Size (8), */ + 0x95, 0x01, /* Report Count (1), */ + 0x81, 0x02, /* Input (Variable), */ + 0x09, 0x3e, /* Usage (Y Tilt), */ + 0x35, 0xC3, /* Physical Minimum (-61), */ + 0x45, 0x3C, /* Physical Maximum (60), */ + 0x15, 0xC3, /* Logical Minimum (-61), */ + 0x25, 0x3C, /* Logical Maximum (60), */ + 0x81, 0x02, /* Input (Variable), */ + 0xc0, /* End Collection, */ + 0xc0, /* End Collection */ +}; +const size_t uclogic_rdesc_xppen_artist_24_pro_pen_template_size = + sizeof(uclogic_rdesc_xppen_artist_24_pro_pen_template_arr); + +/* Fixed report descriptor for XP-Pen Arist 24 Pro frame */ +const __u8 uclogic_rdesc_xppen_artist_24_pro_frame_arr[] = { + 0x05, 0x01, /* Usage Page (Desktop), */ + 0x09, 0x07, /* Usage (Keypad), */ + 0xA1, 0x01, /* Collection (Application), */ + 0x85, UCLOGIC_RDESC_V1_FRAME_ID, + /* Report ID (Virtual report), */ + 0x05, 0x0D, /* Usage Page (Digitizer), */ + 0x09, 0x39, /* Usage (Tablet Function Keys), */ + 0xA0, /* Collection (Physical), */ + 0x14, /* Logical Minimum (0), */ + 0x25, 0x01, /* Logical Maximum (1), */ + 0x75, 0x01, /* Report Size (1), */ + 0x95, 0x08, /* Report Count (8), */ + 0x81, 0x01, /* Input (Constant), */ + 0x05, 0x09, /* Usage Page (Button), */ + 0x19, 0x01, /* Usage Minimum (01h), */ + 0x29, 0x14, /* Usage Maximum (14h), */ + 0x95, 0x14, /* Report Count (20), */ + 0x81, 0x02, /* Input (Variable), */ + 0x95, 0x14, /* Report Count (20), */ + 0x81, 0x01, /* Input (Constant), */ + 0x05, 0x01, /* Usage Page (Desktop), */ + 0x09, 0x38, /* Usage (Wheel), */ + 0x75, 0x08, /* Report Size (8), */ + 0x95, 0x01, /* Report Count (1), */ + 0x15, 0xFF, /* Logical Minimum (-1), */ + 0x25, 0x08, /* Logical Maximum (8), */ + 0x81, 0x06, /* Input (Variable, Relative), */ + 0x05, 0x0C, /* Usage Page (Consumer Devices), */ + 0x0A, 0x38, 0x02, /* Usage (AC PAN), */ + 0x95, 0x01, /* Report Count (1), */ + 0x81, 0x06, /* Input (Variable, Relative), */ + 0x26, 0xFF, 0x00, /* Logical Maximum (255), */ + 0x75, 0x08, /* Report Size (8), */ + 0x95, 0x01, /* Report Count (1), */ + 0x81, 0x02, /* Input (Variable), */ + 0x75, 0x01, /* Report Size (1), */ + 0x95, 16, /* Report Count (16), */ + 0x81, 0x01, /* Input (Constant), */ + 0xC0, /* End Collection */ + 0xC0, /* End Collection */ +}; + +const size_t uclogic_rdesc_xppen_artist_24_pro_frame_size = + sizeof(uclogic_rdesc_xppen_artist_24_pro_frame_arr); + /** * uclogic_rdesc_template_apply() - apply report descriptor parameters to a * report descriptor template, creating a report descriptor. Copies the diff --git a/drivers/hid/hid-uclogic-rdesc.h b/drivers/hid/hid-uclogic-rdesc.h index 644a35ff12f2..0619daa6849d 100644 --- a/drivers/hid/hid-uclogic-rdesc.h +++ b/drivers/hid/hid-uclogic-rdesc.h @@ -214,4 +214,12 @@ extern const size_t uclogic_rdesc_ugee_g5_frame_size; extern const __u8 uclogic_rdesc_xppen_artist_22r_pro_frame_arr[]; extern const size_t uclogic_rdesc_xppen_artist_22r_pro_frame_size; +/* Fixed report descriptor for XP-Pen Arist 24 Pro frame */ +extern const __u8 uclogic_rdesc_xppen_artist_24_pro_pen_template_arr[]; +extern const size_t uclogic_rdesc_xppen_artist_24_pro_pen_template_size; + +/* Fixed report descriptor for XP-Pen Arist 24 Pro frame */ +extern const __u8 uclogic_rdesc_xppen_artist_24_pro_frame_arr[]; +extern const size_t uclogic_rdesc_xppen_artist_24_pro_frame_size; + #endif /* _HID_UCLOGIC_RDESC_H */ diff --git a/drivers/hid/hid-winwing.c b/drivers/hid/hid-winwing.c index d4afbbd27807..ab65dc12d1e0 100644 --- a/drivers/hid/hid-winwing.c +++ b/drivers/hid/hid-winwing.c @@ -37,6 +37,7 @@ struct winwing_drv_data { struct hid_device *hdev; __u8 *report_buf; struct mutex lock; + int map_more_buttons; unsigned int num_leds; struct winwing_led leds[]; }; @@ -81,12 +82,10 @@ static int winwing_init_led(struct hid_device *hdev, int ret; int i; - size_t data_size = struct_size(data, leds, 3); - - data = devm_kzalloc(&hdev->dev, data_size, GFP_KERNEL); + data = hid_get_drvdata(hdev); if (!data) - return -ENOMEM; + return -EINVAL; data->report_buf = devm_kmalloc(&hdev->dev, MAX_REPORT, GFP_KERNEL); @@ -106,6 +105,7 @@ static int winwing_init_led(struct hid_device *hdev, "%s::%s", dev_name(&input->dev), info->led_name); + if (!led->cdev.name) return -ENOMEM; @@ -114,14 +114,98 @@ static int winwing_init_led(struct hid_device *hdev, return ret; } - hid_set_drvdata(hdev, data); - return ret; } +static int winwing_map_button(int button, int map_more_buttons) +{ + if (button < 1) + return KEY_RESERVED; + + if (button > 112) + return KEY_RESERVED; + + if (button <= 16) { + /* + * Grip buttons [1 .. 16] are mapped to + * key codes BTN_TRIGGER .. BTN_DEAD + */ + return (button - 1) + BTN_JOYSTICK; + } + + if (button >= 65) { + /* + * Base buttons [65 .. 112] are mapped to + * key codes BTN_TRIGGER_HAPPY17 .. KEY_MAX + */ + return (button - 65) + BTN_TRIGGER_HAPPY17; + } + + if (!map_more_buttons) { + /* + * Not mapping numbers [33 .. 64] which + * are not assigned to any real buttons + */ + if (button >= 33) + return KEY_RESERVED; + /* + * Grip buttons [17 .. 32] are mapped to + * BTN_TRIGGER_HAPPY1 .. BTN_TRIGGER_HAPPY16 + */ + return (button - 17) + BTN_TRIGGER_HAPPY1; + } + + if (button >= 49) { + /* + * Grip buttons [49 .. 64] are mapped to + * BTN_TRIGGER_HAPPY1 .. BTN_TRIGGER_HAPPY16 + */ + return (button - 49) + BTN_TRIGGER_HAPPY1; + } + + /* + * Grip buttons [17 .. 44] are mapped to + * key codes KEY_MACRO1 .. KEY_MACRO28; + * also mapping numbers [45 .. 48] which + * are not assigned to any real buttons. + */ + return (button - 17) + KEY_MACRO1; +} + +static int winwing_input_mapping(struct hid_device *hdev, + struct hid_input *hi, struct hid_field *field, struct hid_usage *usage, + unsigned long **bit, int *max) +{ + struct winwing_drv_data *data; + int code = KEY_RESERVED; + int button = 0; + + data = hid_get_drvdata(hdev); + + if (!data) + return -EINVAL; + + if ((usage->hid & HID_USAGE_PAGE) != HID_UP_BUTTON) + return 0; + + if (field->application != HID_GD_JOYSTICK) + return 0; + + /* Button numbers start with 1 */ + button = usage->hid & HID_USAGE; + + code = winwing_map_button(button, data->map_more_buttons); + + hid_map_usage(hi, usage, bit, max, EV_KEY, code); + + return 1; +} + static int winwing_probe(struct hid_device *hdev, const struct hid_device_id *id) { + struct winwing_drv_data *data; + size_t data_size = struct_size(data, leds, 3); int ret; ret = hid_parse(hdev); @@ -130,6 +214,15 @@ static int winwing_probe(struct hid_device *hdev, return ret; } + data = devm_kzalloc(&hdev->dev, data_size, GFP_KERNEL); + + if (!data) + return -ENOMEM; + + data->map_more_buttons = id->driver_data; + + hid_set_drvdata(hdev, data); + ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT); if (ret) { hid_err(hdev, "hw start failed\n"); @@ -152,64 +245,11 @@ static int winwing_input_configured(struct hid_device *hdev, return ret; } -static const __u8 original_rdesc_buttons[] = { - 0x05, 0x09, 0x19, 0x01, 0x29, 0x6F, - 0x15, 0x00, 0x25, 0x01, 0x35, 0x00, - 0x45, 0x01, 0x75, 0x01, 0x95, 0x6F, - 0x81, 0x02, 0x75, 0x01, 0x95, 0x01, - 0x81, 0x01 -}; - -/* - * HID report descriptor shows 111 buttons, which exceeds maximum - * number of buttons (80) supported by Linux kernel HID subsystem. - * - * This module skips numbers 32-63, unused on some throttle grips. - */ - -static const __u8 *winwing_report_fixup(struct hid_device *hdev, __u8 *rdesc, - unsigned int *rsize) -{ - int sig_length = sizeof(original_rdesc_buttons); - int unused_button_numbers = 32; - - if (*rsize < 34) - return rdesc; - - if (memcmp(rdesc + 8, original_rdesc_buttons, sig_length) == 0) { - - /* Usage Maximum */ - rdesc[13] -= unused_button_numbers; - - /* Report Count for buttons */ - rdesc[25] -= unused_button_numbers; - - /* Report Count for padding [HID1_11, 6.2.2.9] */ - rdesc[31] += unused_button_numbers; - - hid_info(hdev, "winwing descriptor fixed\n"); - } - - return rdesc; -} - -static int winwing_raw_event(struct hid_device *hdev, - struct hid_report *report, u8 *raw_data, int size) -{ - if (size >= 15) { - /* Skip buttons 32 .. 63 */ - memmove(raw_data + 5, raw_data + 9, 6); - - /* Clear the padding */ - memset(raw_data + 11, 0, 4); - } - - return 0; -} - static const struct hid_device_id winwing_devices[] = { - { HID_USB_DEVICE(0x4098, 0xbe62) }, /* TGRIP-18 */ - { HID_USB_DEVICE(0x4098, 0xbe68) }, /* TGRIP-16EX */ + { HID_USB_DEVICE(0x4098, 0xbd65), .driver_data = 1 }, /* TGRIP-15E */ + { HID_USB_DEVICE(0x4098, 0xbd64), .driver_data = 1 }, /* TGRIP-15EX */ + { HID_USB_DEVICE(0x4098, 0xbe68), .driver_data = 0 }, /* TGRIP-16EX */ + { HID_USB_DEVICE(0x4098, 0xbe62), .driver_data = 0 }, /* TGRIP-18 */ {} }; @@ -218,10 +258,9 @@ MODULE_DEVICE_TABLE(hid, winwing_devices); static struct hid_driver winwing_driver = { .name = "winwing", .id_table = winwing_devices, - .probe = winwing_probe, .input_configured = winwing_input_configured, - .report_fixup = winwing_report_fixup, - .raw_event = winwing_raw_event, + .input_mapping = winwing_input_mapping, + .probe = winwing_probe, }; module_hid_driver(winwing_driver); diff --git a/drivers/hid/intel-ish-hid/ipc/ipc.c b/drivers/hid/intel-ish-hid/ipc/ipc.c index 3ddaa2cd39d5..abf9c9a31c39 100644 --- a/drivers/hid/intel-ish-hid/ipc/ipc.c +++ b/drivers/hid/intel-ish-hid/ipc/ipc.c @@ -481,6 +481,20 @@ out: return ret; } +static void ish_send_reset_notify_ack(struct ishtp_device *dev) +{ + /* Read reset ID */ + u32 reset_id = ish_reg_read(dev, IPC_REG_ISH2HOST_MSG) & 0xFFFF; + + /* + * Set HOST2ISH.ILUP. Apparently we need this BEFORE sending + * RESET_NOTIFY_ACK - FW will be checking for it + */ + ish_set_host_rdy(dev); + /* Send RESET_NOTIFY_ACK (with reset_id) */ + ipc_send_mng_msg(dev, MNG_RESET_NOTIFY_ACK, &reset_id, sizeof(u32)); +} + #define TIME_SLICE_FOR_FW_RDY_MS 100 #define TIME_SLICE_FOR_INPUT_RDY_MS 100 #define TIMEOUT_FOR_FW_RDY_MS 2000 @@ -496,13 +510,9 @@ out: */ static int ish_fw_reset_handler(struct ishtp_device *dev) { - uint32_t reset_id; unsigned long flags; int ret; - /* Read reset ID */ - reset_id = ish_reg_read(dev, IPC_REG_ISH2HOST_MSG) & 0xFFFF; - /* Clear IPC output queue */ spin_lock_irqsave(&dev->wr_processing_spinlock, flags); list_splice_init(&dev->wr_processing_list, &dev->wr_free_list); @@ -521,15 +531,6 @@ static int ish_fw_reset_handler(struct ishtp_device *dev) /* Send clock sync at once after reset */ ishtp_dev->prev_sync = 0; - /* - * Set HOST2ISH.ILUP. Apparently we need this BEFORE sending - * RESET_NOTIFY_ACK - FW will be checking for it - */ - ish_set_host_rdy(dev); - /* Send RESET_NOTIFY_ACK (with reset_id) */ - ipc_send_mng_msg(dev, MNG_RESET_NOTIFY_ACK, &reset_id, - sizeof(uint32_t)); - /* Wait for ISH FW'es ILUP and ISHTP_READY */ ret = timed_wait_for_timeout(dev, WAIT_FOR_FW_RDY, TIME_SLICE_FOR_FW_RDY_MS, @@ -563,8 +564,6 @@ static void fw_reset_work_fn(struct work_struct *work) if (!rv) { /* ISH is ILUP & ISHTP-ready. Restart ISHTP */ msleep_interruptible(TIMEOUT_FOR_HW_RDY_MS); - ishtp_dev->recvd_hw_ready = 1; - wake_up_interruptible(&ishtp_dev->wait_hw_ready); /* ISHTP notification in IPC_RESET sequence completion */ if (!work_pending(work)) @@ -625,15 +624,14 @@ static void recv_ipc(struct ishtp_device *dev, uint32_t doorbell_val) break; case MNG_RESET_NOTIFY: - if (!ishtp_dev) { - ishtp_dev = dev; - } - schedule_work(&fw_reset_work); - break; + ish_send_reset_notify_ack(ishtp_dev); + fallthrough; case MNG_RESET_NOTIFY_ACK: dev->recvd_hw_ready = 1; wake_up_interruptible(&dev->wait_hw_ready); + if (!work_pending(&fw_reset_work)) + queue_work(dev->unbound_wq, &fw_reset_work); break; } } @@ -730,22 +728,28 @@ int ish_disable_dma(struct ishtp_device *dev) * ish_wakeup() - wakeup ishfw from waiting-for-host state * @dev: ishtp device pointer * - * Set the dma enable bit and send a void message to FW, + * Set the dma enable bit and send a IPC RESET message to FW, * it wil wakeup FW from waiting-for-host state. + * + * Return: 0 for success else error code. */ -static void ish_wakeup(struct ishtp_device *dev) +static int ish_wakeup(struct ishtp_device *dev) { + int ret; + /* Set dma enable bit */ ish_reg_write(dev, IPC_REG_ISH_RMP2, IPC_RMP2_DMA_ENABLED); /* - * Send 0 IPC message so that ISH FW wakes up if it was already + * Send IPC RESET message so that ISH FW wakes up if it was already * asleep. */ - ish_reg_write(dev, IPC_REG_HOST2ISH_DRBL, IPC_DRBL_BUSY_BIT); + ret = ish_ipc_reset(dev); /* Flush writes to doorbell and REMAP2 */ ish_reg_read(dev, IPC_REG_ISH_HOST_FWSTS); + + return ret; } /** @@ -794,11 +798,11 @@ static int _ish_hw_reset(struct ishtp_device *dev) pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, csr); /* Now we can enable ISH DMA operation and wakeup ISHFW */ - ish_wakeup(dev); - - return 0; + return ish_wakeup(dev); } +#define RECVD_HW_READY_TIMEOUT (10 * HZ) + /** * _ish_ipc_reset() - IPC reset * @dev: ishtp device pointer @@ -833,7 +837,8 @@ static int _ish_ipc_reset(struct ishtp_device *dev) } wait_event_interruptible_timeout(dev->wait_hw_ready, - dev->recvd_hw_ready, 2 * HZ); + dev->recvd_hw_ready, + RECVD_HW_READY_TIMEOUT); if (!dev->recvd_hw_ready) { dev_err(dev->devc, "Timed out waiting for HW ready\n"); rv = -ENODEV; @@ -857,21 +862,7 @@ int ish_hw_start(struct ishtp_device *dev) set_host_ready(dev); /* After that we can enable ISH DMA operation and wakeup ISHFW */ - ish_wakeup(dev); - - /* wait for FW-initiated reset flow */ - if (!dev->recvd_hw_ready) - wait_event_interruptible_timeout(dev->wait_hw_ready, - dev->recvd_hw_ready, - 10 * HZ); - - if (!dev->recvd_hw_ready) { - dev_err(dev->devc, - "[ishtp-ish]: Timed out waiting for FW-initiated reset\n"); - return -ENODEV; - } - - return 0; + return ish_wakeup(dev); } /** @@ -933,6 +924,25 @@ static const struct ishtp_hw_ops ish_hw_ops = { .dma_no_cache_snooping = _dma_no_cache_snooping }; +static void ishtp_free_workqueue(void *wq) +{ + destroy_workqueue(wq); +} + +static struct workqueue_struct *devm_ishtp_alloc_workqueue(struct device *dev) +{ + struct workqueue_struct *wq; + + wq = alloc_workqueue("ishtp_unbound_%d", WQ_UNBOUND, 0, dev->id); + if (!wq) + return NULL; + + if (devm_add_action_or_reset(dev, ishtp_free_workqueue, wq)) + return NULL; + + return wq; +} + /** * ish_dev_init() -Initialize ISH devoce * @pdev: PCI device @@ -953,6 +963,10 @@ struct ishtp_device *ish_dev_init(struct pci_dev *pdev) if (!dev) return NULL; + dev->unbound_wq = devm_ishtp_alloc_workqueue(&pdev->dev); + if (!dev->unbound_wq) + return NULL; + dev->devc = &pdev->dev; ishtp_device_init(dev); @@ -982,6 +996,7 @@ struct ishtp_device *ish_dev_init(struct pci_dev *pdev) list_add_tail(&tx_buf->link, &dev->wr_free_list); } + ishtp_dev = dev; ret = devm_work_autocancel(&pdev->dev, &fw_reset_work, fw_reset_work_fn); if (ret) { dev_err(dev->devc, "Failed to initialise FW reset work\n"); diff --git a/drivers/hid/intel-ish-hid/ipc/pci-ish.c b/drivers/hid/intel-ish-hid/ipc/pci-ish.c index 9d150ce234f2..1612e8cb23f0 100644 --- a/drivers/hid/intel-ish-hid/ipc/pci-ish.c +++ b/drivers/hid/intel-ish-hid/ipc/pci-ish.c @@ -147,6 +147,12 @@ static inline bool ish_should_enter_d0i3(struct pci_dev *pdev) static inline bool ish_should_leave_d0i3(struct pci_dev *pdev) { + struct ishtp_device *dev = pci_get_drvdata(pdev); + u32 fwsts = dev->ops->get_fw_status(dev); + + if (dev->suspend_flag || !IPC_IS_ISH_ILUP(fwsts)) + return false; + return !pm_resume_via_firmware() || pdev->device == PCI_DEVICE_ID_INTEL_ISH_CHV; } @@ -277,10 +283,8 @@ static void __maybe_unused ish_resume_handler(struct work_struct *work) { struct pci_dev *pdev = to_pci_dev(ish_resume_device); struct ishtp_device *dev = pci_get_drvdata(pdev); - uint32_t fwsts = dev->ops->get_fw_status(dev); - if (ish_should_leave_d0i3(pdev) && !dev->suspend_flag - && IPC_IS_ISH_ILUP(fwsts)) { + if (ish_should_leave_d0i3(pdev)) { if (device_may_wakeup(&pdev->dev)) disable_irq_wake(pdev->irq); @@ -384,12 +388,29 @@ static int __maybe_unused ish_resume(struct device *device) ish_resume_device = device; dev->resume_flag = 1; - schedule_work(&resume_work); + /* If ISH resume from D3, reset ishtp clients before return */ + if (!ish_should_leave_d0i3(pdev)) + ishtp_reset_handler(dev); + + queue_work(dev->unbound_wq, &resume_work); return 0; } -static SIMPLE_DEV_PM_OPS(ish_pm_ops, ish_suspend, ish_resume); +static int __maybe_unused ish_freeze(struct device *device) +{ + struct pci_dev *pdev = to_pci_dev(device); + + return pci_save_state(pdev); +} + +static const struct dev_pm_ops __maybe_unused ish_pm_ops = { + .suspend = pm_sleep_ptr(ish_suspend), + .resume = pm_sleep_ptr(ish_resume), + .freeze = pm_sleep_ptr(ish_freeze), + .restore = pm_sleep_ptr(ish_resume), + .poweroff = pm_sleep_ptr(ish_suspend), +}; static ssize_t base_version_show(struct device *cdev, struct device_attribute *attr, char *buf) diff --git a/drivers/hid/intel-ish-hid/ishtp-hid-client.c b/drivers/hid/intel-ish-hid/ishtp-hid-client.c index d8c3c54a8c0f..f37b3bc2bb7d 100644 --- a/drivers/hid/intel-ish-hid/ishtp-hid-client.c +++ b/drivers/hid/intel-ish-hid/ishtp-hid-client.c @@ -757,8 +757,15 @@ static void hid_ishtp_cl_resume_handler(struct work_struct *work) struct ishtp_cl *hid_ishtp_cl = client_data->hid_ishtp_cl; if (ishtp_wait_resume(ishtp_get_ishtp_device(hid_ishtp_cl))) { - client_data->suspended = false; - wake_up_interruptible(&client_data->ishtp_resume_wait); + /* + * Clear the suspended flag only when the connection is established. + * If the connection is not established, the suspended flag will be cleared after + * the connection is made. + */ + if (ishtp_get_connection_state(hid_ishtp_cl) == ISHTP_CL_CONNECTED) { + client_data->suspended = false; + wake_up_interruptible(&client_data->ishtp_resume_wait); + } } else { hid_ishtp_trace(client_data, "hid client: wait for resume timed out"); dev_err(cl_data_to_dev(client_data), "wait for resume timed out"); @@ -860,7 +867,7 @@ static int hid_ishtp_cl_reset(struct ishtp_cl_device *cl_device) hid_ishtp_trace(client_data, "%s hid_ishtp_cl %p\n", __func__, hid_ishtp_cl); - schedule_work(&client_data->work); + queue_work(ishtp_get_workqueue(cl_device), &client_data->work); return 0; } @@ -902,7 +909,7 @@ static int hid_ishtp_cl_resume(struct device *device) hid_ishtp_trace(client_data, "%s hid_ishtp_cl %p\n", __func__, hid_ishtp_cl); - schedule_work(&client_data->resume_work); + queue_work(ishtp_get_workqueue(cl_device), &client_data->resume_work); return 0; } diff --git a/drivers/hid/intel-ish-hid/ishtp/bus.c b/drivers/hid/intel-ish-hid/ishtp/bus.c index 93a0432e7058..c6ce37244e49 100644 --- a/drivers/hid/intel-ish-hid/ishtp/bus.c +++ b/drivers/hid/intel-ish-hid/ishtp/bus.c @@ -541,7 +541,7 @@ void ishtp_cl_bus_rx_event(struct ishtp_cl_device *device) return; if (device->event_cb) - schedule_work(&device->event_work); + queue_work(device->ishtp_dev->unbound_wq, &device->event_work); } /** @@ -877,6 +877,22 @@ struct device *ishtp_get_pci_device(struct ishtp_cl_device *device) EXPORT_SYMBOL(ishtp_get_pci_device); /** + * ishtp_get_workqueue - Retrieve the workqueue associated with an ISHTP device + * @cl_device: Pointer to the ISHTP client device structure + * + * Returns the workqueue_struct pointer (unbound_wq) associated with the given + * ISHTP client device. This workqueue is typically used for scheduling work + * related to the device. + * + * Return: Pointer to struct workqueue_struct. + */ +struct workqueue_struct *ishtp_get_workqueue(struct ishtp_cl_device *cl_device) +{ + return cl_device->ishtp_dev->unbound_wq; +} +EXPORT_SYMBOL(ishtp_get_workqueue); + +/** * ishtp_trace_callback() - Return trace callback * @cl_device: ISH-TP client device instance * diff --git a/drivers/hid/intel-ish-hid/ishtp/client.c b/drivers/hid/intel-ish-hid/ishtp/client.c index 21a2c0773cc2..40f510b1c072 100644 --- a/drivers/hid/intel-ish-hid/ishtp/client.c +++ b/drivers/hid/intel-ish-hid/ishtp/client.c @@ -1261,6 +1261,12 @@ void ishtp_set_connection_state(struct ishtp_cl *cl, int state) } EXPORT_SYMBOL(ishtp_set_connection_state); +int ishtp_get_connection_state(struct ishtp_cl *cl) +{ + return cl->state; +} +EXPORT_SYMBOL(ishtp_get_connection_state); + void ishtp_cl_set_fw_client_id(struct ishtp_cl *cl, int fw_client_id) { cl->fw_client_id = fw_client_id; diff --git a/drivers/hid/intel-ish-hid/ishtp/hbm.c b/drivers/hid/intel-ish-hid/ishtp/hbm.c index 8ee5467127d8..97c4fcd9e3c6 100644 --- a/drivers/hid/intel-ish-hid/ishtp/hbm.c +++ b/drivers/hid/intel-ish-hid/ishtp/hbm.c @@ -573,7 +573,7 @@ void ishtp_hbm_dispatch(struct ishtp_device *dev, /* Start firmware loading process if it has loader capability */ if (version_res->host_version_supported & ISHTP_SUPPORT_CAP_LOADER) - schedule_work(&dev->work_fw_loader); + queue_work(dev->unbound_wq, &dev->work_fw_loader); dev->version.major_version = HBM_MAJOR_VERSION; dev->version.minor_version = HBM_MINOR_VERSION; @@ -864,7 +864,7 @@ void recv_hbm(struct ishtp_device *dev, struct ishtp_msg_hdr *ishtp_hdr) dev->rd_msg_fifo_tail = (dev->rd_msg_fifo_tail + IPC_PAYLOAD_SIZE) % (RD_INT_FIFO_SIZE * IPC_PAYLOAD_SIZE); spin_unlock_irqrestore(&dev->rd_msg_spinlock, flags); - schedule_work(&dev->bh_hbm_work); + queue_work(dev->unbound_wq, &dev->bh_hbm_work); eoi: return; } diff --git a/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h b/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h index 23db97ecf21c..4b0596eadf1c 100644 --- a/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h +++ b/drivers/hid/intel-ish-hid/ishtp/ishtp-dev.h @@ -175,6 +175,9 @@ struct ishtp_device { struct hbm_version version; int transfer_path; /* Choice of transfer path: IPC or DMA */ + /* Alloc a dedicated unbound workqueue for ishtp device */ + struct workqueue_struct *unbound_wq; + /* work structure for scheduling firmware loading tasks */ struct work_struct work_fw_loader; /* waitq for waiting for command response from the firmware loader */ diff --git a/drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c b/drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c index 0156ab391778..cfda66ee4895 100644 --- a/drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c +++ b/drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c @@ -344,7 +344,6 @@ exit: if (try_recover(qcdev)) qcdev->state = QUICKI2C_DISABLED; - pm_runtime_mark_last_busy(qcdev->dev); pm_runtime_put_autosuspend(qcdev->dev); return IRQ_HANDLED; @@ -735,7 +734,6 @@ static int quicki2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) /* Enable runtime power management */ pm_runtime_use_autosuspend(qcdev->dev); pm_runtime_set_autosuspend_delay(qcdev->dev, DEFAULT_AUTO_SUSPEND_DELAY_MS); - pm_runtime_mark_last_busy(qcdev->dev); pm_runtime_put_noidle(qcdev->dev); pm_runtime_put_autosuspend(qcdev->dev); diff --git a/drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-hid.c b/drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-hid.c index 5c3ec95bb3fd..834a537b6780 100644 --- a/drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-hid.c +++ b/drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-hid.c @@ -72,7 +72,6 @@ static int quicki2c_hid_raw_request(struct hid_device *hid, break; } - pm_runtime_mark_last_busy(qcdev->dev); pm_runtime_put_autosuspend(qcdev->dev); return ret; diff --git a/drivers/hid/intel-thc-hid/intel-quickspi/pci-quickspi.c b/drivers/hid/intel-thc-hid/intel-quickspi/pci-quickspi.c index 14cabd5dc6dd..ad6bd59963b2 100644 --- a/drivers/hid/intel-thc-hid/intel-quickspi/pci-quickspi.c +++ b/drivers/hid/intel-thc-hid/intel-quickspi/pci-quickspi.c @@ -339,7 +339,6 @@ end: if (try_recover(qsdev)) qsdev->state = QUICKSPI_DISABLED; - pm_runtime_mark_last_busy(qsdev->dev); pm_runtime_put_autosuspend(qsdev->dev); return IRQ_HANDLED; @@ -674,7 +673,6 @@ static int quickspi_probe(struct pci_dev *pdev, /* Enable runtime power management */ pm_runtime_use_autosuspend(qsdev->dev); pm_runtime_set_autosuspend_delay(qsdev->dev, DEFAULT_AUTO_SUSPEND_DELAY_MS); - pm_runtime_mark_last_busy(qsdev->dev); pm_runtime_put_noidle(qsdev->dev); pm_runtime_put_autosuspend(qsdev->dev); diff --git a/drivers/hid/intel-thc-hid/intel-quickspi/quickspi-hid.c b/drivers/hid/intel-thc-hid/intel-quickspi/quickspi-hid.c index ad52e402c28a..82c72bfa2795 100644 --- a/drivers/hid/intel-thc-hid/intel-quickspi/quickspi-hid.c +++ b/drivers/hid/intel-thc-hid/intel-quickspi/quickspi-hid.c @@ -71,7 +71,6 @@ static int quickspi_hid_raw_request(struct hid_device *hid, break; } - pm_runtime_mark_last_busy(qsdev->dev); pm_runtime_put_autosuspend(qsdev->dev); return ret; diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c index 3cad30a40c19..e68853815c7a 100644 --- a/drivers/irqchip/irq-atmel-aic-common.c +++ b/drivers/irqchip/irq-atmel-aic-common.c @@ -187,20 +187,11 @@ void __init aic_common_rtt_irq_fixup(void) static void __init aic_common_irq_fixup(const struct of_device_id *matches) { - struct device_node *root = of_find_node_by_path("/"); - const struct of_device_id *match; + void (*fixup)(void); - if (!root) - return; - - match = of_match_node(matches, root); - - if (match) { - void (*fixup)(void) = match->data; + fixup = of_machine_get_match_data(matches); + if (fixup) fixup(); - } - - of_node_put(root); } struct irq_domain *__init aic_common_of_init(struct device_node *node, diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 06e6291be11b..11e7282dc297 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -214,10 +214,6 @@ config LEDS_EL15203000 To compile this driver as a module, choose M here: the module will be called leds-el15203000. -config LEDS_EXPRESSWIRE - bool - depends on GPIOLIB - config LEDS_TURRIS_OMNIA tristate "LED support for CZ.NIC's Turris Omnia" depends on LEDS_CLASS_MULTICOLOR @@ -443,8 +439,8 @@ config LEDS_LP55XX_COMMON depends on LEDS_CLASS_MULTICOLOR depends on OF depends on I2C - select FW_LOADER - select FW_LOADER_USER_HELPER + imply FW_LOADER + imply FW_LOADER_USER_HELPER help This option supports common operations for LP5521/5523/55231/5562/5569/ 8501 devices. diff --git a/drivers/leds/flash/leds-rt4505.c b/drivers/leds/flash/leds-rt4505.c index f16358b8dfc1..18fd5b7e528f 100644 --- a/drivers/leds/flash/leds-rt4505.c +++ b/drivers/leds/flash/leds-rt4505.c @@ -365,7 +365,7 @@ static int rt4505_probe(struct i2c_client *client) return ret; } - child = fwnode_get_next_available_child_node(client->dev.fwnode, NULL); + child = device_get_next_child_node(&client->dev, NULL); if (!child) { dev_err(priv->dev, "Failed to get child node\n"); return -EINVAL; diff --git a/drivers/leds/flash/leds-rt8515.c b/drivers/leds/flash/leds-rt8515.c index 6af0d2c7fc56..f6b439674c03 100644 --- a/drivers/leds/flash/leds-rt8515.c +++ b/drivers/leds/flash/leds-rt8515.c @@ -304,7 +304,7 @@ static int rt8515_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(rt->enable_torch), "cannot get ENT (enable torch) GPIO\n"); - child = fwnode_get_next_available_child_node(dev->fwnode, NULL); + child = device_get_next_child_node(dev, NULL); if (!child) { dev_err(dev, "No fwnode child node found for connected LED.\n"); diff --git a/drivers/leds/flash/leds-sgm3140.c b/drivers/leds/flash/leds-sgm3140.c index 3e83200675f2..dc6840357370 100644 --- a/drivers/leds/flash/leds-sgm3140.c +++ b/drivers/leds/flash/leds-sgm3140.c @@ -214,8 +214,7 @@ static int sgm3140_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, ret, "Failed to request regulator\n"); - child_node = fwnode_get_next_available_child_node(pdev->dev.fwnode, - NULL); + child_node = device_get_next_child_node(&pdev->dev, NULL); if (!child_node) { dev_err(&pdev->dev, "No fwnode child node found for connected LED.\n"); diff --git a/drivers/leds/flash/leds-tps6131x.c b/drivers/leds/flash/leds-tps6131x.c index 6f4d4fd55361..f0f1f2b77d5a 100644 --- a/drivers/leds/flash/leds-tps6131x.c +++ b/drivers/leds/flash/leds-tps6131x.c @@ -544,7 +544,7 @@ static int tps6131x_parse_node(struct tps6131x *tps6131x) tps6131x->valley_current_limit = device_property_read_bool(dev, "ti,valley-current-limit"); - tps6131x->led_node = fwnode_get_next_available_child_node(dev->fwnode, NULL); + tps6131x->led_node = device_get_next_child_node(dev, NULL); if (!tps6131x->led_node) { dev_err(dev, "Missing LED node\n"); return -EINVAL; diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c index f3faf37f9a08..885399ed0776 100644 --- a/drivers/leds/led-class.c +++ b/drivers/leds/led-class.c @@ -38,7 +38,7 @@ static ssize_t brightness_show(struct device *dev, brightness = led_cdev->brightness; mutex_unlock(&led_cdev->led_access); - return sprintf(buf, "%u\n", brightness); + return sysfs_emit(buf, "%u\n", brightness); } static ssize_t brightness_store(struct device *dev, @@ -80,7 +80,7 @@ static ssize_t max_brightness_show(struct device *dev, max_brightness = led_cdev->max_brightness; mutex_unlock(&led_cdev->led_access); - return sprintf(buf, "%u\n", max_brightness); + return sysfs_emit(buf, "%u\n", max_brightness); } static DEVICE_ATTR_RO(max_brightness); @@ -122,7 +122,7 @@ static ssize_t brightness_hw_changed_show(struct device *dev, if (led_cdev->brightness_hw_changed == -1) return -ENODATA; - return sprintf(buf, "%u\n", led_cdev->brightness_hw_changed); + return sysfs_emit(buf, "%u\n", led_cdev->brightness_hw_changed); } static DEVICE_ATTR_RO(brightness_hw_changed); diff --git a/drivers/leds/leds-cros_ec.c b/drivers/leds/leds-cros_ec.c index 377cf04e202a..bea3cc3fbfd2 100644 --- a/drivers/leds/leds-cros_ec.c +++ b/drivers/leds/leds-cros_ec.c @@ -142,9 +142,6 @@ static int cros_ec_led_count_subleds(struct device *dev, } } - if (!num_subleds) - return -EINVAL; - *max_brightness = common_range; return num_subleds; } @@ -189,6 +186,8 @@ static int cros_ec_led_probe_one(struct device *dev, struct cros_ec_device *cros &priv->led_mc_cdev.led_cdev.max_brightness); if (num_subleds < 0) return num_subleds; + if (num_subleds == 0) + return 0; /* LED without any colors, skip */ priv->cros_ec = cros_ec; priv->led_id = id; diff --git a/drivers/leds/leds-lp50xx.c b/drivers/leds/leds-lp50xx.c index 94f8ef6b482c..e2a9c8592953 100644 --- a/drivers/leds/leds-lp50xx.c +++ b/drivers/leds/leds-lp50xx.c @@ -50,11 +50,17 @@ #define LP50XX_SW_RESET 0xff #define LP50XX_CHIP_EN BIT(6) +#define LP50XX_CHIP_DISABLE 0x00 +#define LP50XX_START_TIME_US 500 +#define LP50XX_RESET_TIME_US 3 + +#define LP50XX_EN_GPIO_LOW 0 +#define LP50XX_EN_GPIO_HIGH 1 /* There are 3 LED outputs per bank */ #define LP50XX_LEDS_PER_MODULE 3 -#define LP5009_MAX_LED_MODULES 2 +#define LP5009_MAX_LED_MODULES 3 #define LP5012_MAX_LED_MODULES 4 #define LP5018_MAX_LED_MODULES 6 #define LP5024_MAX_LED_MODULES 8 @@ -341,17 +347,15 @@ out: return ret; } -static int lp50xx_set_banks(struct lp50xx *priv, u32 led_banks[]) +static int lp50xx_set_banks(struct lp50xx *priv, u32 led_banks[], int num_leds) { u8 led_config_lo, led_config_hi; u32 bank_enable_mask = 0; int ret; int i; - for (i = 0; i < priv->chip_info->max_modules; i++) { - if (led_banks[i]) - bank_enable_mask |= (1 << led_banks[i]); - } + for (i = 0; i < num_leds; i++) + bank_enable_mask |= (1 << led_banks[i]); led_config_lo = bank_enable_mask; led_config_hi = bank_enable_mask >> 8; @@ -371,19 +375,42 @@ static int lp50xx_reset(struct lp50xx *priv) return regmap_write(priv->regmap, priv->chip_info->reset_reg, LP50XX_SW_RESET); } -static int lp50xx_enable_disable(struct lp50xx *priv, int enable_disable) +static int lp50xx_enable(struct lp50xx *priv) { int ret; - ret = gpiod_direction_output(priv->enable_gpio, enable_disable); + if (priv->enable_gpio) { + ret = gpiod_direction_output(priv->enable_gpio, LP50XX_EN_GPIO_HIGH); + if (ret) + return ret; + + udelay(LP50XX_START_TIME_US); + } + + ret = lp50xx_reset(priv); if (ret) return ret; - if (enable_disable) - return regmap_write(priv->regmap, LP50XX_DEV_CFG0, LP50XX_CHIP_EN); - else - return regmap_write(priv->regmap, LP50XX_DEV_CFG0, 0); + return regmap_write(priv->regmap, LP50XX_DEV_CFG0, LP50XX_CHIP_EN); +} + +static int lp50xx_disable(struct lp50xx *priv) +{ + int ret; + + ret = regmap_write(priv->regmap, LP50XX_DEV_CFG0, LP50XX_CHIP_DISABLE); + if (ret) + return ret; + if (priv->enable_gpio) { + ret = gpiod_direction_output(priv->enable_gpio, LP50XX_EN_GPIO_LOW); + if (ret) + return ret; + + udelay(LP50XX_RESET_TIME_US); + } + + return 0; } static int lp50xx_probe_leds(struct fwnode_handle *child, struct lp50xx *priv, @@ -405,7 +432,7 @@ static int lp50xx_probe_leds(struct fwnode_handle *child, struct lp50xx *priv, return ret; } - ret = lp50xx_set_banks(priv, led_banks); + ret = lp50xx_set_banks(priv, led_banks, num_leds); if (ret) { dev_err(priv->dev, "Cannot setup banked LEDs\n"); return ret; @@ -447,6 +474,10 @@ static int lp50xx_probe_dt(struct lp50xx *priv) return dev_err_probe(priv->dev, PTR_ERR(priv->enable_gpio), "Failed to get enable GPIO\n"); + ret = lp50xx_enable(priv); + if (ret) + return ret; + priv->regulator = devm_regulator_get(priv->dev, "vled"); if (IS_ERR(priv->regulator)) priv->regulator = NULL; @@ -547,14 +578,6 @@ static int lp50xx_probe(struct i2c_client *client) return ret; } - ret = lp50xx_reset(led); - if (ret) - return ret; - - ret = lp50xx_enable_disable(led, 1); - if (ret) - return ret; - return lp50xx_probe_dt(led); } @@ -563,7 +586,7 @@ static void lp50xx_remove(struct i2c_client *client) struct lp50xx *led = i2c_get_clientdata(client); int ret; - ret = lp50xx_enable_disable(led, 0); + ret = lp50xx_disable(led); if (ret) dev_err(led->dev, "Failed to disable chip\n"); diff --git a/drivers/leds/leds-max5970.c b/drivers/leds/leds-max5970.c index 285074c53b23..a1e91a06249c 100644 --- a/drivers/leds/leds-max5970.c +++ b/drivers/leds/leds-max5970.c @@ -60,7 +60,7 @@ static int max5970_led_probe(struct platform_device *pdev) if (!led_node) return -ENODEV; - fwnode_for_each_available_child_node(led_node, child) { + fwnode_for_each_child_node(led_node, child) { u32 reg; if (fwnode_property_read_u32(child, "reg", ®)) diff --git a/drivers/leds/leds-max77705.c b/drivers/leds/leds-max77705.c index b7403b3fcf5e..1e2054c1bf80 100644 --- a/drivers/leds/leds-max77705.c +++ b/drivers/leds/leds-max77705.c @@ -191,7 +191,7 @@ static int max77705_add_led(struct device *dev, struct regmap *regmap, struct fw cdev->brightness_set_blocking = max77705_led_brightness_set_multi; cdev->blink_set = max77705_rgb_blink; - fwnode_for_each_available_child_node(np, child) { + fwnode_for_each_child_node(np, child) { ret = max77705_parse_subled(dev, child, &info[i]); if (ret < 0) return ret; diff --git a/drivers/leds/leds-netxbig.c b/drivers/leds/leds-netxbig.c index e95287416ef8..99df46f2d9f5 100644 --- a/drivers/leds/leds-netxbig.c +++ b/drivers/leds/leds-netxbig.c @@ -364,6 +364,9 @@ static int netxbig_gpio_ext_get(struct device *dev, if (!addr) return -ENOMEM; + gpio_ext->addr = addr; + gpio_ext->num_addr = 0; + /* * We cannot use devm_ managed resources with these GPIO descriptors * since they are associated with the "GPIO extension device" which @@ -375,45 +378,58 @@ static int netxbig_gpio_ext_get(struct device *dev, gpiod = gpiod_get_index(gpio_ext_dev, "addr", i, GPIOD_OUT_LOW); if (IS_ERR(gpiod)) - return PTR_ERR(gpiod); + goto err_set_code; gpiod_set_consumer_name(gpiod, "GPIO extension addr"); addr[i] = gpiod; + gpio_ext->num_addr++; } - gpio_ext->addr = addr; - gpio_ext->num_addr = num_addr; ret = gpiod_count(gpio_ext_dev, "data"); if (ret < 0) { dev_err(dev, "Failed to count GPIOs in DT property data-gpios\n"); - return ret; + goto err_free_addr; } num_data = ret; data = devm_kcalloc(dev, num_data, sizeof(*data), GFP_KERNEL); - if (!data) - return -ENOMEM; + if (!data) { + ret = -ENOMEM; + goto err_free_addr; + } + + gpio_ext->data = data; + gpio_ext->num_data = 0; for (i = 0; i < num_data; i++) { gpiod = gpiod_get_index(gpio_ext_dev, "data", i, GPIOD_OUT_LOW); if (IS_ERR(gpiod)) - return PTR_ERR(gpiod); + goto err_free_data; gpiod_set_consumer_name(gpiod, "GPIO extension data"); data[i] = gpiod; + gpio_ext->num_data++; } - gpio_ext->data = data; - gpio_ext->num_data = num_data; gpiod = gpiod_get(gpio_ext_dev, "enable", GPIOD_OUT_LOW); if (IS_ERR(gpiod)) { dev_err(dev, "Failed to get GPIO from DT property enable-gpio\n"); - return PTR_ERR(gpiod); + goto err_free_data; } gpiod_set_consumer_name(gpiod, "GPIO extension enable"); gpio_ext->enable = gpiod; return devm_add_action_or_reset(dev, netxbig_gpio_ext_remove, gpio_ext); + +err_free_data: + for (i = 0; i < gpio_ext->num_data; i++) + gpiod_put(gpio_ext->data[i]); +err_set_code: + ret = PTR_ERR(gpiod); +err_free_addr: + for (i = 0; i < gpio_ext->num_addr; i++) + gpiod_put(gpio_ext->addr[i]); + return ret; } static int netxbig_leds_get_of_pdata(struct device *dev, diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c index c73134e7b951..6c1f2f50ff85 100644 --- a/drivers/leds/leds-pwm.c +++ b/drivers/leds/leds-pwm.c @@ -9,12 +9,13 @@ * based on leds-gpio.c by Raphael Assenat <raph@8d.com> */ -#include <linux/module.h> +#include <linux/err.h> +#include <linux/gpio/consumer.h> #include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/of.h> #include <linux/leds.h> -#include <linux/err.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> #include <linux/pwm.h> #include <linux/slab.h> @@ -26,6 +27,7 @@ struct led_pwm { }; struct led_pwm_data { + struct gpio_desc *enable_gpio; struct led_classdev cdev; struct pwm_device *pwm; struct pwm_state pwmstate; @@ -51,6 +53,8 @@ static int led_pwm_set(struct led_classdev *led_cdev, if (led_dat->active_low) duty = led_dat->pwmstate.period - duty; + gpiod_set_value_cansleep(led_dat->enable_gpio, !!brightness); + led_dat->pwmstate.duty_cycle = duty; /* * Disabling a PWM doesn't guarantee that it emits the inactive level. @@ -132,6 +136,21 @@ static int led_pwm_add(struct device *dev, struct led_pwm_priv *priv, break; } + /* + * Claim the GPIO as GPIOD_ASIS and set the value + * later on to honor the different default states + */ + led_data->enable_gpio = devm_fwnode_gpiod_get(dev, fwnode, "enable", GPIOD_ASIS, NULL); + if (IS_ERR(led_data->enable_gpio)) { + if (PTR_ERR(led_data->enable_gpio) == -ENOENT) + /* Enable GPIO is optional */ + led_data->enable_gpio = NULL; + else + return PTR_ERR(led_data->enable_gpio); + } + + gpiod_direction_output(led_data->enable_gpio, !!led_data->cdev.brightness); + ret = devm_led_classdev_register_ext(dev, &led_data->cdev, &init_data); if (ret) { dev_err(dev, "failed to register PWM led for %s: %d\n", diff --git a/drivers/leds/leds-upboard.c b/drivers/leds/leds-upboard.c index b350eb294280..12989b2f1953 100644 --- a/drivers/leds/leds-upboard.c +++ b/drivers/leds/leds-upboard.c @@ -123,4 +123,4 @@ MODULE_AUTHOR("Gary Wang <garywang@aaeon.com.tw>"); MODULE_AUTHOR("Thomas Richard <thomas.richard@bootlin.com>"); MODULE_DESCRIPTION("UP Board LED driver"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:upboard-led"); +MODULE_ALIAS("platform:upboard-leds"); diff --git a/drivers/leds/rgb/leds-ktd202x.c b/drivers/leds/rgb/leds-ktd202x.c index 04e62faa3a00..e4f0f25a5e45 100644 --- a/drivers/leds/rgb/leds-ktd202x.c +++ b/drivers/leds/rgb/leds-ktd202x.c @@ -391,7 +391,7 @@ static int ktd202x_setup_led_rgb(struct ktd202x *chip, struct fwnode_handle *fwn int i = 0; num_channels = 0; - fwnode_for_each_available_child_node(fwnode, child) + fwnode_for_each_child_node(fwnode, child) num_channels++; if (!num_channels || num_channels > chip->num_leds) @@ -401,7 +401,7 @@ static int ktd202x_setup_led_rgb(struct ktd202x *chip, struct fwnode_handle *fwn if (!info) return -ENOMEM; - fwnode_for_each_available_child_node(fwnode, child) { + fwnode_for_each_child_node(fwnode, child) { u32 mono_color; u32 reg; int ret; diff --git a/drivers/leds/rgb/leds-ncp5623.c b/drivers/leds/rgb/leds-ncp5623.c index 7c7d44623a9e..85d6be6fff2b 100644 --- a/drivers/leds/rgb/leds-ncp5623.c +++ b/drivers/leds/rgb/leds-ncp5623.c @@ -180,7 +180,7 @@ static int ncp5623_probe(struct i2c_client *client) goto release_mc_node; } - fwnode_for_each_available_child_node(mc_node, led_node) { + fwnode_for_each_child_node(mc_node, led_node) { ret = fwnode_property_read_u32(led_node, "color", &color_index); if (ret) goto release_led_node; diff --git a/drivers/leds/rgb/leds-qcom-lpg.c b/drivers/leds/rgb/leds-qcom-lpg.c index 4f2a178e3d26..72da0bf469ad 100644 --- a/drivers/leds/rgb/leds-qcom-lpg.c +++ b/drivers/leds/rgb/leds-qcom-lpg.c @@ -2,7 +2,7 @@ /* * Copyright (c) 2017-2022 Linaro Ltd * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved. - * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. */ #include <linux/bits.h> #include <linux/bitfield.h> @@ -1247,8 +1247,6 @@ static int lpg_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, lpg_apply(chan); - triled_set(lpg, chan->triled_mask, chan->enabled ? chan->triled_mask : 0); - out_unlock: mutex_unlock(&lpg->lock); @@ -1382,7 +1380,7 @@ static int lpg_add_led(struct lpg *lpg, struct device_node *np) return dev_err_probe(lpg->dev, ret, "failed to parse \"color\" of %pOF\n", np); - if (color == LED_COLOR_ID_RGB) + if (color == LED_COLOR_ID_RGB || color == LED_COLOR_ID_MULTI) num_channels = of_get_available_child_count(np); else num_channels = 1; @@ -1394,7 +1392,7 @@ static int lpg_add_led(struct lpg *lpg, struct device_node *np) led->lpg = lpg; led->num_channels = num_channels; - if (color == LED_COLOR_ID_RGB) { + if (color == LED_COLOR_ID_RGB || color == LED_COLOR_ID_MULTI) { info = devm_kcalloc(lpg->dev, num_channels, sizeof(*info), GFP_KERNEL); if (!info) return -ENOMEM; @@ -1454,7 +1452,7 @@ static int lpg_add_led(struct lpg *lpg, struct device_node *np) init_data.fwnode = of_fwnode_handle(np); - if (color == LED_COLOR_ID_RGB) + if (color == LED_COLOR_ID_RGB || color == LED_COLOR_ID_MULTI) ret = devm_led_classdev_multicolor_register_ext(lpg->dev, &led->mcdev, &init_data); else ret = devm_led_classdev_register_ext(lpg->dev, &led->cdev, &init_data); diff --git a/drivers/leds/trigger/ledtrig-input-events.c b/drivers/leds/trigger/ledtrig-input-events.c index 1c79731562c2..3c6414259c27 100644 --- a/drivers/leds/trigger/ledtrig-input-events.c +++ b/drivers/leds/trigger/ledtrig-input-events.c @@ -66,7 +66,7 @@ static void input_events_event(struct input_handle *handle, unsigned int type, spin_unlock_irqrestore(&data->lock, flags); - mod_delayed_work(system_wq, &data->work, led_off_delay); + mod_delayed_work(system_percpu_wq, &data->work, led_off_delay); } static int input_events_connect(struct input_handler *handler, struct input_dev *dev, diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 219ee6ddf516..aace5766b38a 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -45,7 +45,8 @@ config MFD_ALTERA_A10SR config MFD_ALTERA_SYSMGR bool "Altera SOCFPGA System Manager" - depends on ARCH_INTEL_SOCFPGA && OF + depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST + depends on OF select MFD_SYSCON help Select this to get System Manager support for all Altera branded @@ -895,7 +896,7 @@ config MFD_88PM886_PMIC config MFD_MAX5970 tristate "Maxim 5970/5978 power switch and monitor" - depends on I2C && OF + depends on I2C select MFD_SIMPLE_MFD_I2C help This driver controls a Maxim 5970/5978 switch via I2C bus. @@ -1274,7 +1275,6 @@ config MFD_SPACEMIT_P1 tristate "SpacemiT P1 PMIC" depends on ARCH_SPACEMIT || COMPILE_TEST depends on I2C - select I2C_K1 select MFD_SIMPLE_MFD_I2C help This option supports the I2C-based SpacemiT P1 PMIC, which @@ -2002,16 +2002,6 @@ config MENELAUS and other features that are often used in portable devices like cell phones and PDAs. -config MFD_WL1273_CORE - tristate "TI WL1273 FM radio" - depends on I2C - select MFD_CORE - default n - help - This is the core driver for the TI WL1273 FM radio. This MFD - driver connects the radio-wl1273 V4L2 module and the wl1273 - audio codec. - config MFD_LM3533 tristate "TI/National Semiconductor LM3533 Lighting Power chip" depends on I2C diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 566952f191b5..e75e8045c28a 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -207,7 +207,6 @@ obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o obj-$(CONFIG_MFD_JANZ_CMODIO) += janz-cmodio.o obj-$(CONFIG_MFD_TPS6586X) += tps6586x.o obj-$(CONFIG_MFD_VX855) += vx855.o -obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o si476x-core-y := si476x-cmd.o si476x-prop.o si476x-i2c.o obj-$(CONFIG_MFD_SI476X_CORE) += si476x-core.o diff --git a/drivers/mfd/altera-sysmgr.c b/drivers/mfd/altera-sysmgr.c index fb5f988e61f3..90c6902d537d 100644 --- a/drivers/mfd/altera-sysmgr.c +++ b/drivers/mfd/altera-sysmgr.c @@ -117,6 +117,8 @@ struct regmap *altr_sysmgr_regmap_lookup_by_phandle(struct device_node *np, sysmgr = dev_get_drvdata(dev); + put_device(dev); + return sysmgr->regmap; } EXPORT_SYMBOL_GPL(altr_sysmgr_regmap_lookup_by_phandle); diff --git a/drivers/mfd/bcm2835-pm.c b/drivers/mfd/bcm2835-pm.c index 3cb2b9423121..8bed59816e82 100644 --- a/drivers/mfd/bcm2835-pm.c +++ b/drivers/mfd/bcm2835-pm.c @@ -108,6 +108,7 @@ static const struct of_device_id bcm2835_pm_of_match[] = { { .compatible = "brcm,bcm2835-pm-wdt", }, { .compatible = "brcm,bcm2835-pm", }, { .compatible = "brcm,bcm2711-pm", }, + { .compatible = "brcm,bcm2712-pm", }, {}, }; MODULE_DEVICE_TABLE(of, bcm2835_pm_of_match); diff --git a/drivers/mfd/da9055-core.c b/drivers/mfd/da9055-core.c index 1f727ef60d63..158590ad37d4 100644 --- a/drivers/mfd/da9055-core.c +++ b/drivers/mfd/da9055-core.c @@ -387,7 +387,7 @@ int da9055_device_init(struct da9055 *da9055) return 0; err: - mfd_remove_devices(da9055->dev); + regmap_del_irq_chip(da9055->chip_irq, da9055->irq_data); return ret; } diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c index 1ec9ab56442d..a803b7440f09 100644 --- a/drivers/mfd/da9063-i2c.c +++ b/drivers/mfd/da9063-i2c.c @@ -469,6 +469,9 @@ static int da9063_i2c_probe(struct i2c_client *i2c) } } + /* Reserve our unused second address so userspace won't interfere */ + devm_i2c_new_dummy_device(&i2c->dev, i2c->adapter, i2c->addr + 1); + return da9063_device_init(da9063, i2c->irq); } diff --git a/drivers/mfd/ls2k-bmc-core.c b/drivers/mfd/ls2k-bmc-core.c index 69387dad6661..e42f1de9e641 100644 --- a/drivers/mfd/ls2k-bmc-core.c +++ b/drivers/mfd/ls2k-bmc-core.c @@ -265,7 +265,7 @@ static int ls2k_bmc_recover_pci_data(void *data) if (!ls2k_bmc_bar0_addr_is_set(parent)) break; mdelay(1); - }; + } if (i == 0) return false; diff --git a/drivers/mfd/macsmc.c b/drivers/mfd/macsmc.c index e6cdae221f1d..e3893e255ce5 100644 --- a/drivers/mfd/macsmc.c +++ b/drivers/mfd/macsmc.c @@ -173,7 +173,7 @@ int apple_smc_read(struct apple_smc *smc, smc_key key, void *buf, size_t size) } EXPORT_SYMBOL(apple_smc_read); -int apple_smc_write(struct apple_smc *smc, smc_key key, void *buf, size_t size) +int apple_smc_write(struct apple_smc *smc, smc_key key, const void *buf, size_t size) { guard(mutex)(&smc->mutex); @@ -181,7 +181,7 @@ int apple_smc_write(struct apple_smc *smc, smc_key key, void *buf, size_t size) } EXPORT_SYMBOL(apple_smc_write); -int apple_smc_rw(struct apple_smc *smc, smc_key key, void *wbuf, size_t wsize, +int apple_smc_rw(struct apple_smc *smc, smc_key key, const void *wbuf, size_t wsize, void *rbuf, size_t rsize) { guard(mutex)(&smc->mutex); @@ -239,7 +239,7 @@ int apple_smc_enter_atomic(struct apple_smc *smc) } EXPORT_SYMBOL(apple_smc_enter_atomic); -int apple_smc_write_atomic(struct apple_smc *smc, smc_key key, void *buf, size_t size) +int apple_smc_write_atomic(struct apple_smc *smc, smc_key key, const void *buf, size_t size) { guard(spinlock_irqsave)(&smc->lock); u8 result; diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c index 21d2ab3db254..3af2974b3023 100644 --- a/drivers/mfd/max77620.c +++ b/drivers/mfd/max77620.c @@ -254,7 +254,7 @@ static int max77620_irq_global_unmask(void *irq_drv_data) return ret; } -static struct regmap_irq_chip max77620_top_irq_chip = { +static const struct regmap_irq_chip max77620_top_irq_chip = { .name = "max77620-top", .irqs = max77620_top_irqs, .num_irqs = ARRAY_SIZE(max77620_top_irqs), @@ -498,6 +498,7 @@ static int max77620_probe(struct i2c_client *client) const struct i2c_device_id *id = i2c_client_get_device_id(client); const struct regmap_config *rmap_config; struct max77620_chip *chip; + struct regmap_irq_chip *chip_desc; const struct mfd_cell *mfd_cells; int n_mfd_cells; bool pm_off; @@ -508,6 +509,14 @@ static int max77620_probe(struct i2c_client *client) return -ENOMEM; i2c_set_clientdata(client, chip); + + chip_desc = devm_kmemdup(&client->dev, &max77620_top_irq_chip, + sizeof(max77620_top_irq_chip), + GFP_KERNEL); + if (!chip_desc) + return -ENOMEM; + chip_desc->irq_drv_data = chip; + chip->dev = &client->dev; chip->chip_irq = client->irq; chip->chip_id = (enum max77620_chip_id)id->driver_data; @@ -544,11 +553,9 @@ static int max77620_probe(struct i2c_client *client) if (ret < 0) return ret; - max77620_top_irq_chip.irq_drv_data = chip; ret = devm_regmap_add_irq_chip(chip->dev, chip->rmap, client->irq, IRQF_ONESHOT | IRQF_SHARED, 0, - &max77620_top_irq_chip, - &chip->top_irq_data); + chip_desc, &chip->top_irq_data); if (ret < 0) { dev_err(chip->dev, "Failed to add regmap irq: %d\n", ret); return ret; diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c index f467b00d2366..74cf20843044 100644 --- a/drivers/mfd/mt6358-irq.c +++ b/drivers/mfd/mt6358-irq.c @@ -285,6 +285,7 @@ int mt6358_irq_init(struct mt6397_chip *chip) if (ret) { dev_err(chip->dev, "Failed to register IRQ=%d, ret=%d\n", chip->irq, ret); + irq_domain_remove(chip->irq_domain); return ret; } diff --git a/drivers/mfd/mt6397-irq.c b/drivers/mfd/mt6397-irq.c index 0e463026c5a9..5d2e5459f744 100644 --- a/drivers/mfd/mt6397-irq.c +++ b/drivers/mfd/mt6397-irq.c @@ -229,6 +229,7 @@ int mt6397_irq_init(struct mt6397_chip *chip) if (ret) { dev_err(chip->dev, "failed to register irq=%d; err: %d\n", chip->irq, ret); + irq_domain_remove(chip->irq_domain); return ret; } diff --git a/drivers/mfd/qnap-mcu.c b/drivers/mfd/qnap-mcu.c index 4ec1f4cf902f..f81c69f22254 100644 --- a/drivers/mfd/qnap-mcu.c +++ b/drivers/mfd/qnap-mcu.c @@ -19,6 +19,7 @@ /* The longest command found so far is 5 bytes long */ #define QNAP_MCU_MAX_CMD_SIZE 5 #define QNAP_MCU_MAX_DATA_SIZE 36 +#define QNAP_MCU_ERROR_SIZE 2 #define QNAP_MCU_CHECKSUM_SIZE 1 #define QNAP_MCU_RX_BUFFER_SIZE \ @@ -78,6 +79,13 @@ static u8 qnap_mcu_csum(const u8 *buf, size_t size) return csum; } +static bool qnap_mcu_verify_checksum(const u8 *buf, size_t size) +{ + u8 crc = qnap_mcu_csum(buf, size - QNAP_MCU_CHECKSUM_SIZE); + + return crc == buf[size - QNAP_MCU_CHECKSUM_SIZE]; +} + static int qnap_mcu_write(struct qnap_mcu *mcu, const u8 *data, u8 data_size) { unsigned char tx[QNAP_MCU_TX_BUFFER_SIZE]; @@ -96,6 +104,48 @@ static int qnap_mcu_write(struct qnap_mcu *mcu, const u8 *data, u8 data_size) return serdev_device_write(mcu->serdev, tx, length, HZ); } +static bool qnap_mcu_is_error_msg(size_t size) +{ + return (size == QNAP_MCU_ERROR_SIZE + QNAP_MCU_CHECKSUM_SIZE); +} + +static bool qnap_mcu_reply_is_generic_error(unsigned char *buf, size_t size) +{ + if (!qnap_mcu_is_error_msg(size)) + return false; + + if (buf[0] == '@' && buf[1] == '9') + return true; + + return false; +} + +static bool qnap_mcu_reply_is_checksum_error(unsigned char *buf, size_t size) +{ + if (!qnap_mcu_is_error_msg(size)) + return false; + + if (buf[0] == '@' && buf[1] == '8') + return true; + + return false; +} + +static bool qnap_mcu_reply_is_any_error(struct qnap_mcu *mcu, unsigned char *buf, size_t size) +{ + if (qnap_mcu_reply_is_generic_error(buf, size)) { + dev_err(&mcu->serdev->dev, "Controller sent generic error response\n"); + return true; + } + + if (qnap_mcu_reply_is_checksum_error(buf, size)) { + dev_err(&mcu->serdev->dev, "Controller received invalid checksum for the command\n"); + return true; + } + + return false; +} + static size_t qnap_mcu_receive_buf(struct serdev_device *serdev, const u8 *buf, size_t size) { struct device *dev = &serdev->dev; @@ -130,6 +180,24 @@ static size_t qnap_mcu_receive_buf(struct serdev_device *serdev, const u8 *buf, } /* + * We received everything the uart had to offer for now. + * This could mean that either the uart will send more in a 2nd + * receive run, or that the MCU cut the reply short because it + * sent an error code instead of the expected reply. + * + * So check if the received data has the correct size for an error + * reply and if it matches, is an actual error code. + */ + if (qnap_mcu_is_error_msg(reply->received) && + qnap_mcu_verify_checksum(reply->data, reply->received) && + qnap_mcu_reply_is_any_error(mcu, reply->data, reply->received)) { + /* The reply was an error code, we're done */ + reply->length = 0; + + complete(&reply->done); + } + + /* * The only way to get out of the above loop and end up here * is through consuming all of the supplied data, so here we * report that we processed it all. @@ -150,7 +218,6 @@ int qnap_mcu_exec(struct qnap_mcu *mcu, size_t length = reply_data_size + QNAP_MCU_CHECKSUM_SIZE; struct qnap_mcu_reply *reply = &mcu->reply; int ret = 0; - u8 crc; if (length > sizeof(rx)) { dev_err(&mcu->serdev->dev, "expected data too big for receive buffer"); @@ -175,12 +242,14 @@ int qnap_mcu_exec(struct qnap_mcu *mcu, return -ETIMEDOUT; } - crc = qnap_mcu_csum(rx, reply_data_size); - if (crc != rx[reply_data_size]) { - dev_err(&mcu->serdev->dev, "Invalid Checksum received\n"); - return -EIO; + if (!qnap_mcu_verify_checksum(rx, reply->received)) { + dev_err(&mcu->serdev->dev, "Invalid Checksum received from controller\n"); + return -EPROTO; } + if (qnap_mcu_reply_is_any_error(mcu, rx, reply->received)) + return -EPROTO; + memcpy(reply_data, rx, reply_data_size); return 0; @@ -264,6 +333,7 @@ static const struct qnap_mcu_variant qnap_ts433_mcu = { }; static struct mfd_cell qnap_mcu_cells[] = { + { .name = "qnap-mcu-eeprom", }, { .name = "qnap-mcu-input", }, { .name = "qnap-mcu-leds", }, { .name = "qnap-mcu-hwmon", } diff --git a/drivers/mfd/rohm-bd718x7.c b/drivers/mfd/rohm-bd718x7.c index 25e494a93d48..ff714fd4f54d 100644 --- a/drivers/mfd/rohm-bd718x7.c +++ b/drivers/mfd/rohm-bd718x7.c @@ -72,14 +72,13 @@ static const struct regmap_irq_chip bd718xx_irq_chip = { .init_ack_masked = true, }; -static const struct regmap_range pmic_status_range = { - .range_min = BD718XX_REG_IRQ, - .range_max = BD718XX_REG_POW_STATE, +static const struct regmap_range pmic_status_range[] = { + regmap_reg_range(BD718XX_REG_IRQ, BD718XX_REG_POW_STATE), }; static const struct regmap_access_table volatile_regs = { - .yes_ranges = &pmic_status_range, - .n_yes_ranges = 1, + .yes_ranges = &pmic_status_range[0], + .n_yes_ranges = ARRAY_SIZE(pmic_status_range), }; static const struct regmap_config bd718xx_regmap_config = { diff --git a/drivers/mfd/sec-acpm.c b/drivers/mfd/sec-acpm.c index 8b31c816d65b..36622069a788 100644 --- a/drivers/mfd/sec-acpm.c +++ b/drivers/mfd/sec-acpm.c @@ -325,11 +325,6 @@ static struct regmap *sec_pmic_acpm_regmap_init(struct device *dev, return regmap; } -static void sec_pmic_acpm_mask_common_irqs(void *regmap_common) -{ - regmap_write(regmap_common, S2MPG10_COMMON_INT_MASK, S2MPG10_COMMON_INT_SRC); -} - static int sec_pmic_acpm_probe(struct platform_device *pdev) { struct regmap *regmap_common, *regmap_pmic, *regmap; @@ -360,15 +355,10 @@ static int sec_pmic_acpm_probe(struct platform_device *pdev) shared_ctx->speedy_channel = pdata->speedy_channel; regmap_common = sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACPM_ACCESSTYPE_COMMON, - pdata->regmap_cfg_common, false); + pdata->regmap_cfg_common, true); if (IS_ERR(regmap_common)) return PTR_ERR(regmap_common); - /* Mask all interrupts from 'common' block, until successful init */ - ret = regmap_write(regmap_common, S2MPG10_COMMON_INT_MASK, S2MPG10_COMMON_INT_SRC); - if (ret) - return dev_err_probe(dev, ret, "failed to mask common block interrupts\n"); - regmap_pmic = sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACPM_ACCESSTYPE_PMIC, pdata->regmap_cfg_pmic, false); if (IS_ERR(regmap_pmic)) @@ -391,17 +381,6 @@ static int sec_pmic_acpm_probe(struct platform_device *pdev) if (device_property_read_bool(dev, "wakeup-source")) devm_device_init_wakeup(dev); - /* Unmask PMIC interrupt from 'common' block, now that everything is in place. */ - ret = regmap_clear_bits(regmap_common, S2MPG10_COMMON_INT_MASK, - S2MPG10_COMMON_INT_SRC_PMIC); - if (ret) - return dev_err_probe(dev, ret, "failed to unmask PMIC interrupt\n"); - - /* Mask all interrupts from 'common' block on shutdown */ - ret = devm_add_action_or_reset(dev, sec_pmic_acpm_mask_common_irqs, regmap_common); - if (ret) - return ret; - return 0; } diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c index c5c80b1ba104..74ac70002d1f 100644 --- a/drivers/mfd/sec-irq.c +++ b/drivers/mfd/sec-irq.c @@ -20,6 +20,12 @@ #include "sec-core.h" static const struct regmap_irq s2mpg10_irqs[] = { + REGMAP_IRQ_REG(S2MPG10_COMMON_IRQ_PMIC, 0, S2MPG10_COMMON_INT_SRC_PMIC), + /* No documentation or other reference for remaining bits */ + REGMAP_IRQ_REG(S2MPG10_COMMON_IRQ_UNUSED, 0, GENMASK(7, 1)), +}; + +static const struct regmap_irq s2mpg10_pmic_irqs[] = { REGMAP_IRQ_REG(S2MPG10_IRQ_PWRONF, 0, S2MPG10_IRQ_PWRONF_MASK), REGMAP_IRQ_REG(S2MPG10_IRQ_PWRONR, 0, S2MPG10_IRQ_PWRONR_MASK), REGMAP_IRQ_REG(S2MPG10_IRQ_JIGONBF, 0, S2MPG10_IRQ_JIGONBF_MASK), @@ -183,11 +189,20 @@ static const struct regmap_irq s5m8767_irqs[] = { /* All S2MPG10 interrupt sources are read-only and don't require clearing */ static const struct regmap_irq_chip s2mpg10_irq_chip = { .name = "s2mpg10", + .status_base = S2MPG10_COMMON_INT, + .mask_base = S2MPG10_COMMON_INT_MASK, + .num_regs = 1, .irqs = s2mpg10_irqs, .num_irqs = ARRAY_SIZE(s2mpg10_irqs), - .num_regs = 6, +}; + +static const struct regmap_irq_chip s2mpg10_irq_chip_pmic = { + .name = "s2mpg10-pmic", .status_base = S2MPG10_PMIC_INT1, .mask_base = S2MPG10_PMIC_INT1M, + .num_regs = 6, + .irqs = s2mpg10_pmic_irqs, + .num_irqs = ARRAY_SIZE(s2mpg10_pmic_irqs), }; static const struct regmap_irq_chip s2mps11_irq_chip = { @@ -253,6 +268,59 @@ static const struct regmap_irq_chip s5m8767_irq_chip = { .ack_base = S5M8767_REG_INT1, }; +static int s2mpg1x_add_chained_irq_chip(struct device *dev, struct regmap *regmap, int pirq, + struct regmap_irq_chip_data *parent, + const struct regmap_irq_chip *chip, + struct regmap_irq_chip_data **data) +{ + int irq, ret; + + irq = regmap_irq_get_virq(parent, pirq); + if (irq < 0) + return dev_err_probe(dev, irq, "Failed to get parent vIRQ(%d) for chip %s\n", pirq, + chip->name); + + ret = devm_regmap_add_irq_chip(dev, regmap, irq, IRQF_ONESHOT | IRQF_SHARED, 0, chip, data); + if (ret) + return dev_err_probe(dev, ret, "Failed to add %s IRQ chip\n", chip->name); + + return 0; +} + +static int sec_irq_init_s2mpg1x(struct sec_pmic_dev *sec_pmic) +{ + const struct regmap_irq_chip *irq_chip, *chained_irq_chip; + struct regmap_irq_chip_data *irq_data; + struct regmap *regmap_common; + int chained_pirq; + int ret; + + switch (sec_pmic->device_type) { + case S2MPG10: + irq_chip = &s2mpg10_irq_chip; + chained_irq_chip = &s2mpg10_irq_chip_pmic; + chained_pirq = S2MPG10_COMMON_IRQ_PMIC; + break; + default: + return dev_err_probe(sec_pmic->dev, -EINVAL, "Unsupported device type %d\n", + sec_pmic->device_type); + } + + regmap_common = dev_get_regmap(sec_pmic->dev, "common"); + if (!regmap_common) + return dev_err_probe(sec_pmic->dev, -EINVAL, "No 'common' regmap %d\n", + sec_pmic->device_type); + + ret = devm_regmap_add_irq_chip(sec_pmic->dev, regmap_common, sec_pmic->irq, IRQF_ONESHOT, 0, + irq_chip, &irq_data); + if (ret) + return dev_err_probe(sec_pmic->dev, ret, "Failed to add %s IRQ chip\n", + irq_chip->name); + + return s2mpg1x_add_chained_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic, chained_pirq, + irq_data, chained_irq_chip, &sec_pmic->irq_data); +} + int sec_irq_init(struct sec_pmic_dev *sec_pmic) { const struct regmap_irq_chip *sec_irq_chip; @@ -268,8 +336,7 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic) sec_irq_chip = &s2mps14_irq_chip; break; case S2MPG10: - sec_irq_chip = &s2mpg10_irq_chip; - break; + return sec_irq_init_s2mpg1x(sec_pmic); case S2MPS11X: sec_irq_chip = &s2mps11_irq_chip; break; diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c index 0a607a1e3ca1..8b751d8e3b5a 100644 --- a/drivers/mfd/simple-mfd-i2c.c +++ b/drivers/mfd/simple-mfd-i2c.c @@ -15,12 +15,18 @@ * will be subsequently registered. */ +#include <linux/array_size.h> +#include <linux/dev_printk.h> +#include <linux/err.h> #include <linux/i2c.h> -#include <linux/kernel.h> #include <linux/mfd/core.h> +#include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/of_platform.h> +#include <linux/platform_device.h> +#include <linux/property.h> #include <linux/regmap.h> +#include <linux/stddef.h> #include "simple-mfd-i2c.h" @@ -114,11 +120,11 @@ static const struct of_device_id simple_mfd_i2c_of_match[] = { { .compatible = "fsl,lx2160aqds-fpga" }, { .compatible = "fsl,lx2160ardb-fpga" }, { .compatible = "kontron,sl28cpld" }, - { .compatible = "maxim,max5970", .data = &maxim_max5970}, - { .compatible = "maxim,max5978", .data = &maxim_max5970}, - { .compatible = "maxim,max77705-battery", .data = &maxim_mon_max77705}, - { .compatible = "silergy,sy7636a", .data = &silergy_sy7636a}, - { .compatible = "spacemit,p1", .data = &spacemit_p1, }, + { .compatible = "maxim,max5970", .data = &maxim_max5970 }, + { .compatible = "maxim,max5978", .data = &maxim_max5970 }, + { .compatible = "maxim,max77705-battery", .data = &maxim_mon_max77705 }, + { .compatible = "silergy,sy7636a", .data = &silergy_sy7636a }, + { .compatible = "spacemit,p1", .data = &spacemit_p1 }, {} }; MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index ae71a2710bed..e5d5def594f6 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -183,7 +183,7 @@ static struct regmap *device_node_get_regmap(struct device_node *np, if (create_regmap) syscon = of_syscon_register(np, check_res); else - syscon = ERR_PTR(-EINVAL); + syscon = ERR_PTR(-EPROBE_DEFER); } mutex_unlock(&syscon_list_lock); diff --git a/drivers/mfd/tqmx86.c b/drivers/mfd/tqmx86.c index 1cba3b67b0fb..1c2fe3f91238 100644 --- a/drivers/mfd/tqmx86.c +++ b/drivers/mfd/tqmx86.c @@ -43,6 +43,8 @@ #define TQMX86_REG_BOARD_ID_E40C2 15 #define TQMX86_REG_BOARD_ID_130UC 16 #define TQMX86_REG_BOARD_ID_E41S 19 +#define TQMX86_REG_BOARD_ID_CU1_HPCM 24 +#define TQMX86_REG_BOARD_ID_CU2_HPCM 25 #define TQMX86_REG_BOARD_REV 0x01 #define TQMX86_REG_IO_EXT_INT 0x06 #define TQMX86_REG_IO_EXT_INT_NONE 0 @@ -165,6 +167,10 @@ static const char *tqmx86_board_id_to_name(u8 board_id, u8 sauc) return "TQMx130UC"; case TQMX86_REG_BOARD_ID_E41S: return "TQMxE41S"; + case TQMX86_REG_BOARD_ID_CU1_HPCM: + return "TQMxCU1-HPCM"; + case TQMX86_REG_BOARD_ID_CU2_HPCM: + return "TQMxCU2-HPCM"; default: return "Unknown"; } @@ -185,6 +191,8 @@ static int tqmx86_board_id_to_clk_rate(struct device *dev, u8 board_id) case TQMX86_REG_BOARD_ID_E40C2: case TQMX86_REG_BOARD_ID_130UC: case TQMX86_REG_BOARD_ID_E41S: + case TQMX86_REG_BOARD_ID_CU1_HPCM: + case TQMX86_REG_BOARD_ID_CU2_HPCM: return 24000; case TQMX86_REG_BOARD_ID_E39MS: case TQMX86_REG_BOARD_ID_E39C1: diff --git a/drivers/mfd/wl1273-core.c b/drivers/mfd/wl1273-core.c deleted file mode 100644 index 2f185e93318e..000000000000 --- a/drivers/mfd/wl1273-core.c +++ /dev/null @@ -1,262 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * MFD driver for wl1273 FM radio and audio codec submodules. - * - * Copyright (C) 2011 Nokia Corporation - * Author: Matti Aaltonen <matti.j.aaltonen@nokia.com> - */ - -#include <linux/mfd/wl1273-core.h> -#include <linux/slab.h> -#include <linux/module.h> - -#define DRIVER_DESC "WL1273 FM Radio Core" - -static const struct i2c_device_id wl1273_driver_id_table[] = { - { WL1273_FM_DRIVER_NAME }, - { } -}; -MODULE_DEVICE_TABLE(i2c, wl1273_driver_id_table); - -static int wl1273_fm_read_reg(struct wl1273_core *core, u8 reg, u16 *value) -{ - struct i2c_client *client = core->client; - u8 b[2]; - int r; - - r = i2c_smbus_read_i2c_block_data(client, reg, sizeof(b), b); - if (r != 2) { - dev_err(&client->dev, "%s: Read: %d fails.\n", __func__, reg); - return -EREMOTEIO; - } - - *value = (u16)b[0] << 8 | b[1]; - - return 0; -} - -static int wl1273_fm_write_cmd(struct wl1273_core *core, u8 cmd, u16 param) -{ - struct i2c_client *client = core->client; - u8 buf[] = { (param >> 8) & 0xff, param & 0xff }; - int r; - - r = i2c_smbus_write_i2c_block_data(client, cmd, sizeof(buf), buf); - if (r) { - dev_err(&client->dev, "%s: Cmd: %d fails.\n", __func__, cmd); - return r; - } - - return 0; -} - -static int wl1273_fm_write_data(struct wl1273_core *core, u8 *data, u16 len) -{ - struct i2c_client *client = core->client; - struct i2c_msg msg; - int r; - - msg.addr = client->addr; - msg.flags = 0; - msg.buf = data; - msg.len = len; - - r = i2c_transfer(client->adapter, &msg, 1); - if (r != 1) { - dev_err(&client->dev, "%s: write error.\n", __func__); - return -EREMOTEIO; - } - - return 0; -} - -/** - * wl1273_fm_set_audio() - Set audio mode. - * @core: A pointer to the device struct. - * @new_mode: The new audio mode. - * - * Audio modes are WL1273_AUDIO_DIGITAL and WL1273_AUDIO_ANALOG. - */ -static int wl1273_fm_set_audio(struct wl1273_core *core, unsigned int new_mode) -{ - int r = 0; - - if (core->mode == WL1273_MODE_OFF || - core->mode == WL1273_MODE_SUSPENDED) - return -EPERM; - - if (core->mode == WL1273_MODE_RX && new_mode == WL1273_AUDIO_DIGITAL) { - r = wl1273_fm_write_cmd(core, WL1273_PCM_MODE_SET, - WL1273_PCM_DEF_MODE); - if (r) - goto out; - - r = wl1273_fm_write_cmd(core, WL1273_I2S_MODE_CONFIG_SET, - core->i2s_mode); - if (r) - goto out; - - r = wl1273_fm_write_cmd(core, WL1273_AUDIO_ENABLE, - WL1273_AUDIO_ENABLE_I2S); - if (r) - goto out; - - } else if (core->mode == WL1273_MODE_RX && - new_mode == WL1273_AUDIO_ANALOG) { - r = wl1273_fm_write_cmd(core, WL1273_AUDIO_ENABLE, - WL1273_AUDIO_ENABLE_ANALOG); - if (r) - goto out; - - } else if (core->mode == WL1273_MODE_TX && - new_mode == WL1273_AUDIO_DIGITAL) { - r = wl1273_fm_write_cmd(core, WL1273_I2S_MODE_CONFIG_SET, - core->i2s_mode); - if (r) - goto out; - - r = wl1273_fm_write_cmd(core, WL1273_AUDIO_IO_SET, - WL1273_AUDIO_IO_SET_I2S); - if (r) - goto out; - - } else if (core->mode == WL1273_MODE_TX && - new_mode == WL1273_AUDIO_ANALOG) { - r = wl1273_fm_write_cmd(core, WL1273_AUDIO_IO_SET, - WL1273_AUDIO_IO_SET_ANALOG); - if (r) - goto out; - } - - core->audio_mode = new_mode; -out: - return r; -} - -/** - * wl1273_fm_set_volume() - Set volume. - * @core: A pointer to the device struct. - * @volume: The new volume value. - */ -static int wl1273_fm_set_volume(struct wl1273_core *core, unsigned int volume) -{ - int r; - - if (volume > WL1273_MAX_VOLUME) - return -EINVAL; - - if (core->volume == volume) - return 0; - - r = wl1273_fm_write_cmd(core, WL1273_VOLUME_SET, volume); - if (r) - return r; - - core->volume = volume; - return 0; -} - -static int wl1273_core_probe(struct i2c_client *client) -{ - struct wl1273_fm_platform_data *pdata = dev_get_platdata(&client->dev); - struct wl1273_core *core; - struct mfd_cell *cell; - int children = 0; - int r = 0; - - dev_dbg(&client->dev, "%s\n", __func__); - - if (!pdata) { - dev_err(&client->dev, "No platform data.\n"); - return -EINVAL; - } - - if (!(pdata->children & WL1273_RADIO_CHILD)) { - dev_err(&client->dev, "Cannot function without radio child.\n"); - return -EINVAL; - } - - core = devm_kzalloc(&client->dev, sizeof(*core), GFP_KERNEL); - if (!core) - return -ENOMEM; - - core->pdata = pdata; - core->client = client; - mutex_init(&core->lock); - - i2c_set_clientdata(client, core); - - dev_dbg(&client->dev, "%s: Have V4L2.\n", __func__); - - cell = &core->cells[children]; - cell->name = "wl1273_fm_radio"; - cell->platform_data = &core; - cell->pdata_size = sizeof(core); - children++; - - core->read = wl1273_fm_read_reg; - core->write = wl1273_fm_write_cmd; - core->write_data = wl1273_fm_write_data; - core->set_audio = wl1273_fm_set_audio; - core->set_volume = wl1273_fm_set_volume; - - if (pdata->children & WL1273_CODEC_CHILD) { - cell = &core->cells[children]; - - dev_dbg(&client->dev, "%s: Have codec.\n", __func__); - cell->name = "wl1273-codec"; - cell->platform_data = &core; - cell->pdata_size = sizeof(core); - children++; - } - - dev_dbg(&client->dev, "%s: number of children: %d.\n", - __func__, children); - - r = devm_mfd_add_devices(&client->dev, -1, core->cells, - children, NULL, 0, NULL); - if (r) - goto err; - - return 0; - -err: - pdata->free_resources(); - - dev_dbg(&client->dev, "%s\n", __func__); - - return r; -} - -static struct i2c_driver wl1273_core_driver = { - .driver = { - .name = WL1273_FM_DRIVER_NAME, - }, - .probe = wl1273_core_probe, - .id_table = wl1273_driver_id_table, -}; - -static int __init wl1273_core_init(void) -{ - int r; - - r = i2c_add_driver(&wl1273_core_driver); - if (r) { - pr_err(WL1273_FM_DRIVER_NAME - ": driver registration failed\n"); - return r; - } - - return r; -} - -static void __exit wl1273_core_exit(void) -{ - i2c_del_driver(&wl1273_core_driver); -} -late_initcall(wl1273_core_init); -module_exit(wl1273_core_exit); - -MODULE_AUTHOR("Matti Aaltonen <matti.j.aaltonen@nokia.com>"); -MODULE_DESCRIPTION(DRIVER_DESC); -MODULE_LICENSE("GPL"); diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index c0ffe0817fd4..fb6eb2d79b4f 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -349,10 +349,10 @@ static umode_t mmc_disk_attrs_is_visible(struct kobject *kobj, if (a == &dev_attr_ro_lock_until_next_power_on.attr && (md->area_type & MMC_BLK_DATA_AREA_BOOT) && md->queue.card->ext_csd.boot_ro_lockable) { - mode = S_IRUGO; + mode = 0444; if (!(md->queue.card->ext_csd.boot_ro_lock & EXT_CSD_BOOT_WP_B_PWR_WP_DIS)) - mode |= S_IWUSR; + mode |= 0200; } mmc_blk_put(md); @@ -957,7 +957,6 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) u32 result; __be32 *blocks; u8 resp_sz = mmc_card_ult_capacity(card) ? 8 : 4; - unsigned int noio_flag; struct mmc_request mrq = {}; struct mmc_command cmd = {}; @@ -982,9 +981,7 @@ static int mmc_sd_num_wr_blocks(struct mmc_card *card, u32 *written_blocks) mrq.cmd = &cmd; mrq.data = &data; - noio_flag = memalloc_noio_save(); - blocks = kmalloc(resp_sz, GFP_KERNEL); - memalloc_noio_restore(noio_flag); + blocks = kmalloc(resp_sz, GFP_NOIO); if (!blocks) return -ENOMEM; @@ -3194,7 +3191,7 @@ static void mmc_blk_add_debugfs(struct mmc_card *card, struct mmc_blk_data *md) if (mmc_card_mmc(card)) { md->ext_csd_dentry = - debugfs_create_file("ext_csd", S_IRUSR, root, card, + debugfs_create_file("ext_csd", 0400, root, card, &mmc_dbg_ext_csd_fops); } } @@ -3275,7 +3272,8 @@ static int mmc_blk_probe(struct mmc_card *card) mmc_fixup_device(card, mmc_blk_fixups); card->complete_wq = alloc_workqueue("mmc_complete", - WQ_MEM_RECLAIM | WQ_HIGHPRI, 0); + WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_PERCPU, + 0); if (!card->complete_wq) { pr_err("Failed to create mmc completion workqueue"); return -ENOMEM; diff --git a/drivers/mmc/core/bus.h b/drivers/mmc/core/bus.h index cfd0d02d3420..8b69624fa46e 100644 --- a/drivers/mmc/core/bus.h +++ b/drivers/mmc/core/bus.h @@ -20,7 +20,7 @@ static ssize_t mmc_##name##_show (struct device *dev, struct device_attribute *a struct mmc_card *card = mmc_dev_to_card(dev); \ return sysfs_emit(buf, fmt, args); \ } \ -static DEVICE_ATTR(name, S_IRUGO, mmc_##name##_show, NULL) +static DEVICE_ATTR(name, 0444, mmc_##name##_show, NULL) struct mmc_card *mmc_alloc_card(struct mmc_host *host, const struct device_type *type); diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c index f10a4dcf1f95..91ea00a0f61d 100644 --- a/drivers/mmc/core/debugfs.c +++ b/drivers/mmc/core/debugfs.c @@ -315,7 +315,10 @@ static int mmc_caps_set(void *data, u64 val) MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_UHS | - MMC_CAP_DDR; + MMC_CAP_DDR | + MMC_CAP_4_BIT_DATA | + MMC_CAP_8_BIT_DATA | + MMC_CAP_CMD23; if (diff & ~allowed) return -EINVAL; @@ -327,7 +330,10 @@ static int mmc_caps_set(void *data, u64 val) static int mmc_caps2_set(void *data, u64 val) { - u32 allowed = MMC_CAP2_HSX00_1_8V | MMC_CAP2_HSX00_1_2V; + u32 allowed = MMC_CAP2_HSX00_1_8V | + MMC_CAP2_HSX00_1_2V | + MMC_CAP2_CQE | + MMC_CAP2_CQE_DCMD; u32 *caps = data; u32 diff = *caps ^ val; diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 3e7d9437477c..7c86efb1044a 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c @@ -831,7 +831,7 @@ static ssize_t mmc_fwrev_show(struct device *dev, card->ext_csd.fwrev); } -static DEVICE_ATTR(fwrev, S_IRUGO, mmc_fwrev_show, NULL); +static DEVICE_ATTR(fwrev, 0444, mmc_fwrev_show, NULL); static ssize_t mmc_dsr_show(struct device *dev, struct device_attribute *attr, @@ -847,7 +847,7 @@ static ssize_t mmc_dsr_show(struct device *dev, return sysfs_emit(buf, "0x%x\n", 0x404); } -static DEVICE_ATTR(dsr, S_IRUGO, mmc_dsr_show, NULL); +static DEVICE_ATTR(dsr, 0444, mmc_dsr_show, NULL); static struct attribute *mmc_std_attrs[] = { &dev_attr_cid.attr, diff --git a/drivers/mmc/core/mmc_test.c b/drivers/mmc/core/mmc_test.c index d59b5e5a7b45..01d1e62c2ce7 100644 --- a/drivers/mmc/core/mmc_test.c +++ b/drivers/mmc/core/mmc_test.c @@ -3208,12 +3208,12 @@ static int mmc_test_register_dbgfs_file(struct mmc_card *card) mutex_lock(&mmc_test_lock); - ret = __mmc_test_register_dbgfs_file(card, "test", S_IWUSR | S_IRUGO, + ret = __mmc_test_register_dbgfs_file(card, "test", 0644, &mmc_test_fops_test); if (ret) goto err; - ret = __mmc_test_register_dbgfs_file(card, "testlist", S_IRUGO, + ret = __mmc_test_register_dbgfs_file(card, "testlist", 0444, &mtf_testlist_fops); if (ret) goto err; diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 67cd63004829..948948ca9b4a 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -554,7 +554,7 @@ static u32 sd_get_host_max_current(struct mmc_host *host) static int sd_set_current_limit(struct mmc_card *card, u8 *status) { - int current_limit = SD_SET_CURRENT_NO_CHANGE; + int current_limit = SD_SET_CURRENT_LIMIT_200; int err; u32 max_current; @@ -598,11 +598,8 @@ static int sd_set_current_limit(struct mmc_card *card, u8 *status) else if (max_current >= 400 && card->sw_caps.sd3_curr_limit & SD_MAX_CURRENT_400) current_limit = SD_SET_CURRENT_LIMIT_400; - else if (max_current >= 200 && - card->sw_caps.sd3_curr_limit & SD_MAX_CURRENT_200) - current_limit = SD_SET_CURRENT_LIMIT_200; - if (current_limit != SD_SET_CURRENT_NO_CHANGE) { + if (current_limit != SD_SET_CURRENT_LIMIT_200) { err = mmc_sd_switch(card, SD_SWITCH_SET, 3, current_limit, status); if (err) @@ -744,7 +741,7 @@ static ssize_t mmc_dsr_show(struct device *dev, struct device_attribute *attr, return sysfs_emit(buf, "0x%x\n", 0x404); } -static DEVICE_ATTR(dsr, S_IRUGO, mmc_dsr_show, NULL); +static DEVICE_ATTR(dsr, 0444, mmc_dsr_show, NULL); MMC_DEV_ATTR(vendor, "0x%04x\n", card->cis.vendor); MMC_DEV_ATTR(device, "0x%04x\n", card->cis.device); diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 10d0ef58ef49..24f07df32a1a 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -504,6 +504,7 @@ config MMC_MESON_MX_SDIO depends on ARCH_MESON || COMPILE_TEST depends on COMMON_CLK depends on OF_ADDRESS + select REGMAP_MMIO help This selects support for the SD/MMC Host Controller on Amlogic Meson6, Meson8 and Meson8b SoCs. diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index d1fbc6811563..fdf6926ea468 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c @@ -609,12 +609,12 @@ static void atmci_init_debugfs(struct atmel_mci_slot *slot) if (!root) return; - debugfs_create_file("regs", S_IRUSR, root, host, &atmci_regs_fops); - debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops); - debugfs_create_u32("state", S_IRUSR, root, &host->state); - debugfs_create_xul("pending_events", S_IRUSR, root, + debugfs_create_file("regs", 0400, root, host, &atmci_regs_fops); + debugfs_create_file("req", 0400, root, slot, &atmci_req_fops); + debugfs_create_u32("state", 0400, root, &host->state); + debugfs_create_xul("pending_events", 0400, root, &host->pending_events); - debugfs_create_xul("completed_events", S_IRUSR, root, + debugfs_create_xul("completed_events", 0400, root, &host->completed_events); } diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h index ce189a1866b9..3668856531c1 100644 --- a/drivers/mmc/host/cqhci.h +++ b/drivers/mmc/host/cqhci.h @@ -93,6 +93,7 @@ /* send status config 1 */ #define CQHCI_SSC1 0x40 #define CQHCI_SSC1_CBC_MASK GENMASK(19, 16) +#define CQHCI_SSC1_CIT_MASK GENMASK(15, 0) /* send status config 2 */ #define CQHCI_SSC2 0x44 diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c index 2b7d6d9bcde5..42b0118a45a8 100644 --- a/drivers/mmc/host/davinci_mmc.c +++ b/drivers/mmc/host/davinci_mmc.c @@ -145,17 +145,17 @@ #define MAX_NR_SG 16 static unsigned rw_threshold = 32; -module_param(rw_threshold, uint, S_IRUGO); +module_param(rw_threshold, uint, 0444); MODULE_PARM_DESC(rw_threshold, "Read/Write threshold. Default = 32"); static unsigned poll_threshold = 128; -module_param(poll_threshold, uint, S_IRUGO); +module_param(poll_threshold, uint, 0444); MODULE_PARM_DESC(poll_threshold, "Polling transaction size threshold. Default = 128"); static unsigned poll_loopcount = 32; -module_param(poll_loopcount, uint, S_IRUGO); +module_param(poll_loopcount, uint, 0444); MODULE_PARM_DESC(poll_loopcount, "Maximum polling loop count. Default = 32"); diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index 681354942e97..62c68cda1e21 100644 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -19,6 +19,8 @@ #define RK3288_CLKGEN_DIV 2 #define SDMMC_TIMING_CON0 0x130 #define SDMMC_TIMING_CON1 0x134 +#define SDMMC_MISC_CON 0x138 +#define MEM_CLK_AUTOGATE_ENABLE BIT(5) #define ROCKCHIP_MMC_DELAY_SEL BIT(10) #define ROCKCHIP_MMC_DEGREE_MASK 0x3 #define ROCKCHIP_MMC_DEGREE_OFFSET 1 @@ -470,6 +472,7 @@ static int dw_mci_rk3576_parse_dt(struct dw_mci *host) static int dw_mci_rockchip_init(struct dw_mci *host) { + struct dw_mci_rockchip_priv_data *priv = host->priv; int ret, i; /* It is slot 8 on Rockchip SoCs */ @@ -494,6 +497,9 @@ static int dw_mci_rockchip_init(struct dw_mci *host) dev_warn(host->dev, "no valid minimum freq: %d\n", ret); } + if (priv->internal_phase) + mci_writel(host, MISC_CON, MEM_CLK_AUTOGATE_ENABLE); + return 0; } diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index c5db92bbb094..9e74b675e92d 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -175,12 +175,12 @@ static void dw_mci_init_debugfs(struct dw_mci_slot *slot) if (!root) return; - debugfs_create_file("regs", S_IRUSR, root, host, &dw_mci_regs_fops); - debugfs_create_file("req", S_IRUSR, root, slot, &dw_mci_req_fops); - debugfs_create_u32("state", S_IRUSR, root, &host->state); - debugfs_create_xul("pending_events", S_IRUSR, root, + debugfs_create_file("regs", 0400, root, host, &dw_mci_regs_fops); + debugfs_create_file("req", 0400, root, slot, &dw_mci_req_fops); + debugfs_create_u32("state", 0400, root, &host->state); + debugfs_create_xul("pending_events", 0400, root, &host->pending_events); - debugfs_create_xul("completed_events", S_IRUSR, root, + debugfs_create_xul("completed_events", 0400, root, &host->completed_events); #ifdef CONFIG_FAULT_INJECTION fault_create_debugfs_attr("fail_data_crc", root, &host->fail_data_crc); @@ -3120,9 +3120,8 @@ static void dw_mci_init_dma(struct dw_mci *host) host->dma_64bit_address = 1; dev_info(host->dev, "IDMAC supports 64-bit address mode.\n"); - if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) - dma_set_coherent_mask(host->dev, - DMA_BIT_MASK(64)); + if (dma_set_mask_and_coherent(host->dev, DMA_BIT_MASK(64))) + dev_info(host->dev, "Fail to set 64-bit DMA mask"); } else { /* host supports IDMAC in 32-bit address mode */ host->dma_64bit_address = 0; diff --git a/drivers/mmc/host/meson-mx-sdio.c b/drivers/mmc/host/meson-mx-sdio.c index 8a49c32fd3f9..5921e2cb2180 100644 --- a/drivers/mmc/host/meson-mx-sdio.c +++ b/drivers/mmc/host/meson-mx-sdio.c @@ -19,6 +19,7 @@ #include <linux/ioport.h> #include <linux/platform_device.h> #include <linux/of_platform.h> +#include <linux/regmap.h> #include <linux/timer.h> #include <linux/types.h> @@ -98,17 +99,16 @@ #define MESON_MX_SDIO_RESPONSE_CRC16_BITS (16 - 1) #define MESON_MX_SDIO_MAX_SLOTS 3 +struct meson_mx_mmc_host_clkc { + struct clk_divider cfg_div; + struct clk_fixed_factor fixed_div2; +}; + struct meson_mx_mmc_host { struct device *controller_dev; - struct clk *parent_clk; - struct clk *core_clk; - struct clk_divider cfg_div; struct clk *cfg_div_clk; - struct clk_fixed_factor fixed_factor; - struct clk *fixed_factor_clk; - - void __iomem *base; + struct regmap *regmap; int irq; spinlock_t irq_lock; @@ -122,22 +122,10 @@ struct meson_mx_mmc_host { int error; }; -static void meson_mx_mmc_mask_bits(struct mmc_host *mmc, char reg, u32 mask, - u32 val) -{ - struct meson_mx_mmc_host *host = mmc_priv(mmc); - u32 regval; - - regval = readl(host->base + reg); - regval &= ~mask; - regval |= (val & mask); - - writel(regval, host->base + reg); -} - static void meson_mx_mmc_soft_reset(struct meson_mx_mmc_host *host) { - writel(MESON_MX_SDIO_IRQC_SOFT_RESET, host->base + MESON_MX_SDIO_IRQC); + regmap_write(host->regmap, MESON_MX_SDIO_IRQC, + MESON_MX_SDIO_IRQC_SOFT_RESET); udelay(2); } @@ -158,7 +146,7 @@ static void meson_mx_mmc_start_cmd(struct mmc_host *mmc, struct meson_mx_mmc_host *host = mmc_priv(mmc); unsigned int pack_size; unsigned long irqflags, timeout; - u32 mult, send = 0, ext = 0; + u32 send = 0, ext = 0; host->cmd = cmd; @@ -215,25 +203,22 @@ static void meson_mx_mmc_start_cmd(struct mmc_host *mmc, spin_lock_irqsave(&host->irq_lock, irqflags); - mult = readl(host->base + MESON_MX_SDIO_MULT); - mult &= ~MESON_MX_SDIO_MULT_PORT_SEL_MASK; - mult |= FIELD_PREP(MESON_MX_SDIO_MULT_PORT_SEL_MASK, host->slot_id); - mult |= BIT(31); - writel(mult, host->base + MESON_MX_SDIO_MULT); + regmap_update_bits(host->regmap, MESON_MX_SDIO_MULT, + MESON_MX_SDIO_MULT_PORT_SEL_MASK | BIT(31), + FIELD_PREP(MESON_MX_SDIO_MULT_PORT_SEL_MASK, + host->slot_id) | BIT(31)); /* enable the CMD done interrupt */ - meson_mx_mmc_mask_bits(mmc, MESON_MX_SDIO_IRQC, - MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN, - MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN); + regmap_set_bits(host->regmap, MESON_MX_SDIO_IRQC, + MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN); /* clear pending interrupts */ - meson_mx_mmc_mask_bits(mmc, MESON_MX_SDIO_IRQS, - MESON_MX_SDIO_IRQS_CMD_INT, - MESON_MX_SDIO_IRQS_CMD_INT); + regmap_set_bits(host->regmap, MESON_MX_SDIO_IRQS, + MESON_MX_SDIO_IRQS_CMD_INT); - writel(cmd->arg, host->base + MESON_MX_SDIO_ARGU); - writel(ext, host->base + MESON_MX_SDIO_EXT); - writel(send, host->base + MESON_MX_SDIO_SEND); + regmap_write(host->regmap, MESON_MX_SDIO_ARGU, cmd->arg); + regmap_write(host->regmap, MESON_MX_SDIO_EXT, ext); + regmap_write(host->regmap, MESON_MX_SDIO_SEND, send); spin_unlock_irqrestore(&host->irq_lock, irqflags); @@ -263,14 +248,13 @@ static void meson_mx_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) switch (ios->bus_width) { case MMC_BUS_WIDTH_1: - meson_mx_mmc_mask_bits(mmc, MESON_MX_SDIO_CONF, - MESON_MX_SDIO_CONF_BUS_WIDTH, 0); + regmap_clear_bits(host->regmap, MESON_MX_SDIO_CONF, + MESON_MX_SDIO_CONF_BUS_WIDTH); break; case MMC_BUS_WIDTH_4: - meson_mx_mmc_mask_bits(mmc, MESON_MX_SDIO_CONF, - MESON_MX_SDIO_CONF_BUS_WIDTH, - MESON_MX_SDIO_CONF_BUS_WIDTH); + regmap_set_bits(host->regmap, MESON_MX_SDIO_CONF, + MESON_MX_SDIO_CONF_BUS_WIDTH); break; case MMC_BUS_WIDTH_8: @@ -351,8 +335,8 @@ static void meson_mx_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) host->mrq = mrq; if (mrq->data) - writel(sg_dma_address(mrq->data->sg), - host->base + MESON_MX_SDIO_ADDR); + regmap_write(host->regmap, MESON_MX_SDIO_ADDR, + sg_dma_address(mrq->data->sg)); if (mrq->sbc) meson_mx_mmc_start_cmd(mmc, mrq->sbc); @@ -364,24 +348,26 @@ static void meson_mx_mmc_read_response(struct mmc_host *mmc, struct mmc_command *cmd) { struct meson_mx_mmc_host *host = mmc_priv(mmc); - u32 mult; - int i, resp[4]; + unsigned int i, resp[4]; - mult = readl(host->base + MESON_MX_SDIO_MULT); - mult |= MESON_MX_SDIO_MULT_WR_RD_OUT_INDEX; - mult &= ~MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK; - mult |= FIELD_PREP(MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK, 0); - writel(mult, host->base + MESON_MX_SDIO_MULT); + regmap_update_bits(host->regmap, MESON_MX_SDIO_MULT, + MESON_MX_SDIO_MULT_WR_RD_OUT_INDEX | + MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK, + MESON_MX_SDIO_MULT_WR_RD_OUT_INDEX | + FIELD_PREP(MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK, + 0)); if (cmd->flags & MMC_RSP_136) { for (i = 0; i <= 3; i++) - resp[3 - i] = readl(host->base + MESON_MX_SDIO_ARGU); + regmap_read(host->regmap, MESON_MX_SDIO_ARGU, + &resp[3 - i]); + cmd->resp[0] = (resp[0] << 8) | ((resp[1] >> 24) & 0xff); cmd->resp[1] = (resp[1] << 8) | ((resp[2] >> 24) & 0xff); cmd->resp[2] = (resp[2] << 8) | ((resp[3] >> 24) & 0xff); cmd->resp[3] = (resp[3] << 8); } else if (cmd->flags & MMC_RSP_PRESENT) { - cmd->resp[0] = readl(host->base + MESON_MX_SDIO_ARGU); + regmap_read(host->regmap, MESON_MX_SDIO_ARGU, &cmd->resp[0]); } } @@ -422,8 +408,8 @@ static irqreturn_t meson_mx_mmc_irq(int irq, void *data) spin_lock(&host->irq_lock); - irqs = readl(host->base + MESON_MX_SDIO_IRQS); - send = readl(host->base + MESON_MX_SDIO_SEND); + regmap_read(host->regmap, MESON_MX_SDIO_IRQS, &irqs); + regmap_read(host->regmap, MESON_MX_SDIO_SEND, &send); if (irqs & MESON_MX_SDIO_IRQS_CMD_INT) ret = meson_mx_mmc_process_cmd_irq(host, irqs, send); @@ -431,7 +417,7 @@ static irqreturn_t meson_mx_mmc_irq(int irq, void *data) ret = IRQ_HANDLED; /* finally ACK all pending interrupts */ - writel(irqs, host->base + MESON_MX_SDIO_IRQS); + regmap_write(host->regmap, MESON_MX_SDIO_IRQS, irqs); spin_unlock(&host->irq_lock); @@ -450,8 +436,7 @@ static irqreturn_t meson_mx_mmc_irq_thread(int irq, void *irq_data) if (cmd->data) { dma_unmap_sg(mmc_dev(host->mmc), cmd->data->sg, - cmd->data->sg_len, - mmc_get_dma_dir(cmd->data)); + cmd->data->sg_len, mmc_get_dma_dir(cmd->data)); cmd->data->bytes_xfered = cmd->data->blksz * cmd->data->blocks; } @@ -470,14 +455,13 @@ static void meson_mx_mmc_timeout(struct timer_list *t) struct meson_mx_mmc_host *host = timer_container_of(host, t, cmd_timeout); unsigned long irqflags; - u32 irqc; + u32 irqs, argu; spin_lock_irqsave(&host->irq_lock, irqflags); /* disable the CMD interrupt */ - irqc = readl(host->base + MESON_MX_SDIO_IRQC); - irqc &= ~MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN; - writel(irqc, host->base + MESON_MX_SDIO_IRQC); + regmap_clear_bits(host->regmap, MESON_MX_SDIO_IRQC, + MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN); spin_unlock_irqrestore(&host->irq_lock, irqflags); @@ -488,10 +472,12 @@ static void meson_mx_mmc_timeout(struct timer_list *t) if (!host->cmd) return; + regmap_read(host->regmap, MESON_MX_SDIO_IRQS, &irqs); + regmap_read(host->regmap, MESON_MX_SDIO_ARGU, &argu); + dev_dbg(mmc_dev(host->mmc), "Timeout on CMD%u (IRQS = 0x%08x, ARGU = 0x%08x)\n", - host->cmd->opcode, readl(host->base + MESON_MX_SDIO_IRQS), - readl(host->base + MESON_MX_SDIO_ARGU)); + host->cmd->opcode, irqs, argu); host->cmd->error = -ETIMEDOUT; @@ -507,23 +493,30 @@ static struct mmc_host_ops meson_mx_mmc_ops = { static struct platform_device *meson_mx_mmc_slot_pdev(struct device *parent) { - struct device_node *slot_node; - struct platform_device *pdev; + struct platform_device *pdev = NULL; + + for_each_available_child_of_node_scoped(parent->of_node, slot_node) { + if (!of_device_is_compatible(slot_node, "mmc-slot")) + continue; + + /* + * TODO: the MMC core framework currently does not support + * controllers with multiple slots properly. So we only + * register the first slot for now. + */ + if (pdev) { + dev_warn(parent, + "more than one 'mmc-slot' compatible child found - using the first one and ignoring all subsequent ones\n"); + break; + } - /* - * TODO: the MMC core framework currently does not support - * controllers with multiple slots properly. So we only register - * the first slot for now - */ - slot_node = of_get_compatible_child(parent->of_node, "mmc-slot"); - if (!slot_node) { - dev_warn(parent, "no 'mmc-slot' sub-node found\n"); - return ERR_PTR(-ENOENT); + pdev = of_platform_device_create(slot_node, NULL, parent); + if (!pdev) + dev_err(parent, + "Failed to create platform device for mmc-slot node '%pOF'\n", + slot_node); } - pdev = of_platform_device_create(slot_node, NULL, parent); - of_node_put(slot_node); - return pdev; } @@ -533,16 +526,14 @@ static int meson_mx_mmc_add_host(struct meson_mx_mmc_host *host) struct device *slot_dev = mmc_dev(mmc); int ret; - if (of_property_read_u32(slot_dev->of_node, "reg", &host->slot_id)) { - dev_err(slot_dev, "missing 'reg' property\n"); - return -EINVAL; - } + if (of_property_read_u32(slot_dev->of_node, "reg", &host->slot_id)) + return dev_err_probe(slot_dev, -EINVAL, + "missing 'reg' property\n"); - if (host->slot_id >= MESON_MX_SDIO_MAX_SLOTS) { - dev_err(slot_dev, "invalid 'reg' property value %d\n", - host->slot_id); - return -EINVAL; - } + if (host->slot_id >= MESON_MX_SDIO_MAX_SLOTS) + return dev_err_probe(slot_dev, -EINVAL, + "invalid 'reg' property value %d\n", + host->slot_id); /* Get regulators and the supported OCR mask */ ret = mmc_regulator_get_supply(mmc); @@ -561,8 +552,7 @@ static int meson_mx_mmc_add_host(struct meson_mx_mmc_host *host) /* Get the min and max supported clock rates */ mmc->f_min = clk_round_rate(host->cfg_div_clk, 1); - mmc->f_max = clk_round_rate(host->cfg_div_clk, - clk_get_rate(host->parent_clk)); + mmc->f_max = clk_round_rate(host->cfg_div_clk, ULONG_MAX); mmc->caps |= MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY; mmc->ops = &meson_mx_mmc_ops; @@ -578,70 +568,89 @@ static int meson_mx_mmc_add_host(struct meson_mx_mmc_host *host) return 0; } -static int meson_mx_mmc_register_clks(struct meson_mx_mmc_host *host) +static struct clk *meson_mx_mmc_register_clk(struct device *dev, + void __iomem *base) { - struct clk_init_data init; - const char *clk_div_parent, *clk_fixed_factor_parent; - - clk_fixed_factor_parent = __clk_get_name(host->parent_clk); - init.name = devm_kasprintf(host->controller_dev, GFP_KERNEL, - "%s#fixed_factor", - dev_name(host->controller_dev)); - if (!init.name) - return -ENOMEM; + const char *fixed_div2_name, *cfg_div_name; + struct meson_mx_mmc_host_clkc *host_clkc; + struct clk *clk; + int ret; - init.ops = &clk_fixed_factor_ops; - init.flags = 0; - init.parent_names = &clk_fixed_factor_parent; - init.num_parents = 1; - host->fixed_factor.div = 2; - host->fixed_factor.mult = 1; - host->fixed_factor.hw.init = &init; - - host->fixed_factor_clk = devm_clk_register(host->controller_dev, - &host->fixed_factor.hw); - if (WARN_ON(IS_ERR(host->fixed_factor_clk))) - return PTR_ERR(host->fixed_factor_clk); - - clk_div_parent = __clk_get_name(host->fixed_factor_clk); - init.name = devm_kasprintf(host->controller_dev, GFP_KERNEL, - "%s#div", dev_name(host->controller_dev)); - if (!init.name) - return -ENOMEM; + /* use a dedicated memory allocation for the clock controller to + * prevent use-after-free as meson_mx_mmc_host is free'd before + * dev (controller dev, not mmc_host->dev) is free'd. + */ + host_clkc = devm_kzalloc(dev, sizeof(*host_clkc), GFP_KERNEL); + if (!host_clkc) + return ERR_PTR(-ENOMEM); + + fixed_div2_name = devm_kasprintf(dev, GFP_KERNEL, "%s#fixed_div2", + dev_name(dev)); + if (!fixed_div2_name) + return ERR_PTR(-ENOMEM); + + host_clkc->fixed_div2.div = 2; + host_clkc->fixed_div2.mult = 1; + host_clkc->fixed_div2.hw.init = CLK_HW_INIT_FW_NAME(fixed_div2_name, + "clkin", + &clk_fixed_factor_ops, + 0); + ret = devm_clk_hw_register(dev, &host_clkc->fixed_div2.hw); + if (ret) + return dev_err_ptr_probe(dev, ret, + "Failed to register %s clock\n", + fixed_div2_name); + + cfg_div_name = devm_kasprintf(dev, GFP_KERNEL, "%s#div", dev_name(dev)); + if (!cfg_div_name) + return ERR_PTR(-ENOMEM); + + host_clkc->cfg_div.reg = base + MESON_MX_SDIO_CONF; + host_clkc->cfg_div.shift = MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT; + host_clkc->cfg_div.width = MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH; + host_clkc->cfg_div.hw.init = CLK_HW_INIT_HW(cfg_div_name, + &host_clkc->fixed_div2.hw, + &clk_divider_ops, + CLK_DIVIDER_ALLOW_ZERO); + ret = devm_clk_hw_register(dev, &host_clkc->cfg_div.hw); + if (ret) + return dev_err_ptr_probe(dev, ret, + "Failed to register %s clock\n", + cfg_div_name); - init.ops = &clk_divider_ops; - init.flags = CLK_SET_RATE_PARENT; - init.parent_names = &clk_div_parent; - init.num_parents = 1; - host->cfg_div.reg = host->base + MESON_MX_SDIO_CONF; - host->cfg_div.shift = MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT; - host->cfg_div.width = MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH; - host->cfg_div.hw.init = &init; - host->cfg_div.flags = CLK_DIVIDER_ALLOW_ZERO; - - host->cfg_div_clk = devm_clk_register(host->controller_dev, - &host->cfg_div.hw); - if (WARN_ON(IS_ERR(host->cfg_div_clk))) - return PTR_ERR(host->cfg_div_clk); + clk = devm_clk_hw_get_clk(dev, &host_clkc->cfg_div.hw, "cfg_div_clk"); + if (IS_ERR(clk)) + return dev_err_ptr_probe(dev, PTR_ERR(clk), + "Failed to get the cfg_div clock\n"); - return 0; + return clk; } static int meson_mx_mmc_probe(struct platform_device *pdev) { + const struct regmap_config meson_mx_sdio_regmap_config = { + .reg_bits = 8, + .val_bits = 32, + .reg_stride = 4, + .max_register = MESON_MX_SDIO_EXT, + }; struct platform_device *slot_pdev; struct mmc_host *mmc; struct meson_mx_mmc_host *host; + struct clk *core_clk; + void __iomem *base; int ret, irq; u32 conf; + base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + slot_pdev = meson_mx_mmc_slot_pdev(&pdev->dev); if (!slot_pdev) return -ENODEV; - else if (IS_ERR(slot_pdev)) - return PTR_ERR(slot_pdev); - mmc = mmc_alloc_host(sizeof(*host), &slot_pdev->dev); + mmc = devm_mmc_alloc_host(&slot_pdev->dev, sizeof(*host)); if (!mmc) { ret = -ENOMEM; goto error_unregister_slot_pdev; @@ -656,51 +665,48 @@ static int meson_mx_mmc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, host); - host->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(host->base)) { - ret = PTR_ERR(host->base); - goto error_free_mmc; + host->regmap = devm_regmap_init_mmio(&pdev->dev, base, + &meson_mx_sdio_regmap_config); + if (IS_ERR(host->regmap)) { + ret = dev_err_probe(host->controller_dev, PTR_ERR(host->regmap), + "Failed to initialize regmap\n"); + goto error_unregister_slot_pdev; } irq = platform_get_irq(pdev, 0); if (irq < 0) { ret = irq; - goto error_free_mmc; + goto error_unregister_slot_pdev; } ret = devm_request_threaded_irq(host->controller_dev, irq, meson_mx_mmc_irq, meson_mx_mmc_irq_thread, IRQF_ONESHOT, NULL, host); - if (ret) - goto error_free_mmc; - - host->core_clk = devm_clk_get(host->controller_dev, "core"); - if (IS_ERR(host->core_clk)) { - ret = PTR_ERR(host->core_clk); - goto error_free_mmc; + if (ret) { + dev_err_probe(host->controller_dev, ret, + "Failed to request IRQ\n"); + goto error_unregister_slot_pdev; } - host->parent_clk = devm_clk_get(host->controller_dev, "clkin"); - if (IS_ERR(host->parent_clk)) { - ret = PTR_ERR(host->parent_clk); - goto error_free_mmc; + core_clk = devm_clk_get_enabled(host->controller_dev, "core"); + if (IS_ERR(core_clk)) { + ret = dev_err_probe(host->controller_dev, PTR_ERR(core_clk), + "Failed to get and enable 'core' clock\n"); + goto error_unregister_slot_pdev; } - ret = meson_mx_mmc_register_clks(host); - if (ret) - goto error_free_mmc; - - ret = clk_prepare_enable(host->core_clk); - if (ret) { - dev_err(host->controller_dev, "Failed to enable core clock\n"); - goto error_free_mmc; + host->cfg_div_clk = meson_mx_mmc_register_clk(&pdev->dev, base); + if (IS_ERR(host->cfg_div_clk)) { + ret = PTR_ERR(host->cfg_div_clk); + goto error_unregister_slot_pdev; } ret = clk_prepare_enable(host->cfg_div_clk); if (ret) { - dev_err(host->controller_dev, "Failed to enable MMC clock\n"); - goto error_disable_core_clk; + dev_err_probe(host->controller_dev, ret, + "Failed to enable MMC (cfg div) clock\n"); + goto error_unregister_slot_pdev; } conf = 0; @@ -708,22 +714,18 @@ static int meson_mx_mmc_probe(struct platform_device *pdev) conf |= FIELD_PREP(MESON_MX_SDIO_CONF_M_ENDIAN_MASK, 0x3); conf |= FIELD_PREP(MESON_MX_SDIO_CONF_WRITE_NWR_MASK, 0x2); conf |= FIELD_PREP(MESON_MX_SDIO_CONF_WRITE_CRC_OK_STATUS_MASK, 0x2); - writel(conf, host->base + MESON_MX_SDIO_CONF); + regmap_write(host->regmap, MESON_MX_SDIO_CONF, conf); meson_mx_mmc_soft_reset(host); ret = meson_mx_mmc_add_host(host); if (ret) - goto error_disable_clks; + goto error_disable_div_clk; return 0; -error_disable_clks: +error_disable_div_clk: clk_disable_unprepare(host->cfg_div_clk); -error_disable_core_clk: - clk_disable_unprepare(host->core_clk); -error_free_mmc: - mmc_free_host(mmc); error_unregister_slot_pdev: of_platform_device_destroy(&slot_pdev->dev, NULL); return ret; @@ -741,9 +743,6 @@ static void meson_mx_mmc_remove(struct platform_device *pdev) of_platform_device_destroy(slot_dev, NULL); clk_disable_unprepare(host->cfg_div_clk); - clk_disable_unprepare(host->core_clk); - - mmc_free_host(host->mmc); } static const struct of_device_id meson_mx_mmc_of_match[] = { diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 79074291e9d2..daed659f63f6 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -1214,7 +1214,7 @@ static void msdc_start_data(struct msdc_host *host, struct mmc_command *cmd, host->data = data; read = data->flags & MMC_DATA_READ; - mod_delayed_work(system_wq, &host->req_timeout, DAT_TIMEOUT); + mod_delayed_work(system_percpu_wq, &host->req_timeout, DAT_TIMEOUT); msdc_dma_setup(host, &host->dma, data); sdr_set_bits(host->base + MSDC_INTEN, data_ints_mask); sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1); @@ -1444,7 +1444,7 @@ static void msdc_start_command(struct msdc_host *host, WARN_ON(host->cmd); host->cmd = cmd; - mod_delayed_work(system_wq, &host->req_timeout, DAT_TIMEOUT); + mod_delayed_work(system_percpu_wq, &host->req_timeout, DAT_TIMEOUT); if (!msdc_cmd_is_ready(host, mrq, cmd)) return; diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 52ac3f128a1c..527b89a5ed70 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -326,7 +326,7 @@ mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, "closed"); } -static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); +static DEVICE_ATTR(cover_switch, 0444, mmc_omap_show_cover_switch, NULL); static ssize_t mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, @@ -338,7 +338,7 @@ mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, return sprintf(buf, "%s\n", slot->pdata->name); } -static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); +static DEVICE_ATTR(slot_name, 0444, mmc_omap_show_slot_name, NULL); static void mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd) @@ -1477,7 +1477,7 @@ static int mmc_omap_probe(struct platform_device *pdev) host->nr_slots = pdata->nr_slots; host->reg_shift = (mmc_omap7xx() ? 1 : 2); - host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0); + host->mmc_omap_wq = alloc_workqueue("mmc_omap", WQ_PERCPU, 0); if (!host->mmc_omap_wq) { ret = -ENOMEM; goto err_plat_cleanup; diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 09e4354d1f1d..58c881f2725b 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -746,7 +746,7 @@ omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, return sprintf(buf, "%s\n", mmc_pdata(host)->name); } -static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); +static DEVICE_ATTR(slot_name, 0444, omap_hsmmc_show_slot_name, NULL); /* * Configure the response type and send the cmd. @@ -1672,7 +1672,7 @@ DEFINE_SHOW_ATTRIBUTE(mmc_regs); static void omap_hsmmc_debugfs(struct mmc_host *mmc) { if (mmc->debugfs_root) - debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, + debugfs_create_file("regs", 0400, mmc->debugfs_root, mmc, &mmc_regs_fops); } diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h index 084964cecf9d..afc36a407c2c 100644 --- a/drivers/mmc/host/renesas_sdhi.h +++ b/drivers/mmc/host/renesas_sdhi.h @@ -9,6 +9,7 @@ #ifndef RENESAS_SDHI_H #define RENESAS_SDHI_H +#include <linux/device.h> #include <linux/dmaengine.h> #include <linux/platform_device.h> #include <linux/workqueue.h> @@ -107,4 +108,6 @@ int renesas_sdhi_probe(struct platform_device *pdev, const struct renesas_sdhi_of_data *of_data, const struct renesas_sdhi_quirks *quirks); void renesas_sdhi_remove(struct platform_device *pdev); +int renesas_sdhi_suspend(struct device *dev); +int renesas_sdhi_resume(struct device *dev); #endif diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index f56fa2cd208d..2a310a145785 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -31,6 +31,7 @@ #include <linux/platform_data/tmio.h> #include <linux/platform_device.h> #include <linux/pm_domain.h> +#include <linux/pm_runtime.h> #include <linux/regulator/consumer.h> #include <linux/regulator/driver.h> #include <linux/regulator/of_regulator.h> @@ -1103,7 +1104,7 @@ int renesas_sdhi_probe(struct platform_device *pdev, if (IS_ERR(priv->clk_cd)) return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk_cd), "cannot get cd clock"); - priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); + priv->rstc = devm_reset_control_get_optional_exclusive_deasserted(&pdev->dev, NULL); if (IS_ERR(priv->rstc)) return PTR_ERR(priv->rstc); @@ -1317,5 +1318,41 @@ void renesas_sdhi_remove(struct platform_device *pdev) } EXPORT_SYMBOL_GPL(renesas_sdhi_remove); +int renesas_sdhi_suspend(struct device *dev) +{ + struct tmio_mmc_host *host = dev_get_drvdata(dev); + struct renesas_sdhi *priv = host_to_priv(host); + int ret; + + ret = pm_runtime_force_suspend(dev); + if (ret) + return ret; + + ret = reset_control_assert(priv->rstc); + if (ret) + pm_runtime_force_resume(dev); + + return ret; +} +EXPORT_SYMBOL_GPL(renesas_sdhi_suspend); + +int renesas_sdhi_resume(struct device *dev) +{ + struct tmio_mmc_host *host = dev_get_drvdata(dev); + struct renesas_sdhi *priv = host_to_priv(host); + int ret; + + ret = reset_control_deassert(priv->rstc); + if (ret) + return ret; + + ret = pm_runtime_force_resume(dev); + if (ret) + reset_control_assert(priv->rstc); + + return ret; +} +EXPORT_SYMBOL_GPL(renesas_sdhi_resume); + MODULE_DESCRIPTION("Renesas SDHI core driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c index 9e3ed0bcddd6..f6ebb7bc7ede 100644 --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c @@ -18,7 +18,6 @@ #include <linux/pagemap.h> #include <linux/platform_data/tmio.h> #include <linux/platform_device.h> -#include <linux/pm_runtime.h> #include <linux/scatterlist.h> #include <linux/sys_soc.h> @@ -124,7 +123,8 @@ static const struct renesas_sdhi_of_data of_data_rcar_gen3 = { static const struct renesas_sdhi_of_data of_data_rcar_gen3_no_sdh_fallback = { .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | - TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, + TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 | + TMIO_MMC_64BIT_DATA_PORT, .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY, .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT | MMC_CAP2_MERGE_CAPABLE, @@ -599,18 +599,17 @@ static int renesas_sdhi_internal_dmac_probe(struct platform_device *pdev) } static const struct dev_pm_ops renesas_sdhi_internal_dmac_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, - pm_runtime_force_resume) - SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, - tmio_mmc_host_runtime_resume, - NULL) + SYSTEM_SLEEP_PM_OPS(renesas_sdhi_suspend, renesas_sdhi_resume) + RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, + tmio_mmc_host_runtime_resume, + NULL) }; static struct platform_driver renesas_internal_dmac_sdhi_driver = { .driver = { .name = "renesas_sdhi_internal_dmac", .probe_type = PROBE_PREFER_ASYNCHRONOUS, - .pm = &renesas_sdhi_internal_dmac_dev_pm_ops, + .pm = pm_ptr(&renesas_sdhi_internal_dmac_dev_pm_ops), .of_match_table = renesas_sdhi_internal_dmac_of_match, }, .probe = renesas_sdhi_internal_dmac_probe, diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c index 822a310c9bba..543ad1d0ed1c 100644 --- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c @@ -60,7 +60,8 @@ static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = { static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = { .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | - TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2, + TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 | + TMIO_MMC_32BIT_DATA_PORT, .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY, .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT, diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index 15705e85417f..c9442499876c 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -31,35 +31,116 @@ #define SDHCI_ARASAN_CQE_BASE_ADDR 0x200 -#define SDIO_CFG_CQ_CAPABILITY 0x4c -#define SDIO_CFG_CQ_CAPABILITY_FMUL GENMASK(13, 12) - #define SDIO_CFG_CTRL 0x0 #define SDIO_CFG_CTRL_SDCD_N_TEST_EN BIT(31) #define SDIO_CFG_CTRL_SDCD_N_TEST_LEV BIT(30) - +#define SDIO_CFG_OP_DLY 0x34 +#define SDIO_CFG_OP_DLY_DEFAULT 0x80000003 +#define SDIO_CFG_CQ_CAPABILITY 0x4c +#define SDIO_CFG_CQ_CAPABILITY_FMUL GENMASK(13, 12) +#define SDIO_CFG_SD_PIN_SEL 0x44 +#define SDIO_CFG_V1_SD_PIN_SEL 0x54 +#define SDIO_CFG_PHY_SW_MODE_0_RX_CTRL 0x7C #define SDIO_CFG_MAX_50MHZ_MODE 0x1ac #define SDIO_CFG_MAX_50MHZ_MODE_STRAP_OVERRIDE BIT(31) #define SDIO_CFG_MAX_50MHZ_MODE_ENABLE BIT(0) +#define SDIO_BOOT_MAIN_CTL 0x0 + #define MMC_CAP_HSE_MASK (MMC_CAP2_HSX00_1_2V | MMC_CAP2_HSX00_1_8V) /* Select all SD UHS type I SDR speed above 50MB/s */ #define MMC_CAP_UHS_I_SDR_MASK (MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104) -struct sdhci_brcmstb_priv { - void __iomem *cfg_regs; - unsigned int flags; - struct clk *base_clk; - u32 base_freq_hz; +enum cfg_core_ver { + SDIO_CFG_CORE_V1 = 1, + SDIO_CFG_CORE_V2, +}; + +struct sdhci_brcmstb_saved_regs { + u32 sd_pin_sel; + u32 phy_sw_mode0_rxctrl; + u32 max_50mhz_mode; + u32 boot_main_ctl; }; struct brcmstb_match_priv { void (*cfginit)(struct sdhci_host *host); void (*hs400es)(struct mmc_host *mmc, struct mmc_ios *ios); + void (*save_restore_regs)(struct mmc_host *mmc, int save); struct sdhci_ops *ops; const unsigned int flags; }; +struct sdhci_brcmstb_priv { + void __iomem *cfg_regs; + void __iomem *boot_regs; + struct sdhci_brcmstb_saved_regs saved_regs; + unsigned int flags; + struct clk *base_clk; + u32 base_freq_hz; + const struct brcmstb_match_priv *match_priv; +}; + +static void sdhci_brcmstb_save_regs(struct mmc_host *mmc, enum cfg_core_ver ver) +{ + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + struct sdhci_brcmstb_saved_regs *sr = &priv->saved_regs; + void __iomem *cr = priv->cfg_regs; + bool is_emmc = mmc->caps & MMC_CAP_NONREMOVABLE; + + if (is_emmc && priv->boot_regs) + sr->boot_main_ctl = readl(priv->boot_regs + SDIO_BOOT_MAIN_CTL); + + if (ver == SDIO_CFG_CORE_V1) { + sr->sd_pin_sel = readl(cr + SDIO_CFG_V1_SD_PIN_SEL); + return; + } + + sr->sd_pin_sel = readl(cr + SDIO_CFG_SD_PIN_SEL); + sr->phy_sw_mode0_rxctrl = readl(cr + SDIO_CFG_PHY_SW_MODE_0_RX_CTRL); + sr->max_50mhz_mode = readl(cr + SDIO_CFG_MAX_50MHZ_MODE); +} + +static void sdhci_brcmstb_restore_regs(struct mmc_host *mmc, enum cfg_core_ver ver) +{ + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + struct sdhci_brcmstb_saved_regs *sr = &priv->saved_regs; + void __iomem *cr = priv->cfg_regs; + bool is_emmc = mmc->caps & MMC_CAP_NONREMOVABLE; + + if (is_emmc && priv->boot_regs) + writel(sr->boot_main_ctl, priv->boot_regs + SDIO_BOOT_MAIN_CTL); + + if (ver == SDIO_CFG_CORE_V1) { + writel(sr->sd_pin_sel, cr + SDIO_CFG_SD_PIN_SEL); + return; + } + + writel(sr->sd_pin_sel, cr + SDIO_CFG_SD_PIN_SEL); + writel(sr->phy_sw_mode0_rxctrl, cr + SDIO_CFG_PHY_SW_MODE_0_RX_CTRL); + writel(sr->max_50mhz_mode, cr + SDIO_CFG_MAX_50MHZ_MODE); +} + +static void sdhci_brcmstb_save_restore_regs_v1(struct mmc_host *mmc, int save) +{ + if (save) + sdhci_brcmstb_save_regs(mmc, SDIO_CFG_CORE_V1); + else + sdhci_brcmstb_restore_regs(mmc, SDIO_CFG_CORE_V1); +} + +static void sdhci_brcmstb_save_restore_regs_v2(struct mmc_host *mmc, int save) +{ + if (save) + sdhci_brcmstb_save_regs(mmc, SDIO_CFG_CORE_V2); + else + sdhci_brcmstb_restore_regs(mmc, SDIO_CFG_CORE_V2); +} + static inline void enable_clock_gating(struct sdhci_host *host) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -212,6 +293,21 @@ static void sdhci_brcmstb_cfginit_2712(struct sdhci_host *host) } } +static void sdhci_brcmstb_set_72116_uhs_signaling(struct sdhci_host *host, unsigned int timing) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + u32 reg; + + /* no change to SDIO_CFG_OP_DLY_DEFAULT when using preset clk rate */ + if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) + return; + + reg = (timing == MMC_TIMING_MMC_HS200) ? 0 : SDIO_CFG_OP_DLY_DEFAULT; + writel(reg, priv->cfg_regs + SDIO_CFG_OP_DLY); + sdhci_set_uhs_signaling(host, timing); +} + static void sdhci_brcmstb_dumpregs(struct mmc_host *mmc) { sdhci_dumpregs(mmc_priv(mmc)); @@ -252,6 +348,13 @@ static struct sdhci_ops sdhci_brcmstb_ops_2712 = { .set_uhs_signaling = sdhci_set_uhs_signaling, }; +static struct sdhci_ops sdhci_brcmstb_ops_72116 = { + .set_clock = sdhci_set_clock, + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_brcmstb_set_72116_uhs_signaling, +}; + static struct sdhci_ops sdhci_brcmstb_ops_7216 = { .set_clock = sdhci_brcmstb_set_clock, .set_bus_width = sdhci_set_bus_width, @@ -277,19 +380,33 @@ static struct brcmstb_match_priv match_priv_7425 = { .ops = &sdhci_brcmstb_ops, }; +static struct brcmstb_match_priv match_priv_74371 = { + .flags = BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT, + .ops = &sdhci_brcmstb_ops, +}; + static struct brcmstb_match_priv match_priv_7445 = { .flags = BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT, + .save_restore_regs = sdhci_brcmstb_save_restore_regs_v1, .ops = &sdhci_brcmstb_ops, }; +static struct brcmstb_match_priv match_priv_72116 = { + .flags = BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT, + .save_restore_regs = sdhci_brcmstb_save_restore_regs_v1, + .ops = &sdhci_brcmstb_ops_72116, +}; + static const struct brcmstb_match_priv match_priv_7216 = { .flags = BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE, + .save_restore_regs = sdhci_brcmstb_save_restore_regs_v2, .hs400es = sdhci_brcmstb_hs400es, .ops = &sdhci_brcmstb_ops_7216, }; static struct brcmstb_match_priv match_priv_74165b0 = { .flags = BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE, + .save_restore_regs = sdhci_brcmstb_save_restore_regs_v2, .hs400es = sdhci_brcmstb_hs400es, .ops = &sdhci_brcmstb_ops_74165b0, }; @@ -297,7 +414,9 @@ static struct brcmstb_match_priv match_priv_74165b0 = { static const struct of_device_id __maybe_unused sdhci_brcm_of_match[] = { { .compatible = "brcm,bcm2712-sdhci", .data = &match_priv_2712 }, { .compatible = "brcm,bcm7425-sdhci", .data = &match_priv_7425 }, + { .compatible = "brcm,bcm74371-sdhci", .data = &match_priv_74371 }, { .compatible = "brcm,bcm7445-sdhci", .data = &match_priv_7445 }, + { .compatible = "brcm,bcm72116-sdhci", .data = &match_priv_72116 }, { .compatible = "brcm,bcm7216-sdhci", .data = &match_priv_7216 }, { .compatible = "brcm,bcm74165b0-sdhci", .data = &match_priv_74165b0 }, {}, @@ -395,6 +514,7 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) pltfm_host = sdhci_priv(host); priv = sdhci_pltfm_priv(pltfm_host); + priv->match_priv = match->data; if (device_property_read_bool(&pdev->dev, "supports-cqe")) { priv->flags |= BRCMSTB_PRIV_FLAGS_HAS_CQE; match_priv->ops->irq = sdhci_brcmstb_cqhci_irq; @@ -412,6 +532,13 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) if (res) goto err; + /* map non-standard BOOT registers if present */ + if (host->mmc->caps & MMC_CAP_NONREMOVABLE) { + priv->boot_regs = devm_platform_get_and_ioremap_resource(pdev, 2, NULL); + if (IS_ERR(priv->boot_regs)) + priv->boot_regs = NULL; + } + /* * Automatic clock gating does not work for SD cards that may * voltage switch so only enable it for non-removable devices. @@ -501,8 +628,13 @@ static int sdhci_brcmstb_suspend(struct device *dev) struct sdhci_host *host = dev_get_drvdata(dev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + const struct brcmstb_match_priv *match_priv = priv->match_priv; + int ret; + if (match_priv->save_restore_regs) + match_priv->save_restore_regs(host->mmc, 1); + clk_disable_unprepare(priv->base_clk); if (host->mmc->caps2 & MMC_CAP2_CQE) { ret = cqhci_suspend(host->mmc); @@ -518,6 +650,7 @@ static int sdhci_brcmstb_resume(struct device *dev) struct sdhci_host *host = dev_get_drvdata(dev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + const struct brcmstb_match_priv *match_priv = priv->match_priv; int ret; ret = sdhci_pltfm_resume(dev); @@ -534,6 +667,9 @@ static int sdhci_brcmstb_resume(struct device *dev) ret = clk_set_rate(priv->base_clk, priv->base_freq_hz); } + if (match_priv->save_restore_regs) + match_priv->save_restore_regs(host->mmc, 0); + if (host->mmc->caps2 & MMC_CAP2_CQE) ret = cqhci_resume(host->mmc); diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 4e5edbf2fc9b..3b85233131b3 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -344,41 +344,43 @@ static void sdhci_msm_v5_variant_writel_relaxed(u32 val, writel_relaxed(val, host->ioaddr + offset); } -static unsigned int msm_get_clock_mult_for_bus_mode(struct sdhci_host *host) +static unsigned int msm_get_clock_mult_for_bus_mode(struct sdhci_host *host, + unsigned int clock, + unsigned int timing) { - struct mmc_ios ios = host->mmc->ios; /* * The SDHC requires internal clock frequency to be double the * actual clock that will be set for DDR mode. The controller * uses the faster clock(100/400MHz) for some of its parts and * send the actual required clock (50/200MHz) to the card. */ - if (ios.timing == MMC_TIMING_UHS_DDR50 || - ios.timing == MMC_TIMING_MMC_DDR52 || - ios.timing == MMC_TIMING_MMC_HS400 || + if (timing == MMC_TIMING_UHS_DDR50 || + timing == MMC_TIMING_MMC_DDR52 || + (timing == MMC_TIMING_MMC_HS400 && + clock == MMC_HS200_MAX_DTR) || host->flags & SDHCI_HS400_TUNING) return 2; return 1; } static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, - unsigned int clock) + unsigned int clock, + unsigned int timing) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); - struct mmc_ios curr_ios = host->mmc->ios; struct clk *core_clk = msm_host->bulk_clks[0].clk; unsigned long achieved_rate; unsigned int desired_rate; unsigned int mult; int rc; - mult = msm_get_clock_mult_for_bus_mode(host); + mult = msm_get_clock_mult_for_bus_mode(host, clock, timing); desired_rate = clock * mult; rc = dev_pm_opp_set_rate(mmc_dev(host->mmc), desired_rate); if (rc) { pr_err("%s: Failed to set clock at rate %u at timing %d\n", - mmc_hostname(host->mmc), desired_rate, curr_ios.timing); + mmc_hostname(host->mmc), desired_rate, timing); return; } @@ -397,7 +399,7 @@ static void msm_set_clock_rate_for_bus_mode(struct sdhci_host *host, msm_host->clk_rate = desired_rate; pr_debug("%s: Setting clock at rate %lu at timing %d\n", - mmc_hostname(host->mmc), achieved_rate, curr_ios.timing); + mmc_hostname(host->mmc), achieved_rate, timing); } /* Platform specific tuning */ @@ -1239,7 +1241,7 @@ static int sdhci_msm_execute_tuning(struct mmc_host *mmc, u32 opcode) */ if (host->flags & SDHCI_HS400_TUNING) { sdhci_msm_hc_select_mode(host); - msm_set_clock_rate_for_bus_mode(host, ios.clock); + msm_set_clock_rate_for_bus_mode(host, ios.clock, ios.timing); host->flags &= ~SDHCI_HS400_TUNING; } @@ -1864,6 +1866,7 @@ static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host); + struct mmc_ios ios = host->mmc->ios; if (!clock) { host->mmc->actual_clock = msm_host->clk_rate = 0; @@ -1872,7 +1875,7 @@ static void sdhci_msm_set_clock(struct sdhci_host *host, unsigned int clock) sdhci_msm_hc_select_mode(host); - msm_set_clock_rate_for_bus_mode(host, clock); + msm_set_clock_rate_for_bus_mode(host, ios.clock, ios.timing); out: __sdhci_msm_set_clock(host, clock); } diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index c6f09b53325d..b97d042897ad 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -1991,7 +1991,7 @@ static int sdhci_arasan_probe(struct platform_device *pdev) ret = mmc_of_parse(host->mmc); if (ret) { - ret = dev_err_probe(dev, ret, "parsing dt failed.\n"); + dev_err_probe(dev, ret, "parsing dt failed.\n"); goto unreg_clk; } diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c index 4e256673a098..51949cde0958 100644 --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -11,6 +11,7 @@ #include <linux/arm-smccc.h> #include <linux/bitfield.h> #include <linux/clk.h> +#include <linux/clk-provider.h> #include <linux/dma-mapping.h> #include <linux/iopoll.h> #include <linux/kernel.h> @@ -19,11 +20,15 @@ #include <linux/platform_device.h> #include <linux/pm_domain.h> #include <linux/pm_runtime.h> +#include <linux/regmap.h> #include <linux/reset.h> #include <linux/sizes.h> +#include <linux/mfd/syscon.h> +#include <linux/units.h> #include "sdhci-pltfm.h" #include "cqhci.h" +#include "sdhci-cqhci.h" #define SDHCI_DWCMSHC_ARG2_STUFF GENMASK(31, 16) @@ -39,6 +44,7 @@ #define DWCMSHC_CARD_IS_EMMC BIT(0) #define DWCMSHC_ENHANCED_STROBE BIT(8) #define DWCMSHC_EMMC_ATCTRL 0x40 +#define DWCMSHC_AT_STAT 0x44 /* Tuning and auto-tuning fields in AT_CTRL_R control register */ #define AT_CTRL_AT_EN BIT(0) /* autotuning is enabled */ #define AT_CTRL_CI_SEL BIT(1) /* interval to drive center phase select */ @@ -82,6 +88,8 @@ #define DWCMSHC_EMMC_DLL_TXCLK 0x808 #define DWCMSHC_EMMC_DLL_STRBIN 0x80c #define DECMSHC_EMMC_DLL_CMDOUT 0x810 +#define DECMSHC_EMMC_MISC_CON 0x81C +#define MISC_INTCLK_EN BIT(1) #define DWCMSHC_EMMC_DLL_STATUS0 0x840 #define DWCMSHC_EMMC_DLL_START BIT(0) #define DWCMSHC_EMMC_DLL_LOCKED BIT(8) @@ -194,6 +202,19 @@ #define PHY_DLLDL_CNFG_SLV_INPSEL_MASK GENMASK(6, 5) /* bits [6:5] */ #define PHY_DLLDL_CNFG_SLV_INPSEL 0x3 /* clock source select for slave DL */ +/* PHY DLL offset setting register */ +#define PHY_DLL_OFFST_R (DWC_MSHC_PTR_PHY_R + 0x29) +/* DLL LBT setting register */ +#define PHY_DLLBT_CNFG_R (DWC_MSHC_PTR_PHY_R + 0x2c) +/* DLL Status register */ +#define PHY_DLL_STATUS_R (DWC_MSHC_PTR_PHY_R + 0x2e) +#define DLL_LOCK_STS BIT(0)/* DLL is locked and ready */ +/* + * Captures the value of DLL's lock error status information. Value is valid + * only when LOCK_STS is set. + */ +#define DLL_ERROR_STS BIT(1) + #define FLAG_IO_FIXED_1V8 BIT(0) #define BOUNDARY_OK(addr, len) \ @@ -206,6 +227,31 @@ /* SMC call for BlueField-3 eMMC RST_N */ #define BLUEFIELD_SMC_SET_EMMC_RST_N 0x82000007 +/* Eswin specific Registers */ +#define EIC7700_CARD_CLK_STABLE BIT(28) +#define EIC7700_INT_BCLK_STABLE BIT(16) +#define EIC7700_INT_ACLK_STABLE BIT(8) +#define EIC7700_INT_TMCLK_STABLE BIT(0) +#define EIC7700_INT_CLK_STABLE (EIC7700_CARD_CLK_STABLE | \ + EIC7700_INT_ACLK_STABLE | \ + EIC7700_INT_BCLK_STABLE | \ + EIC7700_INT_TMCLK_STABLE) +#define EIC7700_HOST_VAL_STABLE BIT(0) + +/* strength definition */ +#define PHYCTRL_DR_33OHM 0xee +#define PHYCTRL_DR_40OHM 0xcc +#define PHYCTRL_DR_50OHM 0x88 +#define PHYCTRL_DR_66OHM 0x44 +#define PHYCTRL_DR_100OHM 0x00 + +#define MAX_PHASE_CODE 0xff +#define TUNING_RANGE_THRESHOLD 40 +#define PHY_CLK_MAX_DELAY_MASK 0x7f +#define PHY_DELAY_CODE_MAX 0x7f +#define PHY_DELAY_CODE_EMMC 0x17 +#define PHY_DELAY_CODE_SD 0x55 + enum dwcmshc_rk_type { DWCMSHC_RK3568, DWCMSHC_RK3588, @@ -217,6 +263,11 @@ struct rk35xx_priv { u8 txclk_tapnum; }; +struct eic7700_priv { + struct reset_control *reset; + unsigned int drive_impedance; +}; + #define DWCMSHC_MAX_OTHER_CLKS 3 struct dwcmshc_priv { @@ -234,10 +285,22 @@ struct dwcmshc_priv { struct dwcmshc_pltfm_data { const struct sdhci_pltfm_data pdata; + const struct cqhci_host_ops *cqhci_host_ops; int (*init)(struct device *dev, struct sdhci_host *host, struct dwcmshc_priv *dwc_priv); void (*postinit)(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv); }; +static void dwcmshc_enable_card_clk(struct sdhci_host *host) +{ + u16 ctrl; + + ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + if ((ctrl & SDHCI_CLOCK_INT_EN) && !(ctrl & SDHCI_CLOCK_CARD_EN)) { + ctrl |= SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); + } +} + static int dwcmshc_get_enable_other_clks(struct device *dev, struct dwcmshc_priv *priv, int num_clks, @@ -574,6 +637,73 @@ static void dwcmshc_cqhci_dumpregs(struct mmc_host *mmc) sdhci_dumpregs(mmc_priv(mmc)); } +static void rk35xx_sdhci_cqe_pre_enable(struct mmc_host *mmc) +{ + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host); + u32 reg; + + /* Set Send Status Command Idle Timer to 10.66us (256 * 1 / 24) */ + reg = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_SSC1); + reg = (reg & ~CQHCI_SSC1_CIT_MASK) | 0x0100; + sdhci_writel(host, reg, dwc_priv->vendor_specific_area2 + CQHCI_SSC1); + + reg = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_CFG); + reg |= CQHCI_ENABLE; + sdhci_writel(host, reg, dwc_priv->vendor_specific_area2 + CQHCI_CFG); +} + +static void rk35xx_sdhci_cqe_enable(struct mmc_host *mmc) +{ + struct sdhci_host *host = mmc_priv(mmc); + u32 reg; + + reg = sdhci_readl(host, SDHCI_PRESENT_STATE); + while (reg & SDHCI_DATA_AVAILABLE) { + sdhci_readl(host, SDHCI_BUFFER); + reg = sdhci_readl(host, SDHCI_PRESENT_STATE); + } + + sdhci_writew(host, DWCMSHC_SDHCI_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE); + + sdhci_cqe_enable(mmc); +} + +static void rk35xx_sdhci_cqe_disable(struct mmc_host *mmc, bool recovery) +{ + struct sdhci_host *host = mmc_priv(mmc); + unsigned long flags; + u32 ctrl; + + /* + * During CQE command transfers, command complete bit gets latched. + * So s/w should clear command complete interrupt status when CQE is + * either halted or disabled. Otherwise unexpected SDCHI legacy + * interrupt gets triggered when CQE is halted/disabled. + */ + spin_lock_irqsave(&host->lock, flags); + ctrl = sdhci_readl(host, SDHCI_INT_ENABLE); + ctrl |= SDHCI_INT_RESPONSE; + sdhci_writel(host, ctrl, SDHCI_INT_ENABLE); + sdhci_writel(host, SDHCI_INT_RESPONSE, SDHCI_INT_STATUS); + spin_unlock_irqrestore(&host->lock, flags); + + sdhci_cqe_disable(mmc, recovery); +} + +static void rk35xx_sdhci_cqe_post_disable(struct mmc_host *mmc) +{ + struct sdhci_host *host = mmc_priv(mmc); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host); + u32 ctrl; + + ctrl = sdhci_readl(host, dwc_priv->vendor_specific_area2 + CQHCI_CFG); + ctrl &= ~CQHCI_ENABLE; + sdhci_writel(host, ctrl, dwc_priv->vendor_specific_area2 + CQHCI_CFG); +} + static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -601,10 +731,11 @@ static void dwcmshc_rk3568_set_clock(struct sdhci_host *host, unsigned int clock sdhci_set_clock(host, clock); - /* Disable cmd conflict check */ + /* Disable cmd conflict check and internal clock gate */ reg = dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3; extra = sdhci_readl(host, reg); extra &= ~BIT(0); + extra |= BIT(4); sdhci_writel(host, extra, reg); if (clock <= 52000000) { @@ -692,6 +823,10 @@ static void rk35xx_sdhci_reset(struct sdhci_host *host, u8 mask) struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host); struct rk35xx_priv *priv = dwc_priv->priv; + u32 extra = sdhci_readl(host, DECMSHC_EMMC_MISC_CON); + + if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL)) + cqhci_deactivate(host->mmc); if (mask & SDHCI_RESET_ALL && priv->reset) { reset_control_assert(priv->reset); @@ -700,6 +835,9 @@ static void rk35xx_sdhci_reset(struct sdhci_host *host, u8 mask) } sdhci_reset(host, mask); + + /* Enable INTERNAL CLOCK */ + sdhci_writel(host, MISC_INTCLK_EN | extra, DECMSHC_EMMC_MISC_CON); } static int dwcmshc_rk35xx_init(struct device *dev, struct sdhci_host *host, @@ -1100,6 +1238,411 @@ static int sg2042_init(struct device *dev, struct sdhci_host *host, ARRAY_SIZE(clk_ids), clk_ids); } +static void sdhci_eic7700_set_clock(struct sdhci_host *host, unsigned int clock) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + u16 clk; + + host->mmc->actual_clock = clock; + + if (clock == 0) { + sdhci_set_clock(host, clock); + return; + } + + clk_set_rate(pltfm_host->clk, clock); + + clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + clk |= SDHCI_CLOCK_INT_EN; + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); + + dwcmshc_enable_card_clk(host); +} + +static void sdhci_eic7700_config_phy_delay(struct sdhci_host *host, int delay) +{ + delay &= PHY_CLK_MAX_DELAY_MASK; + + /* phy clk delay line config */ + sdhci_writeb(host, PHY_SDCLKDL_CNFG_UPDATE, PHY_SDCLKDL_CNFG_R); + sdhci_writeb(host, delay, PHY_SDCLKDL_DC_R); + sdhci_writeb(host, 0x0, PHY_SDCLKDL_CNFG_R); +} + +static void sdhci_eic7700_config_phy(struct sdhci_host *host) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host); + u32 emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO; + struct eic7700_priv *priv = dwc_priv->priv; + unsigned int val, drv; + + drv = FIELD_PREP(PHY_CNFG_PAD_SP_MASK, priv->drive_impedance & 0xF); + drv |= FIELD_PREP(PHY_CNFG_PAD_SN_MASK, (priv->drive_impedance >> 4) & 0xF); + + if ((host->mmc->caps2 & emmc_caps) == emmc_caps) { + val = sdhci_readw(host, dwc_priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL); + val |= DWCMSHC_CARD_IS_EMMC; + sdhci_writew(host, val, dwc_priv->vendor_specific_area1 + DWCMSHC_EMMC_CONTROL); + } + + /* reset phy, config phy's pad */ + sdhci_writel(host, drv | ~PHY_CNFG_RSTN_DEASSERT, PHY_CNFG_R); + + /* configure phy pads */ + val = FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042); + val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042); + val |= FIELD_PREP(PHY_PAD_WEAKPULL_MASK, PHY_PAD_WEAKPULL_PULLUP); + val |= PHY_PAD_RXSEL_1V8; + sdhci_writew(host, val, PHY_CMDPAD_CNFG_R); + sdhci_writew(host, val, PHY_DATAPAD_CNFG_R); + sdhci_writew(host, val, PHY_RSTNPAD_CNFG_R); + + /* Clock PAD Setting */ + val = FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042); + val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042); + sdhci_writew(host, val, PHY_CLKPAD_CNFG_R); + + /* PHY strobe PAD setting (EMMC only) */ + if ((host->mmc->caps2 & emmc_caps) == emmc_caps) { + val = FIELD_PREP(PHY_PAD_TXSLEW_CTRL_P_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042); + val |= FIELD_PREP(PHY_PAD_TXSLEW_CTRL_N_MASK, PHY_PAD_TXSLEW_CTRL_N_SG2042); + val |= PHY_PAD_RXSEL_1V8; + sdhci_writew(host, val, PHY_STBPAD_CNFG_R); + } + usleep_range(2000, 3000); + sdhci_writel(host, drv | PHY_CNFG_RSTN_DEASSERT, PHY_CNFG_R); + sdhci_eic7700_config_phy_delay(host, dwc_priv->delay_line); +} + +static void sdhci_eic7700_reset(struct sdhci_host *host, u8 mask) +{ + sdhci_reset(host, mask); + + /* after reset all, the phy's config will be clear */ + if (mask == SDHCI_RESET_ALL) + sdhci_eic7700_config_phy(host); +} + +static int sdhci_eic7700_reset_init(struct device *dev, struct eic7700_priv *priv) +{ + int ret; + + priv->reset = devm_reset_control_array_get_optional_exclusive(dev); + if (IS_ERR(priv->reset)) { + ret = PTR_ERR(priv->reset); + dev_err(dev, "failed to get reset control %d\n", ret); + return ret; + } + + ret = reset_control_assert(priv->reset); + if (ret) { + dev_err(dev, "Failed to assert reset signals: %d\n", ret); + return ret; + } + usleep_range(2000, 2100); + ret = reset_control_deassert(priv->reset); + if (ret) { + dev_err(dev, "Failed to deassert reset signals: %d\n", ret); + return ret; + } + + return ret; +} + +static unsigned int eic7700_convert_drive_impedance_ohm(struct device *dev, unsigned int dr_ohm) +{ + switch (dr_ohm) { + case 100: + return PHYCTRL_DR_100OHM; + case 66: + return PHYCTRL_DR_66OHM; + case 50: + return PHYCTRL_DR_50OHM; + case 40: + return PHYCTRL_DR_40OHM; + case 33: + return PHYCTRL_DR_33OHM; + } + + dev_warn(dev, "Invalid value %u for drive-impedance-ohms.\n", dr_ohm); + return PHYCTRL_DR_50OHM; +} + +static int sdhci_eic7700_delay_tuning(struct sdhci_host *host, u32 opcode) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *dwc_priv = sdhci_pltfm_priv(pltfm_host); + int delay_min = -1; + int delay_max = -1; + int cmd_error = 0; + int delay = 0; + int i = 0; + int ret; + + for (i = 0; i <= PHY_DELAY_CODE_MAX; i++) { + sdhci_eic7700_config_phy_delay(host, i); + ret = mmc_send_tuning(host->mmc, opcode, &cmd_error); + if (ret) { + host->ops->reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + usleep_range(200, 210); + if (delay_min != -1 && delay_max != -1) + break; + } else { + if (delay_min == -1) { + delay_min = i; + continue; + } else { + delay_max = i; + continue; + } + } + } + if (delay_min == -1 && delay_max == -1) { + pr_err("%s: delay code tuning failed!\n", mmc_hostname(host->mmc)); + sdhci_eic7700_config_phy_delay(host, dwc_priv->delay_line); + return ret; + } + + delay = (delay_min + delay_max) / 2; + sdhci_eic7700_config_phy_delay(host, delay); + + return 0; +} + +static int sdhci_eic7700_phase_code_tuning(struct sdhci_host *host, u32 opcode) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); + u32 sd_caps = MMC_CAP2_NO_MMC | MMC_CAP2_NO_SDIO; + int phase_code = -1; + int code_range = -1; + bool is_sd = false; + int code_min = -1; + int code_max = -1; + int cmd_error = 0; + int ret = 0; + int i = 0; + + if ((host->mmc->caps2 & sd_caps) == sd_caps) + is_sd = true; + + for (i = 0; i <= MAX_PHASE_CODE; i++) { + /* Centered Phase code */ + sdhci_writew(host, i, priv->vendor_specific_area1 + DWCMSHC_AT_STAT); + ret = mmc_send_tuning(host->mmc, opcode, &cmd_error); + host->ops->reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + + if (ret) { + /* SD specific range tracking */ + if (is_sd && code_min != -1 && code_max != -1) { + if (code_max - code_min > code_range) { + code_range = code_max - code_min; + phase_code = (code_min + code_max) / 2; + if (code_range > TUNING_RANGE_THRESHOLD) + break; + } + code_min = -1; + code_max = -1; + } + /* EMMC breaks after first valid range */ + if (!is_sd && code_min != -1 && code_max != -1) + break; + } else { + /* Track valid phase code range */ + if (code_min == -1) { + code_min = i; + if (!is_sd) + continue; + } + code_max = i; + if (is_sd && i == MAX_PHASE_CODE) { + if (code_max - code_min > code_range) { + code_range = code_max - code_min; + phase_code = (code_min + code_max) / 2; + } + } + } + } + + /* Handle tuning failure case */ + if ((is_sd && phase_code == -1) || + (!is_sd && code_min == -1 && code_max == -1)) { + pr_err("%s: phase code tuning failed!\n", mmc_hostname(host->mmc)); + sdhci_writew(host, 0, priv->vendor_specific_area1 + DWCMSHC_AT_STAT); + return -EIO; + } + if (!is_sd) + phase_code = (code_min + code_max) / 2; + + sdhci_writew(host, phase_code, priv->vendor_specific_area1 + DWCMSHC_AT_STAT); + + /* SD specific final verification */ + if (is_sd) { + ret = mmc_send_tuning(host->mmc, opcode, &cmd_error); + host->ops->reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + if (ret) { + pr_err("%s: Final phase code 0x%x verification failed!\n", + mmc_hostname(host->mmc), phase_code); + return ret; + } + } + + return 0; +} + +static int sdhci_eic7700_executing_tuning(struct sdhci_host *host, u32 opcode) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); + u32 emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO; + int ret = 0; + u16 ctrl; + u32 val; + + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + ctrl &= ~SDHCI_CTRL_TUNED_CLK; + sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); + + val = sdhci_readl(host, priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL); + val |= AT_CTRL_SW_TUNE_EN; + sdhci_writew(host, val, priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL); + + sdhci_writew(host, 0, priv->vendor_specific_area1 + DWCMSHC_AT_STAT); + sdhci_writew(host, 0x0, SDHCI_CMD_DATA); + + if ((host->mmc->caps2 & emmc_caps) == emmc_caps) { + ret = sdhci_eic7700_delay_tuning(host, opcode); + if (ret) + return ret; + } + + ret = sdhci_eic7700_phase_code_tuning(host, opcode); + if (ret) + return ret; + + return 0; +} + +static void sdhci_eic7700_set_uhs_signaling(struct sdhci_host *host, unsigned int timing) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct dwcmshc_priv *priv = sdhci_pltfm_priv(pltfm_host); + u8 status; + u32 val; + int ret; + + dwcmshc_set_uhs_signaling(host, timing); + + /* here need make dll locked when in hs400 at 200MHz */ + if (timing == MMC_TIMING_MMC_HS400 && host->clock == 200000000) { + val = sdhci_readl(host, priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL); + val &= ~(FIELD_PREP(AT_CTRL_POST_CHANGE_DLY_MASK, AT_CTRL_POST_CHANGE_DLY)); + /* 2-cycle latency */ + val |= FIELD_PREP(AT_CTRL_POST_CHANGE_DLY_MASK, 0x2); + sdhci_writew(host, val, priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL); + + sdhci_writeb(host, FIELD_PREP(PHY_DLL_CNFG1_SLVDLY_MASK, PHY_DLL_CNFG1_SLVDLY) | + 0x3, PHY_DLL_CNFG1_R);/* DLL wait cycle input */ + /* DLL jump step input */ + sdhci_writeb(host, 0x02, PHY_DLL_CNFG2_R); + sdhci_writeb(host, FIELD_PREP(PHY_DLLDL_CNFG_SLV_INPSEL_MASK, + PHY_DLLDL_CNFG_SLV_INPSEL), PHY_DLLDL_CNFG_R); + /* Sets the value of DLL's offset input */ + sdhci_writeb(host, 0x00, PHY_DLL_OFFST_R); + /* + * Sets the value of DLL's olbt loadval input. Controls the Ibt + * timer's timeout value at which DLL runs a revalidation cycle. + */ + sdhci_writew(host, 0xffff, PHY_DLLBT_CNFG_R); + sdhci_writeb(host, PHY_DLL_CTRL_ENABLE, PHY_DLL_CTRL_R); + usleep_range(100, 110); + + ret = read_poll_timeout(sdhci_readb, status, status & DLL_LOCK_STS, 100, 1000000, + false, host, PHY_DLL_STATUS_R); + if (ret) { + pr_err("%s: DLL lock timeout! status: 0x%x\n", + mmc_hostname(host->mmc), status); + return; + } + + status = sdhci_readb(host, PHY_DLL_STATUS_R); + if (status & DLL_ERROR_STS) { + pr_err("%s: DLL lock failed!err_status:0x%x\n", + mmc_hostname(host->mmc), status); + } + } +} + +static void sdhci_eic7700_set_uhs_wrapper(struct sdhci_host *host, unsigned int timing) +{ + u32 sd_caps = MMC_CAP2_NO_MMC | MMC_CAP2_NO_SDIO; + + if ((host->mmc->caps2 & sd_caps) == sd_caps) + sdhci_set_uhs_signaling(host, timing); + else + sdhci_eic7700_set_uhs_signaling(host, timing); +} + +static int eic7700_init(struct device *dev, struct sdhci_host *host, struct dwcmshc_priv *dwc_priv) +{ + u32 emmc_caps = MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO; + unsigned int val, hsp_int_status, hsp_pwr_ctrl; + struct of_phandle_args args; + struct eic7700_priv *priv; + struct regmap *hsp_regmap; + int ret; + + priv = devm_kzalloc(dev, sizeof(struct eic7700_priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + dwc_priv->priv = priv; + + ret = sdhci_eic7700_reset_init(dev, dwc_priv->priv); + if (ret) { + dev_err(dev, "failed to reset\n"); + return ret; + } + + ret = of_parse_phandle_with_fixed_args(dev->of_node, "eswin,hsp-sp-csr", 2, 0, &args); + if (ret) { + dev_err(dev, "Fail to parse 'eswin,hsp-sp-csr' phandle (%d)\n", ret); + return ret; + } + + hsp_regmap = syscon_node_to_regmap(args.np); + if (IS_ERR(hsp_regmap)) { + dev_err(dev, "Failed to get regmap for 'eswin,hsp-sp-csr'\n"); + of_node_put(args.np); + return PTR_ERR(hsp_regmap); + } + hsp_int_status = args.args[0]; + hsp_pwr_ctrl = args.args[1]; + of_node_put(args.np); + /* + * Assert clock stability: write EIC7700_INT_CLK_STABLE to hsp_int_status. + * This signals to the eMMC controller that platform clocks (card, ACLK, + * BCLK, TMCLK) are enabled and stable. + */ + regmap_write(hsp_regmap, hsp_int_status, EIC7700_INT_CLK_STABLE); + /* + * Assert voltage stability: write EIC7700_HOST_VAL_STABLE to hsp_pwr_ctrl. + * This signals that VDD is stable and permits transition to high-speed + * modes (e.g., UHS-I). + */ + regmap_write(hsp_regmap, hsp_pwr_ctrl, EIC7700_HOST_VAL_STABLE); + + if ((host->mmc->caps2 & emmc_caps) == emmc_caps) + dwc_priv->delay_line = PHY_DELAY_CODE_EMMC; + else + dwc_priv->delay_line = PHY_DELAY_CODE_SD; + + if (!of_property_read_u32(dev->of_node, "eswin,drive-impedance-ohms", &val)) + priv->drive_impedance = eic7700_convert_drive_impedance_ohm(dev, val); + return 0; +} + static const struct sdhci_ops sdhci_dwcmshc_ops = { .set_clock = sdhci_set_clock, .set_bus_width = sdhci_set_bus_width, @@ -1174,6 +1717,18 @@ static const struct sdhci_ops sdhci_dwcmshc_sg2042_ops = { .platform_execute_tuning = th1520_execute_tuning, }; +static const struct sdhci_ops sdhci_dwcmshc_eic7700_ops = { + .set_clock = sdhci_eic7700_set_clock, + .get_max_clock = sdhci_pltfm_clk_get_max_clock, + .get_timeout_clock = sdhci_pltfm_clk_get_max_clock, + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_eic7700_reset, + .set_uhs_signaling = sdhci_eic7700_set_uhs_wrapper, + .set_power = sdhci_set_power_and_bus_voltage, + .irq = dwcmshc_cqe_irq_handler, + .platform_execute_tuning = sdhci_eic7700_executing_tuning, +}; + static const struct dwcmshc_pltfm_data sdhci_dwcmshc_pdata = { .pdata = { .ops = &sdhci_dwcmshc_ops, @@ -1193,6 +1748,15 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_bf3_pdata = { }; #endif +static const struct cqhci_host_ops rk35xx_cqhci_ops = { + .pre_enable = rk35xx_sdhci_cqe_pre_enable, + .enable = rk35xx_sdhci_cqe_enable, + .disable = rk35xx_sdhci_cqe_disable, + .post_disable = rk35xx_sdhci_cqe_post_disable, + .dumpregs = dwcmshc_cqhci_dumpregs, + .set_tran_desc = dwcmshc_set_tran_desc, +}; + static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk35xx_pdata = { .pdata = { .ops = &sdhci_dwcmshc_rk35xx_ops, @@ -1201,6 +1765,7 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk35xx_pdata = { .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, }, + .cqhci_host_ops = &rk35xx_cqhci_ops, .init = dwcmshc_rk35xx_init, .postinit = dwcmshc_rk35xx_postinit, }; @@ -1213,6 +1778,7 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_rk3576_pdata = { .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, }, + .cqhci_host_ops = &rk35xx_cqhci_ops, .init = dwcmshc_rk35xx_init, .postinit = dwcmshc_rk3576_postinit, }; @@ -1243,6 +1809,17 @@ static const struct dwcmshc_pltfm_data sdhci_dwcmshc_sg2042_pdata = { .init = sg2042_init, }; +static const struct dwcmshc_pltfm_data sdhci_dwcmshc_eic7700_pdata = { + .pdata = { + .ops = &sdhci_dwcmshc_eic7700_ops, + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, + .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | + SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN, + }, + .init = eic7700_init, +}; + static const struct cqhci_host_ops dwcmshc_cqhci_ops = { .enable = dwcmshc_sdhci_cqe_enable, .disable = sdhci_cqe_disable, @@ -1250,7 +1827,8 @@ static const struct cqhci_host_ops dwcmshc_cqhci_ops = { .set_tran_desc = dwcmshc_set_tran_desc, }; -static void dwcmshc_cqhci_init(struct sdhci_host *host, struct platform_device *pdev) +static void dwcmshc_cqhci_init(struct sdhci_host *host, struct platform_device *pdev, + const struct dwcmshc_pltfm_data *pltfm_data) { struct cqhci_host *cq_host; struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -1280,7 +1858,10 @@ static void dwcmshc_cqhci_init(struct sdhci_host *host, struct platform_device * } cq_host->mmio = host->ioaddr + priv->vendor_specific_area2; - cq_host->ops = &dwcmshc_cqhci_ops; + if (pltfm_data->cqhci_host_ops) + cq_host->ops = pltfm_data->cqhci_host_ops; + else + cq_host->ops = &dwcmshc_cqhci_ops; /* Enable using of 128-bit task descriptors */ dma64 = host->flags & SDHCI_USE_64_BIT_DMA; @@ -1343,6 +1924,10 @@ static const struct of_device_id sdhci_dwcmshc_dt_ids[] = { .compatible = "sophgo,sg2042-dwcmshc", .data = &sdhci_dwcmshc_sg2042_pdata, }, + { + .compatible = "eswin,eic7700-dwcmshc", + .data = &sdhci_dwcmshc_eic7700_pdata, + }, {}, }; MODULE_DEVICE_TABLE(of, sdhci_dwcmshc_dt_ids); @@ -1448,7 +2033,7 @@ static int dwcmshc_probe(struct platform_device *pdev) priv->vendor_specific_area2 = sdhci_readw(host, DWCMSHC_P_VENDOR_AREA2); - dwcmshc_cqhci_init(host, pdev); + dwcmshc_cqhci_init(host, pdev, pltfm_data); } if (pltfm_data->postinit) @@ -1575,17 +2160,6 @@ disable_clk: return ret; } -static void dwcmshc_enable_card_clk(struct sdhci_host *host) -{ - u16 ctrl; - - ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); - if ((ctrl & SDHCI_CLOCK_INT_EN) && !(ctrl & SDHCI_CLOCK_CARD_EN)) { - ctrl |= SDHCI_CLOCK_CARD_EN; - sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); - } -} - static int dwcmshc_runtime_suspend(struct device *dev) { struct sdhci_host *host = dev_get_drvdata(dev); diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index c8cdb1c0722e..b9de03325c58 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -209,10 +209,8 @@ void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i); void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i); irqreturn_t tmio_mmc_irq(int irq, void *devid); -#ifdef CONFIG_PM int tmio_mmc_host_runtime_suspend(struct device *dev); int tmio_mmc_host_runtime_resume(struct device *dev); -#endif static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) { diff --git a/drivers/of/address.c b/drivers/of/address.c index f0f8f0dd191c..4034d798c55a 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -328,10 +328,6 @@ static int of_bus_default_flags_match(struct device_node *np) static int of_bus_default_match(struct device_node *np) { - /* - * Check for presence first since of_bus_n_addr_cells() will warn when - * walking parent nodes. - */ return of_property_present(np, "#address-cells"); } diff --git a/drivers/of/base.c b/drivers/of/base.c index 7043acd971a0..0b65039ece53 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -434,6 +434,53 @@ bool of_machine_compatible_match(const char *const *compats) } EXPORT_SYMBOL(of_machine_compatible_match); +/** + * of_machine_device_match - Test root of device tree against a of_device_id array + * @matches: NULL terminated array of of_device_id match structures to search in + * + * Returns true if the root node has any of the given compatible values in its + * compatible property. + */ +bool of_machine_device_match(const struct of_device_id *matches) +{ + struct device_node *root; + const struct of_device_id *match = NULL; + + root = of_find_node_by_path("/"); + if (root) { + match = of_match_node(matches, root); + of_node_put(root); + } + + return match != NULL; +} +EXPORT_SYMBOL(of_machine_device_match); + +/** + * of_machine_get_match_data - Tell if root of device tree has a matching of_match structure + * @matches: NULL terminated array of of_device_id match structures to search in + * + * Returns data associated with matched entry or NULL + */ +const void *of_machine_get_match_data(const struct of_device_id *matches) +{ + const struct of_device_id *match; + struct device_node *root; + + root = of_find_node_by_path("/"); + if (!root) + return NULL; + + match = of_match_node(matches, root); + of_node_put(root); + + if (!match) + return NULL; + + return match->data; +} +EXPORT_SYMBOL(of_machine_get_match_data); + static bool __of_device_is_status(const struct device_node *device, const char * const*strings) { diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index 0edd639898a6..d378d4b4109f 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -625,6 +625,47 @@ const void *__init of_get_flat_dt_prop(unsigned long node, const char *name, return fdt_getprop(initial_boot_params, node, name, size); } +const __be32 *__init of_flat_dt_get_addr_size_prop(unsigned long node, + const char *name, + int *entries) +{ + const __be32 *prop; + int len, elen = (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32); + + prop = of_get_flat_dt_prop(node, name, &len); + if (!prop || len % elen) { + *entries = 0; + return NULL; + } + + *entries = len / elen; + return prop; +} + +bool __init of_flat_dt_get_addr_size(unsigned long node, const char *name, + u64 *addr, u64 *size) +{ + const __be32 *prop; + int entries; + + prop = of_flat_dt_get_addr_size_prop(node, name, &entries); + if (!prop || entries != 1) + return false; + + of_flat_dt_read_addr_size(prop, 0, addr, size); + return true; +} + +void __init of_flat_dt_read_addr_size(const __be32 *prop, int entry_index, + u64 *addr, u64 *size) +{ + int entry_cells = dt_root_addr_cells + dt_root_size_cells; + prop += entry_cells * entry_index; + + *addr = dt_mem_next_cell(dt_root_addr_cells, &prop); + *size = dt_mem_next_cell(dt_root_size_cells, &prop); +} + /** * of_fdt_is_compatible - Return true if given node from the given blob has * compat in its compatible list @@ -812,21 +853,15 @@ static void __init early_init_dt_check_for_initrd(unsigned long node) */ static void __init early_init_dt_check_for_elfcorehdr(unsigned long node) { - const __be32 *prop; - int len; - if (!IS_ENABLED(CONFIG_CRASH_DUMP)) return; pr_debug("Looking for elfcorehdr property... "); - prop = of_get_flat_dt_prop(node, "linux,elfcorehdr", &len); - if (!prop || (len < (dt_root_addr_cells + dt_root_size_cells))) + if (!of_flat_dt_get_addr_size(node, "linux,elfcorehdr", + &elfcorehdr_addr, &elfcorehdr_size)) return; - elfcorehdr_addr = dt_mem_next_cell(dt_root_addr_cells, &prop); - elfcorehdr_size = dt_mem_next_cell(dt_root_size_cells, &prop); - pr_debug("elfcorehdr_start=0x%llx elfcorehdr_size=0x%llx\n", elfcorehdr_addr, elfcorehdr_size); } @@ -849,8 +884,9 @@ static unsigned long chosen_node_offset = -FDT_ERR_NOTFOUND; void __init early_init_dt_check_for_usable_mem_range(void) { struct memblock_region rgn[MAX_USABLE_RANGES] = {0}; - const __be32 *prop, *endp; + const __be32 *prop; int len, i; + u64 base, size; unsigned long node = chosen_node_offset; if ((long)node < 0) @@ -858,14 +894,17 @@ void __init early_init_dt_check_for_usable_mem_range(void) pr_debug("Looking for usable-memory-range property... "); - prop = of_get_flat_dt_prop(node, "linux,usable-memory-range", &len); - if (!prop || (len % (dt_root_addr_cells + dt_root_size_cells))) + prop = of_flat_dt_get_addr_size_prop(node, "linux,usable-memory-range", + &len); + if (!prop) return; - endp = prop + (len / sizeof(__be32)); - for (i = 0; i < MAX_USABLE_RANGES && prop < endp; i++) { - rgn[i].base = dt_mem_next_cell(dt_root_addr_cells, &prop); - rgn[i].size = dt_mem_next_cell(dt_root_size_cells, &prop); + len = min(len, MAX_USABLE_RANGES); + + for (i = 0; i < len; i++) { + of_flat_dt_read_addr_size(prop, i, &base, &size); + rgn[i].base = base; + rgn[i].size = size; pr_debug("cap_mem_regions[%d]: base=%pa, size=%pa\n", i, &rgn[i].base, &rgn[i].size); @@ -883,26 +922,18 @@ static void __init early_init_dt_check_kho(void) { unsigned long node = chosen_node_offset; u64 fdt_start, fdt_size, scratch_start, scratch_size; - const __be32 *p; - int l; if (!IS_ENABLED(CONFIG_KEXEC_HANDOVER) || (long)node < 0) return; - p = of_get_flat_dt_prop(node, "linux,kho-fdt", &l); - if (l != (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32)) + if (!of_flat_dt_get_addr_size(node, "linux,kho-fdt", + &fdt_start, &fdt_size)) return; - fdt_start = dt_mem_next_cell(dt_root_addr_cells, &p); - fdt_size = dt_mem_next_cell(dt_root_addr_cells, &p); - - p = of_get_flat_dt_prop(node, "linux,kho-scratch", &l); - if (l != (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32)) + if (!of_flat_dt_get_addr_size(node, "linux,kho-scratch", + &scratch_start, &scratch_size)) return; - scratch_start = dt_mem_next_cell(dt_root_addr_cells, &p); - scratch_size = dt_mem_next_cell(dt_root_addr_cells, &p); - kho_populate(fdt_start, fdt_size, scratch_start, scratch_size); } @@ -1002,8 +1033,8 @@ int __init early_init_dt_scan_memory(void) fdt_for_each_subnode(node, fdt, 0) { const char *type = of_get_flat_dt_prop(node, "device_type", NULL); - const __be32 *reg, *endp; - int l; + const __be32 *reg; + int i, l; bool hotpluggable; /* We are scanning "memory" nodes only */ @@ -1013,23 +1044,21 @@ int __init early_init_dt_scan_memory(void) if (!of_fdt_device_is_available(fdt, node)) continue; - reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l); + reg = of_flat_dt_get_addr_size_prop(node, "linux,usable-memory", &l); if (reg == NULL) - reg = of_get_flat_dt_prop(node, "reg", &l); + reg = of_flat_dt_get_addr_size_prop(node, "reg", &l); if (reg == NULL) continue; - endp = reg + (l / sizeof(__be32)); hotpluggable = of_get_flat_dt_prop(node, "hotpluggable", NULL); - pr_debug("memory scan node %s, reg size %d,\n", + pr_debug("memory scan node %s, reg {addr,size} entries %d,\n", fdt_get_name(fdt, node, NULL), l); - while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) { + for (i = 0; i < l; i++) { u64 base, size; - base = dt_mem_next_cell(dt_root_addr_cells, ®); - size = dt_mem_next_cell(dt_root_size_cells, ®); + of_flat_dt_read_addr_size(reg, i, &base, &size); if (size == 0) continue; diff --git a/drivers/of/irq.c b/drivers/of/irq.c index b174ec296489..e3816819dbfe 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -613,8 +613,10 @@ void __init of_irq_init(const struct of_device_id *matches) * are the same distance away from the root irq controller. */ desc->interrupt_parent = of_parse_phandle(np, "interrupts-extended", 0); - if (!desc->interrupt_parent) + if (!desc->interrupt_parent && of_property_present(np, "interrupts")) desc->interrupt_parent = of_irq_find_parent(np); + else if (!desc->interrupt_parent) + desc->interrupt_parent = of_parse_phandle(np, "interrupt-parent", 0); if (desc->interrupt_parent == np) { of_node_put(desc->interrupt_parent); desc->interrupt_parent = NULL; diff --git a/drivers/of/of_kunit_helpers.c b/drivers/of/of_kunit_helpers.c index 7b3ed5a382aa..f6ed1af8b62a 100644 --- a/drivers/of/of_kunit_helpers.c +++ b/drivers/of/of_kunit_helpers.c @@ -18,8 +18,9 @@ */ void of_root_kunit_skip(struct kunit *test) { - if (IS_ENABLED(CONFIG_ARM64) && IS_ENABLED(CONFIG_ACPI) && !of_root) - kunit_skip(test, "arm64+acpi doesn't populate a root node"); + if ((IS_ENABLED(CONFIG_ARM64) || IS_ENABLED(CONFIG_RISCV)) && + IS_ENABLED(CONFIG_ACPI) && !of_root) + kunit_skip(test, "arm64/riscv+acpi doesn't populate a root node"); } EXPORT_SYMBOL_GPL(of_root_kunit_skip); diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c index 2e9ea751ed2d..5619ec917858 100644 --- a/drivers/of/of_reserved_mem.c +++ b/drivers/of/of_reserved_mem.c @@ -154,27 +154,24 @@ static int __init early_init_dt_reserve_memory(phys_addr_t base, static int __init __reserved_mem_reserve_reg(unsigned long node, const char *uname) { - int t_len = (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32); phys_addr_t base, size; - int len; + int i, len; const __be32 *prop; bool nomap; - prop = of_get_flat_dt_prop(node, "reg", &len); + prop = of_flat_dt_get_addr_size_prop(node, "reg", &len); if (!prop) return -ENOENT; - if (len && len % t_len != 0) { - pr_err("Reserved memory: invalid reg property in '%s', skipping node.\n", - uname); - return -EINVAL; - } - nomap = of_get_flat_dt_prop(node, "no-map", NULL) != NULL; - while (len >= t_len) { - base = dt_mem_next_cell(dt_root_addr_cells, &prop); - size = dt_mem_next_cell(dt_root_size_cells, &prop); + for (i = 0; i < len; i++) { + u64 b, s; + + of_flat_dt_read_addr_size(prop, i, &b, &s); + + base = b; + size = s; if (size && early_init_dt_reserve_memory(base, size, nomap) == 0) { /* Architecture specific contiguous memory fixup. */ @@ -187,8 +184,6 @@ static int __init __reserved_mem_reserve_reg(unsigned long node, pr_err("Reserved memory: failed to reserve memory for node '%s': base %pa, size %lu MiB\n", uname, &base, (unsigned long)(size / SZ_1M)); } - - len -= t_len; } return 0; } @@ -230,12 +225,9 @@ static void __init __rmem_check_for_overlap(void); */ void __init fdt_scan_reserved_mem_reg_nodes(void) { - int t_len = (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32); const void *fdt = initial_boot_params; phys_addr_t base, size; - const __be32 *prop; int node, child; - int len; if (!fdt) return; @@ -256,29 +248,21 @@ void __init fdt_scan_reserved_mem_reg_nodes(void) fdt_for_each_subnode(child, fdt, node) { const char *uname; + u64 b, s; - prop = of_get_flat_dt_prop(child, "reg", &len); - if (!prop) - continue; if (!of_fdt_device_is_available(fdt, child)) continue; - uname = fdt_get_name(fdt, child, NULL); - if (len && len % t_len != 0) { - pr_err("Reserved memory: invalid reg property in '%s', skipping node.\n", - uname); + if (!of_flat_dt_get_addr_size(child, "reg", &b, &s)) continue; - } - if (len > t_len) - pr_warn("%s() ignores %d regions in node '%s'\n", - __func__, len / t_len - 1, uname); + base = b; + size = s; - base = dt_mem_next_cell(dt_root_addr_cells, &prop); - size = dt_mem_next_cell(dt_root_size_cells, &prop); - - if (size) + if (size) { + uname = fdt_get_name(fdt, child, NULL); fdt_reserved_mem_save_node(child, uname, base, size); + } } /* check for overlapping reserved regions */ @@ -401,10 +385,9 @@ static int __init __reserved_mem_alloc_in_range(phys_addr_t size, */ static int __init __reserved_mem_alloc_size(unsigned long node, const char *uname) { - int t_len = (dt_root_addr_cells + dt_root_size_cells) * sizeof(__be32); phys_addr_t start = 0, end = 0; phys_addr_t base = 0, align = 0, size; - int len; + int i, len; const __be32 *prop; bool nomap; int ret; @@ -438,19 +421,15 @@ static int __init __reserved_mem_alloc_size(unsigned long node, const char *unam && !nomap) align = max_t(phys_addr_t, align, CMA_MIN_ALIGNMENT_BYTES); - prop = of_get_flat_dt_prop(node, "alloc-ranges", &len); + prop = of_flat_dt_get_addr_size_prop(node, "alloc-ranges", &len); if (prop) { + for (i = 0; i < len; i++) { + u64 b, s; - if (len % t_len != 0) { - pr_err("invalid alloc-ranges property in '%s', skipping node.\n", - uname); - return -EINVAL; - } + of_flat_dt_read_addr_size(prop, i, &b, &s); - while (len > 0) { - start = dt_mem_next_cell(dt_root_addr_cells, &prop); - end = start + dt_mem_next_cell(dt_root_size_cells, - &prop); + start = b; + end = b + s; base = 0; ret = __reserved_mem_alloc_in_range(size, align, @@ -461,9 +440,7 @@ static int __init __reserved_mem_alloc_size(unsigned long node, const char *unam (unsigned long)(size / SZ_1M)); break; } - len -= t_len; } - } else { ret = early_init_dt_alloc_reserved_memory_arch(size, align, 0, 0, nomap, &base); diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c index 255e8362f600..5b4f42230e6c 100644 --- a/drivers/of/overlay.c +++ b/drivers/of/overlay.c @@ -1190,6 +1190,9 @@ int of_overlay_remove(int *ovcs_id) struct overlay_changeset *ovcs; int ret, ret_apply, ret_tmp; + if (*ovcs_id == 0) + return 0; + if (devicetree_corrupt()) { pr_err("suspect devicetree state, refuse to remove overlay\n"); ret = -EBUSY; diff --git a/drivers/platform/surface/surface_aggregator_registry.c b/drivers/platform/surface/surface_aggregator_registry.c index a594d5fcfcfd..78ac3a8fbb73 100644 --- a/drivers/platform/surface/surface_aggregator_registry.c +++ b/drivers/platform/surface/surface_aggregator_registry.c @@ -491,24 +491,13 @@ static const struct of_device_id ssam_platform_hub_of_match[] __maybe_unused = { static int ssam_platform_hub_probe(struct platform_device *pdev) { const struct software_node **nodes; - const struct of_device_id *match; - struct device_node *fdt_root; struct ssam_controller *ctrl; struct fwnode_handle *root; int status; nodes = (const struct software_node **)acpi_device_get_match_data(&pdev->dev); if (!nodes) { - fdt_root = of_find_node_by_path("/"); - if (!fdt_root) - return -ENODEV; - - match = of_match_node(ssam_platform_hub_of_match, fdt_root); - of_node_put(fdt_root); - if (!match) - return -ENODEV; - - nodes = (const struct software_node **)match->data; + nodes = (const struct software_node **)of_machine_get_match_data(ssam_platform_hub_of_match); if (!nodes) return -ENODEV; } diff --git a/drivers/platform/x86/intel/Kconfig b/drivers/platform/x86/intel/Kconfig index 19a2246f2770..2900407d6095 100644 --- a/drivers/platform/x86/intel/Kconfig +++ b/drivers/platform/x86/intel/Kconfig @@ -41,6 +41,19 @@ config INTEL_VBTN To compile this driver as a module, choose M here: the module will be called intel_vbtn. +config INTEL_EHL_PSE_IO + tristate "Intel Elkhart Lake PSE I/O driver" + depends on PCI + select AUXILIARY_BUS + help + Select this option to enable Intel Elkhart Lake PSE GPIO and Timed + I/O support. This driver enumerates the PCI parent device and + creates auxiliary child devices for these capabilities. The actual + functionalities are provided by their respective auxiliary drivers. + + To compile this driver as a module, choose M here: the module will + be called intel_ehl_pse_io. + config INTEL_INT0002_VGPIO tristate "Intel ACPI INT0002 Virtual GPIO driver" depends on GPIOLIB && ACPI && PM_SLEEP diff --git a/drivers/platform/x86/intel/Makefile b/drivers/platform/x86/intel/Makefile index 78acb414e154..138b13756158 100644 --- a/drivers/platform/x86/intel/Makefile +++ b/drivers/platform/x86/intel/Makefile @@ -21,6 +21,7 @@ intel-target-$(CONFIG_INTEL_HID_EVENT) += hid.o intel-target-$(CONFIG_INTEL_VBTN) += vbtn.o # Intel miscellaneous drivers +intel-target-$(CONFIG_INTEL_EHL_PSE_IO) += ehl_pse_io.o intel-target-$(CONFIG_INTEL_INT0002_VGPIO) += int0002_vgpio.o intel-target-$(CONFIG_INTEL_ISHTP_ECLITE) += ishtp_eclite.o intel-target-$(CONFIG_INTEL_OAKTRAIL) += oaktrail.o diff --git a/drivers/platform/x86/intel/chtwc_int33fe.c b/drivers/platform/x86/intel/chtwc_int33fe.c index 29e8b5432f4c..d183aa53c318 100644 --- a/drivers/platform/x86/intel/chtwc_int33fe.c +++ b/drivers/platform/x86/intel/chtwc_int33fe.c @@ -77,7 +77,7 @@ static const struct software_node max17047_node = { * software node. */ static struct software_node_ref_args fusb302_mux_refs[] = { - { .node = NULL }, + SOFTWARE_NODE_REFERENCE(NULL), }; static const struct property_entry fusb302_properties[] = { @@ -190,11 +190,6 @@ static void cht_int33fe_remove_nodes(struct cht_int33fe_data *data) { software_node_unregister_node_group(node_group); - if (fusb302_mux_refs[0].node) { - fwnode_handle_put(software_node_fwnode(fusb302_mux_refs[0].node)); - fusb302_mux_refs[0].node = NULL; - } - if (data->dp) { data->dp->secondary = NULL; fwnode_handle_put(data->dp); @@ -202,7 +197,15 @@ static void cht_int33fe_remove_nodes(struct cht_int33fe_data *data) } } -static int cht_int33fe_add_nodes(struct cht_int33fe_data *data) +static void cht_int33fe_put_swnode(void *data) +{ + struct fwnode_handle *fwnode = data; + + fwnode_handle_put(fwnode); + fusb302_mux_refs[0] = SOFTWARE_NODE_REFERENCE(NULL); +} + +static int cht_int33fe_add_nodes(struct device *dev, struct cht_int33fe_data *data) { const struct software_node *mux_ref_node; int ret; @@ -212,17 +215,25 @@ static int cht_int33fe_add_nodes(struct cht_int33fe_data *data) * until the mux driver has created software node for the mux device. * It means we depend on the mux driver. This function will return * -EPROBE_DEFER until the mux device is registered. + * + * FIXME: the relevant software node exists in intel-xhci-usb-role-switch + * and - if exported - could be used to set up a static reference. */ mux_ref_node = software_node_find_by_name(NULL, "intel-xhci-usb-sw"); if (!mux_ref_node) return -EPROBE_DEFER; + ret = devm_add_action_or_reset(dev, cht_int33fe_put_swnode, + software_node_fwnode(mux_ref_node)); + if (ret) + return ret; + /* * Update node used in "usb-role-switch" property. Note that we * rely on software_node_register_node_group() to use the original * instance of properties instead of copying them. */ - fusb302_mux_refs[0].node = mux_ref_node; + fusb302_mux_refs[0] = SOFTWARE_NODE_REFERENCE(mux_ref_node); ret = software_node_register_node_group(node_group); if (ret) @@ -345,7 +356,7 @@ static int cht_int33fe_typec_probe(struct platform_device *pdev) return fusb302_irq; } - ret = cht_int33fe_add_nodes(data); + ret = cht_int33fe_add_nodes(dev, data); if (ret) return ret; diff --git a/drivers/platform/x86/intel/ehl_pse_io.c b/drivers/platform/x86/intel/ehl_pse_io.c new file mode 100644 index 000000000000..861e14808b35 --- /dev/null +++ b/drivers/platform/x86/intel/ehl_pse_io.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Intel Elkhart Lake Programmable Service Engine (PSE) I/O + * + * Copyright (c) 2025 Intel Corporation. + * + * Author: Raag Jadav <raag.jadav@intel.com> + */ + +#include <linux/auxiliary_bus.h> +#include <linux/device/devres.h> +#include <linux/errno.h> +#include <linux/gfp_types.h> +#include <linux/ioport.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/sizes.h> +#include <linux/types.h> + +#include <linux/ehl_pse_io_aux.h> + +#define EHL_PSE_IO_DEV_SIZE SZ_4K + +static int ehl_pse_io_dev_create(struct pci_dev *pci, const char *name, int idx) +{ + struct device *dev = &pci->dev; + struct auxiliary_device *adev; + struct ehl_pse_io_data *data; + resource_size_t start, offset; + u32 id; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + id = (pci_domain_nr(pci->bus) << 16) | pci_dev_id(pci); + start = pci_resource_start(pci, 0); + offset = EHL_PSE_IO_DEV_SIZE * idx; + + data->mem = DEFINE_RES_MEM(start + offset, EHL_PSE_IO_DEV_SIZE); + data->irq = pci_irq_vector(pci, idx); + + adev = __devm_auxiliary_device_create(dev, EHL_PSE_IO_NAME, name, data, id); + + return adev ? 0 : -ENODEV; +} + +static int ehl_pse_io_probe(struct pci_dev *pci, const struct pci_device_id *id) +{ + int ret; + + ret = pcim_enable_device(pci); + if (ret) + return ret; + + pci_set_master(pci); + + ret = pci_alloc_irq_vectors(pci, 2, 2, PCI_IRQ_MSI); + if (ret < 0) + return ret; + + ret = ehl_pse_io_dev_create(pci, EHL_PSE_GPIO_NAME, 0); + if (ret) + return ret; + + return ehl_pse_io_dev_create(pci, EHL_PSE_TIO_NAME, 1); +} + +static const struct pci_device_id ehl_pse_io_ids[] = { + { PCI_VDEVICE(INTEL, 0x4b88) }, + { PCI_VDEVICE(INTEL, 0x4b89) }, + { } +}; +MODULE_DEVICE_TABLE(pci, ehl_pse_io_ids); + +static struct pci_driver ehl_pse_io_driver = { + .name = EHL_PSE_IO_NAME, + .id_table = ehl_pse_io_ids, + .probe = ehl_pse_io_probe, +}; +module_pci_driver(ehl_pse_io_driver); + +MODULE_AUTHOR("Raag Jadav <raag.jadav@intel.com>"); +MODULE_DESCRIPTION("Intel Elkhart Lake PSE I/O driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/pmdomain/bcm/bcm2835-power.c b/drivers/pmdomain/bcm/bcm2835-power.c index f5289fd184d0..1d29addfe036 100644 --- a/drivers/pmdomain/bcm/bcm2835-power.c +++ b/drivers/pmdomain/bcm/bcm2835-power.c @@ -79,6 +79,7 @@ #define PM_IMAGE 0x108 #define PM_GRAFX 0x10c #define PM_PROC 0x110 +#define PM_GRAFX_2712 0x304 #define PM_ENAB BIT(12) #define PM_ISPRSTN BIT(8) #define PM_H264RSTN BIT(7) @@ -381,6 +382,9 @@ static int bcm2835_power_pd_power_on(struct generic_pm_domain *domain) return bcm2835_power_power_on(pd, PM_GRAFX); case BCM2835_POWER_DOMAIN_GRAFX_V3D: + if (!power->asb) + return bcm2835_asb_power_on(pd, PM_GRAFX_2712, + 0, 0, PM_V3DRSTN); return bcm2835_asb_power_on(pd, PM_GRAFX, ASB_V3D_M_CTRL, ASB_V3D_S_CTRL, PM_V3DRSTN); @@ -447,6 +451,9 @@ static int bcm2835_power_pd_power_off(struct generic_pm_domain *domain) return bcm2835_power_power_off(pd, PM_GRAFX); case BCM2835_POWER_DOMAIN_GRAFX_V3D: + if (!power->asb) + return bcm2835_asb_power_off(pd, PM_GRAFX_2712, + 0, 0, PM_V3DRSTN); return bcm2835_asb_power_off(pd, PM_GRAFX, ASB_V3D_M_CTRL, ASB_V3D_S_CTRL, PM_V3DRSTN); @@ -635,10 +642,12 @@ static int bcm2835_power_probe(struct platform_device *pdev) power->asb = pm->asb; power->rpivid_asb = pm->rpivid_asb; - id = readl(power->asb + ASB_AXI_BRDG_ID); - if (id != BCM2835_BRDG_ID /* "BRDG" */) { - dev_err(dev, "ASB register ID returned 0x%08x\n", id); - return -ENODEV; + if (power->asb) { + id = readl(power->asb + ASB_AXI_BRDG_ID); + if (id != BCM2835_BRDG_ID /* "BRDG" */) { + dev_err(dev, "ASB register ID returned 0x%08x\n", id); + return -ENODEV; + } } if (power->rpivid_asb) { diff --git a/drivers/pmdomain/core.c b/drivers/pmdomain/core.c index 4fd546ef0448..bf82775f6a67 100644 --- a/drivers/pmdomain/core.c +++ b/drivers/pmdomain/core.c @@ -1551,7 +1551,8 @@ static int genpd_finish_suspend(struct device *dev, if (ret) return ret; - if (device_awake_path(dev) && genpd_is_active_wakeup(genpd)) + if (device_awake_path(dev) && genpd_is_active_wakeup(genpd) && + !device_out_band_wakeup(dev)) return 0; if (genpd->dev_ops.stop && genpd->dev_ops.start && @@ -1606,7 +1607,8 @@ static int genpd_finish_resume(struct device *dev, if (IS_ERR(genpd)) return -EINVAL; - if (device_awake_path(dev) && genpd_is_active_wakeup(genpd)) + if (device_awake_path(dev) && genpd_is_active_wakeup(genpd) && + !device_out_band_wakeup(dev)) return resume_noirq(dev); genpd_lock(genpd); diff --git a/drivers/pmdomain/governor.c b/drivers/pmdomain/governor.c index 05e68680f34b..96737abbb496 100644 --- a/drivers/pmdomain/governor.c +++ b/drivers/pmdomain/governor.c @@ -408,15 +408,21 @@ static bool cpu_power_down_ok(struct dev_pm_domain *pd) if ((idle_duration_ns >= (genpd->states[i].residency_ns + genpd->states[i].power_off_latency_ns)) && (global_constraint >= (genpd->states[i].power_on_latency_ns + - genpd->states[i].power_off_latency_ns))) { - genpd->state_idx = i; - genpd->gd->last_enter = now; - genpd->gd->reflect_residency = true; - return true; - } + genpd->states[i].power_off_latency_ns))) + break; + } while (--i >= 0); - return false; + if (i < 0) + return false; + + if (cpus_peek_for_pending_ipi(genpd->cpus)) + return false; + + genpd->state_idx = i; + genpd->gd->last_enter = now; + genpd->gd->reflect_residency = true; + return true; } static bool cpu_system_power_down_ok(struct dev_pm_domain *pd) diff --git a/drivers/pmdomain/mediatek/Kconfig b/drivers/pmdomain/mediatek/Kconfig index 0e34a517ab7d..8923e6516441 100644 --- a/drivers/pmdomain/mediatek/Kconfig +++ b/drivers/pmdomain/mediatek/Kconfig @@ -26,6 +26,23 @@ config MTK_SCPSYS_PM_DOMAINS Control Processor System (SCPSYS) has several power management related tasks in the system. +config MTK_MFG_PM_DOMAIN + bool "MediaTek MFlexGraphics power domain" + default ARCH_MEDIATEK + depends on PM + depends on OF + depends on COMMON_CLK + select MAILBOX + select PM_GENERIC_DOMAINS + imply MTK_GPUEB_MBOX + help + Say y or m here to enable the power domains driver for MediaTek + MFlexGraphics. This driver allows for power and frequency control of + GPUs on MediaTek SoCs such as the MT8196 or MT6991. + + This driver is required for the Mali GPU to work at all on MT8196 and + MT6991. + config AIROHA_CPU_PM_DOMAIN tristate "Airoha CPU power domain" default ARCH_AIROHA diff --git a/drivers/pmdomain/mediatek/Makefile b/drivers/pmdomain/mediatek/Makefile index 18ba92e3c418..b424f1ed8676 100644 --- a/drivers/pmdomain/mediatek/Makefile +++ b/drivers/pmdomain/mediatek/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_MTK_MFG_PM_DOMAIN) += mtk-mfg-pmdomain.o obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o obj-$(CONFIG_MTK_SCPSYS_PM_DOMAINS) += mtk-pm-domains.o obj-$(CONFIG_AIROHA_CPU_PM_DOMAIN) += airoha-cpu-pmdomain.o diff --git a/drivers/pmdomain/mediatek/mt8196-pm-domains.h b/drivers/pmdomain/mediatek/mt8196-pm-domains.h new file mode 100644 index 000000000000..2e4b28720659 --- /dev/null +++ b/drivers/pmdomain/mediatek/mt8196-pm-domains.h @@ -0,0 +1,625 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2025 Collabora Ltd + * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + */ + +#ifndef __SOC_MEDIATEK_MT8196_PM_DOMAINS_H +#define __SOC_MEDIATEK_MT8196_PM_DOMAINS_H + +#include "mtk-pm-domains.h" +#include <dt-bindings/power/mediatek,mt8196-power.h> + +/* + * MT8196 and MT6991 power domain support + */ + +/* INFRA TOP_AXI registers */ +#define MT8196_TOP_AXI_PROT_EN_SET 0x4 +#define MT8196_TOP_AXI_PROT_EN_CLR 0x8 +#define MT8196_TOP_AXI_PROT_EN_STA 0xc + #define MT8196_TOP_AXI_PROT_EN_SLEEP0_MD BIT(29) + +#define MT8196_TOP_AXI_PROT_EN_1_SET 0x24 +#define MT8196_TOP_AXI_PROT_EN_1_CLR 0x28 +#define MT8196_TOP_AXI_PROT_EN_1_STA 0x2c + #define MT8196_TOP_AXI_PROT_EN_1_SLEEP1_MD BIT(0) + +/* SPM BUS_PROTECT registers */ +#define MT8196_SPM_BUS_PROTECT_CON_SET 0xdc +#define MT8196_SPM_BUS_PROTECT_CON_CLR 0xe0 +#define MT8196_SPM_BUS_PROTECT_RDY 0x208 + #define MT8196_SPM_PROT_EN_BUS_CONN BIT(1) + #define MT8196_SPM_PROT_EN_BUS_SSUSB_DP_PHY_P0 BIT(6) + #define MT8196_SPM_PROT_EN_BUS_SSUSB_P0 BIT(7) + #define MT8196_SPM_PROT_EN_BUS_SSUSB_P1 BIT(8) + #define MT8196_SPM_PROT_EN_BUS_SSUSB_P23 BIT(9) + #define MT8196_SPM_PROT_EN_BUS_SSUSB_PHY_P2 BIT(10) + #define MT8196_SPM_PROT_EN_BUS_PEXTP_MAC0 BIT(13) + #define MT8196_SPM_PROT_EN_BUS_PEXTP_MAC1 BIT(14) + #define MT8196_SPM_PROT_EN_BUS_PEXTP_MAC2 BIT(15) + #define MT8196_SPM_PROT_EN_BUS_PEXTP_PHY0 BIT(16) + #define MT8196_SPM_PROT_EN_BUS_PEXTP_PHY1 BIT(17) + #define MT8196_SPM_PROT_EN_BUS_PEXTP_PHY2 BIT(18) + #define MT8196_SPM_PROT_EN_BUS_AUDIO BIT(19) + #define MT8196_SPM_PROT_EN_BUS_ADSP_TOP BIT(21) + #define MT8196_SPM_PROT_EN_BUS_ADSP_INFRA BIT(22) + #define MT8196_SPM_PROT_EN_BUS_ADSP_AO BIT(23) + #define MT8196_SPM_PROT_EN_BUS_MM_PROC BIT(24) + +/* PWR_CON registers */ +#define MT8196_PWR_ACK BIT(30) +#define MT8196_PWR_ACK_2ND BIT(31) + +static enum scpsys_bus_prot_block scpsys_bus_prot_blocks_mt8196[] = { + BUS_PROT_BLOCK_INFRA, BUS_PROT_BLOCK_SPM +}; + +static const struct scpsys_domain_data scpsys_domain_data_mt8196[] = { + [MT8196_POWER_DOMAIN_MD] = { + .name = "md", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe00, + .pwr_sta_offs = 0xe00, + .pwr_sta2nd_offs = 0xe00, + .ext_buck_iso_offs = 0xefc, + .ext_buck_iso_mask = GENMASK(1, 0), + .bp_cfg = { + BUS_PROT_WR_IGN(INFRA, MT8196_TOP_AXI_PROT_EN_SLEEP0_MD, + MT8196_TOP_AXI_PROT_EN_SET, + MT8196_TOP_AXI_PROT_EN_CLR, + MT8196_TOP_AXI_PROT_EN_STA), + BUS_PROT_WR_IGN(INFRA, MT8196_TOP_AXI_PROT_EN_1_SLEEP1_MD, + MT8196_TOP_AXI_PROT_EN_1_SET, + MT8196_TOP_AXI_PROT_EN_1_CLR, + MT8196_TOP_AXI_PROT_EN_1_STA), + }, + .caps = MTK_SCPD_MODEM_PWRSEQ | MTK_SCPD_EXT_BUCK_ISO | + MTK_SCPD_SKIP_RESET_B | MTK_SCPD_KEEP_DEFAULT_OFF, + }, + [MT8196_POWER_DOMAIN_CONN] = { + .name = "conn", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe04, + .pwr_sta_offs = 0xe04, + .pwr_sta2nd_offs = 0xe04, + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_CONN, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_KEEP_DEFAULT_OFF, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, + [MT8196_POWER_DOMAIN_SSUSB_DP_PHY_P0] = { + .name = "ssusb-dp-phy-p0", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe18, + .pwr_sta_offs = 0xe18, + .pwr_sta2nd_offs = 0xe18, + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_SSUSB_DP_PHY_P0, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_ALWAYS_ON, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, + [MT8196_POWER_DOMAIN_SSUSB_P0] = { + .name = "ssusb-p0", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe1c, + .pwr_sta_offs = 0xe1c, + .pwr_sta2nd_offs = 0xe1c, + .sram_pdn_bits = BIT(8), + .sram_pdn_ack_bits = BIT(12), + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_SSUSB_P0, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_ALWAYS_ON, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, + [MT8196_POWER_DOMAIN_SSUSB_P1] = { + .name = "ssusb-p1", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe20, + .pwr_sta_offs = 0xe20, + .pwr_sta2nd_offs = 0xe20, + .sram_pdn_bits = BIT(8), + .sram_pdn_ack_bits = BIT(12), + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_SSUSB_P1, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_ALWAYS_ON, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, + [MT8196_POWER_DOMAIN_SSUSB_P23] = { + .name = "ssusb-p23", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe24, + .pwr_sta_offs = 0xe24, + .pwr_sta2nd_offs = 0xe24, + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_SSUSB_P23, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_KEEP_DEFAULT_OFF, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, + [MT8196_POWER_DOMAIN_SSUSB_PHY_P2] = { + .name = "ssusb-phy-p2", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe28, + .pwr_sta_offs = 0xe28, + .pwr_sta2nd_offs = 0xe28, + .sram_pdn_bits = BIT(8), + .sram_pdn_ack_bits = BIT(12), + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_SSUSB_PHY_P2, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_KEEP_DEFAULT_OFF, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, + [MT8196_POWER_DOMAIN_PEXTP_MAC0] = { + .name = "pextp-mac0", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe34, + .pwr_sta_offs = 0xe34, + .pwr_sta2nd_offs = 0xe34, + .sram_pdn_bits = BIT(8), + .sram_pdn_ack_bits = BIT(12), + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_PEXTP_MAC0, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .rtff_type = SCPSYS_RTFF_TYPE_PCIE_PHY, + }, + [MT8196_POWER_DOMAIN_PEXTP_MAC1] = { + .name = "pextp-mac1", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe38, + .pwr_sta_offs = 0xe38, + .pwr_sta2nd_offs = 0xe38, + .sram_pdn_bits = BIT(8), + .sram_pdn_ack_bits = BIT(12), + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_PEXTP_MAC1, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .rtff_type = SCPSYS_RTFF_TYPE_PCIE_PHY, + }, + [MT8196_POWER_DOMAIN_PEXTP_MAC2] = { + .name = "pextp-mac2", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe3c, + .pwr_sta_offs = 0xe3c, + .pwr_sta2nd_offs = 0xe3c, + .sram_pdn_bits = BIT(8), + .sram_pdn_ack_bits = BIT(12), + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_PEXTP_MAC2, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .rtff_type = SCPSYS_RTFF_TYPE_PCIE_PHY, + }, + [MT8196_POWER_DOMAIN_PEXTP_PHY0] = { + .name = "pextp-phy0", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe40, + .pwr_sta_offs = 0xe40, + .pwr_sta2nd_offs = 0xe40, + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_PEXTP_PHY0, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .rtff_type = SCPSYS_RTFF_TYPE_PCIE_PHY, + }, + [MT8196_POWER_DOMAIN_PEXTP_PHY1] = { + .name = "pextp-phy1", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe44, + .pwr_sta_offs = 0xe44, + .pwr_sta2nd_offs = 0xe44, + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_PEXTP_PHY1, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .rtff_type = SCPSYS_RTFF_TYPE_PCIE_PHY, + }, + [MT8196_POWER_DOMAIN_PEXTP_PHY2] = { + .name = "pextp-phy2", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe48, + .pwr_sta_offs = 0xe48, + .pwr_sta2nd_offs = 0xe48, + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_PEXTP_PHY2, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .rtff_type = SCPSYS_RTFF_TYPE_PCIE_PHY, + }, + [MT8196_POWER_DOMAIN_AUDIO] = { + .name = "audio", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe4c, + .pwr_sta_offs = 0xe4c, + .pwr_sta2nd_offs = 0xe4c, + .sram_pdn_bits = BIT(8), + .sram_pdn_ack_bits = BIT(12), + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_AUDIO, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, + [MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT] = { + .name = "adsp-top-dormant", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe54, + .pwr_sta_offs = 0xe54, + .pwr_sta2nd_offs = 0xe54, + /* Note: This is not managing powerdown (pdn), but sleep instead (slp) */ + .sram_pdn_bits = BIT(9), + .sram_pdn_ack_bits = BIT(13), + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_ADSP_TOP, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_SRAM_ISO | MTK_SCPD_SRAM_PDN_INVERTED, + }, + [MT8196_POWER_DOMAIN_ADSP_INFRA] = { + .name = "adsp-infra", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe58, + .pwr_sta_offs = 0xe58, + .pwr_sta2nd_offs = 0xe58, + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_ADSP_INFRA, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_ALWAYS_ON, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, + [MT8196_POWER_DOMAIN_ADSP_AO] = { + .name = "adsp-ao", + .sta_mask = MT8196_PWR_ACK, + .sta2nd_mask = MT8196_PWR_ACK_2ND, + .ctl_offs = 0xe5c, + .pwr_sta_offs = 0xe5c, + .pwr_sta2nd_offs = 0xe5c, + .bp_cfg = { + BUS_PROT_WR_IGN(SPM, MT8196_SPM_PROT_EN_BUS_ADSP_AO, + MT8196_SPM_BUS_PROTECT_CON_SET, + MT8196_SPM_BUS_PROTECT_CON_CLR, + MT8196_SPM_BUS_PROTECT_RDY), + }, + .caps = MTK_SCPD_ALWAYS_ON, + .rtff_type = SCPSYS_RTFF_TYPE_GENERIC, + }, +}; + +static const struct scpsys_hwv_domain_data scpsys_hwv_domain_data_mt8196[] = { + [MT8196_POWER_DOMAIN_MM_PROC_DORMANT] = { + .name = "mm-proc-dormant", + .set = 0x0218, + .clr = 0x021c, + .done = 0x141c, + .en = 0x1410, + .set_sta = 0x146c, + .clr_sta = 0x1470, + .setclr_bit = 0, + .caps = MTK_SCPD_ALWAYS_ON, + }, + [MT8196_POWER_DOMAIN_SSR] = { + .name = "ssrsys", + .set = 0x0218, + .clr = 0x021c, + .done = 0x141c, + .en = 0x1410, + .set_sta = 0x146c, + .clr_sta = 0x1470, + .setclr_bit = 1, + }, +}; + +static const struct scpsys_hwv_domain_data hfrpsys_hwv_domain_data_mt8196[] = { + [MT8196_POWER_DOMAIN_VDE0] = { + .name = "vde0", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 7, + }, + [MT8196_POWER_DOMAIN_VDE1] = { + .name = "vde1", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 8, + }, + [MT8196_POWER_DOMAIN_VDE_VCORE0] = { + .name = "vde-vcore0", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 9, + }, + [MT8196_POWER_DOMAIN_VEN0] = { + .name = "ven0", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 10, + }, + [MT8196_POWER_DOMAIN_VEN1] = { + .name = "ven1", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 11, + }, + [MT8196_POWER_DOMAIN_VEN2] = { + .name = "ven2", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 12, + }, + [MT8196_POWER_DOMAIN_DISP_VCORE] = { + .name = "disp-vcore", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 24, + }, + [MT8196_POWER_DOMAIN_DIS0_DORMANT] = { + .name = "dis0-dormant", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 25, + }, + [MT8196_POWER_DOMAIN_DIS1_DORMANT] = { + .name = "dis1-dormant", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 26, + }, + [MT8196_POWER_DOMAIN_OVL0_DORMANT] = { + .name = "ovl0-dormant", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 27, + }, + [MT8196_POWER_DOMAIN_OVL1_DORMANT] = { + .name = "ovl1-dormant", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 28, + }, + [MT8196_POWER_DOMAIN_DISP_EDPTX_DORMANT] = { + .name = "disp-edptx-dormant", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 29, + }, + [MT8196_POWER_DOMAIN_DISP_DPTX_DORMANT] = { + .name = "disp-dptx-dormant", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 30, + }, + [MT8196_POWER_DOMAIN_MML0_SHUTDOWN] = { + .name = "mml0-shutdown", + .set = 0x0218, + .clr = 0x021C, + .done = 0x141C, + .en = 0x1410, + .set_sta = 0x146C, + .clr_sta = 0x1470, + .setclr_bit = 31, + }, + [MT8196_POWER_DOMAIN_MML1_SHUTDOWN] = { + .name = "mml1-shutdown", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 0, + }, + [MT8196_POWER_DOMAIN_MM_INFRA0] = { + .name = "mm-infra0", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 1, + }, + [MT8196_POWER_DOMAIN_MM_INFRA1] = { + .name = "mm-infra1", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 2, + }, + [MT8196_POWER_DOMAIN_MM_INFRA_AO] = { + .name = "mm-infra-ao", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 3, + }, + [MT8196_POWER_DOMAIN_CSI_BS_RX] = { + .name = "csi-bs-rx", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 5, + }, + [MT8196_POWER_DOMAIN_CSI_LS_RX] = { + .name = "csi-ls-rx", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 6, + }, + [MT8196_POWER_DOMAIN_DSI_PHY0] = { + .name = "dsi-phy0", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 7, + }, + [MT8196_POWER_DOMAIN_DSI_PHY1] = { + .name = "dsi-phy1", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 8, + }, + [MT8196_POWER_DOMAIN_DSI_PHY2] = { + .name = "dsi-phy2", + .set = 0x0220, + .clr = 0x0224, + .done = 0x142C, + .en = 0x1420, + .set_sta = 0x1474, + .clr_sta = 0x1478, + .setclr_bit = 9, + }, +}; + +static const struct scpsys_soc_data mt8196_scpsys_data = { + .domains_data = scpsys_domain_data_mt8196, + .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8196), + .bus_prot_blocks = scpsys_bus_prot_blocks_mt8196, + .num_bus_prot_blocks = ARRAY_SIZE(scpsys_bus_prot_blocks_mt8196), + .type = SCPSYS_MTCMOS_TYPE_DIRECT_CTL, +}; + +static const struct scpsys_soc_data mt8196_scpsys_hwv_data = { + .hwv_domains_data = scpsys_hwv_domain_data_mt8196, + .num_hwv_domains = ARRAY_SIZE(scpsys_hwv_domain_data_mt8196), + .type = SCPSYS_MTCMOS_TYPE_HW_VOTER, +}; + +static const struct scpsys_soc_data mt8196_hfrpsys_hwv_data = { + .hwv_domains_data = hfrpsys_hwv_domain_data_mt8196, + .num_hwv_domains = ARRAY_SIZE(hfrpsys_hwv_domain_data_mt8196), + .type = SCPSYS_MTCMOS_TYPE_HW_VOTER, +}; + +#endif /* __SOC_MEDIATEK_MT8196_PM_DOMAINS_H */ diff --git a/drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c b/drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c new file mode 100644 index 000000000000..9bad577b3ae4 --- /dev/null +++ b/drivers/pmdomain/mediatek/mtk-mfg-pmdomain.c @@ -0,0 +1,1044 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Driver for MediaTek MFlexGraphics Devices + * + * Copyright (C) 2025, Collabora Ltd. + */ + +#include <linux/completion.h> +#include <linux/clk.h> +#include <linux/clk-provider.h> +#include <linux/container_of.h> +#include <linux/iopoll.h> +#include <linux/mailbox_client.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_platform.h> +#include <linux/of_reserved_mem.h> +#include <linux/overflow.h> +#include <linux/platform_device.h> +#include <linux/pm_domain.h> +#include <linux/pm_opp.h> +#include <linux/regulator/consumer.h> +#include <linux/units.h> + +#define GPR_LP_STATE 0x0028 +#define EB_ON_SUSPEND 0x0 +#define EB_ON_RESUME 0x1 +#define GPR_IPI_MAGIC 0x34 + +#define RPC_PWR_CON 0x0504 +#define PWR_ACK_M GENMASK(31, 30) +#define RPC_DUMMY_REG_2 0x0658 +#define RPC_GHPM_CFG0_CON 0x0800 +#define GHPM_ENABLE_M BIT(0) +#define GHPM_ON_SEQ_M BIT(2) +#define RPC_GHPM_RO0_CON 0x09A4 +#define GHPM_STATE_M GENMASK(7, 0) +#define GHPM_PWR_STATE_M BIT(16) + +#define GF_REG_MAGIC 0x0000 +#define GF_REG_GPU_OPP_IDX 0x0004 +#define GF_REG_STK_OPP_IDX 0x0008 +#define GF_REG_GPU_OPP_NUM 0x000c +#define GF_REG_STK_OPP_NUM 0x0010 +#define GF_REG_GPU_OPP_SNUM 0x0014 +#define GF_REG_STK_OPP_SNUM 0x0018 +#define GF_REG_POWER_COUNT 0x001c +#define GF_REG_BUCK_COUNT 0x0020 +#define GF_REG_MTCMOS_COUNT 0x0024 +#define GF_REG_CG_COUNT 0x0028 /* CG = Clock Gate? */ +#define GF_REG_ACTIVE_COUNT 0x002C +#define GF_REG_TEMP_RAW 0x0030 +#define GF_REG_TEMP_NORM_GPU 0x0034 +#define GF_REG_TEMP_HIGH_GPU 0x0038 +#define GF_REG_TEMP_NORM_STK 0x003C +#define GF_REG_TEMP_HIGH_STK 0x0040 +#define GF_REG_FREQ_CUR_GPU 0x0044 +#define GF_REG_FREQ_CUR_STK 0x0048 +#define GF_REG_FREQ_OUT_GPU 0x004C /* Guess: actual achieved freq */ +#define GF_REG_FREQ_OUT_STK 0x0050 /* Guess: actual achieved freq */ +#define GF_REG_FREQ_METER_GPU 0x0054 /* Seems unused, always 0 */ +#define GF_REG_FREQ_METER_STK 0x0058 /* Seems unused, always 0 */ +#define GF_REG_VOLT_CUR_GPU 0x005C /* in tens of microvolts */ +#define GF_REG_VOLT_CUR_STK 0x0060 /* in tens of microvolts */ +#define GF_REG_VOLT_CUR_GPU_SRAM 0x0064 +#define GF_REG_VOLT_CUR_STK_SRAM 0x0068 +#define GF_REG_VOLT_CUR_GPU_REG 0x006C /* Seems unused, always 0 */ +#define GF_REG_VOLT_CUR_STK_REG 0x0070 /* Seems unused, always 0 */ +#define GF_REG_VOLT_CUR_GPU_REG_SRAM 0x0074 +#define GF_REG_VOLT_CUR_STK_REG_SRAM 0x0078 +#define GF_REG_PWR_CUR_GPU 0x007C /* in milliwatts */ +#define GF_REG_PWR_CUR_STK 0x0080 /* in milliwatts */ +#define GF_REG_PWR_MAX_GPU 0x0084 /* in milliwatts */ +#define GF_REG_PWR_MAX_STK 0x0088 /* in milliwatts */ +#define GF_REG_PWR_MIN_GPU 0x008C /* in milliwatts */ +#define GF_REG_PWR_MIN_STK 0x0090 /* in milliwatts */ +#define GF_REG_LEAKAGE_RT_GPU 0x0094 /* Unknown */ +#define GF_REG_LEAKAGE_RT_STK 0x0098 /* Unknown */ +#define GF_REG_LEAKAGE_RT_SRAM 0x009C /* Unknown */ +#define GF_REG_LEAKAGE_HT_GPU 0x00A0 /* Unknown */ +#define GF_REG_LEAKAGE_HT_STK 0x00A4 /* Unknown */ +#define GF_REG_LEAKAGE_HT_SRAM 0x00A8 /* Unknown */ +#define GF_REG_VOLT_DAC_LOW_GPU 0x00AC /* Seems unused, always 0 */ +#define GF_REG_VOLT_DAC_LOW_STK 0x00B0 /* Seems unused, always 0 */ +#define GF_REG_OPP_CUR_CEIL 0x00B4 +#define GF_REG_OPP_CUR_FLOOR 0x00B8 +#define GF_REG_OPP_CUR_LIMITER_CEIL 0x00BC +#define GF_REG_OPP_CUR_LIMITER_FLOOR 0x00C0 +#define GF_REG_OPP_PRIORITY_CEIL 0x00C4 +#define GF_REG_OPP_PRIORITY_FLOOR 0x00C8 +#define GF_REG_PWR_CTL 0x00CC +#define GF_REG_ACTIVE_SLEEP_CTL 0x00D0 +#define GF_REG_DVFS_STATE 0x00D4 +#define GF_REG_SHADER_PRESENT 0x00D8 +#define GF_REG_ASENSOR_ENABLE 0x00DC +#define GF_REG_AGING_LOAD 0x00E0 +#define GF_REG_AGING_MARGIN 0x00E4 +#define GF_REG_AVS_ENABLE 0x00E8 +#define GF_REG_AVS_MARGIN 0x00EC +#define GF_REG_CHIP_TYPE 0x00F0 +#define GF_REG_SB_VERSION 0x00F4 +#define GF_REG_PTP_VERSION 0x00F8 +#define GF_REG_DBG_VERSION 0x00FC +#define GF_REG_KDBG_VERSION 0x0100 +#define GF_REG_GPM1_MODE 0x0104 +#define GF_REG_GPM3_MODE 0x0108 +#define GF_REG_DFD_MODE 0x010C +#define GF_REG_DUAL_BUCK 0x0110 +#define GF_REG_SEGMENT_ID 0x0114 +#define GF_REG_POWER_TIME_H 0x0118 +#define GF_REG_POWER_TIME_L 0x011C +#define GF_REG_PWR_STATUS 0x0120 +#define GF_REG_STRESS_TEST 0x0124 +#define GF_REG_TEST_MODE 0x0128 +#define GF_REG_IPS_MODE 0x012C +#define GF_REG_TEMP_COMP_MODE 0x0130 +#define GF_REG_HT_TEMP_COMP_MODE 0x0134 +#define GF_REG_PWR_TRACKER_MODE 0x0138 +#define GF_REG_OPP_TABLE_GPU 0x0314 +#define GF_REG_OPP_TABLE_STK 0x09A4 +#define GF_REG_OPP_TABLE_GPU_S 0x1034 +#define GF_REG_OPP_TABLE_STK_S 0x16c4 +#define GF_REG_LIMIT_TABLE 0x1d54 +#define GF_REG_GPM3_TABLE 0x223C + +#define MFG_MT8196_E2_ID 0x101 +#define GPUEB_SLEEP_MAGIC 0x55667788UL +#define GPUEB_MEM_MAGIC 0xBABADADAUL + +#define GPUEB_TIMEOUT_US 10000UL +#define GPUEB_POLL_US 50 + +#define MAX_OPP_NUM 70 + +#define GPUEB_MBOX_MAX_RX_SIZE 32 /* in bytes */ + +/* + * This enum is part of the ABI of the GPUEB firmware. Don't change the + * numbering, as you would wreak havoc. + */ +enum mtk_mfg_ipi_cmd { + CMD_INIT_SHARED_MEM = 0, + CMD_GET_FREQ_BY_IDX = 1, + CMD_GET_POWER_BY_IDX = 2, + CMD_GET_OPPIDX_BY_FREQ = 3, + CMD_GET_LEAKAGE_POWER = 4, + CMD_SET_LIMIT = 5, + CMD_POWER_CONTROL = 6, + CMD_ACTIVE_SLEEP_CONTROL = 7, + CMD_COMMIT = 8, + CMD_DUAL_COMMIT = 9, + CMD_PDCA_CONFIG = 10, + CMD_UPDATE_DEBUG_OPP_INFO = 11, + CMD_SWITCH_LIMIT = 12, + CMD_FIX_TARGET_OPPIDX = 13, + CMD_FIX_DUAL_TARGET_OPPIDX = 14, + CMD_FIX_CUSTOM_FREQ_VOLT = 15, + CMD_FIX_DUAL_CUSTOM_FREQ_VOLT = 16, + CMD_SET_MFGSYS_CONFIG = 17, + CMD_MSSV_COMMIT = 18, + CMD_NUM = 19, +}; + +/* + * This struct is part of the ABI of the GPUEB firmware. Changing it, or + * reordering fields in it, will break things, so don't do it. Thank you. + */ +struct __packed mtk_mfg_ipi_msg { + __le32 magic; + __le32 cmd; + __le32 target; + /* + * Downstream relies on the compiler to implicitly add the following + * padding, as it declares the struct as non-packed. + */ + __le32 reserved; + union { + s32 __bitwise oppidx; + s32 __bitwise return_value; + __le32 freq; + __le32 volt; + __le32 power; + __le32 power_state; + __le32 mode; + __le32 value; + struct { + __le64 base; + __le32 size; + } shared_mem; + struct { + __le32 freq; + __le32 volt; + } custom; + struct { + __le32 limiter; + s32 __bitwise ceiling_info; + s32 __bitwise floor_info; + } set_limit; + struct { + __le32 target; + __le32 val; + } mfg_cfg; + struct { + __le32 target; + __le32 val; + } mssv; + struct { + s32 __bitwise gpu_oppidx; + s32 __bitwise stack_oppidx; + } dual_commit; + struct { + __le32 fgpu; + __le32 vgpu; + __le32 fstack; + __le32 vstack; + } dual_custom; + } u; +}; + +struct __packed mtk_mfg_ipi_sleep_msg { + __le32 event; + __le32 state; + __le32 magic; +}; + +/** + * struct mtk_mfg_opp_entry - OPP table entry from firmware + * @freq_khz: The operating point's frequency in kilohertz + * @voltage_core: The operating point's core voltage in tens of microvolts + * @voltage_sram: The operating point's SRAM voltage in tens of microvolts + * @posdiv: exponent of base 2 for PLL frequency divisor used for this OPP + * @voltage_margin: Number of tens of microvolts the voltage can be undershot + * @power_mw: estimate of power usage at this operating point, in milliwatts + * + * This struct is part of the ABI with the EB firmware. Do not change it. + */ +struct __packed mtk_mfg_opp_entry { + __le32 freq_khz; + __le32 voltage_core; + __le32 voltage_sram; + __le32 posdiv; + __le32 voltage_margin; + __le32 power_mw; +}; + +struct mtk_mfg_mbox { + struct mbox_client cl; + struct completion rx_done; + struct mtk_mfg *mfg; + struct mbox_chan *ch; + void *rx_data; +}; + +struct mtk_mfg { + struct generic_pm_domain pd; + struct platform_device *pdev; + struct clk *clk_eb; + struct clk_bulk_data *gpu_clks; + struct clk_hw clk_core_hw; + struct clk_hw clk_stack_hw; + struct regulator_bulk_data *gpu_regs; + void __iomem *rpc; + void __iomem *gpr; + void __iomem *shared_mem; + phys_addr_t shared_mem_phys; + unsigned int shared_mem_size; + u16 ghpm_en_reg; + u32 ipi_magic; + unsigned short num_gpu_opps; + unsigned short num_stack_opps; + struct dev_pm_opp_data *gpu_opps; + struct dev_pm_opp_data *stack_opps; + struct mtk_mfg_mbox *gf_mbox; + struct mtk_mfg_mbox *slp_mbox; + const struct mtk_mfg_variant *variant; +}; + +struct mtk_mfg_variant { + const char *const *clk_names; + unsigned int num_clks; + const char *const *regulator_names; + unsigned int num_regulators; + /** @turbo_below: opp indices below this value are considered turbo */ + unsigned int turbo_below; + int (*init)(struct mtk_mfg *mfg); +}; + +static inline struct mtk_mfg *mtk_mfg_from_genpd(struct generic_pm_domain *pd) +{ + return container_of(pd, struct mtk_mfg, pd); +} + +static inline void mtk_mfg_update_reg_bits(void __iomem *addr, u32 mask, u32 val) +{ + writel((readl(addr) & ~mask) | (val & mask), addr); +} + +static inline bool mtk_mfg_is_powered_on(struct mtk_mfg *mfg) +{ + return (readl(mfg->rpc + RPC_PWR_CON) & PWR_ACK_M) == PWR_ACK_M; +} + +static unsigned long mtk_mfg_recalc_rate_gpu(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct mtk_mfg *mfg = container_of(hw, struct mtk_mfg, clk_core_hw); + + return readl(mfg->shared_mem + GF_REG_FREQ_OUT_GPU) * HZ_PER_KHZ; +} + +static int mtk_mfg_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) +{ + /* + * The determine_rate callback needs to be implemented to avoid returning + * the current clock frequency, rather than something even remotely + * close to the frequency that was asked for. + * + * Instead of writing considerable amounts of possibly slow code just to + * somehow figure out which of the three PLLs to round for, or even to + * do a search through one of two OPP tables in order to find the closest + * OPP of a frequency, just return the rate as-is. This avoids devfreq + * "rounding" a request for the lowest frequency to the possibly very + * high current frequency, breaking the powersave governor in the process. + */ + + return 0; +} + +static unsigned long mtk_mfg_recalc_rate_stack(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct mtk_mfg *mfg = container_of(hw, struct mtk_mfg, clk_stack_hw); + + return readl(mfg->shared_mem + GF_REG_FREQ_OUT_STK) * HZ_PER_KHZ; +} + +static const struct clk_ops mtk_mfg_clk_gpu_ops = { + .recalc_rate = mtk_mfg_recalc_rate_gpu, + .determine_rate = mtk_mfg_determine_rate, +}; + +static const struct clk_ops mtk_mfg_clk_stack_ops = { + .recalc_rate = mtk_mfg_recalc_rate_stack, + .determine_rate = mtk_mfg_determine_rate, +}; + +static const struct clk_init_data mtk_mfg_clk_gpu_init = { + .name = "gpu-core", + .ops = &mtk_mfg_clk_gpu_ops, + .flags = CLK_GET_RATE_NOCACHE, +}; + +static const struct clk_init_data mtk_mfg_clk_stack_init = { + .name = "gpu-stack", + .ops = &mtk_mfg_clk_stack_ops, + .flags = CLK_GET_RATE_NOCACHE, +}; + +static int mtk_mfg_eb_on(struct mtk_mfg *mfg) +{ + struct device *dev = &mfg->pdev->dev; + u32 val; + int ret; + + /* + * If MFG is already on from e.g. the bootloader, skip doing the + * power-on sequence, as it wouldn't work without powering it off first. + */ + if (mtk_mfg_is_powered_on(mfg)) + return 0; + + ret = readl_poll_timeout(mfg->rpc + RPC_GHPM_RO0_CON, val, + !(val & (GHPM_PWR_STATE_M | GHPM_STATE_M)), + GPUEB_POLL_US, GPUEB_TIMEOUT_US); + if (ret) { + dev_err(dev, "timed out waiting for EB to power on\n"); + return ret; + } + + mtk_mfg_update_reg_bits(mfg->rpc + mfg->ghpm_en_reg, GHPM_ENABLE_M, + GHPM_ENABLE_M); + + mtk_mfg_update_reg_bits(mfg->rpc + RPC_GHPM_CFG0_CON, GHPM_ON_SEQ_M, 0); + mtk_mfg_update_reg_bits(mfg->rpc + RPC_GHPM_CFG0_CON, GHPM_ON_SEQ_M, + GHPM_ON_SEQ_M); + + mtk_mfg_update_reg_bits(mfg->rpc + mfg->ghpm_en_reg, GHPM_ENABLE_M, 0); + + + ret = readl_poll_timeout(mfg->rpc + RPC_PWR_CON, val, + (val & PWR_ACK_M) == PWR_ACK_M, + GPUEB_POLL_US, GPUEB_TIMEOUT_US); + if (ret) { + dev_err(dev, "timed out waiting for EB power ack, val = 0x%X\n", + val); + return ret; + } + + ret = readl_poll_timeout(mfg->gpr + GPR_LP_STATE, val, + (val == EB_ON_RESUME), + GPUEB_POLL_US, GPUEB_TIMEOUT_US); + if (ret) { + dev_err(dev, "timed out waiting for EB to resume, status = 0x%X\n", val); + return ret; + } + + return 0; +} + +static int mtk_mfg_eb_off(struct mtk_mfg *mfg) +{ + struct device *dev = &mfg->pdev->dev; + struct mtk_mfg_ipi_sleep_msg msg = { + .event = 0, + .state = 0, + .magic = GPUEB_SLEEP_MAGIC + }; + u32 val; + int ret; + + ret = mbox_send_message(mfg->slp_mbox->ch, &msg); + if (ret < 0) { + dev_err(dev, "Cannot send sleep command: %pe\n", ERR_PTR(ret)); + return ret; + } + + ret = readl_poll_timeout(mfg->rpc + RPC_PWR_CON, val, + !(val & PWR_ACK_M), GPUEB_POLL_US, + GPUEB_TIMEOUT_US); + + if (ret) { + dev_err(dev, "Timed out waiting for EB to power off, val=0x%08X\n", val); + return ret; + } + + return 0; +} + +/** + * mtk_mfg_send_ipi - synchronously send an IPI message on the gpufreq channel + * @mfg: pointer to this driver instance's private &struct mtk_mfg + * @msg: pointer to a message to send; will have magic filled and response assigned + * + * Send an IPI message on the gpufreq channel, and wait for a response. Once a + * response is received, assign a pointer to the response buffer (valid until + * next response is received) to @msg. + * + * Returns 0 on success, negative errno on failure. + */ +static int mtk_mfg_send_ipi(struct mtk_mfg *mfg, struct mtk_mfg_ipi_msg *msg) +{ + struct device *dev = &mfg->pdev->dev; + unsigned long wait; + int ret; + + msg->magic = mfg->ipi_magic; + + ret = mbox_send_message(mfg->gf_mbox->ch, msg); + if (ret < 0) { + dev_err(dev, "Cannot send GPUFreq IPI command: %pe\n", ERR_PTR(ret)); + return ret; + } + + wait = wait_for_completion_timeout(&mfg->gf_mbox->rx_done, msecs_to_jiffies(500)); + if (!wait) + return -ETIMEDOUT; + + msg = mfg->gf_mbox->rx_data; + + if (msg->u.return_value < 0) { + dev_err(dev, "IPI return: %d\n", msg->u.return_value); + return -EPROTO; + } + + return 0; +} + +static int mtk_mfg_init_shared_mem(struct mtk_mfg *mfg) +{ + struct device *dev = &mfg->pdev->dev; + struct mtk_mfg_ipi_msg msg = {}; + int ret; + + dev_dbg(dev, "clearing GPUEB shared memory, 0x%X bytes\n", mfg->shared_mem_size); + memset_io(mfg->shared_mem, 0, mfg->shared_mem_size); + + msg.cmd = CMD_INIT_SHARED_MEM; + msg.u.shared_mem.base = mfg->shared_mem_phys; + msg.u.shared_mem.size = mfg->shared_mem_size; + + ret = mtk_mfg_send_ipi(mfg, &msg); + if (ret) + return ret; + + if (readl(mfg->shared_mem + GF_REG_MAGIC) != GPUEB_MEM_MAGIC) { + dev_err(dev, "EB did not initialise shared memory correctly\n"); + return -EIO; + } + + return 0; +} + +static int mtk_mfg_power_control(struct mtk_mfg *mfg, bool enabled) +{ + struct mtk_mfg_ipi_msg msg = {}; + + msg.cmd = CMD_POWER_CONTROL; + msg.u.power_state = enabled ? 1 : 0; + + return mtk_mfg_send_ipi(mfg, &msg); +} + +static int mtk_mfg_set_oppidx(struct mtk_mfg *mfg, unsigned int opp_idx) +{ + struct mtk_mfg_ipi_msg msg = {}; + int ret; + + if (opp_idx >= mfg->num_gpu_opps) + return -EINVAL; + + msg.cmd = CMD_FIX_DUAL_TARGET_OPPIDX; + msg.u.dual_commit.gpu_oppidx = opp_idx; + msg.u.dual_commit.stack_oppidx = opp_idx; + + ret = mtk_mfg_send_ipi(mfg, &msg); + if (ret) { + dev_err(&mfg->pdev->dev, "Failed to set OPP %u: %pe\n", + opp_idx, ERR_PTR(ret)); + return ret; + } + + return 0; +} + +static int mtk_mfg_read_opp_tables(struct mtk_mfg *mfg) +{ + struct device *dev = &mfg->pdev->dev; + struct mtk_mfg_opp_entry e = {}; + unsigned int i; + + mfg->num_gpu_opps = readl(mfg->shared_mem + GF_REG_GPU_OPP_NUM); + mfg->num_stack_opps = readl(mfg->shared_mem + GF_REG_STK_OPP_NUM); + + if (mfg->num_gpu_opps > MAX_OPP_NUM || mfg->num_gpu_opps == 0) { + dev_err(dev, "GPU OPP count (%u) out of range %u >= count > 0\n", + mfg->num_gpu_opps, MAX_OPP_NUM); + return -EINVAL; + } + + if (mfg->num_stack_opps && mfg->num_stack_opps > MAX_OPP_NUM) { + dev_err(dev, "Stack OPP count (%u) out of range %u >= count >= 0\n", + mfg->num_stack_opps, MAX_OPP_NUM); + return -EINVAL; + } + + mfg->gpu_opps = devm_kcalloc(dev, mfg->num_gpu_opps, + sizeof(struct dev_pm_opp_data), GFP_KERNEL); + if (!mfg->gpu_opps) + return -ENOMEM; + + if (mfg->num_stack_opps) { + mfg->stack_opps = devm_kcalloc(dev, mfg->num_stack_opps, + sizeof(struct dev_pm_opp_data), GFP_KERNEL); + if (!mfg->stack_opps) + return -ENOMEM; + } + + for (i = 0; i < mfg->num_gpu_opps; i++) { + memcpy_fromio(&e, mfg->shared_mem + GF_REG_OPP_TABLE_GPU + i * sizeof(e), + sizeof(e)); + if (mem_is_zero(&e, sizeof(e))) { + dev_err(dev, "ran into an empty GPU OPP at index %u\n", + i); + return -EINVAL; + } + mfg->gpu_opps[i].freq = e.freq_khz * HZ_PER_KHZ; + mfg->gpu_opps[i].u_volt = e.voltage_core * 10; + mfg->gpu_opps[i].level = i; + if (i < mfg->variant->turbo_below) + mfg->gpu_opps[i].turbo = true; + } + + for (i = 0; i < mfg->num_stack_opps; i++) { + memcpy_fromio(&e, mfg->shared_mem + GF_REG_OPP_TABLE_STK + i * sizeof(e), + sizeof(e)); + if (mem_is_zero(&e, sizeof(e))) { + dev_err(dev, "ran into an empty Stack OPP at index %u\n", + i); + return -EINVAL; + } + mfg->stack_opps[i].freq = e.freq_khz * HZ_PER_KHZ; + mfg->stack_opps[i].u_volt = e.voltage_core * 10; + mfg->stack_opps[i].level = i; + if (i < mfg->variant->turbo_below) + mfg->stack_opps[i].turbo = true; + } + + return 0; +} + +static const char *const mtk_mfg_mt8196_clk_names[] = { + "core", + "stack0", + "stack1", +}; + +static const char *const mtk_mfg_mt8196_regulators[] = { + "core", + "stack", + "sram", +}; + +static int mtk_mfg_mt8196_init(struct mtk_mfg *mfg) +{ + void __iomem *e2_base; + + e2_base = devm_platform_ioremap_resource_byname(mfg->pdev, "hw-revision"); + if (IS_ERR(e2_base)) + return dev_err_probe(&mfg->pdev->dev, PTR_ERR(e2_base), + "Couldn't get hw-revision register\n"); + + clk_prepare_enable(mfg->clk_eb); + + if (readl(e2_base) == MFG_MT8196_E2_ID) + mfg->ghpm_en_reg = RPC_DUMMY_REG_2; + else + mfg->ghpm_en_reg = RPC_GHPM_CFG0_CON; + + clk_disable_unprepare(mfg->clk_eb); + + return 0; +} + +static const struct mtk_mfg_variant mtk_mfg_mt8196_variant = { + .clk_names = mtk_mfg_mt8196_clk_names, + .num_clks = ARRAY_SIZE(mtk_mfg_mt8196_clk_names), + .regulator_names = mtk_mfg_mt8196_regulators, + .num_regulators = ARRAY_SIZE(mtk_mfg_mt8196_regulators), + .turbo_below = 7, + .init = mtk_mfg_mt8196_init, +}; + +static void mtk_mfg_mbox_rx_callback(struct mbox_client *cl, void *mssg) +{ + struct mtk_mfg_mbox *mb = container_of(cl, struct mtk_mfg_mbox, cl); + + if (mb->rx_data) + mb->rx_data = memcpy(mb->rx_data, mssg, GPUEB_MBOX_MAX_RX_SIZE); + complete(&mb->rx_done); +} + +static int mtk_mfg_attach_dev(struct generic_pm_domain *pd, struct device *dev) +{ + struct mtk_mfg *mfg = mtk_mfg_from_genpd(pd); + struct dev_pm_opp_data *so = mfg->stack_opps; + struct dev_pm_opp_data *go = mfg->gpu_opps; + struct dev_pm_opp_data *prev_o; + struct dev_pm_opp_data *o; + int i, ret; + + for (i = mfg->num_gpu_opps - 1; i >= 0; i--) { + /* + * Adding the lower of the two OPPs avoids gaps of indices in + * situations where the GPU OPPs are duplicated a couple of + * times when only the Stack OPP is being lowered at that index. + */ + if (i >= mfg->num_stack_opps || go[i].freq < so[i].freq) + o = &go[i]; + else + o = &so[i]; + + /* + * Skip indices where both GPU and Stack OPPs are equal. Nominally, + * OPP core shouldn't care about dupes, but not doing so will cause + * dev_pm_opp_find_freq_ceil_indexed to -ERANGE later down the line. + */ + if (prev_o && prev_o->freq == o->freq) + continue; + + ret = dev_pm_opp_add_dynamic(dev, o); + if (ret) { + dev_err(dev, "Failed to add OPP level %u from PD %s: %pe\n", + o->level, pd->name, ERR_PTR(ret)); + dev_pm_opp_remove_all_dynamic(dev); + return ret; + } + prev_o = o; + } + + return 0; +} + +static void mtk_mfg_detach_dev(struct generic_pm_domain *pd, struct device *dev) +{ + dev_pm_opp_remove_all_dynamic(dev); +} + +static int mtk_mfg_set_performance(struct generic_pm_domain *pd, + unsigned int state) +{ + struct mtk_mfg *mfg = mtk_mfg_from_genpd(pd); + + /* + * pmdomain core intentionally sets a performance state before turning + * a domain on, and after turning it off. For the GPUEB however, it's + * only possible to act on performance requests when the GPUEB is + * powered on. To do this, return cleanly without taking action, and + * defer setting what pmdomain core set in mtk_mfg_power_on. + */ + if (mfg->pd.status != GENPD_STATE_ON) + return 0; + + return mtk_mfg_set_oppidx(mfg, state); +} + +static int mtk_mfg_power_on(struct generic_pm_domain *pd) +{ + struct mtk_mfg *mfg = mtk_mfg_from_genpd(pd); + int ret; + + ret = regulator_bulk_enable(mfg->variant->num_regulators, + mfg->gpu_regs); + if (ret) + return ret; + + ret = clk_prepare_enable(mfg->clk_eb); + if (ret) + goto err_disable_regulators; + + ret = clk_bulk_prepare_enable(mfg->variant->num_clks, mfg->gpu_clks); + if (ret) + goto err_disable_eb_clk; + + ret = mtk_mfg_eb_on(mfg); + if (ret) + goto err_disable_clks; + + mfg->ipi_magic = readl(mfg->gpr + GPR_IPI_MAGIC); + + ret = mtk_mfg_power_control(mfg, true); + if (ret) + goto err_eb_off; + + /* Don't try to set a OPP in probe before OPPs have been read from EB */ + if (mfg->gpu_opps) { + /* The aforementioned deferred setting of pmdomain's state */ + ret = mtk_mfg_set_oppidx(mfg, pd->performance_state); + if (ret) + dev_warn(&mfg->pdev->dev, "Failed to set oppidx in %s\n", __func__); + } + + return 0; + +err_eb_off: + mtk_mfg_eb_off(mfg); +err_disable_clks: + clk_bulk_disable_unprepare(mfg->variant->num_clks, mfg->gpu_clks); +err_disable_eb_clk: + clk_disable_unprepare(mfg->clk_eb); +err_disable_regulators: + regulator_bulk_disable(mfg->variant->num_regulators, mfg->gpu_regs); + + return ret; +} + +static int mtk_mfg_power_off(struct generic_pm_domain *pd) +{ + struct mtk_mfg *mfg = mtk_mfg_from_genpd(pd); + struct device *dev = &mfg->pdev->dev; + int ret; + + ret = mtk_mfg_power_control(mfg, false); + if (ret) { + dev_err(dev, "power_control failed: %pe\n", ERR_PTR(ret)); + return ret; + } + + ret = mtk_mfg_eb_off(mfg); + if (ret) { + dev_err(dev, "eb_off failed: %pe\n", ERR_PTR(ret)); + return ret; + } + + clk_bulk_disable_unprepare(mfg->variant->num_clks, mfg->gpu_clks); + clk_disable_unprepare(mfg->clk_eb); + ret = regulator_bulk_disable(mfg->variant->num_regulators, mfg->gpu_regs); + if (ret) { + dev_err(dev, "Disabling regulators failed: %pe\n", ERR_PTR(ret)); + return ret; + } + + return 0; +} + +static int mtk_mfg_init_mbox(struct mtk_mfg *mfg) +{ + struct device *dev = &mfg->pdev->dev; + struct mtk_mfg_mbox *gf; + struct mtk_mfg_mbox *slp; + + gf = devm_kzalloc(dev, sizeof(*gf), GFP_KERNEL); + if (!gf) + return -ENOMEM; + + gf->rx_data = devm_kzalloc(dev, GPUEB_MBOX_MAX_RX_SIZE, GFP_KERNEL); + if (!gf->rx_data) + return -ENOMEM; + + gf->mfg = mfg; + init_completion(&gf->rx_done); + gf->cl.dev = dev; + gf->cl.rx_callback = mtk_mfg_mbox_rx_callback; + gf->cl.tx_tout = GPUEB_TIMEOUT_US / USEC_PER_MSEC; + gf->ch = mbox_request_channel_byname(&gf->cl, "gpufreq"); + if (IS_ERR(gf->ch)) + return PTR_ERR(gf->ch); + + mfg->gf_mbox = gf; + + slp = devm_kzalloc(dev, sizeof(*slp), GFP_KERNEL); + if (!slp) + return -ENOMEM; + + slp->mfg = mfg; + init_completion(&slp->rx_done); + slp->cl.dev = dev; + slp->cl.tx_tout = GPUEB_TIMEOUT_US / USEC_PER_MSEC; + slp->cl.tx_block = true; + slp->ch = mbox_request_channel_byname(&slp->cl, "sleep"); + if (IS_ERR(slp->ch)) { + mbox_free_channel(gf->ch); + return PTR_ERR(slp->ch); + } + + mfg->slp_mbox = slp; + + return 0; +} + +static int mtk_mfg_init_clk_provider(struct mtk_mfg *mfg) +{ + struct device *dev = &mfg->pdev->dev; + struct clk_hw_onecell_data *clk_data; + int ret; + + clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, 2), GFP_KERNEL); + if (!clk_data) + return -ENOMEM; + + clk_data->num = 2; + + mfg->clk_core_hw.init = &mtk_mfg_clk_gpu_init; + mfg->clk_stack_hw.init = &mtk_mfg_clk_stack_init; + + ret = devm_clk_hw_register(dev, &mfg->clk_core_hw); + if (ret) + return dev_err_probe(dev, ret, "Couldn't register GPU core clock\n"); + + ret = devm_clk_hw_register(dev, &mfg->clk_stack_hw); + if (ret) + return dev_err_probe(dev, ret, "Couldn't register GPU stack clock\n"); + + clk_data->hws[0] = &mfg->clk_core_hw; + clk_data->hws[1] = &mfg->clk_stack_hw; + + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clk_data); + if (ret) + return dev_err_probe(dev, ret, "Couldn't register clock provider\n"); + + return 0; +} + +static int mtk_mfg_probe(struct platform_device *pdev) +{ + struct mtk_mfg *mfg; + struct device *dev = &pdev->dev; + const struct mtk_mfg_variant *data = of_device_get_match_data(dev); + struct resource res; + int ret, i; + + mfg = devm_kzalloc(dev, sizeof(*mfg), GFP_KERNEL); + if (!mfg) + return -ENOMEM; + + mfg->pdev = pdev; + mfg->variant = data; + + dev_set_drvdata(dev, mfg); + + mfg->gpr = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(mfg->gpr)) + return dev_err_probe(dev, PTR_ERR(mfg->gpr), + "Couldn't retrieve GPR MMIO registers\n"); + + mfg->rpc = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(mfg->rpc)) + return dev_err_probe(dev, PTR_ERR(mfg->rpc), + "Couldn't retrieve RPC MMIO registers\n"); + + mfg->clk_eb = devm_clk_get(dev, "eb"); + if (IS_ERR(mfg->clk_eb)) + return dev_err_probe(dev, PTR_ERR(mfg->clk_eb), + "Couldn't get 'eb' clock\n"); + + mfg->gpu_clks = devm_kcalloc(dev, data->num_clks, sizeof(*mfg->gpu_clks), + GFP_KERNEL); + if (!mfg->gpu_clks) + return -ENOMEM; + + for (i = 0; i < data->num_clks; i++) + mfg->gpu_clks[i].id = data->clk_names[i]; + + ret = devm_clk_bulk_get(dev, data->num_clks, mfg->gpu_clks); + if (ret) + return dev_err_probe(dev, ret, "Couldn't get GPU clocks\n"); + + mfg->gpu_regs = devm_kcalloc(dev, data->num_regulators, + sizeof(*mfg->gpu_regs), GFP_KERNEL); + if (!mfg->gpu_regs) + return -ENOMEM; + + for (i = 0; i < data->num_regulators; i++) + mfg->gpu_regs[i].supply = data->regulator_names[i]; + + ret = devm_regulator_bulk_get(dev, data->num_regulators, mfg->gpu_regs); + if (ret) + return dev_err_probe(dev, ret, "Couldn't get GPU regulators\n"); + + ret = of_reserved_mem_region_to_resource(dev->of_node, 0, &res); + if (ret) + return dev_err_probe(dev, ret, "Couldn't get GPUEB shared memory\n"); + + mfg->shared_mem = devm_ioremap(dev, res.start, resource_size(&res)); + if (!mfg->shared_mem) + return dev_err_probe(dev, -ENOMEM, "Can't ioremap GPUEB shared memory\n"); + mfg->shared_mem_size = resource_size(&res); + mfg->shared_mem_phys = res.start; + + if (data->init) { + ret = data->init(mfg); + if (ret) + return dev_err_probe(dev, ret, "Variant init failed\n"); + } + + mfg->pd.name = dev_name(dev); + mfg->pd.attach_dev = mtk_mfg_attach_dev; + mfg->pd.detach_dev = mtk_mfg_detach_dev; + mfg->pd.power_off = mtk_mfg_power_off; + mfg->pd.power_on = mtk_mfg_power_on; + mfg->pd.set_performance_state = mtk_mfg_set_performance; + mfg->pd.flags = GENPD_FLAG_OPP_TABLE_FW; + + ret = pm_genpd_init(&mfg->pd, NULL, false); + if (ret) + return dev_err_probe(dev, ret, "Failed to initialise power domain\n"); + + ret = mtk_mfg_init_mbox(mfg); + if (ret) { + dev_err_probe(dev, ret, "Couldn't initialise mailbox\n"); + goto err_remove_genpd; + } + + ret = mtk_mfg_power_on(&mfg->pd); + if (ret) { + dev_err_probe(dev, ret, "Failed to power on MFG\n"); + goto err_free_mbox; + } + + ret = mtk_mfg_init_shared_mem(mfg); + if (ret) { + dev_err_probe(dev, ret, "Couldn't initialize EB shared memory\n"); + goto err_power_off; + } + + ret = mtk_mfg_read_opp_tables(mfg); + if (ret) { + dev_err_probe(dev, ret, "Error reading OPP tables from EB\n"); + goto err_power_off; + } + + ret = mtk_mfg_init_clk_provider(mfg); + if (ret) + goto err_power_off; + + ret = of_genpd_add_provider_simple(dev->of_node, &mfg->pd); + if (ret) { + dev_err_probe(dev, ret, "Failed to add pmdomain provider\n"); + goto err_power_off; + } + + return 0; + +err_power_off: + mtk_mfg_power_off(&mfg->pd); +err_free_mbox: + mbox_free_channel(mfg->slp_mbox->ch); + mfg->slp_mbox->ch = NULL; + mbox_free_channel(mfg->gf_mbox->ch); + mfg->gf_mbox->ch = NULL; +err_remove_genpd: + pm_genpd_remove(&mfg->pd); + + return ret; +} + +static const struct of_device_id mtk_mfg_of_match[] = { + { .compatible = "mediatek,mt8196-gpufreq", .data = &mtk_mfg_mt8196_variant }, + {} +}; +MODULE_DEVICE_TABLE(of, mtk_mfg_of_match); + +static void mtk_mfg_remove(struct platform_device *pdev) +{ + struct mtk_mfg *mfg = dev_get_drvdata(&pdev->dev); + + if (mtk_mfg_is_powered_on(mfg)) + mtk_mfg_power_off(&mfg->pd); + + of_genpd_del_provider(pdev->dev.of_node); + pm_genpd_remove(&mfg->pd); + + mbox_free_channel(mfg->gf_mbox->ch); + mfg->gf_mbox->ch = NULL; + + mbox_free_channel(mfg->slp_mbox->ch); + mfg->slp_mbox->ch = NULL; +} + +static struct platform_driver mtk_mfg_driver = { + .driver = { + .name = "mtk-mfg-pmdomain", + .of_match_table = mtk_mfg_of_match, + .suppress_bind_attrs = true, + }, + .probe = mtk_mfg_probe, + .remove = mtk_mfg_remove, +}; +module_platform_driver(mtk_mfg_driver); + +MODULE_AUTHOR("Nicolas Frattaroli <nicolas.frattaroli@collabora.com>"); +MODULE_DESCRIPTION("MediaTek MFlexGraphics Power Domain Driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/pmdomain/mediatek/mtk-pm-domains.c b/drivers/pmdomain/mediatek/mtk-pm-domains.c index 9c9323c8c93a..80561d27f2b2 100644 --- a/drivers/pmdomain/mediatek/mtk-pm-domains.c +++ b/drivers/pmdomain/mediatek/mtk-pm-domains.c @@ -2,6 +2,7 @@ /* * Copyright (c) 2020 Collabora Ltd. */ +#include <linux/arm-smccc.h> #include <linux/clk.h> #include <linux/clk-provider.h> #include <linux/init.h> @@ -15,6 +16,7 @@ #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/soc/mediatek/infracfg.h> +#include <linux/soc/mediatek/mtk_sip_svc.h> #include "mt6735-pm-domains.h" #include "mt6795-pm-domains.h" @@ -26,11 +28,18 @@ #include "mt8188-pm-domains.h" #include "mt8192-pm-domains.h" #include "mt8195-pm-domains.h" +#include "mt8196-pm-domains.h" #include "mt8365-pm-domains.h" #define MTK_POLL_DELAY_US 10 #define MTK_POLL_TIMEOUT USEC_PER_SEC +#define MTK_HWV_POLL_DELAY_US 5 +#define MTK_HWV_POLL_TIMEOUT (300 * USEC_PER_MSEC) + +#define MTK_HWV_PREPARE_DELAY_US 1 +#define MTK_HWV_PREPARE_TIMEOUT (3 * USEC_PER_MSEC) + #define PWR_RST_B_BIT BIT(0) #define PWR_ISO_BIT BIT(1) #define PWR_ON_BIT BIT(2) @@ -45,9 +54,12 @@ #define PWR_RTFF_SAVE_FLAG BIT(27) #define PWR_RTFF_UFS_CLK_DIS BIT(28) +#define MTK_SIP_KERNEL_HWCCF_CONTROL MTK_SIP_SMC_CMD(0x540) + struct scpsys_domain { struct generic_pm_domain genpd; const struct scpsys_domain_data *data; + const struct scpsys_hwv_domain_data *hwv_data; struct scpsys *scpsys; int num_clks; struct clk_bulk_data *clks; @@ -71,18 +83,56 @@ struct scpsys { static bool scpsys_domain_is_on(struct scpsys_domain *pd) { struct scpsys *scpsys = pd->scpsys; - u32 status, status2; + u32 mask = pd->data->sta_mask; + u32 status, status2, mask2; + + mask2 = pd->data->sta2nd_mask ? pd->data->sta2nd_mask : mask; regmap_read(scpsys->base, pd->data->pwr_sta_offs, &status); - status &= pd->data->sta_mask; + status &= mask; regmap_read(scpsys->base, pd->data->pwr_sta2nd_offs, &status2); - status2 &= pd->data->sta_mask; + status2 &= mask2; /* A domain is on when both status bits are set. */ return status && status2; } +static bool scpsys_hwv_domain_is_disable_done(struct scpsys_domain *pd) +{ + const struct scpsys_hwv_domain_data *hwv = pd->hwv_data; + u32 regs[2] = { hwv->done, hwv->clr_sta }; + u32 val[2]; + u32 mask = BIT(hwv->setclr_bit); + + regmap_multi_reg_read(pd->scpsys->base, regs, val, 2); + + /* Disable is done when the bit is set in DONE, cleared in CLR_STA */ + return (val[0] & mask) && !(val[1] & mask); +} + +static bool scpsys_hwv_domain_is_enable_done(struct scpsys_domain *pd) +{ + const struct scpsys_hwv_domain_data *hwv = pd->hwv_data; + u32 regs[3] = { hwv->done, hwv->en, hwv->set_sta }; + u32 val[3]; + u32 mask = BIT(hwv->setclr_bit); + + regmap_multi_reg_read(pd->scpsys->base, regs, val, 3); + + /* Enable is done when the bit is set in DONE and EN, cleared in SET_STA */ + return (val[0] & mask) && (val[1] & mask) && !(val[2] & mask); +} + +static int scpsys_sec_infra_power_on(bool on) +{ + struct arm_smccc_res res; + unsigned long cmd = on ? 1 : 0; + + arm_smccc_smc(MTK_SIP_KERNEL_HWCCF_CONTROL, cmd, 0, 0, 0, 0, 0, 0, &res); + return res.a0; +} + static int scpsys_sram_enable(struct scpsys_domain *pd) { u32 expected_ack, pdn_ack = pd->data->sram_pdn_ack_bits; @@ -250,6 +300,161 @@ static int scpsys_regulator_disable(struct regulator *supply) return supply ? regulator_disable(supply) : 0; } +static int scpsys_hwv_power_on(struct generic_pm_domain *genpd) +{ + struct scpsys_domain *pd = container_of(genpd, struct scpsys_domain, genpd); + const struct scpsys_hwv_domain_data *hwv = pd->hwv_data; + struct scpsys *scpsys = pd->scpsys; + u32 val; + int ret; + + if (MTK_SCPD_CAPS(pd, MTK_SCPD_INFRA_PWR_CTL)) { + ret = scpsys_sec_infra_power_on(true); + if (ret) + return ret; + } + + ret = scpsys_regulator_enable(pd->supply); + if (ret) + goto err_infra; + + ret = clk_bulk_prepare_enable(pd->num_clks, pd->clks); + if (ret) + goto err_reg; + + /* For HWV the subsys clocks refer to the HWV low power subsystem */ + ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks); + if (ret) + goto err_disable_clks; + + /* Make sure the HW Voter is idle and able to accept commands */ + ret = regmap_read_poll_timeout_atomic(scpsys->base, hwv->done, val, + val & BIT(hwv->setclr_bit), + MTK_HWV_POLL_DELAY_US, + MTK_HWV_POLL_TIMEOUT); + if (ret) { + dev_err(scpsys->dev, "Failed to power on: HW Voter busy.\n"); + goto err_disable_subsys_clks; + } + + /* + * Instruct the HWV to power on the MTCMOS (power domain): after that, + * the same bit will be unset immediately by the hardware. + */ + regmap_write(scpsys->base, hwv->set, BIT(hwv->setclr_bit)); + + /* + * Wait until the HWV sets the bit again, signalling that its internal + * state machine was started and it now processing the vote command. + */ + ret = regmap_read_poll_timeout_atomic(scpsys->base, hwv->set, val, + val & BIT(hwv->setclr_bit), + MTK_HWV_PREPARE_DELAY_US, + MTK_HWV_PREPARE_TIMEOUT); + if (ret) { + dev_err(scpsys->dev, "Failed to power on: HW Voter not starting.\n"); + goto err_disable_subsys_clks; + } + + /* Wait for ACK, signalling that the MTCMOS was enabled */ + ret = readx_poll_timeout_atomic(scpsys_hwv_domain_is_enable_done, pd, val, val, + MTK_HWV_POLL_DELAY_US, MTK_HWV_POLL_TIMEOUT); + if (ret) { + dev_err(scpsys->dev, "Failed to power on: HW Voter ACK timeout.\n"); + goto err_disable_subsys_clks; + } + + /* It's done! Disable the HWV low power subsystem clocks */ + clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); + + if (MTK_SCPD_CAPS(pd, MTK_SCPD_INFRA_PWR_CTL)) + scpsys_sec_infra_power_on(false); + + return 0; + +err_disable_subsys_clks: + clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); +err_disable_clks: + clk_bulk_disable_unprepare(pd->num_clks, pd->clks); +err_reg: + scpsys_regulator_disable(pd->supply); +err_infra: + if (MTK_SCPD_CAPS(pd, MTK_SCPD_INFRA_PWR_CTL)) + scpsys_sec_infra_power_on(false); + return ret; +}; + +static int scpsys_hwv_power_off(struct generic_pm_domain *genpd) +{ + struct scpsys_domain *pd = container_of(genpd, struct scpsys_domain, genpd); + const struct scpsys_hwv_domain_data *hwv = pd->hwv_data; + struct scpsys *scpsys = pd->scpsys; + u32 val; + int ret; + + if (MTK_SCPD_CAPS(pd, MTK_SCPD_INFRA_PWR_CTL)) { + ret = scpsys_sec_infra_power_on(true); + if (ret) + return ret; + } + + ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks); + if (ret) + goto err_infra; + + /* Make sure the HW Voter is idle and able to accept commands */ + ret = regmap_read_poll_timeout_atomic(scpsys->base, hwv->done, val, + val & BIT(hwv->setclr_bit), + MTK_HWV_POLL_DELAY_US, + MTK_HWV_POLL_TIMEOUT); + if (ret) + goto err_disable_subsys_clks; + + + /* + * Instruct the HWV to power off the MTCMOS (power domain): differently + * from poweron, the bit will be kept set. + */ + regmap_write(scpsys->base, hwv->clr, BIT(hwv->setclr_bit)); + + /* + * Wait until the HWV clears the bit, signalling that its internal + * state machine was started and it now processing the clear command. + */ + ret = regmap_read_poll_timeout_atomic(scpsys->base, hwv->clr, val, + !(val & BIT(hwv->setclr_bit)), + MTK_HWV_PREPARE_DELAY_US, + MTK_HWV_PREPARE_TIMEOUT); + if (ret) + goto err_disable_subsys_clks; + + /* Poweroff needs 100us for the HW to stabilize */ + udelay(100); + + /* Wait for ACK, signalling that the MTCMOS was disabled */ + ret = readx_poll_timeout_atomic(scpsys_hwv_domain_is_disable_done, pd, val, val, + MTK_HWV_POLL_DELAY_US, MTK_HWV_POLL_TIMEOUT); + if (ret) + goto err_disable_subsys_clks; + + clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); + clk_bulk_disable_unprepare(pd->num_clks, pd->clks); + + scpsys_regulator_disable(pd->supply); + + if (MTK_SCPD_CAPS(pd, MTK_SCPD_INFRA_PWR_CTL)) + scpsys_sec_infra_power_on(false); + + return 0; + +err_disable_subsys_clks: + clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks); +err_infra: + if (MTK_SCPD_CAPS(pd, MTK_SCPD_INFRA_PWR_CTL)) + scpsys_sec_infra_power_on(false); + return ret; +}; + static int scpsys_ctl_pwrseq_on(struct scpsys_domain *pd) { struct scpsys *scpsys = pd->scpsys; @@ -514,6 +719,7 @@ static struct generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_node *node) { const struct scpsys_domain_data *domain_data; + const struct scpsys_hwv_domain_data *hwv_domain_data; struct scpsys_domain *pd; struct property *prop; const char *clk_name; @@ -529,14 +735,33 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no return ERR_PTR(-EINVAL); } - if (id >= scpsys->soc_data->num_domains) { - dev_err(scpsys->dev, "%pOF: invalid domain id %d\n", node, id); - return ERR_PTR(-EINVAL); - } + switch (scpsys->soc_data->type) { + case SCPSYS_MTCMOS_TYPE_DIRECT_CTL: + if (id >= scpsys->soc_data->num_domains) { + dev_err(scpsys->dev, "%pOF: invalid domain id %d\n", node, id); + return ERR_PTR(-EINVAL); + } + + domain_data = &scpsys->soc_data->domains_data[id]; + hwv_domain_data = NULL; + + if (domain_data->sta_mask == 0) { + dev_err(scpsys->dev, "%pOF: undefined domain id %d\n", node, id); + return ERR_PTR(-EINVAL); + } + + break; + case SCPSYS_MTCMOS_TYPE_HW_VOTER: + if (id >= scpsys->soc_data->num_hwv_domains) { + dev_err(scpsys->dev, "%pOF: invalid HWV domain id %d\n", node, id); + return ERR_PTR(-EINVAL); + } - domain_data = &scpsys->soc_data->domains_data[id]; - if (domain_data->sta_mask == 0) { - dev_err(scpsys->dev, "%pOF: undefined domain id %d\n", node, id); + domain_data = NULL; + hwv_domain_data = &scpsys->soc_data->hwv_domains_data[id]; + + break; + default: return ERR_PTR(-EINVAL); } @@ -545,6 +770,7 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no return ERR_PTR(-ENOMEM); pd->data = domain_data; + pd->hwv_data = hwv_domain_data; pd->scpsys = scpsys; if (MTK_SCPD_CAPS(pd, MTK_SCPD_DOMAIN_SUPPLY)) { @@ -604,6 +830,31 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no pd->subsys_clks[i].clk = clk; } + if (scpsys->domains[id]) { + ret = -EINVAL; + dev_err(scpsys->dev, + "power domain with id %d already exists, check your device-tree\n", id); + goto err_put_subsys_clocks; + } + + if (pd->data && pd->data->name) + pd->genpd.name = pd->data->name; + else if (pd->hwv_data && pd->hwv_data->name) + pd->genpd.name = pd->hwv_data->name; + else + pd->genpd.name = node->name; + + if (scpsys->soc_data->type == SCPSYS_MTCMOS_TYPE_DIRECT_CTL) { + pd->genpd.power_off = scpsys_power_off; + pd->genpd.power_on = scpsys_power_on; + } else { + pd->genpd.power_off = scpsys_hwv_power_off; + pd->genpd.power_on = scpsys_hwv_power_on; + + /* HW-Voter code can be invoked in atomic context */ + pd->genpd.flags |= GENPD_FLAG_IRQ_SAFE; + } + /* * Initially turn on all domains to make the domains usable * with !CONFIG_PM and to get the hardware in sync with the @@ -615,7 +866,7 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no dev_warn(scpsys->dev, "%pOF: A default off power domain has been ON\n", node); } else { - ret = scpsys_power_on(&pd->genpd); + ret = pd->genpd.power_on(&pd->genpd); if (ret < 0) { dev_err(scpsys->dev, "%pOF: failed to power on domain: %d\n", node, ret); goto err_put_subsys_clocks; @@ -625,21 +876,6 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no pd->genpd.flags |= GENPD_FLAG_ALWAYS_ON; } - if (scpsys->domains[id]) { - ret = -EINVAL; - dev_err(scpsys->dev, - "power domain with id %d already exists, check your device-tree\n", id); - goto err_put_subsys_clocks; - } - - if (!pd->data->name) - pd->genpd.name = node->name; - else - pd->genpd.name = pd->data->name; - - pd->genpd.power_off = scpsys_power_off; - pd->genpd.power_on = scpsys_power_on; - if (MTK_SCPD_CAPS(pd, MTK_SCPD_ACTIVE_WAKEUP)) pd->genpd.flags |= GENPD_FLAG_ACTIVE_WAKEUP; @@ -932,6 +1168,18 @@ static const struct of_device_id scpsys_of_match[] = { .data = &mt8195_scpsys_data, }, { + .compatible = "mediatek,mt8196-power-controller", + .data = &mt8196_scpsys_data, + }, + { + .compatible = "mediatek,mt8196-hwv-hfrp-power-controller", + .data = &mt8196_hfrpsys_hwv_data, + }, + { + .compatible = "mediatek,mt8196-hwv-scp-power-controller", + .data = &mt8196_scpsys_hwv_data, + }, + { .compatible = "mediatek,mt8365-power-controller", .data = &mt8365_scpsys_data, }, @@ -946,7 +1194,7 @@ static int scpsys_probe(struct platform_device *pdev) struct device_node *node; struct device *parent; struct scpsys *scpsys; - int ret; + int num_domains, ret; soc = of_device_get_match_data(&pdev->dev); if (!soc) { @@ -954,7 +1202,9 @@ static int scpsys_probe(struct platform_device *pdev) return -EINVAL; } - scpsys = devm_kzalloc(dev, struct_size(scpsys, domains, soc->num_domains), GFP_KERNEL); + num_domains = soc->num_domains + soc->num_hwv_domains; + + scpsys = devm_kzalloc(dev, struct_size(scpsys, domains, num_domains), GFP_KERNEL); if (!scpsys) return -ENOMEM; diff --git a/drivers/pmdomain/mediatek/mtk-pm-domains.h b/drivers/pmdomain/mediatek/mtk-pm-domains.h index b2e3dee03831..f608e6ec4744 100644 --- a/drivers/pmdomain/mediatek/mtk-pm-domains.h +++ b/drivers/pmdomain/mediatek/mtk-pm-domains.h @@ -16,7 +16,10 @@ #define MTK_SCPD_SRAM_PDN_INVERTED BIT(9) #define MTK_SCPD_MODEM_PWRSEQ BIT(10) #define MTK_SCPD_SKIP_RESET_B BIT(11) -#define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x)) +#define MTK_SCPD_INFRA_PWR_CTL BIT(12) +#define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data ? \ + (_scpd)->data->caps & (_x) : \ + (_scpd)->hwv_data->caps & (_x)) #define SPM_VDE_PWR_CON 0x0210 #define SPM_MFG_PWR_CON 0x0214 @@ -59,6 +62,7 @@ enum scpsys_bus_prot_block { BUS_PROT_BLOCK_INFRA, BUS_PROT_BLOCK_INFRA_NAO, BUS_PROT_BLOCK_SMI, + BUS_PROT_BLOCK_SPM, BUS_PROT_BLOCK_COUNT, }; @@ -125,9 +129,22 @@ enum scpsys_rtff_type { }; /** + * enum scpsys_mtcmos_type - Type of power domain controller + * @SCPSYS_MTCMOS_TYPE_DIRECT_CTL: Power domains are controlled with direct access + * @SCPSYS_MTCMOS_TYPE_HW_VOTER: Hardware-assisted voted power domain control + * @SCPSYS_MTCMOS_TYPE_MAX: Number of supported power domain types + */ +enum scpsys_mtcmos_type { + SCPSYS_MTCMOS_TYPE_DIRECT_CTL = 0, + SCPSYS_MTCMOS_TYPE_HW_VOTER, + SCPSYS_MTCMOS_TYPE_MAX +}; + +/** * struct scpsys_domain_data - scp domain data for power on/off flow * @name: The name of the power domain. * @sta_mask: The mask for power on/off status bit. + * @sta2nd_mask: The mask for second power on/off status bit. * @ctl_offs: The offset for main power control register. * @sram_pdn_bits: The mask for sram power control bits. * @sram_pdn_ack_bits: The mask for sram power control acked bits. @@ -140,6 +157,7 @@ enum scpsys_rtff_type { struct scpsys_domain_data { const char *name; u32 sta_mask; + u32 sta2nd_mask; int ctl_offs; u32 sram_pdn_bits; u32 sram_pdn_ack_bits; @@ -152,11 +170,40 @@ struct scpsys_domain_data { int pwr_sta2nd_offs; }; +/** + * struct scpsys_hwv_domain_data - Hardware Voter power domain data + * @name: Name of the power domain + * @set: Offset of the HWV SET register + * @clr: Offset of the HWV CLEAR register + * @done: Offset of the HWV DONE register + * @en: Offset of the HWV ENABLE register + * @set_sta: Offset of the HWV SET STATUS register + * @clr_sta: Offset of the HWV CLEAR STATUS register + * @setclr_bit: The SET/CLR bit to enable/disable the power domain + * @sta_bit: The SET/CLR STA bit to check for on/off ACK + * @caps: The flag for active wake-up action + */ +struct scpsys_hwv_domain_data { + const char *name; + u16 set; + u16 clr; + u16 done; + u16 en; + u16 set_sta; + u16 clr_sta; + u8 setclr_bit; + u8 sta_bit; + u16 caps; +}; + struct scpsys_soc_data { const struct scpsys_domain_data *domains_data; int num_domains; + const struct scpsys_hwv_domain_data *hwv_domains_data; + int num_hwv_domains; enum scpsys_bus_prot_block *bus_prot_blocks; int num_bus_prot_blocks; + enum scpsys_mtcmos_type type; }; #endif /* __SOC_MEDIATEK_MTK_PM_DOMAINS_H */ diff --git a/drivers/pmdomain/qcom/rpmhpd.c b/drivers/pmdomain/qcom/rpmhpd.c index 4faa8a256186..a8b37037c6fe 100644 --- a/drivers/pmdomain/qcom/rpmhpd.c +++ b/drivers/pmdomain/qcom/rpmhpd.c @@ -19,7 +19,7 @@ #define domain_to_rpmhpd(domain) container_of(domain, struct rpmhpd, pd) -#define RPMH_ARC_MAX_LEVELS 16 +#define RPMH_ARC_MAX_LEVELS 32 /** * struct rpmhpd - top level RPMh power domain resource data structure @@ -595,6 +595,31 @@ static const struct rpmhpd_desc sm8750_desc = { .num_pds = ARRAY_SIZE(sm8750_rpmhpds), }; +/* KAANAPALI RPMH powerdomains */ +static struct rpmhpd *kaanapali_rpmhpds[] = { + [RPMHPD_CX] = &cx, + [RPMHPD_CX_AO] = &cx_ao, + [RPMHPD_EBI] = &ebi, + [RPMHPD_GFX] = &gfx, + [RPMHPD_GMXC] = &gmxc, + [RPMHPD_LCX] = &lcx, + [RPMHPD_LMX] = &lmx, + [RPMHPD_MX] = &mx, + [RPMHPD_MX_AO] = &mx_ao, + [RPMHPD_MMCX] = &mmcx, + [RPMHPD_MMCX_AO] = &mmcx_ao, + [RPMHPD_MSS] = &mss, + [RPMHPD_MXC] = &mxc, + [RPMHPD_MXC_AO] = &mxc_ao, + [RPMHPD_NSP] = &nsp, + [RPMHPD_NSP2] = &nsp2, +}; + +static const struct rpmhpd_desc kaanapali_desc = { + .rpmhpds = kaanapali_rpmhpds, + .num_pds = ARRAY_SIZE(kaanapali_rpmhpds), +}; + /* QDU1000/QRU1000 RPMH powerdomains */ static struct rpmhpd *qdu1000_rpmhpds[] = { [QDU1000_CX] = &cx, @@ -767,6 +792,7 @@ static const struct rpmhpd_desc qcs615_desc = { static const struct of_device_id rpmhpd_match_table[] = { { .compatible = "qcom,glymur-rpmhpd", .data = &glymur_desc }, + { .compatible = "qcom,kaanapali-rpmhpd", .data = &kaanapali_desc }, { .compatible = "qcom,milos-rpmhpd", .data = &milos_desc }, { .compatible = "qcom,qcs615-rpmhpd", .data = &qcs615_desc }, { .compatible = "qcom,qcs8300-rpmhpd", .data = &qcs8300_desc }, diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c index 1955c6d453e4..4f1336a0f49a 100644 --- a/drivers/pmdomain/rockchip/pm-domains.c +++ b/drivers/pmdomain/rockchip/pm-domains.c @@ -25,6 +25,7 @@ #include <soc/rockchip/rockchip_sip.h> #include <dt-bindings/power/px30-power.h> #include <dt-bindings/power/rockchip,rv1126-power.h> +#include <dt-bindings/power/rockchip,rv1126b-power-controller.h> #include <dt-bindings/power/rk3036-power.h> #include <dt-bindings/power/rk3066-power.h> #include <dt-bindings/power/rk3128-power.h> @@ -137,6 +138,20 @@ struct rockchip_pmu { .active_wakeup = wakeup, \ } +#define DOMAIN_M_G(_name, pwr, status, req, idle, ack, g_mask, wakeup, keepon) \ +{ \ + .name = _name, \ + .pwr_w_mask = (pwr) << 16, \ + .pwr_mask = (pwr), \ + .status_mask = (status), \ + .req_w_mask = (req) << 16, \ + .req_mask = (req), \ + .idle_mask = (idle), \ + .ack_mask = (ack), \ + .clk_ungate_mask = (g_mask), \ + .active_wakeup = wakeup, \ +} + #define DOMAIN_M_G_SD(_name, pwr, status, req, idle, ack, g_mask, mem, wakeup, keepon) \ { \ .name = _name, \ @@ -205,6 +220,9 @@ struct rockchip_pmu { #define DOMAIN_RV1126(name, pwr, req, idle, wakeup) \ DOMAIN_M(name, pwr, pwr, req, idle, idle, wakeup) +#define DOMAIN_RV1126B(name, pwr, req, wakeup) \ + DOMAIN_M_G(name, pwr, pwr, req, req, req, req, wakeup, true) + #define DOMAIN_RK3288(name, pwr, status, req, wakeup) \ DOMAIN(name, pwr, status, req, req, (req) << 16, wakeup) @@ -1104,6 +1122,13 @@ static const struct rockchip_domain_info rv1126_pm_domains[] = { [RV1126_PD_USB] = DOMAIN_RV1126("usb", BIT(9), BIT(15), BIT(15), false), }; +static const struct rockchip_domain_info rv1126b_pm_domains[] = { + /* name pwr req wakeup */ + [RV1126B_PD_NPU] = DOMAIN_RV1126B("npu", BIT(0), BIT(8), false), + [RV1126B_PD_VDO] = DOMAIN_RV1126B("vdo", BIT(1), BIT(9), false), + [RV1126B_PD_AIISP] = DOMAIN_RV1126B("aiisp", BIT(2), BIT(10), false), +}; + static const struct rockchip_domain_info rk3036_pm_domains[] = { [RK3036_PD_MSCH] = DOMAIN_RK3036("msch", BIT(14), BIT(23), BIT(30), true), [RK3036_PD_CORE] = DOMAIN_RK3036("core", BIT(13), BIT(17), BIT(24), false), @@ -1516,6 +1541,18 @@ static const struct rockchip_pmu_info rv1126_pmu = { .domain_info = rv1126_pm_domains, }; +static const struct rockchip_pmu_info rv1126b_pmu = { + .pwr_offset = 0x210, + .status_offset = 0x230, + .req_offset = 0x110, + .idle_offset = 0x128, + .ack_offset = 0x120, + .clk_ungate_offset = 0x140, + + .num_domains = ARRAY_SIZE(rv1126b_pm_domains), + .domain_info = rv1126b_pm_domains, +}; + static const struct of_device_id rockchip_pm_domain_dt_match[] = { { .compatible = "rockchip,px30-power-controller", @@ -1585,6 +1622,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { .compatible = "rockchip,rv1126-power-controller", .data = (void *)&rv1126_pmu, }, + { + .compatible = "rockchip,rv1126b-power-controller", + .data = (void *)&rv1126b_pmu, + }, { /* sentinel */ }, }; diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index 8248895ca903..f6c1bcbb57de 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig @@ -283,6 +283,15 @@ config POWER_RESET_KEYSTONE help Reboot support for the KEYSTONE SoCs. +config POWER_RESET_SPACEMIT_P1 + tristate "SpacemiT P1 poweroff and reset driver" + depends on ARCH_SPACEMIT || COMPILE_TEST + depends on MFD_SPACEMIT_P1 + default MFD_SPACEMIT_P1 + help + This driver supports power-off and reset operations for the SpacemiT + P1 PMIC. + config POWER_RESET_SYSCON bool "Generic SYSCON regmap reset driver" depends on OF diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile index 51da87e05ce7..0e4ae6f6b5c5 100644 --- a/drivers/power/reset/Makefile +++ b/drivers/power/reset/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_POWER_RESET_LTC2952) += ltc2952-poweroff.o obj-$(CONFIG_POWER_RESET_QNAP) += qnap-poweroff.o obj-$(CONFIG_POWER_RESET_REGULATOR) += regulator-poweroff.o obj-$(CONFIG_POWER_RESET_RESTART) += restart-poweroff.o +obj-$(CONFIG_POWER_RESET_SPACEMIT_P1) += spacemit-p1-reboot.o obj-$(CONFIG_POWER_RESET_ST) += st-poweroff.o obj-$(CONFIG_POWER_RESET_TH1520_AON) += th1520-aon-reboot.o obj-$(CONFIG_POWER_RESET_TORADEX_EC) += tdx-ec-poweroff.o diff --git a/drivers/power/reset/spacemit-p1-reboot.c b/drivers/power/reset/spacemit-p1-reboot.c new file mode 100644 index 000000000000..9ec3d1fff8f3 --- /dev/null +++ b/drivers/power/reset/spacemit-p1-reboot.c @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2025 by Aurelien Jarno + */ + +#include <linux/bits.h> +#include <linux/mod_devicetable.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/reboot.h> + +/* Power Control Register 2 */ +#define PWR_CTRL2 0x7e +#define PWR_CTRL2_SHUTDOWN BIT(2) /* Shutdown request */ +#define PWR_CTRL2_RST BIT(1) /* Reset request */ + +static int spacemit_p1_pwroff_handler(struct sys_off_data *data) +{ + struct regmap *regmap = data->cb_data; + int ret; + + /* Put the PMIC into shutdown state */ + ret = regmap_set_bits(regmap, PWR_CTRL2, PWR_CTRL2_SHUTDOWN); + if (ret) { + dev_err(data->dev, "shutdown failed: %d\n", ret); + return notifier_from_errno(ret); + } + + return NOTIFY_DONE; +} + +static int spacemit_p1_restart_handler(struct sys_off_data *data) +{ + struct regmap *regmap = data->cb_data; + int ret; + + /* Put the PMIC into reset state */ + ret = regmap_set_bits(regmap, PWR_CTRL2, PWR_CTRL2_RST); + if (ret) { + dev_err(data->dev, "restart failed: %d\n", ret); + return notifier_from_errno(ret); + } + + return NOTIFY_DONE; +} + +static int spacemit_p1_reboot_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct regmap *regmap; + int ret; + + regmap = dev_get_regmap(dev->parent, NULL); + if (!regmap) + return -ENODEV; + + ret = devm_register_power_off_handler(dev, &spacemit_p1_pwroff_handler, + regmap); + if (ret) + return dev_err_probe(dev, ret, + "Failed to register power off handler\n"); + + ret = devm_register_restart_handler(dev, spacemit_p1_restart_handler, + regmap); + if (ret) + return dev_err_probe(dev, ret, + "Failed to register restart handler\n"); + + return 0; +} + +static const struct platform_device_id spacemit_p1_reboot_id_table[] = { + { "spacemit-p1-reboot", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(platform, spacemit_p1_reboot_id_table); + +static struct platform_driver spacemit_p1_reboot_driver = { + .driver = { + .name = "spacemit-p1-reboot", + }, + .probe = spacemit_p1_reboot_probe, + .id_table = spacemit_p1_reboot_id_table, +}; +module_platform_driver(spacemit_p1_reboot_driver); + +MODULE_DESCRIPTION("SpacemiT P1 reboot/poweroff driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig index 03c8525b480f..92f9f7aae92f 100644 --- a/drivers/power/supply/Kconfig +++ b/drivers/power/supply/Kconfig @@ -942,6 +942,21 @@ config CHARGER_RT9471 This driver can also be built as a module. If so, the module will be called rt9471. +config CHARGER_RT9756 + tristate "Richtek RT9756 smart cap divider charger driver" + depends on I2C + select REGMAP_I2C + select LINEAR_RANGES + help + This adds support for Richtek RT9756 smart cap divider charger driver. + It's a high efficiency and high charge current charger. the device + integrates smart cap divider topology with 9-channel high speed + ADCs that can provide input and output voltage, current and + temperature monitoring. + + This driver can also be built as a module. If so, the module will be + called rt9756. + config CHARGER_CROS_USBPD tristate "ChromeOS EC based USBPD charger" depends on CROS_USBPD_NOTIFY @@ -1007,6 +1022,15 @@ config CHARGER_UCS1002 Say Y to enable support for Microchip UCS1002 Programmable USB Port Power Controller with Charger Emulation. +config CHARGER_BD71828 + tristate "Power-supply driver for ROHM BD71828 and BD71815 PMIC" + depends on MFD_ROHM_BD71828 + help + Say Y here to enable support for charger and battery + in ROHM BD71815, BD71817, ROHM BD71828 power management + ICs. This driver gets various bits of information about battery + and charger states. + config CHARGER_BD99954 tristate "ROHM bd99954 charger driver" depends on I2C diff --git a/drivers/power/supply/Makefile b/drivers/power/supply/Makefile index 6e37a3edf7e3..4b79d5abc49a 100644 --- a/drivers/power/supply/Makefile +++ b/drivers/power/supply/Makefile @@ -64,6 +64,7 @@ obj-$(CONFIG_CHARGER_RT5033) += rt5033_charger.o obj-$(CONFIG_CHARGER_RT9455) += rt9455_charger.o obj-$(CONFIG_CHARGER_RT9467) += rt9467-charger.o obj-$(CONFIG_CHARGER_RT9471) += rt9471.o +obj-$(CONFIG_CHARGER_RT9756) += rt9756.o obj-$(CONFIG_BATTERY_TWL4030_MADC) += twl4030_madc_battery.o obj-$(CONFIG_CHARGER_88PM860X) += 88pm860x_charger.o obj-$(CONFIG_CHARGER_PF1550) += pf1550-charger.o @@ -117,6 +118,7 @@ obj-$(CONFIG_CHARGER_SC2731) += sc2731_charger.o obj-$(CONFIG_FUEL_GAUGE_SC27XX) += sc27xx_fuel_gauge.o obj-$(CONFIG_FUEL_GAUGE_STC3117) += stc3117_fuel_gauge.o obj-$(CONFIG_CHARGER_UCS1002) += ucs1002_power.o +obj-$(CONFIG_CHARGER_BD71828) += bd71828-power.o obj-$(CONFIG_CHARGER_BD99954) += bd99954-charger.o obj-$(CONFIG_CHARGER_WILCO) += wilco-charger.o obj-$(CONFIG_RN5T618_POWER) += rn5t618_power.o diff --git a/drivers/power/supply/apm_power.c b/drivers/power/supply/apm_power.c index 9236e0078578..9933cdc5c387 100644 --- a/drivers/power/supply/apm_power.c +++ b/drivers/power/supply/apm_power.c @@ -364,7 +364,8 @@ static int __init apm_battery_init(void) static void __exit apm_battery_exit(void) { - apm_get_power_status = NULL; + if (apm_get_power_status == apm_battery_apm_get_power_status) + apm_get_power_status = NULL; } module_init(apm_battery_init); diff --git a/drivers/power/supply/bd71828-power.c b/drivers/power/supply/bd71828-power.c new file mode 100644 index 000000000000..f667baedeb77 --- /dev/null +++ b/drivers/power/supply/bd71828-power.c @@ -0,0 +1,1049 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* ROHM BD71815, BD71828 and BD71878 Charger driver */ + +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/mfd/rohm-bd71815.h> +#include <linux/mfd/rohm-bd71828.h> +#include <linux/module.h> +#include <linux/mod_devicetable.h> +#include <linux/platform_device.h> +#include <linux/property.h> +#include <linux/power_supply.h> +#include <linux/slab.h> + +/* common defines */ +#define BD7182x_MASK_VBAT_U 0x1f +#define BD7182x_MASK_VDCIN_U 0x0f +#define BD7182x_MASK_IBAT_U 0x3f +#define BD7182x_MASK_CURDIR_DISCHG 0x80 +#define BD7182x_MASK_CHG_STATE 0x7f +#define BD7182x_MASK_BAT_TEMP 0x07 +#define BD7182x_MASK_DCIN_DET BIT(0) +#define BD7182x_MASK_CONF_PON BIT(0) +#define BD71815_MASK_CONF_XSTB BIT(1) +#define BD7182x_MASK_BAT_STAT 0x3f +#define BD7182x_MASK_DCIN_STAT 0x07 + +#define BD7182x_MASK_WDT_AUTO 0x40 +#define BD7182x_MASK_VBAT_ALM_LIMIT_U 0x01 +#define BD7182x_MASK_CHG_EN 0x01 + +#define BD7182x_DCIN_COLLAPSE_DEFAULT 0x36 + +#define MAX_CURRENT_DEFAULT 890000 /* uA */ +#define AC_NAME "bd71828_ac" +#define BAT_NAME "bd71828_bat" + +#define BAT_OPEN 0x7 + +/* + * VBAT Low voltage detection Threshold + * 0x00D4*16mV = 212*0.016 = 3.392v + */ +#define VBAT_LOW_TH 0x00D4 + +struct pwr_regs { + u8 vbat_avg; + u8 ibat; + u8 ibat_avg; + u8 btemp_vth; + u8 chg_state; + u8 bat_temp; + u8 dcin_stat; + u8 dcin_collapse_limit; + u8 chg_set1; + u8 chg_en; + u8 vbat_alm_limit_u; + u8 conf; + u8 vdcin; +}; + +static const struct pwr_regs pwr_regs_bd71828 = { + .vbat_avg = BD71828_REG_VBAT_U, + .ibat = BD71828_REG_IBAT_U, + .ibat_avg = BD71828_REG_IBAT_AVG_U, + .btemp_vth = BD71828_REG_VM_BTMP_U, + .chg_state = BD71828_REG_CHG_STATE, + .bat_temp = BD71828_REG_BAT_TEMP, + .dcin_stat = BD71828_REG_DCIN_STAT, + .dcin_collapse_limit = BD71828_REG_DCIN_CLPS, + .chg_set1 = BD71828_REG_CHG_SET1, + .chg_en = BD71828_REG_CHG_EN, + .vbat_alm_limit_u = BD71828_REG_ALM_VBAT_LIMIT_U, + .conf = BD71828_REG_CONF, + .vdcin = BD71828_REG_VDCIN_U, +}; + +static const struct pwr_regs pwr_regs_bd71815 = { + .vbat_avg = BD71815_REG_VM_SA_VBAT_U, + /* BD71815 does not have separate current and current avg */ + .ibat = BD71815_REG_CC_CURCD_U, + .ibat_avg = BD71815_REG_CC_CURCD_U, + + .btemp_vth = BD71815_REG_VM_BTMP, + .chg_state = BD71815_REG_CHG_STATE, + .bat_temp = BD71815_REG_BAT_TEMP, + .dcin_stat = BD71815_REG_DCIN_STAT, + .dcin_collapse_limit = BD71815_REG_DCIN_CLPS, + .chg_set1 = BD71815_REG_CHG_SET1, + .chg_en = BD71815_REG_CHG_SET1, + .vbat_alm_limit_u = BD71815_REG_ALM_VBAT_TH_U, + .conf = BD71815_REG_CONF, + + .vdcin = BD71815_REG_VM_DCIN_U, +}; + +struct bd71828_power { + struct regmap *regmap; + enum rohm_chip_type chip_type; + struct device *dev; + struct power_supply *ac; + struct power_supply *bat; + + const struct pwr_regs *regs; + /* Reg val to uA */ + int curr_factor; + int rsens; + int (*get_temp)(struct bd71828_power *pwr, int *temp); + int (*bat_inserted)(struct bd71828_power *pwr); +}; + +static int bd7182x_write16(struct bd71828_power *pwr, int reg, u16 val) +{ + __be16 tmp; + + tmp = cpu_to_be16(val); + + return regmap_bulk_write(pwr->regmap, reg, &tmp, sizeof(tmp)); +} + +static int bd7182x_read16_himask(struct bd71828_power *pwr, int reg, int himask, + u16 *val) +{ + struct regmap *regmap = pwr->regmap; + int ret; + __be16 rvals; + u8 *tmp = (u8 *)&rvals; + + ret = regmap_bulk_read(regmap, reg, &rvals, sizeof(*val)); + if (!ret) { + *tmp &= himask; + *val = be16_to_cpu(rvals); + } + + return ret; +} + +static int bd71828_get_vbat(struct bd71828_power *pwr, int *vcell) +{ + u16 tmp_vcell; + int ret; + + ret = bd7182x_read16_himask(pwr, pwr->regs->vbat_avg, + BD7182x_MASK_VBAT_U, &tmp_vcell); + if (ret) + dev_err(pwr->dev, "Failed to read battery average voltage\n"); + else + *vcell = ((int)tmp_vcell) * 1000; + + return ret; +} + +static int bd71828_get_current_ds_adc(struct bd71828_power *pwr, int *curr, int *curr_avg) +{ + __be16 tmp_curr; + char *tmp = (char *)&tmp_curr; + int dir = 1; + int regs[] = { pwr->regs->ibat, pwr->regs->ibat_avg }; + int *vals[] = { curr, curr_avg }; + int ret, i; + + for (dir = 1, i = 0; i < ARRAY_SIZE(regs); i++) { + ret = regmap_bulk_read(pwr->regmap, regs[i], &tmp_curr, + sizeof(tmp_curr)); + if (ret) + break; + + if (*tmp & BD7182x_MASK_CURDIR_DISCHG) + dir = -1; + + *tmp &= BD7182x_MASK_IBAT_U; + + *vals[i] = dir * ((int)be16_to_cpu(tmp_curr)) * pwr->curr_factor; + } + + return ret; +} + +/* Unit is tenths of degree C */ +static int bd71815_get_temp(struct bd71828_power *pwr, int *temp) +{ + struct regmap *regmap = pwr->regmap; + int ret; + int t; + + ret = regmap_read(regmap, pwr->regs->btemp_vth, &t); + if (ret) + return ret; + + t = 200 - t; + + if (t > 200) { + dev_err(pwr->dev, "Failed to read battery temperature\n"); + return -ENODATA; + } + + return 0; +} + +/* Unit is tenths of degree C */ +static int bd71828_get_temp(struct bd71828_power *pwr, int *temp) +{ + u16 t; + int ret; + int tmp = 200 * 10000; + + ret = bd7182x_read16_himask(pwr, pwr->regs->btemp_vth, + BD71828_MASK_VM_BTMP_U, &t); + if (ret) + return ret; + + if (t > 3200) { + dev_err(pwr->dev, + "Failed to read battery temperature\n"); + return -ENODATA; + } + + tmp -= 625ULL * (unsigned int)t; + *temp = tmp / 1000; + + return ret; +} + +static int bd71828_charge_status(struct bd71828_power *pwr, + int *s, int *h) +{ + unsigned int state; + int status, health; + int ret = 1; + + ret = regmap_read(pwr->regmap, pwr->regs->chg_state, &state); + if (ret) { + dev_err(pwr->dev, "charger status reading failed (%d)\n", ret); + return ret; + } + + state &= BD7182x_MASK_CHG_STATE; + + dev_dbg(pwr->dev, "CHG_STATE %d\n", state); + + switch (state) { + case 0x00: + status = POWER_SUPPLY_STATUS_DISCHARGING; + health = POWER_SUPPLY_HEALTH_GOOD; + break; + case 0x01: + case 0x02: + case 0x03: + case 0x0E: + status = POWER_SUPPLY_STATUS_CHARGING; + health = POWER_SUPPLY_HEALTH_GOOD; + break; + case 0x0F: + status = POWER_SUPPLY_STATUS_FULL; + health = POWER_SUPPLY_HEALTH_GOOD; + break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + case 0x14: + case 0x20: + case 0x21: + case 0x22: + case 0x23: + case 0x24: + status = POWER_SUPPLY_STATUS_NOT_CHARGING; + health = POWER_SUPPLY_HEALTH_OVERHEAT; + break; + case 0x30: + case 0x31: + case 0x32: + case 0x40: + status = POWER_SUPPLY_STATUS_DISCHARGING; + health = POWER_SUPPLY_HEALTH_GOOD; + break; + case 0x7f: + default: + status = POWER_SUPPLY_STATUS_NOT_CHARGING; + health = POWER_SUPPLY_HEALTH_DEAD; + break; + } + + if (s) + *s = status; + if (h) + *h = health; + + return ret; +} + +static int get_chg_online(struct bd71828_power *pwr, int *chg_online) +{ + int r, ret; + + ret = regmap_read(pwr->regmap, pwr->regs->dcin_stat, &r); + if (ret) { + dev_err(pwr->dev, "Failed to read DCIN status\n"); + return ret; + } + *chg_online = ((r & BD7182x_MASK_DCIN_DET) != 0); + + return 0; +} + +static int get_bat_online(struct bd71828_power *pwr, int *bat_online) +{ + int r, ret; + + ret = regmap_read(pwr->regmap, pwr->regs->bat_temp, &r); + if (ret) { + dev_err(pwr->dev, "Failed to read battery temperature\n"); + return ret; + } + *bat_online = ((r & BD7182x_MASK_BAT_TEMP) != BAT_OPEN); + + return 0; +} + +static int bd71828_bat_inserted(struct bd71828_power *pwr) +{ + int ret, val; + + ret = regmap_read(pwr->regmap, pwr->regs->conf, &val); + if (ret) { + dev_err(pwr->dev, "Failed to read CONF register\n"); + return 0; + } + ret = val & BD7182x_MASK_CONF_PON; + + if (ret) + regmap_update_bits(pwr->regmap, pwr->regs->conf, + BD7182x_MASK_CONF_PON, 0); + + return ret; +} + +static int bd71815_bat_inserted(struct bd71828_power *pwr) +{ + int ret, val; + + ret = regmap_read(pwr->regmap, pwr->regs->conf, &val); + if (ret) { + dev_err(pwr->dev, "Failed to read CONF register\n"); + return ret; + } + + ret = !(val & BD71815_MASK_CONF_XSTB); + if (ret) + regmap_write(pwr->regmap, pwr->regs->conf, val | + BD71815_MASK_CONF_XSTB); + + return ret; +} + +static int bd71828_init_hardware(struct bd71828_power *pwr) +{ + int ret; + + /* TODO: Collapse limit should come from device-tree ? */ + ret = regmap_write(pwr->regmap, pwr->regs->dcin_collapse_limit, + BD7182x_DCIN_COLLAPSE_DEFAULT); + if (ret) { + dev_err(pwr->dev, "Failed to write DCIN collapse limit\n"); + return ret; + } + + ret = pwr->bat_inserted(pwr); + if (ret < 0) + return ret; + + if (ret) { + /* WDT_FST auto set */ + ret = regmap_update_bits(pwr->regmap, pwr->regs->chg_set1, + BD7182x_MASK_WDT_AUTO, + BD7182x_MASK_WDT_AUTO); + if (ret) + return ret; + + ret = bd7182x_write16(pwr, pwr->regs->vbat_alm_limit_u, + VBAT_LOW_TH); + if (ret) + return ret; + + /* + * On BD71815 "we mask the power-state" from relax detection. + * I am unsure what the impact of the power-state would be if + * we didn't - but this is what the vendor driver did - and + * that driver has been used in few projects so I just assume + * this is needed. + */ + if (pwr->chip_type == ROHM_CHIP_TYPE_BD71815) { + ret = regmap_set_bits(pwr->regmap, + BD71815_REG_REX_CTRL_1, + REX_PMU_STATE_MASK); + if (ret) + return ret; + } + } + + return 0; +} + +static int bd71828_charger_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct bd71828_power *pwr = dev_get_drvdata(psy->dev.parent); + u32 vot; + u16 tmp; + int online; + int ret; + + switch (psp) { + case POWER_SUPPLY_PROP_ONLINE: + ret = get_chg_online(pwr, &online); + if (!ret) + val->intval = online; + break; + case POWER_SUPPLY_PROP_VOLTAGE_NOW: + ret = bd7182x_read16_himask(pwr, pwr->regs->vdcin, + BD7182x_MASK_VDCIN_U, &tmp); + if (ret) + return ret; + + vot = tmp; + /* 5 milli volt steps */ + val->intval = 5000 * vot; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int bd71828_battery_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct bd71828_power *pwr = dev_get_drvdata(psy->dev.parent); + int ret = 0; + int status, health, tmp, curr, curr_avg, chg_en; + + if (psp == POWER_SUPPLY_PROP_STATUS || + psp == POWER_SUPPLY_PROP_HEALTH || + psp == POWER_SUPPLY_PROP_CHARGE_TYPE) + ret = bd71828_charge_status(pwr, &status, &health); + else if (psp == POWER_SUPPLY_PROP_CURRENT_AVG || + psp == POWER_SUPPLY_PROP_CURRENT_NOW) + ret = bd71828_get_current_ds_adc(pwr, &curr, &curr_avg); + if (ret) + return ret; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + val->intval = status; + break; + case POWER_SUPPLY_PROP_HEALTH: + val->intval = health; + break; + case POWER_SUPPLY_PROP_PRESENT: + ret = get_bat_online(pwr, &tmp); + if (!ret) + val->intval = tmp; + break; + case POWER_SUPPLY_PROP_VOLTAGE_NOW: + ret = bd71828_get_vbat(pwr, &tmp); + val->intval = tmp; + break; + case POWER_SUPPLY_PROP_TECHNOLOGY: + val->intval = POWER_SUPPLY_TECHNOLOGY_LION; + break; + case POWER_SUPPLY_PROP_CURRENT_AVG: + val->intval = curr_avg; + break; + case POWER_SUPPLY_PROP_CURRENT_NOW: + val->intval = curr; + break; + case POWER_SUPPLY_PROP_CURRENT_MAX: + val->intval = MAX_CURRENT_DEFAULT; + break; + case POWER_SUPPLY_PROP_TEMP: + ret = pwr->get_temp(pwr, &val->intval); + break; + case POWER_SUPPLY_PROP_CHARGE_BEHAVIOUR: + ret = regmap_read(pwr->regmap, pwr->regs->chg_en, &chg_en); + if (ret) + return ret; + + val->intval = (chg_en & BD7182x_MASK_CHG_EN) ? + POWER_SUPPLY_CHARGE_BEHAVIOUR_AUTO : + POWER_SUPPLY_CHARGE_BEHAVIOUR_INHIBIT_CHARGE; + break; + default: + ret = -EINVAL; + break; + } + + return ret; +} + +static int bd71828_battery_set_property(struct power_supply *psy, + enum power_supply_property psp, + const union power_supply_propval *val) +{ + struct bd71828_power *pwr = dev_get_drvdata(psy->dev.parent); + int ret = 0; + + switch (psp) { + case POWER_SUPPLY_PROP_CHARGE_BEHAVIOUR: + if (val->intval == POWER_SUPPLY_CHARGE_BEHAVIOUR_AUTO) + ret = regmap_update_bits(pwr->regmap, pwr->regs->chg_en, + BD7182x_MASK_CHG_EN, + BD7182x_MASK_CHG_EN); + else + ret = regmap_update_bits(pwr->regmap, pwr->regs->chg_en, + BD7182x_MASK_CHG_EN, + 0); + break; + default: + return -EINVAL; + } + + return ret; +} + +static int bd71828_battery_property_is_writeable(struct power_supply *psy, + enum power_supply_property psp) +{ + switch (psp) { + case POWER_SUPPLY_PROP_CHARGE_BEHAVIOUR: + return true; + default: + return false; + } +} + +/** @brief ac properties */ +static const enum power_supply_property bd71828_charger_props[] = { + POWER_SUPPLY_PROP_ONLINE, + POWER_SUPPLY_PROP_VOLTAGE_NOW, +}; + +static const enum power_supply_property bd71828_battery_props[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_PRESENT, + POWER_SUPPLY_PROP_TECHNOLOGY, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_CURRENT_AVG, + POWER_SUPPLY_PROP_CURRENT_NOW, + POWER_SUPPLY_PROP_CURRENT_MAX, + POWER_SUPPLY_PROP_CHARGE_BEHAVIOUR, +}; + +/** @brief powers supplied by bd71828_ac */ +static char *bd71828_ac_supplied_to[] = { + BAT_NAME, +}; + +static const struct power_supply_desc bd71828_ac_desc = { + .name = AC_NAME, + .type = POWER_SUPPLY_TYPE_MAINS, + .properties = bd71828_charger_props, + .num_properties = ARRAY_SIZE(bd71828_charger_props), + .get_property = bd71828_charger_get_property, +}; + +static const struct power_supply_desc bd71828_bat_desc = { + .name = BAT_NAME, + .type = POWER_SUPPLY_TYPE_BATTERY, + .charge_behaviours = BIT(POWER_SUPPLY_CHARGE_BEHAVIOUR_AUTO) | + BIT(POWER_SUPPLY_CHARGE_BEHAVIOUR_INHIBIT_CHARGE), + .properties = bd71828_battery_props, + .num_properties = ARRAY_SIZE(bd71828_battery_props), + .get_property = bd71828_battery_get_property, + .set_property = bd71828_battery_set_property, + .property_is_writeable = bd71828_battery_property_is_writeable, +}; + +#define RSENS_CURR 10000000LLU + +#define BD_ISR_NAME(name) \ +bd7181x_##name##_isr + +#define BD_ISR_BAT(name, print, run_gauge) \ +static irqreturn_t BD_ISR_NAME(name)(int irq, void *data) \ +{ \ + struct bd71828_power *pwr = (struct bd71828_power *)data; \ + \ + dev_dbg(pwr->dev, "%s\n", print); \ + power_supply_changed(pwr->bat); \ + \ + return IRQ_HANDLED; \ +} + +#define BD_ISR_AC(name, print, run_gauge) \ +static irqreturn_t BD_ISR_NAME(name)(int irq, void *data) \ +{ \ + struct bd71828_power *pwr = (struct bd71828_power *)data; \ + \ + power_supply_changed(pwr->ac); \ + dev_dbg(pwr->dev, "%s\n", print); \ + power_supply_changed(pwr->bat); \ + \ + return IRQ_HANDLED; \ +} + +#define BD_ISR_DUMMY(name, print) \ +static irqreturn_t BD_ISR_NAME(name)(int irq, void *data) \ +{ \ + struct bd71828_power *pwr = (struct bd71828_power *)data; \ + \ + dev_dbg(pwr->dev, "%s\n", print); \ + \ + return IRQ_HANDLED; \ +} + +BD_ISR_BAT(chg_state_changed, "CHG state changed", true) +/* DCIN voltage changes */ +BD_ISR_AC(dcin_removed, "DCIN removed", true) +BD_ISR_AC(clps_out, "DCIN voltage back to normal", true) +BD_ISR_AC(clps_in, "DCIN voltage collapsed", false) +BD_ISR_AC(dcin_ovp_res, "DCIN voltage normal", true) +BD_ISR_AC(dcin_ovp_det, "DCIN OVER VOLTAGE", true) + +BD_ISR_DUMMY(dcin_mon_det, "DCIN voltage below threshold") +BD_ISR_DUMMY(dcin_mon_res, "DCIN voltage above threshold") + +BD_ISR_DUMMY(vsys_uv_res, "VSYS under-voltage cleared") +BD_ISR_DUMMY(vsys_uv_det, "VSYS under-voltage") +BD_ISR_DUMMY(vsys_low_res, "'VSYS low' cleared") +BD_ISR_DUMMY(vsys_low_det, "VSYS low") +BD_ISR_DUMMY(vsys_mon_res, "VSYS mon - resumed") +BD_ISR_DUMMY(vsys_mon_det, "VSYS mon - detected") +BD_ISR_BAT(chg_wdg_temp, "charger temperature watchdog triggered", true) +BD_ISR_BAT(chg_wdg, "charging watchdog triggered", true) +BD_ISR_BAT(bat_removed, "Battery removed", true) +BD_ISR_BAT(bat_det, "Battery detected", true) +/* TODO: Verify the meaning of these interrupts */ +BD_ISR_BAT(rechg_det, "Recharging", true) +BD_ISR_BAT(rechg_res, "Recharge ending", true) +BD_ISR_DUMMY(temp_transit, "Temperature transition") +BD_ISR_BAT(therm_rmv, "bd71815-therm-rmv", false) +BD_ISR_BAT(therm_det, "bd71815-therm-det", true) +BD_ISR_BAT(bat_dead, "bd71815-bat-dead", false) +BD_ISR_BAT(bat_short_res, "bd71815-bat-short-res", true) +BD_ISR_BAT(bat_short, "bd71815-bat-short-det", false) +BD_ISR_BAT(bat_low_res, "bd71815-bat-low-res", true) +BD_ISR_BAT(bat_low, "bd71815-bat-low-det", true) +BD_ISR_BAT(bat_ov_res, "bd71815-bat-over-res", true) +/* What should we do here? */ +BD_ISR_BAT(bat_ov, "bd71815-bat-over-det", false) +BD_ISR_BAT(bat_mon_res, "bd71815-bat-mon-res", true) +BD_ISR_BAT(bat_mon, "bd71815-bat-mon-det", true) +BD_ISR_BAT(bat_cc_mon, "bd71815-bat-cc-mon2", false) +BD_ISR_BAT(bat_oc1_res, "bd71815-bat-oc1-res", true) +BD_ISR_BAT(bat_oc1, "bd71815-bat-oc1-det", false) +BD_ISR_BAT(bat_oc2_res, "bd71815-bat-oc2-res", true) +BD_ISR_BAT(bat_oc2, "bd71815-bat-oc2-det", false) +BD_ISR_BAT(bat_oc3_res, "bd71815-bat-oc3-res", true) +BD_ISR_BAT(bat_oc3, "bd71815-bat-oc3-det", false) +BD_ISR_BAT(temp_bat_low_res, "bd71815-temp-bat-low-res", true) +BD_ISR_BAT(temp_bat_low, "bd71815-temp-bat-low-det", true) +BD_ISR_BAT(temp_bat_hi_res, "bd71815-temp-bat-hi-res", true) +BD_ISR_BAT(temp_bat_hi, "bd71815-temp-bat-hi-det", true) + +static irqreturn_t bd7182x_dcin_removed(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + power_supply_changed(pwr->ac); + dev_dbg(pwr->dev, "DCIN removed\n"); + + return IRQ_HANDLED; +} + +static irqreturn_t bd718x7_chg_done(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +static irqreturn_t bd7182x_dcin_detected(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "DCIN inserted\n"); + power_supply_changed(pwr->ac); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_vbat_low_res(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "VBAT LOW Resumed\n"); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_vbat_low_det(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "VBAT LOW Detected\n"); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_temp_bat_hi_det(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_warn(pwr->dev, "Overtemp Detected\n"); + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_temp_bat_hi_res(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "Overtemp Resumed\n"); + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_temp_bat_low_det(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "Lowtemp Detected\n"); + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_temp_bat_low_res(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "Lowtemp Resumed\n"); + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_temp_vf_det(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "VF Detected\n"); + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_temp_vf_res(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "VF Resumed\n"); + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_temp_vf125_det(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "VF125 Detected\n"); + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +static irqreturn_t bd71828_temp_vf125_res(int irq, void *data) +{ + struct bd71828_power *pwr = (struct bd71828_power *)data; + + dev_dbg(pwr->dev, "VF125 Resumed\n"); + power_supply_changed(pwr->bat); + + return IRQ_HANDLED; +} + +struct bd7182x_irq_res { + const char *name; + irq_handler_t handler; +}; + +#define BDIRQ(na, hn) { .name = (na), .handler = (hn) } + +static int bd7182x_get_irqs(struct platform_device *pdev, + struct bd71828_power *pwr) +{ + int i, irq, ret; + static const struct bd7182x_irq_res bd71815_irqs[] = { + BDIRQ("bd71815-dcin-rmv", BD_ISR_NAME(dcin_removed)), + BDIRQ("bd71815-dcin-clps-out", BD_ISR_NAME(clps_out)), + BDIRQ("bd71815-dcin-clps-in", BD_ISR_NAME(clps_in)), + BDIRQ("bd71815-dcin-ovp-res", BD_ISR_NAME(dcin_ovp_res)), + BDIRQ("bd71815-dcin-ovp-det", BD_ISR_NAME(dcin_ovp_det)), + BDIRQ("bd71815-dcin-mon-res", BD_ISR_NAME(dcin_mon_res)), + BDIRQ("bd71815-dcin-mon-det", BD_ISR_NAME(dcin_mon_det)), + + BDIRQ("bd71815-vsys-uv-res", BD_ISR_NAME(vsys_uv_res)), + BDIRQ("bd71815-vsys-uv-det", BD_ISR_NAME(vsys_uv_det)), + BDIRQ("bd71815-vsys-low-res", BD_ISR_NAME(vsys_low_res)), + BDIRQ("bd71815-vsys-low-det", BD_ISR_NAME(vsys_low_det)), + BDIRQ("bd71815-vsys-mon-res", BD_ISR_NAME(vsys_mon_res)), + BDIRQ("bd71815-vsys-mon-det", BD_ISR_NAME(vsys_mon_det)), + BDIRQ("bd71815-chg-wdg-temp", BD_ISR_NAME(chg_wdg_temp)), + BDIRQ("bd71815-chg-wdg", BD_ISR_NAME(chg_wdg)), + BDIRQ("bd71815-rechg-det", BD_ISR_NAME(rechg_det)), + BDIRQ("bd71815-rechg-res", BD_ISR_NAME(rechg_res)), + BDIRQ("bd71815-ranged-temp-transit", BD_ISR_NAME(temp_transit)), + BDIRQ("bd71815-chg-state-change", BD_ISR_NAME(chg_state_changed)), + BDIRQ("bd71815-bat-temp-normal", bd71828_temp_bat_hi_res), + BDIRQ("bd71815-bat-temp-erange", bd71828_temp_bat_hi_det), + BDIRQ("bd71815-bat-rmv", BD_ISR_NAME(bat_removed)), + BDIRQ("bd71815-bat-det", BD_ISR_NAME(bat_det)), + + /* Add ISRs for these */ + BDIRQ("bd71815-therm-rmv", BD_ISR_NAME(therm_rmv)), + BDIRQ("bd71815-therm-det", BD_ISR_NAME(therm_det)), + BDIRQ("bd71815-bat-dead", BD_ISR_NAME(bat_dead)), + BDIRQ("bd71815-bat-short-res", BD_ISR_NAME(bat_short_res)), + BDIRQ("bd71815-bat-short-det", BD_ISR_NAME(bat_short)), + BDIRQ("bd71815-bat-low-res", BD_ISR_NAME(bat_low_res)), + BDIRQ("bd71815-bat-low-det", BD_ISR_NAME(bat_low)), + BDIRQ("bd71815-bat-over-res", BD_ISR_NAME(bat_ov_res)), + BDIRQ("bd71815-bat-over-det", BD_ISR_NAME(bat_ov)), + BDIRQ("bd71815-bat-mon-res", BD_ISR_NAME(bat_mon_res)), + BDIRQ("bd71815-bat-mon-det", BD_ISR_NAME(bat_mon)), + /* cc-mon 1 & 3 ? */ + BDIRQ("bd71815-bat-cc-mon2", BD_ISR_NAME(bat_cc_mon)), + BDIRQ("bd71815-bat-oc1-res", BD_ISR_NAME(bat_oc1_res)), + BDIRQ("bd71815-bat-oc1-det", BD_ISR_NAME(bat_oc1)), + BDIRQ("bd71815-bat-oc2-res", BD_ISR_NAME(bat_oc2_res)), + BDIRQ("bd71815-bat-oc2-det", BD_ISR_NAME(bat_oc2)), + BDIRQ("bd71815-bat-oc3-res", BD_ISR_NAME(bat_oc3_res)), + BDIRQ("bd71815-bat-oc3-det", BD_ISR_NAME(bat_oc3)), + BDIRQ("bd71815-temp-bat-low-res", BD_ISR_NAME(temp_bat_low_res)), + BDIRQ("bd71815-temp-bat-low-det", BD_ISR_NAME(temp_bat_low)), + BDIRQ("bd71815-temp-bat-hi-res", BD_ISR_NAME(temp_bat_hi_res)), + BDIRQ("bd71815-temp-bat-hi-det", BD_ISR_NAME(temp_bat_hi)), + /* + * TODO: add rest of the IRQs and re-check the handling. + * Check the bd71815-bat-cc-mon1, bd71815-bat-cc-mon3, + * bd71815-bat-low-res, bd71815-bat-low-det, + * bd71815-bat-hi-res, bd71815-bat-hi-det. + */ + }; + static const struct bd7182x_irq_res bd71828_irqs[] = { + BDIRQ("bd71828-chg-done", bd718x7_chg_done), + BDIRQ("bd71828-pwr-dcin-in", bd7182x_dcin_detected), + BDIRQ("bd71828-pwr-dcin-out", bd7182x_dcin_removed), + BDIRQ("bd71828-vbat-normal", bd71828_vbat_low_res), + BDIRQ("bd71828-vbat-low", bd71828_vbat_low_det), + BDIRQ("bd71828-btemp-hi", bd71828_temp_bat_hi_det), + BDIRQ("bd71828-btemp-cool", bd71828_temp_bat_hi_res), + BDIRQ("bd71828-btemp-lo", bd71828_temp_bat_low_det), + BDIRQ("bd71828-btemp-warm", bd71828_temp_bat_low_res), + BDIRQ("bd71828-temp-hi", bd71828_temp_vf_det), + BDIRQ("bd71828-temp-norm", bd71828_temp_vf_res), + BDIRQ("bd71828-temp-125-over", bd71828_temp_vf125_det), + BDIRQ("bd71828-temp-125-under", bd71828_temp_vf125_res), + }; + int num_irqs; + const struct bd7182x_irq_res *irqs; + + switch (pwr->chip_type) { + case ROHM_CHIP_TYPE_BD71828: + irqs = &bd71828_irqs[0]; + num_irqs = ARRAY_SIZE(bd71828_irqs); + break; + case ROHM_CHIP_TYPE_BD71815: + irqs = &bd71815_irqs[0]; + num_irqs = ARRAY_SIZE(bd71815_irqs); + break; + default: + return -EINVAL; + } + + for (i = 0; i < num_irqs; i++) { + irq = platform_get_irq_byname(pdev, irqs[i].name); + + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + irqs[i].handler, 0, + irqs[i].name, pwr); + if (ret) + break; + } + + return ret; +} + +#define RSENS_DEFAULT_30MOHM 30000 /* 30 mOhm in uOhms*/ + +static int bd7182x_get_rsens(struct bd71828_power *pwr) +{ + u64 tmp = RSENS_CURR; + int rsens_ohm = RSENS_DEFAULT_30MOHM; + struct fwnode_handle *node = NULL; + + if (pwr->dev->parent) + node = dev_fwnode(pwr->dev->parent); + + if (node) { + int ret; + u32 rs; + + ret = fwnode_property_read_u32(node, + "rohm,charger-sense-resistor-micro-ohms", + &rs); + if (ret) { + if (ret == -EINVAL) { + rs = RSENS_DEFAULT_30MOHM; + } else { + dev_err(pwr->dev, "Bad RSENS dt property\n"); + return ret; + } + } + if (!rs) { + dev_err(pwr->dev, "Bad RSENS value\n"); + return -EINVAL; + } + + rsens_ohm = (int)rs; + } + + /* Reg val to uA */ + do_div(tmp, rsens_ohm); + + pwr->curr_factor = tmp; + pwr->rsens = rsens_ohm; + dev_dbg(pwr->dev, "Setting rsens to %u micro ohm\n", pwr->rsens); + dev_dbg(pwr->dev, "Setting curr-factor to %u\n", pwr->curr_factor); + + return 0; +} + +static int bd71828_power_probe(struct platform_device *pdev) +{ + struct bd71828_power *pwr; + struct power_supply_config ac_cfg = {}; + struct power_supply_config bat_cfg = {}; + int ret; + struct regmap *regmap; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) { + dev_err(&pdev->dev, "No parent regmap\n"); + return -EINVAL; + } + + pwr = devm_kzalloc(&pdev->dev, sizeof(*pwr), GFP_KERNEL); + if (!pwr) + return -ENOMEM; + + pwr->regmap = regmap; + pwr->dev = &pdev->dev; + pwr->chip_type = platform_get_device_id(pdev)->driver_data; + + switch (pwr->chip_type) { + case ROHM_CHIP_TYPE_BD71828: + pwr->bat_inserted = bd71828_bat_inserted; + pwr->get_temp = bd71828_get_temp; + pwr->regs = &pwr_regs_bd71828; + break; + case ROHM_CHIP_TYPE_BD71815: + pwr->bat_inserted = bd71815_bat_inserted; + pwr->get_temp = bd71815_get_temp; + pwr->regs = &pwr_regs_bd71815; + break; + default: + dev_err(pwr->dev, "Unknown PMIC\n"); + return -EINVAL; + } + + ret = bd7182x_get_rsens(pwr); + if (ret) + return dev_err_probe(&pdev->dev, ret, "sense resistor missing\n"); + + dev_set_drvdata(&pdev->dev, pwr); + bd71828_init_hardware(pwr); + + bat_cfg.drv_data = pwr; + bat_cfg.fwnode = dev_fwnode(&pdev->dev); + + ac_cfg.supplied_to = bd71828_ac_supplied_to; + ac_cfg.num_supplicants = ARRAY_SIZE(bd71828_ac_supplied_to); + ac_cfg.drv_data = pwr; + + pwr->ac = devm_power_supply_register(&pdev->dev, &bd71828_ac_desc, + &ac_cfg); + if (IS_ERR(pwr->ac)) + return dev_err_probe(&pdev->dev, PTR_ERR(pwr->ac), + "failed to register ac\n"); + + pwr->bat = devm_power_supply_register(&pdev->dev, &bd71828_bat_desc, + &bat_cfg); + if (IS_ERR(pwr->bat)) + return dev_err_probe(&pdev->dev, PTR_ERR(pwr->bat), + "failed to register bat\n"); + + ret = bd7182x_get_irqs(pdev, pwr); + if (ret) + return dev_err_probe(&pdev->dev, ret, "failed to request IRQs"); + + /* Configure wakeup capable */ + device_set_wakeup_capable(pwr->dev, 1); + device_set_wakeup_enable(pwr->dev, 1); + + return 0; +} + +static const struct platform_device_id bd71828_charger_id[] = { + { "bd71815-power", ROHM_CHIP_TYPE_BD71815 }, + { "bd71828-power", ROHM_CHIP_TYPE_BD71828 }, + { }, +}; +MODULE_DEVICE_TABLE(platform, bd71828_charger_id); + +static struct platform_driver bd71828_power_driver = { + .driver = { + .name = "bd718xx-power", + }, + .probe = bd71828_power_probe, + .id_table = bd71828_charger_id, +}; + +module_platform_driver(bd71828_power_driver); + +MODULE_AUTHOR("Cong Pham <cpham2403@gmail.com>"); +MODULE_DESCRIPTION("ROHM BD718(15/28/78) PMIC Battery Charger driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/power/supply/cw2015_battery.c b/drivers/power/supply/cw2015_battery.c index 2263d5d3448f..0806abea2372 100644 --- a/drivers/power/supply/cw2015_battery.c +++ b/drivers/power/supply/cw2015_battery.c @@ -699,7 +699,13 @@ static int cw_bat_probe(struct i2c_client *client) if (!cw_bat->battery_workqueue) return -ENOMEM; - devm_delayed_work_autocancel(&client->dev, &cw_bat->battery_delay_work, cw_bat_work); + ret = devm_delayed_work_autocancel(&client->dev, &cw_bat->battery_delay_work, cw_bat_work); + if (ret) { + dev_err_probe(&client->dev, ret, + "Failed to register delayed work\n"); + return ret; + } + queue_delayed_work(cw_bat->battery_workqueue, &cw_bat->battery_delay_work, msecs_to_jiffies(10)); return 0; diff --git a/drivers/power/supply/max17040_battery.c b/drivers/power/supply/max17040_battery.c index c1640bc6accd..48453508688a 100644 --- a/drivers/power/supply/max17040_battery.c +++ b/drivers/power/supply/max17040_battery.c @@ -388,6 +388,7 @@ static int max17040_get_property(struct power_supply *psy, union power_supply_propval *val) { struct max17040_chip *chip = power_supply_get_drvdata(psy); + int ret; switch (psp) { case POWER_SUPPLY_PROP_ONLINE: @@ -410,7 +411,10 @@ static int max17040_get_property(struct power_supply *psy, if (!chip->channel_temp) return -ENODATA; - iio_read_channel_processed(chip->channel_temp, &val->intval); + ret = iio_read_channel_processed(chip->channel_temp, &val->intval); + if (ret) + return ret; + val->intval /= 100; /* Convert from milli- to deci-degree */ break; diff --git a/drivers/power/supply/max77705_charger.c b/drivers/power/supply/max77705_charger.c index b1a227bf72e2..5dd02f658f5b 100644 --- a/drivers/power/supply/max77705_charger.c +++ b/drivers/power/supply/max77705_charger.c @@ -40,6 +40,39 @@ static enum power_supply_property max77705_charger_props[] = { POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT, }; +static irqreturn_t max77705_aicl_irq(int irq, void *irq_drv_data) +{ + struct max77705_charger_data *chg = irq_drv_data; + unsigned int regval, irq_status; + int err; + + err = regmap_read(chg->regmap, MAX77705_CHG_REG_INT_OK, &irq_status); + if (err < 0) + return IRQ_HANDLED; + + // irq is fiered at the end of current decrease sequence too + // early check AICL_I bit to guard against that excess irq call + while (!(irq_status & BIT(MAX77705_AICL_I))) { + err = regmap_field_read(chg->rfield[MAX77705_CHG_CHGIN_LIM], ®val); + if (err < 0) + return IRQ_HANDLED; + + regval--; + + err = regmap_field_write(chg->rfield[MAX77705_CHG_CHGIN_LIM], regval); + if (err < 0) + return IRQ_HANDLED; + + msleep(AICL_WORK_DELAY_MS); + + err = regmap_read(chg->regmap, MAX77705_CHG_REG_INT_OK, &irq_status); + if (err < 0) + return IRQ_HANDLED; + } + + return IRQ_HANDLED; +} + static irqreturn_t max77705_chgin_irq(int irq, void *irq_drv_data) { struct max77705_charger_data *chg = irq_drv_data; @@ -60,7 +93,7 @@ static const struct regmap_irq max77705_charger_irqs[] = { REGMAP_IRQ_REG_LINE(MAX77705_AICL_I, BITS_PER_BYTE), }; -static struct regmap_irq_chip max77705_charger_irq_chip = { +static const struct regmap_irq_chip max77705_charger_irq_chip = { .name = "max77705-charger", .status_base = MAX77705_CHG_REG_INT, .mask_base = MAX77705_CHG_REG_INT_MASK, @@ -567,6 +600,7 @@ static int max77705_charger_probe(struct i2c_client *i2c) { struct power_supply_config pscfg = {}; struct max77705_charger_data *chg; + struct regmap_irq_chip *chip_desc; struct device *dev; struct regmap_irq_chip_data *irq_data; int ret; @@ -580,6 +614,13 @@ static int max77705_charger_probe(struct i2c_client *i2c) chg->dev = dev; i2c_set_clientdata(i2c, chg); + chip_desc = devm_kmemdup(dev, &max77705_charger_irq_chip, + sizeof(max77705_charger_irq_chip), + GFP_KERNEL); + if (!chip_desc) + return -ENOMEM; + chip_desc->irq_drv_data = chg; + chg->regmap = devm_regmap_init_i2c(i2c, &max77705_chg_regmap_config); if (IS_ERR(chg->regmap)) return PTR_ERR(chg->regmap); @@ -599,11 +640,9 @@ static int max77705_charger_probe(struct i2c_client *i2c) if (IS_ERR(chg->psy_chg)) return PTR_ERR(chg->psy_chg); - max77705_charger_irq_chip.irq_drv_data = chg; ret = devm_regmap_add_irq_chip(chg->dev, chg->regmap, i2c->irq, IRQF_ONESHOT, 0, - &max77705_charger_irq_chip, - &irq_data); + chip_desc, &irq_data); if (ret) return dev_err_probe(dev, ret, "failed to add irq chip\n"); @@ -632,6 +671,15 @@ static int max77705_charger_probe(struct i2c_client *i2c) goto destroy_wq; } + ret = devm_request_threaded_irq(dev, regmap_irq_get_virq(irq_data, MAX77705_AICL_I), + NULL, max77705_aicl_irq, + IRQF_TRIGGER_NONE, + "aicl-irq", chg); + if (ret) { + dev_err_probe(dev, ret, "Failed to Request aicl IRQ\n"); + goto destroy_wq; + } + ret = max77705_charger_enable(chg); if (ret) { dev_err_probe(dev, ret, "failed to enable charge\n"); diff --git a/drivers/power/supply/qcom_battmgr.c b/drivers/power/supply/qcom_battmgr.c index 3c2837ef3461..c8028606bba0 100644 --- a/drivers/power/supply/qcom_battmgr.c +++ b/drivers/power/supply/qcom_battmgr.c @@ -678,12 +678,7 @@ static int qcom_battmgr_set_charge_start_threshold(struct qcom_battmgr *battmgr, u32 target_soc, delta_soc; int ret; - if (start_soc < CHARGE_CTRL_START_THR_MIN || - start_soc > CHARGE_CTRL_START_THR_MAX) { - dev_err(battmgr->dev, "charge control start threshold exceed range: [%u - %u]\n", - CHARGE_CTRL_START_THR_MIN, CHARGE_CTRL_START_THR_MAX); - return -EINVAL; - } + start_soc = clamp(start_soc, CHARGE_CTRL_START_THR_MIN, CHARGE_CTRL_START_THR_MAX); /* * If the new start threshold is larger than the old end threshold, @@ -716,12 +711,7 @@ static int qcom_battmgr_set_charge_end_threshold(struct qcom_battmgr *battmgr, i u32 delta_soc = CHARGE_CTRL_DELTA_SOC; int ret; - if (end_soc < CHARGE_CTRL_END_THR_MIN || - end_soc > CHARGE_CTRL_END_THR_MAX) { - dev_err(battmgr->dev, "charge control end threshold exceed range: [%u - %u]\n", - CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_MAX); - return -EINVAL; - } + end_soc = clamp(end_soc, CHARGE_CTRL_END_THR_MIN, CHARGE_CTRL_END_THR_MAX); if (battmgr->info.charge_ctrl_start && end_soc > battmgr->info.charge_ctrl_start) delta_soc = end_soc - battmgr->info.charge_ctrl_start; diff --git a/drivers/power/supply/rt5033_charger.c b/drivers/power/supply/rt5033_charger.c index 2fdc58439707..de724f23e453 100644 --- a/drivers/power/supply/rt5033_charger.c +++ b/drivers/power/supply/rt5033_charger.c @@ -701,6 +701,8 @@ static int rt5033_charger_probe(struct platform_device *pdev) np_conn = of_parse_phandle(pdev->dev.of_node, "richtek,usb-connector", 0); np_edev = of_get_parent(np_conn); charger->edev = extcon_find_edev_by_node(np_edev); + of_node_put(np_edev); + of_node_put(np_conn); if (IS_ERR(charger->edev)) { dev_warn(charger->dev, "no extcon device found in device-tree\n"); goto out; diff --git a/drivers/power/supply/rt9467-charger.c b/drivers/power/supply/rt9467-charger.c index fe773dd8b404..44c26fb37a77 100644 --- a/drivers/power/supply/rt9467-charger.c +++ b/drivers/power/supply/rt9467-charger.c @@ -376,7 +376,7 @@ static int rt9467_set_value_from_ranges(struct rt9467_chg_data *data, if (rsel == RT9467_RANGE_VMIVR) { ret = linear_range_get_selector_high(range, value, &sel, &found); if (ret) - value = range->max_sel; + sel = range->max_sel; } else { linear_range_get_selector_within(range, value, &sel); } @@ -588,6 +588,10 @@ static int rt9467_run_aicl(struct rt9467_chg_data *data) aicl_vth = mivr_vth + RT9467_AICLVTH_GAP_uV; ret = rt9467_set_value_from_ranges(data, F_AICL_VTH, RT9467_RANGE_AICL_VTH, aicl_vth); + if (ret) { + dev_err(data->dev, "Failed to set AICL VTH\n"); + return ret; + } /* Trigger AICL function */ ret = regmap_field_write(data->rm_field[F_AICL_MEAS], 1); diff --git a/drivers/power/supply/rt9756.c b/drivers/power/supply/rt9756.c new file mode 100644 index 000000000000..f254527be653 --- /dev/null +++ b/drivers/power/supply/rt9756.c @@ -0,0 +1,955 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright (C) 2025 Richtek Technology Corp. +// +// Authors: ChiYuan Huang <cy_huang@richtek.com> + +#include <linux/atomic.h> +#include <linux/cleanup.h> +#include <linux/i2c.h> +#include <linux/kernel.h> +#include <linux/linear_range.h> +#include <linux/interrupt.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/mutex.h> +#include <linux/power_supply.h> +#include <linux/property.h> +#include <linux/regmap.h> +#include <linux/sysfs.h> +#include <linux/util_macros.h> + +#define RT9756_REG_INTFLAG1 0x0B +#define RT9756_REG_INTFLAG2 0x0D +#define RT9756_REG_INTFLAG3 0x0F +#define RT9756_REG_ADCCTL 0x11 +#define RT9756_REG_VBUSADC 0x12 +#define RT9756_REG_BC12FLAG 0x45 +#define RT9756_REG_INTFLAG4 0x49 + +/* Flag1 */ +#define RT9756_EVT_BUSOVP BIT(3) +#define RT9756_EVT_BUSOCP BIT(2) +#define RT9756_EVT_BUSUCP BIT(0) +/* Flag2 */ +#define RT9756_EVT_BATOVP BIT(7) +#define RT9756_EVT_BATOCP BIT(6) +#define RT9756_EVT_TDIEOTP BIT(3) +#define RT9756_EVT_VBUSLOW_ERR BIT(2) +#define RT9756_EVT_VAC_INSERT BIT(0) +/* Flag3 */ +#define RT9756_EVT_WDT BIT(5) +#define RT9756_EVT_VAC_UVLO BIT(4) +/* ADCCTL */ +#define RT9756_ADCEN_MASK BIT(7) +#define RT9756_ADCONCE_MASK BIT(6) +/* Bc12_flag */ +#define RT9756_EVT_BC12_DONE BIT(3) +/* Flag4 */ +#define RT9756_EVT_OUTOVP BIT(0) + +#define RICHTEK_DEVID 7 +#define RT9756_REVID 0 +#define RT9756A_REVID 1 +#define RT9757_REVID 2 +#define RT9757A_REVID 3 +#define RT9756_ADC_CONVTIME 1200 +#define RT9756_ADC_MAXWAIT 16000 + +enum rt9756_model { + MODEL_RT9756 = 0, + MODEL_RT9757, + MODEL_RT9770, + MODEL_MAX +}; + +enum rt9756_adc_chan { + ADC_VBUS = 0, + ADC_IBUS, + ADC_VBAT, + ADC_IBAT, + ADC_TDIE, + ADC_MAX_CHANNEL +}; + +enum rt9756_usb_type { + USB_NO_VBUS = 0, + USB_SDP = 2, + USB_NSTD, + USB_DCP, + USB_CDP, + MAX_USB_TYPE +}; + +enum rt9756_fields { + F_VBATOVP = 0, + F_VBATOVP_EN, + F_IBATOCP, + F_IBATOCP_EN, + F_VBUSOVP, + F_VBUSOVP_EN, + F_IBUSOCP, + F_IBUSOCP_EN, + F_SWITCHING, + F_REG_RST, + F_CHG_EN, + F_OP_MODE, + F_WDT_DIS, + F_WDT_TMR, + F_DEV_ID, + F_BC12_EN, + F_USB_STATE, + F_VBUS_STATE, + F_IBAT_RSEN, + F_REVISION, + F_MAX_FIELD +}; + +enum rt9756_ranges { + R_VBATOVP = 0, + R_IBATOCP, + R_VBUSOVP, + R_IBUSOCP, + R_MAX_RANGE +}; + +static const struct reg_field rt9756_chg_fields[F_MAX_FIELD] = { + [F_VBATOVP] = REG_FIELD(0x08, 0, 4), + [F_VBATOVP_EN] = REG_FIELD(0x08, 7, 7), + [F_IBATOCP] = REG_FIELD(0x09, 0, 5), + [F_IBATOCP_EN] = REG_FIELD(0x09, 7, 7), + [F_VBUSOVP] = REG_FIELD(0x06, 0, 5), + [F_VBUSOVP_EN] = REG_FIELD(0x06, 7, 7), + [F_IBUSOCP] = REG_FIELD(0x07, 0, 4), + [F_IBUSOCP_EN] = REG_FIELD(0x07, 5, 5), + [F_SWITCHING] = REG_FIELD(0x5c, 7, 7), + [F_REG_RST] = REG_FIELD(0x00, 7, 7), + [F_CHG_EN] = REG_FIELD(0x00, 6, 6), + [F_OP_MODE] = REG_FIELD(0x00, 5, 5), + [F_WDT_DIS] = REG_FIELD(0x00, 3, 3), + [F_WDT_TMR] = REG_FIELD(0x00, 0, 2), + [F_DEV_ID] = REG_FIELD(0x03, 0, 3), + [F_BC12_EN] = REG_FIELD(0x44, 7, 7), + [F_USB_STATE] = REG_FIELD(0x46, 5, 7), + [F_VBUS_STATE] = REG_FIELD(0x4c, 0, 0), + [F_IBAT_RSEN] = REG_FIELD(0x5e, 0, 1), + [F_REVISION] = REG_FIELD(0x62, 0, 1), +}; + +static const struct reg_field rt9770_chg_fields[F_MAX_FIELD] = { + [F_VBATOVP] = REG_FIELD(0x08, 0, 4), + [F_VBATOVP_EN] = REG_FIELD(0x08, 7, 7), + [F_IBATOCP] = REG_FIELD(0x09, 0, 5), + [F_IBATOCP_EN] = REG_FIELD(0x09, 7, 7), + [F_VBUSOVP] = REG_FIELD(0x06, 0, 5), + [F_VBUSOVP_EN] = REG_FIELD(0x06, 7, 7), + [F_IBUSOCP] = REG_FIELD(0x07, 0, 4), + [F_IBUSOCP_EN] = REG_FIELD(0x07, 5, 5), + [F_SWITCHING] = REG_FIELD(0x5c, 7, 7), + [F_REG_RST] = REG_FIELD(0x00, 7, 7), + [F_CHG_EN] = REG_FIELD(0x00, 6, 6), + [F_OP_MODE] = REG_FIELD(0x00, 5, 5), + [F_WDT_DIS] = REG_FIELD(0x00, 3, 3), + [F_WDT_TMR] = REG_FIELD(0x00, 0, 2), + [F_DEV_ID] = REG_FIELD(0x60, 0, 3), + [F_BC12_EN] = REG_FIELD(0x03, 7, 7), + [F_USB_STATE] = REG_FIELD(0x02, 5, 7), + [F_VBUS_STATE] = REG_FIELD(0x4c, 0, 0), + [F_IBAT_RSEN] = REG_FIELD(0x5e, 0, 1), + [F_REVISION] = REG_FIELD(0x62, 3, 7), +}; + +/* All converted to microvolt or microamp */ +static const struct linear_range rt9756_chg_ranges[R_MAX_RANGE] = { + LINEAR_RANGE_IDX(R_VBATOVP, 4200000, 0, 31, 25000), + LINEAR_RANGE_IDX(R_IBATOCP, 2000000, 0, 63, 100000), + LINEAR_RANGE_IDX(R_VBUSOVP, 3000000, 0, 63, 50000), + LINEAR_RANGE_IDX(R_IBUSOCP, 1000000, 0, 31, 250000), +}; + +struct charger_event { + unsigned int flag1; + unsigned int flag2; + unsigned int flag3; + unsigned int flag4; +}; + +struct rt9756_data { + struct device *dev; + struct regmap *regmap; + struct regmap_field *rm_fields[F_MAX_FIELD]; + struct power_supply *psy; + struct power_supply *bat_psy; + struct mutex adc_lock; + struct power_supply_desc psy_desc; + struct power_supply_desc bat_psy_desc; + struct charger_event chg_evt; + unsigned int rg_resistor; + unsigned int real_resistor; + enum rt9756_model model; + atomic_t usb_type; +}; + +struct rt975x_dev_data { + const struct regmap_config *regmap_config; + const struct reg_field *reg_fields; + const struct reg_sequence *init_regs; + size_t num_init_regs; + int (*check_device_model)(struct rt9756_data *data); +}; + +static int rt9756_get_value_field_range(struct rt9756_data *data, enum rt9756_fields en_field, + enum rt9756_fields field, enum rt9756_ranges rsel, int *val) +{ + const struct linear_range *range = rt9756_chg_ranges + rsel; + unsigned int enable, selector, value; + int ret; + + ret = regmap_field_read(data->rm_fields[en_field], &enable); + if (ret) + return ret; + + if (!enable) { + *val = 0; + return 0; + } + + ret = regmap_field_read(data->rm_fields[field], &selector); + if (ret) + return ret; + + ret = linear_range_get_value(range, selector, &value); + if (ret) + return ret; + + *val = (int)value; + + return 0; +} + +static int rt9756_set_value_field_range(struct rt9756_data *data, enum rt9756_fields en_field, + enum rt9756_fields field, enum rt9756_ranges rsel, int val) +{ + const struct linear_range *range = rt9756_chg_ranges + rsel; + unsigned int selector, value; + int ret; + + if (!val) + return regmap_field_write(data->rm_fields[en_field], 0); + + value = (unsigned int)val; + linear_range_get_selector_within(range, value, &selector); + ret = regmap_field_write(data->rm_fields[field], selector); + if (ret) + return ret; + + return regmap_field_write(data->rm_fields[en_field], 1); +} + +static int rt9756_get_adc(struct rt9756_data *data, enum rt9756_adc_chan chan, + int *val) +{ + struct regmap *regmap = data->regmap; + unsigned int reg_addr = RT9756_REG_VBUSADC + chan * 2; + unsigned int mask = RT9756_ADCEN_MASK | RT9756_ADCONCE_MASK; + unsigned int shift = 0, adc_cntl; + __be16 raws; + int scale, offset = 0, ret; + + guard(mutex)(&data->adc_lock); + + ret = regmap_update_bits(regmap, RT9756_REG_ADCCTL, mask, mask); + if (ret) + return ret; + + ret = regmap_read_poll_timeout(regmap, RT9756_REG_ADCCTL, adc_cntl, + !(adc_cntl & RT9756_ADCEN_MASK), + RT9756_ADC_CONVTIME, RT9756_ADC_MAXWAIT); + if (ret && ret != -ETIMEDOUT) + return ret; + + ret = regmap_raw_read(regmap, reg_addr, &raws, sizeof(raws)); + if (ret) + return ret; + + /* + * TDIE LSB 1'c, others LSB 1000uV or 1000uA. + * Rsense ratio is needed for IBAT channel + */ + if (chan == ADC_TDIE) { + scale = 10; + shift = 8; + offset = -40; + } else if (chan == ADC_IBAT) + scale = 1000 * data->rg_resistor / data->real_resistor; + else + scale = 1000; + + *val = ((be16_to_cpu(raws) >> shift) + offset) * scale; + + return regmap_update_bits(regmap, RT9756_REG_ADCCTL, mask, 0); +} + +static int rt9756_get_switching_state(struct rt9756_data *data, int *status) +{ + unsigned int switching_state; + int ret; + + ret = regmap_field_read(data->rm_fields[F_SWITCHING], &switching_state); + if (ret) + return ret; + + if (switching_state) + *status = POWER_SUPPLY_STATUS_CHARGING; + else + *status = POWER_SUPPLY_STATUS_NOT_CHARGING; + + return 0; +} + +static int rt9756_get_charger_health(struct rt9756_data *data) +{ + struct charger_event *evt = &data->chg_evt; + + if (evt->flag2 & RT9756_EVT_VBUSLOW_ERR) + return POWER_SUPPLY_HEALTH_UNDERVOLTAGE; + + if (evt->flag1 & RT9756_EVT_BUSOVP || evt->flag2 & RT9756_EVT_BATOVP || + evt->flag4 & RT9756_EVT_OUTOVP) + return POWER_SUPPLY_HEALTH_OVERVOLTAGE; + + if (evt->flag1 & RT9756_EVT_BUSOCP || evt->flag2 & RT9756_EVT_BATOCP) + return POWER_SUPPLY_HEALTH_OVERCURRENT; + + if (evt->flag1 & RT9756_EVT_BUSUCP) + return POWER_SUPPLY_HEALTH_UNSPEC_FAILURE; + + if (evt->flag2 & RT9756_EVT_TDIEOTP) + return POWER_SUPPLY_HEALTH_OVERHEAT; + + if (evt->flag3 & RT9756_EVT_WDT) + return POWER_SUPPLY_HEALTH_WATCHDOG_TIMER_EXPIRE; + + return POWER_SUPPLY_HEALTH_GOOD; +} + +static int rt9756_get_charger_online(struct rt9756_data *data, int *val) +{ + unsigned int online; + int ret; + + ret = regmap_field_read(data->rm_fields[F_VBUS_STATE], &online); + if (ret) + return ret; + + *val = !!online; + return 0; +} + +static int rt9756_get_vbus_ovp(struct rt9756_data *data, int *val) +{ + unsigned int opmode; + int ovpval, ret; + + /* operating mode -> 0 bypass, 1 div2 */ + ret = regmap_field_read(data->rm_fields[F_OP_MODE], &opmode); + if (ret) + return ret; + + ret = rt9756_get_value_field_range(data, F_VBUSOVP_EN, F_VBUSOVP, R_VBUSOVP, &ovpval); + if (ret) + return ret; + + *val = opmode ? ovpval * 2 : ovpval; + return 0; +} + +static int rt9756_set_vbus_ovp(struct rt9756_data *data, int val) +{ + unsigned int opmode; + int ret; + + /* operating mode -> 0 bypass, 1 div2 */ + ret = regmap_field_read(data->rm_fields[F_OP_MODE], &opmode); + if (ret) + return ret; + + return rt9756_set_value_field_range(data, F_VBUSOVP_EN, F_VBUSOVP, R_VBUSOVP, + opmode ? val / 2 : val); +} + +static const char * const rt9756_manufacturer = "Richtek Technology Corp."; +static const char * const rt9756_model[MODEL_MAX] = { "RT9756", "RT9757", "RT9770" }; + +static int rt9756_psy_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct rt9756_data *data = power_supply_get_drvdata(psy); + int *pval = &val->intval; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + return rt9756_get_switching_state(data, pval); + case POWER_SUPPLY_PROP_HEALTH: + *pval = rt9756_get_charger_health(data); + return 0; + case POWER_SUPPLY_PROP_ONLINE: + return rt9756_get_charger_online(data, pval); + case POWER_SUPPLY_PROP_VOLTAGE_MAX: + return rt9756_get_vbus_ovp(data, pval); + case POWER_SUPPLY_PROP_VOLTAGE_NOW: + return rt9756_get_adc(data, ADC_VBUS, pval); + case POWER_SUPPLY_PROP_CURRENT_MAX: + return rt9756_get_value_field_range(data, F_IBUSOCP_EN, F_IBUSOCP, R_IBUSOCP, pval); + case POWER_SUPPLY_PROP_CURRENT_NOW: + return rt9756_get_adc(data, ADC_IBUS, pval); + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: + return rt9756_get_value_field_range(data, F_VBATOVP_EN, F_VBATOVP, R_VBATOVP, pval); + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: + return rt9756_get_value_field_range(data, F_IBATOCP_EN, F_IBATOCP, R_IBATOCP, pval); + case POWER_SUPPLY_PROP_TEMP: + return rt9756_get_adc(data, ADC_TDIE, pval); + case POWER_SUPPLY_PROP_USB_TYPE: + *pval = atomic_read(&data->usb_type); + return 0; + case POWER_SUPPLY_PROP_MODEL_NAME: + val->strval = rt9756_model[data->model]; + return 0; + case POWER_SUPPLY_PROP_MANUFACTURER: + val->strval = rt9756_manufacturer; + return 0; + default: + return -ENODATA; + } +} + +static int rt9756_psy_set_property(struct power_supply *psy, + enum power_supply_property psp, + const union power_supply_propval *val) +{ + struct rt9756_data *data = power_supply_get_drvdata(psy); + int intval = val->intval; + + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + memset(&data->chg_evt, 0, sizeof(data->chg_evt)); + return regmap_field_write(data->rm_fields[F_CHG_EN], !!intval); + case POWER_SUPPLY_PROP_VOLTAGE_MAX: + return rt9756_set_vbus_ovp(data, intval); + case POWER_SUPPLY_PROP_CURRENT_MAX: + return rt9756_set_value_field_range(data, F_IBUSOCP_EN, F_IBUSOCP, R_IBUSOCP, + intval); + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: + return rt9756_set_value_field_range(data, F_VBATOVP_EN, F_VBATOVP, R_VBATOVP, + intval); + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: + return rt9756_set_value_field_range(data, F_IBATOCP_EN, F_IBATOCP, R_IBATOCP, + intval); + case POWER_SUPPLY_PROP_USB_TYPE: + return regmap_field_write(data->rm_fields[F_BC12_EN], !!intval); + default: + return -EINVAL; + } +} + +static const enum power_supply_property rt9756_psy_properties[] = { + POWER_SUPPLY_PROP_STATUS, + POWER_SUPPLY_PROP_ONLINE, + POWER_SUPPLY_PROP_HEALTH, + POWER_SUPPLY_PROP_ONLINE, + POWER_SUPPLY_PROP_VOLTAGE_MAX, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_CURRENT_MAX, + POWER_SUPPLY_PROP_CURRENT_NOW, + POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX, + POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX, + POWER_SUPPLY_PROP_TEMP, + POWER_SUPPLY_PROP_USB_TYPE, + POWER_SUPPLY_PROP_MODEL_NAME, + POWER_SUPPLY_PROP_MANUFACTURER, +}; + +static int rt9756_bat_psy_get_property(struct power_supply *psy, + enum power_supply_property psp, + union power_supply_propval *val) +{ + struct rt9756_data *data = power_supply_get_drvdata(psy); + int *pval = &val->intval; + + switch (psp) { + case POWER_SUPPLY_PROP_TECHNOLOGY: + *pval = POWER_SUPPLY_TECHNOLOGY_LION; + return 0; + case POWER_SUPPLY_PROP_VOLTAGE_NOW: + return rt9756_get_adc(data, ADC_VBAT, pval); + case POWER_SUPPLY_PROP_CURRENT_NOW: + return rt9756_get_adc(data, ADC_IBAT, pval); + default: + return -ENODATA; + } +} + +static const enum power_supply_property rt9756_bat_psy_properties[] = { + POWER_SUPPLY_PROP_TECHNOLOGY, + POWER_SUPPLY_PROP_VOLTAGE_NOW, + POWER_SUPPLY_PROP_CURRENT_NOW, +}; + +static int rt9756_psy_property_is_writeable(struct power_supply *psy, + enum power_supply_property psp) +{ + switch (psp) { + case POWER_SUPPLY_PROP_STATUS: + case POWER_SUPPLY_PROP_ONLINE: + case POWER_SUPPLY_PROP_VOLTAGE_MAX: + case POWER_SUPPLY_PROP_CURRENT_MAX: + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_VOLTAGE_MAX: + case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX: + case POWER_SUPPLY_PROP_USB_TYPE: + return 1; + default: + return 0; + } +} + +static const unsigned int rt9756_wdt_millisecond[] = { + 500, 1000, 5000, 30000, 40000, 80000, 128000, 255000 +}; + +static ssize_t watchdog_timer_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct power_supply *psy = to_power_supply(dev); + struct rt9756_data *data = power_supply_get_drvdata(psy); + unsigned int wdt_tmr_now = 0, wdt_sel, wdt_dis; + int ret; + + ret = regmap_field_read(data->rm_fields[F_WDT_DIS], &wdt_dis); + if (ret) + return ret; + + if (!wdt_dis) { + ret = regmap_field_read(data->rm_fields[F_WDT_TMR], &wdt_sel); + if (ret) + return ret; + + wdt_tmr_now = rt9756_wdt_millisecond[wdt_sel]; + } + + return sysfs_emit(buf, "%d\n", wdt_tmr_now); +} + +static ssize_t watchdog_timer_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct power_supply *psy = to_power_supply(dev); + struct rt9756_data *data = power_supply_get_drvdata(psy); + unsigned int wdt_set, wdt_sel; + int ret; + + ret = kstrtouint(buf, 10, &wdt_set); + if (ret) + return ret; + + ret = regmap_field_write(data->rm_fields[F_WDT_DIS], 1); + if (ret) + return ret; + + wdt_sel = find_closest(wdt_set, rt9756_wdt_millisecond, + ARRAY_SIZE(rt9756_wdt_millisecond)); + + ret = regmap_field_write(data->rm_fields[F_WDT_TMR], wdt_sel); + if (ret) + return ret; + + if (wdt_set) { + ret = regmap_field_write(data->rm_fields[F_WDT_DIS], 0); + if (ret) + return ret; + } + + return count; +} + +static const char * const rt9756_opmode_str[] = { "bypass", "div2" }; + +static ssize_t operation_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct power_supply *psy = to_power_supply(dev); + struct rt9756_data *data = power_supply_get_drvdata(psy); + unsigned int opmode; + int ret; + + ret = regmap_field_read(data->rm_fields[F_OP_MODE], &opmode); + if (ret) + return ret; + + return sysfs_emit(buf, "%s\n", rt9756_opmode_str[opmode]); +} + +static ssize_t operation_mode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct power_supply *psy = to_power_supply(dev); + struct rt9756_data *data = power_supply_get_drvdata(psy); + int index, ret; + + index = sysfs_match_string(rt9756_opmode_str, buf); + if (index < 0) + return index; + + ret = regmap_field_write(data->rm_fields[F_OP_MODE], index); + + return ret ?: count; +} + +static DEVICE_ATTR_RW(watchdog_timer); +static DEVICE_ATTR_RW(operation_mode); + +static struct attribute *rt9756_sysfs_attrs[] = { + &dev_attr_watchdog_timer.attr, + &dev_attr_operation_mode.attr, + NULL +}; +ATTRIBUTE_GROUPS(rt9756_sysfs); + +static int rt9756_register_psy(struct rt9756_data *data) +{ + struct power_supply_desc *desc = &data->psy_desc; + struct power_supply_desc *bat_desc = &data->bat_psy_desc; + struct power_supply_config cfg = {}, bat_cfg = {}; + struct device *dev = data->dev; + char *psy_name, *bat_psy_name, **supplied_to; + + bat_cfg.drv_data = data; + bat_cfg.fwnode = dev_fwnode(dev); + + bat_psy_name = devm_kasprintf(dev, GFP_KERNEL, "rt9756-%s-battery", dev_name(dev)); + if (!bat_psy_name) + return -ENOMEM; + + bat_desc->name = bat_psy_name; + bat_desc->type = POWER_SUPPLY_TYPE_BATTERY; + bat_desc->properties = rt9756_bat_psy_properties; + bat_desc->num_properties = ARRAY_SIZE(rt9756_bat_psy_properties); + bat_desc->get_property = rt9756_bat_psy_get_property; + + data->bat_psy = devm_power_supply_register(dev, bat_desc, &bat_cfg); + if (IS_ERR(data->bat_psy)) + return dev_err_probe(dev, PTR_ERR(data->bat_psy), "Failed to register battery\n"); + + supplied_to = devm_kzalloc(dev, sizeof(*supplied_to), GFP_KERNEL); + if (!supplied_to) + return -ENOMEM; + + /* Link charger psy to battery psy */ + supplied_to[0] = bat_psy_name; + + cfg.drv_data = data; + cfg.fwnode = dev_fwnode(dev); + cfg.attr_grp = rt9756_sysfs_groups; + cfg.supplied_to = supplied_to; + cfg.num_supplicants = 1; + + psy_name = devm_kasprintf(dev, GFP_KERNEL, "rt9756-%s", dev_name(dev)); + if (!psy_name) + return -ENOMEM; + + desc->name = psy_name; + desc->type = POWER_SUPPLY_TYPE_USB; + desc->usb_types = BIT(POWER_SUPPLY_USB_TYPE_UNKNOWN) | BIT(POWER_SUPPLY_USB_TYPE_SDP) | + BIT(POWER_SUPPLY_USB_TYPE_DCP) | BIT(POWER_SUPPLY_USB_TYPE_CDP); + desc->properties = rt9756_psy_properties; + desc->num_properties = ARRAY_SIZE(rt9756_psy_properties); + desc->property_is_writeable = rt9756_psy_property_is_writeable; + desc->get_property = rt9756_psy_get_property; + desc->set_property = rt9756_psy_set_property; + + data->psy = devm_power_supply_register(dev, desc, &cfg); + + return PTR_ERR_OR_ZERO(data->psy); +} + +static int rt9756_get_usb_type(struct rt9756_data *data) +{ + unsigned int type; + int report_type, ret; + + ret = regmap_field_read(data->rm_fields[F_USB_STATE], &type); + if (ret) + return ret; + + switch (type) { + case USB_SDP: + case USB_NSTD: + report_type = POWER_SUPPLY_USB_TYPE_SDP; + break; + case USB_DCP: + report_type = POWER_SUPPLY_USB_TYPE_DCP; + break; + case USB_CDP: + report_type = POWER_SUPPLY_USB_TYPE_CDP; + break; + case USB_NO_VBUS: + default: + report_type = POWER_SUPPLY_USB_TYPE_UNKNOWN; + break; + } + + atomic_set(&data->usb_type, report_type); + return 0; +} + +static irqreturn_t rt9756_irq_handler(int irq, void *devid) +{ + struct rt9756_data *data = devid; + struct regmap *regmap = data->regmap; + struct charger_event *evt = &data->chg_evt; + unsigned int bc12_flag = 0; + int ret; + + ret = regmap_read(regmap, RT9756_REG_INTFLAG1, &evt->flag1); + if (ret) + return IRQ_NONE; + + ret = regmap_read(regmap, RT9756_REG_INTFLAG2, &evt->flag2); + if (ret) + return IRQ_NONE; + + ret = regmap_read(regmap, RT9756_REG_INTFLAG3, &evt->flag3); + if (ret) + return IRQ_NONE; + + if (data->model != MODEL_RT9770) { + ret = regmap_read(regmap, RT9756_REG_INTFLAG4, &evt->flag4); + if (ret) + return IRQ_NONE; + + ret = regmap_read(regmap, RT9756_REG_BC12FLAG, &bc12_flag); + if (ret) + return IRQ_NONE; + } + + dev_dbg(data->dev, "events: 0x%02x,%02x,%02x,%02x,%02x\n", evt->flag1, evt->flag2, + evt->flag3, evt->flag4, bc12_flag); + + if (evt->flag2 & RT9756_EVT_VAC_INSERT) { + ret = regmap_field_write(data->rm_fields[F_BC12_EN], 1); + if (ret) + return IRQ_NONE; + } + + if (evt->flag3 & RT9756_EVT_VAC_UVLO) + atomic_set(&data->usb_type, POWER_SUPPLY_USB_TYPE_UNKNOWN); + + if (bc12_flag & RT9756_EVT_BC12_DONE) { + ret = rt9756_get_usb_type(data); + if (ret) + return IRQ_NONE; + } + + power_supply_changed(data->psy); + + return IRQ_HANDLED; +} + +static int rt9756_config_batsense_resistor(struct rt9756_data *data) +{ + unsigned int shunt_resistor_uohms = 2000, rsense_sel; + + device_property_read_u32(data->dev, "shunt-resistor-micro-ohms", &shunt_resistor_uohms); + + if (!shunt_resistor_uohms || shunt_resistor_uohms > 5000) + return -EINVAL; + + data->real_resistor = shunt_resistor_uohms; + + /* Always choose the larger or equal one to prevent false ocp alarm */ + if (shunt_resistor_uohms <= 1000) { + rsense_sel = 0; + data->rg_resistor = 1000; + } else if (shunt_resistor_uohms <= 2000) { + rsense_sel = 1; + data->rg_resistor = 2000; + } else { + rsense_sel = 2; + data->rg_resistor = 5000; + } + + return regmap_field_write(data->rm_fields[F_IBAT_RSEN], rsense_sel); +} + +static const struct reg_sequence rt9756_init_regs[] = { + REG_SEQ(0x00, 0x80, 1000), /* REG_RESET */ + REG_SEQ0(0x04, 0x13), /* VACOVP/OVPGATE 12V */ + REG_SEQ0(0x00, 0x28), /* WDT_DIS = 1 */ + REG_SEQ0(0x0c, 0x02), /* MASK FLAG1 */ + REG_SEQ0(0x0e, 0x06), /* MASK FLAG2 */ + REG_SEQ0(0x10, 0xca), /* MASK FLAG3 */ + REG_SEQ0(0x44, 0xa0), /* BC12_EN */ + REG_SEQ0(0x47, 0x07), /* MASK BC12FLAG */ + REG_SEQ0(0x4a, 0xfe), /* MASK FLAG4 */ + REG_SEQ0(0x5c, 0x40), /* MASK CON_SWITCHING */ + REG_SEQ0(0x63, 0x01), /* MASK VDDA_UVLO */ +}; + +static const struct reg_sequence rt9770_init_regs[] = { + REG_SEQ(0x00, 0x80, 1000), /* REG_RESET */ + REG_SEQ0(0x04, 0x13), /* VACOVP/OVPGATE 12V */ + REG_SEQ0(0x00, 0x28), /* WDT_DIS = 1 */ + REG_SEQ0(0x0c, 0x02), /* MASK FLAG1 */ + REG_SEQ0(0x0e, 0x06), /* MASK FLAG2 */ + REG_SEQ0(0x10, 0xca), /* MASK FLAG3 */ + REG_SEQ0(0x5c, 0x40), /* MASK CON_SWITCHING */ + REG_SEQ0(0x63, 0x01), /* MASK VDDA_UVLO */ +}; + +static const struct regmap_config rt9756_regmap_config = { + .name = "rt9756", + .reg_bits = 16, + .val_bits = 8, + .max_register = 0x1ff, +}; + +static const struct regmap_config rt9770_regmap_config = { + .name = "rt9770", + .reg_bits = 8, + .val_bits = 8, + .max_register = 0xff, +}; + +static int rt9756_check_device_model(struct rt9756_data *data) +{ + struct device *dev = data->dev; + unsigned int revid; + int ret; + + ret = regmap_field_read(data->rm_fields[F_REVISION], &revid); + if (ret) + return dev_err_probe(dev, ret, "Failed to read revid\n"); + + if (revid == RT9757_REVID || revid == RT9757A_REVID) + data->model = MODEL_RT9757; + else if (revid == RT9756_REVID || revid == RT9756A_REVID) + data->model = MODEL_RT9756; + else + return dev_err_probe(dev, -EINVAL, "Unknown revision %d\n", revid); + + return 0; +} + +static int rt9770_check_device_model(struct rt9756_data *data) +{ + data->model = MODEL_RT9770; + return 0; +} + +static int rt9756_probe(struct i2c_client *i2c) +{ + const struct rt975x_dev_data *dev_data; + struct device *dev = &i2c->dev; + struct rt9756_data *data; + struct regmap *regmap; + unsigned int devid; + int ret; + + dev_data = device_get_match_data(dev); + if (!dev_data) + return dev_err_probe(dev, -EINVAL, "No device data found\n"); + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->dev = dev; + mutex_init(&data->adc_lock); + atomic_set(&data->usb_type, POWER_SUPPLY_USB_TYPE_UNKNOWN); + i2c_set_clientdata(i2c, data); + + regmap = devm_regmap_init_i2c(i2c, dev_data->regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n"); + + data->regmap = regmap; + + ret = devm_regmap_field_bulk_alloc(dev, regmap, data->rm_fields, dev_data->reg_fields, + F_MAX_FIELD); + if (ret) + return dev_err_probe(dev, ret, "Failed to alloc regmap fields\n"); + + /* Richtek Device ID check */ + ret = regmap_field_read(data->rm_fields[F_DEV_ID], &devid); + if (ret) + return dev_err_probe(dev, ret, "Failed to read devid\n"); + + if (devid != RICHTEK_DEVID) + return dev_err_probe(dev, -ENODEV, "Incorrect VID 0x%02x\n", devid); + + /* Get specific model */ + ret = dev_data->check_device_model(data); + if (ret) + return ret; + + ret = regmap_register_patch(regmap, dev_data->init_regs, dev_data->num_init_regs); + if (ret) + return dev_err_probe(dev, ret, "Failed to init registers\n"); + + ret = rt9756_config_batsense_resistor(data); + if (ret) + return dev_err_probe(dev, ret, "Failed to config batsense resistor\n"); + + ret = rt9756_register_psy(data); + if (ret) + return dev_err_probe(dev, ret, "Failed to init power supply\n"); + + return devm_request_threaded_irq(dev, i2c->irq, NULL, rt9756_irq_handler, IRQF_ONESHOT, + dev_name(dev), data); +} + +static void rt9756_shutdown(struct i2c_client *i2c) +{ + struct rt9756_data *data = i2c_get_clientdata(i2c); + + regmap_field_write(data->rm_fields[F_REG_RST], 1); +} + +static const struct rt975x_dev_data rt9756_dev_data = { + .regmap_config = &rt9756_regmap_config, + .reg_fields = rt9756_chg_fields, + .init_regs = rt9756_init_regs, + .num_init_regs = ARRAY_SIZE(rt9756_init_regs), + .check_device_model = rt9756_check_device_model, +}; + +static const struct rt975x_dev_data rt9770_dev_data = { + .regmap_config = &rt9770_regmap_config, + .reg_fields = rt9770_chg_fields, + .init_regs = rt9770_init_regs, + .num_init_regs = ARRAY_SIZE(rt9770_init_regs), + .check_device_model = rt9770_check_device_model, +}; + +static const struct of_device_id rt9756_device_match_table[] = { + { .compatible = "richtek,rt9756", .data = &rt9756_dev_data }, + { .compatible = "richtek,rt9770", .data = &rt9770_dev_data }, + {} +}; +MODULE_DEVICE_TABLE(of, rt9756_device_match_table); + +static struct i2c_driver rt9756_charger_driver = { + .driver = { + .name = "rt9756", + .of_match_table = rt9756_device_match_table, + }, + .probe = rt9756_probe, + .shutdown = rt9756_shutdown, +}; +module_i2c_driver(rt9756_charger_driver); + +MODULE_DESCRIPTION("Richtek RT9756 charger driver"); +MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/power/supply/wm831x_power.c b/drivers/power/supply/wm831x_power.c index 6acdba7885ca..78fa0573ef25 100644 --- a/drivers/power/supply/wm831x_power.c +++ b/drivers/power/supply/wm831x_power.c @@ -144,6 +144,7 @@ static int wm831x_usb_limit_change(struct notifier_block *nb, struct wm831x_power, usb_notify); unsigned int i, best; + int ret; /* Find the highest supported limit */ best = 0; @@ -156,8 +157,13 @@ static int wm831x_usb_limit_change(struct notifier_block *nb, dev_dbg(wm831x_power->wm831x->dev, "Limiting USB current to %umA", wm831x_usb_limits[best]); - wm831x_set_bits(wm831x_power->wm831x, WM831X_POWER_STATE, - WM831X_USB_ILIM_MASK, best); + ret = wm831x_set_bits(wm831x_power->wm831x, WM831X_POWER_STATE, + WM831X_USB_ILIM_MASK, best); + if (ret < 0) { + dev_err(wm831x_power->wm831x->dev, + "Failed to set USB current limit: %d\n", ret); + return ret; + } return 0; } diff --git a/drivers/powercap/dtpm.c b/drivers/powercap/dtpm.c index f390665743c4..129d55bc705c 100644 --- a/drivers/powercap/dtpm.c +++ b/drivers/powercap/dtpm.c @@ -548,9 +548,7 @@ static int dtpm_for_each_child(const struct dtpm_node *hierarchy, */ int dtpm_create_hierarchy(struct of_device_id *dtpm_match_table) { - const struct of_device_id *match; const struct dtpm_node *hierarchy; - struct device_node *np; int i, ret; mutex_lock(&dtpm_lock); @@ -567,19 +565,7 @@ int dtpm_create_hierarchy(struct of_device_id *dtpm_match_table) goto out_pct; } - ret = -ENODEV; - np = of_find_node_by_path("/"); - if (!np) - goto out_err; - - match = of_match_node(dtpm_match_table, np); - - of_node_put(np); - - if (!match) - goto out_err; - - hierarchy = match->data; + hierarchy = of_machine_get_match_data(dtpm_match_table); if (!hierarchy) { ret = -EFAULT; goto out_err; diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 78b7078478d4..30659115de55 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -89,6 +89,7 @@ config RESET_EYEQ config RESET_GPIO tristate "GPIO reset controller" depends on GPIOLIB + select AUXILIARY_BUS help This enables a generic reset controller for resets attached via GPIOs. Typically for OF platforms this driver expects "reset-gpios" diff --git a/drivers/reset/core.c b/drivers/reset/core.c index 22f67fc77ae5..843cffc93909 100644 --- a/drivers/reset/core.c +++ b/drivers/reset/core.c @@ -4,20 +4,22 @@ * * Copyright 2013 Philipp Zabel, Pengutronix */ + +#include <linux/acpi.h> #include <linux/atomic.h> +#include <linux/auxiliary_bus.h> #include <linux/cleanup.h> #include <linux/device.h> #include <linux/err.h> #include <linux/export.h> -#include <linux/kernel.h> -#include <linux/kref.h> #include <linux/gpio/driver.h> #include <linux/gpio/machine.h> +#include <linux/gpio/property.h> #include <linux/idr.h> +#include <linux/kernel.h> +#include <linux/kref.h> #include <linux/module.h> #include <linux/of.h> -#include <linux/acpi.h> -#include <linux/platform_device.h> #include <linux/reset.h> #include <linux/reset-controller.h> #include <linux/slab.h> @@ -76,10 +78,12 @@ struct reset_control_array { /** * struct reset_gpio_lookup - lookup key for ad-hoc created reset-gpio devices * @of_args: phandle to the reset controller with all the args like GPIO number + * @swnode: Software node containing the reference to the GPIO provider * @list: list entry for the reset_gpio_lookup_list */ struct reset_gpio_lookup { struct of_phandle_args of_args; + struct fwnode_handle *swnode; struct list_head list; }; @@ -848,56 +852,45 @@ static void __reset_control_put_internal(struct reset_control *rstc) kref_put(&rstc->refcnt, __reset_control_release); } -static int __reset_add_reset_gpio_lookup(int id, struct device_node *np, - unsigned int gpio, - unsigned int of_flags) +static void reset_gpio_aux_device_release(struct device *dev) { - const struct fwnode_handle *fwnode = of_fwnode_handle(np); - unsigned int lookup_flags; - const char *label_tmp; + struct auxiliary_device *adev = to_auxiliary_dev(dev); - /* - * Later we map GPIO flags between OF and Linux, however not all - * constants from include/dt-bindings/gpio/gpio.h and - * include/linux/gpio/machine.h match each other. - */ - if (of_flags > GPIO_ACTIVE_LOW) { - pr_err("reset-gpio code does not support GPIO flags %u for GPIO %u\n", - of_flags, gpio); - return -EINVAL; - } - - struct gpio_device *gdev __free(gpio_device_put) = gpio_device_find_by_fwnode(fwnode); - if (!gdev) - return -EPROBE_DEFER; - - label_tmp = gpio_device_get_label(gdev); - if (!label_tmp) - return -EINVAL; + kfree(adev); +} - char *label __free(kfree) = kstrdup(label_tmp, GFP_KERNEL); - if (!label) - return -ENOMEM; +static int reset_add_gpio_aux_device(struct device *parent, + struct fwnode_handle *swnode, + int id, void *pdata) +{ + struct auxiliary_device *adev; + int ret; - /* Size: one lookup entry plus sentinel */ - struct gpiod_lookup_table *lookup __free(kfree) = kzalloc(struct_size(lookup, table, 2), - GFP_KERNEL); - if (!lookup) + adev = kzalloc(sizeof(*adev), GFP_KERNEL); + if (!adev) return -ENOMEM; - lookup->dev_id = kasprintf(GFP_KERNEL, "reset-gpio.%d", id); - if (!lookup->dev_id) - return -ENOMEM; + adev->id = id; + adev->name = "gpio"; + adev->dev.parent = parent; + adev->dev.platform_data = pdata; + adev->dev.release = reset_gpio_aux_device_release; + device_set_node(&adev->dev, swnode); - lookup_flags = GPIO_PERSISTENT; - lookup_flags |= of_flags & GPIO_ACTIVE_LOW; - lookup->table[0] = GPIO_LOOKUP(no_free_ptr(label), gpio, "reset", - lookup_flags); + ret = auxiliary_device_init(adev); + if (ret) { + kfree(adev); + return ret; + } - /* Not freed on success, because it is persisent subsystem data. */ - gpiod_add_lookup_table(no_free_ptr(lookup)); + ret = __auxiliary_device_add(adev, "reset"); + if (ret) { + auxiliary_device_uninit(adev); + kfree(adev); + return ret; + } - return 0; + return ret; } /* @@ -905,8 +898,10 @@ static int __reset_add_reset_gpio_lookup(int id, struct device_node *np, */ static int __reset_add_reset_gpio_device(const struct of_phandle_args *args) { + struct property_entry properties[2] = { }; + unsigned int offset, of_flags, lflags; struct reset_gpio_lookup *rgpio_dev; - struct platform_device *pdev; + struct device *parent; int id, ret; /* @@ -925,6 +920,28 @@ static int __reset_add_reset_gpio_device(const struct of_phandle_args *args) */ lockdep_assert_not_held(&reset_list_mutex); + offset = args->args[0]; + of_flags = args->args[1]; + + /* + * Later we map GPIO flags between OF and Linux, however not all + * constants from include/dt-bindings/gpio/gpio.h and + * include/linux/gpio/machine.h match each other. + * + * FIXME: Find a better way of translating OF flags to GPIO lookup + * flags. + */ + if (of_flags > GPIO_ACTIVE_LOW) { + pr_err("reset-gpio code does not support GPIO flags %u for GPIO %u\n", + of_flags, offset); + return -EINVAL; + } + + struct gpio_device *gdev __free(gpio_device_put) = + gpio_device_find_by_fwnode(of_fwnode_handle(args->np)); + if (!gdev) + return -EPROBE_DEFER; + guard(mutex)(&reset_gpio_lookup_mutex); list_for_each_entry(rgpio_dev, &reset_gpio_lookup_list, list) { @@ -934,6 +951,10 @@ static int __reset_add_reset_gpio_device(const struct of_phandle_args *args) } } + lflags = GPIO_PERSISTENT | (of_flags & GPIO_ACTIVE_LOW); + parent = gpio_device_to_device(gdev); + properties[0] = PROPERTY_ENTRY_GPIO("reset-gpios", parent->fwnode, offset, lflags); + id = ida_alloc(&reset_gpio_ida, GFP_KERNEL); if (id < 0) return id; @@ -945,11 +966,6 @@ static int __reset_add_reset_gpio_device(const struct of_phandle_args *args) goto err_ida_free; } - ret = __reset_add_reset_gpio_lookup(id, args->np, args->args[0], - args->args[1]); - if (ret < 0) - goto err_kfree; - rgpio_dev->of_args = *args; /* * We keep the device_node reference, but of_args.np is put at the end @@ -957,20 +973,26 @@ static int __reset_add_reset_gpio_device(const struct of_phandle_args *args) * Hold reference as long as rgpio_dev memory is valid. */ of_node_get(rgpio_dev->of_args.np); - pdev = platform_device_register_data(NULL, "reset-gpio", id, - &rgpio_dev->of_args, - sizeof(rgpio_dev->of_args)); - ret = PTR_ERR_OR_ZERO(pdev); + + rgpio_dev->swnode = fwnode_create_software_node(properties, NULL); + if (IS_ERR(rgpio_dev->swnode)) { + ret = PTR_ERR(rgpio_dev->swnode); + goto err_put_of_node; + } + + ret = reset_add_gpio_aux_device(parent, rgpio_dev->swnode, id, + &rgpio_dev->of_args); if (ret) - goto err_put; + goto err_del_swnode; list_add(&rgpio_dev->list, &reset_gpio_lookup_list); return 0; -err_put: +err_del_swnode: + fwnode_remove_software_node(rgpio_dev->swnode); +err_put_of_node: of_node_put(rgpio_dev->of_args.np); -err_kfree: kfree(rgpio_dev); err_ida_free: ida_free(&reset_gpio_ida, id); diff --git a/drivers/reset/reset-gpio.c b/drivers/reset/reset-gpio.c index 2290b25b6703..e5512b3b596b 100644 --- a/drivers/reset/reset-gpio.c +++ b/drivers/reset/reset-gpio.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 +#include <linux/auxiliary_bus.h> #include <linux/gpio/consumer.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/of.h> -#include <linux/platform_device.h> #include <linux/reset-controller.h> struct reset_gpio_priv { @@ -61,9 +61,10 @@ static void reset_gpio_of_node_put(void *data) of_node_put(data); } -static int reset_gpio_probe(struct platform_device *pdev) +static int reset_gpio_probe(struct auxiliary_device *adev, + const struct auxiliary_device_id *id) { - struct device *dev = &pdev->dev; + struct device *dev = &adev->dev; struct of_phandle_args *platdata = dev_get_platdata(dev); struct reset_gpio_priv *priv; int ret; @@ -75,7 +76,7 @@ static int reset_gpio_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - platform_set_drvdata(pdev, &priv->rc); + auxiliary_set_drvdata(adev, &priv->rc); priv->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(priv->reset)) @@ -99,20 +100,20 @@ static int reset_gpio_probe(struct platform_device *pdev) return devm_reset_controller_register(dev, &priv->rc); } -static const struct platform_device_id reset_gpio_ids[] = { - { .name = "reset-gpio", }, +static const struct auxiliary_device_id reset_gpio_ids[] = { + { .name = "reset.gpio" }, {} }; -MODULE_DEVICE_TABLE(platform, reset_gpio_ids); +MODULE_DEVICE_TABLE(auxiliary, reset_gpio_ids); -static struct platform_driver reset_gpio_driver = { +static struct auxiliary_driver reset_gpio_driver = { .probe = reset_gpio_probe, .id_table = reset_gpio_ids, .driver = { .name = "reset-gpio", }, }; -module_platform_driver(reset_gpio_driver); +module_auxiliary_driver(reset_gpio_driver); MODULE_AUTHOR("Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>"); MODULE_DESCRIPTION("Generic GPIO reset driver"); diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c index 15d373bff231..0e42d22b7224 100644 --- a/drivers/soc/qcom/ubwc_config.c +++ b/drivers/soc/qcom/ubwc_config.c @@ -277,21 +277,15 @@ static const struct of_device_id qcom_ubwc_configs[] __maybe_unused = { const struct qcom_ubwc_cfg_data *qcom_ubwc_config_get_data(void) { - const struct of_device_id *match; - struct device_node *root; + const struct qcom_ubwc_cfg_data *data; - root = of_find_node_by_path("/"); - if (!root) - return ERR_PTR(-ENODEV); - - match = of_match_node(qcom_ubwc_configs, root); - of_node_put(root); - if (!match) { + data = of_machine_get_match_data(qcom_ubwc_configs); + if (!data) { pr_err("Couldn't find UBWC config data for this platform!\n"); return ERR_PTR(-EINVAL); } - return match->data; + return data; } EXPORT_SYMBOL_GPL(qcom_ubwc_config_get_data); diff --git a/drivers/soc/tegra/common.c b/drivers/soc/tegra/common.c index dff6d5ef4e46..d82b7670abb7 100644 --- a/drivers/soc/tegra/common.c +++ b/drivers/soc/tegra/common.c @@ -27,17 +27,7 @@ static const struct of_device_id tegra_machine_match[] = { bool soc_is_tegra(void) { - const struct of_device_id *match; - struct device_node *root; - - root = of_find_node_by_path("/"); - if (!root) - return false; - - match = of_match_node(tegra_machine_match, root); - of_node_put(root); - - return match != NULL; + return of_machine_device_match(tegra_machine_match); } static int tegra_core_dev_init_opp_state(struct device *dev) diff --git a/drivers/spi/spi-cs42l43.c b/drivers/spi/spi-cs42l43.c index 14307dd800b7..4b6b65f450a8 100644 --- a/drivers/spi/spi-cs42l43.c +++ b/drivers/spi/spi-cs42l43.c @@ -52,20 +52,6 @@ static struct spi_board_info amp_info_template = { .mode = SPI_MODE_0, }; -static const struct software_node cs42l43_gpiochip_swnode = { - .name = "cs42l43-pinctrl", -}; - -static const struct software_node_ref_args cs42l43_cs_refs[] = { - SOFTWARE_NODE_REFERENCE(&cs42l43_gpiochip_swnode, 0, GPIO_ACTIVE_LOW), - SOFTWARE_NODE_REFERENCE(&swnode_gpio_undefined), -}; - -static const struct property_entry cs42l43_cs_props[] = { - PROPERTY_ENTRY_REF_ARRAY("cs-gpios", cs42l43_cs_refs), - {} -}; - static int cs42l43_spi_tx(struct regmap *regmap, const u8 *buf, unsigned int len) { const u8 *end = buf + len; @@ -324,11 +310,6 @@ static void cs42l43_release_of_node(void *data) fwnode_handle_put(data); } -static void cs42l43_release_sw_node(void *data) -{ - software_node_unregister(&cs42l43_gpiochip_swnode); -} - static int cs42l43_spi_probe(struct platform_device *pdev) { struct cs42l43 *cs42l43 = dev_get_drvdata(pdev->dev.parent); @@ -391,6 +372,15 @@ static int cs42l43_spi_probe(struct platform_device *pdev) fwnode_property_read_u32(xu_fwnode, "01fa-sidecar-instances", &nsidecars); if (nsidecars) { + struct software_node_ref_args args[] = { + SOFTWARE_NODE_REFERENCE(fwnode, 0, GPIO_ACTIVE_LOW), + SOFTWARE_NODE_REFERENCE(&swnode_gpio_undefined), + }; + struct property_entry props[] = { + PROPERTY_ENTRY_REF_ARRAY("cs-gpios", args), + { } + }; + ret = fwnode_property_read_u32(xu_fwnode, "01fa-spk-id-val", &spkid); if (!ret) { dev_dbg(priv->dev, "01fa-spk-id-val = %d\n", spkid); @@ -403,17 +393,7 @@ static int cs42l43_spi_probe(struct platform_device *pdev) "Failed to get spk-id-gpios\n"); } - ret = software_node_register(&cs42l43_gpiochip_swnode); - if (ret) - return dev_err_probe(priv->dev, ret, - "Failed to register gpio swnode\n"); - - ret = devm_add_action_or_reset(priv->dev, cs42l43_release_sw_node, NULL); - if (ret) - return ret; - - ret = device_create_managed_software_node(&priv->ctlr->dev, - cs42l43_cs_props, NULL); + ret = device_create_managed_software_node(&priv->ctlr->dev, props, NULL); if (ret) return dev_err_probe(priv->dev, ret, "Failed to add swnode\n"); } else { diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c index d7c2a1a3c271..d4ee9e16332f 100644 --- a/drivers/usb/chipidea/ci_hdrc_imx.c +++ b/drivers/usb/chipidea/ci_hdrc_imx.c @@ -79,6 +79,10 @@ static const struct ci_hdrc_imx_platform_flag imx8ulp_usb_data = { CI_HDRC_HAS_PORTSC_PEC_MISSED, }; +static const struct ci_hdrc_imx_platform_flag imx95_usb_data = { + .flags = CI_HDRC_SUPPORTS_RUNTIME_PM | CI_HDRC_OUT_BAND_WAKEUP, +}; + static const struct ci_hdrc_imx_platform_flag s32g_usb_data = { .flags = CI_HDRC_DISABLE_HOST_STREAMING, }; @@ -94,6 +98,7 @@ static const struct of_device_id ci_hdrc_imx_dt_ids[] = { { .compatible = "fsl,imx7d-usb", .data = &imx7d_usb_data}, { .compatible = "fsl,imx7ulp-usb", .data = &imx7ulp_usb_data}, { .compatible = "fsl,imx8ulp-usb", .data = &imx8ulp_usb_data}, + { .compatible = "fsl,imx95-usb", .data = &imx95_usb_data}, { .compatible = "nxp,s32g2-usb", .data = &s32g_usb_data}, { /* sentinel */ } }; @@ -704,9 +709,13 @@ static int ci_hdrc_imx_suspend(struct device *dev) pinctrl_pm_select_sleep_state(dev); - if (data->wakeup_irq > 0 && device_may_wakeup(dev)) + if (data->wakeup_irq > 0 && device_may_wakeup(dev)) { enable_irq_wake(data->wakeup_irq); + if (data->plat_data->flags & CI_HDRC_OUT_BAND_WAKEUP) + device_set_out_band_wakeup(dev); + } + return ret; } diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c index 694b4a8e4e1d..70597f40b999 100644 --- a/drivers/usb/chipidea/core.c +++ b/drivers/usb/chipidea/core.c @@ -27,6 +27,7 @@ #include <linux/kernel.h> #include <linux/slab.h> #include <linux/pm_runtime.h> +#include <linux/pm_domain.h> #include <linux/pinctrl/consumer.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> @@ -915,6 +916,8 @@ struct platform_device *ci_hdrc_add_device(struct device *dev, if (ret) goto err; + dev_pm_domain_detach(&pdev->dev, false); + return pdev; err: diff --git a/drivers/usb/dwc3/dwc3-imx8mp.c b/drivers/usb/dwc3/dwc3-imx8mp.c index bce6af82f54c..225d59e9c190 100644 --- a/drivers/usb/dwc3/dwc3-imx8mp.c +++ b/drivers/usb/dwc3/dwc3-imx8mp.c @@ -334,10 +334,15 @@ static int dwc3_imx8mp_pm_suspend(struct device *dev) ret = dwc3_imx8mp_suspend(dwc3_imx, PMSG_SUSPEND); - if (device_may_wakeup(dwc3_imx->dev)) + if (device_may_wakeup(dwc3_imx->dev)) { enable_irq_wake(dwc3_imx->irq); - else + + if (device_is_compatible(dev, "fsl,imx95-dwc3")) + device_set_out_band_wakeup(dev); + + } else { clk_disable_unprepare(dwc3_imx->suspend_clk); + } clk_disable_unprepare(dwc3_imx->hsio_clk); dev_dbg(dev, "dwc3 imx8mp pm suspend.\n"); diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index d9374d208cee..a1422ddd1c22 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -156,6 +156,14 @@ config BACKLIGHT_ATMEL_LCDC If in doubt, it's safe to enable this option; it doesn't kick in unless the board's description says it's wired that way. +config BACKLIGHT_AW99706 + tristate "Backlight Driver for Awinic AW99706" + depends on I2C + select REGMAP_I2C + help + If you have a LCD backlight connected to the WLED output of AW99706 + WLED output, say Y here to enable this driver. + config BACKLIGHT_EP93XX tristate "Cirrus EP93xx Backlight Driver" depends on FB_EP93XX @@ -185,6 +193,7 @@ config BACKLIGHT_KTD253 config BACKLIGHT_KTD2801 tristate "Backlight Driver for Kinetic KTD2801" + depends on GPIOLIB || COMPILE_TEST select LEDS_EXPRESSWIRE help Say Y to enable the backlight driver for the Kinetic KTD2801 1-wire diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index dfbb169bf6ea..a5d62b018102 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_BACKLIGHT_ADP8870) += adp8870_bl.o obj-$(CONFIG_BACKLIGHT_APPLE) += apple_bl.o obj-$(CONFIG_BACKLIGHT_APPLE_DWI) += apple_dwi_bl.o obj-$(CONFIG_BACKLIGHT_AS3711) += as3711_bl.o +obj-$(CONFIG_BACKLIGHT_AW99706) += aw99706.o obj-$(CONFIG_BACKLIGHT_BD6107) += bd6107.o obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o obj-$(CONFIG_BACKLIGHT_DA903X) += da903x_bl.o diff --git a/drivers/video/backlight/aw99706.c b/drivers/video/backlight/aw99706.c new file mode 100644 index 000000000000..df5b23b2f753 --- /dev/null +++ b/drivers/video/backlight/aw99706.c @@ -0,0 +1,471 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * aw99706 - Backlight driver for the AWINIC AW99706 + * + * Copyright (C) 2025 Junjie Cao <caojunjie650@gmail.com> + * Copyright (C) 2025 Pengyu Luo <mitltlatltl@gmail.com> + * + * Based on vendor driver: + * Copyright (c) 2023 AWINIC Technology CO., LTD + */ + +#include <linux/backlight.h> +#include <linux/bitfield.h> +#include <linux/delay.h> +#include <linux/gpio.h> +#include <linux/i2c.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/regmap.h> + +#define AW99706_MAX_BRT_LVL 4095 +#define AW99706_REG_MAX 0x1F +#define AW99706_ID 0x07 + +/* registers list */ +#define AW99706_CFG0_REG 0x00 +#define AW99706_DIM_MODE_MASK GENMASK(1, 0) + +#define AW99706_CFG1_REG 0x01 +#define AW99706_SW_FREQ_MASK GENMASK(3, 0) +#define AW99706_SW_ILMT_MASK GENMASK(5, 4) + +#define AW99706_CFG2_REG 0x02 +#define AW99706_ILED_MAX_MASK GENMASK(6, 0) +#define AW99706_UVLOSEL_MASK BIT(7) + +#define AW99706_CFG3_REG 0x03 +#define AW99706_CFG4_REG 0x04 +#define AW99706_BRT_MSB_MASK GENMASK(3, 0) + +#define AW99706_CFG5_REG 0x05 +#define AW99706_BRT_LSB_MASK GENMASK(7, 0) + +#define AW99706_CFG6_REG 0x06 +#define AW99706_RAMP_CTL_MASK GENMASK(7, 6) + +#define AW99706_CFG7_REG 0x07 +#define AW99706_CFG8_REG 0x08 +#define AW99706_CFG9_REG 0x09 +#define AW99706_CFGA_REG 0x0A +#define AW99706_CFGB_REG 0x0B +#define AW99706_CFGC_REG 0x0C +#define AW99706_CFGD_REG 0x0D +#define AW99706_FLAG_REG 0x10 +#define AW99706_BACKLIGHT_EN_MASK BIT(7) + +#define AW99706_CHIPID_REG 0x11 +#define AW99706_LED_OPEN_FLAG_REG 0x12 +#define AW99706_LED_SHORT_FLAG_REG 0x13 +#define AW99706_MTPLDOSEL_REG 0x1E +#define AW99706_MTPRUN_REG 0x1F + +#define RESV 0 + +/* Boost switching frequency table, in Hz */ +static const u32 aw99706_sw_freq_tbl[] = { + RESV, RESV, RESV, RESV, 300000, 400000, 500000, 600000, + 660000, 750000, 850000, 1000000, 1200000, 1330000, 1500000, 1700000 +}; + +/* Switching current limitation table, in uA */ +static const u32 aw99706_sw_ilmt_tbl[] = { + 1500000, 2000000, 2500000, 3000000 +}; + +/* ULVO threshold table, in uV */ +static const u32 aw99706_ulvo_thres_tbl[] = { + 2200000, 5000000 +}; + +struct aw99706_dt_prop { + const char * const name; + int (*lookup)(const struct aw99706_dt_prop *prop, u32 dt_val, u8 *val); + const u32 * const lookup_tbl; + u8 tbl_size; + u8 reg; + u8 mask; + u32 def_val; +}; + +static int aw99706_dt_property_lookup(const struct aw99706_dt_prop *prop, + u32 dt_val, u8 *val) +{ + int i; + + if (!prop->lookup_tbl) { + *val = dt_val; + return 0; + } + + for (i = 0; i < prop->tbl_size; i++) + if (prop->lookup_tbl[i] == dt_val) + break; + + *val = i; + + return i == prop->tbl_size ? -1 : 0; +} + +#define MIN_ILED_MAX 5000 +#define MAX_ILED_MAX 50000 +#define STEP_ILED_MAX 500 + +static int +aw99706_dt_property_iled_max_convert(const struct aw99706_dt_prop *prop, + u32 dt_val, u8 *val) +{ + if (dt_val > MAX_ILED_MAX || dt_val < MIN_ILED_MAX) + return -1; + + *val = (dt_val - MIN_ILED_MAX) / STEP_ILED_MAX; + + return (dt_val - MIN_ILED_MAX) % STEP_ILED_MAX; +} + +static const struct aw99706_dt_prop aw99706_dt_props[] = { + { + "awinic,dim-mode", aw99706_dt_property_lookup, + NULL, 0, + AW99706_CFG0_REG, AW99706_DIM_MODE_MASK, 1, + }, + { + "awinic,sw-freq", aw99706_dt_property_lookup, + aw99706_sw_freq_tbl, ARRAY_SIZE(aw99706_sw_freq_tbl), + AW99706_CFG1_REG, AW99706_SW_FREQ_MASK, 750000, + }, + { + "awinic,sw-ilmt", aw99706_dt_property_lookup, + aw99706_sw_ilmt_tbl, ARRAY_SIZE(aw99706_sw_ilmt_tbl), + AW99706_CFG1_REG, AW99706_SW_ILMT_MASK, 3000000, + }, + { + "awinic,iled-max", aw99706_dt_property_iled_max_convert, + NULL, 0, + AW99706_CFG2_REG, AW99706_ILED_MAX_MASK, 20000, + + }, + { + "awinic,uvlo-thres", aw99706_dt_property_lookup, + aw99706_ulvo_thres_tbl, ARRAY_SIZE(aw99706_ulvo_thres_tbl), + AW99706_CFG2_REG, AW99706_UVLOSEL_MASK, 2200000, + }, + { + "awinic,ramp-ctl", aw99706_dt_property_lookup, + NULL, 0, + AW99706_CFG6_REG, AW99706_RAMP_CTL_MASK, 2, + } +}; + +struct reg_init_data { + u8 reg; + u8 mask; + u8 val; +}; + +struct aw99706_device { + struct i2c_client *client; + struct device *dev; + struct regmap *regmap; + struct backlight_device *bl_dev; + struct gpio_desc *hwen_gpio; + struct reg_init_data init_tbl[ARRAY_SIZE(aw99706_dt_props)]; + bool bl_enable; +}; + +enum reg_access { + REG_NONE_ACCESS = 0, + REG_RD_ACCESS = 1, + REG_WR_ACCESS = 2, +}; + +static const u8 aw99706_regs[AW99706_REG_MAX + 1] = { + [AW99706_CFG0_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG1_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG2_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG3_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG4_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG5_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG6_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG7_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG8_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFG9_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFGA_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFGB_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFGC_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_CFGD_REG] = REG_RD_ACCESS | REG_WR_ACCESS, + [AW99706_FLAG_REG] = REG_RD_ACCESS, + [AW99706_CHIPID_REG] = REG_RD_ACCESS, + [AW99706_LED_OPEN_FLAG_REG] = REG_RD_ACCESS, + [AW99706_LED_SHORT_FLAG_REG] = REG_RD_ACCESS, + + /* + * Write bit is dropped here, writing BIT(0) to MTPLDOSEL will unlock + * Multi-time Programmable (MTP). + */ + [AW99706_MTPLDOSEL_REG] = REG_RD_ACCESS, + [AW99706_MTPRUN_REG] = REG_NONE_ACCESS, +}; + +static bool aw99706_readable_reg(struct device *dev, unsigned int reg) +{ + return aw99706_regs[reg] & REG_RD_ACCESS; +} + +static bool aw99706_writeable_reg(struct device *dev, unsigned int reg) +{ + return aw99706_regs[reg] & REG_WR_ACCESS; +} + +static inline int aw99706_i2c_read(struct aw99706_device *aw, u8 reg, + unsigned int *val) +{ + return regmap_read(aw->regmap, reg, val); +} + +static inline int aw99706_i2c_write(struct aw99706_device *aw, u8 reg, u8 val) +{ + return regmap_write(aw->regmap, reg, val); +} + +static inline int aw99706_i2c_update_bits(struct aw99706_device *aw, u8 reg, + u8 mask, u8 val) +{ + return regmap_update_bits(aw->regmap, reg, mask, val); +} + +static void aw99706_dt_parse(struct aw99706_device *aw, + struct backlight_properties *bl_props) +{ + const struct aw99706_dt_prop *prop; + u32 dt_val; + int ret, i; + u8 val; + + for (i = 0; i < ARRAY_SIZE(aw99706_dt_props); i++) { + prop = &aw99706_dt_props[i]; + ret = device_property_read_u32(aw->dev, prop->name, &dt_val); + if (ret < 0) + dt_val = prop->def_val; + + if (prop->lookup(prop, dt_val, &val)) { + dev_warn(aw->dev, "invalid value %d for property %s, using default value %d\n", + dt_val, prop->name, prop->def_val); + + prop->lookup(prop, prop->def_val, &val); + } + + aw->init_tbl[i].reg = prop->reg; + aw->init_tbl[i].mask = prop->mask; + aw->init_tbl[i].val = val << __ffs(prop->mask); + } + + bl_props->brightness = AW99706_MAX_BRT_LVL >> 1; + bl_props->max_brightness = AW99706_MAX_BRT_LVL; + device_property_read_u32(aw->dev, "default-brightness", + &bl_props->brightness); + device_property_read_u32(aw->dev, "max-brightness", + &bl_props->max_brightness); + + if (bl_props->max_brightness > AW99706_MAX_BRT_LVL) + bl_props->max_brightness = AW99706_MAX_BRT_LVL; + + if (bl_props->brightness > bl_props->max_brightness) + bl_props->brightness = bl_props->max_brightness; +} + +static int aw99706_hw_init(struct aw99706_device *aw) +{ + int ret, i; + + gpiod_set_value_cansleep(aw->hwen_gpio, 1); + + for (i = 0; i < ARRAY_SIZE(aw->init_tbl); i++) { + ret = aw99706_i2c_update_bits(aw, aw->init_tbl[i].reg, + aw->init_tbl[i].mask, + aw->init_tbl[i].val); + if (ret < 0) { + dev_err(aw->dev, "Failed to write init data %d\n", ret); + return ret; + } + } + + return 0; +} + +static int aw99706_bl_enable(struct aw99706_device *aw, bool en) +{ + int ret; + u8 val; + + val = FIELD_PREP(AW99706_BACKLIGHT_EN_MASK, en); + ret = aw99706_i2c_update_bits(aw, AW99706_CFGD_REG, + AW99706_BACKLIGHT_EN_MASK, val); + if (ret) + dev_err(aw->dev, "Failed to enable backlight!\n"); + + return ret; +} + +static int aw99706_update_brightness(struct aw99706_device *aw, u32 brt_lvl) +{ + bool bl_enable_now = !!brt_lvl; + int ret; + + ret = aw99706_i2c_write(aw, AW99706_CFG4_REG, + (brt_lvl >> 8) & AW99706_BRT_MSB_MASK); + if (ret < 0) + return ret; + + ret = aw99706_i2c_write(aw, AW99706_CFG5_REG, + brt_lvl & AW99706_BRT_LSB_MASK); + if (ret < 0) + return ret; + + if (aw->bl_enable != bl_enable_now) { + ret = aw99706_bl_enable(aw, bl_enable_now); + if (!ret) + aw->bl_enable = bl_enable_now; + } + + return ret; +} + +static int aw99706_bl_update_status(struct backlight_device *bl) +{ + struct aw99706_device *aw = bl_get_data(bl); + + return aw99706_update_brightness(aw, bl->props.brightness); +} + +static const struct backlight_ops aw99706_bl_ops = { + .options = BL_CORE_SUSPENDRESUME, + .update_status = aw99706_bl_update_status, +}; + +static const struct regmap_config aw99706_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = AW99706_REG_MAX, + .writeable_reg = aw99706_writeable_reg, + .readable_reg = aw99706_readable_reg, +}; + +static int aw99706_chip_id_read(struct aw99706_device *aw) +{ + int ret; + unsigned int val; + + ret = aw99706_i2c_read(aw, AW99706_CHIPID_REG, &val); + if (ret < 0) + return ret; + + return val; +} + +static int aw99706_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct aw99706_device *aw; + struct backlight_device *bl_dev; + struct backlight_properties props = {}; + int ret = 0; + + aw = devm_kzalloc(dev, sizeof(*aw), GFP_KERNEL); + if (!aw) + return -ENOMEM; + + aw->client = client; + aw->dev = dev; + i2c_set_clientdata(client, aw); + + aw->regmap = devm_regmap_init_i2c(client, &aw99706_regmap_config); + if (IS_ERR(aw->regmap)) + return dev_err_probe(dev, PTR_ERR(aw->regmap), + "Failed to init regmap\n"); + + ret = aw99706_chip_id_read(aw); + if (ret != AW99706_ID) + return dev_err_probe(dev, -ENODEV, + "Unknown chip id 0x%02x\n", ret); + + aw99706_dt_parse(aw, &props); + + aw->hwen_gpio = devm_gpiod_get(aw->dev, "enable", GPIOD_OUT_LOW); + if (IS_ERR(aw->hwen_gpio)) + return dev_err_probe(dev, PTR_ERR(aw->hwen_gpio), + "Failed to get enable gpio\n"); + + ret = aw99706_hw_init(aw); + if (ret < 0) + return dev_err_probe(dev, ret, + "Failed to initialize the chip\n"); + + props.type = BACKLIGHT_RAW; + props.scale = BACKLIGHT_SCALE_LINEAR; + + bl_dev = devm_backlight_device_register(dev, "aw99706-backlight", dev, + aw, &aw99706_bl_ops, &props); + if (IS_ERR(bl_dev)) + return dev_err_probe(dev, PTR_ERR(bl_dev), + "Failed to register backlight!\n"); + + aw->bl_dev = bl_dev; + + return 0; +} + +static void aw99706_remove(struct i2c_client *client) +{ + struct aw99706_device *aw = i2c_get_clientdata(client); + + aw99706_update_brightness(aw, 0); + + msleep(50); + + gpiod_set_value_cansleep(aw->hwen_gpio, 0); +} + +static int aw99706_suspend(struct device *dev) +{ + struct aw99706_device *aw = dev_get_drvdata(dev); + + return aw99706_update_brightness(aw, 0); +} + +static int aw99706_resume(struct device *dev) +{ + struct aw99706_device *aw = dev_get_drvdata(dev); + + return aw99706_hw_init(aw); +} + +static DEFINE_SIMPLE_DEV_PM_OPS(aw99706_pm_ops, aw99706_suspend, aw99706_resume); + +static const struct i2c_device_id aw99706_ids[] = { + { "aw99706" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, aw99706_ids); + +static const struct of_device_id aw99706_match_table[] = { + { .compatible = "awinic,aw99706", }, + { } +}; +MODULE_DEVICE_TABLE(of, aw99706_match_table); + +static struct i2c_driver aw99706_i2c_driver = { + .probe = aw99706_probe, + .remove = aw99706_remove, + .id_table = aw99706_ids, + .driver = { + .name = "aw99706", + .of_match_table = aw99706_match_table, + .pm = pm_ptr(&aw99706_pm_ops), + }, +}; + +module_i2c_driver(aw99706_i2c_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("BackLight driver for aw99706"); diff --git a/drivers/video/backlight/led_bl.c b/drivers/video/backlight/led_bl.c index efc5e380669a..f7ab9b360731 100644 --- a/drivers/video/backlight/led_bl.c +++ b/drivers/video/backlight/led_bl.c @@ -211,6 +211,19 @@ static int led_bl_probe(struct platform_device *pdev) } for (i = 0; i < priv->nb_leds; i++) { + struct device_link *link; + + link = device_link_add(&pdev->dev, priv->leds[i]->dev->parent, + DL_FLAG_AUTOREMOVE_CONSUMER); + if (!link) { + dev_err(&pdev->dev, "Failed to add devlink (consumer %s, supplier %s)\n", + dev_name(&pdev->dev), dev_name(priv->leds[i]->dev->parent)); + backlight_device_unregister(priv->bl_dev); + return -EINVAL; + } + } + + for (i = 0; i < priv->nb_leds; i++) { mutex_lock(&priv->leds[i]->led_access); led_sysfs_disable(priv->leds[i]); mutex_unlock(&priv->leds[i]->led_access); |