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-rw-r--r--include/ufs/ufs.h5
-rw-r--r--include/ufs/ufs_quirks.h7
-rw-r--r--include/ufs/ufshcd.h36
-rw-r--r--include/ufs/ufshci.h25
-rw-r--r--include/ufs/unipro.h8
5 files changed, 50 insertions, 31 deletions
diff --git a/include/ufs/ufs.h b/include/ufs/ufs.h
index 245a6a829ce9..ab8f6c07b5a2 100644
--- a/include/ufs/ufs.h
+++ b/include/ufs/ufs.h
@@ -651,6 +651,11 @@ struct ufs_dev_info {
u8 rtt_cap; /* bDeviceRTTCap */
bool hid_sup;
+
+ /* Unique device ID string (manufacturer+model+serial+version+date) */
+ char *device_id;
+ u8 rpmb_io_size;
+ u8 rpmb_region_size[4];
};
#endif /* End of Header */
diff --git a/include/ufs/ufs_quirks.h b/include/ufs/ufs_quirks.h
index 83563247c36c..e9c59ec1ceae 100644
--- a/include/ufs/ufs_quirks.h
+++ b/include/ufs/ufs_quirks.h
@@ -101,13 +101,6 @@ struct ufs_dev_quirk {
#define UFS_DEVICE_QUIRK_SUPPORT_EXTENDED_FEATURES (1 << 10)
/*
- * Some UFS devices require delay after VCC power rail is turned-off.
- * Enable this quirk to introduce 5ms delays after VCC power-off during
- * suspend flow.
- */
-#define UFS_DEVICE_QUIRK_DELAY_AFTER_LPM (1 << 11)
-
-/*
* Some ufs devices may need more time to be in hibern8 before exiting.
* Enable this quirk to give it an additional 100us.
*/
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 9425cfd9d00e..19154228780b 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -78,7 +78,7 @@ struct uic_command {
const u32 argument1;
u32 argument2;
u32 argument3;
- int cmd_active;
+ bool cmd_active;
struct completion done;
};
@@ -161,7 +161,6 @@ struct ufs_pm_lvl_states {
* @ucd_prdt_dma_addr: PRDT dma address for debug
* @ucd_rsp_dma_addr: UPIU response dma address for debug
* @ucd_req_dma_addr: UPIU request dma address for debug
- * @cmd: pointer to SCSI command
* @scsi_status: SCSI status of the command
* @command_type: SCSI, UFS, Query.
* @task_tag: Task tag of the command
@@ -186,11 +185,9 @@ struct ufshcd_lrb {
dma_addr_t ucd_rsp_dma_addr;
dma_addr_t ucd_prdt_dma_addr;
- struct scsi_cmnd *cmd;
int scsi_status;
int command_type;
- int task_tag;
u8 lun; /* UPIU LUN id field is only 8-bit wide */
bool intr_cmd;
bool req_abort_skip;
@@ -239,13 +236,11 @@ struct ufs_query {
* struct ufs_dev_cmd - all assosiated fields with device management commands
* @type: device management command type - Query, NOP OUT
* @lock: lock to allow one command at a time
- * @complete: internal commands completion
* @query: Device management query information
*/
struct ufs_dev_cmd {
enum dev_cmd_type type;
struct mutex lock;
- struct completion complete;
struct ufs_query query;
};
@@ -688,6 +683,13 @@ enum ufshcd_quirks {
* single doorbell mode.
*/
UFSHCD_QUIRK_BROKEN_LSDBS_CAP = 1 << 25,
+
+ /*
+ * This quirk indicates that DME_LINKSTARTUP should not be issued a 2nd
+ * time (refer link_startup_again) after the 1st time was successful,
+ * because it causes link startup to become unreliable.
+ */
+ UFSHCD_QUIRK_PERFORM_LINK_STARTUP_ONCE = 1 << 26,
};
enum ufshcd_caps {
@@ -826,6 +828,7 @@ enum ufshcd_mcq_opr {
* @host: Scsi_Host instance of the driver
* @dev: device handle
* @ufs_device_wlun: WLUN that controls the entire UFS device.
+ * @ufs_rpmb_wlun: RPMB WLUN SCSI device
* @hwmon_device: device instance registered with the hwmon core.
* @curr_dev_pwr_mode: active UFS device power mode.
* @uic_link_state: active state of the link to the UFS device.
@@ -833,7 +836,6 @@ enum ufshcd_mcq_opr {
* @spm_lvl: desired UFS power management level during system PM.
* @pm_op_in_progress: whether or not a PM operation is in progress.
* @ahit: value of Auto-Hibernate Idle Timer register.
- * @lrb: local reference block
* @outstanding_tasks: Bits representing outstanding task requests
* @outstanding_lock: Protects @outstanding_reqs.
* @outstanding_reqs: Bits representing outstanding transfer requests
@@ -842,7 +844,6 @@ enum ufshcd_mcq_opr {
* @nutrs: Transfer Request Queue depth supported by controller
* @nortt - Max outstanding RTTs supported by controller
* @nutmrs: Task Management Queue depth supported by controller
- * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock.
* @ufs_version: UFS Version to which controller complies
* @vops: pointer to variant specific operations
* @vps: pointer to variant specific parameters
@@ -933,7 +934,6 @@ enum ufshcd_mcq_opr {
* @res: array of resource info of MCQ registers
* @mcq_base: Multi circular queue registers base address
* @uhq: array of supported hardware queues
- * @dev_cmd_queue: Queue for issuing device management commands
* @mcq_opr: MCQ operation and runtime registers
* @ufs_rtc_update_work: A work for UFS RTC periodic update
* @pm_qos_req: PM QoS request handle
@@ -941,8 +941,8 @@ enum ufshcd_mcq_opr {
* @pm_qos_mutex: synchronizes PM QoS request and status updates
* @critical_health_count: count of critical health exceptions
* @dev_lvl_exception_count: count of device level exceptions since last reset
- * @dev_lvl_exception_id: vendor specific information about the
- * device level exception event.
+ * @dev_lvl_exception_id: vendor specific information about the device level exception event.
+ * @rpmbs: list of OP-TEE RPMB devices (one per RPMB region)
*/
struct ufs_hba {
void __iomem *mmio_base;
@@ -960,6 +960,7 @@ struct ufs_hba {
struct Scsi_Host *host;
struct device *dev;
struct scsi_device *ufs_device_wlun;
+ struct scsi_device *ufs_rpmb_wlun;
#ifdef CONFIG_SCSI_UFS_HWMON
struct device *hwmon_device;
@@ -976,8 +977,6 @@ struct ufs_hba {
/* Auto-Hibernate Idle Timer register value */
u32 ahit;
- struct ufshcd_lrb *lrb;
-
unsigned long outstanding_tasks;
spinlock_t outstanding_lock;
unsigned long outstanding_reqs;
@@ -987,7 +986,6 @@ struct ufs_hba {
int nortt;
u32 mcq_capabilities;
int nutmrs;
- u32 reserved_slot;
u32 ufs_version;
const struct ufs_hba_variant_ops *vops;
struct ufs_hba_variant_params *vps;
@@ -1105,7 +1103,6 @@ struct ufs_hba {
bool mcq_esi_enabled;
void __iomem *mcq_base;
struct ufs_hw_queue *uhq;
- struct ufs_hw_queue *dev_cmd_queue;
struct ufshcd_mcq_opr_info_t mcq_opr[OPR_MAX];
struct delayed_work ufs_rtc_update_work;
@@ -1117,6 +1114,8 @@ struct ufs_hba {
int critical_health_count;
atomic_t dev_lvl_exception_count;
u64 dev_lvl_exception_id;
+ u32 vcc_off_delay_us;
+ struct list_head rpmbs;
};
/**
@@ -1295,7 +1294,6 @@ static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
void ufshcd_enable_irq(struct ufs_hba *hba);
void ufshcd_disable_irq(struct ufs_hba *hba);
-void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs);
int ufshcd_alloc_host(struct device *, struct ufs_hba **);
int ufshcd_hba_enable(struct ufs_hba *hba);
int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int);
@@ -1431,10 +1429,6 @@ static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
void ufshcd_fixup_dev_quirks(struct ufs_hba *hba,
const struct ufs_dev_quirk *fixups);
-#define SD_ASCII_STD true
-#define SD_RAW false
-int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
- u8 **buf, bool ascii);
void ufshcd_hold(struct ufs_hba *hba);
void ufshcd_release(struct ufs_hba *hba);
@@ -1487,5 +1481,7 @@ int ufshcd_write_ee_control(struct ufs_hba *hba);
int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask,
const u16 *other_mask, u16 set, u16 clr);
void ufshcd_force_error_recovery(struct ufs_hba *hba);
+void ufshcd_pm_qos_update(struct ufs_hba *hba, bool on);
+u32 ufshcd_us_to_ahit(unsigned int timer);
#endif /* End of Header */
diff --git a/include/ufs/ufshci.h b/include/ufs/ufshci.h
index e64b70132101..d36df24242a3 100644
--- a/include/ufs/ufshci.h
+++ b/include/ufs/ufshci.h
@@ -83,12 +83,14 @@ enum {
};
enum {
+ /* Submission Queue (SQ) Configuration Registers */
REG_SQATTR = 0x0,
REG_SQLBA = 0x4,
REG_SQUBA = 0x8,
REG_SQDAO = 0xC,
REG_SQISAO = 0x10,
+ /* Completion Queue (CQ) Configuration Registers */
REG_CQATTR = 0x20,
REG_CQLBA = 0x24,
REG_CQUBA = 0x28,
@@ -96,6 +98,7 @@ enum {
REG_CQISAO = 0x30,
};
+/* Operation and Runtime Registers - Submission Queues and Completion Queues */
enum {
REG_SQHP = 0x0,
REG_SQTP = 0x4,
@@ -569,10 +572,26 @@ struct cq_entry {
__le16 prd_table_offset;
/* DW 4 */
- __le32 status;
+ u8 overall_status;
+ u8 extended_error_code;
+ __le16 reserved_1;
- /* DW 5-7 */
- __le32 reserved[3];
+ /* DW 5 */
+ u8 task_tag;
+ u8 lun;
+#if defined(__BIG_ENDIAN)
+ u8 ext_iid:4;
+ u8 iid:4;
+#elif defined(__LITTLE_ENDIAN)
+ u8 iid:4;
+ u8 ext_iid:4;
+#else
+#error
+#endif
+ u8 reserved_2;
+
+ /* DW 6-7 */
+ __le32 reserved_3[2];
};
static_assert(sizeof(struct cq_entry) == 32);
diff --git a/include/ufs/unipro.h b/include/ufs/unipro.h
index 360e1245fb40..59de737490ca 100644
--- a/include/ufs/unipro.h
+++ b/include/ufs/unipro.h
@@ -111,6 +111,9 @@
#define PA_TXLINKSTARTUPHS 0x1544
#define PA_AVAILRXDATALANES 0x1540
#define PA_MINRXTRAILINGCLOCKS 0x1543
+#define PA_TXHSG1SYNCLENGTH 0x1552
+#define PA_TXHSG2SYNCLENGTH 0x1554
+#define PA_TXHSG3SYNCLENGTH 0x1556
#define PA_LOCAL_TX_LCC_ENABLE 0x155E
#define PA_ACTIVETXDATALANES 0x1560
#define PA_CONNECTEDTXDATALANES 0x1561
@@ -160,7 +163,9 @@
#define PA_PACPFRAMECOUNT 0x15C0
#define PA_PACPERRORCOUNT 0x15C1
#define PA_PHYTESTCONTROL 0x15C2
-#define PA_TXHSADAPTTYPE 0x15D4
+#define PA_TXHSG4SYNCLENGTH 0x15D0
+#define PA_TXHSADAPTTYPE 0x15D4
+#define PA_TXHSG5SYNCLENGTH 0x15D6
/* Adpat type for PA_TXHSADAPTTYPE attribute */
#define PA_REFRESH_ADAPT 0x00
@@ -174,6 +179,7 @@
#define VS_POWERSTATE 0xD083
#define VS_MPHYCFGUPDT 0xD085
#define VS_DEBUGOMC 0xD09E
+#define VS_MPHYDISABLE 0xD0C1
#define PA_GRANULARITY_MIN_VAL 1
#define PA_GRANULARITY_MAX_VAL 6
generated by cgit v1.2.3 (git 2.46.0) at 2025-12-06 10:14:56 +0000