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-rw-r--r--include/asm-cris/bitops.h69
-rw-r--r--include/asm-cris/checksum.h1
-rw-r--r--include/asm-cris/current.h2
-rw-r--r--include/asm-cris/delay.h8
-rw-r--r--include/asm-cris/io.h16
-rw-r--r--include/asm-cris/irq.h47
-rw-r--r--include/asm-cris/module.h2
-rw-r--r--include/asm-cris/pgtable.h7
-rw-r--r--include/asm-cris/processor.h3
-rw-r--r--include/asm-cris/system.h34
-rw-r--r--include/asm-cris/tlb.h1
-rw-r--r--include/asm-cris/uaccess.h201
-rw-r--r--include/asm-i386/unistd.h1
-rw-r--r--include/asm-ppc/commproc.h796
-rw-r--r--include/asm-ppc/ide.h6
-rw-r--r--include/asm-ppc/oak.h19
-rw-r--r--include/asm-ppc/spd8xx.h6
-rw-r--r--include/asm-ppc/walnut.h17
-rw-r--r--include/linux/module.h14
-rw-r--r--include/linux/pci_ids.h1
-rw-r--r--include/linux/reiserfs_fs.h16
-rw-r--r--include/linux/smbno.h17
22 files changed, 1077 insertions, 207 deletions
diff --git a/include/asm-cris/bitops.h b/include/asm-cris/bitops.h
index c00c224fb55c..86b07d546759 100644
--- a/include/asm-cris/bitops.h
+++ b/include/asm-cris/bitops.h
@@ -19,6 +19,10 @@
#include <asm/system.h>
+/* We use generic_ffs so get it; include guards resolve the possible
+ mutually inclusion. */
+#include <linux/bitops.h>
+
/*
* Some hacks to defeat gcc over-optimizations..
*/
@@ -215,33 +219,62 @@ static __inline__ int test_bit(int nr, const void *addr)
*/
/*
+ * Helper functions for the core of the ff[sz] functions, wrapping the
+ * syntactically awkward asms. The asms compute the number of leading
+ * zeroes of a bits-in-byte and byte-in-word and word-in-dword-swapped
+ * number. They differ in that the first function also inverts all bits
+ * in the input.
+ */
+static __inline__ unsigned long cris_swapnwbrlz(unsigned long w)
+{
+ /* Let's just say we return the result in the same register as the
+ input. Saying we clobber the input but can return the result
+ in another register:
+ ! __asm__ ("swapnwbr %2\n\tlz %2,%0"
+ ! : "=r,r" (res), "=r,X" (dummy) : "1,0" (w));
+ confuses gcc (sched.c, gcc from cris-dist-1.14). */
+
+ unsigned long res;
+ __asm__ ("swapnwbr %0 \n\t"
+ "lz %0,%0"
+ : "=r" (res) : "0" (w));
+ return res;
+}
+
+static __inline__ unsigned long cris_swapwbrlz(unsigned long w)
+{
+ unsigned res;
+ __asm__ ("swapwbr %0 \n\t"
+ "lz %0,%0"
+ : "=r" (res)
+ : "0" (w));
+ return res;
+}
+
+/*
* ffz = Find First Zero in word. Undefined if no zero exists,
* so code should check against ~0UL first..
*/
-static __inline__ unsigned long ffz(unsigned long word)
+static __inline__ unsigned long ffz(unsigned long w)
{
- unsigned long result = 0;
-
- while(word & 1) {
- result++;
- word >>= 1;
- }
- return result;
+ /* The generic_ffs function is used to avoid the asm when the
+ argument is a constant. */
+ return __builtin_constant_p (w)
+ ? (~w ? (unsigned long) generic_ffs ((int) ~w) - 1 : 32)
+ : cris_swapnwbrlz (w);
}
/*
- * Find first one in word. Undefined if no one exists,
- * so code should check against 0UL first..
+ * Somewhat like ffz but the equivalent of generic_ffs: in contrast to
+ * ffz we return the first one-bit *plus one*.
*/
-static __inline__ unsigned long find_first_one(unsigned long word)
+static __inline__ unsigned long ffs(unsigned long w)
{
- unsigned long result = 0;
-
- while(!(word & 1)) {
- result++;
- word >>= 1;
- }
- return result;
+ /* The generic_ffs function is used to avoid the asm when the
+ argument is a constant. */
+ return __builtin_constant_p (w)
+ ? (unsigned long) generic_ffs ((int) w)
+ : w ? cris_swapwbrlz (w) + 1 : 0;
}
/**
diff --git a/include/asm-cris/checksum.h b/include/asm-cris/checksum.h
index 4ed0f832b19d..589eb323eba3 100644
--- a/include/asm-cris/checksum.h
+++ b/include/asm-cris/checksum.h
@@ -1,4 +1,3 @@
-/* $Id: checksum.h,v 1.4 2001/06/28 03:58:36 hp Exp $ */
/* TODO: csum_tcpudp_magic could be speeded up, and csum_fold as well */
#ifndef _CRIS_CHECKSUM_H
diff --git a/include/asm-cris/current.h b/include/asm-cris/current.h
index 6b00b86b6a9d..c5cc44d537d6 100644
--- a/include/asm-cris/current.h
+++ b/include/asm-cris/current.h
@@ -6,7 +6,7 @@ struct task_struct;
static inline struct task_struct * get_current(void)
{
struct task_struct *current;
- __asm__("and.d sp,%0; ":"=r" (current) : "0" (~8191UL));
+ __asm__("and.d $sp,%0; ":"=r" (current) : "0" (~8191UL));
return current;
}
diff --git a/include/asm-cris/delay.h b/include/asm-cris/delay.h
index a9a848dd3b07..632c369c41b9 100644
--- a/include/asm-cris/delay.h
+++ b/include/asm-cris/delay.h
@@ -1,5 +1,3 @@
-/* $Id: delay.h,v 1.5 2001/06/28 04:59:25 hp Exp $ */
-
#ifndef _CRIS_DELAY_H
#define _CRIS_DELAY_H
@@ -21,12 +19,12 @@ extern void __do_delay(void); /* Special register call calling convention */
extern __inline__ void __delay(int loops)
{
__asm__ __volatile__ (
- "move.d %0,r9\n\t"
+ "move.d %0,$r9\n\t"
"beq 2f\n\t"
- "subq 1,r9\n\t"
+ "subq 1,$r9\n\t"
"1:\n\t"
"bne 1b\n\t"
- "subq 1,r9\n"
+ "subq 1,$r9\n"
"2:"
: : "g" (loops) : "r9");
}
diff --git a/include/asm-cris/io.h b/include/asm-cris/io.h
index 01c8b1dad1d9..607b6291b366 100644
--- a/include/asm-cris/io.h
+++ b/include/asm-cris/io.h
@@ -10,16 +10,16 @@
#ifdef CONFIG_SVINTO_SIM
/* Let's use the ucsim interface since it lets us do write(2, ...) */
#define SIMCOUT(s,len) \
- asm ("moveq 4,r1 \n\t" \
- "moveq 2,r10 \n\t" \
- "move.d %0,r11 \n\t" \
- "move.d %1,r12 \n\t" \
- "push irp \n\t" \
- "move 0f,irp \n\t" \
+ asm ("moveq 4,$r9 \n\t" \
+ "moveq 2,$r10 \n\t" \
+ "move.d %0,$r11 \n\t" \
+ "move.d %1,$r12 \n\t" \
+ "push $irp \n\t" \
+ "move 0f,$irp \n\t" \
"jump -6809 \n" \
"0: \n\t" \
- "pop irp" \
- : : "rm" (s), "rm" (len) : "r1","r10","r11","r12","memory")
+ "pop $irp" \
+ : : "rm" (s), "rm" (len) : "r9","r10","r11","r12","memory")
#define TRACE_ON() __extension__ \
({ int _Foofoo; __asm__ volatile ("bmod [%0],%0" : "=r" (_Foofoo) : "0" \
(255)); _Foofoo; })
diff --git a/include/asm-cris/irq.h b/include/asm-cris/irq.h
index b7eb9c363795..b1b5ada6ff5a 100644
--- a/include/asm-cris/irq.h
+++ b/include/asm-cris/irq.h
@@ -3,9 +3,6 @@
*
* Copyright (c) 2000, 2001 Axis Communications AB
*
- * Authors: Bjorn Wesen (bjornw@axis.com)
- *
- * $Id: irq.h,v 1.13 2001/07/06 18:52:08 hp Exp $
*/
#ifndef _ASM_IRQ_H
@@ -101,25 +98,25 @@ void set_break_vector(int n, irqvectptr addr);
/* SAVE_ALL saves registers so they match pt_regs */
#define SAVE_ALL \
- "move irp,[sp=sp-16]\n\t" /* push instruction pointer and fake SBFS struct */ \
- "push srp\n\t" /* push subroutine return pointer */ \
- "push dccr\n\t" /* push condition codes */ \
- "push mof\n\t" /* push multiply overflow reg */ \
+ "move $irp,[$sp=$sp-16]\n\t" /* push instruction pointer and fake SBFS struct */ \
+ "push $srp\n\t" /* push subroutine return pointer */ \
+ "push $dccr\n\t" /* push condition codes */ \
+ "push $mof\n\t" /* push multiply overflow reg */ \
"di\n\t" /* need to disable irq's at this point */\
- "subq 14*4,sp\n\t" /* make room for r0-r13 */ \
- "movem r13,[sp]\n\t" /* push the r0-r13 registers */ \
- "push r10\n\t" /* push orig_r10 */ \
- "clear.d [sp=sp-4]\n\t" /* frametype - this is a normal stackframe */
+ "subq 14*4,$sp\n\t" /* make room for r0-r13 */ \
+ "movem $r13,[$sp]\n\t" /* push the r0-r13 registers */ \
+ "push $r10\n\t" /* push orig_r10 */ \
+ "clear.d [$sp=$sp-4]\n\t" /* frametype - this is a normal stackframe */
/* BLOCK_IRQ and UNBLOCK_IRQ do the same as mask_irq and unmask_irq in irq.c */
#define BLOCK_IRQ(mask,nr) \
- "move.d " #mask ",r0\n\t" \
- "move.d r0,[0xb00000d8]\n\t"
+ "move.d " #mask ",$r0\n\t" \
+ "move.d $r0,[0xb00000d8]\n\t"
#define UNBLOCK_IRQ(mask) \
- "move.d " #mask ",r0\n\t" \
- "move.d r0,[0xb00000dc]\n\t"
+ "move.d " #mask ",$r0\n\t" \
+ "move.d $r0,[0xb00000dc]\n\t"
#define IRQ_NAME2(nr) nr##_interrupt(void)
#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
@@ -137,20 +134,20 @@ void sIRQ_NAME(nr); \
void BAD_IRQ_NAME(nr); \
__asm__ ( \
".text\n\t" \
- "_IRQ" #nr "_interrupt:\n\t" \
+ "IRQ" #nr "_interrupt:\n\t" \
SAVE_ALL \
- "_sIRQ" #nr "_interrupt:\n\t" /* shortcut for the multiple irq handler */ \
+ "sIRQ" #nr "_interrupt:\n\t" /* shortcut for the multiple irq handler */ \
BLOCK_IRQ(mask,nr) /* this must be done to prevent irq loops when we ei later */ \
- "moveq "#nr",r10\n\t" \
- "move.d sp,r11\n\t" \
- "jsr _do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \
+ "moveq "#nr",$r10\n\t" \
+ "move.d $sp,$r11\n\t" \
+ "jsr do_IRQ\n\t" /* irq.c, r10 and r11 are arguments */ \
UNBLOCK_IRQ(mask) \
- "moveq 0,r9\n\t" /* make ret_from_intr realise we came from an irq */ \
- "jump _ret_from_intr\n\t" \
- "_bad_IRQ" #nr "_interrupt:\n\t" \
- "push r0\n\t" \
+ "moveq 0,$r9\n\t" /* make ret_from_intr realise we came from an irq */ \
+ "jump ret_from_intr\n\t" \
+ "bad_IRQ" #nr "_interrupt:\n\t" \
+ "push $r0\n\t" \
BLOCK_IRQ(mask,nr) \
- "pop r0\n\t" \
+ "pop $r0\n\t" \
"reti\n\t" \
"nop\n");
diff --git a/include/asm-cris/module.h b/include/asm-cris/module.h
index 0fe7e7e77fb6..5853a11d6163 100644
--- a/include/asm-cris/module.h
+++ b/include/asm-cris/module.h
@@ -7,6 +7,6 @@
#define module_map(x) vmalloc(x)
#define module_unmap(x) vfree(x)
#define module_arch_init(x) (0)
-#define arch_init_modules(x) do { } while (0)
+#define arch_init_modules(x) do { } while (0)
#endif /* _ASM_CRIS_MODULE_H */
diff --git a/include/asm-cris/pgtable.h b/include/asm-cris/pgtable.h
index 38cb45a278d9..afe60fc7d9e5 100644
--- a/include/asm-cris/pgtable.h
+++ b/include/asm-cris/pgtable.h
@@ -3,6 +3,9 @@
* HISTORY:
*
* $Log: pgtable.h,v $
+ * Revision 1.12 2001/08/11 00:28:00 bjornw
+ * PAGE_CHG_MASK and PAGE_NONE had somewhat untraditional values
+ *
* Revision 1.11 2001/04/04 14:38:36 bjornw
* Removed bad_pagetable handling and the _kernel functions
*
@@ -215,9 +218,9 @@ static inline void flush_tlb(void)
#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
#define _PAGE_TABLE (_PAGE_PRESENT | __READABLE | __WRITEABLE)
-#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_SILENT_WRITE)
+#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED)
-#define PAGE_NONE __pgprot(_PAGE_PRESENT | __READABLE)
+#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | __READABLE | _PAGE_WRITE | \
_PAGE_ACCESSED)
#define PAGE_COPY __pgprot(_PAGE_PRESENT | __READABLE) // | _PAGE_COW
diff --git a/include/asm-cris/processor.h b/include/asm-cris/processor.h
index dec7e2cefc7d..a9b11b89eced 100644
--- a/include/asm-cris/processor.h
+++ b/include/asm-cris/processor.h
@@ -12,13 +12,14 @@
#include <linux/config.h>
#include <asm/system.h>
+#include <asm/page.h>
#include <asm/ptrace.h>
/*
* Default implementation of macro that returns current
* instruction pointer ("program counter").
*/
-#define current_text_addr() ({void *pc; __asm__ ("move.d pc,%0" : "=rm" (pc)); pc; })
+#define current_text_addr() ({void *pc; __asm__ ("move.d $pc,%0" : "=rm" (pc)); pc; })
/* CRIS has no problems with write protection */
diff --git a/include/asm-cris/system.h b/include/asm-cris/system.h
index 8c5b38977603..95c6c4198da5 100644
--- a/include/asm-cris/system.h
+++ b/include/asm-cris/system.h
@@ -1,5 +1,3 @@
-/* $Id: system.h,v 1.4 2001/03/20 19:46:00 bjornw Exp $ */
-
#ifndef __ASM_CRIS_SYSTEM_H
#define __ASM_CRIS_SYSTEM_H
@@ -16,22 +14,30 @@ extern struct task_struct *resume(struct task_struct *prev, struct task_struct *
#define switch_to(prev,next,last) last = resume(prev,next, \
(int)&((struct task_struct *)0)->thread)
+/* read the CPU version register */
+
+static inline unsigned long rdvr(void) {
+ unsigned long vr;
+ __asm__ volatile ("move $vr,%0" : "=rm" (vr));
+ return vr;
+}
+
/* read/write the user-mode stackpointer */
-extern inline unsigned long rdusp(void) {
+static inline unsigned long rdusp(void) {
unsigned long usp;
- __asm__ __volatile__("move usp,%0" : "=rm" (usp));
+ __asm__ __volatile__("move $usp,%0" : "=rm" (usp));
return usp;
}
#define wrusp(usp) \
- __asm__ __volatile__("move %0,usp" : /* no outputs */ : "rm" (usp))
+ __asm__ __volatile__("move %0,$usp" : /* no outputs */ : "rm" (usp))
/* read the current stackpointer */
-extern inline unsigned long rdsp(void) {
+static inline unsigned long rdsp(void) {
unsigned long sp;
- __asm__ __volatile__("move.d sp,%0" : "=rm" (sp));
+ __asm__ __volatile__("move.d $sp,%0" : "=rm" (sp));
return sp;
}
@@ -51,18 +57,18 @@ struct __xchg_dummy { unsigned long a[100]; };
#if 0
/* use these and an oscilloscope to see the fraction of time we're running with IRQ's disabled */
/* it assumes the LED's are on port 0x90000000 of course. */
-#define sti() __asm__ __volatile__ ( "ei\n\tpush r0\n\tmoveq 0,r0\n\tmove.d r0,[0x90000000]\n\tpop r0" );
-#define cli() __asm__ __volatile__ ( "di\n\tpush r0\n\tmove.d 0x40000,r0\n\tmove.d r0,[0x90000000]\n\tpop r0");
-#define save_flags(x) __asm__ __volatile__ ("move ccr,%0" : "=rm" (x) : : "memory");
-#define restore_flags(x) __asm__ __volatile__ ("move %0,ccr\n\tbtstq 5,%0\n\tbpl 1f\n\tnop\n\tpush r0\n\tmoveq 0,r0\n\tmove.d r0,[0x90000000]\n\tpop r0\n1:\n" : : "r" (x) : "memory");
+#define sti() __asm__ __volatile__ ( "ei\n\tpush $r0\n\tmoveq 0,$r0\n\tmove.d $r0,[0x90000000]\n\tpop $r0" );
+#define cli() __asm__ __volatile__ ( "di\n\tpush $r0\n\tmove.d 0x40000,$r0\n\tmove.d $r0,[0x90000000]\n\tpop $r0");
+#define save_flags(x) __asm__ __volatile__ ("move $ccr,%0" : "=rm" (x) : : "memory");
+#define restore_flags(x) __asm__ __volatile__ ("move %0,$ccr\n\tbtstq 5,%0\n\tbpl 1f\n\tnop\n\tpush $r0\n\tmoveq 0,$r0\n\tmove.d $r0,[0x90000000]\n\tpop $r0\n1:\n" : : "r" (x) : "memory");
#else
#define __cli() __asm__ __volatile__ ( "di");
#define __sti() __asm__ __volatile__ ( "ei" );
-#define __save_flags(x) __asm__ __volatile__ ("move ccr,%0" : "=rm" (x) : : "memory");
-#define __restore_flags(x) __asm__ __volatile__ ("move %0,ccr" : : "rm" (x) : "memory");
+#define __save_flags(x) __asm__ __volatile__ ("move $ccr,%0" : "=rm" (x) : : "memory");
+#define __restore_flags(x) __asm__ __volatile__ ("move %0,$ccr" : : "rm" (x) : "memory");
/* For spinlocks etc */
-#define local_irq_save(x) __asm__ __volatile__ ("move ccr,%0\n\tdi" : "=rm" (x) : : "memory");
+#define local_irq_save(x) __asm__ __volatile__ ("move $ccr,%0\n\tdi" : "=rm" (x) : : "memory");
#define local_irq_restore(x) restore_flags(x)
#define local_irq_disable() cli()
diff --git a/include/asm-cris/tlb.h b/include/asm-cris/tlb.h
new file mode 100644
index 000000000000..69c0faa93194
--- /dev/null
+++ b/include/asm-cris/tlb.h
@@ -0,0 +1 @@
+#include <asm-generic/tlb.h>
diff --git a/include/asm-cris/uaccess.h b/include/asm-cris/uaccess.h
index d506983b11f7..8cc79775254c 100644
--- a/include/asm-cris/uaccess.h
+++ b/include/asm-cris/uaccess.h
@@ -3,6 +3,12 @@
* Hans-Peter Nilsson (hp@axis.com)
*
* $Log: uaccess.h,v $
+ * Revision 1.7 2001/10/02 12:44:52 hp
+ * Add support for 64-bit put_user/get_user
+ *
+ * Revision 1.6 2001/10/01 14:51:17 bjornw
+ * Added register prefixes and removed underscores
+ *
* Revision 1.5 2000/10/25 03:33:21 hp
* - Provide implementation for everything else but get_user and put_user;
* copying inline to/from user for constant length 0..16, 20, 24, and
@@ -36,7 +42,7 @@
Check regularly...
- Register r9 is chosen for temporaries, being a call-clobbered register
+ Register $r9 is chosen for temporaries, being a call-clobbered register
first in line to be used (notably for local blocks), not colliding with
parameter registers. */
@@ -182,6 +188,7 @@ do { \
case 1: __put_user_asm(x,ptr,retval,"move.b"); break; \
case 2: __put_user_asm(x,ptr,retval,"move.w"); break; \
case 4: __put_user_asm(x,ptr,retval,"move.d"); break; \
+ case 8: __put_user_asm_64(x,ptr,retval); break; \
default: __put_user_bad(); \
} \
} while (0)
@@ -211,6 +218,22 @@ struct __large_struct { unsigned long buf[100]; };
: "=r" (err) \
: "r" (x), "r" (addr), "g" (-EFAULT), "0" (err))
+#define __put_user_asm_64(x, addr, err) \
+ __asm__ __volatile__( \
+ " move.d %M1,[%2]\n" \
+ "2: move.d %H1,[%2+4]\n" \
+ "4:\n" \
+ " .section .fixup,\"ax\"\n" \
+ "3: move.d %3,%0\n" \
+ " jump 4b\n" \
+ " .previous\n" \
+ " .section __ex_table,\"a\"\n" \
+ " .dword 2b,3b\n" \
+ " .dword 4b,3b\n" \
+ " .previous\n" \
+ : "=r" (err) \
+ : "r" (x), "r" (addr), "g" (-EFAULT), "0" (err))
+
#define __get_user_nocheck(x,ptr,size) \
({ \
@@ -239,6 +262,7 @@ do { \
case 1: __get_user_asm(x,ptr,retval,"move.b"); break; \
case 2: __get_user_asm(x,ptr,retval,"move.w"); break; \
case 4: __get_user_asm(x,ptr,retval,"move.d"); break; \
+ case 8: __get_user_asm_64(x,ptr,retval); break; \
default: (x) = __get_user_bad(); \
} \
} while (0)
@@ -260,6 +284,23 @@ do { \
: "=r" (err), "=r" (x) \
: "r" (addr), "g" (-EFAULT), "0" (err))
+#define __get_user_asm_64(x, addr, err) \
+ __asm__ __volatile__( \
+ " move.d [%2],%M1\n" \
+ "2: move.d [%2+4],%H1\n" \
+ "4:\n" \
+ " .section .fixup,\"ax\"\n" \
+ "3: move.d %3,%0\n" \
+ " moveq 0,%1\n" \
+ " jump 4b\n" \
+ " .previous\n" \
+ " .section __ex_table,\"a\"\n" \
+ " .dword 2b,3b\n" \
+ " .dword 4b,3b\n" \
+ " .previous\n" \
+ : "=r" (err), "=r" (x) \
+ : "r" (addr), "g" (-EFAULT), "0" (err))
+
/* More complex functions. Most are inline, but some call functions that
live in lib/usercopy.c */
@@ -305,13 +346,13 @@ __do_strncpy_from_user(char *dst, const char *src, long count)
__asm__ __volatile__ (
" move.d %3,%0\n"
- " move.b [%2+],r9\n"
+ " move.b [%2+],$r9\n"
"1: beq 2f\n"
- " move.b r9,[%1+]\n"
+ " move.b $r9,[%1+]\n"
" subq 1,%0\n"
" bne 1b\n"
- " move.b [%2+],r9\n"
+ " move.b [%2+],$r9\n"
"2: sub.d %3,%0\n"
" neg.d %0,%0\n"
@@ -399,16 +440,16 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_1(to, from, ret) \
__asm_copy_user_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- "2: move.b r9,[%0+]\n", \
+ " move.b [%1+],$r9\n" \
+ "2: move.b $r9,[%0+]\n", \
"3: addq 1,%2\n" \
" clear.b [%0+]\n", \
" .dword 2b,3b\n")
#define __asm_copy_from_user_2x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_user_cont(to, from, ret, \
- " move.w [%1+],r9\n" \
- "2: move.w r9,[%0+]\n" COPY, \
+ " move.w [%1+],$r9\n" \
+ "2: move.w $r9,[%0+]\n" COPY, \
"3: addq 2,%2\n" \
" clear.w [%0+]\n" FIXUP, \
" .dword 2b,3b\n" TENTRY)
@@ -418,16 +459,16 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_3(to, from, ret) \
__asm_copy_from_user_2x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- "4: move.b r9,[%0+]\n", \
+ " move.b [%1+],$r9\n" \
+ "4: move.b $r9,[%0+]\n", \
"5: addq 1,%2\n" \
" clear.b [%0+]\n", \
" .dword 4b,5b\n")
#define __asm_copy_from_user_4x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_user_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- "2: move.d r9,[%0+]\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ "2: move.d $r9,[%0+]\n" COPY, \
"3: addq 4,%2\n" \
" clear.d [%0+]\n" FIXUP, \
" .dword 2b,3b\n" TENTRY)
@@ -437,16 +478,16 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_5(to, from, ret) \
__asm_copy_from_user_4x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- "4: move.b r9,[%0+]\n", \
+ " move.b [%1+],$r9\n" \
+ "4: move.b $r9,[%0+]\n", \
"5: addq 1,%2\n" \
" clear.b [%0+]\n", \
" .dword 4b,5b\n")
#define __asm_copy_from_user_6x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_from_user_4x_cont(to, from, ret, \
- " move.w [%1+],r9\n" \
- "4: move.w r9,[%0+]\n" COPY, \
+ " move.w [%1+],$r9\n" \
+ "4: move.w $r9,[%0+]\n" COPY, \
"5: addq 2,%2\n" \
" clear.w [%0+]\n" FIXUP, \
" .dword 4b,5b\n" TENTRY)
@@ -456,16 +497,16 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_7(to, from, ret) \
__asm_copy_from_user_6x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- "6: move.b r9,[%0+]\n", \
+ " move.b [%1+],$r9\n" \
+ "6: move.b $r9,[%0+]\n", \
"7: addq 1,%2\n" \
" clear.b [%0+]\n", \
" .dword 6b,7b\n")
#define __asm_copy_from_user_8x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_from_user_4x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- "4: move.d r9,[%0+]\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ "4: move.d $r9,[%0+]\n" COPY, \
"5: addq 4,%2\n" \
" clear.d [%0+]\n" FIXUP, \
" .dword 4b,5b\n" TENTRY)
@@ -475,16 +516,16 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_9(to, from, ret) \
__asm_copy_from_user_8x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- "6: move.b r9,[%0+]\n", \
+ " move.b [%1+],$r9\n" \
+ "6: move.b $r9,[%0+]\n", \
"7: addq 1,%2\n" \
" clear.b [%0+]\n", \
" .dword 6b,7b\n")
#define __asm_copy_from_user_10x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_from_user_8x_cont(to, from, ret, \
- " move.w [%1+],r9\n" \
- "6: move.w r9,[%0+]\n" COPY, \
+ " move.w [%1+],$r9\n" \
+ "6: move.w $r9,[%0+]\n" COPY, \
"7: addq 2,%2\n" \
" clear.w [%0+]\n" FIXUP, \
" .dword 6b,7b\n" TENTRY)
@@ -494,16 +535,16 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_11(to, from, ret) \
__asm_copy_from_user_10x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- "8: move.b r9,[%0+]\n", \
+ " move.b [%1+],$r9\n" \
+ "8: move.b $r9,[%0+]\n", \
"9: addq 1,%2\n" \
" clear.b [%0+]\n", \
" .dword 8b,9b\n")
#define __asm_copy_from_user_12x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_from_user_8x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- "6: move.d r9,[%0+]\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ "6: move.d $r9,[%0+]\n" COPY, \
"7: addq 4,%2\n" \
" clear.d [%0+]\n" FIXUP, \
" .dword 6b,7b\n" TENTRY)
@@ -513,16 +554,16 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_13(to, from, ret) \
__asm_copy_from_user_12x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- "8: move.b r9,[%0+]\n", \
+ " move.b [%1+],$r9\n" \
+ "8: move.b $r9,[%0+]\n", \
"9: addq 1,%2\n" \
" clear.b [%0+]\n", \
" .dword 8b,9b\n")
#define __asm_copy_from_user_14x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_from_user_12x_cont(to, from, ret, \
- " move.w [%1+],r9\n" \
- "8: move.w r9,[%0+]\n" COPY, \
+ " move.w [%1+],$r9\n" \
+ "8: move.w $r9,[%0+]\n" COPY, \
"9: addq 2,%2\n" \
" clear.w [%0+]\n" FIXUP, \
" .dword 8b,9b\n" TENTRY)
@@ -532,16 +573,16 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_15(to, from, ret) \
__asm_copy_from_user_14x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- "10: move.b r9,[%0+]\n", \
+ " move.b [%1+],$r9\n" \
+ "10: move.b $r9,[%0+]\n", \
"11: addq 1,%2\n" \
" clear.b [%0+]\n", \
" .dword 10b,11b\n")
#define __asm_copy_from_user_16x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_from_user_12x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- "8: move.d r9,[%0+]\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ "8: move.d $r9,[%0+]\n" COPY, \
"9: addq 4,%2\n" \
" clear.d [%0+]\n" FIXUP, \
" .dword 8b,9b\n" TENTRY)
@@ -551,8 +592,8 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_20x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_from_user_16x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- "10: move.d r9,[%0+]\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ "10: move.d $r9,[%0+]\n" COPY, \
"11: addq 4,%2\n" \
" clear.d [%0+]\n" FIXUP, \
" .dword 10b,11b\n" TENTRY)
@@ -562,8 +603,8 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_from_user_24x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_from_user_20x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- "12: move.d r9,[%0+]\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ "12: move.d $r9,[%0+]\n" COPY, \
"13: addq 4,%2\n" \
" clear.d [%0+]\n" FIXUP, \
" .dword 12b,13b\n" TENTRY)
@@ -575,15 +616,15 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_1(to, from, ret) \
__asm_copy_user_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- " move.b r9,[%0+]\n2:\n", \
+ " move.b [%1+],$r9\n" \
+ " move.b $r9,[%0+]\n2:\n", \
"3: addq 1,%2\n", \
" .dword 2b,3b\n")
#define __asm_copy_to_user_2x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_user_cont(to, from, ret, \
- " move.w [%1+],r9\n" \
- " move.w r9,[%0+]\n2:\n" COPY, \
+ " move.w [%1+],$r9\n" \
+ " move.w $r9,[%0+]\n2:\n" COPY, \
"3: addq 2,%2\n" FIXUP, \
" .dword 2b,3b\n" TENTRY)
@@ -592,15 +633,15 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_3(to, from, ret) \
__asm_copy_to_user_2x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- " move.b r9,[%0+]\n4:\n", \
+ " move.b [%1+],$r9\n" \
+ " move.b $r9,[%0+]\n4:\n", \
"5: addq 1,%2\n", \
" .dword 4b,5b\n")
#define __asm_copy_to_user_4x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_user_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- " move.d r9,[%0+]\n2:\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ " move.d $r9,[%0+]\n2:\n" COPY, \
"3: addq 4,%2\n" FIXUP, \
" .dword 2b,3b\n" TENTRY)
@@ -609,15 +650,15 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_5(to, from, ret) \
__asm_copy_to_user_4x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- " move.b r9,[%0+]\n4:\n", \
+ " move.b [%1+],$r9\n" \
+ " move.b $r9,[%0+]\n4:\n", \
"5: addq 1,%2\n", \
" .dword 4b,5b\n")
#define __asm_copy_to_user_6x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_to_user_4x_cont(to, from, ret, \
- " move.w [%1+],r9\n" \
- " move.w r9,[%0+]\n4:\n" COPY, \
+ " move.w [%1+],$r9\n" \
+ " move.w $r9,[%0+]\n4:\n" COPY, \
"5: addq 2,%2\n" FIXUP, \
" .dword 4b,5b\n" TENTRY)
@@ -626,15 +667,15 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_7(to, from, ret) \
__asm_copy_to_user_6x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- " move.b r9,[%0+]\n6:\n", \
+ " move.b [%1+],$r9\n" \
+ " move.b $r9,[%0+]\n6:\n", \
"7: addq 1,%2\n", \
" .dword 6b,7b\n")
#define __asm_copy_to_user_8x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_to_user_4x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- " move.d r9,[%0+]\n4:\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ " move.d $r9,[%0+]\n4:\n" COPY, \
"5: addq 4,%2\n" FIXUP, \
" .dword 4b,5b\n" TENTRY)
@@ -643,15 +684,15 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_9(to, from, ret) \
__asm_copy_to_user_8x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- " move.b r9,[%0+]\n6:\n", \
+ " move.b [%1+],$r9\n" \
+ " move.b $r9,[%0+]\n6:\n", \
"7: addq 1,%2\n", \
" .dword 6b,7b\n")
#define __asm_copy_to_user_10x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_to_user_8x_cont(to, from, ret, \
- " move.w [%1+],r9\n" \
- " move.w r9,[%0+]\n6:\n" COPY, \
+ " move.w [%1+],$r9\n" \
+ " move.w $r9,[%0+]\n6:\n" COPY, \
"7: addq 2,%2\n" FIXUP, \
" .dword 6b,7b\n" TENTRY)
@@ -660,15 +701,15 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_11(to, from, ret) \
__asm_copy_to_user_10x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- " move.b r9,[%0+]\n8:\n", \
+ " move.b [%1+],$r9\n" \
+ " move.b $r9,[%0+]\n8:\n", \
"9: addq 1,%2\n", \
" .dword 8b,9b\n")
#define __asm_copy_to_user_12x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_to_user_8x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- " move.d r9,[%0+]\n6:\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ " move.d $r9,[%0+]\n6:\n" COPY, \
"7: addq 4,%2\n" FIXUP, \
" .dword 6b,7b\n" TENTRY)
@@ -677,15 +718,15 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_13(to, from, ret) \
__asm_copy_to_user_12x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- " move.b r9,[%0+]\n8:\n", \
+ " move.b [%1+],$r9\n" \
+ " move.b $r9,[%0+]\n8:\n", \
"9: addq 1,%2\n", \
" .dword 8b,9b\n")
#define __asm_copy_to_user_14x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_to_user_12x_cont(to, from, ret, \
- " move.w [%1+],r9\n" \
- " move.w r9,[%0+]\n8:\n" COPY, \
+ " move.w [%1+],$r9\n" \
+ " move.w $r9,[%0+]\n8:\n" COPY, \
"9: addq 2,%2\n" FIXUP, \
" .dword 8b,9b\n" TENTRY)
@@ -694,15 +735,15 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_15(to, from, ret) \
__asm_copy_to_user_14x_cont(to, from, ret, \
- " move.b [%1+],r9\n" \
- " move.b r9,[%0+]\n10:\n", \
+ " move.b [%1+],$r9\n" \
+ " move.b $r9,[%0+]\n10:\n", \
"11: addq 1,%2\n", \
" .dword 10b,11b\n")
#define __asm_copy_to_user_16x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_to_user_12x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- " move.d r9,[%0+]\n8:\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ " move.d $r9,[%0+]\n8:\n" COPY, \
"9: addq 4,%2\n" FIXUP, \
" .dword 8b,9b\n" TENTRY)
@@ -711,8 +752,8 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_20x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_to_user_16x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- " move.d r9,[%0+]\n10:\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ " move.d $r9,[%0+]\n10:\n" COPY, \
"11: addq 4,%2\n" FIXUP, \
" .dword 10b,11b\n" TENTRY)
@@ -721,8 +762,8 @@ strncpy_from_user(char *dst, const char *src, long count)
#define __asm_copy_to_user_24x_cont(to, from, ret, COPY, FIXUP, TENTRY) \
__asm_copy_to_user_20x_cont(to, from, ret, \
- " move.d [%1+],r9\n" \
- " move.d r9,[%0+]\n12:\n" COPY, \
+ " move.d [%1+],$r9\n" \
+ " move.d $r9,[%0+]\n12:\n" COPY, \
"13: addq 4,%2\n" FIXUP, \
" .dword 12b,13b\n" TENTRY)
@@ -1034,17 +1075,17 @@ strnlen_user(const char *s, long n)
*/
__asm__ __volatile__ (
- " move.d %1,r9\n"
+ " move.d %1,$r9\n"
"0:\n"
" ble 1f\n"
- " subq 1,r9\n"
+ " subq 1,$r9\n"
" test.b [%0+]\n"
" bne 0b\n"
- " test.d r9\n"
+ " test.d $r9\n"
"1:\n"
" move.d %1,%0\n"
- " sub.d r9,%0\n"
+ " sub.d $r9,%0\n"
"2:\n"
" .section .fixup,\"ax\"\n"
diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h
index 77df81dec513..ebd216dd490d 100644
--- a/include/asm-i386/unistd.h
+++ b/include/asm-i386/unistd.h
@@ -228,6 +228,7 @@
#define __NR_getdents64 220
#define __NR_fcntl64 221
#define __NR_security 223 /* syscall for security modules */
+#define __NR_gettid 224
/* user-visible error numbers are in the range -1 - -124: see <asm-i386/errno.h> */
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h
new file mode 100644
index 000000000000..46284e91f571
--- /dev/null
+++ b/include/asm-ppc/commproc.h
@@ -0,0 +1,796 @@
+/*
+ * BK Id: SCCS/s.commproc.h 1.16 09/27/01 12:41:09 trini
+ */
+
+/*
+ * MPC8xx Communication Processor Module.
+ * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
+ *
+ * This file contains structures and information for the communication
+ * processor channels. Some CPM control and status is available
+ * throught the MPC8xx internal memory map. See immap.h for details.
+ * This file only contains what I need for the moment, not the total
+ * CPM capabilities. I (or someone else) will add definitions as they
+ * are needed. -- Dan
+ *
+ * On the MBX board, EPPC-Bug loads CPM microcode into the first 512
+ * bytes of the DP RAM and relocates the I2C parameter area to the
+ * IDMA1 space. The remaining DP RAM is available for buffer descriptors
+ * or other use.
+ */
+#ifndef __CPM_8XX__
+#define __CPM_8XX__
+
+#include <linux/config.h>
+#include <asm/8xx_immap.h>
+
+/* CPM Command register.
+*/
+#define CPM_CR_RST ((ushort)0x8000)
+#define CPM_CR_OPCODE ((ushort)0x0f00)
+#define CPM_CR_CHAN ((ushort)0x00f0)
+#define CPM_CR_FLG ((ushort)0x0001)
+
+/* Some commands (there are more...later)
+*/
+#define CPM_CR_INIT_TRX ((ushort)0x0000)
+#define CPM_CR_INIT_RX ((ushort)0x0001)
+#define CPM_CR_INIT_TX ((ushort)0x0002)
+#define CPM_CR_HUNT_MODE ((ushort)0x0003)
+#define CPM_CR_STOP_TX ((ushort)0x0004)
+#define CPM_CR_RESTART_TX ((ushort)0x0006)
+#define CPM_CR_SET_GADDR ((ushort)0x0008)
+
+/* Channel numbers.
+*/
+#define CPM_CR_CH_SCC1 ((ushort)0x0000)
+#define CPM_CR_CH_I2C ((ushort)0x0001) /* I2C and IDMA1 */
+#define CPM_CR_CH_SCC2 ((ushort)0x0004)
+#define CPM_CR_CH_SPI ((ushort)0x0005) /* SPI / IDMA2 / Timers */
+#define CPM_CR_CH_SCC3 ((ushort)0x0008)
+#define CPM_CR_CH_SMC1 ((ushort)0x0009) /* SMC1 / DSP1 */
+#define CPM_CR_CH_SCC4 ((ushort)0x000c)
+#define CPM_CR_CH_SMC2 ((ushort)0x000d) /* SMC2 / DSP2 */
+
+#define mk_cr_cmd(CH, CMD) ((CMD << 8) | (CH << 4))
+
+/* The dual ported RAM is multi-functional. Some areas can be (and are
+ * being) used for microcode. There is an area that can only be used
+ * as data ram for buffer descriptors, which is all we use right now.
+ * Currently the first 512 and last 256 bytes are used for microcode.
+ */
+#define CPM_DATAONLY_BASE ((uint)0x0800)
+#define CPM_DATAONLY_SIZE ((uint)0x0700)
+#define CPM_DP_NOSPACE ((uint)0x7fffffff)
+
+/* Export the base address of the communication processor registers
+ * and dual port ram.
+ */
+extern cpm8xx_t *cpmp; /* Pointer to comm processor */
+uint m8xx_cpm_dpalloc(uint size);
+uint m8xx_cpm_hostalloc(uint size);
+void m8xx_cpm_setbrg(uint brg, uint rate);
+
+/* Buffer descriptors used by many of the CPM protocols.
+*/
+typedef struct cpm_buf_desc {
+ ushort cbd_sc; /* Status and Control */
+ ushort cbd_datlen; /* Data length in buffer */
+ uint cbd_bufaddr; /* Buffer address in host memory */
+} cbd_t;
+
+#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
+#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */
+#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */
+#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
+#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */
+#define BD_SC_CM ((ushort)0x0200) /* Continous mode */
+#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */
+#define BD_SC_P ((ushort)0x0100) /* xmt preamble */
+#define BD_SC_BR ((ushort)0x0020) /* Break received */
+#define BD_SC_FR ((ushort)0x0010) /* Framing error */
+#define BD_SC_PR ((ushort)0x0008) /* Parity error */
+#define BD_SC_OV ((ushort)0x0002) /* Overrun */
+#define BD_SC_CD ((ushort)0x0001) /* ?? */
+
+/* Parameter RAM offsets.
+*/
+#define PROFF_SCC1 ((uint)0x0000)
+#define PROFF_IIC ((uint)0x0080)
+#define PROFF_SCC2 ((uint)0x0100)
+#define PROFF_SCC3 ((uint)0x0200)
+#define PROFF_SMC1 ((uint)0x0280)
+#define PROFF_SCC4 ((uint)0x0300)
+#define PROFF_SMC2 ((uint)0x0380)
+
+/* Define enough so I can at least use the serial port as a UART.
+ * The MBX uses SMC1 as the host serial port.
+ */
+typedef struct smc_uart {
+ ushort smc_rbase; /* Rx Buffer descriptor base address */
+ ushort smc_tbase; /* Tx Buffer descriptor base address */
+ u_char smc_rfcr; /* Rx function code */
+ u_char smc_tfcr; /* Tx function code */
+ ushort smc_mrblr; /* Max receive buffer length */
+ uint smc_rstate; /* Internal */
+ uint smc_idp; /* Internal */
+ ushort smc_rbptr; /* Internal */
+ ushort smc_ibc; /* Internal */
+ uint smc_rxtmp; /* Internal */
+ uint smc_tstate; /* Internal */
+ uint smc_tdp; /* Internal */
+ ushort smc_tbptr; /* Internal */
+ ushort smc_tbc; /* Internal */
+ uint smc_txtmp; /* Internal */
+ ushort smc_maxidl; /* Maximum idle characters */
+ ushort smc_tmpidl; /* Temporary idle counter */
+ ushort smc_brklen; /* Last received break length */
+ ushort smc_brkec; /* rcv'd break condition counter */
+ ushort smc_brkcr; /* xmt break count register */
+ ushort smc_rmask; /* Temporary bit mask */
+} smc_uart_t;
+
+/* Function code bits.
+*/
+#define SMC_EB ((u_char)0x10) /* Set big endian byte order */
+
+/* SMC uart mode register.
+*/
+#define SMCMR_REN ((ushort)0x0001)
+#define SMCMR_TEN ((ushort)0x0002)
+#define SMCMR_DM ((ushort)0x000c)
+#define SMCMR_SM_GCI ((ushort)0x0000)
+#define SMCMR_SM_UART ((ushort)0x0020)
+#define SMCMR_SM_TRANS ((ushort)0x0030)
+#define SMCMR_SM_MASK ((ushort)0x0030)
+#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */
+#define SMCMR_REVD SMCMR_PM_EVEN
+#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */
+#define SMCMR_BS SMCMR_PEN
+#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */
+#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */
+#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK)
+
+/* SMC2 as Centronics parallel printer. It is half duplex, in that
+ * it can only receive or transmit. The parameter ram values for
+ * each direction are either unique or properly overlap, so we can
+ * include them in one structure.
+ */
+typedef struct smc_centronics {
+ ushort scent_rbase;
+ ushort scent_tbase;
+ u_char scent_cfcr;
+ u_char scent_smask;
+ ushort scent_mrblr;
+ uint scent_rstate;
+ uint scent_r_ptr;
+ ushort scent_rbptr;
+ ushort scent_r_cnt;
+ uint scent_rtemp;
+ uint scent_tstate;
+ uint scent_t_ptr;
+ ushort scent_tbptr;
+ ushort scent_t_cnt;
+ uint scent_ttemp;
+ ushort scent_max_sl;
+ ushort scent_sl_cnt;
+ ushort scent_character1;
+ ushort scent_character2;
+ ushort scent_character3;
+ ushort scent_character4;
+ ushort scent_character5;
+ ushort scent_character6;
+ ushort scent_character7;
+ ushort scent_character8;
+ ushort scent_rccm;
+ ushort scent_rccr;
+} smc_cent_t;
+
+/* Centronics Status Mask Register.
+*/
+#define SMC_CENT_F ((u_char)0x08)
+#define SMC_CENT_PE ((u_char)0x04)
+#define SMC_CENT_S ((u_char)0x02)
+
+/* SMC Event and Mask register.
+*/
+#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */
+#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */
+#define SMCM_TXE ((unsigned char)0x10) /* When in Transparent Mode */
+#define SMCM_BSY ((unsigned char)0x04)
+#define SMCM_TX ((unsigned char)0x02)
+#define SMCM_RX ((unsigned char)0x01)
+
+/* Baud rate generators.
+*/
+#define CPM_BRG_RST ((uint)0x00020000)
+#define CPM_BRG_EN ((uint)0x00010000)
+#define CPM_BRG_EXTC_INT ((uint)0x00000000)
+#define CPM_BRG_EXTC_CLK2 ((uint)0x00004000)
+#define CPM_BRG_EXTC_CLK6 ((uint)0x00008000)
+#define CPM_BRG_ATB ((uint)0x00002000)
+#define CPM_BRG_CD_MASK ((uint)0x00001ffe)
+#define CPM_BRG_DIV16 ((uint)0x00000001)
+
+/* SCCs.
+*/
+#define SCC_GSMRH_IRP ((uint)0x00040000)
+#define SCC_GSMRH_GDE ((uint)0x00010000)
+#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000)
+#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000)
+#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000)
+#define SCC_GSMRH_REVD ((uint)0x00002000)
+#define SCC_GSMRH_TRX ((uint)0x00001000)
+#define SCC_GSMRH_TTX ((uint)0x00000800)
+#define SCC_GSMRH_CDP ((uint)0x00000400)
+#define SCC_GSMRH_CTSP ((uint)0x00000200)
+#define SCC_GSMRH_CDS ((uint)0x00000100)
+#define SCC_GSMRH_CTSS ((uint)0x00000080)
+#define SCC_GSMRH_TFL ((uint)0x00000040)
+#define SCC_GSMRH_RFW ((uint)0x00000020)
+#define SCC_GSMRH_TXSY ((uint)0x00000010)
+#define SCC_GSMRH_SYNL16 ((uint)0x0000000c)
+#define SCC_GSMRH_SYNL8 ((uint)0x00000008)
+#define SCC_GSMRH_SYNL4 ((uint)0x00000004)
+#define SCC_GSMRH_RTSM ((uint)0x00000002)
+#define SCC_GSMRH_RSYN ((uint)0x00000001)
+
+#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */
+#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000)
+#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000)
+#define SCC_GSMRL_EDGE_POS ((uint)0x20000000)
+#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000)
+#define SCC_GSMRL_TCI ((uint)0x10000000)
+#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000)
+#define SCC_GSMRL_TSNC_4 ((uint)0x08000000)
+#define SCC_GSMRL_TSNC_14 ((uint)0x04000000)
+#define SCC_GSMRL_TSNC_INF ((uint)0x00000000)
+#define SCC_GSMRL_RINV ((uint)0x02000000)
+#define SCC_GSMRL_TINV ((uint)0x01000000)
+#define SCC_GSMRL_TPL_128 ((uint)0x00c00000)
+#define SCC_GSMRL_TPL_64 ((uint)0x00a00000)
+#define SCC_GSMRL_TPL_48 ((uint)0x00800000)
+#define SCC_GSMRL_TPL_32 ((uint)0x00600000)
+#define SCC_GSMRL_TPL_16 ((uint)0x00400000)
+#define SCC_GSMRL_TPL_8 ((uint)0x00200000)
+#define SCC_GSMRL_TPL_NONE ((uint)0x00000000)
+#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000)
+#define SCC_GSMRL_TPP_01 ((uint)0x00100000)
+#define SCC_GSMRL_TPP_10 ((uint)0x00080000)
+#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000)
+#define SCC_GSMRL_TEND ((uint)0x00040000)
+#define SCC_GSMRL_TDCR_32 ((uint)0x00030000)
+#define SCC_GSMRL_TDCR_16 ((uint)0x00020000)
+#define SCC_GSMRL_TDCR_8 ((uint)0x00010000)
+#define SCC_GSMRL_TDCR_1 ((uint)0x00000000)
+#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000)
+#define SCC_GSMRL_RDCR_16 ((uint)0x00008000)
+#define SCC_GSMRL_RDCR_8 ((uint)0x00004000)
+#define SCC_GSMRL_RDCR_1 ((uint)0x00000000)
+#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000)
+#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000)
+#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000)
+#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800)
+#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000)
+#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600)
+#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400)
+#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200)
+#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100)
+#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000)
+#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */
+#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080)
+#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040)
+#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000)
+#define SCC_GSMRL_ENR ((uint)0x00000020)
+#define SCC_GSMRL_ENT ((uint)0x00000010)
+#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c)
+#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009)
+#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008)
+#define SCC_GSMRL_MODE_V14 ((uint)0x00000007)
+#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006)
+#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005)
+#define SCC_GSMRL_MODE_UART ((uint)0x00000004)
+#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003)
+#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002)
+#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000)
+
+#define SCC_TODR_TOD ((ushort)0x8000)
+
+/* SCC Event and Mask register.
+*/
+#define SCCM_TXE ((unsigned char)0x10)
+#define SCCM_BSY ((unsigned char)0x04)
+#define SCCM_TX ((unsigned char)0x02)
+#define SCCM_RX ((unsigned char)0x01)
+
+typedef struct scc_param {
+ ushort scc_rbase; /* Rx Buffer descriptor base address */
+ ushort scc_tbase; /* Tx Buffer descriptor base address */
+ u_char scc_rfcr; /* Rx function code */
+ u_char scc_tfcr; /* Tx function code */
+ ushort scc_mrblr; /* Max receive buffer length */
+ uint scc_rstate; /* Internal */
+ uint scc_idp; /* Internal */
+ ushort scc_rbptr; /* Internal */
+ ushort scc_ibc; /* Internal */
+ uint scc_rxtmp; /* Internal */
+ uint scc_tstate; /* Internal */
+ uint scc_tdp; /* Internal */
+ ushort scc_tbptr; /* Internal */
+ ushort scc_tbc; /* Internal */
+ uint scc_txtmp; /* Internal */
+ uint scc_rcrc; /* Internal */
+ uint scc_tcrc; /* Internal */
+} sccp_t;
+
+/* Function code bits.
+*/
+#define SCC_EB ((u_char)0x10) /* Set big endian byte order */
+
+/* CPM Ethernet through SCCx.
+ */
+typedef struct scc_enet {
+ sccp_t sen_genscc;
+ uint sen_cpres; /* Preset CRC */
+ uint sen_cmask; /* Constant mask for CRC */
+ uint sen_crcec; /* CRC Error counter */
+ uint sen_alec; /* alignment error counter */
+ uint sen_disfc; /* discard frame counter */
+ ushort sen_pads; /* Tx short frame pad character */
+ ushort sen_retlim; /* Retry limit threshold */
+ ushort sen_retcnt; /* Retry limit counter */
+ ushort sen_maxflr; /* maximum frame length register */
+ ushort sen_minflr; /* minimum frame length register */
+ ushort sen_maxd1; /* maximum DMA1 length */
+ ushort sen_maxd2; /* maximum DMA2 length */
+ ushort sen_maxd; /* Rx max DMA */
+ ushort sen_dmacnt; /* Rx DMA counter */
+ ushort sen_maxb; /* Max BD byte count */
+ ushort sen_gaddr1; /* Group address filter */
+ ushort sen_gaddr2;
+ ushort sen_gaddr3;
+ ushort sen_gaddr4;
+ uint sen_tbuf0data0; /* Save area 0 - current frame */
+ uint sen_tbuf0data1; /* Save area 1 - current frame */
+ uint sen_tbuf0rba; /* Internal */
+ uint sen_tbuf0crc; /* Internal */
+ ushort sen_tbuf0bcnt; /* Internal */
+ ushort sen_paddrh; /* physical address (MSB) */
+ ushort sen_paddrm;
+ ushort sen_paddrl; /* physical address (LSB) */
+ ushort sen_pper; /* persistence */
+ ushort sen_rfbdptr; /* Rx first BD pointer */
+ ushort sen_tfbdptr; /* Tx first BD pointer */
+ ushort sen_tlbdptr; /* Tx last BD pointer */
+ uint sen_tbuf1data0; /* Save area 0 - current frame */
+ uint sen_tbuf1data1; /* Save area 1 - current frame */
+ uint sen_tbuf1rba; /* Internal */
+ uint sen_tbuf1crc; /* Internal */
+ ushort sen_tbuf1bcnt; /* Internal */
+ ushort sen_txlen; /* Tx Frame length counter */
+ ushort sen_iaddr1; /* Individual address filter */
+ ushort sen_iaddr2;
+ ushort sen_iaddr3;
+ ushort sen_iaddr4;
+ ushort sen_boffcnt; /* Backoff counter */
+
+ /* NOTE: Some versions of the manual have the following items
+ * incorrectly documented. Below is the proper order.
+ */
+ ushort sen_taddrh; /* temp address (MSB) */
+ ushort sen_taddrm;
+ ushort sen_taddrl; /* temp address (LSB) */
+} scc_enet_t;
+
+/*** MBX ************************************************************/
+
+#ifdef CONFIG_MBX
+/* Bits in parallel I/O port registers that have to be set/cleared
+ * to configure the pins for SCC1 use. The TCLK and RCLK seem unique
+ * to the MBX860 board. Any two of the four available clocks could be
+ * used, and the MPC860 cookbook manual has an example using different
+ * clock pins.
+ */
+#define PA_ENET_RXD ((ushort)0x0001)
+#define PA_ENET_TXD ((ushort)0x0002)
+#define PA_ENET_TCLK ((ushort)0x0200)
+#define PA_ENET_RCLK ((ushort)0x0800)
+#define PC_ENET_TENA ((ushort)0x0001)
+#define PC_ENET_CLSN ((ushort)0x0010)
+#define PC_ENET_RENA ((ushort)0x0020)
+
+/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
+ * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x000000ff)
+#define SICR_ENET_CLKRT ((uint)0x0000003d)
+#endif /* CONFIG_MBX */
+
+/*** RPXLITE ********************************************************/
+
+#ifdef CONFIG_RPXLITE
+/* This ENET stuff is for the MPC850 with ethernet on SCC2. Some of
+ * this may be unique to the RPX-Lite configuration.
+ * Note TENA is on Port B.
+ */
+#define PA_ENET_RXD ((ushort)0x0004)
+#define PA_ENET_TXD ((ushort)0x0008)
+#define PA_ENET_TCLK ((ushort)0x0200)
+#define PA_ENET_RCLK ((ushort)0x0800)
+#define PB_ENET_TENA ((uint)0x00002000)
+#define PC_ENET_CLSN ((ushort)0x0040)
+#define PC_ENET_RENA ((ushort)0x0080)
+
+#define SICR_ENET_MASK ((uint)0x0000ff00)
+#define SICR_ENET_CLKRT ((uint)0x00003d00)
+#endif /* CONFIG_RPXLITE */
+
+/*** BSEIP **********************************************************/
+
+#ifdef CONFIG_BSEIP
+/* This ENET stuff is for the MPC823 with ethernet on SCC2.
+ * This is unique to the BSE ip-Engine board.
+ */
+#define PA_ENET_RXD ((ushort)0x0004)
+#define PA_ENET_TXD ((ushort)0x0008)
+#define PA_ENET_TCLK ((ushort)0x0100)
+#define PA_ENET_RCLK ((ushort)0x0200)
+#define PB_ENET_TENA ((uint)0x00002000)
+#define PC_ENET_CLSN ((ushort)0x0040)
+#define PC_ENET_RENA ((ushort)0x0080)
+
+/* BSE uses port B and C bits for PHY control also.
+*/
+#define PB_BSE_POWERUP ((uint)0x00000004)
+#define PB_BSE_FDXDIS ((uint)0x00008000)
+#define PC_BSE_LOOPBACK ((ushort)0x0800)
+
+#define SICR_ENET_MASK ((uint)0x0000ff00)
+#define SICR_ENET_CLKRT ((uint)0x00002c00)
+#endif /* CONFIG_BSEIP */
+
+/*** RPXCLASSIC *****************************************************/
+
+#ifdef CONFIG_RPXCLASSIC
+/* Bits in parallel I/O port registers that have to be set/cleared
+ * to configure the pins for SCC1 use.
+ */
+#define PA_ENET_RXD ((ushort)0x0001)
+#define PA_ENET_TXD ((ushort)0x0002)
+#define PA_ENET_TCLK ((ushort)0x0200)
+#define PA_ENET_RCLK ((ushort)0x0800)
+#define PB_ENET_TENA ((uint)0x00001000)
+#define PC_ENET_CLSN ((ushort)0x0010)
+#define PC_ENET_RENA ((ushort)0x0020)
+
+/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
+ * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x000000ff)
+#define SICR_ENET_CLKRT ((uint)0x0000003d)
+#endif /* CONFIG_RPXCLASSIC */
+
+/*** TQM823L, TQM850L ***********************************************/
+
+#if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L)
+/* Bits in parallel I/O port registers that have to be set/cleared
+ * to configure the pins for SCC1 use.
+ */
+#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */
+#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */
+#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
+#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
+
+#define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */
+
+#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */
+#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */
+
+/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
+ * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x0000ff00)
+#define SICR_ENET_CLKRT ((uint)0x00002600)
+#endif /* CONFIG_TQM823L, CONFIG_TQM850L */
+
+/*** FPS850L *********************************************************/
+
+#ifdef CONFIG_FPS850L
+/* Bits in parallel I/O port registers that have to be set/cleared
+ * to configure the pins for SCC1 use.
+ */
+#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */
+#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */
+#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
+#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
+
+#define PC_ENET_TENA ((ushort)0x0002) /* PC 14 */
+#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */
+#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */
+
+/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
+ * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x0000ff00)
+#define SICR_ENET_CLKRT ((uint)0x00002600)
+#endif /* CONFIG_FPS850L */
+
+/*** TQM860L ********************************************************/
+
+#ifdef CONFIG_TQM860L
+/* Bits in parallel I/O port registers that have to be set/cleared
+ * to configure the pins for SCC1 use.
+ */
+#define PA_ENET_RXD ((ushort)0x0001) /* PA 15 */
+#define PA_ENET_TXD ((ushort)0x0002) /* PA 14 */
+#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
+#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
+
+#define PC_ENET_TENA ((ushort)0x0001) /* PC 15 */
+#define PC_ENET_CLSN ((ushort)0x0010) /* PC 11 */
+#define PC_ENET_RENA ((ushort)0x0020) /* PC 10 */
+
+/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
+ * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x000000ff)
+#define SICR_ENET_CLKRT ((uint)0x00000026)
+#endif /* CONFIG_TQM860L */
+
+/*** SPD823TS *******************************************************/
+
+#ifdef CONFIG_SPD823TS
+/* Bits in parallel I/O port registers that have to be set/cleared
+ * to configure the pins for SCC2 use.
+ */
+#define PA_ENET_MDC ((ushort)0x0001) /* PA 15 !!! */
+#define PA_ENET_MDIO ((ushort)0x0002) /* PA 14 !!! */
+#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */
+#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */
+#define PA_ENET_RCLK ((ushort)0x0200) /* PA 6 */
+#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
+
+#define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */
+
+#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */
+#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */
+#define PC_ENET_RESET ((ushort)0x0100) /* PC 7 !!! */
+
+/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK2) to
+ * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x0000ff00)
+#define SICR_ENET_CLKRT ((uint)0x00002E00)
+#endif /* CONFIG_SPD823TS */
+
+
+/*** SM850 *********************************************************/
+
+/* The SM850 Service Module uses SCC2 for IrDA and SCC3 for Ethernet */
+
+#ifdef CONFIG_SM850
+#define PB_ENET_RXD ((uint)0x00000004) /* PB 29 */
+#define PB_ENET_TXD ((uint)0x00000002) /* PB 30 */
+#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
+#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
+
+#define PC_ENET_LBK ((ushort)0x0008) /* PC 12 */
+#define PC_ENET_TENA ((ushort)0x0004) /* PC 13 */
+
+#define PC_ENET_RENA ((ushort)0x0800) /* PC 4 */
+#define PC_ENET_CLSN ((ushort)0x0400) /* PC 5 */
+
+/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
+ * SCC3. Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero.
+ */
+#define SICR_ENET_MASK ((uint)0x00FF0000)
+#define SICR_ENET_CLKRT ((uint)0x00260000)
+#endif /* CONFIG_SM850 */
+
+/*********************************************************************/
+
+/* SCC Event register as used by Ethernet.
+*/
+#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */
+#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */
+#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */
+#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */
+#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */
+#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */
+
+/* SCC Mode Register (PMSR) as used by Ethernet.
+*/
+#define SCC_PMSR_HBC ((ushort)0x8000) /* Enable heartbeat */
+#define SCC_PMSR_FC ((ushort)0x4000) /* Force collision */
+#define SCC_PMSR_RSH ((ushort)0x2000) /* Receive short frames */
+#define SCC_PMSR_IAM ((ushort)0x1000) /* Check individual hash */
+#define SCC_PMSR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */
+#define SCC_PMSR_PRO ((ushort)0x0200) /* Promiscuous mode */
+#define SCC_PMSR_BRO ((ushort)0x0100) /* Catch broadcast pkts */
+#define SCC_PMSR_SBT ((ushort)0x0080) /* Special backoff timer */
+#define SCC_PMSR_LPB ((ushort)0x0040) /* Set Loopback mode */
+#define SCC_PMSR_SIP ((ushort)0x0020) /* Sample Input Pins */
+#define SCC_PMSR_LCW ((ushort)0x0010) /* Late collision window */
+#define SCC_PMSR_NIB22 ((ushort)0x000a) /* Start frame search */
+#define SCC_PMSR_FDE ((ushort)0x0001) /* Full duplex enable */
+
+/* Buffer descriptor control/status used by Ethernet receive.
+*/
+#define BD_ENET_RX_EMPTY ((ushort)0x8000)
+#define BD_ENET_RX_WRAP ((ushort)0x2000)
+#define BD_ENET_RX_INTR ((ushort)0x1000)
+#define BD_ENET_RX_LAST ((ushort)0x0800)
+#define BD_ENET_RX_FIRST ((ushort)0x0400)
+#define BD_ENET_RX_MISS ((ushort)0x0100)
+#define BD_ENET_RX_LG ((ushort)0x0020)
+#define BD_ENET_RX_NO ((ushort)0x0010)
+#define BD_ENET_RX_SH ((ushort)0x0008)
+#define BD_ENET_RX_CR ((ushort)0x0004)
+#define BD_ENET_RX_OV ((ushort)0x0002)
+#define BD_ENET_RX_CL ((ushort)0x0001)
+#define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */
+
+/* Buffer descriptor control/status used by Ethernet transmit.
+*/
+#define BD_ENET_TX_READY ((ushort)0x8000)
+#define BD_ENET_TX_PAD ((ushort)0x4000)
+#define BD_ENET_TX_WRAP ((ushort)0x2000)
+#define BD_ENET_TX_INTR ((ushort)0x1000)
+#define BD_ENET_TX_LAST ((ushort)0x0800)
+#define BD_ENET_TX_TC ((ushort)0x0400)
+#define BD_ENET_TX_DEF ((ushort)0x0200)
+#define BD_ENET_TX_HB ((ushort)0x0100)
+#define BD_ENET_TX_LC ((ushort)0x0080)
+#define BD_ENET_TX_RL ((ushort)0x0040)
+#define BD_ENET_TX_RCMASK ((ushort)0x003c)
+#define BD_ENET_TX_UN ((ushort)0x0002)
+#define BD_ENET_TX_CSL ((ushort)0x0001)
+#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */
+
+/* SCC as UART
+*/
+typedef struct scc_uart {
+ sccp_t scc_genscc;
+ uint scc_res1; /* Reserved */
+ uint scc_res2; /* Reserved */
+ ushort scc_maxidl; /* Maximum idle chars */
+ ushort scc_idlc; /* temp idle counter */
+ ushort scc_brkcr; /* Break count register */
+ ushort scc_parec; /* receive parity error counter */
+ ushort scc_frmec; /* receive framing error counter */
+ ushort scc_nosec; /* receive noise counter */
+ ushort scc_brkec; /* receive break condition counter */
+ ushort scc_brkln; /* last received break length */
+ ushort scc_uaddr1; /* UART address character 1 */
+ ushort scc_uaddr2; /* UART address character 2 */
+ ushort scc_rtemp; /* Temp storage */
+ ushort scc_toseq; /* Transmit out of sequence char */
+ ushort scc_char1; /* control character 1 */
+ ushort scc_char2; /* control character 2 */
+ ushort scc_char3; /* control character 3 */
+ ushort scc_char4; /* control character 4 */
+ ushort scc_char5; /* control character 5 */
+ ushort scc_char6; /* control character 6 */
+ ushort scc_char7; /* control character 7 */
+ ushort scc_char8; /* control character 8 */
+ ushort scc_rccm; /* receive control character mask */
+ ushort scc_rccr; /* receive control character register */
+ ushort scc_rlbc; /* receive last break character */
+} scc_uart_t;
+
+/* SCC Event and Mask registers when it is used as a UART.
+*/
+#define UART_SCCM_GLR ((ushort)0x1000)
+#define UART_SCCM_GLT ((ushort)0x0800)
+#define UART_SCCM_AB ((ushort)0x0200)
+#define UART_SCCM_IDL ((ushort)0x0100)
+#define UART_SCCM_GRA ((ushort)0x0080)
+#define UART_SCCM_BRKE ((ushort)0x0040)
+#define UART_SCCM_BRKS ((ushort)0x0020)
+#define UART_SCCM_CCR ((ushort)0x0008)
+#define UART_SCCM_BSY ((ushort)0x0004)
+#define UART_SCCM_TX ((ushort)0x0002)
+#define UART_SCCM_RX ((ushort)0x0001)
+
+/* The SCC PMSR when used as a UART.
+*/
+#define SCU_PMSR_FLC ((ushort)0x8000)
+#define SCU_PMSR_SL ((ushort)0x4000)
+#define SCU_PMSR_CL ((ushort)0x3000)
+#define SCU_PMSR_UM ((ushort)0x0c00)
+#define SCU_PMSR_FRZ ((ushort)0x0200)
+#define SCU_PMSR_RZS ((ushort)0x0100)
+#define SCU_PMSR_SYN ((ushort)0x0080)
+#define SCU_PMSR_DRT ((ushort)0x0040)
+#define SCU_PMSR_PEN ((ushort)0x0010)
+#define SCU_PMSR_RPM ((ushort)0x000c)
+#define SCU_PMSR_REVP ((ushort)0x0008)
+#define SCU_PMSR_TPM ((ushort)0x0003)
+#define SCU_PMSR_TEVP ((ushort)0x0002)
+
+/* CPM Transparent mode SCC.
+ */
+typedef struct scc_trans {
+ sccp_t st_genscc;
+ uint st_cpres; /* Preset CRC */
+ uint st_cmask; /* Constant mask for CRC */
+} scc_trans_t;
+
+#define BD_SCC_TX_LAST ((ushort)0x0800)
+
+/* IIC parameter RAM.
+*/
+typedef struct iic {
+ ushort iic_rbase; /* Rx Buffer descriptor base address */
+ ushort iic_tbase; /* Tx Buffer descriptor base address */
+ u_char iic_rfcr; /* Rx function code */
+ u_char iic_tfcr; /* Tx function code */
+ ushort iic_mrblr; /* Max receive buffer length */
+ uint iic_rstate; /* Internal */
+ uint iic_rdp; /* Internal */
+ ushort iic_rbptr; /* Internal */
+ ushort iic_rbc; /* Internal */
+ uint iic_rxtmp; /* Internal */
+ uint iic_tstate; /* Internal */
+ uint iic_tdp; /* Internal */
+ ushort iic_tbptr; /* Internal */
+ ushort iic_tbc; /* Internal */
+ uint iic_txtmp; /* Internal */
+} iic_t;
+
+#define BD_IIC_START ((ushort)0x0400)
+
+/* CPM interrupts. There are nearly 32 interrupts generated by CPM
+ * channels or devices. All of these are presented to the PPC core
+ * as a single interrupt. The CPM interrupt handler dispatches its
+ * own handlers, in a similar fashion to the PPC core handler. We
+ * use the table as defined in the manuals (i.e. no special high
+ * priority and SCC1 == SCCa, etc...).
+ */
+#define CPMVEC_NR 32
+#define CPMVEC_PIO_PC15 ((ushort)0x1f)
+#define CPMVEC_SCC1 ((ushort)0x1e)
+#define CPMVEC_SCC2 ((ushort)0x1d)
+#define CPMVEC_SCC3 ((ushort)0x1c)
+#define CPMVEC_SCC4 ((ushort)0x1b)
+#define CPMVEC_PIO_PC14 ((ushort)0x1a)
+#define CPMVEC_TIMER1 ((ushort)0x19)
+#define CPMVEC_PIO_PC13 ((ushort)0x18)
+#define CPMVEC_PIO_PC12 ((ushort)0x17)
+#define CPMVEC_SDMA_CB_ERR ((ushort)0x16)
+#define CPMVEC_IDMA1 ((ushort)0x15)
+#define CPMVEC_IDMA2 ((ushort)0x14)
+#define CPMVEC_TIMER2 ((ushort)0x12)
+#define CPMVEC_RISCTIMER ((ushort)0x11)
+#define CPMVEC_I2C ((ushort)0x10)
+#define CPMVEC_PIO_PC11 ((ushort)0x0f)
+#define CPMVEC_PIO_PC10 ((ushort)0x0e)
+#define CPMVEC_TIMER3 ((ushort)0x0c)
+#define CPMVEC_PIO_PC9 ((ushort)0x0b)
+#define CPMVEC_PIO_PC8 ((ushort)0x0a)
+#define CPMVEC_PIO_PC7 ((ushort)0x09)
+#define CPMVEC_TIMER4 ((ushort)0x07)
+#define CPMVEC_PIO_PC6 ((ushort)0x06)
+#define CPMVEC_SPI ((ushort)0x05)
+#define CPMVEC_SMC1 ((ushort)0x04)
+#define CPMVEC_SMC2 ((ushort)0x03)
+#define CPMVEC_PIO_PC5 ((ushort)0x02)
+#define CPMVEC_PIO_PC4 ((ushort)0x01)
+#define CPMVEC_ERROR ((ushort)0x00)
+
+/* CPM interrupt configuration vector.
+*/
+#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */
+#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */
+#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */
+#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */
+#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrrupt */
+#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */
+#define CICR_IEN ((uint)0x00000080) /* Int. enable */
+#define CICR_SPS ((uint)0x00000001) /* SCC Spread */
+
+extern void cpm_install_handler(int vec,
+ void (*handler)(void *, struct pt_regs *regs), void *dev_id);
+extern void cpm_free_handler(int vec);
+
+#endif /* __CPM_8XX__ */
diff --git a/include/asm-ppc/ide.h b/include/asm-ppc/ide.h
index c211ba0387b1..bff070ea28a5 100644
--- a/include/asm-ppc/ide.h
+++ b/include/asm-ppc/ide.h
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.ide.h 1.13 08/20/01 15:25:16 paulus
+ * BK Id: SCCS/s.ide.h 1.16 09/28/01 07:54:24 trini
*/
/*
* linux/include/asm-ppc/ide.h
@@ -17,6 +17,7 @@
#include <linux/sched.h>
#include <asm/processor.h>
+#include <asm/mpc8xx.h>
#ifndef MAX_HWIFS
#define MAX_HWIFS 8
@@ -138,8 +139,9 @@ typedef union {
/*
* The following are not needed for the non-m68k ports
+ * unless direct IDE on 8xx
*/
-#ifdef CONFIG_APUS
+#if (defined CONFIG_APUS || defined CONFIG_BLK_DEV_MPC8xx_IDE )
#define ide_ack_intr(hwif) (hwif->hw.ack_intr ? hwif->hw.ack_intr(hwif) : 1)
#else
#define ide_ack_intr(hwif) (1)
diff --git a/include/asm-ppc/oak.h b/include/asm-ppc/oak.h
index 9c370dbdc715..1bea6f4f2007 100644
--- a/include/asm-ppc/oak.h
+++ b/include/asm-ppc/oak.h
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.oak.h 1.7 05/17/01 18:14:25 cort
+ * BK Id: SCCS/s.oak.h 1.10 09/14/01 17:37:56 trini
*/
/*
*
@@ -20,11 +20,6 @@
#include <asm/irq.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
#define _IO_BASE 0
#define _ISA_MEM_BASE 0
#define PCI_DRAM_OFFSET 0
@@ -48,6 +43,7 @@ extern "C" {
#define OAKNET_INT AIC_INT27
#define OAKSERIAL_INT AIC_INT28
+#ifndef __ASSEMBLY__
/*
* Data structure defining board information maintained by the boot
* ROM on IBM's "Oak" evaluation board. An effort has been made to
@@ -64,15 +60,6 @@ typedef struct board_info {
unsigned int bi_busfreq; /* Bus speed, in Hz */
} bd_t;
-
-#ifdef __cplusplus
-}
-#endif
-
-/* Generic 4xx type
-*/
-#define _MACH_4xx (_MACH_oak)
-
-
+#endif /* !__ASSEMBLY__ */
#endif /* __OAK_H__ */
#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/spd8xx.h b/include/asm-ppc/spd8xx.h
index 7e6418c1ba43..c8c3c0dd79ed 100644
--- a/include/asm-ppc/spd8xx.h
+++ b/include/asm-ppc/spd8xx.h
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.spd8xx.h 1.5 05/17/01 18:14:25 cort
+ * BK Id: SCCS/s.spd8xx.h 1.6 09/14/01 17:37:56 trini
*/
/*
* A collection of structures, addresses, and values associated with
@@ -101,8 +101,4 @@ typedef struct bd_info {
*/
#define NR_8259_INTS 0
-/* Generic 8xx type
-*/
-#define _MACH_8xx (_MACH_spd8xx)
-
#endif /* __MACH_SPD8xx_DEFS */
diff --git a/include/asm-ppc/walnut.h b/include/asm-ppc/walnut.h
index 70d56741a1b1..088e6ec9dc8c 100644
--- a/include/asm-ppc/walnut.h
+++ b/include/asm-ppc/walnut.h
@@ -1,5 +1,5 @@
/*
- * BK Id: SCCS/s.walnut.h 1.7 05/17/01 18:14:26 cort
+ * BK Id: SCCS/s.walnut.h 1.10 09/14/01 17:37:56 trini
*/
/*
*
@@ -27,10 +27,7 @@
#ifndef __WALNUT_H__
#define __WALNUT_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
+#ifndef __ASSEMBLY__
/*
* Data structure defining board information maintained by the boot
* ROM on IBM's "Walnut" evaluation board. An effort has been made to
@@ -49,19 +46,13 @@ typedef struct board_info {
unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
} bd_t;
+#endif /* !__ASSEMBLY__ */
+
/* Memory map for the IBM "Walnut" 405GP evaluation board.
* Generic 4xx plus RTC.
*/
#define WALNUT_RTC_ADDR ((uint)0xf0001000)
#define WALNUT_RTC_SIZE ((uint)4*1024)
-#ifdef __cplusplus
-}
-#endif
-
-/* Generic 4xx type
-*/
-#define _MACH_4xx (_MACH_walnut)
-
#endif /* __WALNUT_H__ */
#endif /* __KERNEL__ */
diff --git a/include/linux/module.h b/include/linux/module.h
index 018e766f8fce..9efd6da5d3ff 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -348,13 +348,6 @@ extern struct module *module_list;
#define EXPORT_SYMBOL_NOVERS(var) error config_must_be_included_before_module
#define EXPORT_SYMBOL_GPL(var) error config_must_be_included_before_module
-#elif !defined(EXPORT_SYMTAB)
-
-#define __EXPORT_SYMBOL(sym,str) error this_object_must_be_defined_as_export_objs_in_the_Makefile
-#define EXPORT_SYMBOL(var) error this_object_must_be_defined_as_export_objs_in_the_Makefile
-#define EXPORT_SYMBOL_NOVERS(var) error this_object_must_be_defined_as_export_objs_in_the_Makefile
-#define EXPORT_SYMBOL_GPL(var) error this_object_must_be_defined_as_export_objs_in_the_Makefile
-
#elif !defined(CONFIG_MODULES)
#define __EXPORT_SYMBOL(sym,str)
@@ -362,6 +355,13 @@ extern struct module *module_list;
#define EXPORT_SYMBOL_NOVERS(var)
#define EXPORT_SYMBOL_GPL(var)
+#elif !defined(EXPORT_SYMTAB)
+
+#define __EXPORT_SYMBOL(sym,str) error this_object_must_be_defined_as_export_objs_in_the_Makefile
+#define EXPORT_SYMBOL(var) error this_object_must_be_defined_as_export_objs_in_the_Makefile
+#define EXPORT_SYMBOL_NOVERS(var) error this_object_must_be_defined_as_export_objs_in_the_Makefile
+#define EXPORT_SYMBOL_GPL(var) error this_object_must_be_defined_as_export_objs_in_the_Makefile
+
#else
#define __EXPORT_SYMBOL(sym, str) \
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 0cba3d5028d3..3998ff150d9d 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -635,6 +635,7 @@
#define PCI_DEVICE_ID_APPLE_KL_USB 0x0019
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021
+#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030
#define PCI_VENDOR_ID_YAMAHA 0x1073
#define PCI_DEVICE_ID_YAMAHA_724 0x0004
diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h
index 99b909989988..018320e36d51 100644
--- a/include/linux/reiserfs_fs.h
+++ b/include/linux/reiserfs_fs.h
@@ -17,6 +17,7 @@
#ifdef __KERNEL__
#include <linux/slab.h>
#include <linux/tqueue.h>
+#include <asm/hardirq.h>
#endif
/*
@@ -98,6 +99,21 @@
*/
#define REISERFS_DEBUG_CODE 5 /* extra messages to help find/debug errors */
+/* assertions handling */
+
+/** always check a condition and panic if it's false. */
+#define RASSERT( cond, format, args... ) \
+if( !( cond ) ) \
+ reiserfs_panic( 0, "reiserfs[%i]: assertion " #cond " failed at " \
+ __FILE__ ":%i:" __FUNCTION__ ": " format "\n", \
+ in_interrupt() ? -1 : current -> pid, __LINE__ , ##args )
+
+#if defined( CONFIG_REISERFS_CHECK )
+#define RFALSE( cond, format, args... ) RASSERT( !( cond ), format, ##args )
+#else
+#define RFALSE( cond, format, args... ) do {;} while( 0 )
+#endif
+
/*
* Disk Data Structures
*/
diff --git a/include/linux/smbno.h b/include/linux/smbno.h
index aa5ac336c8cf..235ab1d1ec89 100644
--- a/include/linux/smbno.h
+++ b/include/linux/smbno.h
@@ -39,19 +39,20 @@
#define ERRbadshare 32 /* Share mode on file conflict with open mode */
#define ERRlock 33 /* Lock request conflicts with existing lock */
#define ERRfilexists 80 /* File in operation already exists */
-#define ERRinvalidparam 87 /* ERROR_INVALID_PARAMETER */
-#define ERRdiskfull 112 /* ERROR_DISK_FULL */
-#define ERRinvalidname 123 /* ERROR_INVALID_NAME */
-#define ERRdirnotempty 145 /* ERROR_DIR_NOT_EMPTY */
-#define ERRnotlocked 158 /* ERROR_NOT_LOCKED */
-#define ERRexists 183 /* ERROR_ALREADY_EXISTS, see also 80 */
#define ERRbadpipe 230 /* Named pipe invalid */
#define ERRpipebusy 231 /* All instances of pipe are busy */
#define ERRpipeclosing 232 /* named pipe close in progress */
#define ERRnotconnected 233 /* No process on other end of named pipe */
#define ERRmoredata 234 /* More data to be returned */
-#define ERROR_EAS_DIDNT_FIT 275 /* Extended attributes didn't fit */
-#define ERROR_EAS_NOT_SUPPORTED 282 /* Extended attributes not supported */
+
+#define ERROR_INVALID_PARAMETER 87
+#define ERROR_DISK_FULL 112
+#define ERROR_INVALID_NAME 123
+#define ERROR_DIR_NOT_EMPTY 145
+#define ERROR_NOT_LOCKED 158
+#define ERROR_ALREADY_EXISTS 183 /* see also 80 ? */
+#define ERROR_EAS_DIDNT_FIT 275 /* Extended attributes didn't fit */
+#define ERROR_EAS_NOT_SUPPORTED 282 /* Extended attributes not supported */
/* Error codes for the ERRSRV class */
generated by cgit v1.2.3 (git 2.46.0) at 2026-01-26 23:43:38 +0000