diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-iop3xx/iop331.h | 47 | ||||
| -rw-r--r-- | include/asm-arm/arch-iop3xx/iq80331.h | 15 | ||||
| -rw-r--r-- | include/asm-arm/arch-iop3xx/vmalloc.h | 5 | ||||
| -rw-r--r-- | include/asm-arm/arch-ixp4xx/ixp4xx-regs.h | 12 | ||||
| -rw-r--r-- | include/asm-arm/pgtable.h | 2 |
5 files changed, 49 insertions, 32 deletions
diff --git a/include/asm-arm/arch-iop3xx/iop331.h b/include/asm-arm/arch-iop3xx/iop331.h index c4854a1d3563..cb16c5fda78e 100644 --- a/include/asm-arm/arch-iop3xx/iop331.h +++ b/include/asm-arm/arch-iop3xx/iop331.h @@ -4,7 +4,7 @@ * Intel IOP331 Chip definitions * * Author: Dave Jiang (dave.jiang@intel.com) - * Copyright (C) 2003 Intel Corp. + * Copyright (C) 2003, 2004 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -21,7 +21,8 @@ */ #ifndef __ASSEMBLY__ #ifdef CONFIG_ARCH_IOP331 -#define iop_is_331() ((processor_id & 0xffffffb0) == 0x69054090) +/*#define iop_is_331() ((processor_id & 0xffffffb0) == 0x69054090) */ +#define iop_is_331() ((processor_id & 0xffffff30) == 0x69054010) #else #define iop_is_331() 0 #endif @@ -30,20 +31,28 @@ /* * IOP331 I/O and Mem space regions for PCI autoconfiguration */ -#define IOP331_PCI_LOWER_IO 0x90000000 -#define IOP331_PCI_UPPER_IO 0x900fffff -#define IOP331_PCI_LOWER_MEM 0x80000000 -#define IOP331_PCI_UPPER_MEM 0x87ffffff - -#define IOP331_PCI_WINDOW_SIZE 128 * 0x100000 - +#define IOP331_PCI_IO_WINDOW_SIZE 0x10000 +#define IOP331_PCI_LOWER_IO_PA 0x90000000 +#define IOP331_PCI_LOWER_IO_VA 0xfe000000 +#define IOP331_PCI_LOWER_IO_BA (*IOP331_OIOWTVR) +#define IOP331_PCI_UPPER_IO_PA (IOP331_PCI_LOWER_IO_PA + IOP331_PCI_IO_WINDOW_SIZE - 1) +#define IOP331_PCI_UPPER_IO_VA (IOP331_PCI_LOWER_IO_VA + IOP331_PCI_IO_WINDOW_SIZE - 1) +#define IOP331_PCI_UPPER_IO_BA (IOP331_PCI_LOWER_IO_BA + IOP331_PCI_IO_WINDOW_SIZE - 1) +#define IOP331_PCI_IO_OFFSET (IOP331_PCI_LOWER_IO_VA - IOP331_PCI_LOWER_IO_BA) + +#define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1) +#define IOP331_PCI_LOWER_MEM_PA 0x80000000 +#define IOP331_PCI_LOWER_MEM_VA 0x80000000 +#define IOP331_PCI_LOWER_MEM_BA (*IOP331_OMWTVR0) +#define IOP331_PCI_UPPER_MEM_PA (IOP331_PCI_LOWER_MEM_PA + IOP331_PCI_MEM_WINDOW_SIZE - 1) +#define IOP331_PCI_UPPER_MEM_VA (IOP331_PCI_LOWER_MEM_VA + IOP331_PCI_MEM_WINDOW_SIZE - 1) +#define IOP331_PCI_UPPER_MEM_BA (IOP331_PCI_LOWER_MEM_BA + IOP331_PCI_MEM_WINDOW_SIZE - 1) +#define IOP331_PCI_MEM_OFFSET (IOP331_PCI_LOWER_MEM_VA - IOP331_PCI_LOWER_MEM_BA) /* * IOP331 chipset registers */ -#define IOP331_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/ -// #define IOP331_VIRT_MEM_BASE 0xfff00000 /* chip virtual mem address*/ - +#define IOP331_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/ #define IOP331_PHYS_MEM_BASE 0xffffe000 /* chip physical memory address */ #define IOP331_REG_ADDR(reg) (IOP331_VIRT_MEM_BASE | (reg)) @@ -248,8 +257,14 @@ #define IOP331_TU_TISR (volatile u32 *)IOP331_REG_ADDR(0x000007E8) #define IOP331_TU_WDTCR (volatile u32 *)IOP331_REG_ADDR(0x000007EC) -#define IOP331_TICK_RATE 266000000 /* 266 MHz clock */ +#if defined(CONFIG_ARCH_IOP331) +#define IOP331_TICK_RATE 266000000 /* 266 MHz IB clock */ +#endif +#if defined(CONFIG_IOP331_STEPD) || defined(CONFIG_ARCH_IQ80333) +#undef IOP331_TICK_RATE +#define IOP331_TICK_RATE 333000000 /* 333 Mhz IB clock */ +#endif /* Application accelerator unit 0x00000800 - 0x000008FF */ #define IOP331_AAU_ACR (volatile u32 *)IOP331_REG_ADDR(0x00000800) @@ -324,6 +339,11 @@ /* 0x00001740 through 0x0000176C UART 1 */ +#define IOP331_UART0_PHYS (IOP331_PHYS_MEM_BASE | 0x00001700) /* UART #1 physical */ +#define IOP331_UART1_PHYS (IOP331_PHYS_MEM_BASE | 0x00001740) /* UART #2 physical */ +#define IOP331_UART0_VIRT (IOP331_VIRT_MEM_BASE | 0x00001700) /* UART #1 virtual addr */ +#define IOP331_UART1_VIRT (IOP331_VIRT_MEM_BASE | 0x00001740) /* UART #2 virtual addr */ + /* Reserved 0x00001770 through 0x0000177F */ /* General Purpose I/O Registers */ @@ -333,6 +353,7 @@ /* Reserved 0x0000178c through 0x000019ff */ + #ifndef __ASSEMBLY__ extern void iop331_map_io(void); extern void iop331_init_irq(void); diff --git a/include/asm-arm/arch-iop3xx/iq80331.h b/include/asm-arm/arch-iop3xx/iq80331.h index a076327fe5f2..0668e78d483e 100644 --- a/include/asm-arm/arch-iop3xx/iq80331.h +++ b/include/asm-arm/arch-iop3xx/iq80331.h @@ -7,30 +7,15 @@ #ifndef _IQ80331_H_ #define _IQ80331_H_ -#define IQ80331_RAMBASE 0x00000000 - #define IQ80331_FLASHBASE 0xc0000000 /* Flash */ #define IQ80331_FLASHSIZE 0x00800000 #define IQ80331_FLASHWIDTH 1 -#define IQ80331_UART0_PHYS (IOP331_PHYS_MEM_BASE | 0x00001700) /* UART #1 physical */ -#define IQ80331_UART1_PHYS (IOP331_PHYS_MEM_BASE | 0x00001740) /* UART #2 physical */ -#define IQ80331_UART0_VIRT (IOP331_VIRT_MEM_BASE | 0x00001700) /* UART #1 virtual addr */ -#define IQ80331_UART1_VIRT (IOP331_VIRT_MEM_BASE | 0x00001740) /* UART #2 virtual addr */ #define IQ80331_7SEG_1 0xce840000 /* 7-Segment MSB */ #define IQ80331_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */ #define IQ80331_ROTARY_SW 0xce8d0000 /* Rotary Switch */ #define IQ80331_BATT_STAT 0xce8f0000 /* Battery Status */ -/* - * IQ80331 PCI I/O and Mem space regions - */ -#define IQ80331_PCI_IO_BASE 0x90000000 -#define IQ80331_PCI_IO_SIZE 0x00010000 -#define IQ80331_PCI_MEM_BASE 0x80000000 -#define IQ80331_PCI_MEM_SIZE 0x08000000 -#define IQ80331_PCI_IO_OFFSET 0x6e000000 - #ifndef __ASSEMBLY__ extern void iq80331_map_io(void); #endif diff --git a/include/asm-arm/arch-iop3xx/vmalloc.h b/include/asm-arm/arch-iop3xx/vmalloc.h index d59dfeda9ab2..dc1d2a957164 100644 --- a/include/asm-arm/arch-iop3xx/vmalloc.h +++ b/include/asm-arm/arch-iop3xx/vmalloc.h @@ -13,4 +13,7 @@ #define VMALLOC_OFFSET (8*1024*1024) #define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) #define VMALLOC_VMADDR(x) ((unsigned long)(x)) -#define VMALLOC_END (0xe8000000) +//#define VMALLOC_END (0xe8000000) +/* increase usable physical RAM to ~992M per RMK */ +#define VMALLOC_END (0xfe000000) + diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h index aaf6b2a3602c..8eeb1db6309d 100644 --- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h +++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h @@ -43,6 +43,10 @@ * 0xC8000000 0x0000C000 0xffbf2000 On-Chip Peripherals */ +/* + * Queue Manager + */ +#define IXP4XX_QMGR_BASE_PHYS (0x60000000) /* * Expansion BUS Configuration registers @@ -107,7 +111,9 @@ #define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) #define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) #define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) -#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) +#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) +#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) +#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) #define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) #define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) @@ -115,7 +121,9 @@ #define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) #define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) #define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) -#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) +#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) +#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) +#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) /* * Constants to make it easy to access Interrupt Controller registers diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index 547e5aa8be7b..10d747ba0ce0 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -310,7 +310,7 @@ PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG); #define set_pmd(pmdp,pmd) \ do { \ - *pmdp = pmd; \ + *(pmdp) = pmd; \ flush_pmd_entry(pmdp); \ } while (0) |