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-rw-r--r--include/asm-arm/arch-adifcc/time.h2
-rw-r--r--include/asm-arm/arch-clps711x/memory.h2
-rw-r--r--include/asm-arm/arch-epxa10db/ether00.h2
-rw-r--r--include/asm-arm/arch-epxa10db/pld_conf00.h2
-rw-r--r--include/asm-arm/arch-integrator/bits.h2
-rw-r--r--include/asm-arm/arch-iop3xx/iop310.h2
-rw-r--r--include/asm-arm/arch-iop3xx/iop321.h10
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h4
-rw-r--r--include/asm-arm/arch-sa1100/graphicsclient.h4
-rw-r--r--include/asm-arm/arch-sa1100/h3600_gpio.h2
-rw-r--r--include/asm-arm/arch-sa1100/memory.h2
-rw-r--r--include/asm-arm/arch-sa1100/uncompress.h2
-rw-r--r--include/asm-arm/dma-mapping.h2
-rw-r--r--include/asm-arm/proc-armo/pgalloc.h2
-rw-r--r--include/asm-arm/sizes.h2
15 files changed, 20 insertions, 22 deletions
diff --git a/include/asm-arm/arch-adifcc/time.h b/include/asm-arm/arch-adifcc/time.h
index 75e1c7eb77bc..2237ef006e71 100644
--- a/include/asm-arm/arch-adifcc/time.h
+++ b/include/asm-arm/arch-adifcc/time.h
@@ -4,6 +4,6 @@
*/
/*
- * No on board timer, implemenation @ arch/arm/kernel/xscale-time.c
+ * No on board timer, implementation @ arch/arm/kernel/xscale-time.c
*/
diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h
index 317fd2c22dd5..efa55531eae2 100644
--- a/include/asm-arm/arch-clps711x/memory.h
+++ b/include/asm-arm/arch-clps711x/memory.h
@@ -95,7 +95,7 @@
* Because of the wide memory address space between physical RAM banks on the
* SA1100, it's much more convenient to use Linux's NUMA support to implement
* our memory map representation. Assuming all memory nodes have equal access
- * characteristics, we then have generic discontigous memory support.
+ * characteristics, we then have generic discontiguous memory support.
*
* Of course, all this isn't mandatory for SA1100 implementations with only
* one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM.
diff --git a/include/asm-arm/arch-epxa10db/ether00.h b/include/asm-arm/arch-epxa10db/ether00.h
index 29a458320094..b737b8aabe2f 100644
--- a/include/asm-arm/arch-epxa10db/ether00.h
+++ b/include/asm-arm/arch-epxa10db/ether00.h
@@ -55,7 +55,7 @@ typedef struct buf_desc
#define ETHER_ARC_SIZE (21)
/*
-* Regsiter definitions and masks
+* Register definitions and masks
*/
#define ETHER_DMA_CTL(base) (ETHER00_TYPE (base + 0x100))
#define ETHER_DMA_CTL_DMBURST_OFST (2)
diff --git a/include/asm-arm/arch-epxa10db/pld_conf00.h b/include/asm-arm/arch-epxa10db/pld_conf00.h
index b7e8dbb33033..7af2c38dacc6 100644
--- a/include/asm-arm/arch-epxa10db/pld_conf00.h
+++ b/include/asm-arm/arch-epxa10db/pld_conf00.h
@@ -8,7 +8,7 @@
/*
*
* This file contains the register definitions for the Excalibur
- * Interrupnt controller INT_CTRL00.
+ * Interrupt controller INT_CTRL00.
*
* Copyright (C) 2001 Altera Corporation
*
diff --git a/include/asm-arm/arch-integrator/bits.h b/include/asm-arm/arch-integrator/bits.h
index b43a80e79490..09b024e0496a 100644
--- a/include/asm-arm/arch-integrator/bits.h
+++ b/include/asm-arm/arch-integrator/bits.h
@@ -16,7 +16,7 @@
/* DO NOT EDIT!! - this file automatically generated
* from .s file by awk -f s2h.awk
*/
-/* Bit field defintions
+/* Bit field definitions
* Copyright (C) ARM Limited 1998. All rights reserved.
*/
diff --git a/include/asm-arm/arch-iop3xx/iop310.h b/include/asm-arm/arch-iop3xx/iop310.h
index 09d30fcfa38a..01eaaca1e05d 100644
--- a/include/asm-arm/arch-iop3xx/iop310.h
+++ b/include/asm-arm/arch-iop3xx/iop310.h
@@ -1,7 +1,7 @@
/*
* linux/include/asm/arch-iop3xx/iop310.h
*
- * Intel IOP310 Compainion Chip definitions
+ * Intel IOP310 Companion Chip definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/include/asm-arm/arch-iop3xx/iop321.h b/include/asm-arm/arch-iop3xx/iop321.h
index 34bb2da3c586..b0c704bd96fd 100644
--- a/include/asm-arm/arch-iop3xx/iop321.h
+++ b/include/asm-arm/arch-iop3xx/iop321.h
@@ -17,12 +17,10 @@
/*
* IOP321 I/O and Mem space regions for PCI autoconfiguration
*/
-#define IOP321_PCI_LOWER_IO 0x90000000
-#define IOP321_PCI_UPPER_IO 0x9000ffff
-#define IOP321_PCI_LOWER_MEM 0x80000000
-#define IOP321_PCI_UPPER_MEM 0x83ffffff
-
-#define IOP321_PCI_WINDOW_SIZE 64 * 0x100000
+#define IOP321_PCI_IO_BASE 0x90000000
+#define IOP321_PCI_IO_SIZE 0x00010000
+#define IOP321_PCI_MEM_BASE 0x40000000
+#define IOP321_PCI_MEM_SIZE 0x40000000
/*
* IOP321 chipset registers
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 1855237d54ee..50952e796c8a 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -690,9 +690,9 @@ typedef void (*ExcpHndlr) (void) ;
#define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */
#define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */
-#define ICCR0_AME (1 << 7) /* Adress match enable */
+#define ICCR0_AME (1 << 7) /* Address match enable */
#define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */
-#define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */
+#define ICCR0_RIE (1 << 5) /* Receive FIFO interrupt enable */
#define ICCR0_RXE (1 << 4) /* Receive enable */
#define ICCR0_TXE (1 << 3) /* Transmit enable */
#define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */
diff --git a/include/asm-arm/arch-sa1100/graphicsclient.h b/include/asm-arm/arch-sa1100/graphicsclient.h
index 024e38709f1b..99766c333c5a 100644
--- a/include/asm-arm/arch-sa1100/graphicsclient.h
+++ b/include/asm-arm/arch-sa1100/graphicsclient.h
@@ -63,7 +63,7 @@
#define _ADS_UARTC 0x10140000 /* UART C */
#define _ADS_UARTD 0x10160000 /* UART D */
-/* UART controll lines GPIOs */
+/* UART control lines GPIOs */
#define GPIO_GC_UART0_RTS GPIO_GPIO15
#define GPIO_GC_UART1_RTS GPIO_GPIO17
#define GPIO_GC_UART2_RTS GPIO_GPIO19
@@ -71,7 +71,7 @@
#define GPIO_GC_UART1_CTS GPIO_GPIO16
#define GPIO_GC_UART2_CTS GPIO_GPIO17
-/* UART controll lines IRQs */
+/* UART control lines IRQs */
#define IRQ_GC_UART0_CTS IRQ_GPIO14
#define IRQ_GC_UART1_CTS IRQ_GPIO16
#define IRQ_GC_UART2_CTS IRQ_GPIO17
diff --git a/include/asm-arm/arch-sa1100/h3600_gpio.h b/include/asm-arm/arch-sa1100/h3600_gpio.h
index 6b7e000a52f9..62b0b7879685 100644
--- a/include/asm-arm/arch-sa1100/h3600_gpio.h
+++ b/include/asm-arm/arch-sa1100/h3600_gpio.h
@@ -480,7 +480,7 @@
#define _H3800_ASIC1_GPIO_State 0x40 /* R See masks below (default 0) */
#define _H3800_ASIC1_GPIO_Reset 0x42 /* R/W See masks below (default 0x04) */
#define _H3800_ASIC1_GPIO_SleepMask 0x44 /* R/W 0:don't mask, 1:mask trigger in sleep mode */
-#define _H3800_ASIC1_GPIO_SleepDir 0x46 /* R/W direction 0:input, 1:ouput in sleep mode */
+#define _H3800_ASIC1_GPIO_SleepDir 0x46 /* R/W direction 0:input, 1:output in sleep mode */
#define _H3800_ASIC1_GPIO_SleepOut 0x48 /* R/W level 0:low, 1:high in sleep mode */
#define _H3800_ASIC1_GPIO_Status 0x4A /* R Pin status */
#define _H3800_ASIC1_GPIO_BattFaultDir 0x4C /* R/W direction 0:input, 1:output in batt_fault */
diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 04df58feeabc..6303e6cce320 100644
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -60,7 +60,7 @@
* Because of the wide memory address space between physical RAM banks on the
* SA1100, it's much convenient to use Linux's NUMA support to implement our
* memory map representation. Assuming all memory nodes have equal access
- * characteristics, we then have generic discontigous memory support.
+ * characteristics, we then have generic discontiguous memory support.
*
* Of course, all this isn't mandatory for SA1100 implementations with only
* one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM.
diff --git a/include/asm-arm/arch-sa1100/uncompress.h b/include/asm-arm/arch-sa1100/uncompress.h
index c505e14156b5..42d28b2b3edc 100644
--- a/include/asm-arm/arch-sa1100/uncompress.h
+++ b/include/asm-arm/arch-sa1100/uncompress.h
@@ -32,7 +32,7 @@ static void puts( const char *s )
} while (0);
for (; *s; s++) {
- /* wait for space in the UART's transmiter */
+ /* wait for space in the UART's transmitter */
while (!(UART(UTSR1) & UTSR1_TNF));
/* send the character out. */
diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h
index 757155b13afc..542f5cff343b 100644
--- a/include/asm-arm/dma-mapping.h
+++ b/include/asm-arm/dma-mapping.h
@@ -182,7 +182,7 @@ dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
* @dir: DMA transfer direction
*
* Map a set of buffers described by scatterlist in streaming
- * mode for DMA. This is the scather-gather version of the
+ * mode for DMA. This is the scatter-gather version of the
* above pci_map_single interface. Here the scatter gather list
* elements are each tagged with the appropriate dma address
* and length. They are obtained via sg_dma_{address,length}(SG).
diff --git a/include/asm-arm/proc-armo/pgalloc.h b/include/asm-arm/proc-armo/pgalloc.h
index a24cc779294b..7b9bf375abc7 100644
--- a/include/asm-arm/proc-armo/pgalloc.h
+++ b/include/asm-arm/proc-armo/pgalloc.h
@@ -37,7 +37,7 @@ pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep)
/*
* We use the old 2.5.5-rmk1 hack for this.
- * This is not truely correct, but should be functional.
+ * This is not truly correct, but should be functional.
*/
#define pte_alloc_one(mm,addr) ((struct page *)pte_alloc_one_kernel(mm,addr))
#define pte_free(pte) pte_free_kernel((pte_t *)pte)
diff --git a/include/asm-arm/sizes.h b/include/asm-arm/sizes.h
index f8d92ca12040..7f50ae0edf1b 100644
--- a/include/asm-arm/sizes.h
+++ b/include/asm-arm/sizes.h
@@ -16,7 +16,7 @@
/* DO NOT EDIT!! - this file automatically generated
* from .s file by awk -f s2h.awk
*/
-/* Size defintions
+/* Size definitions
* Copyright (C) ARM Limited 1998. All rights reserved.
*/
generated by cgit v1.2.3 (git 2.46.0) at 2026-02-10 06:55:43 +0000