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-rw-r--r--include/linux/pci_ids.h2
-rw-r--r--include/linux/scx200.h10
2 files changed, 8 insertions, 4 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 45c638b9fdef..b65f84ec1118 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -397,6 +397,8 @@
#define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504
#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505
#define PCI_DEVICE_ID_NS_SC1100_BRIDGE 0x0510
+#define PCI_DEVICE_ID_NS_SC1100_SMI 0x0511
+#define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515
#define PCI_DEVICE_ID_NS_87410 0xd001
#define PCI_VENDOR_ID_TSENG 0x100c
diff --git a/include/linux/scx200.h b/include/linux/scx200.h
index af7d53acad99..a22f9e173ad2 100644
--- a/include/linux/scx200.h
+++ b/include/linux/scx200.h
@@ -7,6 +7,10 @@
/* Interesting stuff for the National Semiconductor SCx200 CPU */
+extern unsigned scx200_cb_base;
+
+#define scx200_cb_present() (scx200_cb_base!=0)
+
/* F0 PCI Header/Bridge Configuration Registers */
#define SCx200_DOCCS_BASE 0x78 /* DOCCS Base Address Register */
#define SCx200_DOCCS_CTRL 0x7c /* DOCCS Control Register */
@@ -15,7 +19,7 @@
#define SCx200_GPIO_SIZE 0x2c /* Size of GPIO register block */
/* General Configuration Block */
-#define SCx200_CB_BASE 0x9000 /* Base fixed at 0x9000 according to errata */
+#define SCx200_CB_BASE_FIXED 0x9000 /* Base fixed at 0x9000 according to errata? */
/* Watchdog Timer */
#define SCx200_WDT_OFFSET 0x00 /* offset within configuration block */
@@ -44,9 +48,7 @@
#define SCx200_IID 0x3c /* IA On a Chip Identification Number Reg */
#define SCx200_REV 0x3d /* Revision Register */
#define SCx200_CBA 0x3e /* Configuration Base Address Register */
-
-/* Verify that the configuration block really is there */
-#define scx200_cb_probe(base) (inw((base) + SCx200_CBA) == (base))
+#define SCx200_CBA_SCRATCH 0x64 /* Configuration Base Address Scratchpad */
/*
Local variables: