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-rw-r--r--include/asm-alpha/pgalloc.h12
-rw-r--r--include/asm-cris/pgtable.h1
-rw-r--r--include/asm-i386/pgtable.h1
-rw-r--r--include/asm-m68k/pgalloc.h1
-rw-r--r--include/asm-mips/pgtable.h2
-rw-r--r--include/asm-mips64/pgtable.h4
-rw-r--r--include/asm-parisc/pgalloc.h3
-rw-r--r--include/asm-s390/pgtable.h1
-rw-r--r--include/asm-s390x/pgtable.h1
-rw-r--r--include/asm-sh/pgtable.h2
-rw-r--r--include/asm-sparc/pgtable.h1
-rw-r--r--include/asm-sparc64/pgtable.h1
12 files changed, 26 insertions, 4 deletions
diff --git a/include/asm-alpha/pgalloc.h b/include/asm-alpha/pgalloc.h
index f00acfd42a73..3463968dc087 100644
--- a/include/asm-alpha/pgalloc.h
+++ b/include/asm-alpha/pgalloc.h
@@ -70,8 +70,7 @@ flush_tlb_other(struct mm_struct *mm)
}
/* We need to flush the userspace icache after setting breakpoints in
- ptrace. I don't think it's needed in do_swap_page, or do_no_page,
- but I don't know how to get rid of it either.
+ ptrace.
Instead of indiscriminately using imb, take advantage of the fact
that icache entries are tagged with the ASN and load a new mm context. */
@@ -79,7 +78,8 @@ flush_tlb_other(struct mm_struct *mm)
#ifndef CONFIG_SMP
static inline void
-flush_icache_page(struct vm_area_struct *vma, struct page *page)
+flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+ unsigned long addr, int len)
{
if (vma->vm_flags & VM_EXEC) {
struct mm_struct *mm = vma->vm_mm;
@@ -90,9 +90,13 @@ flush_icache_page(struct vm_area_struct *vma, struct page *page)
}
}
#else
-extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
+extern void flush_icache_user_range(struct vm_area_struct *vma,
+ struct page *page, unsigned long addr, int len);
#endif
+/* this is used only in do_no_page and do_swap_page */
+#define flush_icache_page(vma, page) flush_icache_user_range((vma), (page), 0, 0)
+
/*
* Flush just one page in the current TLB set.
* We need to be very careful about the icache here, there
diff --git a/include/asm-cris/pgtable.h b/include/asm-cris/pgtable.h
index e533400551c0..87c504e0ff46 100644
--- a/include/asm-cris/pgtable.h
+++ b/include/asm-cris/pgtable.h
@@ -125,6 +125,7 @@ extern void paging_init(void);
#define flush_dcache_page(page) do { } while (0)
#define flush_icache_range(start, end) do { } while (0)
#define flush_icache_page(vma,pg) do { } while (0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
/*
* TLB flushing (implemented in arch/cris/mm/tlb.c):
diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h
index c22d56a17713..4dc49f822b20 100644
--- a/include/asm-i386/pgtable.h
+++ b/include/asm-i386/pgtable.h
@@ -33,6 +33,7 @@ extern void paging_init(void);
#define flush_dcache_page(page) do { } while (0)
#define flush_icache_range(start, end) do { } while (0)
#define flush_icache_page(vma,pg) do { } while (0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
#define __flush_tlb() \
do { \
diff --git a/include/asm-m68k/pgalloc.h b/include/asm-m68k/pgalloc.h
index f67a54a355ce..ee25f7e53397 100644
--- a/include/asm-m68k/pgalloc.h
+++ b/include/asm-m68k/pgalloc.h
@@ -127,6 +127,7 @@ extern inline void __flush_page_to_ram(unsigned long address)
#define flush_dcache_page(page) do { } while (0)
#define flush_icache_page(vma,pg) do { } while (0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
/* Push n pages at kernel virtual address and clear the icache */
/* RZ: use cpush %bc instead of cpush %dc, cinv %ic */
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index afc0148e9b83..e24c6bde77f5 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -51,6 +51,8 @@ extern void (*_flush_icache_page)(struct vm_area_struct *vma,
#define flush_icache_range(start, end) _flush_icache_range(start,end)
#define flush_icache_page(vma, page) _flush_icache_page(vma, page)
+#define flush_icache_user_range(vma, page, addr, len) \
+ _flush_icache_page((vma), (page))
/*
diff --git a/include/asm-mips64/pgtable.h b/include/asm-mips64/pgtable.h
index 6c35e0d93c81..9b041abb4083 100644
--- a/include/asm-mips64/pgtable.h
+++ b/include/asm-mips64/pgtable.h
@@ -43,6 +43,8 @@ extern void (*_flush_page_to_ram)(struct page * page);
#define flush_page_to_ram(page) _flush_page_to_ram(page)
#define flush_icache_range(start, end) _flush_cache_l1()
+#define flush_icache_user_range(vma, page, addr, len) \
+ flush_icache_page((vma), (page))
#define flush_icache_page(vma, page) \
do { \
@@ -66,6 +68,8 @@ extern void andes_flush_icache_page(unsigned long);
#define flush_cache_page(vma,page) do { } while(0)
#define flush_page_to_ram(page) do { } while(0)
#define flush_icache_range(start, end) _flush_cache_l1()
+#define flush_icache_user_range(vma, page, addr, len) \
+ flush_icache_page((vma), (page))
#define flush_icache_page(vma, page) \
do { \
if ((vma)->vm_flags & VM_EXEC) \
diff --git a/include/asm-parisc/pgalloc.h b/include/asm-parisc/pgalloc.h
index d458ec27b74c..b29fa8aef9be 100644
--- a/include/asm-parisc/pgalloc.h
+++ b/include/asm-parisc/pgalloc.h
@@ -106,6 +106,9 @@ extern inline void flush_cache_mm(struct mm_struct *mm) {
#define flush_icache_range(start, end) \
__flush_icache_range(start, end - start)
+#define flush_icache_user_range(vma, page, addr, len) \
+ flush_icache_page((vma), (page))
+
#define flush_icache_page(vma, page) \
__flush_icache_range(page_address(page), PAGE_SIZE)
diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h
index ce43b50b7471..5e22205addb8 100644
--- a/include/asm-s390/pgtable.h
+++ b/include/asm-s390/pgtable.h
@@ -42,6 +42,7 @@ extern void paging_init(void);
#define flush_dcache_page(page) do { } while (0)
#define flush_icache_range(start, end) do { } while (0)
#define flush_icache_page(vma,pg) do { } while (0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
/*
* The S390 doesn't have any external MMU info: the kernel page
diff --git a/include/asm-s390x/pgtable.h b/include/asm-s390x/pgtable.h
index 25b30c8607cc..2dcb8b438f83 100644
--- a/include/asm-s390x/pgtable.h
+++ b/include/asm-s390x/pgtable.h
@@ -38,6 +38,7 @@ extern void paging_init(void);
#define flush_dcache_page(page) do { } while (0)
#define flush_icache_range(start, end) do { } while (0)
#define flush_icache_page(vma,pg) do { } while (0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
/*
* The S390 doesn't have any external MMU info: the kernel page
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 38dee49f4c97..ce68ec2d2bd1 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -41,6 +41,7 @@ extern void paging_init(void);
#define flush_dcache_page(page) do { } while (0)
#define flush_icache_range(start, end) do { } while (0)
#define flush_icache_page(vma,pg) do { } while (0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
#define flush_cache_sigtramp(vaddr) do { } while (0)
#define p3_cache_init() do { } while (0)
@@ -64,6 +65,7 @@ extern void flush_cache_sigtramp(unsigned long addr);
#define flush_page_to_ram(page) do { } while (0)
#define flush_icache_page(vma,pg) do { } while (0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
/* Initialization of P3 area for copy_user_page */
extern void p3_cache_init(void);
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h
index 4ed3aed45357..b73aaa20847e 100644
--- a/include/asm-sparc/pgtable.h
+++ b/include/asm-sparc/pgtable.h
@@ -348,6 +348,7 @@ BTFIXUPDEF_CALL(pte_t *, pte_offset, pmd_t *, unsigned long)
extern unsigned int pg_iobits;
#define flush_icache_page(vma, pg) do { } while(0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
/* Certain architectures need to do special things when pte's
* within a page table are directly modified. Thus, the following
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 0df00266817b..ebf8ac1060bc 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -277,6 +277,7 @@ extern pgd_t swapper_pg_dir[1];
extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
#define flush_icache_page(vma, pg) do { } while(0)
+#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
/* Make a non-present pseudo-TTE. */
extern inline pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space)
generated by cgit v1.2.3 (git 2.46.0) at 2026-01-27 08:04:40 +0000