diff options
Diffstat (limited to 'include')
48 files changed, 477 insertions, 616 deletions
diff --git a/include/asm-generic/rtc.h b/include/asm-generic/rtc.h index 1a1ea0200e1f..cef08db34ada 100644 --- a/include/asm-generic/rtc.h +++ b/include/asm-generic/rtc.h @@ -46,7 +46,7 @@ static inline unsigned int get_rtc_time(struct rtc_time *time) { unsigned long uip_watchdog = jiffies; unsigned char ctrl; -#ifdef CONFIG_DECSTATION +#ifdef CONFIG_MACH_DECSTATION unsigned int real_year; #endif @@ -79,7 +79,7 @@ static inline unsigned int get_rtc_time(struct rtc_time *time) time->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH); time->tm_mon = CMOS_READ(RTC_MONTH); time->tm_year = CMOS_READ(RTC_YEAR); -#ifdef CONFIG_DECSTATION +#ifdef CONFIG_MACH_DECSTATION real_year = CMOS_READ(RTC_DEC_YEAR); #endif ctrl = CMOS_READ(RTC_CONTROL); @@ -95,7 +95,7 @@ static inline unsigned int get_rtc_time(struct rtc_time *time) BCD_TO_BIN(time->tm_year); } -#ifdef CONFIG_DECSTATION +#ifdef CONFIG_MACH_DECSTATION time->tm_year += real_year - 72; #endif @@ -117,7 +117,7 @@ static inline int set_rtc_time(struct rtc_time *time) unsigned char mon, day, hrs, min, sec; unsigned char save_control, save_freq_select; unsigned int yrs; -#ifdef CONFIG_DECSTATION +#ifdef CONFIG_MACH_DECSTATION unsigned int real_yrs, leap_yr; #endif @@ -132,7 +132,7 @@ static inline int set_rtc_time(struct rtc_time *time) return -EINVAL; spin_lock_irq(&rtc_lock); -#ifdef CONFIG_DECSTATION +#ifdef CONFIG_MACH_DECSTATION real_yrs = yrs; leap_yr = ((!((yrs + 1900) % 4) && ((yrs + 1900) % 100)) || !((yrs + 1900) % 400)); @@ -174,7 +174,7 @@ static inline int set_rtc_time(struct rtc_time *time) save_freq_select = CMOS_READ(RTC_FREQ_SELECT); CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT); -#ifdef CONFIG_DECSTATION +#ifdef CONFIG_MACH_DECSTATION CMOS_WRITE(real_yrs, RTC_DEC_YEAR); #endif CMOS_WRITE(yrs, RTC_YEAR); diff --git a/include/asm-i386/mach-es7000/mach_apic.h b/include/asm-i386/mach-es7000/mach_apic.h index 888f7f04262d..ceab2c464b13 100644 --- a/include/asm-i386/mach-es7000/mach_apic.h +++ b/include/asm-i386/mach-es7000/mach_apic.h @@ -16,7 +16,7 @@ static inline cpumask_t target_cpus(void) #if defined CONFIG_ES7000_CLUSTERED_APIC return CPU_MASK_ALL; #else - return cpumask_of_cpu(bios_cpu_apicid[smp_processor_id()]); + return cpumask_of_cpu(smp_processor_id()); #endif } #define TARGET_CPUS (target_cpus()) diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h index 082da3739373..f544cc131b28 100644 --- a/include/asm-i386/page.h +++ b/include/asm-i386/page.h @@ -41,6 +41,7 @@ */ #ifdef CONFIG_X86_PAE extern unsigned long long __supported_pte_mask; +extern int nx_enabled; typedef struct { unsigned long pte_low, pte_high; } pte_t; typedef struct { unsigned long long pmd; } pmd_t; typedef struct { unsigned long long pgd; } pgd_t; @@ -48,6 +49,7 @@ typedef struct { unsigned long long pgprot; } pgprot_t; #define pte_val(x) ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #define HPAGE_SHIFT 21 #else +#define nx_enabled 0 typedef struct { unsigned long pte_low; } pte_t; typedef struct { unsigned long pmd; } pmd_t; typedef struct { unsigned long pgd; } pgd_t; diff --git a/include/asm-i386/pgtable-2level-defs.h b/include/asm-i386/pgtable-2level-defs.h new file mode 100644 index 000000000000..2a16f7a268bc --- /dev/null +++ b/include/asm-i386/pgtable-2level-defs.h @@ -0,0 +1,20 @@ +#ifndef _I386_PGTABLE_2LEVEL_DEFS_H +#define _I386_PGTABLE_2LEVEL_DEFS_H + +/* + * traditional i386 two-level paging structure: + */ + +#define PGDIR_SHIFT 22 +#define PTRS_PER_PGD 1024 + +/* + * the i386 is two-level, so we don't really have any + * PMD directory physically. + */ +#define PMD_SHIFT 22 +#define PTRS_PER_PMD 1 + +#define PTRS_PER_PTE 1024 + +#endif /* _I386_PGTABLE_2LEVEL_DEFS_H */ diff --git a/include/asm-i386/pgtable-2level.h b/include/asm-i386/pgtable-2level.h index cea397939b51..de51110560b9 100644 --- a/include/asm-i386/pgtable-2level.h +++ b/include/asm-i386/pgtable-2level.h @@ -1,22 +1,6 @@ #ifndef _I386_PGTABLE_2LEVEL_H #define _I386_PGTABLE_2LEVEL_H -/* - * traditional i386 two-level paging structure: - */ - -#define PGDIR_SHIFT 22 -#define PTRS_PER_PGD 1024 - -/* - * the i386 is two-level, so we don't really have any - * PMD directory physically. - */ -#define PMD_SHIFT 22 -#define PTRS_PER_PMD 1 - -#define PTRS_PER_PTE 1024 - #define pte_ERROR(e) \ printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low) #define pmd_ERROR(e) \ @@ -64,6 +48,22 @@ static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) /* + * All present user pages are user-executable: + */ +static inline int pte_exec(pte_t pte) +{ + return pte_user(pte); +} + +/* + * All present pages are kernel-executable: + */ +static inline int pte_exec_kernel(pte_t pte) +{ + return 1; +} + +/* * Bits 0, 6 and 7 are taken, split up the 29 bits of offset * into this range: */ diff --git a/include/asm-i386/pgtable-3level-defs.h b/include/asm-i386/pgtable-3level-defs.h new file mode 100644 index 000000000000..eb3a1ea88671 --- /dev/null +++ b/include/asm-i386/pgtable-3level-defs.h @@ -0,0 +1,22 @@ +#ifndef _I386_PGTABLE_3LEVEL_DEFS_H +#define _I386_PGTABLE_3LEVEL_DEFS_H + +/* + * PGDIR_SHIFT determines what a top-level page table entry can map + */ +#define PGDIR_SHIFT 30 +#define PTRS_PER_PGD 4 + +/* + * PMD_SHIFT determines the size of the area a middle-level + * page table can map + */ +#define PMD_SHIFT 21 +#define PTRS_PER_PMD 512 + +/* + * entries per page directory level + */ +#define PTRS_PER_PTE 512 + +#endif /* _I386_PGTABLE_3LEVEL_DEFS_H */ diff --git a/include/asm-i386/pgtable-3level.h b/include/asm-i386/pgtable-3level.h index a4c24db82403..d78e3493da72 100644 --- a/include/asm-i386/pgtable-3level.h +++ b/include/asm-i386/pgtable-3level.h @@ -8,24 +8,6 @@ * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com> */ -/* - * PGDIR_SHIFT determines what a top-level page table entry can map - */ -#define PGDIR_SHIFT 30 -#define PTRS_PER_PGD 4 - -/* - * PMD_SHIFT determines the size of the area a middle-level - * page table can map - */ -#define PMD_SHIFT 21 -#define PTRS_PER_PMD 512 - -/* - * entries per page directory level - */ -#define PTRS_PER_PTE 512 - #define pte_ERROR(e) \ printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low) #define pmd_ERROR(e) \ @@ -37,6 +19,29 @@ static inline int pgd_none(pgd_t pgd) { return 0; } static inline int pgd_bad(pgd_t pgd) { return 0; } static inline int pgd_present(pgd_t pgd) { return 1; } +/* + * Is the pte executable? + */ +static inline int pte_x(pte_t pte) +{ + return !(pte_val(pte) & _PAGE_NX); +} + +/* + * All present user-pages with !NX bit are user-executable: + */ +static inline int pte_exec(pte_t pte) +{ + return pte_user(pte) && pte_x(pte); +} +/* + * All present pages with !NX bit are kernel-executable: + */ +static inline int pte_exec_kernel(pte_t pte) +{ + return pte_x(pte); +} + /* Rules for using set_pte: the pte being assigned *must* be * either not present or in a state where the hardware will * not attempt to update the pte. In places where this is diff --git a/include/asm-i386/pgtable.h b/include/asm-i386/pgtable.h index a22128c2604e..8f9fcab61f5c 100644 --- a/include/asm-i386/pgtable.h +++ b/include/asm-i386/pgtable.h @@ -43,19 +43,15 @@ void pgd_dtor(void *, kmem_cache_t *, unsigned long); void pgtable_cache_init(void); void paging_init(void); -#endif /* !__ASSEMBLY__ */ - /* * The Linux x86 paging architecture is 'compile-time dual-mode', it * implements both the traditional 2-level x86 page tables and the * newer 3-level PAE-mode page tables. */ -#ifndef __ASSEMBLY__ #ifdef CONFIG_X86_PAE -# include <asm/pgtable-3level.h> +# include <asm/pgtable-3level-defs.h> #else -# include <asm/pgtable-2level.h> -#endif +# include <asm/pgtable-2level-defs.h> #endif #define PMD_SIZE (1UL << PMD_SHIFT) @@ -73,8 +69,6 @@ void paging_init(void); #define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT) #define BOOT_KERNEL_PGD_PTRS (1024-BOOT_USER_PGD_PTRS) - -#ifndef __ASSEMBLY__ /* Just any arbitrary offset to the start of the vmalloc VM area: the * current 8MB value just means that there will be a 8MB "hole" after the * physical memory until the kernel virtual memory starts. That means that @@ -223,7 +217,6 @@ extern unsigned long pg0[]; */ static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; } static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; } -static inline int pte_exec(pte_t pte) { return (pte).pte_low & _PAGE_USER; } static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; } static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; } static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; } @@ -244,6 +237,12 @@ static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; retur static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; } static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; } +#ifdef CONFIG_X86_PAE +# include <asm/pgtable-3level.h> +#else +# include <asm/pgtable-2level.h> +#endif + static inline int ptep_test_and_clear_dirty(pte_t *ptep) { if (!pte_dirty(*ptep)) diff --git a/include/asm-i386/suspend.h b/include/asm-i386/suspend.h index 2febd2d28532..2794a173f64d 100644 --- a/include/asm-i386/suspend.h +++ b/include/asm-i386/suspend.h @@ -36,9 +36,6 @@ struct saved_context { : /* no output */ \ :"r" ((thread)->debugreg[register])) -extern void save_processor_state(void); -extern void restore_processor_state(void); - #ifdef CONFIG_ACPI_SLEEP extern unsigned long saved_eip; extern unsigned long saved_esp; diff --git a/include/asm-mips/gt64240.h b/include/asm-mips/gt64240.h index 12964c2c3e34..8f9bd341ed49 100644 --- a/include/asm-mips/gt64240.h +++ b/include/asm-mips/gt64240.h @@ -10,7 +10,7 @@ #define __ASM_MIPS_MV64240_H #include <asm/addrspace.h> -#include <asm/byteorder.h> +#include <asm/marvell.h> /* * CPU Control Registers @@ -1232,33 +1232,4 @@ #define MPSC1_CAUSE 0xb80c #define MPSC1_MASK 0xb88c -extern unsigned long gt64240_base; - -#define GT64240_BASE (gt64240_base) - -/* - * Because of an error/peculiarity in the Galileo chip, we need to swap the - * bytes when running bigendian. - */ -#define __GT_READ(ofs) \ - (*(volatile u32 *)(GT64240_BASE+(ofs))) -#define __GT_WRITE(ofs, data) \ - do { *(volatile u32 *)(GT64240_BASE+(ofs)) = (data); } while (0) - -#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs)) -#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data)) - -#define GT_READ_16(ofs, data) \ - le16_to_cpu(*(volatile u16 *)(GT64240_BASE+(ofs))) -#define GT_WRITE_16(ofs, data) \ - *(volatile u16 *)(GT64240_BASE+(ofs)) = cpu_to_le16(data) - -#define GT_READ_8(ofs, data) \ - *(data) = *(volatile u8 *)(GT64240_BASE+(ofs)) -#define GT_WRITE_8(ofs, data) \ - *(volatile u8 *)(GT64240_BASE+(ofs)) = data - -extern struct pci_ops gt_bus0_pci_ops; -extern struct pci_ops gt_bus1_pci_ops; - #endif /* __ASM_MIPS_MV64240_H */ diff --git a/include/asm-mips/marvell.h b/include/asm-mips/marvell.h new file mode 100644 index 000000000000..2e3bc6732d1c --- /dev/null +++ b/include/asm-mips/marvell.h @@ -0,0 +1,57 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2004 by Ralf Baechle + */ +#ifndef __ASM_MIPS_MARVELL_H +#define __ASM_MIPS_MARVELL_H + +#include <linux/pci.h> + +#include <asm/byteorder.h> +#include <asm/pci_channel.h> + +extern unsigned long marvell_base; + +/* + * Because of an error/peculiarity in the Galileo chip, we need to swap the + * bytes when running bigendian. + */ +#define __MV_READ(ofs) \ + (*(volatile u32 *)(marvell_base+(ofs))) +#define __MV_WRITE(ofs, data) \ + do { *(volatile u32 *)(marvell_base+(ofs)) = (data); } while (0) + +#define MV_READ(ofs) le32_to_cpu(__MV_READ(ofs)) +#define MV_WRITE(ofs, data) __MV_WRITE(ofs, cpu_to_le32(data)) + +#define MV_READ_16(ofs) \ + le16_to_cpu(*(volatile u16 *)(marvell_base+(ofs))) +#define MV_WRITE_16(ofs, data) \ + *(volatile u16 *)(marvell_base+(ofs)) = cpu_to_le16(data) + +#define MV_READ_8(ofs) \ + *(volatile u8 *)(marvell_base+(ofs)) +#define MV_WRITE_8(ofs, data) \ + *(volatile u8 *)(marvell_base+(ofs)) = data + +#define MV_SET_REG_BITS(ofs, bits) \ + (*((volatile u32 *)(marvell_base + (ofs)))) |= ((u32)cpu_to_le32(bits)) +#define MV_RESET_REG_BITS(ofs, bits) \ + (*((volatile u32 *)(marvell_base + (ofs)))) &= ~((u32)cpu_to_le32(bits)) + +extern struct pci_ops mv_pci_ops; + +struct mv_pci_controller { + struct pci_controller pcic; + + /* + * GT-64240/MV-64340 specific, per host bus information + */ + unsigned long config_addr; + unsigned long config_vreg; +}; + +#endif /* __ASM_MIPS_MARVELL_H */ diff --git a/include/asm-mips/mv64340.h b/include/asm-mips/mv64340.h index 442f2fbf7341..a889dd9788ff 100644 --- a/include/asm-mips/mv64340.h +++ b/include/asm-mips/mv64340.h @@ -14,7 +14,7 @@ #define __ASM_MV64340_H #include <asm/addrspace.h> -#include <asm/byteorder.h> +#include <asm/marvell.h> /****************************************/ /* Processor Address Space */ @@ -1034,38 +1034,6 @@ #define MV64340_SERIAL_INIT_CONTROL 0xf328 #define MV64340_SERIAL_INIT_STATUS 0xf32c -extern unsigned long mv64340_base; - -#define MV64340_BASE (mv64340_base) - -/* - * Because of an error/peculiarity in the Galileo chip, we need to swap the - * bytes when running bigendian. - */ - -#define MV_WRITE(ofs, data) \ - *(volatile u32 *)(MV64340_BASE + (ofs)) = cpu_to_le32((u32)data) -#define MV_READ(ofs) \ - (le32_to_cpu(*(volatile u32 *)(MV64340_BASE + (ofs)))) - -#define MV_WRITE_16(ofs, data) \ - *(volatile u16 *)(MV64340_BASE + (ofs)) = cpu_to_le16((u16)data) -#define MV_READ_16(ofs) \ - le16_to_cpu(*(volatile u16 *)(MV64340_BASE + (ofs))) - -#define MV_WRITE_8(ofs, data) \ - *(volatile u8 *)(MV64340_BASE + (ofs)) = ((u16)data) -#define MV_READ_8(ofs) \ - (*(volatile u8 *)(MV64340_BASE + (ofs))) - -#define MV_SET_REG_BITS(ofs, bits) \ - (*((volatile u32 *)(MV64340_BASE + (ofs)))) |= ((u32)cpu_to_le32(bits)) -#define MV_RESET_REG_BITS(ofs, bits) \ - (*((volatile u32 *)(MV64340_BASE + (ofs)))) &= ~((u32)cpu_to_le32(bits)) - extern void mv64340_irq_init(unsigned int base); -extern struct pci_ops mv64340_bus0_pci_ops; -extern struct pci_ops mv64340_bus1_pci_ops; - #endif /* __ASM_MV64340_H */ diff --git a/include/asm-mips/pgtable-bits.h b/include/asm-mips/pgtable-bits.h index 76c1ae1c7dee..6a890420643f 100644 --- a/include/asm-mips/pgtable-bits.h +++ b/include/asm-mips/pgtable-bits.h @@ -82,7 +82,7 @@ #define _CACHE_FPC (7 << 9) #define _CACHE_UNCACHED _CACHE_UC_B -#define _CACHE_CACHABLE_NONCOHERENT _CACHE_UC_B +#define _CACHE_CACHABLE_NONCOHERENT _CACHE_WB #else diff --git a/include/asm-mips/vr41xx/eagle.h b/include/asm-mips/vr41xx/eagle.h deleted file mode 100644 index 9cbd61c4b31a..000000000000 --- a/include/asm-mips/vr41xx/eagle.h +++ /dev/null @@ -1,265 +0,0 @@ -/* - * FILE NAME - * include/asm-mips/vr41xx/eagle.h - * - * BRIEF MODULE DESCRIPTION - * Include file for NEC Eagle board. - * - * Author: MontaVista Software, Inc. - * yyuasa@mvista.com or source@mvista.com - * - * Copyright 2001-2003 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR - * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE - * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef __NEC_EAGLE_H -#define __NEC_EAGLE_H - -#include <asm/addrspace.h> -#include <asm/vr41xx/vr41xx.h> - -/* - * Board specific address mapping - */ -#define VR41XX_PCI_MEM1_BASE 0x10000000 -#define VR41XX_PCI_MEM1_SIZE 0x04000000 -#define VR41XX_PCI_MEM1_MASK 0x7c000000 - -#define VR41XX_PCI_MEM2_BASE 0x14000000 -#define VR41XX_PCI_MEM2_SIZE 0x02000000 -#define VR41XX_PCI_MEM2_MASK 0x7e000000 - -#define VR41XX_PCI_IO_BASE 0x16000000 -#define VR41XX_PCI_IO_SIZE 0x02000000 -#define VR41XX_PCI_IO_MASK 0x7e000000 - -#define VR41XX_PCI_IO_START 0x01000000 -#define VR41XX_PCI_IO_END 0x01ffffff - -#define VR41XX_PCI_MEM_START 0x12000000 -#define VR41XX_PCI_MEM_END 0x15ffffff - -#define IO_PORT_BASE KSEG1ADDR(VR41XX_PCI_IO_BASE) -#define IO_PORT_RESOURCE_START 0 -#define IO_PORT_RESOURCE_END VR41XX_PCI_IO_SIZE -#define IO_MEM1_RESOURCE_START VR41XX_PCI_MEM1_BASE -#define IO_MEM1_RESOURCE_END (VR41XX_PCI_MEM1_BASE + VR41XX_PCI_MEM1_SIZE) -#define IO_MEM2_RESOURCE_START VR41XX_PCI_MEM2_BASE -#define IO_MEM2_RESOURCE_END (VR41XX_PCI_MEM2_BASE + VR41XX_PCI_MEM2_SIZE) - -/* - * General-Purpose I/O Pin Number - */ -#define VRC4173_PIN 1 -#define PCISLOT_PIN 4 -#define FPGA_PIN 5 -#define DCD_PIN 15 - -/* - * Interrupt Number - */ -#define VRC4173_CASCADE_IRQ GIU_IRQ(VRC4173_PIN) -#define PCISLOT_IRQ GIU_IRQ(PCISLOT_PIN) -#define FPGA_CASCADE_IRQ GIU_IRQ(FPGA_PIN) -#define DCD_IRQ GIU_IRQ(DCD_PIN) - -#define SDBINT_IRQ_BASE 88 -#define SDBINT_IRQ(x) (SDBINT_IRQ_BASE + (x)) -/* RFU */ -#define DEG_IRQ SDBINT_IRQ(1) -#define ENUM_IRQ SDBINT_IRQ(2) -#define SIO1INT_IRQ SDBINT_IRQ(3) -#define SIO2INT_IRQ SDBINT_IRQ(4) -#define PARINT_IRQ SDBINT_IRQ(5) -#define SDBINT_IRQ_LAST PARINT_IRQ - -#define PCIINT_IRQ_BASE 96 -#define PCIINT_IRQ(x) (PCIINT_IRQ_BASE + (x)) -#define CP_INTA_IRQ PCIINT_IRQ(0) -#define CP_INTB_IRQ PCIINT_IRQ(1) -#define CP_INTC_IRQ PCIINT_IRQ(2) -#define CP_INTD_IRQ PCIINT_IRQ(3) -#define LANINTA_IRQ PCIINT_IRQ(4) -#define PCIINT_IRQ_LAST LANINTA_IRQ - -/* - * On board Devices I/O Mapping - */ -#define NEC_EAGLE_SIO1RB KSEG1ADDR(0x0DFFFEC0) -#define NEC_EAGLE_SIO1TH KSEG1ADDR(0x0DFFFEC0) -#define NEC_EAGLE_SIO1IE KSEG1ADDR(0x0DFFFEC2) -#define NEC_EAGLE_SIO1IID KSEG1ADDR(0x0DFFFEC4) -#define NEC_EAGLE_SIO1FC KSEG1ADDR(0x0DFFFEC4) -#define NEC_EAGLE_SIO1LC KSEG1ADDR(0x0DFFFEC6) -#define NEC_EAGLE_SIO1MC KSEG1ADDR(0x0DFFFEC8) -#define NEC_EAGLE_SIO1LS KSEG1ADDR(0x0DFFFECA) -#define NEC_EAGLE_SIO1MS KSEG1ADDR(0x0DFFFECC) -#define NEC_EAGLE_SIO1SC KSEG1ADDR(0x0DFFFECE) - -#define NEC_EAGLE_SIO2TH KSEG1ADDR(0x0DFFFED0) -#define NEC_EAGLE_SIO2IE KSEG1ADDR(0x0DFFFED2) -#define NEC_EAGLE_SIO2IID KSEG1ADDR(0x0DFFFED4) -#define NEC_EAGLE_SIO2FC KSEG1ADDR(0x0DFFFED4) -#define NEC_EAGLE_SIO2LC KSEG1ADDR(0x0DFFFED6) -#define NEC_EAGLE_SIO2MC KSEG1ADDR(0x0DFFFED8) -#define NEC_EAGLE_SIO2LS KSEG1ADDR(0x0DFFFEDA) -#define NEC_EAGLE_SIO2MS KSEG1ADDR(0x0DFFFEDC) -#define NEC_EAGLE_SIO2SC KSEG1ADDR(0x0DFFFEDE) - -#define NEC_EAGLE_PIOPP_DATA KSEG1ADDR(0x0DFFFEE0) -#define NEC_EAGLE_PIOPP_STATUS KSEG1ADDR(0x0DFFFEE2) -#define NEC_EAGLE_PIOPP_CNT KSEG1ADDR(0x0DFFFEE4) -#define NEC_EAGLE_PIOPP_EPPADDR KSEG1ADDR(0x0DFFFEE6) -#define NEC_EAGLE_PIOPP_EPPDATA0 KSEG1ADDR(0x0DFFFEE8) -#define NEC_EAGLE_PIOPP_EPPDATA1 KSEG1ADDR(0x0DFFFEEA) -#define NEC_EAGLE_PIOPP_EPPDATA2 KSEG1ADDR(0x0DFFFEEC) - -#define NEC_EAGLE_PIOECP_DATA KSEG1ADDR(0x0DFFFEF0) -#define NEC_EAGLE_PIOECP_CONFIG KSEG1ADDR(0x0DFFFEF2) -#define NEC_EAGLE_PIOECP_EXTCNT KSEG1ADDR(0x0DFFFEF4) - -/* - * FLSHCNT Register - */ -#define NEC_EAGLE_FLSHCNT KSEG1ADDR(0x0DFFFFA0) -#define NEC_EAGLE_FLSHCNT_FRDY 0x80 -#define NEC_EAGLE_FLSHCNT_VPPE 0x40 -#define NEC_EAGLE_FLSHCNT_WP2 0x01 - -/* - * FLSHBANK Register - */ -#define NEC_EAGLE_FLSHBANK KSEG1ADDR(0x0DFFFFA4) -#define NEC_EAGLE_FLSHBANK_S_BANK2 0x40 -#define NEC_EAGLE_FLSHBANK_S_BANK1 0x20 -#define NEC_EAGLE_FLSHBANK_BNKQ4 0x10 -#define NEC_EAGLE_FLSHBANK_BNKQ3 0x08 -#define NEC_EAGLE_FLSHBANK_BNKQ2 0x04 -#define NEC_EAGLE_FLSHBANK_BNKQ1 0x02 -#define NEC_EAGLE_FLSHBANK_BNKQ0 0x01 - -/* - * SWITCH Setting Register - */ -#define NEC_EAGLE_SWTCHSET KSEG1ADDR(0x0DFFFFA8) -#define NEC_EAGLE_SWTCHSET_DP2SW4 0x80 -#define NEC_EAGLE_SWTCHSET_DP2SW3 0x40 -#define NEC_EAGLE_SWTCHSET_DP2SW2 0x20 -#define NEC_EAGLE_SWTCHSET_DP2SW1 0x10 -#define NEC_EAGLE_SWTCHSET_DP1SW4 0x08 -#define NEC_EAGLE_SWTCHSET_DP1SW3 0x04 -#define NEC_EAGLE_SWTCHSET_DP1SW2 0x02 -#define NEC_EAGLE_SWTCHSET_DP1SW1 0x01 - -/* - * PPT Parallel Port Device Controller - */ -#define NEC_EAGLE_PPT_WRITE_DATA KSEG1ADDR(0x0DFFFFB0) -#define NEC_EAGLE_PPT_READ_DATA KSEG1ADDR(0x0DFFFFB2) -#define NEC_EAGLE_PPT_CNT KSEG1ADDR(0x0DFFFFB4) -#define NEC_EAGLE_PPT_CNT2 KSEG1ADDR(0x0DFFFFB4) - -/* Control Register */ -#define NEC_EAGLE_PPT_INTMSK 0x20 -#define NEC_EAGLE_PPT_PARIINT 0x10 -#define NEC_EAGLE_PPT_SELECTIN 0x08 -#define NEC_EAGLE_PPT_INIT 0x04 -#define NEC_EAGLE_PPT_AUTOFD 0x02 -#define NEC_EAGLE_PPT_STROBE 0x01 - -/* Control Rgister 2 */ -#define NEC_EAGLE_PPT_PAREN 0x80 -#define NEC_EAGLE_PPT_AUTOEN 0x20 -#define NEC_EAGLE_PPT_BUSY 0x10 -#define NEC_EAGLE_PPT_ACK 0x08 -#define NEC_EAGLE_PPT_PE 0x04 -#define NEC_EAGLE_PPT_SELECT 0x02 -#define NEC_EAGLE_PPT_FAULT 0x01 - -/* - * LEDWR Register - */ -#define NEC_EAGLE_LEDWR1 KSEG1ADDR(0x0DFFFFC0) -#define NEC_EAGLE_LEDWR2 KSEG1ADDR(0x0DFFFFC4) - -/* - * SDBINT Register - */ -#define NEC_EAGLE_SDBINT KSEG1ADDR(0x0DFFFFD0) -#define NEC_EAGLE_SDBINT_PARINT 0x20 -#define NEC_EAGLE_SDBINT_SIO2INT 0x10 -#define NEC_EAGLE_SDBINT_SIO1INT 0x08 -#define NEC_EAGLE_SDBINT_ENUM 0x04 -#define NEC_EAGLE_SDBINT_DEG 0x02 - -/* - * SDB INTMSK Register - */ -#define NEC_EAGLE_SDBINTMSK KSEG1ADDR(0x0DFFFFD4) -#define NEC_EAGLE_SDBINTMSK_MSKPAR 0x20 -#define NEC_EAGLE_SDBINTMSK_MSKSIO2 0x10 -#define NEC_EAGLE_SDBINTMSK_MSKSIO1 0x08 -#define NEC_EAGLE_SDBINTMSK_MSKENUM 0x04 -#define NEC_EAGLE_SDBINTMSK_MSKDEG 0x02 - -/* - * RSTREG Register - */ -#define NEC_EAGLE_RSTREG KSEG1ADDR(0x0DFFFFD8) -#define NEC_EAGLE_RST_RSTSW 0x02 -#define NEC_EAGLE_RST_LEDOFF 0x01 - -/* - * PCI INT Rgister - */ -#define NEC_EAGLE_PCIINTREG KSEG1ADDR(0x0DFFFFDC) -#define NEC_EAGLE_PCIINT_LANINT 0x10 -#define NEC_EAGLE_PCIINT_CP_INTD 0x08 -#define NEC_EAGLE_PCIINT_CP_INTC 0x04 -#define NEC_EAGLE_PCIINT_CP_INTB 0x02 -#define NEC_EAGLE_PCIINT_CP_INTA 0x01 - -/* - * PCI INT Mask Register - */ -#define NEC_EAGLE_PCIINTMSKREG KSEG1ADDR(0x0DFFFFE0) -#define NEC_EAGLE_PCIINTMSK_MSKLANINT 0x10 -#define NEC_EAGLE_PCIINTMSK_MSKCP_INTD 0x08 -#define NEC_EAGLE_PCIINTMSK_MSKCP_INTC 0x04 -#define NEC_EAGLE_PCIINTMSK_MSKCP_INTB 0x02 -#define NEC_EAGLE_PCIINTMSK_MSKCP_INTA 0x01 - -/* - * CLK Division Register - */ -#define NEC_EAGLE_CLKDIV KSEG1ADDR(0x0DFFFFE4) -#define NEC_EAGLE_CLKDIV_PCIDIV1 0x10 -#define NEC_EAGLE_CLKDIV_PCIDIV0 0x08 -#define NEC_EAGLE_CLKDIV_VTDIV2 0x04 -#define NEC_EAGLE_CLKDIV_VTDIV1 0x02 -#define NEC_EAGLE_CLKDIV_VTDIV0 0x01 - -/* - * Source Revision Register - */ -#define NEC_EAGLE_REVISION KSEG1ADDR(0x0DFFFFE8) - -#endif /* __NEC_EAGLE_H */ diff --git a/include/asm-ppc/mpc10x.h b/include/asm-ppc/mpc10x.h index f413daf79e31..dbdc7cd2966d 100644 --- a/include/asm-ppc/mpc10x.h +++ b/include/asm-ppc/mpc10x.h @@ -164,4 +164,7 @@ unsigned long mpc10x_get_mem_size(uint mem_map); int mpc10x_enable_store_gathering(struct pci_controller *hose); int mpc10x_disable_store_gathering(struct pci_controller *hose); +/* For MPC107 boards that use the built-in openpic */ +void mpc10x_set_openpic(void); + #endif /* __PPC_KERNEL_MPC10X_H */ diff --git a/include/asm-ppc64/current.h b/include/asm-ppc64/current.h index 24ea6e1ab6e8..52ddc60c8b65 100644 --- a/include/asm-ppc64/current.h +++ b/include/asm-ppc64/current.h @@ -10,9 +10,7 @@ * 2 of the License, or (at your option) any later version. */ -#include <asm/thread_info.h> - -#define get_current() (get_paca()->xCurrent) +#define get_current() (get_paca()->__current) #define current get_current() #endif /* !(_PPC64_CURRENT_H) */ diff --git a/include/asm-ppc64/eeh.h b/include/asm-ppc64/eeh.h index 3ca700cb04bc..d5e44bf36c7b 100644 --- a/include/asm-ppc64/eeh.h +++ b/include/asm-ppc64/eeh.h @@ -24,6 +24,7 @@ #include <linux/init.h> struct pci_dev; +struct device_node; /* I/O addresses are converted to EEH "tokens" such that a driver will cause * a bad page fault if the address is used directly (i.e. these addresses are diff --git a/include/asm-ppc64/iSeries/HvCall.h b/include/asm-ppc64/iSeries/HvCall.h index d91eaa28434e..d9a2e74e2399 100644 --- a/include/asm-ppc64/iSeries/HvCall.h +++ b/include/asm-ppc64/iSeries/HvCall.h @@ -183,7 +183,7 @@ void HvCall_writeLogBuffer(const void *buffer, u64 bufLen); //===================================================================== static inline void HvCall_sendIPI(struct paca_struct * targetPaca) { - HvCall1( HvCallBaseSendIPI, targetPaca->xPacaIndex ); + HvCall1( HvCallBaseSendIPI, targetPaca->paca_index ); } //===================================================================== diff --git a/include/asm-ppc64/mmu.h b/include/asm-ppc64/mmu.h index f9823b2ac584..54a1466fe104 100644 --- a/include/asm-ppc64/mmu.h +++ b/include/asm-ppc64/mmu.h @@ -100,16 +100,6 @@ typedef struct { } dw1; } SLBE; -/* - * This structure is used in paca.h where the layout depends on the - * size being 24B. - */ -typedef struct { - unsigned long real; - unsigned long virt; - unsigned long next_round_robin; -} STAB; - /* Hardware Page Table Entry */ #define HPTES_PER_GROUP 8 diff --git a/include/asm-ppc64/paca.h b/include/asm-ppc64/paca.h index 218ab7178fc3..0eab9114c225 100644 --- a/include/asm-ppc64/paca.h +++ b/include/asm-ppc64/paca.h @@ -1,11 +1,8 @@ #ifndef _PPC64_PACA_H #define _PPC64_PACA_H -/*============================================================================ - * Header File Id - * Name______________: paca.h - * - * Description_______: +/* + * include/asm-ppc64/paca.h * * This control block defines the PACA which defines the processor * specific data for each logical processor on the system. @@ -18,139 +15,105 @@ * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. */ -#include <asm/types.h> - -#define N_EXC_STACK 2 -/*----------------------------------------------------------------------------- - * Other Includes - *----------------------------------------------------------------------------- - */ +#include <asm/types.h> #include <asm/iSeries/ItLpPaca.h> #include <asm/iSeries/ItLpRegSave.h> -#include <asm/iSeries/ItLpQueue.h> -#include <asm/rtas.h> #include <asm/mmu.h> -#include <asm/processor.h> extern struct paca_struct paca[]; register struct paca_struct *local_paca asm("r13"); #define get_paca() local_paca struct task_struct; +struct ItLpQueue; -/*============================================================================ - * Name_______: paca - * - * Description: +/* + * Defines the layout of the paca. * - * Defines the layout of the paca. - * - * This structure is not directly accessed by PLIC or the SP except - * for the first two pointers that point to the ItLpPaca area and the - * ItLpRegSave area for this processor. Both the ItLpPaca and - * ItLpRegSave objects are currently contained within the - * PACA but they do not need to be. - * - *============================================================================ + * This structure is not directly accessed by firmware or the service + * processor except for the first two pointers that point to the + * ItLpPaca area and the ItLpRegSave area for this CPU. Both the + * ItLpPaca and ItLpRegSave objects are currently contained within the + * PACA but they do not need to be. */ struct paca_struct { -/*===================================================================================== - * CACHE_LINE_1 0x0000 - 0x007F - *===================================================================================== - */ - struct ItLpPaca *xLpPacaPtr; /* Pointer to LpPaca for PLIC 0x00 */ - struct ItLpRegSave *xLpRegSavePtr; /* Pointer to LpRegSave for PLIC 0x08 */ - struct task_struct *xCurrent; /* Pointer to current 0x10 */ - /* Note: the spinlock functions in arch/ppc64/lib/locks.c load lock_token and - xPacaIndex with a single lwz instruction, using the constant offset 24. - If you move either field, fix the spinlocks and rwlocks. */ - u16 lock_token; /* Constant 0x8000, used in spinlocks 0x18 */ - u16 xPacaIndex; /* Logical processor number 0x1A */ - u32 default_decr; /* Default decrementer value 0x1c */ - u64 xKsave; /* Saved Kernel stack addr or zero 0x20 */ - struct ItLpQueue *lpQueuePtr; /* LpQueue handled by this processor 0x28 */ - u64 xTOC; /* Kernel TOC address 0x30 */ - STAB xStab_data; /* Segment table information 0x38,0x40,0x48 */ - u8 *exception_sp; /* 0x50 */ - u8 xProcEnabled; /* 0x58 */ - u8 prof_enabled; /* 1=iSeries profiling enabled 0x59 */ - u16 xHwProcNum; /* Physical processor number 0x5a */ - u8 resv1[36]; /* 0x5c */ - -/*===================================================================================== - * CACHE_LINE_2 0x0080 - 0x00FF - *===================================================================================== - */ - u64 spare1; /* 0x00 */ - u64 spare2; /* 0x08 */ - u64 spare3; /* 0x10 */ - u64 spare4; /* 0x18 */ - u64 next_jiffy_update_tb; /* TB value for next jiffy update 0x20 */ - u32 lpEvent_count; /* lpEvents processed 0x28 */ - u32 prof_multiplier; /* 0x2C */ - u32 prof_counter; /* 0x30 */ - u32 prof_shift; /* iSeries shift for profile bucket size0x34 */ - u32 *prof_buffer; /* iSeries profiling buffer 0x38 */ - u32 *prof_stext; /* iSeries start of kernel text 0x40 */ - u32 prof_len; /* iSeries length of profile buffer -1 0x48 */ - u8 yielded; /* 0 = this processor is running 0x4c */ - /* 1 = this processor is yielded */ - u8 rsvd2[128-77]; /* 0x49 */ + /* + * Because hw_cpu_id, unlike other paca fields, is accessed + * routinely from other CPUs (from the IRQ code), we stick to + * read-only (after boot) fields in the first cacheline to + * avoid cacheline bouncing. + */ -/*===================================================================================== - * CACHE_LINE_3 0x0100 - 0x017F - *===================================================================================== - */ - u8 xProcStart; /* At startup, processor spins until 0x100 */ - /* xProcStart becomes non-zero. */ - u8 rsvd3[127]; - -/*===================================================================================== - * CACHE_LINE_4-8 0x0180 - 0x03FF Contains ItLpPaca - *===================================================================================== - */ - struct ItLpPaca xLpPaca; /* Space for ItLpPaca */ + /* + * MAGIC: These first two pointers can't be moved - they're + * accessed by the firmware + */ + struct ItLpPaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ + struct ItLpRegSave *reg_save_ptr; /* Pointer to LpRegSave for PLIC */ -/*===================================================================================== - * CACHE_LINE_9-16 0x0400 - 0x07FF Contains ItLpRegSave - *===================================================================================== - */ - struct ItLpRegSave xRegSav; /* Register save for proc */ + /* + * MAGIC: the spinlock functions in arch/ppc64/lib/locks.c + * load lock_token and paca_index with a single lwz + * instruction. They must travel together and be properly + * aligned. + */ + u16 lock_token; /* Constant 0x8000, used in locks */ + u16 paca_index; /* Logical processor number */ -/*===================================================================================== - * CACHE_LINE_17-18 0x0800 - 0x08FF Reserved - *===================================================================================== - */ - struct rtas_args xRtas; /* Per processor RTAS struct */ - u64 xR1; /* r1 save for RTAS calls */ - u64 xSavedMsr; /* Old msr saved here by HvCall */ - u8 rsvd5[256-16-sizeof(struct rtas_args)]; + u32 default_decr; /* Default decrementer value */ + struct ItLpQueue *lpqueue_ptr; /* LpQueue handled by this CPU */ + u64 kernel_toc; /* Kernel TOC address */ + u64 stab_real; /* Absolute address of segment table */ + u64 stab_addr; /* Virtual address of segment table */ + void *emergency_sp; /* pointer to emergency stack */ + u16 hw_cpu_id; /* Physical processor number */ + u8 cpu_start; /* At startup, processor spins until */ + /* this becomes non-zero. */ -/*===================================================================================== - * CACHE_LINE_19-30 0x0900 - 0x0EFF Reserved - *===================================================================================== - */ - u64 slb_shadow[0x20]; - u64 dispatch_log; - u8 rsvd6[0x500 - 0x8]; - -/*===================================================================================== - * CACHE_LINE_31-32 0x0F00 - 0x0FFF Exception register save areas - *===================================================================================== - */ - u64 exgen[8]; /* used for most interrupts/exceptions */ + /* + * Now, starting in cacheline 2, the exception save areas + */ + u64 exgen[8] __attribute__((aligned(0x80))); /* used for most interrupts/exceptions */ u64 exmc[8]; /* used for machine checks */ u64 exslb[8]; /* used for SLB/segment table misses * on the linear mapping */ u64 exdsi[8]; /* used for linear mapping hash table misses */ -/*===================================================================================== - * Page 2 used as a stack when we detect a bad kernel stack pointer, - * and early in SMP boots before relocation is enabled. - *===================================================================================== - */ - u8 guard[0x1000]; + /* + * then miscellaneous read-write fields + */ + struct task_struct *__current; /* Pointer to current */ + u64 kstack; /* Saved Kernel stack addr */ + u64 stab_next_rr; /* stab/slb round-robin counter */ + u64 next_jiffy_update_tb; /* TB value for next jiffy update */ + u64 saved_r1; /* r1 save for RTAS calls */ + u64 saved_msr; /* MSR saved here by enter_rtas */ + u32 lpevent_count; /* lpevents processed */ + u8 proc_enabled; /* irq soft-enable flag */ + + /* + * iSeries structues which the hypervisor knows about - Not + * sure if these particularly need to be cacheline aligned. + * The lppaca is also used on POWER5 pSeries boxes. + */ + struct ItLpPaca lppaca __attribute__((aligned(0x80))); + struct ItLpRegSave reg_save; + + /* + * iSeries profiling support + * + * FIXME: do we still want this, or can we ditch it in favour + * of oprofile? + */ + u32 *prof_buffer; /* iSeries profiling buffer */ + u32 *prof_stext; /* iSeries start of kernel text */ + u32 prof_multiplier; + u32 prof_counter; + u32 prof_shift; /* iSeries shift for profile + * bucket size */ + u32 prof_len; /* iSeries length of profile */ + u8 prof_enabled; /* 1=iSeries profiling enabled */ }; #endif /* _PPC64_PACA_H */ diff --git a/include/asm-ppc64/rtas.h b/include/asm-ppc64/rtas.h index 4ce9bddc62a2..d596ec5b4c9f 100644 --- a/include/asm-ppc64/rtas.h +++ b/include/asm-ppc64/rtas.h @@ -51,18 +51,17 @@ struct rtas_args { u32 nargs; u32 nret; rtas_arg_t args[16]; -#if 0 - spinlock_t lock; -#endif rtas_arg_t *rets; /* Pointer to return values in args[]. */ }; +extern struct rtas_args rtas_stop_self_args; + struct rtas_t { unsigned long entry; /* physical address pointer */ unsigned long base; /* physical address pointer */ unsigned long size; spinlock_t lock; - + struct rtas_args args; struct device_node *dev; /* virtual address pointer */ }; diff --git a/include/asm-ppc64/smp.h b/include/asm-ppc64/smp.h index 3b14c7145546..139e88e5018a 100644 --- a/include/asm-ppc64/smp.h +++ b/include/asm-ppc64/smp.h @@ -33,8 +33,8 @@ struct pt_regs; extern void smp_message_recv(int, struct pt_regs *); -#define smp_processor_id() (get_paca()->xPacaIndex) -#define hard_smp_processor_id() (get_paca()->xHwProcNum) +#define smp_processor_id() (get_paca()->paca_index) +#define hard_smp_processor_id() (get_paca()->hw_cpu_id) /* * Retrieve the state of a CPU: @@ -75,9 +75,9 @@ extern void __cpu_die(unsigned int cpu); extern void cpu_die(void) __attribute__((noreturn)); #endif /* !(CONFIG_SMP) */ -#define get_hard_smp_processor_id(CPU) (paca[(CPU)].xHwProcNum) +#define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id) #define set_hard_smp_processor_id(CPU, VAL) \ - do { (paca[(CPU)].xHwProcNum = VAL); } while (0) + do { (paca[(CPU)].hw_proc_num = (VAL)); } while (0) #endif /* __ASSEMBLY__ */ diff --git a/include/asm-ppc64/spinlock.h b/include/asm-ppc64/spinlock.h index a16b2ff58d41..d2074c44f898 100644 --- a/include/asm-ppc64/spinlock.h +++ b/include/asm-ppc64/spinlock.h @@ -15,6 +15,7 @@ * 2 of the License, or (at your option) any later version. */ #include <linux/config.h> +#include <asm/paca.h> typedef struct { volatile unsigned int lock; @@ -57,12 +58,12 @@ static __inline__ int _raw_spin_trylock(spinlock_t *lock) "1: lwarx %0,0,%2 # spin_trylock\n\ cmpwi 0,%0,0\n\ bne- 2f\n\ - lwz %1,24(13)\n\ + lwz %1,%3(13)\n\ stwcx. %1,0,%2\n\ bne- 1b\n\ isync\n\ 2:" : "=&r"(tmp), "=&r"(tmp2) - : "r"(&lock->lock) + : "r"(&lock->lock), "i"(offsetof(struct paca_struct, lock_token)) : "cr0", "memory"); return tmp == 0; @@ -83,12 +84,12 @@ static __inline__ void _raw_spin_lock(spinlock_t *lock) "2: lwarx %0,0,%1\n\ cmpwi 0,%0,0\n\ bne- 1b\n\ - lwz %0,24(13)\n\ + lwz %0,%2(13)\n\ stwcx. %0,0,%1\n\ bne- 2b\n\ isync" : "=&r"(tmp) - : "r"(&lock->lock) + : "r"(&lock->lock), "i"(offsetof(struct paca_struct, lock_token)) : "cr0", "memory"); } @@ -115,12 +116,13 @@ static __inline__ void _raw_spin_lock_flags(spinlock_t *lock, 3: lwarx %0,0,%2\n\ cmpwi 0,%0,0\n\ bne- 1b\n\ - lwz %1,24(13)\n\ + lwz %1,%4(13)\n\ stwcx. %1,0,%2\n\ bne- 3b\n\ isync" : "=&r"(tmp), "=&r"(tmp2) - : "r"(&lock->lock), "r"(flags) + : "r"(&lock->lock), "r"(flags), + "i" (offsetof(struct paca_struct, lock_token)) : "cr0", "memory"); } diff --git a/include/asm-ppc64/time.h b/include/asm-ppc64/time.h index dfa720214d89..1e0162c2ff27 100644 --- a/include/asm-ppc64/time.h +++ b/include/asm-ppc64/time.h @@ -78,8 +78,8 @@ static __inline__ void set_dec(int val) struct paca_struct *lpaca = get_paca(); int cur_dec; - if (lpaca->xLpPaca.xSharedProc) { - lpaca->xLpPaca.xVirtualDecr = val; + if (lpaca->lppaca.xSharedProc) { + lpaca->lppaca.xVirtualDecr = val; cur_dec = get_dec(); if (cur_dec > val) HvCall_setVirtualDecr(); diff --git a/include/asm-s390/debug.h b/include/asm-s390/debug.h index 3148d5b2ca36..d8a34532b876 100644 --- a/include/asm-s390/debug.h +++ b/include/asm-s390/debug.h @@ -34,7 +34,6 @@ struct __debug_entry{ #define __DEBUG_FEATURE_VERSION 1 /* version of debug feature */ #ifdef __KERNEL__ -#include <linux/version.h> #include <linux/spinlock.h> #include <linux/kernel.h> #include <linux/time.h> diff --git a/include/asm-s390/percpu.h b/include/asm-s390/percpu.h index 7adef697ad1d..123fcaca295e 100644 --- a/include/asm-s390/percpu.h +++ b/include/asm-s390/percpu.h @@ -1,30 +1,70 @@ #ifndef __ARCH_S390_PERCPU__ #define __ARCH_S390_PERCPU__ -#include <asm-generic/percpu.h> +#include <linux/compiler.h> #include <asm/lowcore.h> +#define __GENERIC_PER_CPU + /* - * For builtin kernel code s390 uses the generic implementation for - * per cpu data, with the exception that the offset of the cpu local - * data area is cached in the cpu's lowcore memory + * s390 uses its own implementation for per cpu data, the offset of + * the cpu local data area is cached in the cpu's lowcore memory. * For 64 bit module code s390 forces the use of a GOT slot for the * address of the per cpu variable. This is needed because the module * may be more than 4G above the per cpu area. */ #if defined(__s390x__) && defined(MODULE) -#define __get_got_cpu_var(var,offset) \ + +#define __reloc_hide(var,offset) \ (*({ unsigned long *__ptr; \ - asm ( "larl %0,per_cpu__"#var"@GOTENT" : "=a" (__ptr) ); \ - ((typeof(&per_cpu__##var))((*__ptr) + offset)); \ - })) -#undef __get_cpu_var -#define __get_cpu_var(var) __get_got_cpu_var(var,S390_lowcore.percpu_offset) -#undef per_cpu -#define per_cpu(var,cpu) __get_got_cpu_var(var,__per_cpu_offset[cpu]) + asm ( "larl %0,per_cpu__"#var"@GOTENT" \ + : "=a" (__ptr) : "X" (per_cpu__##var) ); \ + (typeof(&per_cpu__##var))((*__ptr) + (offset)); })) + #else -#undef __get_cpu_var -#define __get_cpu_var(var) (*RELOC_HIDE(&per_cpu__##var, S390_lowcore.percpu_offset)) + +#define __reloc_hide(var, offset) \ + (*({ unsigned long __ptr; \ + asm ( "" : "=a" (__ptr) : "0" (&per_cpu__##var) ); \ + (typeof(&per_cpu__##var)) (__ptr + (offset)); })) + #endif +#ifdef CONFIG_SMP + +extern unsigned long __per_cpu_offset[NR_CPUS]; + +/* Separate out the type, so (int[3], foo) works. */ +#define DEFINE_PER_CPU(type, name) \ + __attribute__((__section__(".data.percpu"))) \ + __typeof__(type) per_cpu__##name + +#define __get_cpu_var(var) __reloc_hide(var,S390_lowcore.percpu_offset) +#define per_cpu(var,cpu) __reloc_hide(var,__per_cpu_offset[cpu]) + +/* A macro to avoid #include hell... */ +#define percpu_modcopy(pcpudst, src, size) \ +do { \ + unsigned int __i; \ + for (__i = 0; __i < NR_CPUS; __i++) \ + if (cpu_possible(__i)) \ + memcpy((pcpudst)+__per_cpu_offset[__i], \ + (src), (size)); \ +} while (0) + +#else /* ! SMP */ + +#define DEFINE_PER_CPU(type, name) \ + __typeof__(type) per_cpu__##name + +#define __get_cpu_var(var) __reloc_hide(var,0) +#define per_cpu(var,cpu) __reloc_hide(var,0) + +#endif /* SMP */ + +#define DECLARE_PER_CPU(type, name) extern __typeof__(type) per_cpu__##name + +#define EXPORT_PER_CPU_SYMBOL(var) EXPORT_SYMBOL(per_cpu__##var) +#define EXPORT_PER_CPU_SYMBOL_GPL(var) EXPORT_SYMBOL_GPL(per_cpu__##var) + #endif /* __ARCH_S390_PERCPU__ */ diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h index ba3b3510e9a7..0d51c484c2ea 100644 --- a/include/asm-s390/setup.h +++ b/include/asm-s390/setup.h @@ -36,7 +36,6 @@ extern unsigned long machine_flags; #define MACHINE_IS_P390 (machine_flags & 4) #define MACHINE_HAS_MVPG (machine_flags & 16) #define MACHINE_HAS_DIAG44 (machine_flags & 32) -#define MACHINE_NEW_STIDP (machine_flags & 64) #define MACHINE_HAS_IDTE (machine_flags & 128) #ifndef __s390x__ @@ -54,7 +53,7 @@ extern unsigned long machine_flags; * Console mode. Override with conmode= */ extern unsigned int console_mode; -extern unsigned int console_device; +extern unsigned int console_devno; extern unsigned int console_irq; #define CONSOLE_IS_UNDEFINED (console_mode == 0) diff --git a/include/asm-s390/vtoc.h b/include/asm-s390/vtoc.h index f805a0b46697..a14e34e80b88 100644 --- a/include/asm-s390/vtoc.h +++ b/include/asm-s390/vtoc.h @@ -14,7 +14,6 @@ #include <linux/fs.h> #include <linux/types.h> #include <linux/hdreg.h> -#include <linux/version.h> #include <asm/dasd.h> #endif diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h index 44b67330f500..e3d4f6575a0e 100644 --- a/include/asm-sparc64/pgtable.h +++ b/include/asm-sparc64/pgtable.h @@ -106,33 +106,49 @@ #endif /* !(__ASSEMBLY__) */ /* Spitfire/Cheetah TTE bits. */ -#define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ -#define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit up to date */ -#define _PAGE_SZ4MB _AC(0x6000000000000000,UL) /* 4MB Page */ -#define _PAGE_SZ512K _AC(0x4000000000000000,UL) /* 512K Page */ -#define _PAGE_SZ64K _AC(0x2000000000000000,UL) /* 64K Page */ -#define _PAGE_SZ8K _AC(0x0000000000000000,UL) /* 8K Page */ -#define _PAGE_NFO _AC(0x1000000000000000,UL) /* No Fault Only */ -#define _PAGE_IE _AC(0x0800000000000000,UL) /* Invert Endianness */ -#define _PAGE_SN _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ -#define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr [40:13]*/ -#define _PAGE_PADDR _AC(0x000007FFFFFFE000,UL) /* (Cheetah) paddr [42:13] */ -#define _PAGE_SOFT _AC(0x0000000000001F80,UL) /* Software bits */ -#define _PAGE_L _AC(0x0000000000000040,UL) /* Locked TTE */ -#define _PAGE_CP _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */ -#define _PAGE_CV _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */ -#define _PAGE_E _AC(0x0000000000000008,UL) /* side-Effect */ -#define _PAGE_P _AC(0x0000000000000004,UL) /* Privileged Page */ -#define _PAGE_W _AC(0x0000000000000002,UL) /* Writable */ -#define _PAGE_G _AC(0x0000000000000001,UL) /* Global */ - -/* Here are the SpitFire software bits we use in the TTE's. */ -#define _PAGE_FILE _AC(0x0000000000001000,UL) /* Pagecache page */ -#define _PAGE_MODIFIED _AC(0x0000000000000800,UL) /* Modified (dirty) */ -#define _PAGE_ACCESSED _AC(0x0000000000000400,UL) /* Accessed (ref'd) */ -#define _PAGE_READ _AC(0x0000000000000200,UL) /* Readable SW Bit */ -#define _PAGE_WRITE _AC(0x0000000000000100,UL) /* Writable SW Bit */ -#define _PAGE_PRESENT _AC(0x0000000000000080,UL) /* Present */ +#define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ +#define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit up to date*/ +#define _PAGE_SZ4MB _AC(0x6000000000000000,UL) /* 4MB Page */ +#define _PAGE_SZ512K _AC(0x4000000000000000,UL) /* 512K Page */ +#define _PAGE_SZ64K _AC(0x2000000000000000,UL) /* 64K Page */ +#define _PAGE_SZ8K _AC(0x0000000000000000,UL) /* 8K Page */ +#define _PAGE_NFO _AC(0x1000000000000000,UL) /* No Fault Only */ +#define _PAGE_IE _AC(0x0800000000000000,UL) /* Invert Endianness */ +#define _PAGE_SOFT2 _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ +#define _PAGE_RES1 _AC(0x0003000000000000,UL) /* Reserved */ +#define _PAGE_SN _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ +#define _PAGE_RES2 _AC(0x0000780000000000,UL) /* Reserved */ +#define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr[40:13]*/ +#define _PAGE_PADDR _AC(0x000007FFFFFFE000,UL) /* (Cheetah) paddr[42:13] */ +#define _PAGE_SOFT _AC(0x0000000000001F80,UL) /* Software bits */ +#define _PAGE_L _AC(0x0000000000000040,UL) /* Locked TTE */ +#define _PAGE_CP _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */ +#define _PAGE_CV _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */ +#define _PAGE_E _AC(0x0000000000000008,UL) /* side-Effect */ +#define _PAGE_P _AC(0x0000000000000004,UL) /* Privileged Page */ +#define _PAGE_W _AC(0x0000000000000002,UL) /* Writable */ +#define _PAGE_G _AC(0x0000000000000001,UL) /* Global */ + +/* Here are the SpitFire software bits we use in the TTE's. + * + * WARNING: If you are going to try and start using some + * of the soft2 bits, you will need to make + * modifications to the swap entry implementation. + * For example, one thing that could happen is that + * swp_entry_to_pte() would BUG_ON() if you tried + * to use one of the soft2 bits for _PAGE_FILE. + * + * Like other architectures, I have aliased _PAGE_FILE with + * _PAGE_MODIFIED. This works because _PAGE_FILE is never + * interpreted that way unless _PAGE_PRESENT is clear. + */ +#define _PAGE_EXEC _AC(0x0000000000001000,UL) /* Executable SW bit */ +#define _PAGE_MODIFIED _AC(0x0000000000000800,UL) /* Modified (dirty) */ +#define _PAGE_FILE _AC(0x0000000000000800,UL) /* Pagecache page */ +#define _PAGE_ACCESSED _AC(0x0000000000000400,UL) /* Accessed (ref'd) */ +#define _PAGE_READ _AC(0x0000000000000200,UL) /* Readable SW Bit */ +#define _PAGE_WRITE _AC(0x0000000000000100,UL) /* Writable SW Bit */ +#define _PAGE_PRESENT _AC(0x0000000000000080,UL) /* Present */ #if PAGE_SHIFT == 13 #define _PAGE_SZBITS _PAGE_SZ8K @@ -164,16 +180,27 @@ /* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */ #define PAGE_SHARED __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ - __ACCESS_BITS | _PAGE_WRITE) + __ACCESS_BITS | _PAGE_WRITE | _PAGE_EXEC) #define PAGE_COPY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ - __ACCESS_BITS) + __ACCESS_BITS | _PAGE_EXEC) #define PAGE_READONLY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ - __ACCESS_BITS) + __ACCESS_BITS | _PAGE_EXEC) #define PAGE_KERNEL __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \ - __PRIV_BITS | __ACCESS_BITS | __DIRTY_BITS) + __PRIV_BITS | \ + __ACCESS_BITS | __DIRTY_BITS | _PAGE_EXEC) + +#define PAGE_SHARED_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ + _PAGE_CACHE | \ + __ACCESS_BITS | _PAGE_WRITE) + +#define PAGE_COPY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ + _PAGE_CACHE | __ACCESS_BITS) + +#define PAGE_READONLY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \ + _PAGE_CACHE | __ACCESS_BITS) #define _PFN_MASK _PAGE_PADDR @@ -181,18 +208,18 @@ __ACCESS_BITS | _PAGE_E) #define __P000 PAGE_NONE -#define __P001 PAGE_READONLY -#define __P010 PAGE_COPY -#define __P011 PAGE_COPY +#define __P001 PAGE_READONLY_NOEXEC +#define __P010 PAGE_COPY_NOEXEC +#define __P011 PAGE_COPY_NOEXEC #define __P100 PAGE_READONLY #define __P101 PAGE_READONLY #define __P110 PAGE_COPY #define __P111 PAGE_COPY #define __S000 PAGE_NONE -#define __S001 PAGE_READONLY -#define __S010 PAGE_SHARED -#define __S011 PAGE_SHARED +#define __S001 PAGE_READONLY_NOEXEC +#define __S010 PAGE_SHARED_NOEXEC +#define __S011 PAGE_SHARED_NOEXEC #define __S100 PAGE_READONLY #define __S101 PAGE_READONLY #define __S110 PAGE_SHARED diff --git a/include/asm-x86_64/suspend.h b/include/asm-x86_64/suspend.h index 914d98371eec..508e924b801f 100644 --- a/include/asm-x86_64/suspend.h +++ b/include/asm-x86_64/suspend.h @@ -38,7 +38,6 @@ extern unsigned long saved_context_r08, saved_context_r09, saved_context_r10, sa extern unsigned long saved_context_r12, saved_context_r13, saved_context_r14, saved_context_r15; extern unsigned long saved_context_eflags; - #define loaddebug(thread,register) \ __asm__("movq %0,%%db" #register \ : /* no output */ \ diff --git a/include/linux/compiler-gcc+.h b/include/linux/compiler-gcc+.h index 94e6778873a7..5629cf5cd9c9 100644 --- a/include/linux/compiler-gcc+.h +++ b/include/linux/compiler-gcc+.h @@ -13,3 +13,4 @@ #define __attribute_used__ __attribute__((__used__)) #define __attribute_pure__ __attribute__((pure)) #define __attribute_const__ __attribute__((__const__)) +#define __must_check __attribute__((warn_unused_result)) diff --git a/include/linux/compiler-gcc3.h b/include/linux/compiler-gcc3.h index 265dad4c3cb4..7965ae53d986 100644 --- a/include/linux/compiler-gcc3.h +++ b/include/linux/compiler-gcc3.h @@ -25,3 +25,6 @@ #if __GNUC_MINOR__ >= 1 #define noinline __attribute__((noinline)) #endif +#if __GNUC_MINOR__ >= 4 +#define __must_check __attribute__((warn_unused_result)) +#endif diff --git a/include/linux/compiler.h b/include/linux/compiler.h index 151ab34a5b5f..22d83706f4b2 100644 --- a/include/linux/compiler.h +++ b/include/linux/compiler.h @@ -69,6 +69,10 @@ extern void __chk_user_ptr(void __user *); # define __deprecated /* unimplemented */ #endif +#ifndef __must_check +#define __must_check +#endif + /* * Allow us to avoid 'defined but not used' warnings on functions and data, * as well as force them to be emitted to the assembly file. diff --git a/include/linux/dcookies.h b/include/linux/dcookies.h index b2ae9692dc05..c28050136164 100644 --- a/include/linux/dcookies.h +++ b/include/linux/dcookies.h @@ -50,7 +50,7 @@ int get_dcookie(struct dentry * dentry, struct vfsmount * vfsmnt, struct dcookie_user * dcookie_register(void) { - return 0; + return NULL; } void dcookie_unregister(struct dcookie_user * user) diff --git a/include/linux/fb.h b/include/linux/fb.h index 4e5f196258c8..67d506883572 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -532,6 +532,7 @@ struct fb_ops { #define FBINFO_MISC_MODECHANGEUSER 0x10000 /* mode change request from userspace */ +#define FBINFO_MISC_MODESWITCH 0x20000 /* mode switch */ struct fb_info { int node; diff --git a/include/linux/fs.h b/include/linux/fs.h index f20e583bb41e..16ed87c94ce5 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1521,7 +1521,7 @@ extern int simple_pin_fs(char *name, struct vfsmount **mount, int *count); extern void simple_release_fs(struct vfsmount **mount, int *count); extern int inode_change_ok(struct inode *, struct iattr *); -extern int inode_setattr(struct inode *, struct iattr *); +extern int __must_check inode_setattr(struct inode *, struct iattr *); extern void inode_update_time(struct inode *inode, int ctime_too); diff --git a/include/linux/ftape.h b/include/linux/ftape.h index 5774b1bfc045..c6b38d5b9186 100644 --- a/include/linux/ftape.h +++ b/include/linux/ftape.h @@ -195,7 +195,6 @@ typedef union { /* some useful macro's */ -#define ABS(a) ((a) < 0 ? -(a) : (a)) #define NR_ITEMS(x) (int)(sizeof(x)/ sizeof(*x)) #endif /* __KERNEL__ */ diff --git a/include/linux/kallsyms.h b/include/linux/kallsyms.h index 87b9bbbb485e..1a5dce8f9346 100644 --- a/include/linux/kallsyms.h +++ b/include/linux/kallsyms.h @@ -7,6 +7,8 @@ #include <linux/config.h> +#define KSYM_NAME_LEN 127 + #ifdef CONFIG_KALLSYMS /* Lookup the address for a symbol. Returns 0 if not found. */ unsigned long kallsyms_lookup_name(const char *name); diff --git a/include/linux/miscdevice.h b/include/linux/miscdevice.h index f62586335e48..041263ab10d9 100644 --- a/include/linux/miscdevice.h +++ b/include/linux/miscdevice.h @@ -26,14 +26,6 @@ #define MPT_MINOR 220 #define MISC_DYNAMIC_MINOR 255 -#define SGI_GRAPHICS_MINOR 146 -#define SGI_OPENGL_MINOR 147 -#define SGI_GFX_MINOR 148 -#define SGI_STREAMS_MOUSE 149 -#define SGI_STREAMS_KEYBOARD 150 -/* drivers/sgi/char/usema.c */ -#define SGI_USEMACLONE 151 - #define TUN_MINOR 200 #define HPET_MINOR 228 diff --git a/include/linux/pci.h b/include/linux/pci.h index 2662f462b7e6..abfb688bde5f 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -321,6 +321,50 @@ #define PCI_X_STATUS_266MHZ 0x40000000 /* 266 MHz capable */ #define PCI_X_STATUS_533MHZ 0x80000000 /* 533 MHz capable */ +/* PCI Express capability registers */ + +#define PCI_EXP_FLAGS 2 /* Capabilities register */ +#define PCI_EXP_FLAGS_VERS 0x000f /* Capability version */ +#define PCI_EXP_FLAGS_TYPE 0x00f0 /* Device/Port type */ +#define PCI_EXP_TYPE_ENDPOINT 0x0 /* Express Endpoint */ +#define PCI_EXP_TYPE_LEG_END 0x1 /* Legacy Endpoint */ +#define PCI_EXP_TYPE_ROOT_PORT 0x4 /* Root Port */ +#define PCI_EXP_TYPE_UPSTREAM 0x5 /* Upstream Port */ +#define PCI_EXP_TYPE_DOWNSTREAM 0x6 /* Downstream Port */ +#define PCI_EXP_TYPE_PCI_BRIDGE 0x7 /* PCI/PCI-X Bridge */ +#define PCI_EXP_FLAGS_SLOT 0x0100 /* Slot implemented */ +#define PCI_EXP_FLAGS_IRQ 0x3e00 /* Interrupt message number */ +#define PCI_EXP_DEVCAP 4 /* Device capabilities */ +#define PCI_EXP_DEVCAP_PAYLOAD 0x07 /* Max_Payload_Size */ +#define PCI_EXP_DEVCAP_PHANTOM 0x18 /* Phantom functions */ +#define PCI_EXP_DEVCAP_EXT_TAG 0x20 /* Extended tags */ +#define PCI_EXP_DEVCAP_L0S 0x1c0 /* L0s Acceptable Latency */ +#define PCI_EXP_DEVCAP_L1 0xe00 /* L1 Acceptable Latency */ +#define PCI_EXP_DEVCAP_ATN_BUT 0x1000 /* Attention Button Present */ +#define PCI_EXP_DEVCAP_ATN_IND 0x2000 /* Attention Indicator Present */ +#define PCI_EXP_DEVCAP_PWR_IND 0x4000 /* Power Indicator Present */ +#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */ +#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */ +#define PCI_EXP_DEVCTL 8 /* Device Control */ +#define PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */ +#define PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */ +#define PCI_EXP_DEVCTL_FERE 0x0004 /* Fatal Error Reporting Enable */ +#define PCI_EXP_DEVCTL_URRE 0x0008 /* Unsupported Request Reporting En. */ +#define PCI_EXP_DEVCTL_RELAX_EN 0x0010 /* Enable relaxed ordering */ +#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 /* Max_Payload_Size */ +#define PCI_EXP_DEVCTL_EXT_TAG 0x0100 /* Extended Tag Field Enable */ +#define PCI_EXP_DEVCTL_PHANTOM 0x0200 /* Phantom Functions Enable */ +#define PCI_EXP_DEVCTL_AUX_PME 0x0400 /* Auxiliary Power PM Enable */ +#define PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800 /* Enable No Snoop */ +#define PCI_EXP_DEVCTL_READRQ 0x7000 /* Max_Read_Request_Size */ +#define PCI_EXP_DEVSTA 10 /* Device Status */ +#define PCI_EXP_DEVSTA_CED 0x01 /* Correctable Error Detected */ +#define PCI_EXP_DEVSTA_NFED 0x02 /* Non-Fatal Error Detected */ +#define PCI_EXP_DEVSTA_FED 0x04 /* Fatal Error Detected */ +#define PCI_EXP_DEVSTA_URD 0x08 /* Unsupported Request Detected */ +#define PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */ +#define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */ + /* Extended Capabilities (PCI-X 2.0 and Express) */ #define PCI_EXT_CAP_ID(header) (header & 0x0000ffff) #define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf) @@ -659,6 +703,7 @@ static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *s } int pci_scan_slot(struct pci_bus *bus, int devfn); struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn); +unsigned int pci_scan_child_bus(struct pci_bus *bus); void pci_bus_add_devices(struct pci_bus *bus); void pci_name_device(struct pci_dev *dev); char *pci_class_name(u32 class); diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 0a73d0d2c271..519ffaca6cf0 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1711,6 +1711,9 @@ #define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061 #define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062 +#define PCI_VENDOR_ID_RADISYS 0x1331 +#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030 + #define PCI_VENDOR_ID_DOMEX 0x134a #define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 diff --git a/include/linux/pm.h b/include/linux/pm.h index 66e62c0df19c..d54bc441daff 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -159,7 +159,7 @@ static inline struct pm_dev *pm_register(pm_dev_t type, unsigned long id, pm_callback callback) { - return 0; + return NULL; } static inline void pm_unregister(struct pm_dev *dev) {} diff --git a/include/linux/pnpbios.h b/include/linux/pnpbios.h index 0720cd72d63a..0a282ac1f6b2 100644 --- a/include/linux/pnpbios.h +++ b/include/linux/pnpbios.h @@ -141,6 +141,7 @@ extern int pnp_bios_isapnp_config (struct pnp_isa_config_struc *data); extern int pnp_bios_escd_info (struct escd_info_struc *data); extern int pnp_bios_read_escd (char *data, u32 nvram_base); extern int pnp_bios_dock_station_info(struct pnp_docking_station_info *data); +#define needed 0 #if needed extern int pnp_bios_get_event (u16 *message); extern int pnp_bios_send_message (u16 message); diff --git a/include/linux/posix-timers.h b/include/linux/posix-timers.h index 637d2fb19012..ec4910e37c65 100644 --- a/include/linux/posix-timers.h +++ b/include/linux/posix-timers.h @@ -1,8 +1,16 @@ #ifndef _linux_POSIX_TIMERS_H #define _linux_POSIX_TIMERS_H +#include <linux/spinlock.h> +#include <linux/list.h> + +struct k_clock_abs { + struct list_head list; + spinlock_t lock; +}; struct k_clock { int res; /* in nano seconds */ + struct k_clock_abs *abs_struct; int (*clock_set) (struct timespec * tp); int (*clock_get) (struct timespec * tp); int (*nsleep) (int flags, @@ -23,8 +31,14 @@ struct now_struct { #define posix_time_before(timer, now) \ time_before((timer)->expires, (now)->jiffies) -#define posix_bump_timer(timr) do { \ - (timr)->it_timer.expires += (timr)->it_incr; \ - (timr)->it_overrun++; \ - }while (0) +#define posix_bump_timer(timr, now) \ + do { \ + long delta, orun; \ + delta = now.jiffies - (timr)->it_timer.expires; \ + if (delta >= 0) { \ + orun = 1 + (delta / (timr)->it_incr); \ + (timr)->it_timer.expires += orun * (timr)->it_incr; \ + (timr)->it_overrun += orun; \ + } \ + }while (0) #endif diff --git a/include/linux/sched.h b/include/linux/sched.h index 6eb3b3afa1a6..4dcbe972d5b5 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -343,6 +343,8 @@ struct k_itimer { struct task_struct *it_process; /* process to send signal to */ struct timer_list it_timer; struct sigqueue *sigq; /* signal queue entry. */ + struct list_head abs_timer_entry; /* clock abs_timer_list */ + struct timespec wall_to_prev; /* wall_to_monotonic used when set */ }; diff --git a/include/linux/suspend.h b/include/linux/suspend.h index 7e4409b7c55b..d0955f06c9b4 100644 --- a/include/linux/suspend.h +++ b/include/linux/suspend.h @@ -67,24 +67,27 @@ extern int pm_prepare_console(void); extern void pm_restore_console(void); #else -static inline void refrigerator(unsigned long flag) -{ - -} -static inline int freeze_processes(void) -{ - return 0; -} -static inline void thaw_processes(void) -{ - -} +static inline void refrigerator(unsigned long flag) {} #endif /* CONFIG_PM */ +#ifdef CONFIG_SMP +extern void disable_nonboot_cpus(void); +extern void enable_nonboot_cpus(void); +#else +static inline void disable_nonboot_cpus(void) {} +static inline void enable_nonboot_cpus(void) {} +#endif + asmlinkage void do_magic(int is_resume); asmlinkage void do_magic_resume_1(void); asmlinkage void do_magic_resume_2(void); asmlinkage void do_magic_suspend_1(void); asmlinkage void do_magic_suspend_2(void); +void save_processor_state(void); +void restore_processor_state(void); +struct saved_context; +void __save_processor_state(struct saved_context *ctxt); +void __restore_processor_state(struct saved_context *ctxt); + #endif /* _LINUX_SWSUSP_H */ diff --git a/include/pcmcia/cs_types.h b/include/pcmcia/cs_types.h index 3a0f7476dbb3..abc32897e390 100644 --- a/include/pcmcia/cs_types.h +++ b/include/pcmcia/cs_types.h @@ -36,7 +36,7 @@ #include <sys/types.h> #endif -#ifdef __arm__ +#if defined(__arm__) || defined(__mips__) typedef u_int ioaddr_t; #else typedef u_short ioaddr_t; diff --git a/include/video/sstfb.h b/include/video/sstfb.h index dd3db89315d8..8dade38a78b4 100644 --- a/include/video/sstfb.h +++ b/include/video/sstfb.h @@ -72,10 +72,6 @@ #define BIT(x) (1ul<<(x)) #define POW2(x) (1ul<<(x)) -#ifndef ABS -# define ABS(x) (((x)<0)?-(x):(x)) -#endif - /* * * Const |