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do_cmd is a nice shorthand when creating rules that in one line
shall adhere to KBUILD_VERBOSE and make -s.
So far the only user is (will be) the docbook makefile
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Some archs sneaked additional flags for ld into $(LD). This can be done
cleaner now, by just using $(LDFLAGS).
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o Provide $(obj),$(objtree) and friends in the top-level Makefile as well
for consistency (Sam Ravnborg)
o Make $(call cmd,whatever) consistent with $(call if_changed,whatever),
i.e. both will execute $(cmd_whatever)
o Add $(echo_target), which will print the current target in a suitable
way for the quiet output format (i.e. target name relative to the
top-level directory)
o Fix the dependencies for host compiled programs to work for files in
subdirectories (missed converting them when introducing $(depfile))
o Add commands which will be useful when generating boot images.
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To generate the module versions for 53c700.o, we need the included
generated header already.
Improve the rule to copy shipped files into place.
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For separate source and object directories, Rules.make needs
to know where the files live.
For all the normal variables, $(obj-[ymn]) etc, it can figure that
out by itself, but for explicit rules to generate files it needs
help.
So there $(obj)/target.o indicates that this file lives in the
object directory, as opposed to $(src)/target.c, which lives in
the source dir.
For now $(obj) = $(src) = ., but convert some Makefiles to it
already.
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Rename the shipped 53c.. firmware files to <name>_shipped.
Add a default rule for shipped files, which will just
call <name>_shipped to <name> if no specific rule to generate
the target exists.
Rename the aic7xxx firmware to fit into this naming scheme.
For now 53c... defaults to just using the shipped firmware.
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Reduce the amount of output in verbose (default) mode and stop
immediately on error.
(Sam Ravnborg/me)
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New and old way to handle dependencies would choke when a file
#include'd by other files was removed, since the dependency on it was
still recorded, but since it was gone, make has no idea what to do about
it (and would complain with "No rule to make <file> ...")
We now add targets for all the previously included files, so make will
just ignore them if they disappear.
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As pointed out by Mikael Pettersson, we didn't generate checksums for
all exporting objects, due to a thinko of mine.
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When compiling a host program directly from the source without
going via intermediate objects, we were missing $(HOST_LOADLIBES) on
the command line.
Pointed out by Keith Owens.
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The dependency generation broke on files with a comma in their name,
i.e. 53c7,8xx.c
This patches fixes the limitation. However, using commas in filenames
is strongly discouraged, there are other places where this case cannot
be handled cleanly (e.g. section names in include/linux/spinlock.h).
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by Sam Ravnborg
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Tracking dependencies for .ver files isn't really different from
the dependency tracking for the other .[ois] targets we do,
so just use the normal $(call if_changed_dep) framework. That makes
speeds up re-running "make dep" a lot.
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Up to now, we generated module versions for all objects which
were listed in $(export-objs).
This had one advantage: A changed .config will not affect which
.ver files are built, thus saving recompiles.
However, it is fundamentally broken. To build .ver files, we preprocess
the exporting sources - and the result can obviously depend on
the current .config. Even worse, some files generate errors when
preprocessed with the wrong .config - it doesn't matter a lot that
drivers/sbus/* will generate errors on x86, since it won't be used anyway,
but e.g. kernel/suspend.c cannot be preprocessed unless
CONFIG_SOFTWARE_SUSPEND is set. - Up to now, we just silently ignore
these errors.
Actually, the whole point behind CONFIG_MODVERSIONS is to make sure
we don't insert modules into a kernel which was configured differently,
and as such the generation of symbols can only work when .config is
known.
So we now only generate symbols for objects which will actually be
compiled - which means less work, and enforce the kernel to be configured
before "make dep".
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Keep track of possible targets while we add rules - Later, only
include the command lines / dependencies as needed.
E.g., when defining how to build multi-part objects listed in
$(multi-used-y) and $(multi-used-m), add $(multi-used-y,m) to
the variable targets. At the end of Rules.make, we then include
the saved command lines for these targets (if they exist), needed
to check whether the command changed and we hence need to rebuild.
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Previously, we always had put the .cmd/.d files into the local subdir
- now we put them into the directory where the target lives, like
some/dir/target.o <-> some/dir/.target.o.cmd
It does not yet make a difference, since we always only generated
targets in the local directory anyway, but that will change with
tracking dependencies for .ver files.
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We use A/CFLAGS_KERNEL by default anyway, so no need to set them
explicitly for built-in objects.
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This patch doesn't change anything but the order (and some comments) in
Rules.make. The reason for that is that we use Rules.make for three
different purposes, fastdep, modules_install and the actual building.
As an example, we don't need all the dependencies and saved command lines
when installing modules, so it'll speed up this pass to only include the
rules which will actually get used.
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So far, we had been lazy and not generated dependencies for
debugging-only targets, like some/dir/foo.[is]. It actually
cleans up Rules.make to handle them by the same mechanism, though.
Additionally, make use of $(call if_changed) and $(call if_changed_dep)
more consistent, the only difference now is post-processing of
gcc -MD output, which is done for if_changed_dep but not for if_changed.
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cpp -MD guesses the target name from the source file name, but not
always correctly, e.g. when compiling fixdep, it generates prequisites
for fixdep.o instead of fixdep.
fixdep now fixes up the -MD generated output to contain the right target,
which is the one we pass on the command line.
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o When using "make -j<n>", the order in modversions.h could change,
thus causing unnecessary rebuilds.
o Move a comment in Rules.make which I forgot when I moved the
associated code.
o When descending into init/ during the final vmlinux link,
add a '+' do tell make to use its normal "-j" jobserver handling.
o It'd be nice to get the logic between make clean and make mrproper
clearer. I think make clean should remove all targets used in the
actual build,
make mrproper should remove the rest, build-specific files, like
e.g. the .*.cmd files used to save dependencies and command lines
and other temporary files.
A real small step in the direction: Remove .tmpversion/.tmp-export-objs
at mrproper time.
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o Fix a bug in fixdep.c, which could cause segfaults
o Make sure that we build fixdep first of all, since
we need it to build host programs.
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At a couple of places, we need to build programs which run on the
compile host during building the kernel.
Add a new variable "host-progs" to declare such programs. Rules.make will
automatically provide rules to compile these programs with appropriate
command lines etc.
Compared to having explicit rules spread around for doing so, this has
the following advantages:
o shorter
o automatically figures out dependencies and handles changing command
lines
o Nicer output in quiet mode ;-)
Compiling host programs from multiple sources is also possible, analogous
to multi-part objects. E.g. scripts/Makefile has
host-progs := tkparse
tkparse-objs := tkparse.o tkcond.o tkgen.o
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Kernel code should not include userspace headers. To avoid that
happening by mistake, ask gcc not to look into the usual places
when looking for headers. We still need to find gcc headers for
vararg and similar, though - achieved by the "-iwithprefix include"
which will look into <gcc-path>/include, as proposed by Russell
King.
A similar patch went into 2.4, so not much breakage expected.
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So here we are: make vmlinux/bzImage/whatever will now also build
modules as it goes. Other than that, everything works as usual.
"make modules" builds only the modules (but you shouldn't need
it anymore). If you don't want the modules built, you can
do "make KBUILD_MODULES= vmlinux/whatever" to only compile built-in
objects.
If people want it, I can also allow for "make vmlinux/whatever nomodules"
to do the same.
Also, add ' ' in Rules.make to properly align output in quiet mode.
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If an object was changed to not export symbols anymore, the
corresponding stale .ver file would have been left lying around
and been picked up when generating modversions.h.
The obvious solution to remove include/linux/modules/* at the
beginning of "make dep" is not really good, since that means
that .ver files would be regenerated unconditionally, thus causing
a lot of possibly unnecessary rebuilds.
So, instead, we build a temporary shadow tree of all export-objs
(as empty files) during the recursive "make fastdep" phase, and use
that to generate modversions.h.
Ensure that we touch include/linux/modversions.h if any of the
.ver files changes, that's our marker to rebuild all modversions
affected files.
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Rules.make now has three targets:
o default (a.k.a first_rule): The actual build. Deciding whether
to build built-in or modular or both is decided by
$(KBUILD_MODULES) and $(KBUILD_BUILTIN) now, instead of using
different targets
o fastdep: doesn't actually dependencies anymore, only generates
modversions
o modules_install: Well, you guess what that does.
Cleaned up descending, and no more differentiating between
$(subdir-y) and $(subdir-m). That means $(mod-subdirs) can
go away now.
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We used to force the obvious deep structure of all objects which
export symbols into a flat list in include/linux/modules. This
initially caused the restriction the no two exporting objects could
have the same name (Ever wondered why there's ksyms.c and
i386_ksyms.c?)
With the ALSA merge this restriction was mostly lifted by some hack,
but some cases still don't work right (Hi XFS). As it's much cleaner
to just use a normal tree under include/linux/modules, reflecting the
source tree, we now do just that.
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Making dependencies once up front is not ideal. For one, you don't need
them initially, since when you don't have the .o file, you bet you have
to build it no matter what the dependencies say - dependencies are about
deciding when to *re*build.
There's more reasons, like:
o you don't even know which files you'll build, so you have to go over
all files (even over drivers/{sbus,s390,...} on i386)
o generated files don't exist yet, so you cannot pick up dependencies
on them
o even if dependencies are right initially, they change when you work on
your tree or patch it, and nobody will notice unless you run "make dep"
explicitly again
Anyway, gcc knows hows to emit a correct dependency list, so we just use
that. Well, a little bit of hacking is necessary to remove the dependency
on autoconf.h and put in individual CONFIG_WHAT_EVER dependencies instead,
since otherwise changing one config option would cause everything to be
rebuilt.
I should add that I didn't come up with this all by myself, most work
is actually done in gcc and there were discussions about using -MD on
kbuild-devel way back, so I should mention Keith Owens and Michael
Elizabeth Chastain, and probably others that I forgot, so I apologize
just in case.
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Just use 'make some/dir/foo.lst' to produce mixed source code and
assembly for debugging. (If the object gets linked in and you have
a System.map, it'll relocate appropriately)
Apart from the needed Makefile bits, also clean up the script
"makelst".
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Suppress echoing of commands when using "make -s", so that make -s
does indeed have the effect one would expect.
Add a quiet mode, which will print not the entire command but only
one line per rule. To turn it on, use
make KBUILD_VERBOSE=0 vmlinux/whatever
or set KBUILD_VERBOSE=0 in your environment.
For now, the verbose mode is default, which gives you the old behavior
of printing all commands.
The output in quiet mode is based on what Keith Owens' kbuild-2.5 does,
I like, I did not want to invent yet another output format.
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-DMODVERSIONS isn't used anymore, so it can go. Also, after cleaning
up include/linux/module.h, it's obvious that we don't need
include/linux/modversions.h at all if CONFIG_MODVERSIONS not set,
no need to generate it.
Rules.make explicitly lists files which depend on modversions.h,
since make dep cannot know about the
"-include include/linux/modversions.h" which gets added to
the command line. Now that we understand when it is needed, we can
even get that list right ;-)
Oh well, nice theory. .hdepend will touch module.h when modversions.h
changes, so we still get unnecessary recompiles. We really need to
switch to the new way of dependency generation, it gets all that
right without even thinking about these special cases.
We don't track dependencies for .ver files. In fact, we relied on that
checksum would only change if the corresponding exporting C source
changes. That's not true, of course, all of the included headers have
say as well. So we better force the hash to be checked
unconditionally every time "make dep" is run.
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There's no good reason why we would generate
include/linux/modversions.h from the top-level Makefile when
CONFIG_MODVERSION=y and from Rules.make otherwise.
Nor is there a good reason to call the target to do so
"update-modverfile" - "include/linux/modversions.h" makes
much more sense.
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Basically only cosmetics, and move the 'update-modverfile:'
rule from Rules.make to the top-level Makefile, since that's the
only place where it's used.
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Use "make BUILD_MODULES=1 {,bzImage,zImage,vmlinux,...}" to build
your kernel - and it'll also build the modules as you go.
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99% of the Makefiles are very simple target-wise:
o build modules as listed in $(obj-m) and
o build $(L_TARGET)/$(O_TARGET) as a composite object containing $(obj-y)
However, there is one exception: typically arch/$ARCH/kernel Makefile
wants the same as above, plus
o build init_task.o, head.o, using the standard rules for built-in
targets - i.e. they are supposed to be built in the same way as all
the other targets listed in $(obj-y), but they should not be linked
into arch/$ARCH/kernel/$(O_TARGET). Instead they'll be linked in
directly in the final vmlinux link.
Currently this is achieved by overriding Rules.make's first_rule in
arch/$ARCH/kernel/Makefile. This rather ad-hoc way relies on the knowing
how Rules.make works internally and at the same time does things behind
Rules.make's back.
To clean this up, I'm introducing a new variable, supposed to be only
used in arch/$ARCH/kernel/Makefile:
$(EXTRA_TARGETS) can be used to declare additional objects which shall
be built in the current directory (using the flags for built-in objects),
but not linked into $(O_TARGET)/$(L_TARGET)
This patch only converts arch/i386/kernel/Makefile at this time, other
archs work the same way as before.
Apart from this, this patch also removes some "unexport ..." statements,
which are unnecessary since not exporting variables is the default and
renames the internal "all_targets" to "vmlinux", since it's actually
need for building vmlinux.
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FORCE is the de-facto standard name for a prequisite to force
recompilation, so instead of using a mix of 'dummy','FORCE' and
'FORCE_RECOMPILE' use 'FORCE' everywhere.
Also, move figuring out the path relative to the top level dir
into Rules.make, instead of calling an external script.
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We now have the information which objects are being built
modular / built-in in Rules.make, so use this information instead
of passing flags to the sub makes.
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If a Makefile defines neither O_TARGET nor L_TARGET, let's assume a
default of 'built-in.o'. The goal of this is, of course, to eventually
get rid of O_TARGET completely.
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o Use a shorter expression to transform 'foo.o' -> 'foo-objs'
o Define EXPORT_FLAGS (as -DEXPORT_SYMTAB) in the main Makefile
o Small rearrangement of code in Rules.make
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Group the variable-processing part together, which figures out what
needs to be done. (Nothing actually changes in this cset)
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into penguin.transmeta.com:/home/penguin/torvalds/repositories/kernel/linux
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If our command line contains an ';', we'd only print half of
it and execute the other half - not good.
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into tp1.ruhr-uni-bochum.de:/home/kai/kernel/v2.5/linux-2.5.make-built-in
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New-style Makefiles have a nice way of declaring objects
which need to be built either built-in or as modules:
obj-$(CONFIG_EEPRO100) += eepro100.o
However, handling objects in subdirectories, which need to be
built and linked is not as nice:
subdir-$(CONFIG_E100) += e100
ifeq ($(CONFIG_E100),y)
obj-y += e100/built-in.o
endif
This means we descend into the subdirectory when building
vmlinux / modules, depending on CONFIG_XXX. When we are building
vmlinux we also need to link whatever has been built in the
subdirectory, so we add it to $(obj-y) at the appropriate place
(link order is important).
Now, the extension below allows to rewrite the second case into
obj-$(CONFIG_E100) += e100/
which looks much nicer ;-) Existing behavior is not changed, and the
only prerequisite to using the extension above is that the O_TARGET in
the subdir is named "built-in.o".
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into penguin.transmeta.com:/home/penguin/torvalds/repositories/kernel/linux
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into penguin.transmeta.com:/home/penguin/torvalds/repositories/kernel/linux
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This patch restores the previous behavior of stopping the build
immediately on error (unless the -k option is given to make)
Before this patch, we would do the echo command no matter if the
compile failed, thus returning success always.
(Jan Harkes)
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into tp1.ruhr-uni-bochum.de:/home/kai/kernel/v2.5/linux-2.5.make-as
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